Commit Graph
867 Commits
Author SHA1 Message Date
Sakthivel Velumani e9d95e8962 Add new physim test cases for nr_dlsim
Following tests are added:
  1. 256QAM with TDL-A channel model
  2. 256QAM with 2 layers
2025-07-24 13:20:07 -04:00
Laurent THOMAS 72c29248a3 remove dead globals 2025-06-03 17:03:17 +02:00
Thomas Schlichter b264ddc1ec nrLDPC_coding_t2 fix: convert the correct number of LLRs from 16 Bit to 8 Bit 2025-05-20 08:55:31 +00:00
Thomas Schlichter 073a705720 nrLDPC_coding_t2: minor cleanup 2025-05-20 08:55:30 +00:00
Thomas Schlichter ffb8e8ff37 nrLDPC_coding_t2: nb_TBs is of type int 2025-05-20 08:53:57 +00:00
Thomas Schlichter c3d0b2db5c nrLDPC_coding_t2 fix: use rte_pktmbuf_mtod_offset() to consider offset when accessing output data 2025-05-20 08:51:37 +00:00
Thomas Schlichter 944ac15ab5 nrLDPC_coding_t2: allocate array of rte_bbdev_dec_op pointers on stack instead of heap 2025-05-20 08:00:36 +00:00
Thomas Schlichter 2df487fc8b nrLDPC_coding_t2: use rte_bbdev_op_type_str() instead of hardcoded array of strings 2025-05-20 08:00:36 +00:00
Thomas Schlichter af7054554b nrLDPC_coding_t2: make parameters for set_ldpc_dec_op() more smilar to set_ldpc_enc_op() 2025-05-20 08:00:36 +00:00
Thomas Schlichter d442461bd1 nrLDPC_coding_t2: remove unused start_idx from set_ldpc_enc_op() and set_ldpc_dec_op() 2025-05-20 08:00:35 +00:00
Thomas Schlichter b5c9e13df3 nrLDPC_coding_t2: remove unused #define HARQ_INCR 2025-05-20 07:57:23 +00:00
Thomas Schlichter 07ff8a27c4 nrLDPC_coding_t2: remove unused functions mbuf_reset() and check_bit() 2025-05-20 07:57:23 +00:00
Thomas Schlichter c1e057bc8b nrLDPC_coding_t2: remove unused atomic variables nb_dequeued and processing_status 2025-05-20 07:57:23 +00:00
Thomas Schlichter adbf056abb nrLDPC_coding_t2: remove unused global variable m_head 2025-05-20 07:57:23 +00:00
Thomas Schlichter 4dde956e84 nrLDPC_coding_t2: remove unused vector_mask 2025-05-20 07:57:23 +00:00
Thomas Schlichter b02e6e8ddd nrLDPC_coding_t2: inline and remove now nearly empty init_test_op_params() 2025-05-20 07:57:23 +00:00
Thomas Schlichter ea7e6ffb0b nrLDPC_coding_t2: remove unused num_to_process 2025-05-20 07:57:23 +00:00
Thomas Schlichter 73c6d1fb62 nrLDPC_coding_t2: remove unused burst_sz 2025-05-20 07:57:23 +00:00
Thomas Schlichter f47b549f41 nrLDPC_coding_t2: remove unused rte_bbdev_dec_op from test_op_params and thread_params 2025-05-20 07:57:23 +00:00
Thomas Schlichter e45aff7763 nrLDPC_coding_t2: replace global mp_dec and mp_enc by bbdev_op_pool in thread_params 2025-05-20 07:57:23 +00:00
Thomas Schlichter 300346c43a nrLDPC_coding_t2: replace global q_bufs by struct data_buffers on stack 2025-05-20 07:57:23 +00:00
Thomas Schlichter 48e78ff4b0 nrLDPC_coding_t2: fix q_bufs memory leak 2025-05-20 07:57:23 +00:00
Thomas Schlichter ac9a8f017b nrLDPC_coding_t2 fix: make sure to free allocated mbufs
The DPDK driver may directly provide the internal HW mbuf in the dequeued structure.
So don't try to free the mbufs from that dequeued structure, but the ones we allocated.
2025-05-20 07:57:21 +00:00
Thomas Schlichter 1612ba33a8 nrLDPC_coding_t2: remove unused soft_outputs, harq_inputs and harq_outputs elements 2025-05-20 07:56:26 +00:00
Thomas Schlichter d8b3bfd17b nrLDPC_coding_t2: use nb_segments_decoding() and nb_segments_encoding() to calculate num_segments 2025-05-20 07:56:24 +00:00
Thomas Schlichter 084bbb0363 nrLDPC_coding_t2: also support newer DPDK versions 2025-05-20 07:54:12 +00:00
Robert Schmidt 918ea49686 Merge remote-tracking branch 'origin/phy_simulators_ctest' into integration_2025_w20 (!3379)
Add physim tests into ctest framework

Convert physim testcases listed in
cmake_targets/autotests/test_case_list.xml into ctest. Note: Tests for
dlsim_tm4 are excluded, due to compilation issues.

CTest evaluates success based on return code: '0' = pass, non-zero =
fail. For some simulators, the return code is non-zero even when the
test is successful (as indicated by success messages in the test logs).
For some simulators, the return code is always '0'. This inconsistency
has been address in the first two commits of this MR.

To build and execute these tests:

- using cmake

    cd openairinterface5g
    mkdir build && cd build # you can also do that in cmake_targets/ran_build/build
    cmake .. -GNinja -DENABLE_PHYSIM_TESTS=ON && ninja tests
    ctest

- using build_oai: physim-related ctests are activated when PHY
  simulators are built (use build_oai with '-P' or '--phy_simulators'
  option)

    cd openairinterface5g/cmake_targets
    ./build_oai --ninja --phy_simulators
    cd ran_build/build
    ctest

Link to newly created 4g and 5g RAN-Physim-Cluster pipelines:

- RAN-Physim-Cluster-4G: https://jenkins-oai.eurecom.fr/job/RAN-Physim-Cluster-4G/
- RAN-Physim-Cluster-5G: https://jenkins-oai.eurecom.fr/job/RAN-Physim-Cluster-5G/
2025-05-17 12:05:27 +02:00
Jaroslava Fiedlerova 1de7e0541c CI: adjust tested SNR for nr_pucchsim
Initially we were testing SNR from -3 to 7 dB, in recent runs PUCCH test
succeeds at SNR = 0 or 1 dB. Starting at higher SNR helps to reduce test
runtime. Set maximum SNR to 7dB, as it was done in the initial test scenario,
to ensure that possible performance degradation is detected.
2025-05-16 16:38:54 +02:00
Jaroslava Fiedlerova 5312e9e43b Convert physims in cmake_targets/autotests/test_case_list.xml to ctest
Convert physim testcases defined in cmake_targets/autotests/test_case_list.xml
into CTest based tests. These test are activated when '-DENABLE_PHYSIM_TESTS=ON'
CMake flag is set.

Note: Tests for dlsim_tm4 are excluded, due to compilation issues.

CTest evaluates success based on return code: '0' = pass, non-zero = fail.

The following table outlines the physim executables, their success expressions
(`expr_true`), and the return codes for success (`ret_success`) and failure
(`ret_fail`). The `expr_true` is used in test_case_list.xml to check for test
results.

| test_exec     | expr_true      | ret_succ        | ret_fail          |
| ------------- | -------------- | --------------- | ----------------- |
| dlsim         | passed         | 0               | -1                |
| ulsim         | passed         | 0 (ret)         | 1 (ret)           |
| ldpctest      | BLER 0.000000  | 0               | 1                 |
| polartest     | BLER= 0.000000 | 0               | 1                 |
| nr_pbchsim    | PBCH test OK   | 0               | 1                 |
| nr_dlsim      | PDSCH test OK  | 0               | 1                 |
| smallblocktest| BLER= 0.000000 | 0               | 1                 |
| nr_ulschsim   | PUSCH test OK  | 0 (n_errors)    | n_errors          |
| nr_pucchsim   | PUCCH test OK  | 0               | 1                 |
| nr_ulsim      | PUSCH test OK  | 0 (ret)         | -1 (ret)          |
| nr_prachsim   | PRACH test OK  | 0 (prach_errors)| > 0 (prach_errors)|
| nr_psbchsim   | PSBCH test OK  | 0 (errors)      | > 0 (errors)      |

Add CMake flag "ENABLE_PHYSIM_TESTS=ON" when building OAI with "-P"
or "--phy_simulators" option. This allows physim-related ctest to
be executed from build directory.

Add dependency on coding lib for all 4G physims
2025-05-16 16:29:43 +02:00
Jaroslava Fiedlerova 8ca6a4a06e Modify polartest, smallblocktest and ldpctest to return '0' on success
- Updated polartest, smallblocktest, and ldpctest to check BLER and return
  appropriate status:
  - Returns '0' if BLER equals 0.000000 (indicating success).
  - Returns '1' for all other BLER values (indicating failure).
- This change improves consistency in return values across the test physims.
2025-05-16 13:42:14 +02:00
Romain Beurdouche 1734e1916c fix(nrLDPC_coding_interface): mistaken line forgotten in documentation 2025-05-13 14:08:33 +00:00
Romain Beurdouche 360f341394 feat(nrLDPC_coding_t2): Shift encoder output with 64 bits shift
Use 64 bits shift to shift the output segment of the encoding operations to their offset in the coding library output buffer.
2025-05-13 14:08:33 +00:00
Jaroslava Fiedlerova b31dd728cb T2: Use 8b packed output of the T2 encoder
- modify retrieve_ldpc_enc_op() to store encoded results in a packed format
- add timing measurements for T2 encoder
- add simde implementation for bit reversal
  - Introduce new bit reversal implementation using simde_mm_gf2p8affine_epi64_epi8
    instruction, based on https://wunkolo.github.io/post/2020/11/gf2p8affineqb-bit-reversal/.
    This implementation requires GFNI and AVX512VL support on the target machine.
2025-05-13 14:08:33 +00:00
Romain BeurdoucheandLaurent Thomas 0aa3dba5b7 feat(nrLDPC_coding_segment): Encoding with sequential output write
1. The encoder writes the output in sequence after the encoding tasks completed instead of writing within the tasks.

2. Simplify the output writing to make it more readable.

Co-authored-by: Laurent Thomas <laurent.thomas@open-cells.com>
2025-05-13 14:08:33 +00:00
Romain Beurdouche b1e1c161ec feat(nrLDPC_coding_segment_encoder): Mitigate race condition
There was a risk of a race condition between encoding tasks on the output array.
It could be that two task compete in writing a word at the border of their respective segment groups.

This commit offers to solve this issue by retaining the tail word in a struct that is returned after task completion so that segment group border can be fixed after completion of all the tasks.

Comes with additional cleanups of nrLDPC_coding_segment_encoder:
1. Move the section of code dedicated to writing to the encoding library output to a separate function.
2. Remove bit interleave debug in AVX512VBMI case of output writing for improving code readability.
2025-05-13 14:08:33 +00:00
Romain BeurdoucheandLaurent Thomas 06c81030dc fix(nrLDPC_coding_segment_encoder): address review
1. nrLDPC_coding_segment_encoding: Clarifying encoder parameters
   The way the encoder implementation params was used could be made clearer:
   * `macro_num` was always used in order to calculate segment indexes.
     It is clearer to pass directly the first segment index.
   * The initialisation of a common implementation parameters structure can be made clearer.

2. nrLDPC_coding_segment_encoder: Remove multi segment dimension in encoder output
   The output of `LDPCencoder` was a 2D unsigned char array.
   But all the segments were actually packed in the first segment, 8 bits of different segments per byte of the first segment.
   So the first dimension was useless. This commit removes this dimension.

3. nrLDPC_coding_segment_encoder: Rename `nrLDPC_prepare_TB_encoding` into `nrLDPC_launch_TB_encoding`

4. nrLDPC_coding_segment_encoder: Remove the useless second rate matching for E2, one rate matching with max(E, E2) does the job.

5. nr_interleaving_ldpc: cleanup
   Rewrite code to use different SIMD sizes in a linear fashion.
   This means cascading preprocessor directives are used to start from a high SIMD size an decrease it progressively.

6. ldpc_encoder_optim8segmulti: linear usage of SIMD
   Use cascading preprocessor directives to include different SIMD sizes and types depending on which are available on the system.
   The different loops use a common index that is progressively incremented.
   Also add AVX512 version of bits distribution from 8 segments into one byte.

Co-authored-by: Laurent Thomas <laurent.thomas@open-cells.com>
2025-05-13 14:08:33 +00:00
Romain Beurdouche 1b31ac417b fix(nrLDPC_coding_interface): Move the encoding output to the TB
Since this branch aims to bring all the encoded segments packed and contiguous,
it doesn't make anymore sense to have one output array per segment.
Therefore this commit moves the output array to the TB instead of the segment and adapts its size.

TODO: Adapt the size of f where it is relevant.
2025-05-13 14:08:33 +00:00
Romain Beurdouche f3daf0ed83 fix(nrLDPC_coding): Miscellaneous fixes
1. nrLDPC_coding_segment_encoder: pointer not aligned on 64 bits
   An undefined behavior was happening because of a shift on a __m64 which
   was actually a uint32_t which was not aligned on 64 bits.
   This commit suggests a fix by properly loading into a __m64 with _mm_set_pi32
   before performing the shift.

2. nr_rate_matching: Filler bits detection
   Previously, if the bit selection was reaching Ncb and restarting selection from the beginning of encoded data, the filler bits were detected by testing the bytes again NR_NULL which was equal to 2.
   But on this branch the bits of up to 8 segments are stored in one byte while doing rate matching so that one byte could be tested to be a filler while it is not.
   So this commit changes the way to test filler bits.
   Instead of relying on NR_NULL, bit selection now relies on the offset and size of filler bits.

3. nr_ulsch_coding: missing filling f with zeros
   The array `f` of the UE UL HARQ process was not filled with zeros between transmissions.
   This is a problem if the encoder does not properly overwrite its output.
   In order to avoid such situation, this commit adds a memset to fill `f` with zeros before passing it to the encoder.

4. nrLDPC_coding_segment_encoder: missing init of f to zeros
   In the encoder, `f` is not filled with zeros before being used.
   `f` is instead somehow filled with arbitrary values.
   When writing to `output` by 64 bit vectors, some arbitrary bits may be added after the segment.
   Then the arbitrary added ones are not overwritten when writing the next segment because of writing with a logical or.
   This commit properly fills `f` and `f2` with zeros.

5. nr_ulschsim & nr_dlschsim: Adapt modulation to new encoder output
   The QPSK symbols that are feed to the channel model of nr_dlschsim were determined based on the bytes of the encoder output.
   With the new output of the encoder, it had to be reworked to determine the QPSK symbols based on the bits of the encoder output.
2025-05-13 14:08:33 +00:00
Raymond Knopp bbbbda70f5 feat(nrLDPC_coding_segment_encoder): Dense Rate Matching and Dense and Concatenated Output
1. 3GPP Rate-matching/interleaving on 8-segment blocks, deinterleaving at output of multi-segment processing.

2. Bit-packing done in nrLDPC_coding_segment_encoder.c now instead of nr_scrambling.
   Interestingly, it improves performance significantly too.
   Tested for AVX512 only for now.
2025-05-13 14:08:33 +00:00
Raymond KnoppandRomain Beurdouche 33078f9e3d feat(cnProc_gen_BG1_128): Put back small change in 128-bit SIMD code generator for LDPC decoder (cnProc).
Avoid the use of simde_mm_sign_epi8 which is inefficient on aarch64.
Decoding times are significantly improved on aarch64.

Co-authored-by: Romain Beurdouche <romain.beurdouche@eurecom.fr>
2025-05-13 14:08:33 +00:00
Raymond Knopp a4c950774b feat(ldpc_encoder_optim8segmulti): Improvements for Arm Neoverse
Use 128 bit SIMD in packing and unpacking segment bits in bytes
Adapt compiler options for Neoverse.
2025-05-13 14:08:33 +00:00
Raymond Knopp 8964fdb6a2 AVX512 modifications for LDPC encoding: interleaving, ZC384 BG1, output formatting for encoder, segmentation (memcpy) 2025-05-13 14:08:33 +00:00
Romain Beurdouche d6ee29a193 feat(nrLDPC_encoder): remove _optim and _optim8seg
It is pointless to keep updating ldpc_optim and ldpc_optim8seg.
So we remove them.
2025-05-13 07:32:36 +00:00
Laurent THOMAS 1208521959 remove dead code and a wrong comment 2025-04-28 11:59:17 +02:00
Chieh-Chun Chen 49d302960c Fix: modify block_length to Kprime 2025-04-11 14:40:52 +02:00
Robert Schmidt 83590bf1af Merge remote-tracking branch 'origin/fix-bugs-detected-gcc' into integration_2025_w14_p2 (!3342)
Fix bugs detected gcc
2025-04-08 10:06:06 +02:00
Laurent THOMAS 990414572a error uint/int mixed in loops 2025-04-04 16:04:05 +02:00
francescomani cea4412b3b do not include LTE defs_common into 5G code 2025-04-01 18:53:09 +02:00
Robert Schmidt bbae3b24ad Merge remote-tracking branch 'origin/arm-build-pipeline' into integration_2025_w12 (!3286)
Add support for ARM build pipeline

Modify the existing python code to be able to build images where the
image tag can be prepended with a prefix, here arm_. This is preparatory
work to create the ARM build image pipeline, and reuse the existing
internal registry on porcepix to have x86 and ARM images coexist.

Fix various bugs in the build system to allow to build on a system with
as many cores as gracehopper.

Also, fix two programs (usim, nvram) to work correctly under ARM.
2025-03-24 14:45:12 +01:00
Robert Schmidt 252c9db246 Correctly express dependency on LOG headers
Various libraries in this commit use the log headers (that is the
direct dependency). The log headers in turn include the T headers
(transitive dependency). Building on gracehopper with its many cores
triggers the build of these libraries before T headers have been
generated.

To resolve this and force the generation of T headers before building
the libraries, correctly express their dependency on the log headers,
which in turn ensures that T headers have been generated.

Depending on log_headers is preferrable because it is really the headers
that we depend on. Using instead e.g., utils, would trigger build of
source files, that we don't need for these libraries.  This commit is
part of a larger cleanup that I have that is not merged yet. Follow-up
work will generalize this in the repo, and ensure that every(!) library
builds.

We have to add CONFIG_LIB, as the log module has a direct dependency
onto the configuration module (it uses it). I am not sure why this was
not relevant before.
2025-03-18 09:21:24 +01:00