Make number of UL/DL actors in NR UE fully configurable
Due to different processing requirements on different CPUs it might be
beneficial to enable the users to set the number of UL/DL actors.
Allow disabling UL/DL actor frameworks and processing inline or setting
the number of DL/UL threads with --num-ul-actors/num-dl-actors
This was tested to work with 0 UL/DL actors with rfsim.
Due to different processing requirements on different CPUs it might
be beneficial to enable the users to set the number of UL/DL actors.
Allow disabling UL/DL actor frameworks and processing inline or
setting the number of DL/UL threads with --num-ul-actors/num-dl-actors
This was tested to work with 0 UL/DL actors with rfsim.
The DPDK driver may directly provide the internal HW mbuf in the dequeued structure.
So don't try to free the mbufs from that dequeued structure, but the ones we allocated.
Fix UL chanel estimates mapping in 2-layer MMSE receiver
This MR addresses a degradation in UL throughput observed in 4x4 MIMO
tests, starting from 2025.w17.
The issue was traced to incoherent indexing in the ul_ch_estimates_ext
when handling 4-antenna UL configurations.
Add physim tests into ctest framework
Convert physim testcases listed in
cmake_targets/autotests/test_case_list.xml into ctest. Note: Tests for
dlsim_tm4 are excluded, due to compilation issues.
CTest evaluates success based on return code: '0' = pass, non-zero =
fail. For some simulators, the return code is non-zero even when the
test is successful (as indicated by success messages in the test logs).
For some simulators, the return code is always '0'. This inconsistency
has been address in the first two commits of this MR.
To build and execute these tests:
- using cmake
cd openairinterface5g
mkdir build && cd build # you can also do that in cmake_targets/ran_build/build
cmake .. -GNinja -DENABLE_PHYSIM_TESTS=ON && ninja tests
ctest
- using build_oai: physim-related ctests are activated when PHY
simulators are built (use build_oai with '-P' or '--phy_simulators'
option)
cd openairinterface5g/cmake_targets
./build_oai --ninja --phy_simulators
cd ran_build/build
ctest
Link to newly created 4g and 5g RAN-Physim-Cluster pipelines:
- RAN-Physim-Cluster-4G: https://jenkins-oai.eurecom.fr/job/RAN-Physim-Cluster-4G/
- RAN-Physim-Cluster-5G: https://jenkins-oai.eurecom.fr/job/RAN-Physim-Cluster-5G/
Initially we were testing SNR from -3 to 7 dB, in recent runs PUCCH test
succeeds at SNR = 0 or 1 dB. Starting at higher SNR helps to reduce test
runtime. Set maximum SNR to 7dB, as it was done in the initial test scenario,
to ensure that possible performance degradation is detected.
Convert physim testcases defined in cmake_targets/autotests/test_case_list.xml
into CTest based tests. These test are activated when '-DENABLE_PHYSIM_TESTS=ON'
CMake flag is set.
Note: Tests for dlsim_tm4 are excluded, due to compilation issues.
CTest evaluates success based on return code: '0' = pass, non-zero = fail.
The following table outlines the physim executables, their success expressions
(`expr_true`), and the return codes for success (`ret_success`) and failure
(`ret_fail`). The `expr_true` is used in test_case_list.xml to check for test
results.
| test_exec | expr_true | ret_succ | ret_fail |
| ------------- | -------------- | --------------- | ----------------- |
| dlsim | passed | 0 | -1 |
| ulsim | passed | 0 (ret) | 1 (ret) |
| ldpctest | BLER 0.000000 | 0 | 1 |
| polartest | BLER= 0.000000 | 0 | 1 |
| nr_pbchsim | PBCH test OK | 0 | 1 |
| nr_dlsim | PDSCH test OK | 0 | 1 |
| smallblocktest| BLER= 0.000000 | 0 | 1 |
| nr_ulschsim | PUSCH test OK | 0 (n_errors) | n_errors |
| nr_pucchsim | PUCCH test OK | 0 | 1 |
| nr_ulsim | PUSCH test OK | 0 (ret) | -1 (ret) |
| nr_prachsim | PRACH test OK | 0 (prach_errors)| > 0 (prach_errors)|
| nr_psbchsim | PSBCH test OK | 0 (errors) | > 0 (errors) |
Add CMake flag "ENABLE_PHYSIM_TESTS=ON" when building OAI with "-P"
or "--phy_simulators" option. This allows physim-related ctest to
be executed from build directory.
Add dependency on coding lib for all 4G physims
Setting the DEBUG_UE_TIMING flag caused a flood of UE timing logs, resulting
in dlsim output logs as large as 1.5MB per test in CI. This commit comments
out the line where we set the flag to reduce log verbosity.
- Change return value of nr_dlsim, nr_pbchsim and nr_pucchsim to:
- Return '0' if test succeeds (indicated also by "PDSCH/PBCH/PUCCH test
OK" in the test log).
- Return '1' if test fails.
- Updated polartest, smallblocktest, and ldpctest to check BLER and return
appropriate status:
- Returns '0' if BLER equals 0.000000 (indicating success).
- Returns '1' for all other BLER values (indicating failure).
- This change improves consistency in return values across the test physims.
Improvements for LDPC encoding
AVX512 modifications for LDPC encoding: interleaving, ZC384 BG1, output
formatting for encoder, segmentation (memcpy instead of loop). some
improvement in TX for aarch64 in same places where AVX512 support was
added. Also, rate matching and interleaving are done on bytes containing
8 segments and reformatting of the output is done at the end of segment
processing instead of after ldpc encoding.
This improves the overall performance of the NR DL transmitter in gNB
See the merge request description for numbers.
- modify retrieve_ldpc_enc_op() to store encoded results in a packed format
- add timing measurements for T2 encoder
- add simde implementation for bit reversal
- Introduce new bit reversal implementation using simde_mm_gf2p8affine_epi64_epi8
instruction, based on https://wunkolo.github.io/post/2020/11/gf2p8affineqb-bit-reversal/.
This implementation requires GFNI and AVX512VL support on the target machine.
1. The encoder writes the output in sequence after the encoding tasks completed instead of writing within the tasks.
2. Simplify the output writing to make it more readable.
Co-authored-by: Laurent Thomas <laurent.thomas@open-cells.com>
There was a risk of a race condition between encoding tasks on the output array.
It could be that two task compete in writing a word at the border of their respective segment groups.
This commit offers to solve this issue by retaining the tail word in a struct that is returned after task completion so that segment group border can be fixed after completion of all the tasks.
Comes with additional cleanups of nrLDPC_coding_segment_encoder:
1. Move the section of code dedicated to writing to the encoding library output to a separate function.
2. Remove bit interleave debug in AVX512VBMI case of output writing for improving code readability.
1. nrLDPC_coding_segment_encoding: Clarifying encoder parameters
The way the encoder implementation params was used could be made clearer:
* `macro_num` was always used in order to calculate segment indexes.
It is clearer to pass directly the first segment index.
* The initialisation of a common implementation parameters structure can be made clearer.
2. nrLDPC_coding_segment_encoder: Remove multi segment dimension in encoder output
The output of `LDPCencoder` was a 2D unsigned char array.
But all the segments were actually packed in the first segment, 8 bits of different segments per byte of the first segment.
So the first dimension was useless. This commit removes this dimension.
3. nrLDPC_coding_segment_encoder: Rename `nrLDPC_prepare_TB_encoding` into `nrLDPC_launch_TB_encoding`
4. nrLDPC_coding_segment_encoder: Remove the useless second rate matching for E2, one rate matching with max(E, E2) does the job.
5. nr_interleaving_ldpc: cleanup
Rewrite code to use different SIMD sizes in a linear fashion.
This means cascading preprocessor directives are used to start from a high SIMD size an decrease it progressively.
6. ldpc_encoder_optim8segmulti: linear usage of SIMD
Use cascading preprocessor directives to include different SIMD sizes and types depending on which are available on the system.
The different loops use a common index that is progressively incremented.
Also add AVX512 version of bits distribution from 8 segments into one byte.
Co-authored-by: Laurent Thomas <laurent.thomas@open-cells.com>
Since this branch aims to bring all the encoded segments packed and contiguous,
it doesn't make anymore sense to have one output array per segment.
Therefore this commit moves the output array to the TB instead of the segment and adapts its size.
TODO: Adapt the size of f where it is relevant.
1. nrLDPC_coding_segment_encoder: pointer not aligned on 64 bits
An undefined behavior was happening because of a shift on a __m64 which
was actually a uint32_t which was not aligned on 64 bits.
This commit suggests a fix by properly loading into a __m64 with _mm_set_pi32
before performing the shift.
2. nr_rate_matching: Filler bits detection
Previously, if the bit selection was reaching Ncb and restarting selection from the beginning of encoded data, the filler bits were detected by testing the bytes again NR_NULL which was equal to 2.
But on this branch the bits of up to 8 segments are stored in one byte while doing rate matching so that one byte could be tested to be a filler while it is not.
So this commit changes the way to test filler bits.
Instead of relying on NR_NULL, bit selection now relies on the offset and size of filler bits.
3. nr_ulsch_coding: missing filling f with zeros
The array `f` of the UE UL HARQ process was not filled with zeros between transmissions.
This is a problem if the encoder does not properly overwrite its output.
In order to avoid such situation, this commit adds a memset to fill `f` with zeros before passing it to the encoder.
4. nrLDPC_coding_segment_encoder: missing init of f to zeros
In the encoder, `f` is not filled with zeros before being used.
`f` is instead somehow filled with arbitrary values.
When writing to `output` by 64 bit vectors, some arbitrary bits may be added after the segment.
Then the arbitrary added ones are not overwritten when writing the next segment because of writing with a logical or.
This commit properly fills `f` and `f2` with zeros.
5. nr_ulschsim & nr_dlschsim: Adapt modulation to new encoder output
The QPSK symbols that are feed to the channel model of nr_dlschsim were determined based on the bytes of the encoder output.
With the new output of the encoder, it had to be reworked to determine the QPSK symbols based on the bits of the encoder output.
1. 3GPP Rate-matching/interleaving on 8-segment blocks, deinterleaving at output of multi-segment processing.
2. Bit-packing done in nrLDPC_coding_segment_encoder.c now instead of nr_scrambling.
Interestingly, it improves performance significantly too.
Tested for AVX512 only for now.
Avoid the use of simde_mm_sign_epi8 which is inefficient on aarch64.
Decoding times are significantly improved on aarch64.
Co-authored-by: Romain Beurdouche <romain.beurdouche@eurecom.fr>
Robert Schmidt