luis_pereira87
f4b3a869a6
minor fix at SIB1 decoding
2021-02-10 13:07:04 +00:00
Thomas Schlichter
f59a9360f5
Apply 2 suggestion(s) to 1 file(s)
2021-02-10 13:43:35 +01:00
Thomas Schlichter
13086925c9
Add tests for 80 and 100 MHz SC-FDMA to nr_ulsim autotests for CI
2021-02-10 11:21:40 +01:00
Parminder Singh
9202c583f5
Spaces are corrected, tabs replaced with spaces
2021-02-10 11:10:19 +01:00
Thomas Schlichter
75cd4c79d9
update tx_sample_advance for 40 MHz and USRP X300 (3/4 sampling)
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Testing RA with OAI gNB and UE both using X300 via PCIe link indicated a value of 15 was way too small.
The correct value for this setup seems to be 65.
2021-02-09 18:09:11 +01:00
Thomas Schlichter
b9e99f1e64
update tx_sample_advance for 10 MHz and USRP X300
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Tests with our USRP X300, connected via PCIe, show that tx_sample_advance of 45 is slightly too much.
Unfortunately, transmitting the PRACH preamble too early is very bad, slightly too late is no problem.
So change this value from 45 to 40. This helps receiving the PRACH preamble reliably.
2021-02-09 17:51:33 +01:00
Thomas Schlichter
28f739bb70
add 10 MHz configuration file for USRP X300
2021-02-09 17:50:32 +01:00
Robert Schmidt
54a2d698db
Fix build: test for slot from within preprocessor
2021-02-09 16:46:44 +01:00
dir
cfebcd19bd
Corrections to 217RBs, 273RB configuration files. RFSIM works with these changes
2021-02-09 17:32:51 +02:00
luis_pereira87
5a1e2b1db7
Add support for SIB1 and SI in BCCH-DL-SCH
2021-02-09 15:32:17 +00:00
dir
d2aa132616
Msg3_transformprecoder value initialised to TRANSFORM PRECODING DISABLED
2021-02-09 15:16:40 +02:00
Florian Kaltenberger
04a4a6f451
Merge remote-tracking branch 'origin/develop' into benetel_driver_update
2021-02-09 11:13:01 +01:00
Florian Kaltenberger
12517f02e2
Reverting shifting the TX 4 bits to the left to exploit dynamic range.
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adapted ssb_block_power to measured value
This partially reverts commit 857f9179f3
2021-02-09 11:10:58 +01:00
dir
3efdb2775e
NR SCFDMA changes for higher RB sizes (RB Sizes until 100Mhz)
2021-02-09 11:07:53 +01:00
hardy
665688681b
Merge remote-tracking branch 'origin/ue-fixes' into integration_2021_wk06_b
2021-02-09 10:54:58 +01:00
hardy
421cb60fa4
Merge remote-tracking branch 'origin/NR_DLUL_PF' into integration_2021_wk06_b
2021-02-09 10:49:28 +01:00
hardy
bcc009b2f9
Merge remote-tracking branch 'origin/nasmesh_kernel_5.8' into integration_2021_wk06_b
2021-02-09 10:48:57 +01:00
Raphael Defosseux
09230ceb5e
CI: forgot to add 5G GNB FDD conf file for RF sim test
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Signed-off-by: Raphael Defosseux <raphael.defosseux@eurecom.fr >
2021-02-09 09:38:23 +01:00
Sakthivel Velumani
d29e09cdb1
Passing tx timestamp through pipeline
2021-02-08 23:59:33 +01:00
rmagueta
2b9d0f95c9
Fix develop merge conflicts in the RA-Msg3
2021-02-08 22:40:23 +00:00
Mahesh
2d58536c52
Phy simulators build error fixed
2021-02-09 02:11:54 +05:30
Sakthivel Velumani
f622bdedf4
Replacing tryPull by pull for L1 rx
2021-02-08 21:15:40 +01:00
rmagueta
5b7ae1228f
Fix develop merge conflicts
2021-02-08 19:18:00 +00:00
Sakthivel Velumani
ff05ec89f6
Slot tx compute in ru_thread
2021-02-08 18:23:41 +01:00
Thomas Schlichter
2db2112aee
Merge remote-tracking branch 'develop' into NR_FDD_FIX
2021-02-08 18:06:29 +01:00
rmagueta
03b52cec84
Merge remote-tracking branch 'origin/develop' into develop-SA-RA
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# Conflicts:
# openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c
# openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
# openair2/LAYER2/NR_MAC_UE/rar_tools_nrUE.c
# openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
# openair2/RRC/NR_UE/rrc_UE.c
2021-02-08 15:17:12 +00:00
Sakthivel Velumani
8902902706
Merge branch 'develop' into ue-fixes
2021-02-08 15:06:17 +01:00
Thomas Schlichter
adc24a797e
NR_UE: Add PRACH generation for 10 to 30 MHz (30 kHz SCS)
2021-02-08 14:21:30 +01:00
Thomas Schlichter
c5734aa110
NR_UE: slightly cleanup PRACH generation
2021-02-08 14:21:30 +01:00
Thomas Schlichter
92e654c6fc
gNB: Add PRACH reception support for 10 to 30 MHz (30 kHz SCS)
2021-02-08 14:21:30 +01:00
Thomas Schlichter
a676ccbb80
gNB: fix PRACH reception for some configurations and some cleanup
2021-02-08 14:21:30 +01:00
Thomas Schlichter
6e57abc7ae
NR_UE: consider sync position (1/8 CP) in initial sync and UL write timestamp
2021-02-08 14:21:30 +01:00
Thomas Schlichter
3eb2b4d7b2
Generalize some frame parameter calculations
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Enabling more numerology combinations and 100 MHz support with 3/4 sampling for USRP X300/X310, too.
2021-02-08 14:21:30 +01:00
Thomas Schlichter
3743ead91a
Merge remote-tracking branch 'develop' into NR_10MHz
2021-02-08 14:20:20 +01:00
Parminder Singh
222b37ff13
Merge remote-tracking branch 'origin/develop' into ptrs_rrc_config
2021-02-08 14:16:36 +01:00
Mahesh
0e6f1e6ad6
Merge conflicts resolved
2021-02-08 18:05:29 +05:30
Sakthivel Velumani
3380f1a455
send data from MAC to PHY when NDI toggles
2021-02-08 12:49:32 +01:00
Robert Schmidt
b86fdaf59b
Revert "Lower UE log level"
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This reverts commit 71e297de9d
2021-02-08 11:20:23 +01:00
Sakthivel Velumani
f4fd79c4d9
First commit
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Created 3 threadpools for L1 rx, L1 tx and RU tx processing
2021-02-08 01:06:30 +01:00
Robert Schmidt
9b77575af2
Use the MAX_BWP_SIZE macro everywhere
2021-02-07 10:45:57 +01:00
Robert Schmidt
318c4e0fd7
Skip DL HARQ feedbacks if the timing does not match
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As the precedent commit, this commit deals with the realtime problems
that we currently have on the CI bench.
For DL HARQ feedback, nFAPI does not give us the HARQ process ID.
Instead, we have to figure this out "from timing", i.e., if we trigger
PUCCH reception, we will get a message with HARQ if we instructed the
PHY to do so. If we have real-time problems, it seems (I cannot verify:
don't have real time problems) that we do not get the nFAPI message with
HARQ feedback. Thus, we need to skip the HARQ processes that should have
been processed in the past, which happens in this commit.
2021-02-07 10:45:57 +01:00
Robert Schmidt
f23890e0b9
Search correct UL HARQ, don't assert on late slot
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At the time of this commit, the CI has realtime issues. This can mean
that the HARQ result is delivered in a delayed fashion. Before this
commit, we were asserting on whether the slot corresponds to the HARQ
process's expected feedback slot, but a particular feedback might be
delayed under realtime issues, and we actually don't care about the
timing since we get the HARQ process ID.
Instead, we loop through the HARQ processes for which we wait for a
feedback in the beginning until we have the right process (which did not
seem to cause a problem till now, but who knows.
2021-02-07 10:45:57 +01:00
Robert Schmidt
423a0e4afe
Handle UL HARQ slot wrap around for slot = 0
2021-02-07 10:45:57 +01:00
Robert Schmidt
8bd3ec7602
Fix whitespace issues (review request)
2021-02-07 10:45:57 +01:00
Robert Schmidt
71fd526e12
Remove unused variables
2021-02-07 10:45:57 +01:00
Robert Schmidt
30d13ebf6d
Lower various log levels
2021-02-07 10:45:57 +01:00
Robert Schmidt
77203ee989
Fix nr_dlschsim unitary simulator
2021-02-07 10:45:57 +01:00
ChiehChun
a8cc08ace5
Cannot allocate CCE error -> debug message
2021-02-07 10:45:57 +01:00
ChiehChun
8a823d22cf
Better format dump_mac_stats()
2021-02-07 10:45:57 +01:00
ChiehChun
c51cb3f40b
Enable 2 UL slots
2021-02-07 10:45:57 +01:00
luis_pereira87