git-svn-id: http://svn.eurecom.fr/openair4G/trunk@5164 818b1a75-f10b-46b9-bf7c-635c3b92a50f
149 lines
7.0 KiB
C
Executable File
149 lines
7.0 KiB
C
Executable File
/*******************************************************************************
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Eurecom OpenAirInterface 2
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Copyright(c) 1999 - 2014 Eurecom
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information
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Openair Admin: openair_admin@eurecom.fr
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Openair Tech : openair_tech@eurecom.fr
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Forums : http://forums.eurecom.fsr/openairinterface
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Address : EURECOM,
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Campus SophiaTech,
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450 Route des Chappes,
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CS 50193
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06904 Biot Sophia Antipolis cedex,
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FRANCE
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*******************************************************************************/
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/*! \file rlc_def.h
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* \brief This file contains constants for RLC internal use.
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* \author GAUTHIER Lionel
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* \date 2010-2011
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* \version
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* \company Eurecom
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* \email: lionel.gauthier@eurecom.fr
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* \note
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* \bug
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* \warning
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*/
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#ifndef __RLC_DEF_H__
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# define __RLC_DEF_H__
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//----------------------------------------------------------
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// protocol states
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typedef enum rlc_protocol_state_e {
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RLC_NULL_STATE = 0x00,
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RLC_DATA_TRANSFER_READY_STATE = 0x01,
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RLC_RESET_PENDING_STATE = 0x12,
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RLC_RESET_AND_SUSPEND_STATE = 0x14,
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RLC_LOCAL_SUSPEND_STATE = 0x08
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} rlc_protocol_state_t;
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//----------------------------------------------------------
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enum RLC_OPERATION_MODE { TRANSMITTER_ONLY = 0x00,
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RECEIVER_ONLY = 0x01,
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TRANSMITTER_AND_RECEIVER = 0x02
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};
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#define JUMBO_FRAME 1
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#ifdef JUMBO_FRAME
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# define RLC_SDU_MAX_SIZE 9000
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# define RLC_SDU_MAX_SIZE_DATA_PLANE 9000
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# define RLC_MAX_FLEXIBLE_DATA_PDU_SIZE 8703
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#else
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//----------------------------------------------------------
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# define RLC_SDU_MAX_SIZE 1800
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# define RLC_SDU_MAX_SIZE_DATA_PLANE 1800
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# define RLC_MAX_FLEXIBLE_DATA_PDU_SIZE 1503
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#endif
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# define RLC_SDU_MAX_SIZE_CONTROL_PLANE 2000
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//----------------------------------------------------------
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// dimensions
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# define SN_12BITS_MASK 0x0FFF
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# define RLC_SN_OVERFLOW 0xFFFF
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//----------------------------------------------------------
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// DISCARD
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//----------------------------------------------------------
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enum RLC_SDU_DISCARD_MODE { SDU_DISCARD_MODE_RESET = 0x00,
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SDU_DISCARD_MODE_TIMER_BASED_EXPLICIT = 0x01,
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SDU_DISCARD_MODE_MAX_DAT_RETRANSMISSION = 0x04,
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SDU_DISCARD_MODE_NOT_CONFIGURED = 0x10
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};
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# define RLC_SDU_NO_DISCARD_MAX_DAT_RETRANSMISSION 0x00
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// AM (do not change this value)
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# define RLC_SDU_DISCARD_TIMER_BASED_EXPLICIT 0x01
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// AM (must>0)
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# define RLC_SDU_DISCARD_TIMER_BASED_NO_EXPLICIT 0x02
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// UM, TM (must>0)
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# define RLC_SDU_DISCARD_MAX_DAT_RETRANSMISSION 0x04
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// AM (must>0)
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# define RLC_SDU_DISCARD_NOT_CONFIGURED 0x10
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// UM, TM (must>0)
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//----------------------------------------------------------
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// DATA, CONTROL PDU parameters
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//----------------------------------------------------------
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// D/C field (values shifted 7 bits left)
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# define RLC_DC_CONTROL_PDU 0
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# define RLC_DC_DATA_PDU 128
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# define RLC_DC_MASK 128
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// HE field
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# define RLC_HE_SUCC_BYTE_CONTAINS_DATA 0x00 // v9.2 ok
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# define RLC_HE_SUCC_BYTE_CONTAINS_LI_E 0x01 // v9.2 ok
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# define RLC_HE_SUCC_BYTE_CONTAINS_DATA_END_PDU_IS_END_SDU 0x02 // v9.2 ok
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# define RLC_HE_MASK 0x03
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// Extension bit
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/* Section 9.2.2.5:
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The interpretation of this bit depends on RLC mode and higher layer configuration:
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- In the UMD PDU, the "Extension bit" in the first octet has either the normal
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E-bit interpretation or the alternative E-bit interpretation depending on
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higher layer configuration. The "Extension bit" in all the other octects always
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has the normal E-bit interpretation.
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- In the AMD PDU, the "Extension bit" always has the normal E-bit interpretation.*/
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# define RLC_E_NEXT_FIELD_IS_COMPLETE_SDU 0x00 // alternative E-bit interpretation v9.2 ok
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# define RLC_E_NEXT_FIELD_IS_DATA 0x00 // v9.2 ok
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# define RLC_E_NEXT_FIELD_IS_LI_E 0x01 // v9.2 ok
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# define RLC_E_MASK 0x01
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// li field (values shifted 1 bit left)
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# define RLC_LI_LAST_PDU_ONE_BYTE_SHORT 0xFFF6 // TO BE REMOVED ONLY FOR COMPILATION
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# define RLC_LI_LAST_PDU_EXACTLY_FILLED 0x0000 // v9.2 ok
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# define RLC_LI_1ST_BYTE_PDU_IS_1ST_BYTE_SDU_LAST_BYTE_IGNORED 0xFFF4 // v9.2 ok UM only
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# define RLC_LI_LAST_PDU_ONE_BYTE_SHORT_FILLED_BY_SDU 0xFFF6 // v9.2 ok
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# define RLC_LI_1ST_BYTE_SDU_IS_1ST_BYTE_PDU 0xFFF8 // v9.2 ok UM only
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# define RLC_LI_1ST_BYTE_SDU_IS_1ST_BYTE_PDU_LAST_BYTE_SDU_IS_LAST_BYTE_PDU 0xFFFA // v9.2 ok UM only
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# define RLC_LI_PDU_PIGGY_BACKED_STATUS 0xFFFC // v9.2 ok AM
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# define RLC_LI_PDU_NOT_FIRST_NOT_LAST_BYTE_SDU 0xFFFC // v9.2 ok UM only
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# define RLC_LI_PDU_PADDING 0xFFFE // v9.2 ok
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# define RLC_LI_UNDEFINED 0xF0F0
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# define RLC_LI_MASK 0xFFFE
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// piggybacked status PDU (values shifted 4 bits left)
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# define RLC_PIGGY_PDU_TYPE_STATUS 0x00
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# define RLC_PDU_TYPE_STATUS 0x00 // v9.2 ok
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# define RLC_PIGGY_PDU_TYPE_RESET 0x10
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# define RLC_PDU_TYPE_RESET 0x10 // v9.2 ok
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# define RLC_PIGGY_PDU_TYPE_RESET_ACK 0x20
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# define RLC_PDU_TYPE_RESET_ACK 0x20 // v9.2 ok
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# define RLC_PIGGY_PDU_TYPE_MASK 0x70
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# define RLC_PDU_TYPE_MASK 0x70 // v9.2 ok
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# define GUARD_CRC_LIH_SIZE 0x03
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// in bytes
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#endif
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