Testing on Neoverse N1 (Ampere 3GHz). Tested only on a subset of phy-simulators. - Changes: - use SIMDE consistently - adaptations of LDPC decoder generator for ARMv8 performance - SIMDe modifications of Intel CRC to allow for aarch64 build. optimizations for 128-bit to improve performance of LDPC encode/decode on aarch64 (Neoverse 1) - added BG2 files for 128-bit ldpc encoder (aarch64) - testing on Xeon - testing on x86 - minor changes to build/run on x86 - change in crc.h after returning to aarch64 - removed some warning in ldpc decoder generator for x86_64 - char - Delete irrelevant constants - Correctly declare variables - Define stdbool for all architectures - Remove definition of _MM_SHUFFLE and use SIMDE_MM_SHUFFLE - Remove commented code - Fix CMakeLists.txt - Include SIMDE avx2 functions in tools_defs.h
330 lines
14 KiB
C
330 lines
14 KiB
C
/*
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* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership.
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* The OpenAirInterface Software Alliance licenses this file to You under
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* the OAI Public License, Version 1.1 (the "License"); you may not use this file
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* except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.openairinterface.org/?page_id=698
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*-------------------------------------------------------------------------------
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* For more information about the OpenAirInterface (OAI) Software Alliance:
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* contact@openairinterface.org
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*/
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#include "PHY/defs_eNB.h"
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#include "PHY/sse_intrin.h"
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#include "PHY/LTE_ESTIMATION/lte_estimation.h"
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// This is 4096/(1:4096) in simde__m128i format
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simde__m128i inv_ch[4096];/* = {512,512,512,512,512,512,512,512,
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256,256,256,256,256,256,256,256,
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170,170,170,170,170,170,170,170,
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128,128,128,128,128,128,128,128,
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102,102,102,102,102,102,102,102,
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85,85,85,85,85,85,85,85,
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73,73,73,73,73,73,73,73,
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64,64,64,64,64,64,64,64,
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56,56,56,56,56,56,56,56,
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51,51,51,51,51,51,51,51,
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46,46,46,46,46,46,46,46,
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42,42,42,42,42,42,42,42,
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39,39,39,39,39,39,39,39,
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36,36,36,36,36,36,36,36,
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34,34,34,34,34,34,34,34,
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32,32,32,32,32,32,32,32,
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30,30,30,30,30,30,30,30,
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28,28,28,28,28,28,28,28,
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26,26,26,26,26,26,26,26,
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25,25,25,25,25,25,25,25,
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24,24,24,24,24,24,24,24,
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23,23,23,23,23,23,23,23,
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22,22,22,22,22,22,22,22,
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21,21,21,21,21,21,21,21,
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20,20,20,20,20,20,20,20,
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19,19,19,19,19,19,19,19,
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18,18,18,18,18,18,18,18,
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18,18,18,18,18,18,18,18,
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17,17,17,17,17,17,17,17,
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17,17,17,17,17,17,17,17,
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16,16,16,16,16,16,16,16,
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16,16,16,16,16,16,16,16,
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15,15,15,15,15,15,15,15,
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15,15,15,15,15,15,15,15,
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14,14,14,14,14,14,14,14,
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14,14,14,14,14,14,14,14,
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13,13,13,13,13,13,13,13,
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13,13,13,13,13,13,13,13,
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13,13,13,13,13,13,13,13,
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12,12,12,12,12,12,12,12,
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12,12,12,12,12,12,12,12,
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12,12,12,12,12,12,12,12,
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11,11,11,11,11,11,11,11,
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11,11,11,11,11,11,11,11,
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11,11,11,11,11,11,11,11,
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11,11,11,11,11,11,11,11,
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10,10,10,10,10,10,10,10,
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10,10,10,10,10,10,10,10,
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10,10,10,10,10,10,10,10,
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10,10,10,10,10,10,10,10,
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10,10,10,10,10,10,10,10,
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9,9,9,9,9,9,9,9,
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9,9,9,9,9,9,9,9,
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9,9,9,9,9,9,9,9,
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9,9,9,9,9,9,9,9,
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9,9,9,9,9,9,9,9,
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8,8,8,8,8,8,8,8,
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8,8,8,8,8,8,8,8,
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8,8,8,8,8,8,8,8,
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8,8,8,8,8,8,8,8,
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8,8,8,8,8,8,8,8,
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8,8,8,8,8,8,8,8,
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8,8,8,8,8,8,8,8,
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8,8,8,8,8,8,8,8,
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7,7,7,7,7,7,7,7,
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7,7,7,7,7,7,7,7,
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7,7,7,7,7,7,7,7,
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7,7,7,7,7,7,7,7,
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7,7,7,7,7,7,7,7,
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7,7,7,7,7,7,7,7,
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7,7,7,7,7,7,7,7,
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7,7,7,7,7,7,7,7,
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7,7,7,7,7,7,7,7,
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6,6,6,6,6,6,6,6,
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6,6,6,6,6,6,6,6,
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6,6,6,6,6,6,6,6,
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6,6,6,6,6,6,6,6,
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6,6,6,6,6,6,6,6,
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6,6,6,6,6,6,6,6,
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6,6,6,6,6,6,6,6,
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6,6,6,6,6,6,6,6,
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6,6,6,6,6,6,6,6,
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6,6,6,6,6,6,6,6,
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6,6,6,6,6,6,6,6,
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6,6,6,6,6,6,6,6,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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4,4,4,4,4,4,4,4,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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3,3,3,3,3,3,3,3,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,
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};*/
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void init_fde() {
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for (int i=1;i<4096;i++) inv_ch[i] = simde_mm_set1_epi16(4096/i);
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}
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void freq_equalization(LTE_DL_FRAME_PARMS *frame_parms,
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int32_t **rxdataF_comp,
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int32_t **ul_ch_mag,
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int32_t **ul_ch_magb,
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uint8_t symbol,
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uint16_t Msc_RS,
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uint8_t Qm)
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{
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uint16_t re;
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int16_t amp;
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simde__m128i *ul_ch_mag128,*ul_ch_magb128,*rxdataF_comp128;
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rxdataF_comp128 = (simde__m128i *)&rxdataF_comp[0][symbol*frame_parms->N_RB_DL*12];
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ul_ch_mag128 = (simde__m128i *)&ul_ch_mag[0][symbol*frame_parms->N_RB_DL*12];
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ul_ch_magb128 = (simde__m128i *)&ul_ch_magb[0][symbol*frame_parms->N_RB_DL*12];
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AssertFatal(symbol<frame_parms->symbols_per_tti,"symbol %d >= %d\n",
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symbol,frame_parms->symbols_per_tti);
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AssertFatal(Msc_RS<=frame_parms->N_RB_UL*12,"Msc_RS %d >= %d\n",
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Msc_RS,frame_parms->N_RB_UL*12);
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for (re=0; re<(Msc_RS>>2); re++) {
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amp=(*((int16_t*)&ul_ch_mag128[re]));
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if (amp>4095)
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amp=4095;
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// printf("freq_eq: symbol %d re %d => mag %d,amp %d,inv %d, prod %d
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// (%d,%d)\n",symbol,re,*((int16_t*)(&ul_ch_mag128[re])),amp,simde_mm_extract_epi16(inv_ch[amp],0),(*((int16_t*)(&ul_ch_mag128[re]))*_mm_extract_epi16(inv_ch[amp],0))>>3,*(int16_t*)&(rxdataF_comp128[re]),*(1+(int16_t*)&(rxdataF_comp128[re])));
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rxdataF_comp128[re] = simde_mm_srai_epi16(simde_mm_mullo_epi16(rxdataF_comp128[re],inv_ch[amp]),3);
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if (Qm==4)
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ul_ch_mag128[re] = simde_mm_set1_epi16(324); // this is 512*2/sqrt(10)
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else {
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ul_ch_mag128[re] = simde_mm_set1_epi16(316); // this is 512*4/sqrt(42)
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ul_ch_magb128[re] = simde_mm_set1_epi16(158); // this is 512*2/sqrt(42)
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}
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// printf("(%d,%d)\n",*(int16_t*)&(rxdataF_comp128[re]),*(1+(int16_t*)&(rxdataF_comp128[re])));
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}
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}
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