ghaddab
2d745fb0da
git-svn-id: http://svn.eurecom.fr/openair4G/trunk@5709 818b1a75-f10b-46b9-bf7c-635c3b92a50f
164 lines
8.1 KiB
C
Executable File
164 lines
8.1 KiB
C
Executable File
/*******************************************************************************
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OpenAirInterface
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Copyright(c) 1999 - 2014 Eurecom
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OpenAirInterface is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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OpenAirInterface is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with OpenAirInterface.The full GNU General Public License is
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included in this distribution in the file called "COPYING". If not,
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see <http://www.gnu.org/licenses/>.
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Contact Information
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OpenAirInterface Admin: openair_admin@eurecom.fr
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OpenAirInterface Tech : openair_tech@eurecom.fr
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OpenAirInterface Dev : openair4g-devel@eurecom.fr
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Address : Eurecom, Compus SophiaTech 450, route des chappes, 06451 Biot, France.
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*******************************************************************************/
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#ifndef OPENAIR_DEVICE_H
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#define OPENAIR_DEVICE_H
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#define XILINX_VENDOR 0x10ee
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#define XILINX_ID 0x0007
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#define GRLIB_VENDOR 0x16e3
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#define GRLIB_ID 0x0210
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#define openair_MAJOR 127
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//#define openair_writeb(val,port) pci_config_writel(); //{writeb((ucchar)(val),(ulong)(port)); mb();}
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//#define openair_writew(val,port) //{writew((ushort)(val),(ulong)(port)); mb();}
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#define openair_writel(dev,offset,val) pci_write_config_dword(dev,(int)offset,(unsigned int)val)//{writel((uclong)(val),(ulong)(port)); mb();}
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#define openair_readl(dev,offset,val) pci_read_config_dword(dev,(int)offset,(unsigned int*)val)//{writel((uclong)(val),(ulong)(port)); mb();}
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//#define openair_readb(port) readb(port)
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//#define openair_readw(port) readw(port)
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//#define openair_readl(port) readl(port)
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#define openair_IOC_MAGIC 'm'
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#define openair_TEST_FPGA _IOR(openair_IOC_MAGIC,1,int)
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#define openair_START_1ARY_CLUSTERHEAD _IOR(openair_IOC_MAGIC,2,int)
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#define openair_START_2ARY_CLUSTERHEAD _IOR(openair_IOC_MAGIC,3,int)
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#define openair_START_NODE _IOR(openair_IOC_MAGIC,4,int)
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#define openair_STOP _IOR(openair_IOC_MAGIC,5,int)
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#define openair_GET_BUFFER _IOR(openair_IOC_MAGIC,6,int)
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#define openair_GET_CONFIG _IOR(openair_IOC_MAGIC,7,int)
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#define openair_GET_VARS _IOR(openair_IOC_MAGIC,8,int)
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#define openair_SET_TX_GAIN _IOR(openair_IOC_MAGIC,9,int)
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#define openair_SET_RX_GAIN _IOR(openair_IOC_MAGIC,10,int)
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#define openair_SET_LO_FREQ _IOR(openair_IOC_MAGIC,11,int)
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#define openair_START_FS4_TEST _IOR(openair_IOC_MAGIC,12,int)
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#define openair_START_OFDM_TEST _IOR(openair_IOC_MAGIC,13,int)
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#define openair_START_QAM16_TEST _IOR(openair_IOC_MAGIC,14,int)
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#define openair_START_QPSK_TEST _IOR(openair_IOC_MAGIC,15,int)
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#define openair_START_IQ_IMPULSES_TEST _IOR(openair_IOC_MAGIC,16,int)
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#define openair_START_REAL_FS4_WITH_DC_TEST _IOR(openair_IOC_MAGIC,17,int)
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#define openair_DUMP_CONFIG _IOR(openair_IOC_MAGIC,18,int)
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#define openair_RX_RF_MODE _IOR(openair_IOC_MAGIC,19,int)
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#define openair_SET_TCXO_DAC _IOR(openair_IOC_MAGIC,20,int)
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#define openair_GET_PHASE_ESTIMATE _IOR(openair_IOC_MAGIC,21,int)
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#define openair_DO_SYNCH _IOR(openair_IOC_MAGIC,22,int)
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#define openair_GET_SIGNALS _IOR(openair_IOC_MAGIC,23,int)
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#define openair_SET_FFT_SCALE _IOR(openair_IOC_MAGIC,24,int)
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#define openair_FFT_TEST _IOR(openair_IOC_MAGIC,25,int)
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#define openair_START_CHANSOUNDER _IOR(openair_IOC_MAGIC,26,int)
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#define openair_SET_CALIBRATED_RX_GAIN _IOR(openair_IOC_MAGIC,27,int)
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#define openair_START_TX_SIG _IOR(openair_IOC_MAGIC,28,int)
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/* 5 new ioctls for control of new RF prototype chain (K. Khalfallah, March 2007) */
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/* Non posted ioctls (generate an Irq to Leon processor) */
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#define openair_NEWRF_ADF4108_WRITE_REG _IOR(openair_IOC_MAGIC,29,int)
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#define openair_NEWRF_ADF4108_INIT _IOR(openair_IOC_MAGIC,30,int)
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#define openair_NEWRF_LFSW190410_WRITE_KHZ _IOR(openair_IOC_MAGIC,31,int)
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#define openair_NEWRF_RF_SWITCH_CTRL _IOR(openair_IOC_MAGIC,32,int)
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#define openair_NEWRF_SETTX_SWITCH_GAIN _IOR(openair_IOC_MAGIC,33,int)
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#define openair_NEWRF_SETRX_SWITCH_GAIN _IOR(openair_IOC_MAGIC,34,int)
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/* Posted ioctls (DO NOT generate an Irq to Leon processor - so its firmware
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* should intentionally read back their parameter-values for the corresponding
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* action to complete). */
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#define openair_NEWRF_ADF4108_WRITE_REG_POSTED _IOR(openair_IOC_MAGIC,35,int)
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#define openair_NEWRF_LFSW190410_WRITE_KHZ_POSTED _IOR(openair_IOC_MAGIC,36,int)
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#define openair_NEWRF_RF_SWITCH_CTRL_POSTED _IOR(openair_IOC_MAGIC,37,int)
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#define openair_NEWRF_SETTX_SWITCH_GAIN_POSTED _IOR(openair_IOC_MAGIC,38,int)
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#define openair_NEWRF_SETRX_SWITCH_GAIN_POSTED _IOR(openair_IOC_MAGIC,39,int)
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#define openair_UPDATE_FIRMWARE _IOR(openair_IOC_MAGIC,40,int)
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// fkalten 25.9.07 this should enable the recording in multiuser mode
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#define openair_START_EMOS_NODEB _IOR(openair_IOC_MAGIC,41,int)
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#define openair_config_topology _IOR(openair_IOC_MAGIC,42,int)
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#define openair_stop_emulation _IOR(openair_IOC_MAGIC,43,int)
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// fkalten 11.4.08 set the timing advance
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#define openair_SET_TIMING_ADVANCE _IOR(openair_IOC_MAGIC,44,int)
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// rknopp 27.08.08 for AgileRF tests
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#define openair_START_TX_SIG_NO_OFFSET _IOR(openair_IOC_MAGIC,45,int)
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// fkalten+ghozzi 6.4.09 for cognitive operation
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#define openair_START_1ARY_CLUSTERHEAD_COGNITIVE _IOR(openair_IOC_MAGIC,46,int)
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//fkalten 22.4.09
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#define openair_SET_RX_MODE _IOR(openair_IOC_MAGIC,47,int)
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// fkalten 9.12.09
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#define openair_SET_FREQ_OFFSET _IOR(openair_IOC_MAGIC,48,int)
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#define openair_GET_BIGPHYSTOP _IOR(openair_IOC_MAGIC,49,int)
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#define openair_SET_UE_DL_MCS _IOR(openair_IOC_MAGIC,50,int)
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#define openair_SET_UE_UL_MCS _IOR(openair_IOC_MAGIC,51,int)
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#define openair_SET_UE_UL_NB_RB _IOR(openair_IOC_MAGIC,52,int)
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#define openair_SET_DLSCH_RATE_ADAPTATION _IOR(openair_IOC_MAGIC,53,int)
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#define openair_SET_DLSCH_TRANSMISSION_MODE _IOR(openair_IOC_MAGIC,54,int)
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#define openair_SET_ULSCH_ALLOCATION_MODE _IOR(openair_IOC_MAGIC,55,int)
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#define openair_SET_RRC_CONN_SETUP _IOR(openair_IOC_MAGIC,56,int)
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#define openair_SET_COOPERATION_FLAG _IOR(openair_IOC_MAGIC,57,int)
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#define openair_SET_RX_OFFSET _IOR(openair_IOC_MAGIC,58,int)
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#define openair_START_LXRT _IOR(openair_IOC_MAGIC,59,int)
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#define openair_GET_PCI_INTERFACE _IOR(openair_IOC_MAGIC,60,int)
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#define openair_MAXNR 60
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#define uclong unsigned int
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#define ucshort unsigned short
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#define ucchar unsigned char
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#define MMAP_SIZE
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/* ---------------------------------------------------------------------- */
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#define TEST_FAILURE_ADC_MEM -1000
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#define TEST_FAILURE_DAC_MEM -1001
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#define TEST_FAILURE_DMA -1002
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/* Behold: Added directly in (and only in!) R. Knopp's account
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(K. Khalfallah, May 10th, 2007) */
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#define GRPCI_IOCONFIG_CTRL0 0x60
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#define GRPCI_IOCONFIG_CTRL1 0x64
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#define GRPCI_IOCONFIG_CTRL2 0x68
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#define GRPCI_IOCONFIG_CTRL3 0x6c
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#define NO_INFINITE_ACK_LOOP (~0)
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/* Update firmware commands */
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#define UPDATE_FIRMWARE_TRANSFER_BLOCK 0x1
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#define UPDATE_FIRMWARE_CLEAR_BSS 0x2
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#define UPDATE_FIRMWARE_START_EXECUTION 0x3
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#define UPDATE_FIRMWARE_FORCE_REBOOT 0x4
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#define UPDATE_FIRMWARE_TEST_GOK 0x5
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#endif /* OPENAIR_DEVICE_H */
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