243 lines
10 KiB
C
243 lines
10 KiB
C
/*
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* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership.
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* The OpenAirInterface Software Alliance licenses this file to You under
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* the OAI Public License, Version 1.1 (the "License"); you may not use this file
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* except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.openairinterface.org/?page_id=698
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*-------------------------------------------------------------------------------
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* For more information about the OpenAirInterface (OAI) Software Alliance:
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* contact@openairinterface.org
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*/
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/*! \file PHY/NR_TRANSPORT/nr_dci.c
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* \brief Implements DCI encoding and PDCCH TX procedures (38.212/38.213/38.214). V15.4.0 2019-01.
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* \author Guy De Souza
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* \date 2018
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* \version 0.1
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* \company Eurecom
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* \email: desouza@eurecom.fr
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* \note
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* \warning
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*/
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#include "nr_dci.h"
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#include "nr_dlsch.h"
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#include "nr_sch_dmrs.h"
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#include "PHY/MODULATION/nr_modulation.h"
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#include "common/utils/nr/nr_common.h"
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#include "SCHED_NR/sched_nr.h"
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//#define DEBUG_PDCCH_DMRS
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//#define DEBUG_DCI
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//#define DEBUG_CHANNEL_CODING
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static void nr_pdcch_scrambling(uint32_t *in, uint32_t size, uint32_t Nid, uint32_t scrambling_RNTI, uint32_t *out)
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{
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int roundedSz = ((size + 31) / 32);
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uint32_t *seq = gold_cache((scrambling_RNTI << 16) + Nid, roundedSz);
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LOG_D(NR_PHY_DCI, "PDCCH scrambling_RNTI %x \n", scrambling_RNTI);
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for (int i = 0; i < roundedSz; i++)
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out[i] = in[i] ^ seq[i];
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}
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void nr_generate_dci(PHY_VARS_gNB *gNB,
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const nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
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int txdataF_offset,
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NR_DL_FRAME_PARMS *frame_parms,
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int slot)
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{
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// fill reg list per symbol
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int reg_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL * NR_NB_REG_PER_CCE];
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nr_fill_reg_list(reg_list, pdcch_pdu_rel15);
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// compute rb_offset and n_prb based on frequency allocation
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int n_rb, cset_start;
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get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource, &n_rb, &cset_start);
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int additional_offset = 0;
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// first common RB of the first group of 6 PRBs has common RB index equal to 6 * ⌈BWP_start / 6⌉
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if (pdcch_pdu_rel15->CoreSetType == 1)
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additional_offset = (pdcch_pdu_rel15->BWPStart + 5) / 6 * 6 - pdcch_pdu_rel15->BWPStart;
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int rb_offset = cset_start + additional_offset;
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uint16_t cset_start_sc = frame_parms->first_carrier_offset + (pdcch_pdu_rel15->BWPStart + rb_offset) * NR_NB_SC_PER_RB;
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int idx1 = pdcch_pdu_rel15->StartSymbolIndex+pdcch_pdu_rel15->DurationSymbols;
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int idx2 = (((n_rb + rb_offset + pdcch_pdu_rel15->BWPStart) * 3) + 15) & ~15;
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c16_t mod_dmrs[idx1][idx2] __attribute__((aligned(16)));
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for (int d = 0; d < pdcch_pdu_rel15->numDlDci; d++) {
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/*The coreset is initialised
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* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0
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* or the rb_offset for other coresets
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* in time: by its first slot and its first symbol*/
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const nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[d];
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uint32_t cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
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uint32_t cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
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int dci_idx = 0;
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// multi-beam number (for concurrent beams)
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int bitmap = SL_to_bitmap(cset_start_symb, pdcch_pdu_rel15->DurationSymbols);
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int beam_nb = beam_index_allocation(gNB->enable_analog_das,
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dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx,
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&gNB->common_vars,
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slot,
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frame_parms->symbols_per_slot,
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bitmap);
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LOG_D(NR_PHY_DCI, "pdcch: Coreset rb_offset %d, nb_rb %d BWP Start %d\n", rb_offset, n_rb, pdcch_pdu_rel15->BWPStart);
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LOG_D(NR_PHY_DCI,
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"pdcch: Coreset starting subcarrier %d on symbol %d (%d symbols)\n",
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cset_start_sc,
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cset_start_symb,
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cset_nsymb);
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// DMRS length is per OFDM symbol
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uint32_t dmrs_length = (n_rb+pdcch_pdu_rel15->BWPStart)*6; //2(QPSK)*3(per RB)*6(REG per CCE)
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uint32_t encoded_length = dci_pdu->AggregationLevel*108; //2(QPSK)*9(per RB)*6(REG per CCE)
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if (dci_pdu->RNTI != 0xFFFF)
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LOG_D(NR_PHY_DCI,
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"DL_DCI : rb_offset %d, nb_rb %d, DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d, "
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"reg_mapping %d), Scrambling_Id %d, ScramblingRNTI %x, PayloadSizeBits %d AggregationLevel %d\n",
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rb_offset,
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n_rb,
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dmrs_length,
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encoded_length,
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pdcch_pdu_rel15->precoderGranularity,
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pdcch_pdu_rel15->CceRegMappingType,
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dci_pdu->ScramblingId,
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dci_pdu->ScramblingRNTI,
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dci_pdu->PayloadSizeBits,
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dci_pdu->AggregationLevel);
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dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
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/// DMRS QPSK modulation
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for (int symb = cset_start_symb; symb < cset_start_symb + pdcch_pdu_rel15->DurationSymbols; symb++) {
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const uint32_t *gold = nr_gold_pdcch(frame_parms->N_RB_DL, frame_parms->symbols_per_slot, dci_pdu->ScramblingId, slot, symb);
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nr_modulation(gold, dmrs_length, DMRS_MOD_ORDER, (int16_t *)mod_dmrs[symb]); // Qm = 2 as DMRS is QPSK modulated
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#ifdef DEBUG_PDCCH_DMRS
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if(dci_pdu->RNTI!=0xFFFF) {
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for (int i=0; i<dmrs_length>>1; i++)
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printf("symb %d i %d %p gold seq 0x%08x mod_dmrs %d %d\n",
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symb,
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i,
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&gold_pdcch_dmrs[symb][i >> 5],
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gold_pdcch_dmrs[symb][i >> 5],
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mod_dmrs[symb][i].r,
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mod_dmrs[symb][i].i);
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}
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#endif
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}
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/// DCI payload processing
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// CRC attachment + Scrambling + Channel coding + Rate matching
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uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
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uint16_t n_RNTI = dci_pdu->RNTI;
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uint16_t Nid = dci_pdu->ScramblingId;
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uint16_t scrambling_RNTI = dci_pdu->ScramblingRNTI;
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polar_encoder_fast((uint64_t*)dci_pdu->Payload, (void*)encoder_output, n_RNTI, 1,
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NR_POLAR_DCI_MESSAGE_TYPE, dci_pdu->PayloadSizeBits, dci_pdu->AggregationLevel);
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#ifdef DEBUG_CHANNEL_CODING
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//debug dump dci
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printf("polar rnti %x,length %d, L %d\n",n_RNTI, dci_pdu->PayloadSizeBits,pdcch_pdu_rel15->dci_pdu->AggregationLevel);
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printf("DCI PDU: [0]->0x%lx \t [1]->0x%lx\n",
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((uint64_t*)dci_pdu->Payload)[0], ((uint64_t*)dci_pdu->Payload)[1]);
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printf("Encoded Payload (length:%u dwords):\n", encoded_length>>5);
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for (int i=0; i<encoded_length>>5; i++)
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printf("[%d]->0x%08x \t", i,encoder_output[i]);
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printf("\n");
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#endif
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/// Scrambling
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uint32_t scrambled_output[NR_MAX_DCI_SIZE_DWORD]= {0};
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nr_pdcch_scrambling(encoder_output, encoded_length, Nid, scrambling_RNTI, scrambled_output);
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#ifdef DEBUG_CHANNEL_CODING
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printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\t [4]->0x%08x\t [5]->0x%08x\t \
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[6]->0x%08x \t [7]->0x%08x \t [8]->0x%08x \t [9]->0x%08x\t [10]->0x%08x\t [11]->0x%08x\n",
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scrambled_output[0], scrambled_output[1], scrambled_output[2], scrambled_output[3], scrambled_output[4],scrambled_output[5],
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scrambled_output[6], scrambled_output[7], scrambled_output[8], scrambled_output[9], scrambled_output[10],scrambled_output[11] );
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#endif
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/// QPSK modulation
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c16_t mod_dci[NR_MAX_DCI_SIZE / 2] __attribute__((aligned(16)));
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nr_modulation(scrambled_output, encoded_length, DMRS_MOD_ORDER, (int16_t *)mod_dci); // Qm = 2 as DMRS is QPSK modulated
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#ifdef DEBUG_DCI
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for (int i=0; i<encoded_length>>1; i++)
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printf("i %d mod_dci %d %d\n", i, mod_dci[i].r, mod_dci[i].i);
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#endif
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/// Resource mapping
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uint16_t amp = gNB->TX_AMP;
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c16_t *txdataF = gNB->common_vars.txdataF[beam_nb][0] + txdataF_offset;
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if (cset_start_sc >= frame_parms->ofdm_symbol_size)
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cset_start_sc -= frame_parms->ofdm_symbol_size;
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int num_regs = dci_pdu->AggregationLevel * NR_NB_REG_PER_CCE / pdcch_pdu_rel15->DurationSymbols;
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/*Mapping the encoded DCI along with the DMRS */
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for(int symbol_idx = 0; symbol_idx < pdcch_pdu_rel15->DurationSymbols; symbol_idx++) {
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// allocating rbs per symbol
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for (int reg_count = 0; reg_count < num_regs; reg_count++) {
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int k = cset_start_sc + reg_list[d][reg_count] * NR_NB_SC_PER_RB;
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LOG_D(NR_PHY_DCI, "REG %d k %d\n", reg_list[d][reg_count], k);
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if (k >= frame_parms->ofdm_symbol_size)
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k -= frame_parms->ofdm_symbol_size;
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int l = cset_start_symb + symbol_idx;
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// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
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int dmrs_idx;
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if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
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dmrs_idx = (reg_list[d][reg_count] + pdcch_pdu_rel15->BWPStart + rb_offset) * 3;
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else
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dmrs_idx = (reg_list[d][reg_count] + rb_offset) * 3;
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int k_prime = 0;
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for (int m = 0; m < NR_NB_SC_PER_RB; m++) {
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if (m == (k_prime << 2) + 1) { // DMRS if not already mapped
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txdataF[l * frame_parms->ofdm_symbol_size + k] = c16mulRealShift(mod_dmrs[l][dmrs_idx], amp, 15);
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#ifdef DEBUG_PDCCH_DMRS
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LOG_I(NR_PHY_DCI,
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"PDCCH DMRS %d: l %d position %d => (%d,%d)\n",
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dmrs_idx,
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l,
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k,
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txdataF[l * frame_parms->ofdm_symbol_size + k].r,
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txdataF[l * frame_parms->ofdm_symbol_size + k].i);
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#endif
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dmrs_idx++;
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k_prime++;
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} else { // DCI payload
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txdataF[l * frame_parms->ofdm_symbol_size + k] = c16mulRealShift(mod_dci[dci_idx], amp, 15);
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dci_idx++;
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}
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k++;
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if (k >= frame_parms->ofdm_symbol_size)
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k -= frame_parms->ofdm_symbol_size;
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} // m
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} // reg_count
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} // symbol_idx
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LOG_D(NR_PHY_DCI,
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"DCI: payloadSize = %d | payload = %llx\n",
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dci_pdu->PayloadSizeBits,
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*(unsigned long long *)dci_pdu->Payload);
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} // for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++)
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}
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