142 lines
5.2 KiB
C
142 lines
5.2 KiB
C
/*
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* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership.
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* The OpenAirInterface Software Alliance licenses this file to You under
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* the OAI Public License, Version 1.1 (the "License"); you may not use this file
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* except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.openairinterface.org/?page_id=698
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*-------------------------------------------------------------------------------
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* For more information about the OpenAirInterface (OAI) Software Alliance:
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* contact@openairinterface.org
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*/
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/***********************************************************************
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*
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* FILENAME : phy_frame_configuration_nr_ue.c
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*
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* DESCRIPTION : functions related to FDD/TDD configuration for NR
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* see TS 38.213 11.1 Slot configuration
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* and TS 38.331 for RRC configuration
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*
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************************************************************************/
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#include "PHY/defs_nr_UE.h"
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/*******************************************************************
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*
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* NAME : nr_ue_slot_select
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*
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* DESCRIPTION : function for the UE equivalent to nr_slot_select
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*
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*********************************************************************/
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int nr_ue_slot_select(const fapi_nr_config_request_t *cfg, int nr_slot)
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{
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if (cfg->cell_config.frame_duplex_type == FDD)
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return NR_UPLINK_SLOT | NR_DOWNLINK_SLOT;
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int period = cfg->tdd_table_1.tdd_period_in_slots +
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(cfg->tdd_table_2 ? cfg->tdd_table_2->tdd_period_in_slots : 0);
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int rel_slot = nr_slot % period;
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const fapi_nr_tdd_table_t *tdd_table = &cfg->tdd_table_1;
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if (cfg->tdd_table_2 && rel_slot >= tdd_table->tdd_period_in_slots) {
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rel_slot -= tdd_table->tdd_period_in_slots;
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tdd_table = cfg->tdd_table_2;
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}
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if (tdd_table->max_tdd_periodicity_list == NULL) // this happens before receiving TDD configuration
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return NR_DOWNLINK_SLOT;
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const fapi_nr_max_tdd_periodicity_t *current_slot = &tdd_table->max_tdd_periodicity_list[rel_slot];
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// if the 1st symbol is UL the whole slot is UL
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if (current_slot->max_num_of_symbol_per_slot_list[0].slot_config == 1)
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return NR_UPLINK_SLOT;
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// if the 1st symbol is flexible the whole slot is mixed
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if (current_slot->max_num_of_symbol_per_slot_list[0].slot_config == 2)
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return NR_MIXED_SLOT;
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for (int i = 1; i < NR_NUMBER_OF_SYMBOLS_PER_SLOT; i++) {
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// if the 1st symbol is DL and any other is not, the slot is mixed
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if (current_slot->max_num_of_symbol_per_slot_list[i].slot_config != 0) {
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return NR_MIXED_SLOT;
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}
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}
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// if here, all the symbols where DL
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return NR_DOWNLINK_SLOT;
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}
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/*
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* This function determines if the mixed slot is a Sidelink slot
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*/
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uint8_t sl_determine_if_sidelink_slot(uint8_t sl_startsym, uint8_t sl_lensym, uint8_t num_ulsym)
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{
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uint8_t ul_startsym = NR_NUMBER_OF_SYMBOLS_PER_SLOT - num_ulsym;
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if ((sl_startsym >= ul_startsym) && (sl_lensym <= NR_NUMBER_OF_SYMBOLS_PER_SLOT)) {
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LOG_D(MAC,
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"MIXED SLOT is a SIDELINK SLOT. Sidelink Symbols: %d-%d, Uplink Symbols: %d-%d\n",
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sl_startsym,
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sl_lensym - 1,
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ul_startsym,
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ul_startsym + num_ulsym - 1);
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return NR_SIDELINK_SLOT;
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} else {
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LOG_D(MAC,
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"MIXED SLOT is NOT SIDELINK SLOT. Sidelink Symbols: %d-%d, Uplink Symbols: %d-%d\n",
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sl_startsym,
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sl_lensym - 1,
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ul_startsym,
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ul_startsym + num_ulsym - 1);
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return 0;
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}
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}
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/*
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* This function determines if the Slot is a SIDELINK SLOT
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* Every Uplink Slot is a Sidelink slot
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* Mixed Slot is a sidelink slot if the uplink symbols in Mixed slot
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* overlaps with Sidelink start symbol and number of symbols.
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*/
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int sl_nr_ue_slot_select(const sl_nr_phy_config_request_t *cfg, int slot, uint8_t frame_duplex_type)
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{
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int ul_sym = 0, slot_type = 0;
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// All PC5 bands are TDD bands , hence handling only TDD in this function.
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AssertFatal(frame_duplex_type == TDD, "No Sidelink operation defined for FDD in 3GPP rel16\n");
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if (cfg->tdd_table.max_tdd_periodicity_list == NULL) { // this happens before receiving TDD configuration
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return slot_type;
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}
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int period = cfg->tdd_table.tdd_period_in_slots;
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int rel_slot = slot % period;
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const fapi_nr_tdd_table_t *tdd_table = &cfg->tdd_table;
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const fapi_nr_max_tdd_periodicity_t *current_slot = &tdd_table->max_tdd_periodicity_list[rel_slot];
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for (int symbol_count = 0; symbol_count < NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
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if (current_slot->max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
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ul_sym++;
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}
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}
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if (ul_sym == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
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slot_type = NR_SIDELINK_SLOT;
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} else if (ul_sym) {
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slot_type = sl_determine_if_sidelink_slot(cfg->sl_bwp_config.sl_start_symbol, cfg->sl_bwp_config.sl_num_symbols, ul_sym);
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}
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return slot_type;
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} |