861 lines
35 KiB
C
861 lines
35 KiB
C
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/*
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* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership.
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* The OpenAirInterface Software Alliance licenses this file to You under
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* the OAI Public License, Version 1.1 (the "License"); you may not use this file
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* except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.openairinterface.org/?page_id=698
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*-------------------------------------------------------------------------------
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* For more information about the OpenAirInterface (OAI) Software Alliance:
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* contact@openairinterface.org
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*/
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/*!\file nrLDPC_cnProc_avx512.h
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* \brief Defines the functions for check node processing
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* \author Sebastian Wagner (TCL Communications) Email: <mailto:sebastian.wagner@tcl.com>
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* \date 30-09-2021
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* \version 1.0
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* \note
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* \warning
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*/
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#ifndef __NR_LDPC_CNPROC__H__
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#define __NR_LDPC_CNPROC__H__
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#include <simde/x86/avx512.h>
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#define conditional_negate(a, b, z) simde_mm512_mask_sub_epi8(a, simde_mm512_movepi8_mask(b), z, a)
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static inline void nrLDPC_cnProc_BG2_AVX512(t_nrLDPC_lut* p_lut, int8_t* cnProcBuf, int8_t* cnProcBufRes, uint16_t Z)
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{
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const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups;
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const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups;
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simde__m512i* p_cnProcBuf;
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simde__m512i* p_cnProcBufRes;
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// Number of CNs in Groups
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uint32_t M;
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uint32_t i;
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uint32_t j;
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uint32_t k;
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// Offset to each bit within a group in terms of 32 Byte
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uint32_t bitOffsetInGroup;
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simde__m512i zmm0, min, sgn, zeros;
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zeros = simde_mm512_setzero_si512();
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// maxLLR =simde_mm512_set1_epi8((char)127);
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simde__m512i* p_cnProcBufResBit;
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const simde__m512i* p_ones = (simde__m512i*)ones512_epi8;
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const simde__m512i* p_maxLLR = (simde__m512i*)maxLLR512_epi8;
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// LUT with offsets for bits that need to be processed
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// 1. bit proc requires LLRs of 2. and 3. bit, 2.bits of 1. and 3. etc.
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// Offsets are in units of bitOffsetInGroup
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const uint8_t lut_idxCnProcG3[3][2] = {{72,144}, {0,144}, {0,72}};
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// =====================================================================
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// Process group with 3 BNs
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if (lut_numCnInCnGroups[0] > 0)
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{
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// Number of groups of 32 CNs for parallel processing
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// Ceil for values not divisible by 32
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M = (lut_numCnInCnGroups[0]*Z + 63)>>6;
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// Set the offset to each bit within a group in terms of 32 Byte
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bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[0]*NR_LDPC_ZMAX)>>6;
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// Set pointers to start of group 3
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p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[0]];
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p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[0]];
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// Loop over every BN
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for (j=0; j<3; j++)
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{
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// Set of results pointer to correct BN address
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p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
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simde__m512i* pj0 = &p_cnProcBuf[(lut_idxCnProcG3[j][0] / 2)];
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simde__m512i* pj1 = &p_cnProcBuf[(lut_idxCnProcG3[j][1] / 2)];
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// Loop over CNs
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for (i=0; i<M; i++)
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{
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// Abs and sign of 32 CNs (first BN)
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// zmm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
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zmm0 = pj0[i];
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sgn = simde_mm512_xor_si512(*p_ones, zmm0);
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min = simde_mm512_abs_epi8(zmm0);
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// 32 CNs of second BN
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// zmm0 = p_cnProcBuf[(lut_idxCnProcG3[j][1]/2) + i];
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zmm0 = pj1[i];
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min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
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sgn = simde_mm512_xor_si512(sgn, zmm0);
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// Store result
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min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
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*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
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p_cnProcBufResBit++;
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// p_cnProcBufResBit[i]=simde_mm512_sign_epi8(min, sgn);
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}
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}
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}
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// =====================================================================
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// Process group with 4 BNs
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// Offset is 20*384/32 = 240
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const uint16_t lut_idxCnProcG4[4][3] = {{240,480,720}, {0,480,720}, {0,240,720}, {0,240,480}};
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if (lut_numCnInCnGroups[1] > 0)
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{
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// Number of groups of 32 CNs for parallel processing
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// Ceil for values not divisible by 32
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M = (lut_numCnInCnGroups[1]*Z + 63)>>6;
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// Set the offset to each bit within a group in terms of 32 Byte
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bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[1]*NR_LDPC_ZMAX)>>6;
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// Set pointers to start of group 4
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p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[1]];
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p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[1]];
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// Loop over every BN
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for (j=0; j<4; j++)
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{
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// Set of results pointer to correct BN address
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p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
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// Loop over CNs
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for (i=0; i<M; i++)
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{
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// Abs and sign of 32 CNs (first BN)
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zmm0 = p_cnProcBuf[(lut_idxCnProcG4[j][0]/2) + i];
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sgn = simde_mm512_xor_si512(*p_ones, zmm0);
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min = simde_mm512_abs_epi8(zmm0);
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// Loop over BNs
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for (k=1; k<3; k++)
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{
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zmm0 = p_cnProcBuf[(lut_idxCnProcG4[j][k]/2) + i];
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min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
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sgn = simde_mm512_xor_si512(sgn, zmm0);
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}
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// Store result
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min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
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*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
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p_cnProcBufResBit++;
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}
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}
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}
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// =====================================================================
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// Process group with 5 BNs
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// Offset is 9*384/32 = 108
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const uint16_t lut_idxCnProcG5[5][4] = {{108,216,324,432}, {0,216,324,432},
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{0,108,324,432}, {0,108,216,432}, {0,108,216,324}};
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if (lut_numCnInCnGroups[2] > 0)
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{
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// Number of groups of 32 CNs for parallel processing
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// Ceil for values not divisible by 32
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M = (lut_numCnInCnGroups[2]*Z + 63)>>6;
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// Set the offset to each bit within a group in terms of 32 Byte
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bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[2]*NR_LDPC_ZMAX)>>6;
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// Set pointers to start of group 5
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p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[2]];
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p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[2]];
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// Loop over every BN
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for (j=0; j<5; j++)
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{
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// Set of results pointer to correct BN address
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p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
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// Loop over CNs
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for (i=0; i<M; i++)
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{
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// Abs and sign of 32 CNs (first BN)
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zmm0 = p_cnProcBuf[(lut_idxCnProcG5[j][0]/2) + i];
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sgn = simde_mm512_xor_si512(*p_ones, zmm0);
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min = simde_mm512_abs_epi8(zmm0);
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// Loop over BNs
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for (k=1; k<4; k++)
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{
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zmm0 = p_cnProcBuf[(lut_idxCnProcG5[j][k]/2) + i];
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min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
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sgn = simde_mm512_xor_si512(sgn, zmm0);
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}
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// Store result
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min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
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*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
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p_cnProcBufResBit++;
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}
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}
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}
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// =====================================================================
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// Process group with 6 BNs
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// Offset is 3*384/32 = 36
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const uint16_t lut_idxCnProcG6[6][5] = {{36,72,108,144,180}, {0,72,108,144,180},
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{0,36,108,144,180}, {0,36,72,144,180},
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{0,36,72,108,180}, {0,36,72,108,144}};
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if (lut_numCnInCnGroups[3] > 0)
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{
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// Number of groups of 32 CNs for parallel processing
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// Ceil for values not divisible by 32
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M = (lut_numCnInCnGroups[3]*Z + 63)>>6;
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// Set the offset to each bit within a group in terms of 32 Byte
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bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[3]*NR_LDPC_ZMAX)>>6;
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// Set pointers to start of group 6
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p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[3]];
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p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[3]];
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// Loop over every BN
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for (j=0; j<6; j++)
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{
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// Set of results pointer to correct BN address
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p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
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// Loop over CNs
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for (i=0; i<M; i++)
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{
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// Abs and sign of 32 CNs (first BN)
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zmm0 = p_cnProcBuf[(lut_idxCnProcG6[j][0]/2) + i];
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sgn = simde_mm512_xor_si512(*p_ones, zmm0);
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min = simde_mm512_abs_epi8(zmm0);
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// Loop over BNs
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for (k=1; k<5; k++)
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{
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zmm0 = p_cnProcBuf[(lut_idxCnProcG6[j][k]/2) + i];
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min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
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sgn = simde_mm512_xor_si512(sgn, zmm0);
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}
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// Store result
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min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
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*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
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p_cnProcBufResBit++;
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}
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}
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}
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// =====================================================================
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// Process group with 8 BNs
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// Offset is 2*384/32 = 24
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const uint8_t lut_idxCnProcG8[8][7] = {{24,48,72,96,120,144,168}, {0,48,72,96,120,144,168},
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{0,24,72,96,120,144,168}, {0,24,48,96,120,144,168},
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{0,24,48,72,120,144,168}, {0,24,48,72,96,144,168},
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{0,24,48,72,96,120,168}, {0,24,48,72,96,120,144}};
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if (lut_numCnInCnGroups[4] > 0)
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{
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// Number of groups of 32 CNs for parallel processing
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// Ceil for values not divisible by 32
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M = (lut_numCnInCnGroups[4]*Z + 63)>>6;
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// Set the offset to each bit within a group in terms of 32 Byte
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bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[4]*NR_LDPC_ZMAX)>>6;
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// Set pointers to start of group 8
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p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[4]];
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p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[4]];
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// Loop over every BN
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for (j=0; j<8; j++)
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{
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// Set of results pointer to correct BN address
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p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
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// Loop over CNs
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for (i=0; i<M; i++)
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{
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// Abs and sign of 32 CNs (first BN)
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zmm0 = p_cnProcBuf[(lut_idxCnProcG8[j][0]/2) + i];
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sgn = simde_mm512_xor_si512(*p_ones, zmm0);
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min = simde_mm512_abs_epi8(zmm0);
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// Loop over BNs
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for (k=1; k<7; k++)
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{
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zmm0 = p_cnProcBuf[(lut_idxCnProcG8[j][k]/2) + i];
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min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
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sgn = simde_mm512_xor_si512(sgn, zmm0);
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}
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// Store result
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min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
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*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
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p_cnProcBufResBit++;
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}
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}
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}
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// =====================================================================
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// Process group with 10 BNs
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// Offset is 2*384/32 = 24
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const uint8_t lut_idxCnProcG10[10][9] = {{24,48,72,96,120,144,168,192,216}, {0,48,72,96,120,144,168,192,216},
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{0,24,72,96,120,144,168,192,216}, {0,24,48,96,120,144,168,192,216},
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{0,24,48,72,120,144,168,192,216}, {0,24,48,72,96,144,168,192,216},
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{0,24,48,72,96,120,168,192,216}, {0,24,48,72,96,120,144,192,216},
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{0,24,48,72,96,120,144,168,216}, {0,24,48,72,96,120,144,168,192}};
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if (lut_numCnInCnGroups[5] > 0)
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{
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// Number of groups of 32 CNs for parallel processing
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// Ceil for values not divisible by 32
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M = (lut_numCnInCnGroups[5]*Z + 63)>>6;
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// Set the offset to each bit within a group in terms of 32 Byte
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bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[5]*NR_LDPC_ZMAX)>>6;
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// Set pointers to start of group 10
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p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[5]];
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p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[5]];
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// Loop over every BN
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for (j=0; j<10; j++)
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{
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// Set of results pointer to correct BN address
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p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
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// Loop over CNs
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for (i=0; i<M; i++)
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{
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// Abs and sign of 32 CNs (first BN)
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zmm0 = p_cnProcBuf[(lut_idxCnProcG10[j][0]/2) + i];
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sgn = simde_mm512_xor_si512(*p_ones, zmm0);
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min = simde_mm512_abs_epi8(zmm0);
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// Loop over BNs
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for (k=1; k<9; k++)
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{
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zmm0 = p_cnProcBuf[(lut_idxCnProcG10[j][k]/2) + i];
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min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
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sgn = simde_mm512_xor_si512(sgn, zmm0);
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}
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// Store result
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min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
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*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
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p_cnProcBufResBit++;
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}
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}
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}
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}
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static inline void nrLDPC_cnProc_BG1_AVX512(t_nrLDPC_lut* p_lut, t_nrLDPC_procBuf* p_procBuf, uint16_t Z)
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{
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const uint8_t* lut_numCnInCnGroups = p_lut->numCnInCnGroups;
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const uint32_t* lut_startAddrCnGroups = p_lut->startAddrCnGroups;
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int8_t* cnProcBuf = p_procBuf->cnProcBuf;
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int8_t* cnProcBufRes = p_procBuf->cnProcBufRes;
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simde__m512i* p_cnProcBuf;
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simde__m512i* p_cnProcBufRes;
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// Number of CNs in Groups
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uint32_t M;
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uint32_t i;
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uint32_t j;
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uint32_t k;
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// Offset to each bit within a group in terms of 32 Byte
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uint32_t bitOffsetInGroup;
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simde__m512i zmm0, min, sgn, zeros;
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zeros = simde_mm512_setzero_si512();
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// maxLLR =simde_mm512_set1_epi8((char)127);
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simde__m512i* p_cnProcBufResBit;
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const simde__m512i* p_ones = (simde__m512i*)ones512_epi8;
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const simde__m512i* p_maxLLR = (simde__m512i*)maxLLR512_epi8;
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// LUT with offsets for bits that need to be processed
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// 1. bit proc requires LLRs of 2. and 3. bit, 2.bits of 1. and 3. etc.
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// Offsets are in units of bitOffsetInGroup (1*384/32)
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const uint8_t lut_idxCnProcG3[3][2] = {{12,24}, {0,24}, {0,12}};
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// =====================================================================
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// Process group with 3 BNs
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if (lut_numCnInCnGroups[0] > 0)
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{
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// Number of groups of 32 CNs for parallel processing
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// Ceil for values not divisible by 32
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M = (lut_numCnInCnGroups[0]*Z + 63)>>6;
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// Set the offset to each bit within a group in terms of 32 Byte
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bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[0]*NR_LDPC_ZMAX)>>6;
|
|
|
|
// Set pointers to start of group 3
|
|
p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[0]];
|
|
p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[0]];
|
|
|
|
// Loop over every BN
|
|
for (j=0; j<3; j++)
|
|
{
|
|
// Set of results pointer to correct BN address
|
|
p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
|
|
|
|
// Loop over CNs
|
|
for (i=0; i<M; i++)
|
|
{
|
|
// Abs and sign of 32 CNs (first BN)
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG3[j][0]/2) + i];
|
|
sgn = simde_mm512_xor_si512(*p_ones, zmm0);
|
|
min = simde_mm512_abs_epi8(zmm0);
|
|
|
|
// 32 CNs of second BN
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG3[j][1]/2) + i];
|
|
min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
|
|
sgn = simde_mm512_xor_si512(sgn, zmm0);
|
|
|
|
// Store result
|
|
min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
|
|
*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
|
|
p_cnProcBufResBit++;
|
|
}
|
|
}
|
|
}
|
|
|
|
// =====================================================================
|
|
// Process group with 4 BNs
|
|
|
|
// Offset is 5*384/32 = 60
|
|
const uint8_t lut_idxCnProcG4[4][3] = {{60,120,180}, {0,120,180}, {0,60,180}, {0,60,120}};
|
|
|
|
if (lut_numCnInCnGroups[1] > 0)
|
|
{
|
|
// Number of groups of 32 CNs for parallel processing
|
|
// Ceil for values not divisible by 32
|
|
M = (lut_numCnInCnGroups[1]*Z + 63)>>6;
|
|
|
|
// Set the offset to each bit within a group in terms of 32 Byte
|
|
bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[1]*NR_LDPC_ZMAX)>>6;
|
|
|
|
// Set pointers to start of group 4
|
|
p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[1]];
|
|
p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[1]];
|
|
|
|
// Loop over every BN
|
|
for (j=0; j<4; j++)
|
|
{
|
|
// Set of results pointer to correct BN address
|
|
p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
|
|
|
|
// Loop over CNs
|
|
for (i=0; i<M; i++)
|
|
{
|
|
// Abs and sign of 32 CNs (first BN)
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG4[j][0]/2) + i];
|
|
sgn = simde_mm512_xor_si512(*p_ones, zmm0);
|
|
min = simde_mm512_abs_epi8(zmm0);
|
|
|
|
// Loop over BNs
|
|
for (k=1; k<3; k++)
|
|
{
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG4[j][k]/2) + i];
|
|
min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
|
|
sgn = simde_mm512_xor_si512(sgn, zmm0);
|
|
}
|
|
|
|
// Store result
|
|
min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
|
|
*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
|
|
p_cnProcBufResBit++;
|
|
}
|
|
}
|
|
}
|
|
|
|
// =====================================================================
|
|
// Process group with 5 BNs
|
|
|
|
// Offset is 18*384/32 = 216
|
|
const uint16_t lut_idxCnProcG5[5][4] = {{216,432,648,864}, {0,432,648,864},
|
|
{0,216,648,864}, {0,216,432,864}, {0,216,432,648}};
|
|
|
|
if (lut_numCnInCnGroups[2] > 0)
|
|
{
|
|
// Number of groups of 32 CNs for parallel processing
|
|
// Ceil for values not divisible by 32
|
|
M = (lut_numCnInCnGroups[2]*Z + 63)>>6;
|
|
|
|
// Set the offset to each bit within a group in terms of 32 Byte
|
|
bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[2]*NR_LDPC_ZMAX)>>6;
|
|
|
|
// Set pointers to start of group 5
|
|
p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[2]];
|
|
p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[2]];
|
|
|
|
// Loop over every BN
|
|
for (j=0; j<5; j++)
|
|
{
|
|
// Set of results pointer to correct BN address
|
|
p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
|
|
|
|
// Loop over CNs
|
|
for (i=0; i<M; i++)
|
|
{
|
|
// Abs and sign of 32 CNs (first BN)
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG5[j][0]/2) + i];
|
|
sgn = simde_mm512_xor_si512(*p_ones, zmm0);
|
|
min = simde_mm512_abs_epi8(zmm0);
|
|
|
|
// Loop over BNs
|
|
for (k=1; k<4; k++)
|
|
{
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG5[j][k]/2) + i];
|
|
min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
|
|
sgn = simde_mm512_xor_si512(sgn, zmm0);
|
|
}
|
|
|
|
// Store result
|
|
min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
|
|
*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
|
|
p_cnProcBufResBit++;
|
|
}
|
|
}
|
|
}
|
|
|
|
// =====================================================================
|
|
// Process group with 6 BNs
|
|
|
|
// Offset is 8*384/32 = 96
|
|
const uint16_t lut_idxCnProcG6[6][5] = {{96,192,288,384,480}, {0,192,288,384,480},
|
|
{0,96,288,384,480}, {0,96,192,384,480},
|
|
{0,96,192,288,480}, {0,96,192,288,384}};
|
|
|
|
if (lut_numCnInCnGroups[3] > 0)
|
|
{
|
|
// Number of groups of 32 CNs for parallel processing
|
|
// Ceil for values not divisible by 32
|
|
M = (lut_numCnInCnGroups[3]*Z + 63)>>6;
|
|
|
|
// Set the offset to each bit within a group in terms of 32 Byte
|
|
bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[3]*NR_LDPC_ZMAX)>>6;
|
|
|
|
// Set pointers to start of group 6
|
|
p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[3]];
|
|
p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[3]];
|
|
|
|
// Loop over every BN
|
|
for (j=0; j<6; j++)
|
|
{
|
|
// Set of results pointer to correct BN address
|
|
p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
|
|
|
|
// Loop over CNs
|
|
for (i=0; i<M; i++)
|
|
{
|
|
// Abs and sign of 32 CNs (first BN)
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG6[j][0]/2) + i];
|
|
sgn = simde_mm512_xor_si512(*p_ones, zmm0);
|
|
min = simde_mm512_abs_epi8(zmm0);
|
|
|
|
// Loop over BNs
|
|
for (k=1; k<5; k++)
|
|
{
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG6[j][k]/2) + i];
|
|
min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
|
|
sgn = simde_mm512_xor_si512(sgn, zmm0);
|
|
}
|
|
|
|
// Store result
|
|
min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
|
|
*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
|
|
p_cnProcBufResBit++;
|
|
}
|
|
}
|
|
}
|
|
|
|
// =====================================================================
|
|
// Process group with 7 BNs
|
|
|
|
// Offset is 5*384/32 = 60
|
|
const uint16_t lut_idxCnProcG7[7][6] = {{60,120,180,240,300,360}, {0,120,180,240,300,360},
|
|
{0,60,180,240,300,360}, {0,60,120,240,300,360},
|
|
{0,60,120,180,300,360}, {0,60,120,180,240,360},
|
|
{0,60,120,180,240,300}};
|
|
|
|
if (lut_numCnInCnGroups[4] > 0)
|
|
{
|
|
// Number of groups of 32 CNs for parallel processing
|
|
// Ceil for values not divisible by 32
|
|
M = (lut_numCnInCnGroups[4]*Z + 63)>>6;
|
|
|
|
// Set the offset to each bit within a group in terms of 32 Byte
|
|
bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[4]*NR_LDPC_ZMAX)>>6;
|
|
|
|
// Set pointers to start of group 7
|
|
p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[4]];
|
|
p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[4]];
|
|
|
|
// Loop over every BN
|
|
for (j=0; j<7; j++)
|
|
{
|
|
// Set of results pointer to correct BN address
|
|
p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
|
|
|
|
// Loop over CNs
|
|
for (i=0; i<M; i++)
|
|
{
|
|
// Abs and sign of 32 CNs (first BN)
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG7[j][0]/2) + i];
|
|
sgn = simde_mm512_xor_si512(*p_ones, zmm0);
|
|
min = simde_mm512_abs_epi8(zmm0);
|
|
|
|
// Loop over BNs
|
|
for (k=1; k<6; k++)
|
|
{
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG7[j][k]/2) + i];
|
|
min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
|
|
sgn = simde_mm512_xor_si512(sgn, zmm0);
|
|
}
|
|
|
|
// Store result
|
|
min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
|
|
*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
|
|
p_cnProcBufResBit++;
|
|
}
|
|
}
|
|
}
|
|
|
|
// =====================================================================
|
|
// Process group with 8 BNs
|
|
|
|
// Offset is 2*384/32 = 24
|
|
const uint8_t lut_idxCnProcG8[8][7] = {{24,48,72,96,120,144,168}, {0,48,72,96,120,144,168},
|
|
{0,24,72,96,120,144,168}, {0,24,48,96,120,144,168},
|
|
{0,24,48,72,120,144,168}, {0,24,48,72,96,144,168},
|
|
{0,24,48,72,96,120,168}, {0,24,48,72,96,120,144}};
|
|
|
|
if (lut_numCnInCnGroups[5] > 0)
|
|
{
|
|
// Number of groups of 32 CNs for parallel processing
|
|
// Ceil for values not divisible by 32
|
|
M = (lut_numCnInCnGroups[5]*Z + 63)>>6;
|
|
|
|
// Set the offset to each bit within a group in terms of 32 Byte
|
|
bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[5]*NR_LDPC_ZMAX)>>6;
|
|
|
|
// Set pointers to start of group 8
|
|
p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[5]];
|
|
p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[5]];
|
|
|
|
// Loop over every BN
|
|
for (j=0; j<8; j++)
|
|
{
|
|
// Set of results pointer to correct BN address
|
|
p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
|
|
|
|
// Loop over CNs
|
|
for (i=0; i<M; i++)
|
|
{
|
|
// Abs and sign of 32 CNs (first BN)
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG8[j][0]/2) + i];
|
|
sgn = simde_mm512_xor_si512(*p_ones, zmm0);
|
|
min = simde_mm512_abs_epi8(zmm0);
|
|
|
|
// Loop over BNs
|
|
for (k=1; k<7; k++)
|
|
{
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG8[j][k]/2) + i];
|
|
min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
|
|
sgn = simde_mm512_xor_si512(sgn, zmm0);
|
|
}
|
|
|
|
// Store result
|
|
min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
|
|
*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
|
|
p_cnProcBufResBit++;
|
|
}
|
|
}
|
|
}
|
|
|
|
// =====================================================================
|
|
// Process group with 9 BNs
|
|
|
|
// Offset is 2*384/32 = 24
|
|
const uint8_t lut_idxCnProcG9[9][8] = {{24,48,72,96,120,144,168,192}, {0,48,72,96,120,144,168,192},
|
|
{0,24,72,96,120,144,168,192}, {0,24,48,96,120,144,168,192},
|
|
{0,24,48,72,120,144,168,192}, {0,24,48,72,96,144,168,192},
|
|
{0,24,48,72,96,120,168,192}, {0,24,48,72,96,120,144,192},
|
|
{0,24,48,72,96,120,144,168}};
|
|
|
|
if (lut_numCnInCnGroups[6] > 0)
|
|
{
|
|
// Number of groups of 32 CNs for parallel processing
|
|
// Ceil for values not divisible by 32
|
|
M = (lut_numCnInCnGroups[6]*Z + 63)>>6;
|
|
|
|
// Set the offset to each bit within a group in terms of 32 Byte
|
|
bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[6]*NR_LDPC_ZMAX)>>6;
|
|
|
|
// Set pointers to start of group 9
|
|
p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[6]];
|
|
p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[6]];
|
|
|
|
// Loop over every BN
|
|
for (j=0; j<9; j++)
|
|
{
|
|
// Set of results pointer to correct BN address
|
|
p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
|
|
|
|
// Loop over CNs
|
|
for (i=0; i<M; i++)
|
|
{
|
|
// Abs and sign of 32 CNs (first BN)
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG9[j][0]/2) + i];
|
|
sgn = simde_mm512_xor_si512(*p_ones, zmm0);
|
|
min = simde_mm512_abs_epi8(zmm0);
|
|
|
|
// Loop over BNs
|
|
for (k=1; k<8; k++)
|
|
{
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG9[j][k]/2) + i];
|
|
min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
|
|
sgn = simde_mm512_xor_si512(sgn, zmm0);
|
|
}
|
|
|
|
// Store result
|
|
min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
|
|
*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
|
|
p_cnProcBufResBit++;
|
|
}
|
|
}
|
|
}
|
|
|
|
// =====================================================================
|
|
// Process group with 10 BNs
|
|
|
|
// Offset is 1*384/32 = 12
|
|
const uint8_t lut_idxCnProcG10[10][9] = {{12,24,36,48,60,72,84,96,108}, {0,24,36,48,60,72,84,96,108},
|
|
{0,12,36,48,60,72,84,96,108}, {0,12,24,48,60,72,84,96,108},
|
|
{0,12,24,36,60,72,84,96,108}, {0,12,24,36,48,72,84,96,108},
|
|
{0,12,24,36,48,60,84,96,108}, {0,12,24,36,48,60,72,96,108},
|
|
{0,12,24,36,48,60,72,84,108}, {0,12,24,36,48,60,72,84,96}};
|
|
|
|
if (lut_numCnInCnGroups[7] > 0)
|
|
{
|
|
// Number of groups of 32 CNs for parallel processing
|
|
// Ceil for values not divisible by 32
|
|
M = (lut_numCnInCnGroups[7]*Z + 63)>>6;
|
|
|
|
// Set the offset to each bit within a group in terms of 32 Byte
|
|
bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[7]*NR_LDPC_ZMAX)>>6;
|
|
|
|
// Set pointers to start of group 10
|
|
p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[7]];
|
|
p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[7]];
|
|
|
|
// Loop over every BN
|
|
for (j=0; j<10; j++)
|
|
{
|
|
// Set of results pointer to correct BN address
|
|
p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
|
|
|
|
// Loop over CNs
|
|
for (i=0; i<M; i++)
|
|
{
|
|
// Abs and sign of 32 CNs (first BN)
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG10[j][0]/2) + i];
|
|
sgn = simde_mm512_xor_si512(*p_ones, zmm0);
|
|
min = simde_mm512_abs_epi8(zmm0);
|
|
|
|
// Loop over BNs
|
|
for (k=1; k<9; k++)
|
|
{
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG10[j][k]/2) + i];
|
|
min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
|
|
sgn = simde_mm512_xor_si512(sgn, zmm0);
|
|
}
|
|
|
|
// Store result
|
|
min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
|
|
*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
|
|
p_cnProcBufResBit++;
|
|
}
|
|
}
|
|
}
|
|
|
|
// =====================================================================
|
|
// Process group with 19 BNs
|
|
|
|
// Offset is 4*384/32 = 12
|
|
const uint16_t lut_idxCnProcG19[19][18] = {{48,96,144,192,240,288,336,384,432,480,528,576,624,672,720,768,816,864}, {0,96,144,192,240,288,336,384,432,480,528,576,624,672,720,768,816,864},
|
|
{0,48,144,192,240,288,336,384,432,480,528,576,624,672,720,768,816,864}, {0,48,96,192,240,288,336,384,432,480,528,576,624,672,720,768,816,864},
|
|
{0,48,96,144,240,288,336,384,432,480,528,576,624,672,720,768,816,864}, {0,48,96,144,192,288,336,384,432,480,528,576,624,672,720,768,816,864},
|
|
{0,48,96,144,192,240,336,384,432,480,528,576,624,672,720,768,816,864}, {0,48,96,144,192,240,288,384,432,480,528,576,624,672,720,768,816,864},
|
|
{0,48,96,144,192,240,288,336,432,480,528,576,624,672,720,768,816,864}, {0,48,96,144,192,240,288,336,384,480,528,576,624,672,720,768,816,864},
|
|
{0,48,96,144,192,240,288,336,384,432,528,576,624,672,720,768,816,864}, {0,48,96,144,192,240,288,336,384,432,480,576,624,672,720,768,816,864},
|
|
{0,48,96,144,192,240,288,336,384,432,480,528,624,672,720,768,816,864}, {0,48,96,144,192,240,288,336,384,432,480,528,576,672,720,768,816,864},
|
|
{0,48,96,144,192,240,288,336,384,432,480,528,576,624,720,768,816,864}, {0,48,96,144,192,240,288,336,384,432,480,528,576,624,672,768,816,864},
|
|
{0,48,96,144,192,240,288,336,384,432,480,528,576,624,672,720,816,864}, {0,48,96,144,192,240,288,336,384,432,480,528,576,624,672,720,768,864},
|
|
{0,48,96,144,192,240,288,336,384,432,480,528,576,624,672,720,768,816}};
|
|
|
|
if (lut_numCnInCnGroups[8] > 0)
|
|
{
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|
// Number of groups of 32 CNs for parallel processing
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|
// Ceil for values not divisible by 32
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|
M = (lut_numCnInCnGroups[8]*Z + 63)>>6;
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|
|
|
// Set the offset to each bit within a group in terms of 32 Byte
|
|
bitOffsetInGroup = (lut_numCnInCnGroups_BG1_R13[8]*NR_LDPC_ZMAX)>>6;
|
|
|
|
// Set pointers to start of group 19
|
|
p_cnProcBuf = (simde__m512i*)&cnProcBuf[lut_startAddrCnGroups[8]];
|
|
p_cnProcBufRes = (simde__m512i*)&cnProcBufRes[lut_startAddrCnGroups[8]];
|
|
|
|
// Loop over every BN
|
|
for (j=0; j<19; j++)
|
|
{
|
|
// Set of results pointer to correct BN address
|
|
p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
|
|
|
|
// Loop over CNs
|
|
for (i=0; i<M; i++)
|
|
{
|
|
// Abs and sign of 32 CNs (first BN)
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG19[j][0]/2) + i];
|
|
sgn = simde_mm512_xor_si512(*p_ones, zmm0);
|
|
min = simde_mm512_abs_epi8(zmm0);
|
|
|
|
// Loop over BNs
|
|
for (k=1; k<18; k++)
|
|
{
|
|
zmm0 = p_cnProcBuf[(lut_idxCnProcG19[j][k]/2) + i];
|
|
min = simde_mm512_min_epu8(min, simde_mm512_abs_epi8(zmm0));
|
|
sgn = simde_mm512_xor_si512(sgn, zmm0);
|
|
}
|
|
|
|
// Store result
|
|
min = simde_mm512_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
|
|
*p_cnProcBufResBit = conditional_negate(min, sgn,zeros);
|
|
p_cnProcBufResBit++;
|
|
}
|
|
}
|
|
}
|
|
|
|
}
|
|
#endif
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