Raymond Knopp
a7bc282302
Testing on Neoverse N1 (Ampere 3GHz). Tested only on a subset of phy-simulators. - Changes: - use SIMDE consistently - adaptations of LDPC decoder generator for ARMv8 performance - SIMDe modifications of Intel CRC to allow for aarch64 build. optimizations for 128-bit to improve performance of LDPC encode/decode on aarch64 (Neoverse 1) - added BG2 files for 128-bit ldpc encoder (aarch64) - testing on Xeon - testing on x86 - minor changes to build/run on x86 - change in crc.h after returning to aarch64 - removed some warning in ldpc decoder generator for x86_64 - char - Delete irrelevant constants - Correctly declare variables - Define stdbool for all architectures - Remove definition of _MM_SHUFFLE and use SIMDE_MM_SHUFFLE - Remove commented code - Fix CMakeLists.txt - Include SIMDE avx2 functions in tools_defs.h
112 lines
4.5 KiB
C
112 lines
4.5 KiB
C
/*
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* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership.
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* The OpenAirInterface Software Alliance licenses this file to You under
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* the OAI Public License, Version 1.1 (the "License"); you may not use this file
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* except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.openairinterface.org/?page_id=698
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*-------------------------------------------------------------------------------
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* For more information about the OpenAirInterface (OAI) Software Alliance:
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* contact@openairinterface.org
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*/
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/*! \file PHY/sse_intrin.h
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* \brief SSE includes and compatibility functions.
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*
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* This header collects all SSE compatibility functions. To use SSE inside a source file, include only sse_intrin.h.
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* The host CPU needs to have support for SSE2 at least. SSE3 and SSE4.1 functions are emulated if the CPU lacks support for them.
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* This will slow down the softmodem, but may be valuable if only offline signal processing is required.
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*
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*
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* Has been changed in August 2022 to rely on SIMD Everywhere (SIMDE) from MIT
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* by bruno.mongazon-cazavet@nokia-bell-labs.com
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*
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* All AVX22 code is mapped to SIMDE which transparently relies on AVX2 HW (avx2-capable host) or SIMDE emulation
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* (non-avx2-capable host).
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* To force using SIMDE emulation on avx2-capable host use the --noavx2 flag.
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* avx512 code is not mapped to SIMDE. It depends on --noavx512 flag.
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* If the --noavx512 is set the OAI AVX512 emulation using AVX2 is used.
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* If the --noavx512 is not set, AVX512 HW is used on avx512-capable host while OAI AVX512 emulation using AVX2
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* is used on non-avx512-capable host.
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*
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* \author S. Held, Laurent THOMAS
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* \email sebastian.held@imst.de, laurent.thomas@open-cells.com
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* \company IMST GmbH, Open Cells Project
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* \date 2019
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* \version 0.2
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*/
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#ifndef SSE_INTRIN_H
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#define SSE_INTRIN_H
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#include <simde/x86/mmx.h>
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#include <simde/x86/sse.h>
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#include <simde/x86/sse2.h>
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#include <simde/x86/sse3.h>
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#include <simde/x86/ssse3.h>
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#include <simde/x86/sse4.1.h>
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#include <simde/x86/sse4.2.h>
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#include <simde/x86/avx2.h>
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#include <simde/x86/fma.h>
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#if defined(__x86_64) || defined(__i386__)
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/* x86 processors */
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#if defined(__AVX512BW__) || defined(__AVX512F__)
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#include <immintrin.h>
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#endif
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#elif defined(__arm__) || defined(__aarch64__)
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/* ARM processors */
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// note this fails on some x86 machines, with an error like:
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// /usr/lib/gcc/x86_64-redhat-linux/8/include/gfniintrin.h:57:1: error: inlining failed in call to always_inline ‘_mm_gf2p8affine_epi64_epi8’: target specific option mismatch
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#include <simde/x86/clmul.h>
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#include <simde/arm/neon.h>
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#endif // x86_64 || i386
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#include <stdbool.h>
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#include "assertions.h"
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/*
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* OAI specific
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*/
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static const short minusConjug128[8]__attribute__((aligned(16))) = {-1,1,-1,1,-1,1,-1,1};
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static inline simde__m128i mulByConjugate128(simde__m128i *a, simde__m128i *b, int8_t output_shift) {
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simde__m128i realPart = simde_mm_madd_epi16(*a,*b);
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realPart = simde_mm_srai_epi32(realPart,output_shift);
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simde__m128i imagPart = simde_mm_shufflelo_epi16(*b, SIMDE_MM_SHUFFLE(2,3,0,1));
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imagPart = simde_mm_shufflehi_epi16(imagPart, SIMDE_MM_SHUFFLE(2,3,0,1));
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imagPart = simde_mm_sign_epi16(imagPart,*(simde__m128i *)minusConjug128);
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imagPart = simde_mm_madd_epi16(imagPart,*a);
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imagPart = simde_mm_srai_epi32(imagPart,output_shift);
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simde__m128i lowPart = simde_mm_unpacklo_epi32(realPart,imagPart);
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simde__m128i highPart = simde_mm_unpackhi_epi32(realPart,imagPart);
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return ( simde_mm_packs_epi32(lowPart,highPart));
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}
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#define displaySamples128(vect) {\
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simde__m128i x=vect; \
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printf("vector: %s = (%hd,%hd) (%hd,%hd) (%hd,%hd) (%hd,%hd)\n", #vect, \
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simde_mm_extract_epi16(x,0), \
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simde_mm_extract_epi16(x,1),\
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simde_mm_extract_epi16(x,2),\
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simde_mm_extract_epi16(x,3),\
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simde_mm_extract_epi16(x,4),\
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simde_mm_extract_epi16(x,5),\
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simde_mm_extract_epi16(x,6),\
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simde_mm_extract_epi16(x,7));\
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}
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#endif // SSE_INTRIN_H
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