Conflicts: openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
270 lines
9.5 KiB
C
270 lines
9.5 KiB
C
/*
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* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership.
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* The OpenAirInterface Software Alliance licenses this file to You under
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* the OAI Public License, Version 1.1 (the "License"); you may not use this file
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* except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.openairinterface.org/?page_id=698
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*-------------------------------------------------------------------------------
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* For more information about the OpenAirInterface (OAI) Software Alliance:
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* contact@openairinterface.org
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*/
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/*! \file mac.h
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* \brief MAC data structures, constant, and function prototype
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* \author Navid Nikaein and Raymond Knopp, WIE-TAI CHEN
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* \date Dec. 2019
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* \version 0.1
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* \company Eurecom
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* \email raymond.knopp@eurecom.fr
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*/
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#ifndef __LAYER2_NR_MAC_COMMON_H__
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#define __LAYER2_NR_MAC_COMMON_H__
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#include "NR_MIB.h"
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#include "NR_PDSCH-Config.h"
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#include "NR_CellGroupConfig.h"
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#include "nr_mac.h"
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#include "openair1/PHY/impl_defs_nr.h"
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#define TABLE_38213_13_1_NUM_INDEXES 15
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#define TABLE_38213_13_2_NUM_INDEXES 14
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#define TABLE_38213_13_3_NUM_INDEXES 9
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#define TABLE_38213_13_4_NUM_INDEXES 16
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#define TABLE_38213_13_5_NUM_INDEXES 9
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#define TABLE_38213_13_6_NUM_INDEXES 10
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#define TABLE_38213_13_7_NUM_INDEXES 12
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#define TABLE_38213_13_8_NUM_INDEXES 8
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#define TABLE_38213_13_9_NUM_INDEXES 4
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#define TABLE_38213_13_10_NUM_INDEXES 8
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#define TABLE_38213_13_11_NUM_INDEXES 16
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#define TABLE_38213_13_12_NUM_INDEXES 14
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// ===============================================
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// SSB to RO mapping public defines and structures
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// ===============================================
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#define MAX_SSB_PER_RO (16) // Maximum number of SSBs that can be mapped to a single RO
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#define MAX_TDM (7) // Maximum nb of PRACH occasions TDMed in a slot
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#define MAX_FDM (8) // Maximum nb of PRACH occasions FDMed in a slot
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typedef enum frequency_range_e {
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FR1 = 0,
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FR2
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} frequency_range_t;
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// PRACH occasion details
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typedef struct prach_occasion_info {
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uint8_t start_symbol; // 0 - 13 (14 symbols in a slot)
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uint8_t fdm; // 0-7 (possible values of msg1-FDM: 1, 2, 4 or 8)
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uint8_t slot; // 0 - 159 (maximum number of slots in a 10ms frame - @ 240kHz)
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uint8_t frame; // 0 - 15 (maximum number of frames in a 160ms association pattern)
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uint8_t mapped_ssb_idx[MAX_SSB_PER_RO]; // List of mapped SSBs
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uint8_t nb_mapped_ssb;
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uint16_t format; // RO preamble format
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} prach_occasion_info_t;
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// PRACH occasion slot details
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// A PRACH occasion slot is a series of PRACH occasions in time (symbols) and frequency
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typedef struct prach_occasion_slot {
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prach_occasion_info_t prach_occasion[MAX_TDM][MAX_FDM]; // Starting symbol of each PRACH occasions in a slot
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uint8_t nb_of_prach_occasion_in_time;
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uint8_t nb_of_prach_occasion_in_freq;
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} prach_occasion_slot_t;
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// ========================================
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typedef enum {
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NR_DL_DCI_FORMAT_1_0 = 0,
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NR_DL_DCI_FORMAT_1_1,
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NR_DL_DCI_FORMAT_2_0,
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NR_DL_DCI_FORMAT_2_1,
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NR_DL_DCI_FORMAT_2_2,
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NR_DL_DCI_FORMAT_2_3,
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NR_UL_DCI_FORMAT_0_0,
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NR_UL_DCI_FORMAT_0_1
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} nr_dci_format_t;
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typedef enum {
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NR_RNTI_new = 0,
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NR_RNTI_C,
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NR_RNTI_RA,
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NR_RNTI_P,
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NR_RNTI_CS,
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NR_RNTI_TC,
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NR_RNTI_SP_CSI,
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NR_RNTI_SI,
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NR_RNTI_SFI,
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NR_RNTI_INT,
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NR_RNTI_TPC_PUSCH,
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NR_RNTI_TPC_PUCCH,
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NR_RNTI_TPC_SRS,
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NR_RNTI_MCS_C,
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} nr_rnti_type_t;
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typedef enum subcarrier_spacing_e {
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scs_15kHz = 0x1,
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scs_30kHz = 0x2,
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scs_60kHz = 0x4,
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scs_120kHz = 0x8,
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scs_240kHz = 0x16
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} subcarrier_spacing_t;
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typedef enum channel_bandwidth_e {
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bw_5MHz = 0x1,
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bw_10MHz = 0x2,
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bw_20MHz = 0x4,
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bw_40MHz = 0x8,
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bw_80MHz = 0x16,
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bw_100MHz = 0x32
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} channel_bandwidth_t;
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typedef enum nr_ssb_and_cset_mux_pattern_type_e {
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NR_SSB_AND_CSET_MUX_PATTERN_TYPE1=1,
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NR_SSB_AND_CSET_MUX_PATTERN_TYPE2,
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NR_SSB_AND_CSET_MUX_PATTERN_TYPE3
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} nr_ssb_and_cset_mux_pattern_type_t;
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typedef enum {
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SFN_C_MOD_2_EQ_0,
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SFN_C_MOD_2_EQ_1,
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SFN_C_IMPOSSIBLE
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} SFN_C_TYPE;
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typedef struct Type0_PDCCH_CSS_config_s {
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int32_t num_rbs;
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int32_t num_symbols;
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int32_t rb_offset; // Offset from SSB RB0
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uint32_t type0_pdcch_ss_mux_pattern;
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uint16_t frame;
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SFN_C_TYPE sfn_c;
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uint32_t n_c;
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uint32_t n_0;
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uint32_t number_of_search_space_per_slot;
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uint32_t first_symbol_index;
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uint32_t search_space_duration;
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uint32_t ssb_length;
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uint32_t ssb_index;
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uint32_t cset_start_rb;
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} NR_Type0_PDCCH_CSS_config_t;
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uint16_t config_bandwidth(int mu, int nb_rb, int nr_band);
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void get_frame_type(uint16_t nr_bandP, uint8_t scs_index, lte_frame_type_t *current_type);
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void get_delta_duplex(int nr_bandP, uint8_t scs_index, int32_t *delta_duplex);
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uint64_t from_nrarfcn(int nr_bandP, uint8_t scs_index, uint32_t dl_nrarfcn);
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uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw);
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int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols);
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int is_nr_DL_slot(NR_ServingCellConfigCommon_t *scc,slot_t slotP);
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int is_nr_UL_slot(NR_ServingCellConfigCommon_t *scc,slot_t slotP);
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uint16_t nr_dci_size(NR_ServingCellConfigCommon_t *scc,
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NR_CellGroupConfig_t *secondaryCellGroup,
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dci_pdu_rel15_t *dci_pdu,
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nr_dci_format_t format,
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nr_rnti_type_t rnti_type,
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uint16_t N_RB,
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int bwp_id);
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void find_aggregation_candidates(uint8_t *aggregation_level,
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uint8_t *nr_of_candidates,
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NR_SearchSpace_t *ss);
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void find_monitoring_periodicity_offset_common(NR_SearchSpace_t *ss,
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uint16_t *slot_period,
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uint16_t *offset);
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int get_nr_prach_info_from_index(uint8_t index,
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int frame,
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int slot,
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uint32_t pointa,
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uint8_t mu,
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uint8_t unpaired,
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uint16_t *format,
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uint8_t *start_symbol,
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uint8_t *N_t_slot,
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uint8_t *N_dur,
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uint16_t *RA_sfn_index,
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uint8_t *N_RA_slot,
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uint8_t *config_period);
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int get_nr_prach_occasion_info_from_index(uint8_t index,
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uint32_t pointa,
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uint8_t mu,
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uint8_t unpaired,
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uint16_t *format,
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uint8_t *start_symbol,
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uint8_t *N_t_slot,
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uint8_t *N_dur,
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uint8_t *N_RA_slot,
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uint16_t *N_RA_sfn,
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uint8_t *max_association_period);
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uint8_t get_nr_prach_duration(uint8_t prach_format);
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uint8_t get_pusch_mcs_table(long *mcs_Table,
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int is_tp,
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int dci_format,
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int rnti_type,
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int target_ss,
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bool config_grant);
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uint8_t compute_nr_root_seq(NR_RACH_ConfigCommon_t *rach_config,
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uint8_t nb_preambles,
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uint8_t unpaired,
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frequency_range_t);
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int ul_ant_bits(NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig,long transformPrecoder);
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int get_format0(uint8_t index, uint8_t unpaired,frequency_range_t);
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int64_t *get_prach_config_info(uint32_t pointa,
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uint8_t index,
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uint8_t unpaired);
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uint16_t get_NCS(uint8_t index, uint16_t format, uint8_t restricted_set_config);
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int get_num_dmrs(uint16_t dmrs_mask );
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uint8_t get_l0_ul(uint8_t mapping_type, uint8_t dmrs_typeA_position);
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int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmrs_AdditionalPosition_t additional_pos, pusch_maxLength_t pusch_maxLength);
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uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint8_t mcs_table);
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uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB);
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int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
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NR_MIB_t *mib,
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uint8_t extra_bits,
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uint32_t ssb_length,
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uint32_t ssb_index,
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uint32_t ssb_offset_point_a);
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int16_t get_N_RA_RB (int delta_f_RA_PRACH,int delta_f_PUSCH);
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bool set_dl_ptrs_values(NR_PTRS_DownlinkConfig_t *ptrs_config,
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uint16_t rbSize, uint8_t mcsIndex, uint8_t mcsTable,
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uint8_t *K_ptrs, uint8_t *L_ptrs,uint8_t *portIndex,
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uint8_t *nERatio,uint8_t *reOffset,
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uint8_t NrOfSymbols);
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uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols);
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#endif
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