105 lines
3.6 KiB
C
Executable File
105 lines
3.6 KiB
C
Executable File
#ifndef OPENAIR_DEVICE_H
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#define OPENAIR_DEVICE_H
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// Maximum number of concurrently supported cards
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//
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#define MAX_CARDS 4
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#define INIT_ZEROS {0, 0, 0, 0}
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/** PCIe subsystem configuration Space
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*/
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// Vendor and System IDs
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//
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#define XILINX_VENDOR 0x10ee
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#define XILINX_ID 0x0007
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//
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// PCIe Subsystem Vendor ID
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#define EURECOM_VENDOR 0x0001
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#define TELECOM_PARISTECH_VENDOR 0x0002
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/*
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PCIe Subsystem ID = exmimo_id.board_exmimoversion(1,2) (4 bits) | exmimo_id.board_hwrev (4 bits) | exmimo_id.board_swrev (Protocol Revision, 8 bits)
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Board IDs (exmimo_id.board_exmimoversion(1,2) (4 bits) + exmimo_id.board_hwrev (4 bits))
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0x11 => ExpressMIMO-1, first run/HW revision
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0x12 => ExpressMIMO-1, second run
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0x21 => ExpressMIMO-2, first run
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0x22 => ExpressMIMO-2, second run
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SW/Protocol revisions: (exmimo_id.board_swrev (Protocol Revision, 8 bits)
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BOARD_SWREV_LEGACY:
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- IRQ Leon->PC Bit 7 (AHBPCIE_INTERRUPT_ASSERT_BIT) must be cleared in PC kernel driver
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- PC->Leon and Leon->PC commands share a single register CONTROL1
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BOARD_SWREV_CMDREGISTERS:
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- IRQ Leon->PC Bit 7 (AHBPCIE_INTERRUPT_ASSERT_BIT) is automatically cleared on PCIe read
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- PC->Leon and Leon->PC commands have separete command registers CONTROL1 (PC->Leon) and CONTROL2 (Leon->PC)
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BOARD_SWREV_CMDFIFOS:
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- uses two command FIFOs (for PC->Leon and Leon->PC), by Telecom Paristech
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*/
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#define BOARD_SWREV_LEGACY 0x07
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#define BOARD_SWREV_CMDREGISTERS 0x08
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#define BOARD_SWREV_CNTL2 0x09
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#define BOARD_SWREV_CMDFIFOS 0x11
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// ExpressMIMO PCIe register offsets to bar0
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//
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#define PCIE_CONTROL0 0x00
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#define PCIE_CONTROL1 0x04
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#define PCIE_CONTROL2 0x64
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#define PCIE_STATUS 0x08
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#define PCIE_PCIBASEL 0x1c
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#define PCIE_PCIBASEH 0x20
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// Device IO definitions and operations
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//
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#define openair_MAJOR 127
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//#define openair_writel(dev,offset,val) pci_write_config_dword(dev,(int)offset,(unsigned int)val)//{writel((uclong)(val),(ulong)(port)); mb();}
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//#define openair_readl(dev,offset,val) pci_read_config_dword(dev,(int)offset,(unsigned int*)val)//{writel((uclong)(val),(ulong)(port)); mb();}
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#define openair_IOC_MAGIC 'm'
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#define openair_GET_BIGSHMTOPS_KVIRT _IOR(openair_IOC_MAGIC,1,int)
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#define openair_GET_PCI_INTERFACE_BOTS_KVIRT _IOR(openair_IOC_MAGIC,2,int)
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#define openair_GET_NUM_DETECTED_CARDS _IOR(openair_IOC_MAGIC,3,int)
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#define openair_DUMP_CONFIG _IOR(openair_IOC_MAGIC,18,int)
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#define openair_GET_FRAME _IOR(openair_IOC_MAGIC,6,int)
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#define openair_START_RT_ACQUISITION _IOR(openair_IOC_MAGIC,28,int)
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#define openair_STOP _IOR(openair_IOC_MAGIC,5,int)
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#define openair_UPDATE_FIRMWARE _IOR(openair_IOC_MAGIC,40,int)
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/* Update firmware commands */
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#define UPDATE_FIRMWARE_TRANSFER_BLOCK 0x1
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#define UPDATE_FIRMWARE_CLEAR_BSS 0x2
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#define UPDATE_FIRMWARE_START_EXECUTION 0x3
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#define UPDATE_FIRMWARE_FORCE_REBOOT 0x4
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#define UPDATE_FIRMWARE_TEST_GOK 0x5
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// mmap page offset vg_pgoff is used to pass arguments to kernel
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// bit0..3: memory block: BIGSHM:0, RX:1,3,5,7, TX:2,4,6,8
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// bit4..7: card_id
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#define openair_mmap_BIGSHM 0
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#define openair_mmap_RX(ant) (((ant)<<1)+1)
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#define openair_mmap_TX(ant) (((ant)<<1)+2)
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#define openair_mmap_getMemBlock(o) ((o)&0xF)
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#define openair_mmap_getAntRX(o) (((o)-1)>>1)
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#define openair_mmap_getAntTX(o) (((o)-2)>>1)
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#define openair_mmap_Card(c) ( ((c)&0xF)<<4 )
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#define openair_mmap_getCard(o) ( ((o)>>4)&0xF )
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#endif /* OPENAIR_DEVICE_H */
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