274 lines
11 KiB
C
274 lines
11 KiB
C
/*
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* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership.
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* The OpenAirInterface Software Alliance licenses this file to You under
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* the OAI Public License, Version 1.1 (the "License"); you may not use this file
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* except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.openairinterface.org/?page_id=698
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*-------------------------------------------------------------------------------
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* For more information about the OpenAirInterface (OAI) Software Alliance:
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* contact@openairinterface.org
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*/
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/*! \file PHY/NR_TRANSPORT/nr_dci.c
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* \brief Implements DCI encoding and PDCCH TX procedures (38.212/38.213/38.214). V15.4.0 2019-01.
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* \author Guy De Souza
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* \date 2018
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* \version 0.1
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* \company Eurecom
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* \email: desouza@eurecom.fr
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* \note
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* \warning
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*/
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#include "nr_dci.h"
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#include "nr_dlsch.h"
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#include "nr_sch_dmrs.h"
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#include "PHY/MODULATION/nr_modulation.h"
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#include "common/utils/nr/nr_common.h"
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//#define DEBUG_PDCCH_DMRS
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//#define DEBUG_DCI
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//#define DEBUG_CHANNEL_CODING
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void nr_pdcch_scrambling(uint32_t *in,
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uint32_t size,
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uint32_t Nid,
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uint32_t scrambling_RNTI,
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uint32_t *out) {
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uint8_t reset;
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uint32_t x1, x2, s=0;
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reset = 1;
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x2 = (scrambling_RNTI<<16) + Nid;
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LOG_D(PHY,"PDCCH Scrambling x2 %x : scrambling_RNTI %x \n", x2, scrambling_RNTI);
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for (int i=0; i<size; i++) {
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if ((i&0x1f)==0) {
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s = lte_gold_generic(&x1, &x2, reset);
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reset = 0;
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if (i) {
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in++;
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out++;
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}
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}
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(*out) ^= ((((*in)>>(i&0x1f))&1) ^ ((s>>(i&0x1f))&1))<<(i&0x1f);
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}
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}
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void nr_generate_dci(PHY_VARS_gNB *gNB,
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nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
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int32_t *txdataF,
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int16_t amp,
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NR_DL_FRAME_PARMS *frame_parms,
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int slot) {
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uint16_t cset_start_sc;
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uint8_t cset_start_symb, cset_nsymb;
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int k,l,k_prime,dci_idx, dmrs_idx;
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// find coreset descriptor
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int rb_offset;
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int n_rb;
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// compute rb_offset and n_prb based on frequency allocation
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nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL];
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nr_fill_cce_list(cce_list, pdcch_pdu_rel15);
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get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
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cset_start_sc = frame_parms->first_carrier_offset + (pdcch_pdu_rel15->BWPStart + rb_offset) * NR_NB_SC_PER_RB;
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int16_t mod_dmrs[pdcch_pdu_rel15->DurationSymbols][(n_rb+rb_offset)*6] __attribute__((aligned(16))); // 3 for the max coreset duration
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for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) {
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/*The coreset is initialised
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* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0
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* or the rb_offset for other coresets
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* in time: by its first slot and its first symbol*/
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const nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[d];
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if(dci_pdu->ScramblingId != gNB->pdcch_gold_init) {
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gNB->pdcch_gold_init = dci_pdu->ScramblingId;
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nr_init_pdcch_dmrs(gNB, dci_pdu->ScramblingId);
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}
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uint32_t **gold_pdcch_dmrs = gNB->nr_gold_pdcch_dmrs[slot];
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cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
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cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
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dci_idx = 0;
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LOG_D(PHY, "Coreset rb_offset %d, nb_rb %d BWP Start %d\n",rb_offset,n_rb,pdcch_pdu_rel15->BWPStart);
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LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb);
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// DMRS length is per OFDM symbol
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uint32_t dmrs_length = n_rb*6; //2(QPSK)*3(per RB)*6(REG per CCE)
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uint32_t encoded_length = dci_pdu->AggregationLevel*108; //2(QPSK)*9(per RB)*6(REG per CCE)
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LOG_D(PHY, "DL_DCI : rb_offset %d, nb_rb %d, DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d),Scrambling_Id %d,ScramblingRNTI %x,PayloadSizeBits %d\n",
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rb_offset, n_rb,dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType,
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dci_pdu->ScramblingId,dci_pdu->ScramblingRNTI,dci_pdu->PayloadSizeBits);
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dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
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/// DMRS QPSK modulation
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for (int symb=cset_start_symb; symb<cset_start_symb + pdcch_pdu_rel15->DurationSymbols; symb++) {
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nr_modulation(gold_pdcch_dmrs[symb], dmrs_length, DMRS_MOD_ORDER, mod_dmrs[symb]); //Qm = 2 as DMRS is QPSK modulated
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#ifdef DEBUG_PDCCH_DMRS
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if(dci_pdu->RNTI!=0xFFFF) {
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for (int i=0; i<dmrs_length>>1; i++)
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printf("symb %d i %d %p gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
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&gold_pdcch_dmrs[symb][i>>5],gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
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}
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#endif
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}
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/// DCI payload processing
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// CRC attachment + Scrambling + Channel coding + Rate matching
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uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
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uint16_t n_RNTI = dci_pdu->RNTI;
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uint16_t Nid = dci_pdu->ScramblingId;
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uint16_t scrambling_RNTI = dci_pdu->ScramblingRNTI;
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polar_encoder_fast((uint64_t*)dci_pdu->Payload, (void*)encoder_output, n_RNTI, 1,
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NR_POLAR_DCI_MESSAGE_TYPE, dci_pdu->PayloadSizeBits, dci_pdu->AggregationLevel);
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#ifdef DEBUG_CHANNEL_CODING
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printf("polar rnti %x,length %d, L %d\n",n_RNTI, dci_pdu->PayloadSizeBits,pdcch_pdu_rel15->dci_pdu->AggregationLevel);
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printf("DCI PDU: [0]->0x%lx \t [1]->0x%lx\n",
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((uint64_t*)dci_pdu->Payload)[0], ((uint64_t*)dci_pdu->Payload)[1]);
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printf("Encoded Payload (length:%d dwords):\n", encoded_length>>5);
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for (int i=0; i<encoded_length>>5; i++)
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printf("[%d]->0x%08x \t", i,encoder_output[i]);
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printf("\n");
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#endif
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/// Scrambling
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uint32_t scrambled_output[NR_MAX_DCI_SIZE_DWORD]= {0};
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nr_pdcch_scrambling(encoder_output, encoded_length, Nid, scrambling_RNTI, scrambled_output);
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#ifdef DEBUG_CHANNEL_CODING
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printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\t [4]->0x%08x\t [5]->0x%08x\t \
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[6]->0x%08x \t [7]->0x%08x \t [8]->0x%08x \t [9]->0x%08x\t [10]->0x%08x\t [11]->0x%08x\n",
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scrambled_output[0], scrambled_output[1], scrambled_output[2], scrambled_output[3], scrambled_output[4],scrambled_output[5],
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scrambled_output[6], scrambled_output[7], scrambled_output[8], scrambled_output[9], scrambled_output[10],scrambled_output[11] );
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#endif
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/// QPSK modulation
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int16_t mod_dci[NR_MAX_DCI_SIZE>>1] __attribute__((aligned(16)));
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nr_modulation(scrambled_output, encoded_length, DMRS_MOD_ORDER, mod_dci); //Qm = 2 as DMRS is QPSK modulated
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#ifdef DEBUG_DCI
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for (int i=0; i<encoded_length>>1; i++)
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printf("i %d mod_dci %d %d\n", i, mod_dci[i<<1], mod_dci[(i<<1)+1] );
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#endif
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/// Resource mapping
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if (cset_start_sc >= frame_parms->ofdm_symbol_size)
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cset_start_sc -= frame_parms->ofdm_symbol_size;
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// Get cce_list indices by reg_idx in ascending order
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int reg_list_index = 0;
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int N_regs = n_rb*pdcch_pdu_rel15->DurationSymbols; // nb of REGs per coreset
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int N_cces = N_regs / NR_NB_REG_PER_CCE; // nb of cces in coreset
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int reg_list_order[NR_MAX_PDCCH_AGG_LEVEL] = {};
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for (int p = 0; p < N_cces; p++) {
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for(int p2 = 0; p2 < dci_pdu->AggregationLevel; p2++) {
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if(cce_list[d][p2].reg_list[0].reg_idx == p * NR_NB_REG_PER_CCE) {
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reg_list_order[reg_list_index] = p2;
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reg_list_index++;
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break;
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}
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}
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}
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/*Mapping the encoded DCI along with the DMRS */
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for(int symbol_idx = 0; symbol_idx < pdcch_pdu_rel15->DurationSymbols; symbol_idx++) {
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for (int cce_count = 0; cce_count < dci_pdu->AggregationLevel; cce_count+=pdcch_pdu_rel15->DurationSymbols) {
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int8_t cce_idx = reg_list_order[cce_count];
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for (int reg_in_cce_idx = 0; reg_in_cce_idx < NR_NB_REG_PER_CCE; reg_in_cce_idx++) {
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k = cset_start_sc + cce_list[d][cce_idx].reg_list[reg_in_cce_idx].start_sc_idx;
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LOG_D(PHY,"CCE %d REG %d k %d\n",cce_idx,reg_in_cce_idx,k);
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if (k >= frame_parms->ofdm_symbol_size)
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k -= frame_parms->ofdm_symbol_size;
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l = cset_start_symb + symbol_idx;
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// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
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if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
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dmrs_idx = (cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx) * 3;
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else
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dmrs_idx = (cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx + rb_offset) * 3;
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k_prime = 0;
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for (int m = 0; m < NR_NB_SC_PER_RB; m++) {
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if (m == (k_prime << 2) + 1) { // DMRS if not already mapped
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((int16_t *) txdataF)[(l * frame_parms->ofdm_symbol_size + k) << 1] =
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(amp * mod_dmrs[l][dmrs_idx << 1]) >> 15;
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((int16_t *) txdataF)[((l * frame_parms->ofdm_symbol_size + k) << 1) + 1] =
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(amp * mod_dmrs[l][(dmrs_idx << 1) + 1]) >> 15;
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#ifdef DEBUG_PDCCH_DMRS
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LOG_D(PHY,"PDCCH DMRS %d: l %d position %d => (%d,%d)\n",dmrs_idx,l,k,((int16_t *)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
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((int16_t *)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
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#endif
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dmrs_idx++;
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k_prime++;
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} else { // DCI payload
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((int16_t *) txdataF)[(l * frame_parms->ofdm_symbol_size + k) << 1] = (amp * mod_dci[dci_idx << 1]) >> 15;
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((int16_t *) txdataF)[((l * frame_parms->ofdm_symbol_size + k) << 1) + 1] =
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(amp * mod_dci[(dci_idx << 1) + 1]) >> 15;
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#ifdef DEBUG_DCI
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LOG_D(PHY,"PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
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((int16_t *)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
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#endif
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dci_idx++;
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}
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k++;
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if (k >= frame_parms->ofdm_symbol_size)
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k -= frame_parms->ofdm_symbol_size;
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} // m
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} // reg_in_cce_idx
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} // cce_count
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} // symbol_idx
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LOG_D(PHY,
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"DCI: payloadSize = %d | payload = %llx\n",
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dci_pdu->PayloadSizeBits,
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*(unsigned long long *)dci_pdu->Payload);
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} // for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++)
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}
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void nr_generate_dci_top(processingData_L1tx_t *msgTx,
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int slot,
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int32_t *txdataF,
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int16_t amp,
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NR_DL_FRAME_PARMS *frame_parms) {
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for (int i=0; i<msgTx->num_ul_pdcch; i++)
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nr_generate_dci(msgTx->gNB,&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
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for (int i=0; i<msgTx->num_dl_pdcch; i++)
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nr_generate_dci(msgTx->gNB,&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
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}
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