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conflicts resolved after merging with nr-polar-encoder-optimizations

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This commit is contained in:
Francesco Mani
2019-01-23 14:36:52 +01:00
parent 7405eec0f1 f2d5cfae0c
commit 0234a5c21a
100 changed files with 7937 additions and 7724 deletions
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cmake_targets/CMakeLists.txt
+7 -6
View File
@@ -963,7 +963,7 @@ set(UTIL_SRC
${OPENAIR_DIR}/common/utils/LOG/log.c
# ${OPENAIR2_DIR}/UTIL/LOG/vcd_signal_dumper.c
${OPENAIR2_DIR}/UTIL/MATH/oml.c
${OPENAIR2_DIR}/UTIL/MEM/mem_block.c
# ${OPENAIR2_DIR}/UTIL/MEM/mem_block.c
# ${OPENAIR2_DIR}/UTIL/OCG/OCG.c
# ${OPENAIR2_DIR}/UTIL/OCG/OCG_create_dir.c
# ${OPENAIR2_DIR}/UTIL/OCG/OCG_detect_file.c
@@ -1652,8 +1652,9 @@ set ( NR_LTE_UE_REUSE_SRC
${OPENAIR1_DIR}/PHY/CODING/viterbi.c
#${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/phich_common.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci_tools_common.c
#${OPENAIR1_DIR}/PHY/CODING/lte_rate_matching.c
# ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci_tools_common.c
# ${OPENAIR1_DIR}/PHY/CODING/lte_rate_matching.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte_lte.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte.c
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_gold.c
@@ -2561,13 +2562,13 @@ add_executable(ldpctest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c)
target_link_libraries(ldpctest SIMU PHY PHY_NR m ${ATLAS_LIBRARIES})
add_executable(nr_dlschsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlschsim.c ${T_SOURCE})
target_link_libraries(nr_dlschsim -Wl,--start-group UTIL SIMU PHY PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
target_link_libraries(nr_dlschsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
add_executable(nr_pbchsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pbchsim.c ${T_SOURCE})
target_link_libraries(nr_pbchsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
add_executable(nr_dlsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlsim.c ${T_SOURCE})
target_link_libraries(nr_dlsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
add_executable(nr_dlsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlsim.c ${T_SOURCE})
target_link_libraries(nr_dlsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR RRC_LIB NR_RRC_LIB CONFIG_LIB L2_NR -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim)
cmake_targets/autotests/test_case_list.xml
+16 -6
View File
@@ -1035,14 +1035,16 @@
<testCase id="015103">
<class>execution</class>
<desc>polartest Test cases. (Test1: PBCH polar test)</desc>
<desc>polartest Test cases. (Test1: PBCH polar test),
(Test2: DCI polar test)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/polartest.Rel15</main_exec>
<main_exec_args>-q -s-10 -f0</main_exec_args>
<main_exec_args>-q -s-10 -f0
-q -s-10 -f0 -m1</main_exec_args>
<tags>polartest.test1</tags>
<search_expr_true>BLER= 0.000000</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
@@ -1051,16 +1053,24 @@
<testCase id="015104">
<class>execution</class>
<desc>nr_pbchsim Test cases. (Test1: PBCH-only),
(Test2: PBCH and synchronization)</desc>
<desc>nr_pbchsim Test cases. (Test1: PBCH-only, 106 PRB),
(Test2: PBCH and synchronization, 106PBR),
(Test3: PBCH-only, 217 PRB),
(Test4: PBCH and synchronization, 217 RPB),
(Test5: PBCH-only, 217 PRB),
(Test6: PBCH and synchronization, 217 PRB)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_pbchsim.Rel15</main_exec>
<main_exec_args>-s-11 -S-10 -n1000
-s-11 -S-10 -n10 -I</main_exec_args>
<main_exec_args>-s-11 -S-10 -n1000 -R106
-s-11 -S-10 -n10 -I -R106
-s-11 -S-10 -n1000 -R217 -N10
-s-11 -S-10 -n10 -I -R217 -N10
-s-11 -S-10 -n1000 -R273 -N20
-s-11 -S-10 -n10 -I -R273 -N20</main_exec_args>
<tags>nr_pbchsim.test1 nr_pbchsim.test2</tags>
<search_expr_true>PBCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
cmake_targets/phy_simulators/CMakeLists.txt
+2 -2
View File
@@ -3,11 +3,11 @@ set(PACKAGE_NAME "unitary_tests_simulators")
set(PHYSIM True)
set(RF_BOARD None)
set(XFORMS True)
set(ENABLE_ITTI False)
set(ENABLE_ITTI True)
set(DEBUG_PHY False)
set(MU_RECIEVER False)
set(NAS_UE False)
set(MESSAGE_CHART_GENERATOR False)
set(RRC_ASN1_VERSION "Rel14")
set(RRC_ASN1_VERSION "Rel15")
set(T_TRACER True)
include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt)
common/utils/LOG/vcd_signal_dumper.c
+8 -8
View File
@@ -74,10 +74,10 @@ const char* eurecomVariablesNames[] = {
"frame_number_TX1_RU",
"frame_number_RX0_RU",
"frame_number_RX1_RU",
"subframe_number_TX0_RU",
"subframe_number_TX1_RU",
"subframe_number_RX0_RU",
"subframe_number_RX1_RU",
"tti_number_TX0_RU",
"tti_number_TX1_RU",
"tti_number_RX0_RU",
"tti_number_RX1_RU",
"runtime_TX_eNB",
"runtime_RX_eNB",
"frame_number_TX0_UE",
@@ -196,10 +196,10 @@ const char* eurecomVariablesNames[] = {
"frame_number_TX1_gNB",
"frame_number_RX0_gNB",
"frame_number_RX1_gNB",
"subframe_number_TX0_gNB",
"subframe_number_TX1_gNB",
"subframe_number_RX0_gNB",
"subframe_number_RX1_gNB"
"slot_number_TX0_gNB",
"slot_number_TX1_gNB",
"slot_number_RX0_gNB",
"slot_number_RX1_gNB"
};
const char* eurecomFunctionsNames[] = {
common/utils/LOG/vcd_signal_dumper.h
+8 -8
View File
@@ -51,10 +51,10 @@ typedef enum {
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_RUNTIME_TX_ENB,
VCD_SIGNAL_DUMPER_VARIABLES_RUNTIME_RX_ENB,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_UE,
@@ -173,10 +173,10 @@ typedef enum {
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_END
} vcd_signal_dump_variables;
common/utils/T/T_messages.txt
+24 -24
View File
@@ -1099,26 +1099,26 @@ ID = VCD_VARIABLE_FRAME_NUMBER_RX1_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = frame_number_RX1_RU
ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX0_RU
DESC = VCD variable SUBFRAME_NUMBER_TX0_RU
ID = VCD_VARIABLE_TTI_NUMBER_TX0_RU
DESC = VCD variable TTI_NUMBER_TX0_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_TX0_RU
ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX1_RU
DESC = VCD variable SUBFRAME_NUMBER_TX1_RU
VCD_NAME = tti_number_TX0_RU
ID = VCD_VARIABLE_TTI_NUMBER_TX1_RU
DESC = VCD variable TTI_NUMBER_TX1_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_TX1_RU
ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX0_RU
DESC = VCD variable SUBFRAME_NUMBER_RX0_RU
VCD_NAME = tti_number_TX1_RU
ID = VCD_VARIABLE_TTI_NUMBER_RX0_RU
DESC = VCD variable TTI_NUMBER_RX0_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_RX0_RU
ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX1_RU
DESC = VCD variable SUBFRAME_NUMBER_RX1_RU
VCD_NAME = tti_number_RX0_RU
ID = VCD_VARIABLE_TTI_NUMBER_RX1_RU
DESC = VCD variable TTI_NUMBER_RX1_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_RX1_RU
VCD_NAME = tti_number_RX1_RU
ID = VCD_VARIABLE_RUNTIME_TX_ENB
DESC = VCD variable RUNTIME_TX_ENB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
@@ -1701,26 +1701,26 @@ ID = VCD_VARIABLE_FRAME_NUMBER_RX1_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = frame_number_RX1_gNB
ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX0_GNB
DESC = VCD variable SUBFRAME_NUMBER_TX0_GNB
ID = VCD_VARIABLE_SLOT_NUMBER_TX0_GNB
DESC = VCD variable SLOT_NUMBER_TX0_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_TX0_gNB
ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX1_GNB
DESC = VCD variable SUBFRAME_NUMBER_TX1_GNB
VCD_NAME = slot_number_TX0_gNB
ID = VCD_VARIABLE_SLOT_NUMBER_TX1_GNB
DESC = VCD variable SLOT_NUMBER_TX1_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_TX1_gNB
ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX0_GNB
DESC = VCD variable SUBFRAME_NUMBER_RX0_GNB
VCD_NAME = slot_number_TX1_gNB
ID = VCD_VARIABLE_SLOT_NUMBER_RX0_GNB
DESC = VCD variable SLOT_NUMBER_RX0_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_RX0_gNB
ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX1_GNB
DESC = VCD variable SUBFRAME_NUMBER_RX1_GNB
VCD_NAME = slot_number_RX0_gNB
ID = VCD_VARIABLE_SLOT_NUMBER_RX1_GNB
DESC = VCD variable SLOT_NUMBER_RX1_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_RX1_gNB
VCD_NAME = slot_number_RX1_gNB
#functions
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+627 -626
View File
File diff suppressed because it is too large Load Diff
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
+12 -13
View File
@@ -72,7 +72,7 @@ typedef struct
// These TLVs are used by the VNF to configure the RF in the PNF
// nfapi_uint16_tlv_t max_transmit_power;
nfapi_uint16_tlv_t earfcn;
nfapi_uint16_tlv_t nrarfcn;
// nfapi_nmm_frequency_bands_t nmm_gsm_frequency_bands;
// nfapi_nmm_frequency_bands_t nmm_umts_frequency_bands;
@@ -95,7 +95,7 @@ typedef struct
#define NFAPI_NR_NFAPI_TIMING_INFO_MODE_TAG 0x511F
#define NFAPI_NR_NFAPI_TIMING_INFO_PERIOD_TAG 0x5120
#define NFAPI_NR_NFAPI_MAXIMUM_TRANSMIT_POWER_TAG 0x5128
#define NFAPI_NR_NFAPI_EARFCN_TAG 0x5129
#define NFAPI_NR_NFAPI_NRARFCN_TAG 0x5129
#define NFAPI_NR_NFAPI_NMM_GSM_FREQUENCY_BANDS_TAG 0x5130
#define NFAPI_NR_NFAPI_NMM_UMTS_FREQUENCY_BANDS_TAG 0x5131
#define NFAPI_NR_NFAPI_NMM_LTE_FREQUENCY_BANDS_TAG 0x5132
@@ -149,8 +149,6 @@ typedef struct {
#define NFAPI_NR_SUBFRAME_CONFIG_NUMEROLOGY_INDEX_MU_TAG 0x5006
typedef struct {
nfapi_uint16_tlv_t tx_antenna_ports;
nfapi_uint16_tlv_t rx_antenna_ports;
nfapi_uint16_tlv_t dl_carrier_bandwidth;
nfapi_uint16_tlv_t ul_carrier_bandwidth;
nfapi_uint16_tlv_t dl_bwp_subcarrierspacing;
@@ -161,18 +159,17 @@ typedef struct {
nfapi_uint16_tlv_t ul_absolutefrequencypointA;
nfapi_uint16_tlv_t dl_offsettocarrier;
nfapi_uint16_tlv_t ul_offsettocarrier;
nfapi_uint16_tlv_t dl_scs_subcarrierspacing;
nfapi_uint16_tlv_t ul_scs_subcarrierspacing;
nfapi_uint16_tlv_t dl_scs_specificcarrier_k0;
nfapi_uint16_tlv_t ul_scs_specificcarrier_k0;
nfapi_uint16_tlv_t dl_subcarrierspacing;
nfapi_uint16_tlv_t ul_subcarrierspacing;
nfapi_uint16_tlv_t dl_specificcarrier_k0;
nfapi_uint16_tlv_t ul_specificcarrier_k0;
nfapi_uint16_tlv_t NIA_subcarrierspacing;
} nfapi_nr_rf_config_t;
#define NFAPI_NR_RF_CONFIG_DL_CHANNEL_BANDWIDTH_TAG 0x500A
#define NFAPI_NR_RF_CONFIG_UL_CHANNEL_BANDWIDTH_TAG 0x500B
#define NFAPI_NR_RF_CONFIG_REFERENCE_SIGNAL_POWER_TAG 0x500C
#define NFAPI_NR_RF_CONFIG_TX_ANTENNA_PORTS_TAG 0x500D
#define NFAPI_NR_RF_CONFIG_RX_ANTENNA_PORTS_TAG 0x500E
#define NFAPI_NR_RF_CONFIG_DL_CARRIER_BANDWIDTH_TAG 0x500A
#define NFAPI_NR_RF_CONFIG_UL_CARRIER_BANDWIDTH_TAG 0x500B
#define NFAPI_NR_RF_CONFIG_DL_SUBCARRIERSPACING_TAG 0x500C
#define NFAPI_NR_RF_CONFIG_UL_SUBCARRIERSPACING_TAG 0x500D
typedef struct {
nfapi_uint16_tlv_t physical_cell_id;
@@ -511,6 +508,8 @@ typedef struct {
uint16_t rnti;
uint8_t rnti_type;
uint8_t dci_format;
/// Number of CRB in BWP that this DCI configures
uint16_t n_RB_BWP;
uint8_t config_type;
uint8_t search_space_type;
uint8_t common_search_space_type;
openair1/PHY/CODING/TESTBENCH/ldpctest.c
-3
View File
@@ -421,7 +421,6 @@ int test_ldpc(short No_iteration,
stop_meas(time_decoder);
}
//for (i=(Kb+nrows) * Zc-5;i<(Kb+nrows) * Zc;i++)
// printf("esimated_output[%d]=%d\n",i,esimated_output[i]);
@@ -435,8 +434,6 @@ int test_ldpc(short No_iteration,
///printf("test_input[0][%d]: %d \n",i,test_input[0][i]);
if (estimated_output[j][i] != test_input[j][i])
{
//////printf("error pos %d (%d, %d)\n\n",i,estimated_output[i],test_input[0][i]);
segment_bler = segment_bler + 1;
break;
openair1/PHY/CODING/TESTBENCH/polartest.c
+51 -50
View File
@@ -20,11 +20,8 @@ int main(int argc, char *argv[]) {
//Initiate timing. (Results depend on CPU Frequency. Therefore, might change due to performance variances during simulation.)
time_stats_t timeEncoder,timeDecoder;
time_stats_t polar_decoder_init,polar_rate_matching,decoding,bit_extraction,deinterleaving;
time_stats_t path_metric,sorting,update_LLR;
opp_enabled=1;
int decoder_int16=0;
int generate_optim_code=0;
cpu_freq_GHz = get_cpu_freq_GHz();
reset_meas(&timeEncoder);
reset_meas(&timeDecoder);
@@ -37,7 +34,7 @@ int main(int argc, char *argv[]) {
double SNR, SNR_lin;
int16_t nBitError = 0; // -1 = Decoding failed (All list entries have failed the CRC checks).
int8_t decoderState=0, blockErrorState=0; //0 = Success, -1 = Decoding failed, 1 = Block Error.
uint32_t decoderState=0, blockErrorState=0; //0 = Success, -1 = Decoding failed, 1 = Block Error.
uint16_t testLength = 0, coderLength = 0, blockErrorCumulative=0, bitErrorCumulative=0;
double timeEncoderCumulative = 0, timeDecoderCumulative = 0;
uint8_t aggregation_level = 8, decoderListSize = 8, pathMetricAppr = 0;
@@ -73,21 +70,20 @@ int main(int argc, char *argv[]) {
pathMetricAppr = (uint8_t) atoi(optarg);
break;
case 'q':
decoder_int16=1;
break;
case 'q':
decoder_int16 = 1;
break;
case 'g':
generate_optim_code=1;
iterations=1;
SNRstart=-6.0;
SNRstop =-6.0;
decoder_int16=1;
break;
case 'g':
iterations = 1;
SNRstart = -6.0;
SNRstop = -6.0;
decoder_int16 = 1;
break;
case 'h':
printf("./polartest -s SNRstart -d SNRinc -f SNRstop -m [0=PBCH|1=DCI|2=UCI] -i iterations -l decoderListSize -a pathMetricAppr -q (use fixed point decoder)\n");
exit(-1);
case 'h':
printf("./polartest -s SNRstart -d SNRinc -f SNRstop -m [0=PBCH|1=DCI|2=UCI] -i iterations -l decoderListSize -a pathMetricAppr\n");
exit(-1);
default:
perror("[polartest.c] Problem at argument parsing with getopt");
@@ -95,13 +91,13 @@ int main(int argc, char *argv[]) {
}
if (polarMessageType == 0) { //PBCH
testLength = NR_POLAR_PBCH_PAYLOAD_BITS;
testLength = 64;//NR_POLAR_PBCH_PAYLOAD_BITS;
coderLength = NR_POLAR_PBCH_E;
aggregation_level = NR_POLAR_PBCH_AGGREGATION_LEVEL;
} else if (polarMessageType == 1) { //DCI
//testLength = nr_get_dci_size(params_rel15->dci_format, params_rel15->rnti_type, &fp->initial_bwp_dl, cfg);
testLength = 20;
coderLength = 108; //to be changed by aggregate level function.
testLength = 41; //20;
coderLength = 108*8; //to be changed by aggregate level function.
} else if (polarMessageType == -1) { //UCI
//testLength = ;
//coderLength = ;
@@ -149,18 +145,18 @@ int main(int argc, char *argv[]) {
uint8_t testArrayLength = ceil(testLength / 32.0);
uint8_t coderArrayLength = ceil(coderLength / 32.0);
uint32_t *testInput = malloc(sizeof(uint32_t) * testArrayLength); //generate randomly
uint32_t *encoderOutput = malloc(sizeof(uint32_t) * coderArrayLength);
uint32_t *estimatedOutput = malloc(sizeof(uint32_t) * testArrayLength); //decoder output
uint32_t testInput[testArrayLength]; //generate randomly
uint32_t encoderOutput[coderArrayLength];
uint32_t estimatedOutput[testArrayLength]; //decoder output
memset(testInput,0,sizeof(uint32_t) * testArrayLength);
memset(encoderOutput,0,sizeof(uint32_t) * coderArrayLength);
memset(estimatedOutput,0,sizeof(uint32_t) * testArrayLength);
uint8_t *encoderOutputByte = malloc(sizeof(uint8_t) * coderLength);
double *modulatedInput = malloc (sizeof(double) * coderLength); //channel input
double *channelOutput = malloc (sizeof(double) * coderLength); //add noise
int16_t *channelOutput_int16;
if (decoder_int16 == 1) channelOutput_int16 = (int16_t*)malloc (sizeof(int16_t) * coderLength);
uint8_t encoderOutputByte[coderLength];
double modulatedInput[coderLength]; //channel input
double channelOutput[coderLength]; //add noise
int16_t channelOutput_int16[coderLength];
t_nrPolar_paramsPtr nrPolar_params = NULL, currentPtr = NULL;
nr_polar_init(&nrPolar_params, polarMessageType, testLength, aggregation_level);
@@ -211,6 +207,8 @@ int main(int argc, char *argv[]) {
rnti);
printf("dci_estimation: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
dci_estimation[0], dci_estimation[1], dci_estimation[2], dci_estimation[3]);
free(encoder_outputByte);
free(channel_output);
return 0;
#endif
@@ -270,7 +268,7 @@ int main(int argc, char *argv[]) {
uint8_t nr_polar_A[32] = {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,1};
uint8_t nr_polar_crc[24];
uint8_t **crc_generator_matrix = crc24c_generator_matrix(32);
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(nr_polar_A,
nr_matrix_multiplication_uint8_1D_uint8_2D(nr_polar_A,
crc_generator_matrix,
nr_polar_crc,
32,
@@ -326,10 +324,18 @@ int main(int argc, char *argv[]) {
for (int i=0; i<32; i++)
printf("%d\n",(testInput[0]>>i)&1);*/
start_meas(&timeEncoder);
polar_encoder(testInput, encoderOutput, currentPtr);
stop_meas(&timeEncoder);
int len_mod64=currentPtr->payloadBits&63;
((uint64_t*)testInput)[currentPtr->payloadBits/64]&=((((uint64_t)1)<<len_mod64)-1);
start_meas(&timeEncoder);
if (decoder_int16==0)
polar_encoder(testInput, encoderOutput, currentPtr);
else
polar_encoder_fast((uint64_t*)testInput, encoderOutput,0, currentPtr);
//polar_encoder_fast((uint64_t*)testInput, (uint64_t*)encoderOutput,0, currentPtr);
stop_meas(&timeEncoder);
/*printf("encoderOutput: [0]->0x%08x\n", encoderOutput[0]);
printf("encoderOutput: [1]->0x%08x\n", encoderOutput[1]);*/
@@ -371,7 +377,7 @@ int main(int argc, char *argv[]) {
aPrioriArray);
else
decoderState = polar_decoder_int16(channelOutput_int16,
estimatedOutput,
(uint64_t*)estimatedOutput,
currentPtr);
@@ -381,17 +387,20 @@ int main(int argc, char *argv[]) {
//calculate errors
if (decoderState==-1) {
if (decoderState!=0) {
blockErrorState=-1;
nBitError=-1;
} else {
for (int i = 0; i < testArrayLength; i++) {
for (int j = 0; j < (sizeof(testInput[0])*8); j++) {
if (((estimatedOutput[i]>>j) & 1) != ((testInput[i]>>j) & 1)) nBitError++;
}
}
for (int j = 0; j < currentPtr->payloadBits; j++) {
if (((estimatedOutput[0]>>j) & 1) != ((testInput[0]>>j) & 1)) nBitError++;
// printf("bit %d: %d => %d\n",j,(testInput[0]>>j)&1,(estimatedOutput[0]>>j)&1);
}
if (nBitError>0) blockErrorState=1;
if (nBitError>0) {
blockErrorState=1;
// printf("Error: Input %x, Output %x\n",testInput[0],estimatedOutput[0]);
}
}
//Iteration times are in microseconds.
@@ -417,7 +426,8 @@ int main(int argc, char *argv[]) {
printf("[ListSize=%d, Appr=%d] SNR=%+8.3f, BLER=%9.6f, BER=%12.9f, t_Encoder=%9.3fus, t_Decoder=%9.3fus\n",
decoderListSize, pathMetricAppr, SNR, ((double)blockErrorCumulative/iterations),
((double)bitErrorCumulative / (iterations*testLength)),
(timeEncoderCumulative/iterations),timeDecoderCumulative/iterations);
(double)timeEncoder.diff/timeEncoder.trials/(cpu_freq_GHz*1000.0),(double)timeDecoder.diff/timeDecoder.trials/(cpu_freq_GHz*1000.0));
//(timeEncoderCumulative/iterations),timeDecoderCumulative/iterations);
if (blockErrorCumulative==0 && bitErrorCumulative==0)
break;
@@ -430,14 +440,5 @@ int main(int argc, char *argv[]) {
print_meas(&timeDecoder,"polar_decoder",NULL,NULL);
fclose(logFile);
//Bit
free(testInput);
free(encoderOutput);
free(estimatedOutput);
//Byte
free(encoderOutputByte);
free(modulatedInput);
free(channelOutput);
return (0);
}
openair1/PHY/CODING/coding_defs.h
+3 -3
View File
@@ -342,7 +342,7 @@ void ccodedab_init_inv(void);
/*!\fn void crcTableInit(void)
\brief This function initializes the different crc tables.*/
//void crcTableInit (void);
void crcTableInit (void);
@@ -387,6 +387,8 @@ unsigned int crc12 (unsigned char * inptr, int bitlen);
@param inPtr Pointer to input byte stream
@param bitlen length of inputs in bits*/
unsigned int crc8 (unsigned char * inptr, int bitlen);
int check_crc(uint8_t* decoded_bytes, uint32_t n, uint32_t F, uint8_t crc_type);
/*!\fn void phy_viterbi_dot11_sse2(int8_t *y, uint8_t *decoded_bytes, uint16_t n,int offset,int traceback)
\brief This routine performs a SIMD optmized Viterbi decoder for the 802.11 64-state convolutional code. It can be
@@ -441,8 +443,6 @@ int32_t rate_matching_lte(uint32_t N_coded,
uint8_t *inPtr,
uint32_t off);
void crcTableInit (void);
unsigned int crcbit (unsigned char * inputptr, int octetlen, unsigned int poly);
int16_t reverseBits(int32_t ,int32_t);
openair1/PHY/CODING/crc_byte.c
+4 -6
View File
@@ -58,8 +58,8 @@ The first bit is in the MSB of each byte
*********************************************************/
unsigned int crcbit (unsigned char * inputptr,
int octetlen,
unsigned int poly)
int octetlen,
unsigned int poly)
{
unsigned int i, crc = 0, c;
@@ -170,14 +170,12 @@ unsigned int crc24c (unsigned char * inptr,
resbit = (bitlen % 8);
while (octetlen-- > 0) {
/*#ifdef DEBUG_CRC24C
printf("crc24c: in %x => crc %x (%x)\n",crc,*inptr,crc24cTable[(*inptr) ^ (crc >> 24)]);
#endif*/
crc = (crc << 8) ^ crc24cTable[(*inptr++) ^ (crc >> 24)];
}
if (resbit > 0)
if (resbit > 0) {
crc = (crc << resbit) ^ crc24cTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
}
return crc;
}
openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c
+4 -5
View File
@@ -201,7 +201,7 @@ void encode_parity_check_part_optim(uint8_t *c,uint8_t *d, short BG,short Zc,sho
int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
{
short Zc,Kb,nrows,ncols;
short Zc,Kb=0,nrows=0,ncols=0;
int i,i1;
int no_punctured_columns,removed_bit;
@@ -210,7 +210,6 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
int simd_size;
//determine number of bits in codeword
//determine number of bits in codeword
//if (block_length>3840)
if (BG==1)
@@ -256,7 +255,7 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
#endif
if ((Zc&31) > 0) simd_size = 16;
else simd_size = 32;
else simd_size = 32;
unsigned char c[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size
unsigned char d[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size
@@ -321,7 +320,7 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,short block_length,short BG,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
{
short Zc,Kb,nrows,ncols;
short Zc,Kb=0,nrows=0,ncols=0;
int i,i1,j;
int no_punctured_columns,removed_bit;
//Table of possible lifting sizes
@@ -521,7 +520,7 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **channel_input,short block_length, short BG, int n_segments,unsigned int macro_num, time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
{
short Zc,Kb,nrows,ncols;
short Zc,Kb=0,nrows=0,ncols=0;
int i,i1,j;
int no_punctured_columns,removed_bit;
//Table of possible lifting sizes
openair1/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c
+10 -1
View File
@@ -367,7 +367,13 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
unsigned char d[68*384]; //coded output, unpacked, max size
unsigned char channel_temp,temp;
short *Gen_shift_values, *no_shift_values, *pointer_shift_values;
short Zc,Kb,nrows,ncols;
short Zc;
//initialize for BG == 1
short Kb = 22;
short nrows = 46;//parity check bits
short ncols = 22;//info bits
int i,i1,i2,i3,i4,i5,temp_prime,var;
int no_punctured_columns,removed_bit;
//Table of possible lifting sizes
@@ -438,6 +444,9 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
no_shift_values=(short *) no_shift_values_BG2;
pointer_shift_values=(short *) pointer_shift_values_BG2;
}
else {
AssertFatal(0,"BG %d is not supported yet\n",BG);
}
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc;
removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(block_length*3);
openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
+156 -73
View File
@@ -37,7 +37,7 @@
*/
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
#include "assertions.h"
int8_t polar_decoder(
double *input,
@@ -48,11 +48,11 @@ int8_t polar_decoder(
{
//Assumes no a priori knowledge.
uint8_t ***bit = nr_alloc_uint8_t_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
uint8_t **bitUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
uint8_t **llrUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
uint8_t ***bit = nr_alloc_uint8_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
uint8_t **bitUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
uint8_t **llrUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
double ***llr = nr_alloc_double_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
uint8_t **crcChecksum = nr_alloc_uint8_t_2D_array(polarParams->crcParityBits, 2*listSize);
uint8_t **crcChecksum = nr_alloc_uint8_2D_array(polarParams->crcParityBits, 2*listSize);
double *pathMetric = malloc(sizeof(double)*(2*listSize));
uint8_t *crcState = malloc(sizeof(uint8_t)*(2*listSize)); //0=False, 1=True
@@ -231,9 +231,9 @@ int8_t polar_decoder(
free(d_tilde);
free(pathMetric);
free(crcState);
nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
return(-1);
}
@@ -256,6 +256,7 @@ int8_t polar_decoder(
//Deinterleaving (ĉ to b)
nr_polar_deinterleaver(polarParams->nr_polar_CPrime, polarParams->nr_polar_B, polarParams->interleaving_pattern, polarParams->K);
//Remove the CRC (â)
for (int j = 0; j < polarParams->payloadBits; j++) polarParams->nr_polar_A[j]=polarParams->nr_polar_B[j];
@@ -266,11 +267,11 @@ int8_t polar_decoder(
free(d_tilde);
free(pathMetric);
free(crcState);
nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
nr_free_uint8_t_2D_array(extended_crc_generator_matrix, polarParams->K);
nr_free_uint8_t_2D_array(tempECGM, polarParams->K);
nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
nr_free_uint8_2D_array(extended_crc_generator_matrix, polarParams->K);
nr_free_uint8_2D_array(tempECGM, polarParams->K);
/*
* Return bits.
@@ -280,17 +281,17 @@ int8_t polar_decoder(
}
int8_t polar_decoder_aPriori(double *input,
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
uint8_t listSize,
uint8_t pathMetricAppr,
double *aPrioriPayload)
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
uint8_t listSize,
uint8_t pathMetricAppr,
double *aPrioriPayload)
{
uint8_t ***bit = nr_alloc_uint8_t_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
uint8_t **bitUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
uint8_t **llrUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
uint8_t ***bit = nr_alloc_uint8_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
uint8_t **bitUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
uint8_t **llrUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
double ***llr = nr_alloc_double_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
uint8_t **crcChecksum = nr_alloc_uint8_t_2D_array(polarParams->crcParityBits, 2*listSize);
uint8_t **crcChecksum = nr_alloc_uint8_2D_array(polarParams->crcParityBits, 2*listSize);
double *pathMetric = malloc(sizeof(double)*(2*listSize));
uint8_t *crcState = malloc(sizeof(uint8_t)*(2*listSize)); //0=False, 1=True
@@ -483,9 +484,9 @@ int8_t polar_decoder_aPriori(double *input,
free(d_tilde);
free(pathMetric);
free(crcState);
nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
return(-1);
}
@@ -509,8 +510,8 @@ int8_t polar_decoder_aPriori(double *input,
nr_polar_deinterleaver(polarParams->nr_polar_CPrime, polarParams->nr_polar_B, polarParams->interleaving_pattern, polarParams->K);
//Remove the CRC (â)
for (int j = 0; j < polarParams->payloadBits; j++) polarParams->nr_polar_A[j]=polarParams->nr_polar_B[j];
for (int j = 0; j < polarParams->payloadBits; j++)
polarParams->nr_polar_A[j]=polarParams->nr_polar_B[j];
break;
}
}
@@ -518,16 +519,17 @@ int8_t polar_decoder_aPriori(double *input,
free(d_tilde);
free(pathMetric);
free(crcState);
nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
nr_free_uint8_t_2D_array(extended_crc_generator_matrix, polarParams->K);
nr_free_uint8_t_2D_array(tempECGM, polarParams->K);
nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
nr_free_uint8_2D_array(extended_crc_generator_matrix, polarParams->K);
nr_free_uint8_2D_array(tempECGM, polarParams->K);
/*
* Return bits.
*/
nr_byte2bit_uint8_32_t(polarParams->nr_polar_A, polarParams->payloadBits, out);
return(0);
}
@@ -544,11 +546,11 @@ int8_t polar_decoder_aPriori_timing(double *input,
FILE* logFile)
{
uint8_t ***bit = nr_alloc_uint8_t_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
uint8_t **bitUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
uint8_t **llrUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
uint8_t ***bit = nr_alloc_uint8_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
uint8_t **bitUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
uint8_t **llrUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
double ***llr = nr_alloc_double_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
uint8_t **crcChecksum = nr_alloc_uint8_t_2D_array(polarParams->crcParityBits, 2*listSize);
uint8_t **crcChecksum = nr_alloc_uint8_2D_array(polarParams->crcParityBits, 2*listSize);
double *pathMetric = malloc(sizeof(double)*(2*listSize));
uint8_t *crcState = malloc(sizeof(uint8_t)*(2*listSize)); //0=False, 1=True
@@ -740,9 +742,9 @@ int8_t polar_decoder_aPriori_timing(double *input,
free(d_tilde);
free(pathMetric);
free(crcState);
nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
return(-1);
}
@@ -775,11 +777,11 @@ int8_t polar_decoder_aPriori_timing(double *input,
free(d_tilde);
free(pathMetric);
free(crcState);
nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
nr_free_uint8_t_2D_array(extended_crc_generator_matrix, polarParams->K);
nr_free_uint8_t_2D_array(tempECGM, polarParams->K);
nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
nr_free_uint8_2D_array(extended_crc_generator_matrix, polarParams->K);
nr_free_uint8_2D_array(tempECGM, polarParams->K);
/*
* Return bits.
@@ -797,11 +799,11 @@ int8_t polar_decoder_dci(double *input,
uint16_t n_RNTI)
{
uint8_t ***bit = nr_alloc_uint8_t_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
uint8_t **bitUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
uint8_t **llrUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
uint8_t ***bit = nr_alloc_uint8_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
uint8_t **bitUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
uint8_t **llrUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
double ***llr = nr_alloc_double_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
uint8_t **crcChecksum = nr_alloc_uint8_t_2D_array(polarParams->crcParityBits, 2*listSize);
uint8_t **crcChecksum = nr_alloc_uint8_2D_array(polarParams->crcParityBits, 2*listSize);
double *pathMetric = malloc(sizeof(double)*(2*listSize));
uint8_t *crcState = malloc(sizeof(uint8_t)*(2*listSize)); //0=False, 1=True
uint8_t extended_crc_scrambling_pattern[polarParams->crcParityBits];
@@ -989,9 +991,9 @@ int8_t polar_decoder_dci(double *input,
free(d_tilde);
free(pathMetric);
free(crcState);
nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
return(-1);
}
@@ -1024,11 +1026,11 @@ int8_t polar_decoder_dci(double *input,
free(d_tilde);
free(pathMetric);
free(crcState);
nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
nr_free_uint8_t_2D_array(extended_crc_generator_matrix, polarParams->K);
nr_free_uint8_t_2D_array(tempECGM, polarParams->K);
nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
nr_free_uint8_2D_array(extended_crc_generator_matrix, polarParams->K);
nr_free_uint8_2D_array(tempECGM, polarParams->K);
/*
* Return bits.
@@ -1037,49 +1039,130 @@ int8_t polar_decoder_dci(double *input,
return(0);
}
void init_polar_deinterleaver_table(t_nrPolar_params *polarParams) {
int8_t polar_decoder_int16(int16_t *input,
uint8_t *out,
t_nrPolar_params *polarParams)
AssertFatal(polarParams->K > 32, "K = %d < 33, is not supported yet\n",polarParams->K);
AssertFatal(polarParams->K < 129, "K = %d > 128, is not supported yet\n",polarParams->K);
int bit_i,ip,ipmod64;
int numbytes = polarParams->K>>3;
int residue = polarParams->K&7;
int numbits;
if (residue>0) numbytes++;
for (int byte=0;byte<numbytes;byte++) {
if (byte<(polarParams->K>>3)) numbits=8;
else numbits=residue;
for (int i=0;i<numbits;i++) {
// flip bit endian for B
ip=polarParams->K - 1 - polarParams->interleaving_pattern[(8*byte)+i];
#if 0
printf("byte %d, i %d => ip %d\n",byte,i,ip);
#endif
ipmod64 = ip&63;
AssertFatal(ip<128,"ip = %d\n",ip);
for (int val=0;val<256;val++) {
bit_i=(val>>i)&1;
if (ip<64) polarParams->B_tab0[byte][val] |= (((uint64_t)bit_i)<<ipmod64);
else polarParams->B_tab1[byte][val] |= (((uint64_t)bit_i)<<ipmod64);
}
}
}
}
uint32_t polar_decoder_int16(int16_t *input,
uint64_t *out,
t_nrPolar_params *polarParams)
{
int16_t d_tilde[polarParams->N];// = malloc(sizeof(double) * polarParams->N);
nr_polar_rate_matching_int16(input, d_tilde, polarParams->rate_matching_pattern, polarParams->K, polarParams->N, polarParams->encoderLength);
for (int i=0;i<polarParams->N;i++) {
if (d_tilde[i]<-128) d_tilde[i]=-128;
else if (d_tilde[i]>127) d_tilde[i]=128;
}
memcpy((void*)&polarParams->tree.root->alpha[0],(void*)&d_tilde[0],sizeof(int16_t)*polarParams->N);
/*
* SCL polar decoder.
*/
generic_polar_decoder(polarParams,polarParams->tree.root);
//Extract the information bits (û to ĉ)
nr_polar_info_bit_extraction(polarParams->nr_polar_U, polarParams->nr_polar_CPrime, polarParams->information_bit_pattern, polarParams->N);
uint64_t Cprime[4]={0,0,0,0};
uint64_t B[4]={0,0,0,0};
for (int i=0;i<polarParams->K;i++) Cprime[i>>6] = Cprime[i>>6] | ((uint64_t)polarParams->nr_polar_U[polarParams->Q_I_N[i]])<<(i&63);
//Deinterleaving (ĉ to b)
nr_polar_deinterleaver(polarParams->nr_polar_CPrime, polarParams->nr_polar_B, polarParams->interleaving_pattern, polarParams->K);
//Remove the CRC (â)
//for (int j = 0; j < polarParams->payloadBits; j++) polarParams->nr_polar_A[j]=polarParams->nr_polar_B[j];
// Check the CRC
for (int j=0;j<polarParams->crcParityBits;j++) {
int crcbit=0;
for (int i=0;i<polarParams->payloadBits;i++)
crcbit = crcbit ^ (polarParams->crc_generator_matrix[i][j] & polarParams->nr_polar_B[i]);
if (crcbit != polarParams->nr_polar_B[polarParams->payloadBits+j]) return(-1);
uint8_t *Cprimebyte = (uint8_t*)Cprime;
if (polarParams->K<65) {
B[0] = polarParams->B_tab0[0][Cprimebyte[0]] |
polarParams->B_tab0[1][Cprimebyte[1]] |
polarParams->B_tab0[2][Cprimebyte[2]] |
polarParams->B_tab0[3][Cprimebyte[3]] |
polarParams->B_tab0[4][Cprimebyte[4]] |
polarParams->B_tab0[5][Cprimebyte[5]] |
polarParams->B_tab0[6][Cprimebyte[6]] |
polarParams->B_tab0[7][Cprimebyte[7]];
}
// pack into ceil(payloadBits/32) 32 bit words, lowest index in MSB
// nr_byte2bit_uint8_32_t(polarParams->nr_polar_A, polarParams->payloadBits, out);
nr_byte2bit_uint8_32_t(polarParams->nr_polar_B, polarParams->payloadBits, (unsigned int *)out);
return(0);
else if (polarParams->K<129) {
int len = polarParams->K/8;
if ((polarParams->K&7) > 0) len++;
for (int k=0;k<len;k++) {
B[0] |= polarParams->B_tab0[k][Cprimebyte[k]];
B[1] |= polarParams->B_tab1[k][Cprimebyte[k]];
}
}
int len=polarParams->payloadBits;
//int len_mod64=len&63;
int crclen = polarParams->crcParityBits;
uint64_t rxcrc=B[0]&((1<<crclen)-1);
uint32_t crc;
uint64_t Ar;
AssertFatal(len<65,"A must be less than 65 bits\n");
if (len<=32) {
Ar = (uint32_t)(B[0]>>crclen);
uint8_t A32_flip[4];
uint32_t Aprime= (uint32_t)(Ar<<(32-len));
A32_flip[0]=((uint8_t*)&Aprime)[3];
A32_flip[1]=((uint8_t*)&Aprime)[2];
A32_flip[2]=((uint8_t*)&Aprime)[1];
A32_flip[3]=((uint8_t*)&Aprime)[0];
crc = (uint64_t)(crc24c(A32_flip,len)>>8);
}
else if (len<=64) {
Ar = (B[0]>>crclen) | (B[1]<<(64-crclen));;
uint8_t A64_flip[8];
uint64_t Aprime= (uint32_t)(Ar<<(64-len));
A64_flip[0]=((uint8_t*)&Aprime)[7];
A64_flip[1]=((uint8_t*)&Aprime)[6];
A64_flip[2]=((uint8_t*)&Aprime)[5];
A64_flip[3]=((uint8_t*)&Aprime)[4];
A64_flip[4]=((uint8_t*)&Aprime)[3];
A64_flip[5]=((uint8_t*)&Aprime)[2];
A64_flip[6]=((uint8_t*)&Aprime)[1];
A64_flip[7]=((uint8_t*)&Aprime)[0];
crc = (uint64_t)(crc24c(A64_flip,len)>>8);
}
#if 0
printf("A %llx B %llx|%llx Cprime %llx|%llx (crc %x,rxcrc %llx %d)\n",
Ar,
B[1],B[0],Cprime[1],Cprime[0],crc,
rxcrc,polarParams->payloadBits);
#endif
out[0]=Ar;
return(crc^rxcrc);
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c
+20 -15
View File
@@ -34,18 +34,18 @@
#include "PHY/sse_intrin.h"
#include "PHY/impl_defs_top.h"
//#define DEBUG_NEW_IMPL
//#define DEBUG_NEW_IMPL 1
void updateLLR(double ***llr,
uint8_t **llrU,
uint8_t ***bit,
uint8_t **bitU,
uint8_t listSize,
uint16_t row,
uint16_t col,
uint16_t xlen,
uint8_t ylen,
uint8_t approximation)
uint8_t **llrU,
uint8_t ***bit,
uint8_t **bitU,
uint8_t listSize,
uint16_t row,
uint16_t col,
uint16_t xlen,
uint8_t ylen,
uint8_t approximation)
{
uint16_t offset = (xlen/(pow(2,(ylen-col-1))));
for (uint8_t i=0; i<listSize; i++) {
@@ -219,8 +219,8 @@ decoder_node_t *add_nodes(int level,int first_leaf_index,t_nrPolar_params *pp) {
decoder_node_t *new_node = new_decoder_node(first_leaf_index,level);
#ifdef DEBUG_NEW_IMPL
printf("New node %d order %d, level %d\n",pp->tree.num_nodes,Nv,level);
pp->tree.num_nodes++;
#endif
pp->tree.num_nodes++;
if (level==0) {
#ifdef DEBUG_NEW_IMPL
printf("leaf %d (%s)\n",first_leaf_index,pp->information_bit_pattern[first_leaf_index]==1 ? "information or crc" : "frozen");
@@ -233,16 +233,19 @@ decoder_node_t *add_nodes(int level,int first_leaf_index,t_nrPolar_params *pp) {
for (int i=0;i<Nv;i++) {
if (pp->information_bit_pattern[i+first_leaf_index]>0) all_frozen_below=0;
}
if (all_frozen_below==0) new_node->left=add_nodes(level-1,first_leaf_index,pp);
else {
if (all_frozen_below==0) new_node->left=add_nodes(level-1,first_leaf_index,pp);
else {
#ifdef DEBUG_NEW_IMPL
printf("aggregating frozen bits %d ... %d at level %d (%s)\n",first_leaf_index,first_leaf_index+Nv-1,level,((first_leaf_index/Nv)&1)==0?"left":"right");
printf("aggregating frozen bits %d ... %d at level %d (%s)\n",first_leaf_index,first_leaf_index+Nv-1,level,((first_leaf_index/Nv)&1)==0?"left":"right");
#endif
new_node->leaf=1;
new_node->all_frozen=1;
}
if (all_frozen_below==0) new_node->right=add_nodes(level-1,first_leaf_index+(Nv/2),pp);
#ifdef DEBUG_NEW_IMPL
printf("new_node (%d): first_leaf_index %d, left %p, right %p\n",Nv,first_leaf_index,new_node->left,new_node->right);
#endif
return(new_node);
}
@@ -251,7 +254,9 @@ void build_decoder_tree(t_nrPolar_params *pp) {
pp->tree.num_nodes=0;
pp->tree.root = add_nodes(pp->n,0,pp);
#ifdef DEBUG_NEW_IMPL
printf("root : left %p, right %p\n",pp->tree.root->left,pp->tree.root->right);
#endif
}
#if defined(__arm__) || defined(__aarch64__)
openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h
+189 -161
View File
@@ -78,54 +78,62 @@ typedef struct decoder_tree_t_s {
} decoder_tree_t;
struct nrPolar_params {
//messageType: 0=PBCH, 1=DCI, -1=UCI
int idx; //idx = (messageType * messageLength * aggregation_prime);
struct nrPolar_params *nextPtr;
uint8_t n_max;
uint8_t i_il;
uint8_t i_seg;
uint8_t n_pc;
uint8_t n_pc_wm;
uint8_t i_bil;
uint16_t payloadBits;
uint16_t encoderLength;
uint8_t crcParityBits;
uint8_t crcCorrectionBits;
uint16_t K;
uint16_t N;
uint8_t n;
uint32_t crcBit;
uint16_t *interleaving_pattern;
uint16_t *rate_matching_pattern;
const uint16_t *Q_0_Nminus1;
int16_t *Q_I_N;
int16_t *Q_F_N;
int16_t *Q_PC_N;
uint8_t *information_bit_pattern;
uint16_t *channel_interleaver_pattern;
uint32_t crc_polynomial;
uint8_t **crc_generator_matrix; //G_P
uint8_t **G_N;
uint32_t* crc256Table;
//messageType: 0=PBCH, 1=DCI, -1=UCI
int idx; //idx = (messageType * messageLength * aggregation_prime);
struct nrPolar_params *nextPtr;
uint8_t n_max;
uint8_t i_il;
uint8_t i_seg;
uint8_t n_pc;
uint8_t n_pc_wm;
uint8_t i_bil;
uint16_t payloadBits;
uint16_t encoderLength;
uint8_t crcParityBits;
uint8_t crcCorrectionBits;
uint16_t K;
uint16_t N;
uint8_t n;
uint32_t crcBit;
uint16_t *interleaving_pattern;
uint16_t *deinterleaving_pattern;
uint16_t *rate_matching_pattern;
const uint16_t *Q_0_Nminus1;
int16_t *Q_I_N;
int16_t *Q_F_N;
int16_t *Q_PC_N;
uint8_t *information_bit_pattern;
uint16_t *channel_interleaver_pattern;
uint32_t crc_polynomial;
uint8_t **crc_generator_matrix; //G_P
uint8_t **G_N;
uint64_t **G_N_tab;
int groupsize;
int *rm_tab;
uint64_t cprime_tab0[32][256];
uint64_t cprime_tab1[32][256];
uint64_t B_tab0[32][256];
uint64_t B_tab1[32][256];
uint32_t* crc256Table;
uint8_t **extended_crc_generator_matrix;
//lowercase: bits, Uppercase: Bits stored in bytes
//polar_encoder vectors
uint8_t *nr_polar_crc;
uint8_t *nr_polar_aPrime;
uint8_t *nr_polar_APrime;
uint8_t *nr_polar_D;
uint8_t *nr_polar_E;
//Polar Coding vectors
uint8_t *nr_polar_A;
uint8_t *nr_polar_CPrime;
uint8_t *nr_polar_B;
uint8_t *nr_polar_U;
decoder_tree_t tree;
//lowercase: bits, Uppercase: Bits stored in bytes
//polar_encoder vectors
uint8_t *nr_polar_crc;
uint8_t *nr_polar_aPrime;
uint8_t *nr_polar_APrime;
uint8_t *nr_polar_D;
uint8_t *nr_polar_E;
//Polar Coding vectors
uint8_t *nr_polar_A;
uint8_t *nr_polar_CPrime;
uint8_t *nr_polar_B;
uint8_t *nr_polar_U;
decoder_tree_t tree;
} __attribute__ ((__packed__));
typedef struct nrPolar_params t_nrPolar_params;
typedef t_nrPolar_params *t_nrPolar_paramsPtr;
@@ -139,11 +147,10 @@ void polar_encoder_dci(uint32_t *in,
t_nrPolar_paramsPtr polarParams,
uint16_t n_RNTI);
void polar_encoder_timing(uint32_t *in,
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
double cpuFreqGHz,
FILE* logFile);
void polar_encoder_fast(uint64_t *A,
uint32_t *out,
int32_t crcmask,
t_nrPolar_paramsPtr polarParams);
int8_t polar_decoder(double *input,
uint8_t *output,
@@ -151,6 +158,10 @@ int8_t polar_decoder(double *input,
uint8_t listSize,
uint8_t pathMetricAppr);
uint32_t polar_decoder_int16(int16_t *input,
uint64_t *out,
t_nrPolar_params *polarParams);
int8_t polar_decoder_aPriori(double *input,
uint32_t *output,
t_nrPolar_paramsPtr polarParams,
@@ -174,7 +185,12 @@ int8_t polar_decoder_dci(double *input,
uint8_t pathMetricAppr,
uint16_t n_RNTI);
void generic_polar_decoder(t_nrPolar_params *,decoder_node_t *);
void generic_polar_decoder(t_nrPolar_params *,
decoder_node_t *);
void build_decoder_tree(t_nrPolar_params *pp);
void build_polar_tables(t_nrPolar_paramsPtr polarParams);
void init_polar_deinterleaver_table(t_nrPolar_params *polarParams);
void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
int8_t messageType,
@@ -200,153 +216,168 @@ const uint16_t* nr_polar_sequence_pattern(uint8_t n);
* @param E
* @param n_max */
uint32_t nr_polar_output_length(uint16_t K,
uint16_t E,
uint8_t n_max);
uint16_t E,
uint8_t n_max);
void nr_polar_channel_interleaver_pattern(uint16_t *cip,
uint8_t I_BIL,
uint16_t E);
uint8_t I_BIL,
uint16_t E);
void nr_polar_rate_matching_pattern(uint16_t *rmp,
uint16_t *J,
const uint8_t *P_i_,
uint16_t K,
uint16_t N,
uint16_t E);
uint16_t *J,
const uint8_t *P_i_,
uint16_t K,
uint16_t N,
uint16_t E);
void nr_polar_rate_matching(double *input,
double *output,
uint16_t *rmp,
uint16_t K,
uint16_t N,
uint16_t E);
double *output,
uint16_t *rmp,
uint16_t K,
uint16_t N,
uint16_t E);
void nr_polar_rate_matching_int16(int16_t *input, int16_t *output, uint16_t *rmp, uint16_t K, uint16_t N, uint16_t E);
void nr_polar_rate_matching_int16(int16_t *input,
int16_t *output,
uint16_t *rmp,
uint16_t K,
uint16_t N,
uint16_t E);
void nr_polar_interleaving_pattern(uint16_t K,
uint8_t I_IL,
uint16_t *PI_k_);
uint8_t I_IL,
uint16_t *PI_k_);
void nr_polar_info_bit_pattern(uint8_t *ibp,
int16_t *Q_I_N,
int16_t *Q_F_N,
uint16_t *J,
const uint16_t *Q_0_Nminus1,
uint16_t K,
uint16_t N,
uint16_t E,
uint8_t n_PC);
int16_t *Q_I_N,
int16_t *Q_F_N,
uint16_t *J,
const uint16_t *Q_0_Nminus1,
uint16_t K,
uint16_t N,
uint16_t E,
uint8_t n_PC);
void nr_polar_info_bit_extraction(uint8_t *input,
uint8_t *output,
uint8_t *pattern,
uint16_t size);
uint8_t *output,
uint8_t *pattern,
uint16_t size);
void nr_bit2byte_uint32_8_t(uint32_t *in,
uint16_t arraySize,
uint8_t *out);
uint16_t arraySize,
uint8_t *out);
void nr_byte2bit_uint8_32_t(uint8_t *in,
uint16_t arraySize,
uint32_t *out);
uint16_t arraySize,
uint32_t *out);
void nr_crc_bit2bit_uint32_8_t(uint32_t *in,
uint16_t arraySize,
uint8_t *out);
uint16_t arraySize,
uint8_t *out);
void nr_polar_bit_insertion(uint8_t *input,
uint8_t *output,
uint16_t N,
uint16_t K,
int16_t *Q_I_N,
int16_t *Q_PC_N,
uint8_t n_PC);
uint8_t *output,
uint16_t N,
uint16_t K,
int16_t *Q_I_N,
int16_t *Q_PC_N,
uint8_t n_PC);
void nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(uint8_t *matrix1,
uint8_t **matrix2,
uint8_t *output,
uint16_t row,
uint16_t col);
void nr_matrix_multiplication_uint8_1D_uint8_2D(uint8_t *matrix1,
uint8_t **matrix2,
uint8_t *output,
uint16_t row,
uint16_t col);
uint8_t ***nr_alloc_uint8_t_3D_array(uint16_t xlen,
uint16_t ylen,
uint16_t zlen);
uint8_t ***nr_alloc_uint8_3D_array(uint16_t xlen,
uint16_t ylen,
uint16_t zlen);
uint8_t **nr_alloc_uint8_t_2D_array(uint16_t xlen,
uint16_t ylen);
uint8_t **nr_alloc_uint8_2D_array(uint16_t xlen,
uint16_t ylen);
double ***nr_alloc_double_3D_array(uint16_t xlen,
uint16_t ylen,
uint16_t zlen);
uint16_t ylen,
uint16_t zlen);
void nr_free_uint8_t_3D_array(uint8_t ***input,
uint16_t xlen,
uint16_t ylen);
void nr_free_uint8_t_2D_array(uint8_t **input,
uint16_t xlen);
double **nr_alloc_double_2D_array(uint16_t xlen,
uint16_t ylen);
void nr_free_double_3D_array(double ***input,
uint16_t xlen,
uint16_t ylen);
uint16_t xlen,
uint16_t ylen);
void nr_free_double_2D_array(double **input,
uint16_t xlen);
void nr_free_uint8_3D_array(uint8_t ***input,
uint16_t xlen,
uint16_t ylen);
void nr_free_uint8_2D_array(uint8_t **input,
uint16_t xlen);
void nr_sort_asc_double_1D_array_ind(double *matrix,
uint8_t *ind,
uint8_t len);
void nr_sort_asc_int16_1D_array_ind(int32_t *matrix,
int *ind,
int len);
void nr_free_double_2D_array(double **input, uint16_t xlen);
void updateLLR(double ***llr,
uint8_t **llrU,
uint8_t ***bit,
uint8_t **bitU,
uint8_t listSize,
uint16_t row,
uint16_t col,
uint16_t xlen,
uint8_t ylen,
uint8_t approximation);
uint8_t **llrU,
uint8_t ***bit,
uint8_t **bitU,
uint8_t listSize,
uint16_t row,
uint16_t col,
uint16_t xlen,
uint8_t ylen,
uint8_t approximation);
void updateBit(uint8_t ***bit,
uint8_t **bitU,
uint8_t listSize,
uint16_t row,
uint16_t col,
uint16_t xlen,
uint8_t ylen);
uint8_t **bitU,
uint8_t listSize,
uint16_t row,
uint16_t col,
uint16_t xlen,
uint8_t ylen);
void updatePathMetric(double *pathMetric,
double ***llr,
uint8_t listSize,
uint8_t bitValue,
uint16_t row,
uint8_t approximation);
double ***llr,
uint8_t listSize,
uint8_t bitValue,
uint16_t row,
uint8_t approximation);
void updatePathMetric2(double *pathMetric,
double ***llr,
uint8_t listSize,
uint16_t row,
uint8_t approximation);
double ***llr,
uint8_t listSize,
uint16_t row,
uint8_t approximation);
void computeLLR(double ***llr,
uint16_t row,
uint16_t col,
uint8_t i,
uint16_t offset,
uint8_t approximation);
uint16_t row,
uint16_t col,
uint8_t i,
uint16_t offset,
uint8_t approximation);
void updateCrcChecksum(uint8_t **crcChecksum,
uint8_t **crcGen,
uint8_t listSize,
uint32_t i2,
uint8_t len);
uint8_t **crcGen,
uint8_t listSize,
uint32_t i2,
uint8_t len);
void updateCrcChecksum2(uint8_t **crcChecksum,
uint8_t **crcGen,
uint8_t listSize,
uint32_t i2,
uint8_t len);
void nr_sort_asc_double_1D_array_ind(double *matrix,
uint8_t *ind,
uint8_t len);
uint8_t **crcGen,
uint8_t listSize,
uint32_t i2,
uint8_t len);
uint8_t **crc24c_generator_matrix(uint16_t payloadSizeBits);
@@ -356,11 +387,11 @@ uint8_t **crc6_generator_matrix(uint16_t payloadSizeBits);
//Also nr_polar_rate_matcher
static inline void nr_polar_interleaver(uint8_t *input,
uint8_t *output,
uint16_t *pattern,
uint16_t size)
uint8_t *output,
uint16_t *pattern,
uint16_t size)
{
for (int i=0; i<size; i++) output[i]=input[pattern[i]];
for (int i=0; i<size; i++) output[i]=input[pattern[i]];
}
static inline void nr_polar_deinterleaver(uint8_t *input,
@@ -375,7 +406,4 @@ static inline void nr_polar_deinterleaver(uint8_t *input,
void build_decoder_tree(t_nrPolar_params *pp);
int8_t polar_decoder_int16(int16_t *input,
uint8_t *out,
t_nrPolar_params *polarParams);
#endif
openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
+470 -225
View File
@@ -21,296 +21,541 @@
/*!\file PHY/CODING/nrPolar_tools/nr_polar_encoder.c
* \brief
* \author Turker Yilmaz
* \author Raymond Knopp, Turker Yilmaz
* \date 2018
* \version 0.1
* \company EURECOM
* \email turker.yilmaz@eurecom.fr
* \email raymond.knopp@eurecom.fr, turker.yilmaz@eurecom.fr
* \note
* \warning
*/
*/
//#define DEBUG_POLAR_ENCODER
//#define DEBUG_POLAR_ENCODER_DCI
//#define DEBUG_POLAR_ENCODER_TIMING
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
#include "assertions.h"
//input [a_31 a_30 ... a_0]
//output [f_31 f_30 ... f_0] [f_63 f_62 ... f_32] ...
void polar_encoder(uint32_t *in,
uint32_t *out,
t_nrPolar_paramsPtr polarParams)
uint32_t *out,
t_nrPolar_paramsPtr polarParams)
{
if (polarParams->idx == 0){//PBCH
nr_bit2byte_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_A);
/*
* Bytewise operations
*/
//Calculate CRC.
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_A,
polarParams->crc_generator_matrix,
polarParams->nr_polar_crc,
polarParams->payloadBits,
polarParams->crcParityBits);
for (uint8_t i = 0; i < polarParams->crcParityBits; i++)
polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
//Attach CRC to the Transport Block. (a to b)
for (uint16_t i = 0; i < polarParams->payloadBits; i++)
polarParams->nr_polar_B[i] = polarParams->nr_polar_A[i];
for (uint16_t i = polarParams->payloadBits; i < polarParams->K; i++)
polarParams->nr_polar_B[i]= polarParams->nr_polar_crc[i-(polarParams->payloadBits)];
} else { //UCI
}
//Interleaving (c to c')
nr_polar_interleaver(polarParams->nr_polar_B,
polarParams->nr_polar_CPrime,
polarParams->interleaving_pattern,
polarParams->K);
//Bit insertion (c' to u)
nr_polar_bit_insertion(polarParams->nr_polar_CPrime,
polarParams->nr_polar_U,
polarParams->N,
polarParams->K,
polarParams->Q_I_N,
polarParams->Q_PC_N,
polarParams->n_pc);
//Encoding (u to d)
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_U,
polarParams->G_N,
polarParams->nr_polar_D,
polarParams->N,
polarParams->N);
for (uint16_t i = 0; i < polarParams->N; i++)
polarParams->nr_polar_D[i] = (polarParams->nr_polar_D[i] % 2);
//Rate matching
//Sub-block interleaving (d to y) and Bit selection (y to e)
nr_polar_interleaver(polarParams->nr_polar_D,
polarParams->nr_polar_E,
polarParams->rate_matching_pattern,
polarParams->encoderLength);
/*
* Return bits.
*/
if (polarParams->idx == 0){//PBCH
/*
uint64_t B = (((uint64_t)*in)&((((uint64_t)1)<<32)-1)) | (((uint64_t)crc24c((uint8_t*)in,polarParams->payloadBits)>>8)<<polarParams->payloadBits);
#ifdef DEBUG_POLAR_ENCODER
for (int i=0; i< polarParams->encoderLength;i++) printf("f[%d]=%d\n", i, polarParams->nr_polar_E[i]);
printf("polar_B %llx (crc %x)\n",B,crc24c((uint8_t*)in,polarParams->payloadBits)>>8);
#endif
nr_bit2byte_uint32_8_t((uint32_t*)&B, polarParams->K, polarParams->nr_polar_B);*/
nr_bit2byte_uint32_8_t((uint32_t*)in, polarParams->payloadBits, polarParams->nr_polar_A);
/*
* Bytewise operations
*/
//Calculate CRC.
nr_matrix_multiplication_uint8_1D_uint8_2D(polarParams->nr_polar_A,
polarParams->crc_generator_matrix,
polarParams->nr_polar_crc,
polarParams->payloadBits,
polarParams->crcParityBits);
for (uint8_t i = 0; i < polarParams->crcParityBits; i++)
polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
//Attach CRC to the Transport Block. (a to b)
for (uint16_t i = 0; i < polarParams->payloadBits; i++)
polarParams->nr_polar_B[i] = polarParams->nr_polar_A[i];
for (uint16_t i = polarParams->payloadBits; i < polarParams->K; i++)
polarParams->nr_polar_B[i]= polarParams->nr_polar_crc[i-(polarParams->payloadBits)];
#ifdef DEBUG_POLAR_ENCODER
uint64_t B2=0;
for (int i = 0;i<polarParams->K;i++) B2 = B2 | ((uint64_t)polarParams->nr_polar_B[i] << i);
printf("polar_B %llx\n",B2);
#endif
/* for (int j=0;j<polarParams->crcParityBits;j++) {
for (int i=0;i<polarParams->payloadBits;i++)
printf("%1d.%1d+",polarParams->crc_generator_matrix[i][j],polarParams->nr_polar_A[i]);
printf(" => %d\n",polarParams->nr_polar_crc[j]);
}*/
} else { //UCI
}
//Interleaving (c to c')
nr_polar_interleaver(polarParams->nr_polar_B,
polarParams->nr_polar_CPrime,
polarParams->interleaving_pattern,
polarParams->K);
#ifdef DEBUG_POLAR_ENCODER
uint64_t Cprime=0;
for (int i = 0;i<polarParams->K;i++) {
Cprime = Cprime | ((uint64_t)polarParams->nr_polar_CPrime[i] << i);
if (polarParams->nr_polar_CPrime[i] == 1) printf("pos %d : %llx\n",i,Cprime);
}
printf("polar_Cprime %llx\n",Cprime);
#endif
//Bit insertion (c' to u)
nr_polar_bit_insertion(polarParams->nr_polar_CPrime,
polarParams->nr_polar_U,
polarParams->N,
polarParams->K,
polarParams->Q_I_N,
polarParams->Q_PC_N,
polarParams->n_pc);
//Encoding (u to d)
/* memset(polarParams->nr_polar_U,0,polarParams->N);
polarParams->nr_polar_U[247]=1;
polarParams->nr_polar_U[253]=1;*/
nr_matrix_multiplication_uint8_1D_uint8_2D(polarParams->nr_polar_U,
polarParams->G_N,
polarParams->nr_polar_D,
polarParams->N,
polarParams->N);
for (uint16_t i = 0; i < polarParams->N; i++)
polarParams->nr_polar_D[i] = (polarParams->nr_polar_D[i] % 2);
uint64_t D[8];
memset((void*)D,0,8*sizeof(int64_t));
#ifdef DEBUG_POLAR_ENCODER
for (int i=0;i<polarParams->N;i++) D[i/64] |= ((uint64_t)polarParams->nr_polar_D[i])<<(i&63);
printf("D %llx,%llx,%llx,%llx,%llx,%llx,%llx,%llx\n",
D[0],D[1],D[2],D[3],D[4],D[5],D[6],D[7]);
#endif
nr_byte2bit_uint8_32_t(polarParams->nr_polar_E, polarParams->encoderLength, out);
//Rate matching
//Sub-block interleaving (d to y) and Bit selection (y to e)
nr_polar_interleaver(polarParams->nr_polar_D,
polarParams->nr_polar_E,
polarParams->rate_matching_pattern,
polarParams->encoderLength);
/*
* Return bits.
*/
#ifdef DEBUG_POLAR_ENCODER
for (int i=0; i< polarParams->encoderLength;i++) printf("f[%d]=%d\n", i, polarParams->nr_polar_E[i]);
#endif
nr_byte2bit_uint8_32_t(polarParams->nr_polar_E, polarParams->encoderLength, out);
}
void polar_encoder_dci(uint32_t *in,
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
uint16_t n_RNTI)
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
uint16_t n_RNTI)
{
#ifdef DEBUG_POLAR_ENCODER_DCI
printf("[polar_encoder_dci] in: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n", in[0], in[1], in[2], in[3]);
printf("[polar_encoder_dci] in: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n", in[0], in[1], in[2], in[3]);
#endif
/*
* Bytewise operations
*/
//(a to a')
nr_bit2byte_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_A);
for (int i=0; i<polarParams->crcParityBits; i++) polarParams->nr_polar_APrime[i]=1;
for (int i=0; i<polarParams->payloadBits; i++) polarParams->nr_polar_APrime[i+(polarParams->crcParityBits)]=polarParams->nr_polar_A[i];
/*
* Bytewise operations
*/
//(a to a')
nr_bit2byte_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_A);
for (int i=0; i<polarParams->crcParityBits; i++) polarParams->nr_polar_APrime[i]=1;
for (int i=0; i<polarParams->payloadBits; i++) polarParams->nr_polar_APrime[i+(polarParams->crcParityBits)]=polarParams->nr_polar_A[i];
#ifdef DEBUG_POLAR_ENCODER_DCI
printf("[polar_encoder_dci] A: ");
for (int i=0; i<polarParams->payloadBits; i++) printf("%d-", polarParams->nr_polar_A[i]);
printf("\n");
printf("[polar_encoder_dci] APrime: ");
for (int i=0; i<polarParams->K; i++) printf("%d-", polarParams->nr_polar_APrime[i]);
printf("\n");
printf("[polar_encoder_dci] GP: ");
for (int i=0; i<polarParams->crcParityBits; i++) printf("%d-", polarParams->crc_generator_matrix[0][i]);
printf("\n");
printf("[polar_encoder_dci] A: ");
for (int i=0; i<polarParams->payloadBits; i++) printf("%d-", polarParams->nr_polar_A[i]);
printf("\n");
printf("[polar_encoder_dci] APrime: ");
for (int i=0; i<polarParams->K; i++) printf("%d-", polarParams->nr_polar_APrime[i]);
printf("\n");
printf("[polar_encoder_dci] GP: ");
for (int i=0; i<polarParams->crcParityBits; i++) printf("%d-", polarParams->crc_generator_matrix[0][i]);
printf("\n");
#endif
//Calculate CRC.
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_APrime,
polarParams->crc_generator_matrix,
polarParams->nr_polar_crc,
polarParams->K,
polarParams->crcParityBits);
for (uint8_t i = 0; i < polarParams->crcParityBits; i++) polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
//Calculate CRC.
nr_matrix_multiplication_uint8_1D_uint8_2D(polarParams->nr_polar_APrime,
polarParams->crc_generator_matrix,
polarParams->nr_polar_crc,
polarParams->K,
polarParams->crcParityBits);
for (uint8_t i = 0; i < polarParams->crcParityBits; i++) polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
#ifdef DEBUG_POLAR_ENCODER_DCI
printf("[polar_encoder_dci] CRC: ");
for (int i=0; i<polarParams->crcParityBits; i++) printf("%d-", polarParams->nr_polar_crc[i]);
printf("\n");
printf("[polar_encoder_dci] CRC: ");
for (int i=0; i<polarParams->crcParityBits; i++) printf("%d-", polarParams->nr_polar_crc[i]);
printf("\n");
#endif
//Attach CRC to the Transport Block. (a to b)
for (uint16_t i = 0; i < polarParams->payloadBits; i++)
polarParams->nr_polar_B[i] = polarParams->nr_polar_A[i];
for (uint16_t i = polarParams->payloadBits; i < polarParams->K; i++)
polarParams->nr_polar_B[i]= polarParams->nr_polar_crc[i-(polarParams->payloadBits)];
//Scrambling (b to c)
for (int i=0; i<16; i++) {
polarParams->nr_polar_B[polarParams->payloadBits+8+i] =
( polarParams->nr_polar_B[polarParams->payloadBits+8+i] + ((n_RNTI>>(15-i))&1) ) % 2;
}
//Attach CRC to the Transport Block. (a to b)
for (uint16_t i = 0; i < polarParams->payloadBits; i++)
polarParams->nr_polar_B[i] = polarParams->nr_polar_A[i];
for (uint16_t i = polarParams->payloadBits; i < polarParams->K; i++)
polarParams->nr_polar_B[i]= polarParams->nr_polar_crc[i-(polarParams->payloadBits)];
//Scrambling (b to c)
for (int i=0; i<16; i++) {
polarParams->nr_polar_B[polarParams->payloadBits+8+i] =
( polarParams->nr_polar_B[polarParams->payloadBits+8+i] + ((n_RNTI>>(15-i))&1) ) % 2;
}
/* //(a to a')
/* //(a to a')
nr_crc_bit2bit_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_aPrime);
//Parity bits computation (p)
polarParams->crcBit = crc24c(polarParams->nr_polar_aPrime, (polarParams->payloadBits+polarParams->crcParityBits));
#ifdef DEBUG_POLAR_ENCODER_DCI
#ifdef DEBUG_POLAR_ENCODER_DCI
printf("[polar_encoder_dci] crc: 0x%08x\n", polarParams->crcBit);
for (int i=0; i<32; i++)
{
printf("%d\n",((polarParams->crcBit)>>i)&1);
printf("%d\n",((polarParams->crcBit)>>i)&1);
}
#endif
#endif
//(a to b)
//
// Bytewise operations
//
uint8_t arrayInd = ceil(polarParams->payloadBits / 8.0);
for (int i=0; i<arrayInd-1; i++){
for (int j=0; j<8; j++) {
polarParams->nr_polar_B[j+(i*8)] = ((polarParams->nr_polar_aPrime[3+i]>>(7-j)) & 1);
}
for (int j=0; j<8; j++) {
polarParams->nr_polar_B[j+(i*8)] = ((polarParams->nr_polar_aPrime[3+i]>>(7-j)) & 1);
}
}
for (int i=0; i<((polarParams->payloadBits)%8); i++) {
polarParams->nr_polar_B[i+(arrayInd-1)*8] = ((polarParams->nr_polar_aPrime[3+(arrayInd-1)]>>(7-i)) & 1);
polarParams->nr_polar_B[i+(arrayInd-1)*8] = ((polarParams->nr_polar_aPrime[3+(arrayInd-1)]>>(7-i)) & 1);
}
for (int i=0; i<8; i++) {
polarParams->nr_polar_B[polarParams->payloadBits+i] = ((polarParams->crcBit)>>(31-i))&1;
polarParams->nr_polar_B[polarParams->payloadBits+i] = ((polarParams->crcBit)>>(31-i))&1;
}
//Scrambling (b to c)
for (int i=0; i<16; i++) {
polarParams->nr_polar_B[polarParams->payloadBits+8+i] =
( (((polarParams->crcBit)>>(23-i))&1) + ((n_RNTI>>(15-i))&1) ) % 2;
polarParams->nr_polar_B[polarParams->payloadBits+8+i] =
( (((polarParams->crcBit)>>(23-i))&1) + ((n_RNTI>>(15-i))&1) ) % 2;
}*/
#ifdef DEBUG_POLAR_ENCODER_DCI
printf("[polar_encoder_dci] B: ");
for (int i = 0; i < polarParams->K; i++) printf("%d-", polarParams->nr_polar_B[i]);
printf("\n");
printf("[polar_encoder_dci] B: ");
for (int i = 0; i < polarParams->K; i++) printf("%d-", polarParams->nr_polar_B[i]);
printf("\n");
#endif
//Interleaving (c to c')
nr_polar_interleaver(polarParams->nr_polar_B,
polarParams->nr_polar_CPrime,
polarParams->interleaving_pattern,
polarParams->K);
//Interleaving (c to c')
nr_polar_interleaver(polarParams->nr_polar_B,
polarParams->nr_polar_CPrime,
polarParams->interleaving_pattern,
polarParams->K);
//Bit insertion (c' to u)
nr_polar_bit_insertion(polarParams->nr_polar_CPrime,
polarParams->nr_polar_U,
polarParams->N,
polarParams->K,
polarParams->Q_I_N,
polarParams->Q_PC_N,
polarParams->n_pc);
//Bit insertion (c' to u)
nr_polar_bit_insertion(polarParams->nr_polar_CPrime,
polarParams->nr_polar_U,
polarParams->N,
polarParams->K,
polarParams->Q_I_N,
polarParams->Q_PC_N,
polarParams->n_pc);
//Encoding (u to d)
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_U,
polarParams->G_N,
polarParams->nr_polar_D,
polarParams->N,
polarParams->N);
for (uint16_t i = 0; i < polarParams->N; i++)
polarParams->nr_polar_D[i] = (polarParams->nr_polar_D[i] % 2);
//Encoding (u to d)
nr_matrix_multiplication_uint8_1D_uint8_2D(polarParams->nr_polar_U,
polarParams->G_N,
polarParams->nr_polar_D,
polarParams->N,
polarParams->N);
for (uint16_t i = 0; i < polarParams->N; i++)
polarParams->nr_polar_D[i] = (polarParams->nr_polar_D[i] % 2);
//Rate matching
//Sub-block interleaving (d to y) and Bit selection (y to e)
nr_polar_interleaver(polarParams->nr_polar_D,
polarParams->nr_polar_E,
polarParams->rate_matching_pattern,
polarParams->encoderLength);
//Rate matching
//Sub-block interleaving (d to y) and Bit selection (y to e)
nr_polar_interleaver(polarParams->nr_polar_D,
polarParams->nr_polar_E,
polarParams->rate_matching_pattern,
polarParams->encoderLength);
/*
* Return bits.
*/
nr_byte2bit_uint8_32_t(polarParams->nr_polar_E, polarParams->encoderLength, out);
/*
* Return bits.
*/
nr_byte2bit_uint8_32_t(polarParams->nr_polar_E, polarParams->encoderLength, out);
#ifdef DEBUG_POLAR_ENCODER_DCI
printf("[polar_encoder_dci] E: ");
for (int i = 0; i < polarParams->encoderLength; i++) printf("%d-", polarParams->nr_polar_E[i]);
uint8_t outputInd = ceil(polarParams->encoderLength / 32.0);
printf("\n[polar_encoder_dci] out: ");
for (int i = 0; i < outputInd; i++) {
printf("[%d]->0x%08x\t", i, out[i]);
}
printf("[polar_encoder_dci] E: ");
for (int i = 0; i < polarParams->encoderLength; i++) printf("%d-", polarParams->nr_polar_E[i]);
uint8_t outputInd = ceil(polarParams->encoderLength / 32.0);
printf("\n[polar_encoder_dci] out: ");
for (int i = 0; i < outputInd; i++) {
printf("[%d]->0x%08x\t", i, out[i]);
}
#endif
}
void polar_encoder_timing(uint32_t *in,
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
double cpuFreqGHz,
FILE* logFile)
{
//Initiate timing.
time_stats_t timeEncoderCRCByte, timeEncoderCRCBit, timeEncoderInterleaver, timeEncoderBitInsertion, timeEncoder1, timeEncoder2, timeEncoderRateMatching, timeEncoderByte2Bit;
reset_meas(&timeEncoderCRCByte); reset_meas(&timeEncoderCRCBit); reset_meas(&timeEncoderInterleaver); reset_meas(&timeEncoderBitInsertion); reset_meas(&timeEncoder1); reset_meas(&timeEncoder2); reset_meas(&timeEncoderRateMatching); reset_meas(&timeEncoderByte2Bit);
uint16_t n_RNTI=0x0000;
static inline void polar_rate_matching(t_nrPolar_paramsPtr polarParams,void *in,void *out) __attribute__((always_inline));
start_meas(&timeEncoderCRCByte);
nr_crc_bit2bit_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_aPrime); //(a to a')
polarParams->crcBit = crc24c(polarParams->nr_polar_aPrime, (polarParams->payloadBits+polarParams->crcParityBits)); //Parity bits computation (p)
uint8_t arrayInd = ceil(polarParams->payloadBits / 8.0); //(a to b)
for (int i=0; i<arrayInd-1; i++)
for (int j=0; j<8; j++)
polarParams->nr_polar_B[j+(i*8)] = ((polarParams->nr_polar_aPrime[3+i]>>(7-j)) & 1);
for (int i=0; i<((polarParams->payloadBits)%8); i++) polarParams->nr_polar_B[i+(arrayInd-1)*8] = ((polarParams->nr_polar_aPrime[3+(arrayInd-1)]>>(7-i)) & 1);
for (int i=0; i<8; i++) polarParams->nr_polar_B[polarParams->payloadBits+i] = ((polarParams->crcBit)>>(31-i))&1;
for (int i=0; i<16; i++) polarParams->nr_polar_B[polarParams->payloadBits+8+i] = ( (((polarParams->crcBit)>>(23-i))&1) + ((n_RNTI>>(15-i))&1) ) % 2; //Scrambling (b to c)
stop_meas(&timeEncoderCRCByte);
static inline void polar_rate_matching(t_nrPolar_paramsPtr polarParams,void *in,void *out) {
if (polarParams->groupsize == 8)
for (int i=0;i<polarParams->encoderLength>>3;i++) ((uint8_t*)out)[i] = ((uint8_t *)in)[polarParams->rm_tab[i]];
else
for (int i=0;i<polarParams->encoderLength>>4;i++) {
((uint16_t*)out)[i] = ((uint16_t *)in)[polarParams->rm_tab[i]];
}
}
void build_polar_tables(t_nrPolar_paramsPtr polarParams) {
// build table b -> c'
AssertFatal(polarParams->K > 32, "K = %d < 33, is not supported yet\n",polarParams->K);
AssertFatal(polarParams->K < 129, "K = %d > 64, is not supported yet\n",polarParams->K);
int bit_i,ip;
int numbytes = polarParams->K>>3;
int residue = polarParams->K&7;
int numbits;
if (residue>0) numbytes++;
for (int byte=0;byte<numbytes;byte++) {
if (byte<(polarParams->K>>3)) numbits=8;
else numbits=residue;
for (int val=0;val<256;val++) {
polarParams->cprime_tab0[byte][val] = 0;
polarParams->cprime_tab1[byte][val] = 0;
for (int i=0;i<numbits;i++) {
// flip bit endian of B bitstring
ip=polarParams->deinterleaving_pattern[polarParams->K-1-((8*byte)+i)];
AssertFatal(ip<128,"ip = %d\n",ip);
bit_i=(val>>i)&1;
if (ip<64) polarParams->cprime_tab0[byte][val] |= (((uint64_t)bit_i)<<ip);
else polarParams->cprime_tab1[byte][val] |= (((uint64_t)bit_i)<<(ip&63));
}
}
}
AssertFatal(polarParams->N==512,"N = %d, not done yet\n",polarParams->N);
// build G bit vectors for information bit positions and convert the bit as bytes tables in nr_polar_kronecker_power_matrices.c to 64 bit packed vectors.
// keep only rows of G which correspond to information/crc bits
polarParams->G_N_tab = (uint64_t**)malloc(polarParams->K * sizeof(int64_t*));
int k=0;
for (int i=0;i<polarParams->N;i++) {
if (polarParams->information_bit_pattern[i] > 0) {
polarParams->G_N_tab[k] = (uint64_t*)memalign(32,(polarParams->N/64)*sizeof(uint64_t));
memset((void*)polarParams->G_N_tab[k],0,(polarParams->N/64)*sizeof(uint64_t));
for (int j=0;j<polarParams->N;j++)
polarParams->G_N_tab[k][j/64] |= ((uint64_t)polarParams->G_N[i][j])<<(j&63);
#ifdef DEBUG_POLAR_ENCODER
printf("Bit %d Selecting row %d of G : ",k,i);
for (int j=0;j<polarParams->N;j+=4) printf("%1x",polarParams->G_N[i][j]+(polarParams->G_N[i][j+1]*2)+(polarParams->G_N[i][j+2]*4)+(polarParams->G_N[i][j+3]*8));
printf("\n");
#endif
k++;
}
}
// rate matching table
int iplast=polarParams->rate_matching_pattern[0];
int ccnt=0;
int groupcnt=0;
int firstingroup_out=0;
int firstingroup_in=iplast;
int mingroupsize = 1024;
// compute minimum group size of rate-matching pattern
for (int outpos=1; outpos<polarParams->encoderLength; outpos++) {
ip=polarParams->rate_matching_pattern[outpos];
if ((ip - iplast) == 1) ccnt++;
else {
groupcnt++;
#ifdef DEBUG_POLAR_ENCODER
printf("group %d (size %d): (%d:%d) => (%d:%d)\n",groupcnt,ccnt+1,
firstingroup_in,firstingroup_in+ccnt,
firstingroup_out,firstingroup_out+ccnt);
#endif
if ((ccnt+1)<mingroupsize) mingroupsize=ccnt+1;
ccnt=0;
firstingroup_out=outpos;
firstingroup_in=ip;
}
iplast=ip;
}
AssertFatal(mingroupsize==8 || mingroupsize==16,"mingroupsize %d, needs to be handled\n",mingroupsize);
polarParams->groupsize=mingroupsize;
int shift=3;
if (mingroupsize == 16) shift=4;
polarParams->rm_tab=(int*)malloc(sizeof(int)*polarParams->encoderLength/mingroupsize);
// rerun again to create groups
int tcnt=0;
for (int outpos=0;outpos<polarParams->encoderLength; outpos+=mingroupsize,tcnt++)
polarParams->rm_tab[tcnt] = polarParams->rate_matching_pattern[outpos]>>shift;
}
void polar_encoder_fast(uint64_t *A,
uint32_t *out,
int32_t crcmask,
t_nrPolar_paramsPtr polarParams) {
AssertFatal(polarParams->K > 32, "K = %d < 33, is not supported yet\n",polarParams->K);
AssertFatal(polarParams->K < 129, "K = %d > 128, is not supported yet\n",polarParams->K);
AssertFatal(polarParams->payloadBits < 65, "payload bits = %d > 64, is not supported yet\n",polarParams->payloadBits);
uint64_t B[4]={0,0,0,0},Cprime[4]={0,0,0,0};
int bitlen = polarParams->payloadBits;
// append crc
AssertFatal(bitlen<129,"support for payloads <= 128 bits\n");
AssertFatal(polarParams->crcParityBits == 24,"support for 24-bit crc only for now\n");
//int bitlen0=bitlen;
uint64_t tcrc=0;
// A bitstring should be stored as a_{N-1} a_{N-2} ... a_{N-A} 0 .... 0, where N=64,128,192,..., N is smallest multiple of 64 greater than or equal to A
// First flip A bitstring byte endian for CRC routines (optimized for DLSCH/ULSCH, not PBCH/PDCCH)
// CRC reads in each byte in bit positions 7 downto 0, for PBCH/PDCCH we need to read in a_{A-1} downto a_{0}, A = length of bit string (e.g. 32 for PBCH)
if (bitlen<=32) {
uint8_t A32_flip[4];
uint32_t Aprime= (uint32_t)(((uint32_t)*A)<<(32-bitlen));
A32_flip[0]=((uint8_t*)&Aprime)[3];
A32_flip[1]=((uint8_t*)&Aprime)[2];
A32_flip[2]=((uint8_t*)&Aprime)[1];
A32_flip[3]=((uint8_t*)&Aprime)[0];
tcrc = (uint64_t)((crcmask^(crc24c(A32_flip,bitlen)>>8)));
}
else if (bitlen<=64) {
uint8_t A64_flip[8];
uint64_t Aprime= (uint32_t)(((uint64_t)*A)<<(64-bitlen));
A64_flip[0]=((uint8_t*)&Aprime)[7];
A64_flip[1]=((uint8_t*)&Aprime)[6];
A64_flip[2]=((uint8_t*)&Aprime)[5];
A64_flip[3]=((uint8_t*)&Aprime)[4];
A64_flip[4]=((uint8_t*)&Aprime)[3];
A64_flip[5]=((uint8_t*)&Aprime)[2];
A64_flip[6]=((uint8_t*)&Aprime)[1];
A64_flip[7]=((uint8_t*)&Aprime)[0];
tcrc = (uint64_t)((crcmask^(crc24c(A64_flip,bitlen)>>8)));
}
int n;
// this is number of quadwords in the bit string
int quadwlen = (polarParams->K>>6);
if ((polarParams->K&63) > 0) quadwlen++;
// Create the B bitstring as
// b_{N'-1} b_{N'-2} ... b_{N'-A} b_{N'-A-1} ... b_{N'-A-Nparity} = a_{N-1} a_{N-2} ... a_{N-A} p_{N_parity-1} ... p_0
for (n=0;n<quadwlen;n++) if (n==0) B[n] = (A[n] << polarParams->crcParityBits) | tcrc;
else B[n] = (A[n] << polarParams->crcParityBits) | (A[n-1]>>(64-polarParams->crcParityBits));
uint8_t *Bbyte = (uint8_t*)B;
// for each byte of B, lookup in corresponding table for 64-bit word corresponding to that byte and its position
if (polarParams->K<65)
Cprime[0] = polarParams->cprime_tab0[0][Bbyte[0]] |
polarParams->cprime_tab0[1][Bbyte[1]] |
polarParams->cprime_tab0[2][Bbyte[2]] |
polarParams->cprime_tab0[3][Bbyte[3]] |
polarParams->cprime_tab0[4][Bbyte[4]] |
polarParams->cprime_tab0[5][Bbyte[5]] |
polarParams->cprime_tab0[6][Bbyte[6]] |
polarParams->cprime_tab0[7][Bbyte[7]];
else if (polarParams->K < 129) {
for (int i=0;i<1+(polarParams->K/8);i++) {
Cprime[0] |= polarParams->cprime_tab0[i][Bbyte[i]];
Cprime[1] |= polarParams->cprime_tab1[i][Bbyte[i]];
}
}
#ifdef DEBUG_POLAR_ENCODER
if (polarParams->K<65)
printf("A %llx B %llx Cprime %llx (payload bits %d,crc %x)\n",
(unsigned long long)(A[0]&(((uint64_t)1<<bitlen)-1)),
(unsigned long long)(B[0]),
(unsigned long long)(Cprime[0]),
polarParams->payloadBits,
tcrc);
else if (polarParams->K<129) {
if (bitlen<64)
printf("A %llx B %llx|%llx Cprime %llx|%llx (payload bits %d,crc %x)\n",
(unsigned long long)(A[0]&(((uint64_t)1<<bitlen)-1)),
(unsigned long long)(B[1]),(unsigned long long)(B[0]),
(unsigned long long)(Cprime[1]),(unsigned long long)(Cprime[0]),
polarParams->payloadBits,
tcrc);
else
printf("A %llx|%llx B %llx|%llx Cprime %llx|%llx (payload bits %d,crc %x)\n",
(unsigned long long)(A[1]&(((uint64_t)1<<(bitlen-64))-1)),(unsigned long long)(A[0]),
(unsigned long long)(B[1]),(unsigned long long)(B[0]),
(unsigned long long)(Cprime[1]),(unsigned long long)(Cprime[0]),
polarParams->payloadBits,
crc24c((uint8_t*)A,bitlen)>>8);
}
#endif
/* printf("Bbytes : %x.%x.%x.%x.%x.%x.%x.%x\n",Bbyte[0],Bbyte[1],Bbyte[2],Bbyte[3],Bbyte[4],Bbyte[5],Bbyte[6],Bbyte[7]);
printf("%llx,%llx,%llx,%llx,%llx,%llx,%llx,%llx\n",polarParams->cprime_tab[0][Bbyte[0]] ,
polarParams->cprime_tab[1][Bbyte[1]] ,
polarParams->cprime_tab[2][Bbyte[2]] ,
polarParams->cprime_tab[3][Bbyte[3]] ,
polarParams->cprime_tab[4][Bbyte[4]] ,
polarParams->cprime_tab[5][Bbyte[5]] ,
polarParams->cprime_tab[6][Bbyte[6]] ,
polarParams->cprime_tab[7][Bbyte[7]]);*/
// now do Gu product (here using 64-bit XORs, we can also do with SIMD after)
// here we're reading out the bits LSB -> MSB, is this correct w.r.t. 3GPP ?
uint64_t Cprime_i;
/* printf("%llx Cprime_0 (%llx) G %llx,%llx,%llx,%llx,%llx,%llx,%llx,%llx\n",Cprime_i,Cprime &1,
polarParams->G_N_tab[0][0],
polarParams->G_N_tab[0][1],
polarParams->G_N_tab[0][2],
polarParams->G_N_tab[0][3],
polarParams->G_N_tab[0][4],
polarParams->G_N_tab[0][5],
polarParams->G_N_tab[0][6],
polarParams->G_N_tab[0][7]);*/
uint64_t D[8]={0,0,0,0,0,0,0,0};
int off=0;
int len=polarParams->K;
for (int j=0;j<(1+(polarParams->K>>6));j++,off+=64,len-=64) {
for (int i=0;i<((len>63) ? 64 : len);i++) {
Cprime_i = -((Cprime[j]>>i)&1); // this converts bit 0 as, 0 => 0000x00, 1 => 1111x11
/*
#ifdef DEBUG_POLAR_ENCODER
printf("%llx Cprime_%d (%llx) G %llx,%llx,%llx,%llx,%llx,%llx,%llx,%llx\n",
Cprime_i,off+i,(Cprime[j]>>i) &1,
polarParams->G_N_tab[off+i][0],
polarParams->G_N_tab[off+i][1],
polarParams->G_N_tab[off+i][2],
polarParams->G_N_tab[off+i][3],
polarParams->G_N_tab[off+i][4],
polarParams->G_N_tab[off+i][5],
polarParams->G_N_tab[off+i][6],
polarParams->G_N_tab[off+i][7]);
#endif
*/
uint64_t *Gi=polarParams->G_N_tab[off+i];
D[0] ^= (Cprime_i & Gi[0]);
D[1] ^= (Cprime_i & Gi[1]);
D[2] ^= (Cprime_i & Gi[2]);
D[3] ^= (Cprime_i & Gi[3]);
D[4] ^= (Cprime_i & Gi[4]);
D[5] ^= (Cprime_i & Gi[5]);
D[6] ^= (Cprime_i & Gi[6]);
D[7] ^= (Cprime_i & Gi[7]);
}
}
#ifdef DEBUG_POLAR_ENCODER
printf("D %llx,%llx,%llx,%llx,%llx,%llx,%llx,%llx\n",
D[0],
D[1],
D[2],
D[3],
D[4],
D[5],
D[6],
D[7]);
#endif
polar_rate_matching(polarParams,(void*)D,(void*)out);
start_meas(&timeEncoderCRCBit);
nr_bit2byte_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_A);
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_A, polarParams->crc_generator_matrix, polarParams->nr_polar_crc, polarParams->payloadBits, polarParams->crcParityBits); //Calculate CRC.
for (uint8_t i = 0; i < polarParams->crcParityBits; i++) polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
for (uint16_t i = 0; i < polarParams->payloadBits; i++) polarParams->nr_polar_B[i] = polarParams->nr_polar_A[i]; //Attach CRC to the Transport Block. (a to b)
for (uint16_t i = polarParams->payloadBits; i < polarParams->K; i++) polarParams->nr_polar_B[i]= polarParams->nr_polar_crc[i-(polarParams->payloadBits)];
stop_meas(&timeEncoderCRCBit);
start_meas(&timeEncoderInterleaver); //Interleaving (c to c')
nr_polar_interleaver(polarParams->nr_polar_B, polarParams->nr_polar_CPrime, polarParams->interleaving_pattern, polarParams->K);
stop_meas(&timeEncoderInterleaver);
start_meas(&timeEncoderBitInsertion); //Bit insertion (c' to u)
nr_polar_bit_insertion(polarParams->nr_polar_CPrime, polarParams->nr_polar_U, polarParams->N, polarParams->K, polarParams->Q_I_N, polarParams->Q_PC_N, polarParams->n_pc);
stop_meas(&timeEncoderBitInsertion);
start_meas(&timeEncoder1); //Encoding (u to d)
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_U, polarParams->G_N, polarParams->nr_polar_D, polarParams->N, polarParams->N);
stop_meas(&timeEncoder1);
start_meas(&timeEncoder2);
for (uint16_t i = 0; i < polarParams->N; i++) polarParams->nr_polar_D[i] = (polarParams->nr_polar_D[i] % 2);
stop_meas(&timeEncoder2);
start_meas(&timeEncoderRateMatching);//Rate matching //Sub-block interleaving (d to y) and Bit selection (y to e)
nr_polar_interleaver(polarParams->nr_polar_D, polarParams->nr_polar_E, polarParams->rate_matching_pattern, polarParams->encoderLength);
stop_meas(&timeEncoderRateMatching);
start_meas(&timeEncoderByte2Bit); //Return bits.
nr_byte2bit_uint8_32_t(polarParams->nr_polar_E, polarParams->encoderLength, out);
stop_meas(&timeEncoderByte2Bit);
fprintf(logFile,",%f,%f,%f,%f,%f,%f,%f,%f\n",
(timeEncoderCRCByte.diff/(cpuFreqGHz*1000.0)),
(timeEncoderCRCBit.diff/(cpuFreqGHz*1000.0)),
(timeEncoderInterleaver.diff/(cpuFreqGHz*1000.0)),
(timeEncoderBitInsertion.diff/(cpuFreqGHz*1000.0)),
(timeEncoder1.diff/(cpuFreqGHz*1000.0)),
(timeEncoder2.diff/(cpuFreqGHz*1000.0)),
(timeEncoderRateMatching.diff/(cpuFreqGHz*1000.0)),
(timeEncoderByte2Bit.diff/(cpuFreqGHz*1000.0)));
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_matrix_and_array.c
+43 -43
View File
@@ -32,7 +32,7 @@
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(uint8_t *matrix1, uint8_t **matrix2,
void nr_matrix_multiplication_uint8_1D_uint8_2D(uint8_t *matrix1, uint8_t **matrix2,
uint8_t *output, uint16_t row, uint16_t col) {
for (uint16_t i = 0; i < col; i++) {
@@ -43,12 +43,12 @@ void nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(uint8_t *matrix1, uint8_t **
}
}
uint8_t ***nr_alloc_uint8_t_3D_array(uint16_t xlen, uint16_t ylen, uint16_t zlen) {
uint8_t ***nr_alloc_uint8_3D_array(uint16_t xlen, uint16_t ylen, uint16_t zlen) {
uint8_t ***output;
int i, j;
if ((output = malloc(xlen * sizeof(*output))) == NULL) {
perror("[nr_alloc_uint8_t_3D_array] Problem at 1D allocation");
perror("[nr_alloc_uint8_3D_array] Problem at 1D allocation");
return NULL;
}
for (i = 0; i < xlen; i++)
@@ -57,8 +57,8 @@ uint8_t ***nr_alloc_uint8_t_3D_array(uint16_t xlen, uint16_t ylen, uint16_t zlen
for (i = 0; i < xlen; i++)
if ((output[i] = malloc(ylen * sizeof *output[i])) == NULL) {
perror("[nr_alloc_uint8_t_3D_array] Problem at 2D allocation");
nr_free_uint8_t_3D_array(output, xlen, ylen);
perror("[nr_alloc_uint8_3D_array] Problem at 2D allocation");
nr_free_uint8_3D_array(output, xlen, ylen);
return NULL;
}
for (i = 0; i < xlen; i++)
@@ -69,14 +69,39 @@ uint8_t ***nr_alloc_uint8_t_3D_array(uint16_t xlen, uint16_t ylen, uint16_t zlen
for (i = 0; i < xlen; i++)
for (j = 0; j < ylen; j++)
if ((output[i][j] = malloc(zlen * sizeof *output[i][j])) == NULL) {
perror("[nr_alloc_uint8_t_3D_array] Problem at 3D allocation");
nr_free_uint8_t_3D_array(output, xlen, ylen);
perror("[nr_alloc_uint8_3D_array] Problem at 3D allocation");
nr_free_uint8_3D_array(output, xlen, ylen);
return NULL;
}
return output;
}
uint8_t **nr_alloc_uint8_2D_array(uint16_t xlen, uint16_t ylen) {
uint8_t **output;
int i, j;
if ((output = malloc(xlen * sizeof(*output))) == NULL) {
perror("[nr_alloc_uint8_2D_array] Problem at 1D allocation");
return NULL;
}
for (i = 0; i < xlen; i++)
output[i] = NULL;
for (i = 0; i < xlen; i++)
if ((output[i] = malloc(ylen * sizeof *output[i])) == NULL) {
perror("[nr_alloc_uint8_2D_array] Problem at 2D allocation");
nr_free_uint8_2D_array(output, xlen);
return NULL;
}
for (i = 0; i < xlen; i++)
for (j = 0; j < ylen; j++)
output[i][j] = 0;
return output;
}
double ***nr_alloc_double_3D_array(uint16_t xlen, uint16_t ylen, uint16_t zlen) {
double ***output;
int i, j;
@@ -137,31 +162,6 @@ double **nr_alloc_double_2D_array(uint16_t xlen, uint16_t ylen) {
return output;
}
uint8_t **nr_alloc_uint8_t_2D_array(uint16_t xlen, uint16_t ylen) {
uint8_t **output;
int i, j;
if ((output = malloc(xlen * sizeof(*output))) == NULL) {
perror("[nr_alloc_uint8_t_2D_array] Problem at 1D allocation");
return NULL;
}
for (i = 0; i < xlen; i++)
output[i] = NULL;
for (i = 0; i < xlen; i++)
if ((output[i] = malloc(ylen * sizeof *output[i])) == NULL) {
perror("[nr_alloc_uint8_t_2D_array] Problem at 2D allocation");
nr_free_uint8_t_2D_array(output, xlen);
return NULL;
}
for (i = 0; i < xlen; i++)
for (j = 0; j < ylen; j++)
output[i][j] = 0;
return output;
}
void nr_free_double_3D_array(double ***input, uint16_t xlen, uint16_t ylen) {
int i, j;
@@ -174,7 +174,16 @@ void nr_free_double_3D_array(double ***input, uint16_t xlen, uint16_t ylen) {
free(input);
}
void nr_free_uint8_t_3D_array(uint8_t ***input, uint16_t xlen, uint16_t ylen) {
void nr_free_double_2D_array(double **input, uint16_t xlen) {
int i;
for (i = 0; i < xlen; i++) {
free(input[i]);
}
free(input);
}
void nr_free_uint8_3D_array(uint8_t ***input, uint16_t xlen, uint16_t ylen) {
int i, j;
for (i = 0; i < xlen; i++) {
@@ -186,20 +195,11 @@ void nr_free_uint8_t_3D_array(uint8_t ***input, uint16_t xlen, uint16_t ylen) {
free(input);
}
void nr_free_uint8_t_2D_array(uint8_t **input, uint16_t xlen) {
void nr_free_uint8_2D_array(uint8_t **input, uint16_t xlen) {
for (int i = 0; i < xlen; i++) free(input[i]);
free(input);
}
void nr_free_double_2D_array(double **input, uint16_t xlen) {
int i;
for (i = 0; i < xlen; i++) {
free(input[i]);
}
free(input);
}
// Modified Bubble Sort.
void nr_sort_asc_double_1D_array_ind(double *matrix, uint8_t *ind, uint8_t len) {
int swaps;
openair1/PHY/CODING/nrPolar_tools/nr_polar_procedures.c
+9 -9
View File
@@ -33,15 +33,15 @@
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void nr_polar_bit_insertion(uint8_t *input,
uint8_t *output,
uint16_t N,
uint16_t K,
int16_t *Q_I_N,
int16_t *Q_PC_N,
uint8_t n_PC)
uint8_t *output,
uint16_t N,
uint16_t K,
int16_t *Q_I_N,
int16_t *Q_PC_N,
uint8_t n_PC)
{
uint16_t k=0;
uint8_t flag;
uint16_t k=0;
uint8_t flag;
if (n_PC>0) {
/*
@@ -325,7 +325,7 @@ void nr_polar_rate_matching_int16(int16_t *input, int16_t *output, uint16_t *rmp
if ( (K/(double)E) <= (7.0/16) ) { //puncturing
for (int i=0; i<=N-1; i++) output[i]=0;
} else { //shortening
for (int i=0; i<=N-1; i++) output[i]=INFINITY;
for (int i=0; i<=N-1; i++) output[i]=32767;//instead of INFINITY, to prevent [-Woverflow]
}
for (int i=0; i<=E-1; i++){
openair1/PHY/CODING/nr_polar_init.c
+31 -7
View File
@@ -36,20 +36,27 @@
#include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h"
#include "PHY/NR_TRANSPORT/nr_dci.h"
static int intcmp(const void *p1,const void *p2) {
return(*(int16_t*)p1 > *(int16_t*)p2);
}
void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
int8_t messageType,
uint16_t messageLength,
uint8_t aggregation_level)
int8_t messageType,
uint16_t messageLength,
uint8_t aggregation_level)
{
t_nrPolar_paramsPtr currentPtr = *polarParams;
uint16_t aggregation_prime = nr_polar_aggregation_prime(aggregation_level);
//Parse the list. If the node is already created, return without initialization.
while (currentPtr != NULL) {
if (currentPtr->idx == (messageType * messageLength * aggregation_prime)) return;
else currentPtr = currentPtr->nextPtr;
//printf("currentPtr->idx %d, (%d,%d)\n",currentPtr->idx,currentPtr->payloadBits,currentPtr->encoderLength);
if (currentPtr->idx == (messageType * messageLength * aggregation_prime)) return;
else currentPtr = currentPtr->nextPtr;
}
// printf("currentPtr %p (polarParams %p)\n",currentPtr,polarParams);
//Else, initialize and add node to the end of the linked list.
t_nrPolar_paramsPtr newPolarInitNode = malloc(sizeof(t_nrPolar_params));
@@ -57,6 +64,7 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
newPolarInitNode->idx = (messageType * messageLength * aggregation_prime);
newPolarInitNode->nextPtr = NULL;
//printf("newPolarInitNode->idx %d, (%d,%d,%d:%d)\n",newPolarInitNode->idx,messageType,messageLength,aggregation_prime,aggregation_level);
if (messageType == 0) { //PBCH
newPolarInitNode->n_max = NR_POLAR_PBCH_N_MAX;
@@ -70,6 +78,7 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
newPolarInitNode->encoderLength = NR_POLAR_PBCH_E;
newPolarInitNode->crcCorrectionBits = NR_POLAR_PBCH_CRC_ERROR_CORRECTION_BITS;
newPolarInitNode->crc_generator_matrix = crc24c_generator_matrix(newPolarInitNode->payloadBits);//G_P
//printf("Initializing polar parameters for PBCH (K %d, E %d)\n",newPolarInitNode->payloadBits,newPolarInitNode->encoderLength);
} else if (messageType == 1) { //DCI
newPolarInitNode->n_max = NR_POLAR_DCI_N_MAX;
newPolarInitNode->i_il = NR_POLAR_DCI_I_IL;
@@ -82,6 +91,7 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
newPolarInitNode->encoderLength = aggregation_level*108;
newPolarInitNode->crcCorrectionBits = NR_POLAR_DCI_CRC_ERROR_CORRECTION_BITS;
newPolarInitNode->crc_generator_matrix=crc24c_generator_matrix(newPolarInitNode->payloadBits+newPolarInitNode->crcParityBits);//G_P
//printf("Initializing polar parameters for DCI (K %d, E %d, L %d)\n",newPolarInitNode->payloadBits,newPolarInitNode->encoderLength,aggregation_level);
} else if (messageType == -1) { //UCI
} else {
@@ -115,6 +125,10 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
newPolarInitNode->i_il,
newPolarInitNode->interleaving_pattern);
newPolarInitNode->deinterleaving_pattern = malloc(sizeof(uint16_t) * newPolarInitNode->K);
for (int i=0;i<newPolarInitNode->K;i++)
newPolarInitNode->deinterleaving_pattern[newPolarInitNode->interleaving_pattern[i]] = i;
newPolarInitNode->rate_matching_pattern = malloc(sizeof(uint16_t) * newPolarInitNode->encoderLength);
uint16_t *J = malloc(sizeof(uint16_t) * newPolarInitNode->N);
nr_polar_rate_matching_pattern(newPolarInitNode->rate_matching_pattern,
@@ -139,7 +153,9 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
newPolarInitNode->N,
newPolarInitNode->encoderLength,
newPolarInitNode->n_pc);
// sort the Q_I_N array in ascending order (first K positions)
qsort((void*)newPolarInitNode->Q_I_N,newPolarInitNode->K,sizeof(int16_t),intcmp);
newPolarInitNode->channel_interleaver_pattern = malloc(sizeof(uint16_t) * newPolarInitNode->encoderLength);
nr_polar_channel_interleaver_pattern(newPolarInitNode->channel_interleaver_pattern,
newPolarInitNode->i_bil,
@@ -148,6 +164,9 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
free(J);
build_decoder_tree(newPolarInitNode);
build_polar_tables(newPolarInitNode);
init_polar_deinterleaver_table(newPolarInitNode);
//printf("decoder tree nodes %d\n",newPolarInitNode->tree.num_nodes);
} else {
@@ -159,13 +178,18 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
if (currentPtr == NULL)
{
*polarParams = newPolarInitNode;
//printf("Creating first polarParams entry index %d, %p\n",newPolarInitNode->idx,*polarParams);
return;
}
//Else, add node to the end of the linked list.
while (currentPtr->nextPtr != NULL) {
currentPtr = currentPtr->nextPtr;
currentPtr = currentPtr->nextPtr;
}
currentPtr->nextPtr= newPolarInitNode;
printf("Adding new polarParams entry to list index %d,%p\n",
newPolarInitNode->idx,
currentPtr->nextPtr);
return;
}
openair1/PHY/CODING/nr_rate_matching.c
+6 -4
View File
@@ -78,7 +78,7 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
{
uint8_t Cprime;
uint32_t Ncb,E,ind,k,Nref,N;
uint8_t *e2;
//uint8_t *e2;
AssertFatal(Nl>0,"Nl is 0\n");
AssertFatal(Qm>0,"Qm is 0\n");
@@ -110,7 +110,7 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
printf("nr_rate_matching: E %d, k0 %d Cprime %d modcprime %d\n",E,ind, Cprime,((G/(Nl*Qm))%Cprime));
#endif
e2 = e;
//e2 = e;
k=0;
@@ -120,7 +120,8 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
printf("RM_TX k%d Ind: %d (%d)\n",k,ind,w[ind]);
#endif
if (w[ind] != NR_NULL) e2[k++]=w[ind];
//if (w[ind] != NR_NULL) e2[k++]=w[ind];
if (w[ind] != NR_NULL) e[k++]=w[ind];
}
while(k<E) {
@@ -130,7 +131,8 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
printf("RM_TX k%d Ind: %d (%d)\n",k,ind,w[ind]);
#endif
if (w[ind] != NR_NULL) e2[k++]=w[ind];
//if (w[ind] != NR_NULL) e2[k++]=w[ind];
if (w[ind] != NR_NULL) e[k++]=w[ind];
}
}
openair1/PHY/INIT/nr_init.c
+29 -36
View File
@@ -37,8 +37,8 @@
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "SCHED_NR/fapi_nr_l1.h"
extern uint32_t from_earfcn(int eutra_bandP,uint32_t dl_earfcn);
extern int32_t get_uldl_offset(int eutra_bandP);
extern uint32_t from_nrarfcn(int nr_bandP,uint32_t dl_nrarfcn);
extern int32_t get_uldl_offset(int nr_bandP);
int l1_north_init_gNB() {
@@ -125,10 +125,11 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
// PBCH DMRS gold sequences generation
nr_init_pbch_dmrs(gNB);
// Polar encoder init for PBCH
nr_polar_init(&gNB->nrPolar_params,
NR_POLAR_PBCH_MESSAGE_TYPE,
NR_POLAR_PBCH_PAYLOAD_BITS,
NR_POLAR_PBCH_AGGREGATION_LEVEL);
NR_POLAR_PBCH_MESSAGE_TYPE,
NR_POLAR_PBCH_PAYLOAD_BITS,
NR_POLAR_PBCH_AGGREGATION_LEVEL);
//PDCCH DMRS init
gNB->nr_gold_pdcch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t**));
@@ -186,20 +187,16 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
common_vars->rxdata = (int32_t **)NULL;
common_vars->txdataF = (int32_t **)malloc16(NB_ANTENNA_PORTS_ENB*sizeof(int32_t*));
common_vars->txdataF = (int32_t **)malloc16(15*sizeof(int32_t*));
common_vars->rxdataF = (int32_t **)malloc16(64*sizeof(int32_t*));
LOG_D(PHY,"[INIT] NB_ANTENNA_PORTS_ENB:%d fp->nb_antenna_ports_gNB:%d\n", NB_ANTENNA_PORTS_ENB, cfg->rf_config.tx_antenna_ports.value);
for (i=0; i<NB_ANTENNA_PORTS_ENB; i++) {
if (i<cfg->rf_config.tx_antenna_ports.value || i==5) {
for (i=0;i<15;i++){
common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t) );
LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
i,common_vars->txdataF[i],
fp->samples_per_frame_wCP*sizeof(int32_t));
}
}
}
// Channel estimates for SRS
@@ -317,8 +314,8 @@ void phy_config_request(PHY_Config_t *phy_config) {
void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
{
// NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
//NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
//nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_gNB_COMMON* const common_vars = &gNB->common_vars;
LTE_eNB_PUSCH** const pusch_vars = gNB->pusch_vars;
LTE_eNB_SRS* const srs_vars = gNB->srs_vars;
@@ -327,11 +324,9 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
int i, UE_id;
for (i = 0; i < NB_ANTENNA_PORTS_ENB; i++) {
if (i < cfg->rf_config.tx_antenna_ports.value || i == 5) {
free_and_zero(common_vars->txdataF[i]);
for (i = 0; i < 15; i++) {
free_and_zero(common_vars->txdataF[i]);
/* rxdataF[i] is not allocated -> don't free */
}
}
free_and_zero(common_vars->txdataF);
free_and_zero(common_vars->rxdataF);
@@ -392,28 +387,28 @@ void install_schedule_handlers(IF_Module_t *if_inst)
/// this function is a temporary addition for NR configuration
void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu)
void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu,int Nid_cell)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
nfapi_nr_config_request_t *gNB_config = &gNB->gNB_config;
//overwrite for new NR parameters
gNB_config->nfapi_config.rf_bands.rf_band[0] = 22;
gNB_config->nfapi_config.earfcn.value = 6600;
gNB_config->nfapi_config.rf_bands.rf_band[0] = 78;
gNB_config->nfapi_config.nrarfcn.value = 620000;
gNB_config->subframe_config.numerology_index_mu.value = mu;
gNB_config->subframe_config.duplex_mode.value = TDD;
gNB_config->rf_config.tx_antenna_ports.value = 1;
gNB_config->rf_config.dl_carrier_bandwidth.value = N_RB_DL;
gNB_config->rf_config.ul_carrier_bandwidth.value = N_RB_UL;
gNB_config->sch_config.half_frame_index.value = 0;
gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
gNB_config->sch_config.n_ssb_crb.value = (N_RB_DL-20);
gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
gNB_config->sch_config.physical_cell_id.value=Nid_cell;
gNB->mac_enabled = 1;
fp->dl_CarrierFreq = from_earfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.earfcn.value);
fp->dl_CarrierFreq = from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
fp->ul_CarrierFreq = fp->dl_CarrierFreq - (get_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
fp->threequarter_fs = 0;
@@ -435,9 +430,8 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config)
gNB_config->nfapi_config.rf_bands.rf_band[0] = phy_config->cfg->nfapi_config.rf_bands.rf_band[0]; //22
gNB_config->nfapi_config.earfcn.value = phy_config->cfg->nfapi_config.earfcn.value; //6600
gNB_config->nfapi_config.nrarfcn.value = phy_config->cfg->nfapi_config.nrarfcn.value; //6600
gNB_config->subframe_config.numerology_index_mu.value = phy_config->cfg->subframe_config.numerology_index_mu.value;//1
gNB_config->rf_config.tx_antenna_ports.value = phy_config->cfg->rf_config.tx_antenna_ports.value; //1
gNB_config->rf_config.dl_carrier_bandwidth.value = phy_config->cfg->rf_config.dl_carrier_bandwidth.value;//106;
gNB_config->rf_config.ul_carrier_bandwidth.value = phy_config->cfg->rf_config.ul_carrier_bandwidth.value;//106;
gNB_config->sch_config.half_frame_index.value = 0;
@@ -454,20 +448,19 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config)
RC.gNB[Mod_id][CC_id]->mac_enabled = 1;
fp->dl_CarrierFreq = from_earfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.earfcn.value);
fp->dl_CarrierFreq = from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
fp->ul_CarrierFreq = fp->dl_CarrierFreq - (get_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
fp->threequarter_fs = 0;
LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,gNB_tx_antenna_ports %d,DL freq %u)\n",
Mod_id,
CC_id,
gNB_config->nfapi_config.rf_bands.rf_band[0],
gNB_config->rf_config.dl_carrier_bandwidth.value,
gNB_config->rf_config.ul_carrier_bandwidth.value,
gNB_config->sch_config.physical_cell_id.value,
gNB_config->rf_config.tx_antenna_ports.value,
fp->dl_CarrierFreq );
LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,DL freq %u)\n",
Mod_id,
CC_id,
gNB_config->nfapi_config.rf_bands.rf_band[0],
gNB_config->rf_config.dl_carrier_bandwidth.value,
gNB_config->rf_config.ul_carrier_bandwidth.value,
gNB_config->sch_config.physical_cell_id.value,
fp->dl_CarrierFreq );
nr_init_frame_parms(gNB_config, fp);
if (RC.gNB[Mod_id][CC_id]->configured == 1){
openair1/PHY/INIT/nr_init_ru.c
+2 -4
View File
@@ -107,9 +107,7 @@ int nr_phy_init_RU(RU_t *ru) {
for (i=0; i<RC.nb_nr_L1_inst; i++) {
for (p=0;p<15;p++) {
LOG_D(PHY,"[INIT] %s() nb_antenna_ports_eNB:%d \n", __FUNCTION__, ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value);
if (p<ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value || p==5) {
LOG_D(PHY,"[INIT] %s() DO BEAM WEIGHTS nb_antenna_ports_eNB:%d nb_tx:%d\n", __FUNCTION__, ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value, ru->nb_tx);
if (p == 0|| p==5) {
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) {
ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
@@ -180,7 +178,7 @@ void nr_phy_free_RU(RU_t *ru)
for (i = 0; i < RC.nb_nr_L1_inst; i++) {
for (p = 0; p < 15; p++) {
if (p < ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value || p == 5) {
if (p == 0 || p == 5) {
for (j=0; j<ru->nb_tx; j++) free_and_zero(ru->beam_weights[i][p][j]);
free_and_zero(ru->beam_weights[i][p]);
}
openair1/PHY/INIT/nr_init_ue.c
+7 -13
View File
@@ -656,6 +656,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
int eNB_id;
int th_id;
int n_ssb_crb=(fp->N_RB_DL-20);
int k_ssb=0;
abstraction_flag = 0;
fp->nb_antennas_tx = 1;
fp->nb_antennas_rx=1;
@@ -664,7 +665,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
printf("Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx);
//LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST);
nr_init_frame_parms_ue(fp,NR_MU_1,NORMAL,fp->N_RB_DL,n_ssb_crb,0);
nr_init_frame_parms_ue(fp,NR_MU_1,NORMAL,fp->N_RB_DL,n_ssb_crb,k_ssb);
phy_init_nr_top(ue);
// many memory allocation sizes are hard coded
@@ -816,10 +817,10 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
// 100 PRBs * 12 REs/PRB * 4 PDCCH SYMBOLS * 2 LLRs/RE
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
(*pdcch_vars_th)[th_id][eNB_id]->llr = (uint16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
(*pdcch_vars_th)[th_id][eNB_id]->llr16 = (uint16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
(*pdcch_vars_th)[th_id][eNB_id]->wbar = (uint16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
(*pdcch_vars_th)[th_id][eNB_id]->e_rx = (int8_t*)malloc16_clear( 4*2*100*12 );
(*pdcch_vars_th)[th_id][eNB_id]->llr = (int16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
(*pdcch_vars_th)[th_id][eNB_id]->llr16 = (int16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
(*pdcch_vars_th)[th_id][eNB_id]->wbar = (int16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
(*pdcch_vars_th)[th_id][eNB_id]->e_rx = (int16_t*)malloc16_clear( 4*2*100*12 );
(*pdcch_vars_th)[th_id][eNB_id]->rxdataF_comp = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
(*pdcch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
@@ -952,12 +953,7 @@ void phy_init_nr_top(PHY_VARS_NR_UE *ue)
generate_ul_reference_signal_sequences(SHRT_MAX);
// Polar encoder init for PBCH
ue->nrPolar_params = NULL;
nr_polar_init(&ue->nrPolar_params,
NR_POLAR_PBCH_MESSAGE_TYPE,
NR_POLAR_PBCH_PAYLOAD_BITS,
NR_POLAR_PBCH_AGGREGATION_LEVEL);
//lte_sync_time_init(frame_parms);
//generate_ul_ref_sigs();
@@ -987,8 +983,6 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRA
config->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config->rf_config.dl_carrier_bandwidth.value = 106;
config->rf_config.ul_carrier_bandwidth.value = 106;
config->rf_config.tx_antenna_ports.value = 1;
config->rf_config.rx_antenna_ports.value = 1;
config->sch_config.physical_cell_id.value = 0;
frame_parms->frame_type = FDD;
openair1/PHY/INIT/nr_parms.c
+7 -4
View File
@@ -159,6 +159,8 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
fp->symbols_per_slot = ((Ncp == NORMAL)? 14 : 12); // to redefine for different slot formats
fp->samples_per_subframe_wCP = fp->ofdm_symbol_size * fp->symbols_per_slot * fp->slots_per_subframe;
fp->samples_per_frame_wCP = 10 * fp->samples_per_subframe_wCP;
fp->samples_per_slot_wCP = fp->symbols_per_slot*fp->ofdm_symbol_size;
fp->samples_per_slot = fp->nb_prefix_samples0 + ((fp->symbols_per_slot-1)*fp->nb_prefix_samples) + (fp->symbols_per_slot*fp->ofdm_symbol_size);
fp->samples_per_subframe = (fp->samples_per_subframe_wCP + (fp->nb_prefix_samples0 * fp->slots_per_subframe) +
(fp->nb_prefix_samples * fp->slots_per_subframe * (fp->symbols_per_slot - 1)));
fp->samples_per_frame = 10 * fp->samples_per_subframe;
@@ -176,7 +178,9 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
}
int nr_init_frame_parms(nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *fp) {
NR_DL_FRAME_PARMS *fp)
{
return nr_init_frame_parms0(fp,
config->subframe_config.numerology_index_mu.value,
@@ -191,10 +195,9 @@ int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *fp,
int n_ssb_crb,
int ssb_subcarrier_offset)
{
/*n_ssb_crb and ssb_subcarrier_offset are given in 15kHz SCS*/
nr_init_frame_parms0(fp,mu,Ncp,N_RB_DL);
int start_rb = n_ssb_crb / (1<<mu);
fp->ssb_start_subcarrier = 12 * start_rb + ssb_subcarrier_offset;
fp->ssb_start_subcarrier = (12 * n_ssb_crb + ssb_subcarrier_offset)/(1<<mu);
return 0;
}
openair1/PHY/INIT/phy_init.h
+2 -1
View File
@@ -379,10 +379,11 @@ void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms(nfapi_nr_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms,int mu,int Ncp,int N_RB_DL,int n_ssb_crb,int ssb_subcarrier_offset);
int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB,uint8_t abstraction_flag);
void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag);
void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms);
int phy_init_nr_gNB(PHY_VARS_gNB *gNB, unsigned char is_secondary_gNB, unsigned char abstraction_flag);
void nr_phy_config_request(NR_PHY_Config_t *gNB);
void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu);
void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu,int Nid_cell);
void phy_free_nr_gNB(PHY_VARS_gNB *gNB);
int l1_north_init_gNB(void);
void init_nr_transport(PHY_VARS_gNB *gNB);
openair1/PHY/LTE_TRANSPORT/dlsch_coding.c
+1 -1
View File
@@ -703,7 +703,7 @@ int dlsch_encoding_all(PHY_VARS_eNB *eNB,
int dlsch_encoding(PHY_VARS_eNB *eNB,
unsigned char *a,
unsigned char *a,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch,
int frame,
openair1/PHY/MODULATION/slot_fep_nr.c
+13 -8
View File
@@ -29,6 +29,11 @@
#define SOFFSET 0
/*#ifdef LOG_I
#undef LOG_I
#define LOG_I(A,B...) printf(A)
#endif*/
int nr_slot_fep(PHY_VARS_NR_UE *ue,
unsigned char l,
unsigned char Ns,
@@ -49,8 +54,8 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
//int i;
unsigned int frame_length_samples = frame_parms->samples_per_subframe * 10;
unsigned int rx_offset;
//NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0];
uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset+516;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0];
uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset+((int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_vars->coreset[0].rb_offset)*NR_NB_SC_PER_RB;
uint16_t nb_rb_coreset = 24;
uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset+516;
uint16_t nb_rb_pdsch = 50;
@@ -123,6 +128,12 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
// Align with 256 bit
// rx_offset = rx_offset&0xfffffff8;
#ifdef DEBUG_FEP
// if (ue->frame <100)
/*LOG_I(PHY,*/printf("slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, subframe_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx,Ns, symbol,
nb_prefix_samples,nb_prefix_samples0,slot_offset,subframe_offset,sample_offset,rx_offset,frame_length_samples);
#endif
if (l==0) {
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
@@ -151,12 +162,6 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
rx_offset += (frame_parms->ofdm_symbol_size+nb_prefix_samples)*l;// +
// (frame_parms->ofdm_symbol_size+nb_prefix_samples)*(l-1);
//#ifdef DEBUG_FEP
// if (ue->frame <100)
LOG_D(PHY,"slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx,Ns, symbol,
nb_prefix_samples,nb_prefix_samples0,slot_offset,sample_offset,rx_offset,frame_length_samples);
//#endif
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
memcpy((void *)&common_vars->rxdata[aa][frame_length_samples],
(void *)&common_vars->rxdata[aa][0],
openair1/PHY/NR_REFSIG/nr_dmrs_rx.c
+30 -29
View File
@@ -20,15 +20,15 @@
*/
/*! \file PHY/NR_REFSIG/nr_dl_dmrs.c
* \brief Top-level routines for generating DMRS from 38-211
* \author
* \date 2018
* \version 0.1
* \company Eurecom
* \email:
* \note
* \warning
*/
* \brief Top-level routines for generating DMRS from 38-211
* \author
* \date 2018
* \version 0.1
* \company Eurecom
* \email:
* \note
* \warning
*/
//#define NR_PBCH_DMRS_LENGTH_DWORD 5
//#define NR_PBCH_DMRS_LENGTH 144
@@ -47,6 +47,7 @@ short nr_rx_mod_table[14] = {0,0,23170,-23170,-23170,23170,23170,-23170,23170,2
short nr_rx_nmod_table[14] = {0,0,-23170,23170,23170,-23170,-23170,23170,-23170,-23170,23170,23170,23170,-23170};
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
unsigned int Ns,
unsigned int *nr_gold_pdsch,
@@ -69,7 +70,7 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
wt = (config_type==0) ? wt1 : wt2;
if (config_type > 1)
LOG_E(PHY,"Bad PDSCH DMRS config type %d\n", config_type);
LOG_E(PHY,"Bad PDSCH DMRS config type %d\n", config_type);
if ((p>=1000) && (p<((config_type==0) ? 1008 : 1012))) {
if (ue->frame_parms.Ncp == NORMAL) {
@@ -100,32 +101,32 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
}
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int *nr_gold_pdcch,
int32_t *output,
unsigned short p,
unsigned short nb_rb_coreset)
uint8_t eNB_offset,
unsigned int Ns,
unsigned int *nr_gold_pdcch,
int32_t *output,
unsigned short p,
unsigned short nb_rb_coreset)
{
uint8_t idx=0;
//uint8_t pdcch_rb_offset =0;
//nr_gold_pdcch += ((int)floor(ue->frame_parms.ssb_start_subcarrier/12)+pdcch_rb_offset)*3/32;
uint8_t idx=0;
//uint8_t pdcch_rb_offset =0;
//nr_gold_pdcch += ((int)floor(ue->frame_parms.ssb_start_subcarrier/12)+pdcch_rb_offset)*3/32;
if (p==2000) {
for (int i=0; i<((nb_rb_coreset*6)>>1); i++) {
idx = ((((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
((int16_t*)output)[i<<1] = nr_rx_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
((int16_t*)output)[(i<<1)+1] = nr_rx_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
if (p==2000) {
for (int i=0; i<((nb_rb_coreset*6)>>1); i++) {
idx = ((((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
((int16_t*)output)[i<<1] = nr_rx_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
((int16_t*)output)[(i<<1)+1] = nr_rx_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_PDCCH
if (i<8)
printf("i %d idx %d pdcch gold %u b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, nr_gold_pdcch[(i<<1)>>5], (((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1),
(((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), ((int16_t*)output)[i<<1], ((int16_t*)output)[(i<<1)+1],&output[0]);
printf("i %d idx %d pdcch gold %u b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, nr_gold_pdcch[(i<<1)>>5], (((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1),
(((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), ((int16_t*)output)[i<<1], ((int16_t*)output)[(i<<1)+1],&output[0]);
#endif
}
}
}
}
return(0);
return(0);
}
int nr_pbch_dmrs_rx(int symbol,unsigned int *nr_gold_pbch,int32_t *output )
openair1/PHY/NR_TRANSPORT/nr_dci.c
+35 -30
View File
@@ -37,15 +37,15 @@
//#define DEBUG_CHANNEL_CODING
#define PDCCH_TEST_POLAR_TEMP_FIX
extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type,
NR_BWP_PARMS* bwp,
uint16_t N_RB,
nfapi_nr_config_request_t* config)
{
uint16_t size = 0;
uint16_t N_RB = bwp->N_RB;
switch(format) {
/*Only sizes for 0_0 and 1_0 are correct at the moment*/
@@ -53,7 +53,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
size += 20;
size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated
size += nr_get_dci_size(NFAPI_NR_DL_DCI_FORMAT_1_0, rnti_type, bwp, config) - size; // Padding to match 1_0 size
size += nr_get_dci_size(NFAPI_NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, config) - size; // Padding to match 1_0 size
// UL/SUL indicator assumed to be 0
break;
@@ -149,11 +149,12 @@ void nr_pdcch_scrambling(uint32_t *in,
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
if (i){
in++;
out++;
}
in++;
out++;
}
}
(*out) ^= ((((*in)>>(i&0x1f))&1) ^ ((s>>(i&0x1f))&1))<<(i&0x1f);
// printf("nr_pdcch_scrambling: in %d => out %d\n",((*in)>>(i&0x1f))&1,((*out)>>(i&0x1f))&1);
}
}
@@ -161,7 +162,7 @@ void nr_pdcch_scrambling(uint32_t *in,
uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
t_nrPolar_paramsPtr *nrPolar_params,
uint32_t **gold_pdcch_dmrs,
int32_t** txdataF,
int32_t* txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_config_request_t config)
@@ -169,7 +170,7 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1]; // 3 for the max coreset duration
uint8_t idx=0;
uint16_t a;
//uint16_t a;
int k,l,k_prime,dci_idx, dmrs_idx;
nr_cce_t cce;
nr_reg_t reg;
@@ -185,10 +186,12 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset
* in time: by its first slot and its first symbol*/
uint16_t cset_start_sc = frame_parms.first_carrier_offset + ((int)floor(frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_params.rb_offset)*NR_NB_SC_PER_RB;
uint8_t cset_start_symb = pdcch_params.first_slot*frame_parms.symbols_per_slot + pdcch_params.first_symbol;
// uint8_t cset_start_symb = pdcch_params.first_slot*frame_parms.symbols_per_slot + pdcch_params.first_symbol;
uint8_t cset_start_symb = pdcch_params.first_symbol;
uint8_t cset_nsymb = pdcch_params.n_symb;
dci_idx = 0;
/// DMRS QPSK modulation
/*There is a need to shift from which index the pregenerated DMRS sequence is used
* see 38211 r15.2.0 section 7.4.1.3.2: assumption is the reference point for k refers to the DMRS sequence*/
@@ -213,16 +216,16 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? ((pdcch_params.scrambling_id)?pdcch_params.rnti:0) : 0;
uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
#ifdef PDCCH_TEST_POLAR_TEMP_FIX
t_nrPolar_paramsPtr currentPtr = NULL;//, polarParams = NULL;
nr_polar_init(&currentPtr, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
//#ifdef PDCCH_TEST_POLAR_TEMP_FIX
// nr_polar_init(&currentPtr, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
// t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
#else
//#else
nr_polar_init(nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
#endif
//#endif
polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, pdcch_params.rnti);
//polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, pdcch_params.rnti);
polar_encoder_fast(dci_alloc.dci_pdu, encoder_output, pdcch_params.rnti,currentPtr);
#ifdef DEBUG_CHANNEL_CODING
printf("polar rnti %d\n",pdcch_params.rnti);
@@ -257,10 +260,7 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
}
/// Resource mapping
a = (config.rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
for (int aa = 0; aa < config.rf_config.tx_antenna_ports.value; aa++)
{
if (cset_start_sc >= frame_parms.ofdm_symbol_size)
cset_start_sc -= frame_parms.ofdm_symbol_size;
@@ -277,20 +277,23 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
}
}
#ifdef DEBUG_DCI
printf("\n Ordered REG list:\n");
for (int i=0; i<nb_regs; i++)
printf("%d\t",reg_mapping_list[i].reg_idx );
printf("\n");
printf("\n Ordered REG list:\n");
for (int i=0; i<nb_regs; i++)
printf("%d\t",reg_mapping_list[i].reg_idx );
printf("\n");
#endif
if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS) {
/*in this case the DMRS are mapped on all the coreset*/
for (l=cset_start_symb; l<cset_start_symb+ cset_nsymb; l++) {
dmrs_idx = 0;
k = cset_start_sc + 1;
while (dmrs_idx<3*pdcch_params.n_rb) {
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
printf("symbol %d position %d => (%d,%d)\n",l,k,((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] , ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
k+=4;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
@@ -312,15 +315,18 @@ printf("\n");
for (int m=0; m<NR_NB_SC_PER_RB; m++) {
if ( m == (k_prime<<2)+1) { // DMRS if not already mapped
if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_SAME_AS_REG_BUNDLE) {
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
printf("l %d position %d => (%d,%d)\n",l,k,((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] , ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
k_prime++;
dmrs_idx++;
}
}
else { // DCI payload
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dci[dci_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dci[(dci_idx<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dci[dci_idx<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dci[(dci_idx<<1) + 1]) >> 15;
//printf("dci output %d %d\n",(a * mod_dci[dci_idx<<1]) >> 15, (a * mod_dci[(dci_idx<<1) + 1]) >> 15);
dci_idx++;
}
@@ -329,7 +335,6 @@ printf("\n");
k -= frame_parms.ofdm_symbol_size;
}
}
}
return 0;
}
openair1/PHY/NR_TRANSPORT/nr_dci.h
+2 -2
View File
@@ -29,13 +29,13 @@ typedef unsigned __int128 uint128_t;
uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type,
NR_BWP_PARMS* bwp,
uint16_t N_RB,
nfapi_nr_config_request_t* config);
uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
t_nrPolar_paramsPtr *nrPolar_params,
uint32_t **gold_pdcch_dmrs,
int32_t** txdataF,
int32_t* txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_config_request_t config);
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
+278 -368
View File
@@ -31,6 +31,9 @@
*/
#include "nr_dci.h"
//#define DEBUG_FILL_DCI
#include "nr_dlsch.h"
@@ -114,422 +117,329 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
nfapi_nr_dl_config_dci_dl_pdu *pdcch_pdu,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint8_t n_shift;
uint32_t *dci_pdu = dci_alloc->dci_pdu;
memset((void*)dci_pdu,0,4*sizeof(uint32_t));
nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &pdcch_pdu->dci_dl_pdu_rel15;
uint64_t *dci_pdu = (uint64_t*)dci_alloc->dci_pdu;
memset((void*)dci_pdu,0,2*sizeof(uint64_t));
nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &pdcch_pdu->dci_dl_pdu_rel15;
nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &pdcch_pdu->pdcch_params_rel15;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_gNB_DLSCH_t *dlsch = gNB->dlsch[0][0];
NR_DL_gNB_HARQ_t **harq = dlsch->harq_processes;
uint16_t N_RB = fp->initial_bwp_dl.N_RB;
uint16_t N_RB_UL = fp->initial_bwp_ul.N_RB;
uint8_t fsize=0, pos=0, pos2=0,cand_idx=0;
uint16_t N_RB = params_rel15->n_RB_BWP;
uint8_t fsize=0, pos=0, cand_idx=0;
dci_alloc->L = 8;
memcpy((void*)&dci_alloc->pdcch_params, (void*)params_rel15, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t));
dci_alloc->size = nr_get_dci_size(dci_alloc->pdcch_params.dci_format,
dci_alloc->pdcch_params.rnti_type,
N_RB,
cfg);
AssertFatal(dci_alloc->size<=64, "DCI sizes above 64 bits not yet supported");
n_shift = (dci_alloc->pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_MIB_SIB1)?
cfg->sch_config.physical_cell_id.value : dci_alloc->pdcch_params.shift_index;
nr_fill_cce_list(dci_alloc, n_shift, cand_idx);
/// Payload generation
switch(params_rel15->dci_format) {
case NFAPI_NR_DL_DCI_FORMAT_1_0:
switch(params_rel15->rnti_type) {
case NFAPI_NR_RNTI_RA:
// Freq domain assignment
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
printf("fsize = %d\n",fsize);
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
// Time domain assignment
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
// VRB to PRB mapping
*dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<pos++;
// MCS
for (int i=0; i<5; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
// TB scaling
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->tb_scaling>>(1-i))&1)<<pos++;
printf("***************************\n");
break;
case NFAPI_NR_DL_DCI_FORMAT_1_0:
switch(params_rel15->rnti_type) {
case NFAPI_NR_RNTI_RA:
// printf("dci_pdu %llx\n",(unsigned long long int)*dci_pdu);
// Freq domain assignment
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
pos=fsize;
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_alloc->size-pos));
#ifdef DEBUG_FILL_DCI
printf("frequency-domain assignment %d (%d bits)=> %d (%llx)\n",pdu_rel15->frequency_domain_assignment,fsize,dci_alloc->size-pos,(unsigned long long int)*dci_pdu);
#endif
// Time domain assignment
pos+=4;
*dci_pdu |= ((pdu_rel15->time_domain_assignment&0xf) << (dci_alloc->size-pos));
#ifdef DEBUG_FILL_DCI
printf("time-domain assignment %d (3 bits)=> %d (%llx)\n",pdu_rel15->time_domain_assignment,dci_alloc->size-pos,(unsigned long long int)*dci_pdu);
#endif
// VRB to PRB mapping
case NFAPI_NR_RNTI_C:
pos++;
*dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&0x1)<<(dci_alloc->size-pos);
#ifdef DEBUG_FILL_DCI
printf("vrb to prb mapping %d (1 bits)=> %d (%llx)\n",pdu_rel15->vrb_to_prb_mapping,dci_alloc->size-pos,(unsigned long long int)*dci_pdu);
#endif
// MCS
pos+=5;
*dci_pdu |= (pdu_rel15->mcs&0x1f)<<(dci_alloc->size-pos);
#ifdef DEBUG_FILL_DCI
printf("mcs %d (5 bits)=> %d (%llx)\n",pdu_rel15->mcs,dci_alloc->size-pos,(unsigned long long int)*dci_pdu);
#endif
// TB scaling
pos+=2;
*dci_pdu |= (pdu_rel15->tb_scaling&0x3)<<(dci_alloc->size-pos);
#ifdef DEBUG_FILL_DCI
printf("tb_scaling %d (2 bits)=> %d (%llx)\n",pdu_rel15->tb_scaling,dci_alloc->size-pos,(unsigned long long int)*dci_pdu);
#endif
break;
case NFAPI_NR_RNTI_C:
// indicating a DL DCI format 1bit
*dci_pdu |= (pdu_rel15->format_indicator&1)<<pos++;
pos++;
*dci_pdu |= (pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos);
// Freq domain assignment (275rb >> fsize = 16)
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
pos+=fsize;
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_alloc->size-pos));
if (((pdu_rel15->frequency_domain_assignment+1)&1) ==0) //fsize are all 1 38.212 p86
{
printf("***************************\n");
{
// ra_preamble_index 6 bits
pos+=6;
*dci_pdu |= ((pdu_rel15->ra_preamble_index&0x3f)<<(dci_alloc->size-pos));
// UL/SUL indicator 1 bit
pos++;
*dci_pdu |= (pdu_rel15->ul_sul_indicator&1)<<(dci_alloc->size-pos);
// ra_preamble_index 6bit
for (int i=0; i<6; i++)
*dci_pdu |= ((pdu_rel15->ra_preamble_index>>(5-i-1))&1)<<pos++;
// UL/SUL indicator 1bit
*dci_pdu |= (pdu_rel15->ul_sul_indicator&1)<<pos++;
// SS/PBCH index 6 bits
pos+=6;
*dci_pdu |= ((pdu_rel15->ss_pbch_index&0x3f)<<(dci_alloc->size-pos));
// SS/PBCH index 6bit
for (int i=0; i<6; i++)
*dci_pdu |= ((pdu_rel15->ss_pbch_index>>(5-i))&1)<<pos++;
// prach_mask_index "2"+2bit // cause it 32bit and bit over 32 ,so dci_pdu ++
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->prach_mask_index>>(3-i))&1)<<pos++;
//--------------------------dci_pdu ++------------------------------
// prach_mask_index 2+"2"bit //
for (int i=2; i<4; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->prach_mask_index>>(3-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->prach_mask_index>>(3-i))&1)<<pos++;
}
} //end if
else
{
// Time domain assignment 4bit
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
// VRB to PRB mapping 1bit
*dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<pos++;
// MCS 5bit //bit over 32, so dci_pdu ++
for (int i=0; i<5; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
// New data indicator 1bit
*dci_pdu |= (pdu_rel15->ndi&1)<<pos++;
// Redundancy version 2bit
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<pos++;
// HARQ process number 4bit "2"+2
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
//--------------------------dci_pdu ++------------------------------
// HARQ process number 4bit 2+"2"
for (int i=2; i<4; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
}
// Downlink assignment index 2bit
for (int i=0; i<2; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->dai>>(1-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->dai>>(1-i))&1)<<pos++;
}
// TPC command for scheduled PUCCH 2bit
for (int i=0; i<2; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->tpc>>(1-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->tpc>>(1-i))&1)<<pos++;
}
// PUCCH resource indicator 3bit
for (int i=0; i<3; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->pucch_resource_indicator>>(2-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->pucch_resource_indicator>>(2-i))&1)<<pos++;
}
// PDSCH-to-HARQ_feedback timing indicator 3bit
for (int i=0; i<3; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator>>(2-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator>>(2-i))&1)<<pos++;
}
} //end else
// prach_mask_index 4 bits
pos+=4;
*dci_pdu |= ((pdu_rel15->prach_mask_index&0xf)<<(dci_alloc->size-pos));
} //end if
else {
// Time domain assignment 4bit
pos+=4;
*dci_pdu |= ((pdu_rel15->time_domain_assignment&0xf) << (dci_alloc->size-pos));
// VRB to PRB mapping 1bit
pos++;
*dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos);
// MCS 5bit //bit over 32, so dci_pdu ++
pos+=5;
*dci_pdu |= (pdu_rel15->mcs&0x1f)<<(dci_alloc->size-pos);
// New data indicator 1bit
pos++;
*dci_pdu |= (pdu_rel15->ndi&1)<<(dci_alloc->size-pos);
// Redundancy version 2bit
pos+=2;
*dci_pdu |= (pdu_rel15->rv&0x3)<<(dci_alloc->size-pos);
// HARQ process number 4bit
pos+=4;
*dci_pdu |= ((pdu_rel15->harq_pid&0xf)<<(dci_alloc->size-pos));
// Downlink assignment index 2bit
pos+=2;
*dci_pdu |= ((pdu_rel15->dai&3)<<(dci_alloc->size-pos));
// TPC command for scheduled PUCCH 2bit
pos+=2;
*dci_pdu |= ((pdu_rel15->tpc&3)<<(dci_alloc->size-pos));
// PUCCH resource indicator 3bit
pos+=3;
*dci_pdu |= ((pdu_rel15->pucch_resource_indicator&0x7)<<(dci_alloc->size-pos));
// PDSCH-to-HARQ_feedback timing indicator 3bit
pos+=3;
*dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator&0x7)<<(dci_alloc->size-pos));
} //end else
break;
case NFAPI_NR_RNTI_P:
case NFAPI_NR_RNTI_P:
// Short Messages Indicator – 2 bits
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->short_messages_indicator>>(1-i))&1)<<pos++;
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->short_messages_indicator>>(1-i))&1)<<(dci_alloc->size-pos++);
// Short Messages – 8 bits
for (int i=0; i<8; i++)
*dci_pdu |= ((pdu_rel15->short_messages>>(7-i))&1)<<pos++;
for (int i=0; i<8; i++)
*dci_pdu |= ((pdu_rel15->short_messages>>(7-i))&1)<<(dci_alloc->size-pos++);
// Freq domain assignment 0-16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
// Time domain assignment 4 bit
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
// VRB to PRB mapping 1 bit
*dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<pos++;
// MCS "1"+4 = 5 bit
for (int i=0; i<1; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
// MCS 1+"4" = 5 bit
for (int i=1; i<4; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->mcs>>(4-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
}
// TB scaling 2 bit
for (int i=0; i<2; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->tb_scaling>>(1-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->tb_scaling>>(1-i))&1)<<pos++;
}
break;
case NFAPI_NR_RNTI_SI:
// Freq domain assignment 0-16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
// Time domain assignment 4 bit
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
// VRB to PRB mapping 1 bit
*dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<pos++;
// MCS 5bit //bit over 32, so dci_pdu ++
for (int i=0; i<5; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
// Redundancy version 2bit
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<pos++;
break;
case NFAPI_NR_RNTI_TC:
// indicating a DL DCI format 1bit
*dci_pdu |= (pdu_rel15->format_indicator&1)<<pos++;
// Freq domain assignment 0-16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
// Time domain assignment 4 bit
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
// VRB to PRB mapping 1 bit
*dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<pos++;
// MCS 5bit //bit over 32, so dci_pdu ++
for (int i=0; i<5; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
// New data indicator 1bit
*dci_pdu |= (pdu_rel15->ndi&1)<<pos++;
// Redundancy version 2bit
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<pos++;
// HARQ process number 4bit
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
*dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos++);
// MCS 5 bit
for (int i=0; i<5; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
// HARQ process number 4bit
for (int i=2; i<4; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
}
// Downlink assignment index – 2 bits
for (int i=0; i<2; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->dai>>(1-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->dai>>(1-i))&1)<<pos++;
}
// TPC command for scheduled PUCCH – 2 bits
for (int i=0; i<2; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->tpc>>(1-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->tpc>>(1-i))&1)<<pos++;
}
// PUCCH resource indicator – 3 bits
for (int i=0; i<3; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->pucch_resource_indicator>>(2-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->pucch_resource_indicator>>(2-i))&1)<<pos++;
}
// PDSCH-to-HARQ_feedback timing indicator – 3 bits
for (int i=0; i<3; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator>>(2-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator>>(2-i))&1)<<pos++;
}
///-----------------------------------?????????????????????------------------------
break;
}
break;
// TB scaling 2 bit
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->tb_scaling>>(1-i))&1)<<(dci_alloc->size-pos++);
case NFAPI_NR_UL_DCI_FORMAT_0_0:
switch(params_rel15->rnti_type)
{
case NFAPI_NR_RNTI_C:
// indicating a DL DCI format 1bit
*dci_pdu |= (pdu_rel15->format_indicator&1)<<pos++;
// Freq domain assignment max 16 bit
fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
// Time domain assignment 4bit
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
// Frequency hopping flag – 1 bit
*dci_pdu |= (pdu_rel15->frequency_hopping_flag&1)<<pos++;
// MCS 5 bit
for (int i=0; i<5; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
// New data indicator 1bit
*dci_pdu |= (pdu_rel15->ndi&1)<<pos++;
// Redundancy version 2bit
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<pos++;
// HARQ process number 4bit
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
break;
case NFAPI_NR_RNTI_SI:
// Freq domain assignment 0-16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
// Time domain assignment 4 bit
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
// VRB to PRB mapping 1 bit
*dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos++);
// MCS 5bit //bit over 32, so dci_pdu ++
for (int i=0; i<5; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
// Redundancy version 2bit
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
break;
case NFAPI_NR_RNTI_TC:
// indicating a DL DCI format 1bit
*dci_pdu |= (pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos++);
// Freq domain assignment 0-16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
// Time domain assignment 4 bit
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
// VRB to PRB mapping 1 bit
*dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos++);
// MCS 5bit //bit over 32, so dci_pdu ++
for (int i=0; i<5; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
// New data indicator 1bit
*dci_pdu |= (pdu_rel15->ndi&1)<<(dci_alloc->size-pos++);
// Redundancy version 2bit
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
// HARQ process number 4bit
for (int i=2; i<4; i++)
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<(dci_alloc->size-pos++);
// Downlink assignment index – 2 bits
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->dai>>(1-i))&1)<<(dci_alloc->size-pos++);
// TPC command for scheduled PUCCH – 2 bits
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->tpc>>(1-i))&1)<<(dci_alloc->size-pos++);
// LOG_I(PHY, "DCI PDU: [0]->0x%08llx \t [1]->0x%08llx \t [2]->0x%08llx \t [3]->0x%08llx\n",
// dci_pdu[0], dci_pdu[1], dci_pdu[2], dci_pdu[3]);
// PDSCH-to-HARQ_feedback timing indicator – 3 bits
for (int i=0; i<3; i++)
*dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator>>(2-i))&1)<<(dci_alloc->size-pos++);
break;
}
case NFAPI_NR_UL_DCI_FORMAT_0_0:
switch(params_rel15->rnti_type)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
}
// TPC command for scheduled PUSCH – 2 bits
case NFAPI_NR_RNTI_C:
// indicating a DL DCI format 1bit
*dci_pdu |= (pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos++);
// Freq domain assignment max 16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
// Time domain assignment 4bit
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
// Frequency hopping flag – 1 bit
*dci_pdu |= (pdu_rel15->frequency_hopping_flag&1)<<(dci_alloc->size-pos++);
// MCS 5 bit
for (int i=0; i<5; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
// New data indicator 1bit
*dci_pdu |= (pdu_rel15->ndi&1)<<(dci_alloc->size-pos++);
// Redundancy version 2bit
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
// HARQ process number 4bit
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<(dci_alloc->size-pos++);
// TPC command for scheduled PUSCH – 2 bits
for (int i=0; i<2; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->tpc>>(1-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->tpc>>(1-i))&1)<<pos++;
}
// Padding bits
if (pos<32)
{
*dci_pdu |= ((pdu_rel15->tpc>>(1-i))&1)<<(dci_alloc->size-pos++);
// Padding bits
for(int a = pos;a<32;a++)
*dci_pdu |= (pdu_rel15->padding&1)<<pos++;
}
// UL/SUL indicator – 1 bit
*dci_pdu |= (pdu_rel15->padding&1)<<(dci_alloc->size-pos++);
// UL/SUL indicator – 1 bit
if (cfg->pucch_config.pucch_GroupHopping.value)
{
if (pos>31)
*(dci_pdu+1) |= (pdu_rel15->ul_sul_indicator&1)<<pos2++;
else
*dci_pdu |= (pdu_rel15->ul_sul_indicator&1)<<pos++;
}
*dci_pdu |= (pdu_rel15->ul_sul_indicator&1)<<(dci_alloc->size-pos++);
break;
break;
case NFAPI_NR_RNTI_TC:
// indicating a DL DCI format 1bit
*dci_pdu |= (pdu_rel15->format_indicator&1)<<pos++;
// Freq domain assignment max 16 bit
fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
// Time domain assignment 4bit
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
// Frequency hopping flag – 1 bit
*dci_pdu |= (pdu_rel15->frequency_hopping_flag&1)<<pos++;
// MCS 5 bit
for (int i=0; i<5; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
// New data indicator 1bit
*dci_pdu |= (pdu_rel15->ndi&1)<<pos++;
// Redundancy version 2bit
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<pos++;
// HARQ process number 4bit
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
// HARQ process number 4bit
for (int i=2; i<4; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
}
// indicating a DL DCI format 1bit
*dci_pdu |= (pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos++);
// Freq domain assignment max 16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
// Time domain assignment 4bit
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
// Frequency hopping flag – 1 bit
*dci_pdu |= (pdu_rel15->frequency_hopping_flag&1)<<(dci_alloc->size-pos++);
// MCS 5 bit
for (int i=0; i<5; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
// New data indicator 1bit
*dci_pdu |= (pdu_rel15->ndi&1)<<(dci_alloc->size-pos++);
// Redundancy version 2bit
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
// HARQ process number 4bit
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<(dci_alloc->size-pos++);
// TPC command for scheduled PUSCH – 2 bits
for (int i=0; i<2; i++)
{
if (pos>31)
*(dci_pdu+1) |= ((pdu_rel15->tpc>>(1-i))&1)<<pos2++;
else
*dci_pdu |= ((pdu_rel15->tpc>>(1-i))&1)<<pos++;
}
*dci_pdu |= ((pdu_rel15->tpc>>(1-i))&1)<<(dci_alloc->size-pos++);
// Padding bits
if (pos<32)
{
for(int a = pos;a<32;a++)
*dci_pdu |= (pdu_rel15->padding&1)<<pos++;
}
*dci_pdu |= (pdu_rel15->padding&1)<<(dci_alloc->size-pos++);
// UL/SUL indicator – 1 bit
if (cfg->pucch_config.pucch_GroupHopping.value)
{
if (pos>31)
*(dci_pdu+1) |= (pdu_rel15->ul_sul_indicator&1)<<pos2++;
else
*dci_pdu |= (pdu_rel15->ul_sul_indicator&1)<<pos++;
}
*dci_pdu |= (pdu_rel15->ul_sul_indicator&1)<<(dci_alloc->size-pos++);
break;
}
break;
break;
}
LOG_I(PHY, "DCI PDU: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
dci_pdu[0], dci_pdu[1], dci_pdu[2], dci_pdu[3]);
/// rest of DCI alloc
dci_alloc->L = 8;
memcpy((void*)&dci_alloc->pdcch_params, (void*)params_rel15, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t));
dci_alloc->size = nr_get_dci_size(dci_alloc->pdcch_params.dci_format,
dci_alloc->pdcch_params.rnti_type,
&fp->initial_bwp_dl,
cfg);
n_shift = (dci_alloc->pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_MIB_SIB1)?
cfg->sch_config.physical_cell_id.value : dci_alloc->pdcch_params.shift_index;
nr_fill_cce_list(dci_alloc, n_shift, cand_idx);
LOG_I(PHY, "DCI PDU: [0]->0x%16llxx \t [1]->0x%16llx \n",(long long unsigned int)dci_pdu[0], (long long unsigned int)dci_pdu[1]);
LOG_I(PHY, "DCI type %d payload (size %d) generated on candidate %d\n", dci_alloc->pdcch_params.dci_format, dci_alloc->size, cand_idx);
/// DLSCH struct
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
+3 -4
View File
@@ -196,7 +196,7 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
uint32_t ***pdsch_dmrs,
int32_t** txdataF,
int16_t amp,
uint8_t subframe,
uint8_t slot,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_config_request_t config) {
@@ -212,7 +212,7 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
uint16_t encoded_length = nb_symbols*Qm;
/// CRC, coding, interleaving and rate matching
nr_dlsch_encoding(harq->pdu, subframe, &dlsch, &frame_parms);
nr_dlsch_encoding(harq->pdu, slot, &dlsch, &frame_parms);
#ifdef DEBUG_DLSCH
printf("PDSCH encoding:\nPayload:\n");
for (int i=0; i<TBS>>7; i++) {
@@ -305,8 +305,7 @@ for (int i=0; i<n_dmrs>>4; i++) {
#endif
/// Resource mapping
AssertFatal(rel15->nb_layers<=config.rf_config.tx_antenna_ports.value, "Not enough Tx antennas (%d) for %d layers\n",\
config.rf_config.tx_antenna_ports.value, rel15->nb_layers);
// Non interleaved VRB to PRB mapping
uint16_t start_sc = frame_parms.first_carrier_offset + frame_parms.ssb_start_subcarrier;
openair1/PHY/NR_TRANSPORT/nr_dlsch.h
+4
View File
@@ -90,6 +90,10 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
@param nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs */
uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch,uint8_t nb_re_dmrs,uint16_t length_dmrs,uint8_t Qm, uint8_t Nl);
void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
int nr_dlsch_encoding(unsigned char *a,
uint8_t subframe,
NR_gNB_DLSCH_t *dlsch,
openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
+8 -7
View File
@@ -142,9 +142,9 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
dlsch->Nsoft = Nsoft;
for (layer=0; layer<NR_MAX_NB_LAYERS; layer++) {
dlsch->ue_spec_bf_weights[layer] = (int32_t**)malloc16(config->rf_config.tx_antenna_ports.value*sizeof(int32_t*));
dlsch->ue_spec_bf_weights[layer] = (int32_t**)malloc16(64*sizeof(int32_t*));
for (aa=0; aa<config->rf_config.tx_antenna_ports.value; aa++) {
for (aa=0; aa<64; aa++) {
dlsch->ue_spec_bf_weights[layer][aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t));
for (re=0;re<OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES; re++) {
dlsch->ue_spec_bf_weights[layer][aa][re] = 0x00007fff;
@@ -157,8 +157,8 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
for (int q=0; q<NR_MAX_NB_CODEWORDS; q++)
dlsch->mod_symbs[q] = (int32_t *)malloc16((NR_MAX_PDSCH_ENCODED_LENGTH>>1)*sizeof(int32_t*));
dlsch->calib_dl_ch_estimates = (int32_t**)malloc16(config->rf_config.tx_antenna_ports.value*sizeof(int32_t*));
for (aa=0; aa<config->rf_config.tx_antenna_ports.value; aa++) {
dlsch->calib_dl_ch_estimates = (int32_t**)malloc16(64*sizeof(int32_t*));
for (aa=0; aa<64; aa++) {
dlsch->calib_dl_ch_estimates[aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t));
}
@@ -265,7 +265,7 @@ void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch)
}
int nr_dlsch_encoding(unsigned char *a,
uint8_t subframe,
uint8_t slot,
NR_gNB_DLSCH_t *dlsch,
NR_DL_FRAME_PARMS* frame_parms)
{
@@ -273,7 +273,7 @@ int nr_dlsch_encoding(unsigned char *a,
unsigned int G;
unsigned int crc=1;
uint8_t harq_pid = dlsch->harq_ids[subframe];
uint8_t harq_pid = dlsch->harq_ids[slot];
nfapi_nr_dl_config_dlsch_pdu_rel15_t rel15 = dlsch->harq_processes[harq_pid]->dlsch_pdu.dlsch_pdu_rel15;
uint16_t nb_rb = rel15.n_prb;
uint8_t nb_symb_sch = rel15.nb_symbols;
@@ -379,7 +379,8 @@ int nr_dlsch_encoding(unsigned char *a,
}
printf("\n");*/
ldpc_encoder_optim_8seg(dlsch->harq_processes[harq_pid]->c,d_tmp,Kr,BG,dlsch->harq_processes[harq_pid]->C,NULL,NULL,NULL,NULL);
//ldpc_encoder_optim_8seg(dlsch->harq_processes[harq_pid]->c,d_tmp,Kr,BG,dlsch->harq_processes[harq_pid]->C,NULL,NULL,NULL,NULL);
ldpc_encoder_optim_8seg(dlsch->harq_processes[harq_pid]->c,dlsch->harq_processes[harq_pid]->d,Kr,BG,dlsch->harq_processes[harq_pid]->C,NULL,NULL,NULL,NULL);
//stop_meas(te_stats);
//printf("end ldpc encoder -- output\n");
openair1/PHY/NR_TRANSPORT/nr_pbch.c
+32 -33
View File
@@ -46,14 +46,14 @@ uint8_t nr_pbch_payload_interleaving_pattern[32] = {16, 23, 18, 17, 8, 30, 10, 6
9, 11, 12, 13, 14, 15, 19, 20, 21, 22, 25, 26, 27, 28, 29, 31};
int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
int k,l;
int16_t a;
//int16_t a;
int16_t mod_dmrs[NR_PBCH_DMRS_LENGTH<<1];
uint8_t idx=0;
uint8_t nushift = config->sch_config.physical_cell_id.value &3;
@@ -72,10 +72,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
}
/// Resource mapping
a = (config->rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
for (int aa = 0; aa < config->rf_config.tx_antenna_ports.value; aa++)
{
// PBCH DMRS are mapped within the SSB block on every fourth subcarrier starting from nushift of symbols 1, 2, 3
///symbol 1 [0+nushift:4:236+nushift] -- 60 mod symbols
@@ -86,12 +83,12 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
#ifdef DEBUG_PBCH_DMRS
printf("m %d at k %d of l %d\n", m, k, l);
#endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[(m<<1) + 1]) >> 15;
#ifdef DEBUG_PBCH_DMRS
printf("(%d,%d)\n",
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
k+=4;
@@ -107,12 +104,12 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
#ifdef DEBUG_PBCH_DMRS
printf("m %d at k %d of l %d\n", m, k, l);
#endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[(m<<1) + 1]) >> 15;
#ifdef DEBUG_PBCH_DMRS
printf("(%d,%d)\n",
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
k+=(m==71)?148:4; // Jump from 44+nu to 192+nu
@@ -128,12 +125,12 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
#ifdef DEBUG_PBCH_DMRS
printf("m %d at k %d of l %d\n", m, k, l);
#endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[(m<<1) + 1]) >> 15;
#ifdef DEBUG_PBCH_DMRS
printf("(%d,%d)\n",
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
k+=4;
@@ -141,7 +138,6 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
k-=frame_parms->ofdm_symbol_size;
}
}
#ifdef DEBUG_PBCH_DMRS
@@ -225,13 +221,14 @@ void nr_init_pbch_interleaver(uint8_t *interleaver) {
*(interleaver+i) = *(nr_pbch_payload_interleaving_pattern+j_hrf);
else // Ssb bits:3
*(interleaver+i) = *(nr_pbch_payload_interleaving_pattern+j_ssb++);
}
int nr_generate_pbch(NR_gNB_PBCH *pbch,
t_nrPolar_paramsPtr polar_params,
uint8_t *pbch_pdu,
uint8_t *interleaver,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t n_hf,
@@ -243,12 +240,13 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
{
int k,l,m;
int16_t a;
//int16_t a;
int16_t mod_pbch_e[NR_POLAR_PBCH_E];
uint8_t idx=0;
uint16_t M;
uint8_t nushift;
uint32_t unscrambling_mask;
uint64_t a_reversed=0;
LOG_I(PHY, "PBCH generation started\n");
@@ -303,8 +301,13 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
printf("pbch_a_prime: 0x%08x\n", pbch->pbch_a_prime);
#endif
// Encoder reversal
for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS; i++)
a_reversed |= (((uint64_t)pbch->pbch_a_prime>>i)&1)<<(31-i);
/// CRC, coding and rate matching
polar_encoder (&pbch->pbch_a_prime, pbch->pbch_e, polar_params);
polar_encoder_fast (&a_reversed, (uint32_t*)pbch->pbch_e, 0, polar_params);
#ifdef DEBUG_PBCH_ENCODING
printf("Channel coding:\n");
for (int i=0; i<NR_POLAR_PBCH_E_DWORD; i++)
@@ -336,10 +339,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
/// Resource mapping
nushift = config->sch_config.physical_cell_id.value &3;
a = (config->rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
for (int aa = 0; aa < config->rf_config.tx_antenna_ports.value; aa++)
{
// PBCH modulated symbols are mapped within the SSB block on symbols 1, 2, 3 excluding the subcarriers used for the PBCH DMRS
///symbol 1 [0:239] -- 180 mod symbols
@@ -357,8 +357,8 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#ifdef DEBUG_PBCH
printf("m %d ssb_sc_idx %d at k %d of l %d\n", m, ssb_sc_idx, k, l);
#endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_pbch_e[(m<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_pbch_e[(m<<1) + 1]) >> 15;
k++;
m++;
}
@@ -382,8 +382,8 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#ifdef DEBUG_PBCH
printf("m %d ssb_sc_idx %d at k %d of l %d\n", m, ssb_sc_idx, k, l);
#endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_pbch_e[(m<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_pbch_e[(m<<1) + 1]) >> 15;
k++;
m++;
}
@@ -408,8 +408,8 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#ifdef DEBUG_PBCH
printf("m %d ssb_sc_idx %d at k %d of l %d\n", m, ssb_sc_idx, k, l);
#endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_pbch_e[(m<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_pbch_e[(m<<1) + 1]) >> 15;
k++;
m++;
}
@@ -433,8 +433,8 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#ifdef DEBUG_PBCH
printf("m %d ssb_sc_idx %d at k %d of l %d\n", m, ssb_sc_idx, k, l);
#endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_pbch_e[(m<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_pbch_e[(m<<1) + 1]) >> 15;
k++;
m++;
}
@@ -443,7 +443,6 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
k-=frame_parms->ofdm_symbol_size;
}
}
return 0;
}
openair1/PHY/NR_TRANSPORT/nr_pss.c
+4 -7
View File
@@ -25,7 +25,7 @@
//#define NR_PSS_DEBUG
int nr_generate_pss( int16_t *d_pss,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
@@ -48,7 +48,7 @@ int nr_generate_pss( int16_t *d_pss,
for (i=0; i < NR_PSS_LENGTH; i++) {
m = (i + 43*Nid2)%(NR_PSS_LENGTH);
d_pss[i] = (1 - 2*x[m]) * 32767;
d_pss[i] = (1 - 2*x[m]) * 23170;
}
#ifdef NR_PSS_DEBUG
@@ -57,10 +57,8 @@ int nr_generate_pss( int16_t *d_pss,
#endif
/// Resource mapping
a = (config->rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
a = amp;
for (int aa = 0; aa < config->rf_config.tx_antenna_ports.value; aa++)
{
// PSS occupies a predefined position (subcarriers 56-182, symbol 0) within the SSB block starting from
k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and
@@ -70,13 +68,12 @@ int nr_generate_pss( int16_t *d_pss,
for (m = 0; m < NR_PSS_LENGTH; m++) {
// printf("pss: writing position k %d / %d\n",k,frame_parms->ofdm_symbol_size);
((int16_t*)txdataF[aa])[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_pss[m]) >> 15;
((int16_t*)txdataF)[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_pss[m]) >> 15;
k++;
if (k >= frame_parms->ofdm_symbol_size)
k-=frame_parms->ofdm_symbol_size;
}
}
#ifdef NR_PSS_DEBUG
LOG_M("pss_0.m", "pss_0",
openair1/PHY/NR_TRANSPORT/nr_sss.c
+4 -9
View File
@@ -24,7 +24,7 @@
//#define NR_SSS_DEBUG
int nr_generate_sss( int16_t *d_sss,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
@@ -33,7 +33,7 @@ int nr_generate_sss( int16_t *d_sss,
int i,k,l;
int m0, m1;
int Nid, Nid1, Nid2;
int16_t a;
//int16_t a;
int16_t x0[NR_SSS_LENGTH], x1[NR_SSS_LENGTH];
const int x0_initial[7] = { 1, 0, 0, 0, 0, 0, 0 };
const int x1_initial[7] = { 1, 0, 0, 0, 0, 0, 0 };
@@ -57,7 +57,7 @@ int nr_generate_sss( int16_t *d_sss,
m1 = Nid1 % 112;
for (i = 0; i < NR_SSS_LENGTH ; i++) {
d_sss[i] = (1 - 2*x0[(i + m0) % NR_SSS_LENGTH] ) * (1 - 2*x1[(i + m1) % NR_SSS_LENGTH] ) * 32767;
d_sss[i] = (1 - 2*x0[(i + m0) % NR_SSS_LENGTH] ) * (1 - 2*x1[(i + m1) % NR_SSS_LENGTH] ) * 23170;
}
#ifdef NR_SSS_DEBUG
@@ -65,23 +65,18 @@ int nr_generate_sss( int16_t *d_sss,
#endif
/// Resource mapping
a = (config->rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
for (int aa = 0; aa < config->rf_config.tx_antenna_ports.value; aa++)
{
// SSS occupies a predefined position (subcarriers 56-182, symbol 2) within the SSB block starting from
k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and
l = ssb_start_symbol + 2;
for (int m = 0; m < NR_SSS_LENGTH; m++) {
((int16_t*)txdataF[aa])[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_sss[m]) >> 15;
((int16_t*)txdataF)[2*(l*frame_parms->ofdm_symbol_size + k)] = (amp * d_sss[m]) >> 15;
k++;
if (k >= frame_parms->ofdm_symbol_size)
k-=frame_parms->ofdm_symbol_size;
}
}
#ifdef NR_SSS_DEBUG
// write_output("sss_0.m", "sss_0", (void*)txdataF[0][l*frame_parms->ofdm_symbol_size], frame_parms->ofdm_symbol_size, 1, 1);
#endif
openair1/PHY/NR_TRANSPORT/nr_transport.h
+4 -4
View File
@@ -33,7 +33,7 @@
@returns 0 on success
*/
int nr_generate_pss( int16_t *d_pss,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
@@ -46,7 +46,7 @@ int nr_generate_pss( int16_t *d_pss,
@returns 0 on success
*/
int nr_generate_sss( int16_t *d_sss,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
@@ -59,7 +59,7 @@ int nr_generate_sss( int16_t *d_sss,
@returns 0 on success
*/
int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
@@ -88,7 +88,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
t_nrPolar_paramsPtr polar_params,
uint8_t *pbch_pdu,
uint8_t *interleaver,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t n_hf,
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
+8 -6
View File
@@ -295,8 +295,10 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
fm = filt16a_m1;
fr = filt16a_r1;
// generate pilot
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns>>1][symbol], &pilot[0],2000,nb_rb_coreset);
// generate pilot
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[0],2000,nb_rb_coreset);
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
@@ -313,10 +315,10 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
printf("pdcch ch est pilot addr %p RB_DL %d\n",&pilot[0], ue->frame_parms.N_RB_DL);
printf("k %d, first_carrier %d\n",k,ue->frame_parms.first_carrier_offset);
printf("rxF addr %p\n", rxF);
printf("dl_ch addr %p nushift %d\n",dl_ch,nushift);
#endif
if ((ue->frame_parms.N_RB_DL&1)==0) {
printf("dl_ch addr %p\n",dl_ch);
#endif
// if ((ue->frame_parms.N_RB_DL&1)==0) {
// Treat first 2 pilots specially (left edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
@@ -421,7 +423,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
}
}
//}
}
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
+1536 -1667
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File diff suppressed because it is too large Load Diff
openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
+26 -8
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@@ -30,6 +30,7 @@
* \warning
*/
//#include "PHY/defs.h"
#include <stdint.h>
#include "PHY/defs_nr_UE.h"
//#include "PHY/NR_TRANSPORT/nr_dci.h"
//#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
@@ -67,18 +68,28 @@ uint16_t nr_dci_field(uint32_t dci_pdu[4],
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS],
uint8_t dci_field)
{
uint16_t field_value = 0 ;
// uint16_t field_value = 0 ;
// first_bit_position contains the position of the first bit of the corresponding field within the dci pdu payload
uint16_t first_bit_position = 0;
// last_bit_position contains the position of the last bit of the corresponding field within the dci pdu payload
uint16_t last_bit_position = 0;
uint8_t bit=0;
// uint16_t last_bit_position = 0;
// uint8_t bit=0;
//printf("\tdci_field=%d, \tsize=%d \t|",dci_field,dci_fields_sizes[dci_field]);
for (int i=0; i<dci_field ; i++){
first_bit_position = first_bit_position + dci_fields_sizes[i];
int dci_size=0;
for (int i=0;i<NBR_NR_DCI_FIELDS;i++) dci_size+=dci_fields_sizes[i];
AssertFatal(dci_size<65,"DCI has %d > 64 bits, not supported for now\n",
dci_size);
uint16_t first_bit_position = dci_size;
for (int i=0; i<=dci_field ; i++){
first_bit_position = first_bit_position - dci_fields_sizes[i];
}
last_bit_position = first_bit_position + dci_fields_sizes[dci_field];
// last_bit_position = first_bit_position + dci_fields_sizes[dci_field];
//printf("\tfirst_bit=%d,\tlast_bit=%d",first_bit_position,last_bit_position);
/*
for (int i=0; i<4; i++)
for (int j=0; j<32; j++){
if ((((i*32)+j) >= first_bit_position) && (((i*32)+j) < last_bit_position)){
@@ -87,7 +98,14 @@ uint16_t nr_dci_field(uint32_t dci_pdu[4],
//printf(" bit(%d)=%d[%d] ",(i*32)+j,bit,field_value);
}
}
return field_value;
*/
uint64_t *dci_pdu64=(uint64_t*)&dci_pdu[0];
/*
printf("pdu %llx, field %d, pos %d, size %d => %u\n",(long long unsigned int)*dci_pdu64,dci_field,first_bit_position,dci_fields_sizes[dci_field],
(unsigned int)((*dci_pdu64>>first_bit_position)&((1<<dci_fields_sizes[dci_field])-1)));*/
return (uint16_t)((*dci_pdu64>>first_bit_position)&((1<<dci_fields_sizes[dci_field])-1));
}
int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
+2 -1
View File
@@ -35,6 +35,7 @@
#include "PHY/CODING/coding_extern.h"
#include "PHY/CODING/coding_defs.h"
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "SCHED_NR_UE/defs.h"
#include "SIMULATION/TOOLS/sim.h"
@@ -196,7 +197,7 @@ void nr_dlsch_unscrambling(int16_t* llr,
}
uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
+5 -5
View File
@@ -131,10 +131,10 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
unsigned short nb_rb_pdsch = 50;
int16_t *pllr_symbol_cw0;
int16_t *pllr_symbol_cw1;
int16_t *pllr_symbol_cw0_deint;
int16_t *pllr_symbol_cw1_deint;
//int16_t *pllr_symbol_cw0_deint;
//int16_t *pllr_symbol_cw1_deint;
uint32_t llr_offset_symbol;
uint16_t bundle_L = 2;
//uint16_t bundle_L = 2;
uint8_t l0 =2;
switch (type) {
@@ -2001,7 +2001,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
unsigned short k,rb;
unsigned char i,aarx,l; //,nsymb,sss_symb,pss_symb=0;
unsigned char i,aarx; //,nsymb,sss_symb,pss_symb=0,l;
int *dl_ch0,*dl_ch0_ext,*rxF,*rxF_ext;
@@ -2010,7 +2010,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
//symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
pilots = (symbol==2) ? 1 : 0; //to updated from config
l=symbol;
//l=symbol;
//nsymb = (frame_parms->Ncp==NORMAL) ? 14:12;
k = frame_parms->first_carrier_offset + 516; //0
openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
+1 -1
View File
@@ -140,7 +140,7 @@ char prefix_string[2][9] = {"NORMAL","EXTENDED"};
int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
{
int32_t sync_pos, sync_pos2, sync_pos_slot; // k_ssb, N_ssb_crb,
int32_t sync_pos, sync_pos_slot; // k_ssb, N_ssb_crb, sync_pos2,
int32_t metric_tdd_ncp=0;
uint8_t phase_tdd_ncp;
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
+25 -16
View File
@@ -516,7 +516,7 @@ unsigned char sign(int8_t x) {
*/
uint8_t pbch_deinterleaving_pattern[32] = {28,0,31,30,7,29,25,27,5,8,24,9,10,11,12,13,1,4,3,14,15,16,17,2,26,18,19,20,21,22,6,23};
int nr_rx_pbch( PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_PBCH *nr_ue_pbch_vars,
@@ -530,10 +530,10 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
int max_h=0;
int symbol,i;
int symbol;
//uint8_t pbch_a[64];
uint8_t *pbch_a = malloc(sizeof(uint8_t) * 32);
uint32_t pbch_a_prime;
//uint32_t pbch_a_prime;
int16_t *pbch_e_rx;
uint8_t *decoded_output = nr_ue_pbch_vars->decoded_output;
uint8_t nushift;
@@ -541,12 +541,12 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
uint8_t Lmax=8; //to update
uint8_t ssb_index=0;
//uint16_t crc;
unsigned short idx_demod =0;
int8_t decoderState=0;
uint8_t decoderListSize = 8, pathMetricAppr = 0;
//unsigned short idx_demod =0;
uint32_t decoderState=0;
//uint8_t decoderListSize = 8, pathMetricAppr = 0;
time_stats_t polar_decoder_init,polar_rate_matching,decoding,bit_extraction,deinterleaving;
time_stats_t path_metric,sorting,update_LLR;
//time_stats_t polar_decoder_init,polar_rate_matching,decoding,bit_extraction,deinterleaving;
//time_stats_t path_metric,sorting,update_LLR;
memset(&pbch_a[0], 0, sizeof(uint8_t) * NR_POLAR_PBCH_PAYLOAD_BITS);
//printf("nr_pbch_ue nid_cell %d\n",frame_parms->Nid_cell);
@@ -661,18 +661,27 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
//polar decoding de-rate matching
nr_polar_init(&nr_ue_pbch_vars->nrPolar_params,
NR_POLAR_PBCH_MESSAGE_TYPE,
NR_POLAR_PBCH_PAYLOAD_BITS,
NR_POLAR_PBCH_AGGREGATION_LEVEL);
AssertFatal(ue->nrPolar_params != NULL,"ue->nrPolar_params is null\n");
AssertFatal(nr_ue_pbch_vars->nrPolar_params != NULL,"nr_ue_pbch_vars->nrPolar_params is null\n");
t_nrPolar_params *currentPtr = nr_polar_params(ue->nrPolar_params, NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL);
t_nrPolar_params *currentPtr = nr_polar_params(nr_ue_pbch_vars->nrPolar_params, NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL);
decoderState = polar_decoder_int16(pbch_e_rx,(uint8_t*)&nr_ue_pbch_vars->pbch_a_prime,currentPtr);
if(decoderState == -1)
return(decoderState);
decoderState = polar_decoder_int16(pbch_e_rx,(uint64_t*)&nr_ue_pbch_vars->pbch_a_prime,currentPtr);
if(decoderState) return(decoderState);
//printf("polar decoder output 0x%08x\n",nr_ue_pbch_vars->pbch_a_prime);
// printf("polar decoder output 0x%08x\n",nr_ue_pbch_vars->pbch_a_prime);
// Decoder reversal
uint32_t a_reversed=0;
for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS; i++)
a_reversed |= (((uint64_t)nr_ue_pbch_vars->pbch_a_prime>>i)&1)<<(31-i);
nr_ue_pbch_vars->pbch_a_prime = a_reversed;
//payload un-scrambling
memset(&nr_ue_pbch_vars->pbch_a_interleaved, 0, sizeof(uint32_t) );
openair1/PHY/NR_UE_TRANSPORT/nr_prach.c
+4 -3
View File
@@ -40,6 +40,7 @@
//#include "PHY/defs_nr_common.h"
#include "PHY/defs_nr_UE.h"
#include "PHY/NR_UE_TRANSPORT/nr_prach.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
//#include "PHY/extern.h"
//#include "LAYER2/MAC/extern.h"
//#include "PHY/NR_UE_TRANSPORT/pucch_nr.h"
@@ -574,7 +575,7 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
uint8_t restricted_set = ue->frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag;
//uint8_t n_ra_prboffset = ue->frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset;
uint8_t preamble_index = ue->prach_resources[eNB_id]->ra_PreambleIndex;
uint8_t tdd_mapindex = ue->prach_resources[eNB_id]->ra_TDD_map_index;
//uint8_t tdd_mapindex = ue->prach_resources[eNB_id]->ra_TDD_map_index;
int16_t *prachF = ue->prach_vars[eNB_id]->prachF;
static int16_t prach_tmp[45600*2] __attribute__((aligned(32)));
int16_t *prach = prach_tmp;
@@ -582,7 +583,7 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
int16_t amp = ue->prach_vars[eNB_id]->amp;
int16_t Ncp;
uint8_t n_ra_prb;
uint16_t NCS;
uint16_t NCS=0;
uint16_t *prach_root_sequence_map;
uint16_t preamble_offset,preamble_shift;
uint16_t preamble_index0,n_shift_ra,n_shift_ra_bar;
@@ -599,7 +600,7 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
int32_t Xu_re,Xu_im;
uint16_t offset,offset2;
int prach_start;
int i, prach_len;
int i, prach_len=0;
uint16_t first_nonzero_root_idx=0;
#if defined(EXMIMO) || defined(OAI_USRP)
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+1 -1
View File
@@ -1652,7 +1652,7 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms,
uint8_t tdd_mapindex, uint16_t Nf);
void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8_t nr_tti_rx,
uint16_t *z, uint32_t length, uint16_t pdcch_DMRS_scrambling_id, int do_common);
int16_t *z, uint32_t length, uint16_t pdcch_DMRS_scrambling_id, int do_common);
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
openair1/PHY/NR_UE_TRANSPORT/pss_nr.c
+2 -2
View File
@@ -874,8 +874,8 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain
pss_corr_ue[pss_index][n] += abs64(result);
//((short*)pss_corr_ue[pss_index])[2*n] += ((short*) &result)[0]; /* real part */
//((short*)pss_corr_ue[pss_index])[2*n+1] += ((short*) &result)[1]; /* imaginary part */
//((short*)&synchro_out)[0] += ((short*) &result)[0]; /* real part */
//((short*)&synchro_out)[1] += ((short*) &result)[1]; /* imaginary part */
//((short*)&synchro_out)[0] += ((int*) &result)[0]; /* real part */
//((short*)&synchro_out)[1] += ((int*) &result)[1]; /* imaginary part */
}
}
openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c
+28 -27
View File
@@ -36,6 +36,7 @@
//#include "PHY/extern.h"
//#include "LAYER2/MAC/extern.h"
#include "PHY/NR_UE_TRANSPORT/pucch_nr.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
@@ -129,7 +130,7 @@ double nr_cyclic_shift_hopping(PHY_VARS_NR_UE *ue,
*/
// alpha_init initialized to 2*PI/12=0.5235987756
double alpha = 0.5235987756;
uint16_t c_init = ue->pucch_config_common_nr->hoppingId; // we initialize c_init again to calculate n_cs
uint32_t c_init = ue->pucch_config_common_nr->hoppingId; // we initialize c_init again to calculate n_cs
#ifdef DEBUG_NR_PUCCH_TX
// initialization to be removed
@@ -181,9 +182,9 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
// alpha is cyclic shift
double alpha;
// lnormal is the OFDM symbol number in the PUCCH transmission where l=0 corresponds to the first OFDM symbol of the PUCCH transmission
uint8_t lnormal;
//uint8_t lnormal;
// lprime is the index of the OFDM symbol in the slot that corresponds to the first OFDM symbol of the PUCCH transmission in the slot given by [5, TS 38.213]
uint8_t lprime;
//uint8_t lprime;
// mcs is provided by TC 38.213 subclauses 9.2.3, 9.2.4, 9.2.5 FIXME!
//uint8_t mcs;
@@ -198,7 +199,7 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
* x(l*12+n) = r_u_v_alpha_delta(n)
*/
// the value of u,v (delta always 0 for PUCCH) has to be calculated according to TS 38.211 Subclause 6.3.2.2.1
uint8_t u=0,v=0,delta=0;
uint8_t u=0,v=0;//,delta=0;
// if frequency hopping is disabled by the higher-layer parameter PUCCH-frequency-hopping
// n_hop = 0
// if frequency hopping is enabled by the higher-layer parameter PUCCH-frequency-hopping
@@ -236,8 +237,8 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
/*
* Implementing TS 38.211 Subclause 6.3.2.3.2 Mapping to physical resources FIXME!
*/
int32_t *txptr;
uint32_t re_offset;
//int32_t *txptr;
uint32_t re_offset=0;
for (int l=0; l<nrofSymbols; l++) {
if ((startingPRB < (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 0)) { // if number RBs in bandwidth is even and current PRB is lower band
re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset;
@@ -254,7 +255,7 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
if ((startingPRB == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) { // if number RBs in bandwidth is odd and current PRB contains DC
re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset;
}
txptr = &txdataF[0][re_offset];
//txptr = &txdataF[0][re_offset];
for (int n=0; n<12; n++){
if ((n==6) && (startingPRB == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) {
// if number RBs in bandwidth is odd and current PRB contains DC, we need to recalculate the offset when n=6 (for second half PRB)
@@ -299,7 +300,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
*
*/
// complex-valued symbol d_re, d_im containing complex-valued symbol d(0):
int16_t d_re, d_im;
int16_t d_re=0, d_im=0;
if (nr_bit == 1) { // using BPSK if M_bit=1 according to TC 38.211 Subclause 5.1.2
d_re = (payload&1)==0 ? (int16_t)(((int32_t)amp*ONE_OVER_SQRT2)>>15) : -(int16_t)(((int32_t)amp*ONE_OVER_SQRT2)>>15);
d_im = (payload&1)==0 ? (int16_t)(((int32_t)amp*ONE_OVER_SQRT2)>>15) : -(int16_t)(((int32_t)amp*ONE_OVER_SQRT2)>>15);
@@ -332,7 +333,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
// alpha is cyclic shift
double alpha;
// lnormal is the OFDM symbol number in the PUCCH transmission where l=0 corresponds to the first OFDM symbol of the PUCCH transmission
uint8_t lnormal = 0 ;
//uint8_t lnormal = 0 ;
// lprime is the index of the OFDM symbol in the slot that corresponds to the first OFDM symbol of the PUCCH transmission in the slot given by [5, TS 38.213]
uint8_t lprime = startingSymbolIndex;
// mcs = 0 except for PUCCH format 0
@@ -350,7 +351,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
* the complex-valued symbol d_0 shall be multiplied with a sequence r_u_v_alpha_delta(n): y(n) = d_0 * r_u_v_alpha_delta(n)
*/
// the value of u,v (delta always 0 for PUCCH) has to be calculated according to TS 38.211 Subclause 6.3.2.2.1
uint8_t u=0,v=0,delta=0;
uint8_t u=0,v=0;//,delta=0;
// if frequency hopping is disabled, intraSlotFrequencyHopping is not provided
// n_hop = 0
// if frequency hopping is enabled, intraSlotFrequencyHopping is provided
@@ -371,8 +372,8 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
/*
* Implementing TS 38.211 Subclause 6.3.2.4.2 Mapping to physical resources
*/
int32_t *txptr;
uint32_t re_offset;
//int32_t *txptr;
uint32_t re_offset=0;
int i=0;
#define MAX_SIZE_Z 168 // this value has to be calculated from mprime*12*table_6_3_2_4_1_1_N_SF_mprime_PUCCH_1_noHop[pucch_symbol_length]+m*12+n
int16_t z_re[MAX_SIZE_Z],z_im[MAX_SIZE_Z];
@@ -552,7 +553,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
}
txptr = &txdataF[0][re_offset];
//txptr = &txdataF[0][re_offset];
for (int n=0; n<12; n++){
if ((n==6) && (startingPRB == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) {
// if number RBs in bandwidth is odd and current PRB contains DC, we need to recalculate the offset when n=6 (for second half PRB)
@@ -904,7 +905,7 @@ void nr_uci_encoding(uint64_t payload,
// L is the CRC size
uint8_t L;
// E is the rate matching output sequence length as given in TS 38.212 subclause 6.3.1.4.1
uint16_t E,E_init;
uint16_t E=0,E_init;
if (fmt == pucch_format2_nr) E = 16*nrofSymbols*nrofPRB;
if (fmt == pucch_format3_nr){
E_init = (is_pi_over_2_bpsk_enabled == 0) ? 24:12;
@@ -1061,8 +1062,8 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
/*
* Implementing TS 38.211 Subclause 6.3.2.5.3 Mapping to physical resources
*/
int32_t *txptr;
uint32_t re_offset;
//int32_t *txptr;
uint32_t re_offset=0;
uint32_t x1, x2, s=0;
int i=0;
int m=0;
@@ -1086,7 +1087,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
if (((rb+startingPRB) == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) { // if number RBs in bandwidth is odd and current PRB contains DC
re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*(rb+startingPRB)) + frame_parms->first_carrier_offset;
}
txptr = &txdataF[0][re_offset];
//txptr = &txdataF[0][re_offset];
int k=0;
int kk=0;
for (int n=0; n<12; n++){
@@ -1286,7 +1287,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
{0, 0, 0,-1,-1,-1, 0, 0, 0, 1, 1, 1},
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 1, 1, 1, 0, 0, 0,-1,-1,-1}};
uint8_t occ_Length = occ_length_format4; // higher layer parameter occ-Length
//uint8_t occ_Length = occ_length_format4; // higher layer parameter occ-Length
uint8_t occ_Index = occ_index_format4; // higher layer parameter occ-Index
//occ_Index = 1; //only for testing purposes; to be removed FIXME!!!
if (fmt == pucch_format3_nr){ // no block-wise spreading for format 3
@@ -1377,7 +1378,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
* Implementing TS 38.211 Subclauses 6.3.2.5.3 and 6.3.2.6.5 Mapping to physical resources
*/
// the value of u,v (delta always 0 for PUCCH) has to be calculated according to TS 38.211 Subclause 6.3.2.2.1
uint8_t u=0,v=0,delta=0;
uint8_t u=0,v=0;//,delta=0;
// if frequency hopping is disabled, intraSlotFrequencyHopping is not provided
// n_hop = 0
// if frequency hopping is enabled, intraSlotFrequencyHopping is provided
@@ -1385,9 +1386,9 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
// n_hop = 1 for second hop
uint8_t n_hop = 0;
// lnormal is the OFDM symbol number in the PUCCH transmission where l=0 corresponds to the first OFDM symbol of the PUCCH transmission
uint8_t lnormal = 0 ;
//uint8_t lnormal = 0 ;
// lprime is the index of the OFDM symbol in the slot that corresponds to the first OFDM symbol of the PUCCH transmission in the slot given by [5, TS 38.213]
uint8_t lprime = startingSymbolIndex;
//uint8_t lprime = startingSymbolIndex;
// m0 is the cyclic shift index calculated depending on the Orthogonal sequence index n, according to table 6.4.1.3.3.1-1 from TS 38.211 subclause 6.4.1.3.3.1
uint8_t m0;
uint8_t mcs=0;
@@ -1404,13 +1405,13 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
uint8_t N_ZC = 12*nrofPRB;
int16_t *r_u_v_base_re = malloc(sizeof(int16_t)*12*nrofPRB);
int16_t *r_u_v_base_im = malloc(sizeof(int16_t)*12*nrofPRB);
int16_t *r_u_v_alpha_delta_re = malloc(sizeof(int16_t)*12*nrofPRB);
int16_t *r_u_v_alpha_delta_im = malloc(sizeof(int16_t)*12*nrofPRB);
//int16_t *r_u_v_alpha_delta_re = malloc(sizeof(int16_t)*12*nrofPRB);
//int16_t *r_u_v_alpha_delta_im = malloc(sizeof(int16_t)*12*nrofPRB);
// Next we proceed to mapping to physical resources according to TS 38.211, subclause 6.3.2.6.5 dor PUCCH formats 3 and 4 and subclause 6.4.1.3.3.2 for DM-RS
int32_t *txptr;
uint32_t re_offset;
uint32_t x1, x2, s=0;
//int32_t *txptr;
uint32_t re_offset=0;
//uint32_t x1, x2, s=0;
// intraSlotFrequencyHopping
// uint8_t intraSlotFrequencyHopping = 0;
uint8_t table_6_4_1_3_3_2_1_dmrs_positions[11][14] ={
@@ -1513,7 +1514,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
#ifdef DEBUG_NR_PUCCH_TX
printf("re_offset=%d,(rb+startingPRB)=%d\n",re_offset,(rb+startingPRB));
#endif
txptr = &txdataF[0][re_offset];
//txptr = &txdataF[0][re_offset];
for (int n=0; n<12; n++){
if ((n==6) && ((rb+startingPRB) == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) {
// if number RBs in bandwidth is odd and current PRB contains DC, we need to recalculate the offset when n=6 (for second half PRB)
openair1/PHY/defs_RU.h
+5 -5
View File
@@ -120,10 +120,10 @@ typedef struct RU_proc_t_s {
openair0_timestamp timestamp_rx;
/// timestamp to send to "slave rru"
openair0_timestamp timestamp_tx;
/// subframe to act upon for reception
int subframe_rx;
/// subframe to act upon for transmission
int subframe_tx;
/// subframe (LTE) / slot (NR) to act upon for reception
int tti_rx;
/// subframe (LTE) / slot (NR) to act upon for transmission
int tti_tx;
/// subframe to act upon for reception of prach
int subframe_prach;
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
@@ -420,7 +420,7 @@ typedef struct RU_t_s{
/// function pointer to NB entry routine
void (*eNB_top)(struct PHY_VARS_eNB_s *eNB, int frame_rx, int subframe_rx, char *string, struct RU_t_s *ru);
void (*gNB_top)(struct PHY_VARS_gNB_s *gNB, int frame_rx, int subframe_rx, char *string, struct RU_t_s *ru);
void (*gNB_top)(struct PHY_VARS_gNB_s *gNB, int frame_rx, int slot_rx, char *string, struct RU_t_s *ru);
/// Timing statistics
time_stats_t ofdm_demod_stats;
openair1/PHY/defs_gNB.h
+12 -13
View File
@@ -69,7 +69,7 @@ typedef struct {
/// CCE list
nr_cce_t cce_list[NR_MAX_PDCCH_AGG_LEVEL];
/// DCI pdu
uint32_t dci_pdu[4];
uint64_t dci_pdu[2];
} NR_gNB_DCI_ALLOC_t;
typedef struct {
@@ -178,16 +178,16 @@ typedef struct {
} NR_gNB_COMMON;
/// Context data structure for RX/TX portion of subframe processing
/// Context data structure for RX/TX portion of slot processing
typedef struct {
/// Component Carrier index
uint8_t CC_id;
/// timestamp transmitted to HW
openair0_timestamp timestamp_tx;
/// subframe to act upon for transmission
int subframe_tx;
/// subframe to act upon for reception
int subframe_rx;
/// slot to act upon for transmission
int slot_tx;
/// slot to act upon for reception
int slot_rx;
/// frame to act upon for transmission
int frame_tx;
/// frame to act upon for reception
@@ -215,7 +215,7 @@ typedef struct {
} gNB_L1_rxtx_proc_t;
/// Context data structure for eNB subframe processing
/// Context data structure for eNB slot processing
typedef struct gNB_L1_proc_t_s {
/// Component Carrier index
uint8_t CC_id;
@@ -225,10 +225,10 @@ typedef struct gNB_L1_proc_t_s {
openair0_timestamp timestamp_rx;
/// timestamp to send to "slave rru"
openair0_timestamp timestamp_tx;
/// subframe to act upon for reception
int subframe_rx;
/// subframe to act upon for PRACH
int subframe_prach;
/// slot to act upon for reception
int slot_rx;
/// slot to act upon for PRACH
int slot_prach;
/// frame to act upon for reception
int frame_rx;
/// frame to act upon for transmission
@@ -392,7 +392,6 @@ typedef struct PHY_VARS_gNB_s {
NR_gNB_PDCCH pdcch_vars;
NR_gNB_PBCH pbch;
t_nrPolar_paramsPtr nrPolar_params;
nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_type0_params;
LTE_eNB_PHICH phich_vars[2];
NR_gNB_COMMON common_vars;
@@ -490,7 +489,7 @@ typedef struct PHY_VARS_gNB_s {
/// cba_last successful reception for each group, used for collision detection
uint8_t cba_last_reception[4];
// Pointers for active physicalConfigDedicated to be applied in current subframe
// Pointers for active physicalConfigDedicated to be applied in current slot
struct PhysicalConfigDedicated *physicalConfigDedicated[NUMBER_OF_UE_MAX];
openair1/PHY/defs_nr_UE.h
+14 -5
View File
@@ -863,16 +863,16 @@ typedef struct {
int32_t **rho;
/// \brief Pointer to llrs, 4-bit resolution.
/// - first index: ? [0..48*N_RB_DL[
uint16_t *llr;
int16_t *llr;
/// \brief Pointer to llrs, 16-bit resolution.
/// - first index: ? [0..96*N_RB_DL[
uint16_t *llr16;
int16_t *llr16;
/// \brief \f$\overline{w}\f$ from 36-211.
/// - first index: ? [0..48*N_RB_DL[
uint16_t *wbar;
int16_t *wbar;
/// \brief PDCCH/DCI e-sequence (input to rate matching).
/// - first index: ? [0..96*N_RB_DL[
int8_t *e_rx;
int16_t *e_rx;
/// number of PDCCH symbols in current subframe
uint8_t num_pdcch_symbols;
/// Allocated CRNTI for UE
@@ -892,6 +892,7 @@ typedef struct {
//Check for specific DCIFormat and AgregationLevel
uint8_t dciFormat;
uint8_t agregationLevel;
t_nrPolar_paramsPtr nrPolar_params;
#ifdef NR_PDCCH_DEFS_NR_UE
int nb_searchSpaces;
// CORESET structure, where maximum number of CORESETs to be handled is 3 (according to 38.331 V15.1.0)
@@ -900,6 +901,7 @@ typedef struct {
// Each SearchSpace is associated with one ControlResourceSet
NR_UE_PDCCH_SEARCHSPACE searchSpace[NR_NBR_SEARCHSPACE_ACT_BWP];
int n_RB_BWP[NR_NBR_SEARCHSPACE_ACT_BWP];
uint32_t nb_search_space;
#endif
} NR_UE_PDCCH;
@@ -931,6 +933,8 @@ typedef struct {
/// \brief Pointer to PBCH decoded output.
/// - first index: ? [0..63] (hard coded)
uint8_t *decoded_output;
/// polar decoder parameters
t_nrPolar_paramsPtr nrPolar_params;
/// \brief Total number of PDU errors.
uint32_t pdu_errors;
/// \brief Total number of PDU errors 128 frames ago.
@@ -1017,7 +1021,12 @@ typedef struct {
nr_ue_if_module_t *if_inst;
nr_downlink_indication_t dl_indication;
nr_uplink_indication_t ul_indication;
/// UE FAPI DCI request
nr_dcireq_t dcireq;
/// UE FAPI indication for DLSCH reception
fapi_nr_rx_indication_t rx_ind;
/// UE FAPI indication for DCI reception
fapi_nr_dci_indication_t dci_ind;
// point to the current rxTx thread index
@@ -1061,7 +1070,7 @@ typedef struct {
uint32_t dmrs_pbch_bitmap_nr[DMRS_PBCH_I_SSB][DMRS_PBCH_N_HF][DMRS_BITMAP_SIZE];
#endif
t_nrPolar_params *nrPolar_params;
/// PBCH DMRS sequence
uint32_t nr_gold_pbch[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
openair1/PHY/defs_nr_common.h
+6 -1
View File
@@ -40,6 +40,7 @@
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
#define nr_subframe_t lte_subframe_t
#define nr_slot_t lte_subframe_t
#define MAX_NUM_SUBCARRIER_SPACING 5
@@ -256,15 +257,19 @@ typedef struct NR_DL_FRAME_PARMS {
uint16_t slots_per_frame;
/// Number of samples in a subframe
uint32_t samples_per_subframe;
/// Number of samples in a slot
uint32_t samples_per_slot;
/// Number of OFDM/SC-FDMA symbols in one subframe (to be modified to account for potential different in UL/DL)
uint16_t symbols_per_tti;
/// Number of samples in a radio frame
uint32_t samples_per_frame;
/// Number of samples in a subframe without CP
uint32_t samples_per_subframe_wCP;
/// Number of samples in a slot without CP
uint32_t samples_per_slot_wCP;
/// Number of samples in a radio frame without CP
uint32_t samples_per_frame_wCP;
/// Number of samples in a tti (same as subrame in LTE, depending on numerology in NR)
/// Number of samples in a tti (same as subrame in LTE, slot in NR)
uint32_t samples_per_tti;
/// NR numerology index [0..5] as specified in 38.211 Section 4 (mu). 0=15khZ SCS, 1=30khZ, 2=60kHz, etc
uint8_t numerology_index;
openair1/SCHED/ru_procedures.c
+10 -10
View File
@@ -61,7 +61,7 @@ void feptx0(RU_t *ru,int slot) {
unsigned int aa,slot_offset;
int slot_sizeF = (fp->ofdm_symbol_size)*
((fp->Ncp==1) ? 6 : 7);
int subframe = ru->proc.subframe_tx;
int subframe = ru->proc.tti_tx;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+slot , 1 );
@@ -172,7 +172,7 @@ void feptx_ofdm_2thread(RU_t *ru) {
LTE_DL_FRAME_PARMS *fp=ru->frame_parms;
RU_proc_t *proc = &ru->proc;
struct timespec wait;
int subframe = ru->proc.subframe_tx;
int subframe = ru->proc.tti_tx;
wait.tv_sec=0;
wait.tv_nsec=5000000L;
@@ -239,7 +239,7 @@ void feptx_ofdm(RU_t *ru) {
((fp->Ncp==1) ? 6 : 7);
int len,len2;
int16_t *txdata;
int subframe = ru->proc.subframe_tx;
int subframe = ru->proc.tti_tx;
// int CC_id = ru->proc.CC_id;
@@ -374,7 +374,7 @@ void feptx_prec(RU_t *ru) {
PHY_VARS_eNB **eNB_list = ru->eNB_list,*eNB;
LTE_DL_FRAME_PARMS *fp;
int32_t ***bw;
int subframe = ru->proc.subframe_tx;
int subframe = ru->proc.tti_tx;
if (ru->num_eNB == 1) {
eNB = eNB_list[0];
@@ -420,7 +420,7 @@ void fep0(RU_t *ru,int slot) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX+slot, 1);
remove_7_5_kHz(ru,(slot&1)+(proc->subframe_rx<<1));
remove_7_5_kHz(ru,(slot&1)+(proc->tti_rx<<1));
for (l=0; l<fp->symbols_per_tti/2; l++) {
slot_fep_ul(ru,
l,
@@ -537,7 +537,7 @@ void ru_fep_full_2thread(RU_t *ru) {
LTE_DL_FRAME_PARMS *fp=ru->frame_parms;
if ((fp->frame_type == TDD) &&
(subframe_select(fp,proc->subframe_rx) != SF_UL)) return;
(subframe_select(fp,proc->tti_rx) != SF_UL)) return;
if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX, 1 );
@@ -580,7 +580,7 @@ void ru_fep_full_2thread(RU_t *ru) {
stop_meas(&ru->ofdm_demod_wait_stats);
if(opp_enabled == 1 && ru->ofdm_demod_wakeup_stats.p_time>30*3000){
print_meas_now(&ru->ofdm_demod_wakeup_stats,"fep wakeup",stderr);
printf("delay in fep wait on codition in frame_rx: %d subframe_rx: %d \n",proc->frame_rx,proc->subframe_rx);
printf("delay in fep wait on codition in frame_rx: %d subframe_rx: %d \n",proc->frame_rx,proc->tti_rx);
}
stop_meas(&ru->ofdm_demod_stats);
@@ -596,13 +596,13 @@ void fep_full(RU_t *ru) {
LTE_DL_FRAME_PARMS *fp=ru->frame_parms;
if ((fp->frame_type == TDD) &&
(subframe_select(fp,proc->subframe_rx) != SF_UL)) return;
(subframe_select(fp,proc->tti_rx) != SF_UL)) return;
start_meas(&ru->ofdm_demod_stats);
if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX, 1 );
remove_7_5_kHz(ru,proc->subframe_rx<<1);
remove_7_5_kHz(ru,1+(proc->subframe_rx<<1));
remove_7_5_kHz(ru,proc->tti_rx<<1);
remove_7_5_kHz(ru,1+(proc->tti_rx<<1));
for (l=0; l<fp->symbols_per_tti/2; l++) {
slot_fep_ul(ru,
openair1/SCHED_NR/fapi_nr_l1.c
+12 -9
View File
@@ -55,20 +55,20 @@ void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
void handle_nfapi_nr_dci_dl_pdu(PHY_VARS_gNB *gNB,
int frame, int subframe,
int frame, int slot,
gNB_L1_rxtx_proc_t *proc,
nfapi_nr_dl_config_request_pdu_t *dl_config_pdu,
nfapi_nr_dl_config_request_pdu_t *dl_config_dlsch_pdu)
{
int idx = subframe&1;
int idx = slot&1;
NR_gNB_PDCCH *pdcch_vars = &gNB->pdcch_vars;
LOG_D(PHY,"Frame %d, Subframe %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:subframe_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,subframe, pdcch_vars->num_dci, proc->subframe_tx, idx, pdcch_vars->num_dci);
LOG_I(PHY,"Frame %d, Slot %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,slot, pdcch_vars->num_dci, proc->slot_tx, idx, pdcch_vars->num_dci);
// copy dci configuration into gNB structure
nr_fill_dci_and_dlsch(gNB,frame,subframe,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],&dl_config_pdu->dci_dl_pdu, &dl_config_dlsch_pdu->dlsch_pdu);
nr_fill_dci_and_dlsch(gNB,frame,slot,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],&dl_config_pdu->dci_dl_pdu,&dl_config_dlsch_pdu->dlsch_pdu);
LOG_D(PHY,"Frame %d, Subframe %d: DCI processing - populated pdcch_vars->dci_alloc[%d] proc:subframe_tx:%d idx:%d pdcch_vars->num_dci:%d\n",proc->frame_tx,proc->subframe_tx, pdcch_vars->num_dci, proc->subframe_tx, idx, pdcch_vars->num_dci);
LOG_I(PHY,"Frame %d, Slot %d: DCI processing - populated pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",proc->frame_tx,proc->slot_tx, pdcch_vars->num_dci, proc->slot_tx, idx, pdcch_vars->num_dci);
}
@@ -81,7 +81,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
nfapi_nr_dl_config_request_t *DL_req = Sched_INFO->DL_req;
nfapi_tx_request_t *TX_req = Sched_INFO->TX_req;
frame_t frame = Sched_INFO->frame;
sub_frame_t subframe = Sched_INFO->subframe;
sub_frame_t slot = Sched_INFO->slot;
AssertFatal(RC.gNB!=NULL,"RC.gNB is null\n");
AssertFatal(RC.gNB[Mod_id]!=NULL,"RC.gNB[%d] is null\n",Mod_id);
@@ -98,7 +98,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
int i;
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SF:%04d%d DL_req:SFN/SF:%04d%d:dl_pdu:%d tx_req:SFN/SF:%04d%d:pdus:%d \n",
frame,subframe,
frame,slot,
NFAPI_SFNSF2SFN(DL_req->sfn_sf),NFAPI_SFNSF2SF(DL_req->sfn_sf),number_dl_pdu,
NFAPI_SFNSF2SFN(TX_req->sfn_sf),NFAPI_SFNSF2SF(TX_req->sfn_sf),TX_req->tx_request_body.number_of_pdus);
@@ -107,9 +107,12 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
gNB->pdcch_vars.num_dci = 0;
gNB->pdcch_vars.num_pdsch_rnti = 0;
gNB->pdcch_vars.num_dci=0;
for (i=0;i<number_dl_pdu;i++) {
dl_config_pdu = &DL_req->dl_config_request_body.dl_config_pdu_list[i];
//LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_config_pdu->pdu_type);
LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_config_pdu->pdu_type);
printf("NFAPI: dl_pdu %d : type %d\n",i,dl_config_pdu->pdu_type);
switch (dl_config_pdu->pdu_type) {
case NFAPI_NR_DL_CONFIG_BCH_PDU_TYPE:
AssertFatal(dl_config_pdu->bch_pdu_rel15.pdu_index < TX_req->tx_request_body.number_of_pdus,
@@ -128,7 +131,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
case NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE:
dl_config_dlsch_pdu = &DL_req->dl_config_request_body.dl_config_pdu_list[++i];
handle_nfapi_nr_dci_dl_pdu(gNB,
frame, subframe,
frame, slot,
proc,
dl_config_pdu,
dl_config_dlsch_pdu);
openair1/SCHED_NR/nr_ru_procedures.c
+56 -36
View File
@@ -58,38 +58,58 @@ extern openair0_config_t openair0_cfg[MAX_CARDS];
extern int oai_exit;
void nr_feptx0(RU_t *ru,int slot) {
void nr_feptx0(RU_t *ru,int first_symbol, int num_symbols) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
unsigned int aa,slot_offset;
int slot_sizeF = fp->ofdm_symbol_size * fp->symbols_per_slot;
int subframe = ru->proc.subframe_tx;
unsigned int aa,slot_offset,slot_offsetF;
int slot = ru->proc.tti_tx;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+slot , 1 );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+(first_symbol!=0?1:0) , 1 );
slot_offset = subframe*fp->samples_per_subframe + (slot*(fp->samples_per_subframe / fp->slots_per_subframe));
slot_offset = slot*fp->samples_per_slot;
slot_offsetF = first_symbol*fp->ofdm_symbol_size;
LOG_D(PHY,"SFN/SF:RU:TX:%d/%d Generating slot %d\n",ru->proc.frame_tx, ru->proc.subframe_tx,slot);
if (first_symbol>0) slot_offset += (fp->ofdm_symbol_size*first_symbol) + (fp->nb_prefix_samples0) + (fp->nb_prefix_samples*(first_symbol-1));
LOG_D(PHY,"SFN/SF:RU:TX:%d/%d Generating slot %d (first_symbol %d num_symbols %d)\n",ru->proc.frame_tx, ru->proc.tti_tx,slot,first_symbol,num_symbols);
for (aa=0; aa<ru->nb_tx; aa++) {
if (fp->Ncp == 1) {
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot*slot_sizeF],
(int*)&ru->common.txdata[aa][slot_offset],
fp->ofdm_symbol_size,
12,
fp->nb_prefix_samples,
CYCLIC_PREFIX);
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
(int*)&ru->common.txdata[aa][slot_offset],
fp->ofdm_symbol_size,
num_symbols,
fp->nb_prefix_samples,
CYCLIC_PREFIX);
}
else {
nr_normal_prefix_mod(&ru->common.txdataF_BF[aa][slot*slot_sizeF],
(int*)&ru->common.txdata[aa][slot_offset],
fp->symbols_per_slot,
fp);
if (first_symbol==0) {
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
(int*)&ru->common.txdata[aa][slot_offset],
fp->ofdm_symbol_size,
1,
fp->nb_prefix_samples0,
CYCLIC_PREFIX);
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF+fp->ofdm_symbol_size],
(int*)&ru->common.txdata[aa][slot_offset+fp->nb_prefix_samples0+fp->ofdm_symbol_size],
fp->ofdm_symbol_size,
num_symbols-1,
fp->nb_prefix_samples,
CYCLIC_PREFIX);
}
else {
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
(int*)&ru->common.txdata[aa][slot_offset],
fp->ofdm_symbol_size,
num_symbols,
fp->nb_prefix_samples,
CYCLIC_PREFIX);
}
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+slot , 0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+(first_symbol!=0?1:0), 0);
}
void nr_feptx_ofdm_2thread(RU_t *ru) {
@@ -98,24 +118,25 @@ void nr_feptx_ofdm_2thread(RU_t *ru) {
nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
RU_proc_t *proc = &ru->proc;
struct timespec wait;
int subframe = ru->proc.subframe_tx;
int slot = ru->proc.tti_tx;
wait.tv_sec=0;
wait.tv_nsec=5000000L;
start_meas(&ru->ofdm_mod_stats);
if (nr_subframe_select(cfg,subframe) == SF_UL) return;
if (nr_slot_select(cfg,slot) == SF_UL) return;
// this copy should be done in the precoding thread (currently inactive)
for (int aa=0;aa<ru->nb_tx;aa++)
memcpy((void*)ru->common.txdataF_BF[aa],
(void*)ru->gNB_list[0]->common_vars.txdataF[aa],fp->samples_per_subframe_wCP*sizeof(int32_t));
(void*)ru->gNB_list[0]->common_vars.txdataF[aa], fp->samples_per_slot_wCP*sizeof(int32_t));
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 1 );
if (nr_subframe_select(cfg,subframe)==SF_DL) {
// If this is not an S-subframe
if (nr_slot_select(cfg,slot)==SF_DL) {
// If this is not an S-tti
if (pthread_mutex_timedlock(&proc->mutex_feptx,&wait) != 0) {
printf("[RU] ERROR pthread_mutex_lock for feptx thread (IC %d)\n", proc->instance_cnt_feptx);
exit_fun( "error locking mutex_feptx" );
@@ -141,8 +162,8 @@ void nr_feptx_ofdm_2thread(RU_t *ru) {
pthread_mutex_unlock( &proc->mutex_feptx );
}
// call first slot in this thread
nr_feptx0(ru,0);
// call first half-slot in this thread
nr_feptx0(ru,0,fp->symbols_per_slot>>1);
wait_on_busy_condition(&proc->mutex_feptx,&proc->cond_feptx,&proc->instance_cnt_feptx,"NR feptx thread");
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 0 );
@@ -163,7 +184,7 @@ static void *nr_feptx_thread(void *param) {
while (!oai_exit) {
if (wait_on_condition(&proc->mutex_feptx,&proc->cond_feptx,&proc->instance_cnt_feptx,"NR feptx thread")<0) break;
nr_feptx0(ru,1);
nr_feptx0(ru,ru->nr_frame_parms->symbols_per_slot>>1,ru->nr_frame_parms->symbols_per_slot>>1);
if (release_thread(&proc->mutex_feptx,&proc->instance_cnt_feptx,"NR feptx thread")<0) break;
if (pthread_cond_signal(&proc->cond_feptx) != 0) {
@@ -196,11 +217,11 @@ void nr_feptx_ofdm(RU_t *ru) {
NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms;
nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
unsigned int aa=0,slot=0;
unsigned int aa=0;
int slot_sizeF = (fp->ofdm_symbol_size)*
((cfg->subframe_config.dl_cyclic_prefix_type.value == 1) ? 12 : 14);
int subframe = ru->proc.subframe_tx;
int *txdata = &ru->common.txdata[aa][subframe*fp->samples_per_subframe];
int slot = ru->proc.tti_tx;
int *txdata = &ru->common.txdata[aa][slot*fp->samples_per_slot];
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 1 );
start_meas(&ru->ofdm_mod_stats);
@@ -208,22 +229,21 @@ void nr_feptx_ofdm(RU_t *ru) {
// this copy should be done in the precoding thread (currently inactive)
for (int aa=0;aa<ru->nb_tx;aa++)
memcpy((void*)ru->common.txdataF_BF[aa],
(void*)ru->gNB_list[0]->common_vars.txdataF[aa], fp->samples_per_subframe_wCP*sizeof(int32_t));
(void*)ru->gNB_list[0]->common_vars.txdataF[aa], fp->samples_per_slot_wCP*sizeof(int32_t));
if ((nr_subframe_select(cfg,subframe)==SF_DL)||
((nr_subframe_select(cfg,subframe)==SF_S))) {
if ((nr_slot_select(cfg,slot)==SF_DL)||
((nr_slot_select(cfg,slot)==SF_S))) {
// LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot);
for (slot=0; slot<fp->slots_per_subframe;slot++)
nr_feptx0(ru,slot);
nr_feptx0(ru,0,fp->symbols_per_slot);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 0 );
stop_meas(&ru->ofdm_mod_stats);
LOG_D(PHY,"feptx_ofdm (TXPATH): frame %d, subframe %d: txp (time %p) %d dB, txp (freq) %d dB\n",
ru->proc.frame_tx,subframe,txdata,dB_fixed(signal_energy((int32_t*)txdata,fp->samples_per_subframe)),
LOG_D(PHY,"feptx_ofdm (TXPATH): frame %d, slot %d: txp (time %p) %d dB, txp (freq) %d dB\n",
ru->proc.frame_tx,slot,txdata,dB_fixed(signal_energy((int32_t*)txdata,fp->samples_per_slot)),
dB_fixed(signal_energy_nodc(ru->common.txdataF_BF[aa],2*slot_sizeF)));
}
openair1/SCHED_NR/phy_procedures_nr_common.c
+1 -144
View File
@@ -32,151 +32,8 @@
#include "sched_nr.h"
/// LUT for the number of symbols in the coreset indexed by coreset index (4 MSB rmsi_pdcch_config)
uint8_t nr_coreset_nsymb_pdcch_type_0_b40Mhz[16] = {2,2,2,2,2,3,3,3,3,3,1,1,1,2,2,2}; // below 40Mhz bw
uint8_t nr_coreset_nsymb_pdcch_type_0_a40Mhz[10] = {2,2,3,3,1,1,2,2,3,3}; // above 40Mhz bw
/// LUT for the number of RBs in the coreset indexed by coreset index
uint8_t nr_coreset_rb_offset_pdcch_type_0_b40Mhz[16] = {0,1,2,3,4,0,1,2,3,4,12,14,16,12,14,16};
uint8_t nr_coreset_rb_offset_pdcch_type_0_a40Mhz[10] = {0,4,0,4,0,28,0,28,0,28};
/// LUT for monitoring occasions param O indexed by ss index (4 LSB rmsi_pdcch_config)
uint8_t nr_ss_param_O_type_0_mux1_FR1[16] = {0,0,2,2,5,5,7,7,0,5,0,0,2,2,5,5};
uint8_t nr_ss_param_O_type_0_mux1_FR2[14] = {0,0,2.5,2.5,5,5,0,2.5,5,7.5,7.5,7.5,0,5};
/// LUT for number of SS sets per slot indexed by ss index
uint8_t nr_ss_sets_per_slot_type_0_FR1[16] = {1,2,1,2,1,2,1,2,1,1,1,1,1,1,1,1};
uint8_t nr_ss_sets_per_slot_type_0_FR2[14] = {1,2,1,2,1,2,2,2,2,1,2,2,1,1};
/// LUT for monitoring occasions param M indexed by ss index
uint8_t nr_ss_param_M_type_0_mux1_FR1[16] = {1,0.5,1,0.5,1,0.5,1,0.5,2,2,1,1,1,1,1,1};
uint8_t nr_ss_param_M_type_0_mux1_FR2[14] = {1,0.5,1,0.5,1,0.5,0.5,0.5,0.5,1,0.5,0.5,2,2};
/// LUT for SS first symbol index indexed by ss index
uint8_t nr_ss_first_symb_idx_type_0_mux1_FR1[8] = {0,0,1,2,1,2,1,2};
nr_subframe_t nr_subframe_select(nfapi_nr_config_request_t *cfg,unsigned char subframe)
nr_subframe_t nr_slot_select(nfapi_nr_config_request_t *cfg,unsigned char slot)
{
if (cfg->subframe_config.duplex_mode.value == FDD)
return(SF_DL);
}
void nr_configure_css_dci_from_mib(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
nr_scs_e scs_common,
nr_scs_e pdcch_scs,
nr_frequency_range_e freq_range,
uint8_t rmsi_pdcch_config,
uint8_t ssb_idx,
uint16_t nb_slots_per_frame,
uint16_t N_RB)
{
uint8_t O, M;
uint8_t ss_idx = rmsi_pdcch_config&0xf;
uint8_t cset_idx = (rmsi_pdcch_config>>4)&0xf;
uint8_t mu;
/// Coreset params
switch(scs_common) {
case kHz15:
mu = 0;
break;
case kHz30:
mu = 1;
if (N_RB < 106) { // Minimum 40Mhz bandwidth not satisfied
switch(pdcch_scs) {
case kHz15:
break;
case kHz30:
pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
pdcch_params->n_rb = (cset_idx < 10)? 24 : 48;
pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_b40Mhz[cset_idx];
pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_b40Mhz[cset_idx];
break;
default:
AssertFatal(1==0,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
}
}
else {
AssertFatal(ss_idx<10 ,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
switch(pdcch_scs) {
case kHz15:
break;
case kHz30:
pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
pdcch_params->n_rb = (cset_idx < 4)? 24 : 48;
pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_b40Mhz[cset_idx];
pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_b40Mhz[cset_idx];
break;
default:
AssertFatal(1==0,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
}
}
case kHz60:
mu = 2;
break;
case kHz120:
mu = 3;
break;
default:
AssertFatal(1==0,"Invalid common subcarrier spacing %d\n", scs_common);
}
/// Search space params
switch(pdcch_params->mux_pattern) {
case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1:
if (freq_range == nr_FR1) {
O = nr_ss_param_O_type_0_mux1_FR1[ss_idx];
pdcch_params->nb_ss_sets_per_slot = nr_ss_sets_per_slot_type_0_FR1[ss_idx];
M = nr_ss_param_M_type_0_mux1_FR1[ss_idx];
pdcch_params->first_symbol = (ss_idx < 8)? ( (ss_idx&1)? pdcch_params->n_symb : 0 ) : nr_ss_first_symb_idx_type_0_mux1_FR1[ss_idx - 8];
}
else {
AssertFatal(ss_idx<14 ,"Invalid search space index for multiplexing type 1 and FR2 %d\n", ss_idx);
O = nr_ss_param_O_type_0_mux1_FR2[ss_idx];
pdcch_params->nb_ss_sets_per_slot = nr_ss_sets_per_slot_type_0_FR2[ss_idx];
M = nr_ss_param_M_type_0_mux1_FR2[ss_idx];
pdcch_params->first_symbol = (ss_idx < 12)? ( (ss_idx&1)? 7 : 0 ) : 0;
}
pdcch_params->nb_slots = 2;
pdcch_params->sfn_mod2 = ((uint8_t)(floor( (O*pow(2, mu) + floor(ssb_idx*M)) / nb_slots_per_frame )) & 1)? 1 : 0;
pdcch_params->first_slot = (uint8_t)(O*pow(2, mu) + floor(ssb_idx*M)) % nb_slots_per_frame;
break;
case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2:
break;
case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE3:
break;
default:
AssertFatal(1==0, "Invalid SSB and coreset multiplexing pattern %d\n", pdcch_params->mux_pattern);
}
pdcch_params->config_type = NFAPI_NR_CSET_CONFIG_MIB_SIB1;
pdcch_params->search_space_type = NFAPI_NR_SEARCH_SPACE_TYPE_COMMON;
pdcch_params->common_search_space_type = NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_0;
pdcch_params->cr_mapping_type = NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED;
pdcch_params->precoder_granularity = NFAPI_NR_CSET_SAME_AS_REG_BUNDLE;
pdcch_params->reg_bundle_size = 6;
pdcch_params->interleaver_size = 2;
}
void nr_configure_css_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
nfapi_nr_coreset_t* coreset,
nfapi_nr_search_space_t* search_space) {
}
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+31 -30
View File
@@ -112,46 +112,47 @@ int nr_get_ssb_start_symbol(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *f
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp)
{
int start_rb = cfg->sch_config.n_ssb_crb.value / (1<<cfg->subframe_config.numerology_index_mu.value);
fp->ssb_start_subcarrier = 12 * start_rb + cfg->sch_config.ssb_subcarrier_offset.value;
LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier,start_rb,cfg->sch_config.ssb_subcarrier_offset.value);
fp->ssb_start_subcarrier = (12 * cfg->sch_config.n_ssb_crb.value + cfg->sch_config.ssb_subcarrier_offset.value)/(1<<cfg->subframe_config.numerology_index_mu.value);
LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier,cfg->sch_config.n_ssb_crb.value,cfg->sch_config.ssb_subcarrier_offset.value);
}
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe) {
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
int **txdataF = gNB->common_vars.txdataF;
uint8_t *pbch_pdu=&gNB->pbch_pdu[0];
int ss_subframe = (cfg->sch_config.half_frame_index.value)? 5 : 0;
int ss_slot = (cfg->sch_config.half_frame_index.value)? 10 : 0;
uint8_t Lmax, ssb_index=0, n_hf=0;
LOG_D(PHY,"common_signal_procedures: frame %d, subframe %d\n",frame,subframe);
LOG_D(PHY,"common_signal_procedures: frame %d, slot %d\n",frame,slot);
int ssb_start_symbol = nr_get_ssb_start_symbol(cfg, fp);
nr_set_ssb_first_subcarrier(cfg, fp);
Lmax = (fp->dl_CarrierFreq < 3e9)? 4:8;
if (subframe == ss_subframe)
if (slot == ss_slot)
{
// Current implementation is based on SSB in first half frame, first candidate
LOG_D(PHY,"SS TX: frame %d, subframe %d, start_symbol %d\n",frame,subframe, ssb_start_symbol);
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(gNB->d_pss, txdataF, AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, txdataF, AMP, ssb_start_symbol, cfg, fp);
nr_generate_pss(gNB->d_pss, txdataF[0], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, txdataF[0], AMP, ssb_start_symbol, cfg, fp);
if (!(frame&7)){
LOG_D(PHY,"%d.%d : pbch_configured %d\n",frame,subframe,gNB->pbch_configured);
LOG_D(PHY,"%d.%d : pbch_configured %d\n",frame,slot,gNB->pbch_configured);
if (gNB->pbch_configured != 1)return;
gNB->pbch_configured = 0;
}
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],txdataF, AMP, ssb_start_symbol, cfg, fp);
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],txdataF[0], AMP, ssb_start_symbol, cfg, fp);
nr_generate_pbch(&gNB->pbch,
gNB->nrPolar_params,
pbch_pdu,
gNB->nr_pbch_interleaver,
txdataF,
txdataF[0],
AMP,
ssb_start_symbol,
n_hf,Lmax,ssb_index,
@@ -161,56 +162,56 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe) {
}
void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
gNB_L1_rxtx_proc_t *proc,
int do_meas)
gNB_L1_rxtx_proc_t *proc,
int do_meas)
{
int aa;
int frame=proc->frame_tx;
int subframe=proc->subframe_tx;
uint8_t num_dci=0, num_pdsch_rnti;
int slot=proc->slot_tx;
uint8_t num_dci=0,num_pdsch_rnti;
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
int offset = gNB->CC_id;
if ((cfg->subframe_config.duplex_mode.value == TDD) && (nr_subframe_select(cfg,subframe)==SF_UL)) return;
if ((cfg->subframe_config.duplex_mode.value == TDD) && (nr_slot_select(cfg,slot)==SF_UL)) return;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,1);
if (do_meas==1) start_meas(&gNB->phy_proc_tx);
// clear the transmit data array for the current subframe
for (aa=0; aa<cfg->rf_config.tx_antenna_ports.value; aa++) {
memset(gNB->common_vars.txdataF[aa],0,fp->samples_per_subframe_wCP*sizeof(int32_t));
for (aa=0; aa<1/*15*/; aa++) {
memset(gNB->common_vars.txdataF[aa],0,fp->samples_per_slot_wCP*sizeof(int32_t));
}
if (nfapi_mode == 0 || nfapi_mode == 1) {
nr_common_signal_procedures(gNB,frame, subframe);
nr_common_signal_procedures(gNB,frame, slot);
//if (frame == 9)
//write_output("txdataF.m","txdataF",gNB->common_vars.txdataF[aa],fp->samples_per_frame_wCP, 1, 1);
}
num_dci = gNB->pdcch_vars.num_dci;
num_pdsch_rnti = gNB->pdcch_vars.num_pdsch_rnti;
if (num_dci && (subframe==1)) {
LOG_I(PHY, "[gNB %d] Frame %d subframe %d \
Calling nr_generate_dci_top (number of DCI %d)\n", gNB->Mod_id, frame, subframe, num_dci);
uint8_t slot_idx = gNB->pdcch_vars.dci_alloc[0].pdcch_params.first_slot + subframe*fp->slots_per_subframe;
num_pdsch_rnti = gNB->pdcch_vars.num_pdsch_rnti;
if (num_dci) {
LOG_I(PHY, "[gNB %d] Frame %d slot %d \
Calling nr_generate_dci_top (number of DCI %d)\n", gNB->Mod_id, frame, slot, num_dci);
if (nfapi_mode == 0 || nfapi_mode == 1){
nr_generate_dci_top(gNB->pdcch_vars,
&gNB->nrPolar_params,
gNB->nr_gold_pdcch_dmrs[slot_idx],
gNB->common_vars.txdataF,
gNB->nr_gold_pdcch_dmrs[slot],
gNB->common_vars.txdataF[0],
AMP, *fp, *cfg);
if (num_pdsch_rnti) {
LOG_I(PHY, "PDSCH generation started (%d)\n", num_pdsch_rnti);
nr_generate_pdsch(*gNB->dlsch[0][0],
gNB->pdcch_vars.dci_alloc[0],
gNB->nr_gold_pdsch_dmrs[slot_idx],
gNB->nr_gold_pdsch_dmrs[slot],
gNB->common_vars.txdataF,
AMP, subframe, *fp, *cfg);
AMP, slot, *fp, *cfg);
}
}
}
openair1/SCHED_NR/sched_nr.h
+11 -11
View File
@@ -34,22 +34,22 @@
#include "PHY/NR_TRANSPORT/nr_dci.h"
lte_subframe_t nr_subframe_select (nfapi_nr_config_request_t *cfg, unsigned char subframe);
nr_slot_t nr_slot_select (nfapi_nr_config_request_t *cfg, unsigned char slot);
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp);
void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, gNB_L1_rxtx_proc_t *proc, int do_meas);
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe);
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot);
void nr_init_feptx_thread(RU_t *ru,pthread_attr_t *attr_feptx);
void nr_feptx_ofdm(RU_t *ru);
void nr_feptx_ofdm_2thread(RU_t *ru);
void nr_feptx0(RU_t *ru,int slot);
void nr_feptx0(RU_t *ru,int first_symbol, int num_symbols);
void nr_configure_css_dci_from_mib(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
nr_scs_e scs_common,
nr_scs_e pdcch_scs,
nr_frequency_range_e freq_range,
uint8_t rmsi_pdcch_config,
uint8_t ssb_idx,
uint16_t nb_slots_per_frame,
uint16_t N_RB);
void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
nr_scs_e scs_common,
nr_scs_e pdcch_scs,
nr_frequency_range_e freq_range,
uint8_t rmsi_pdcch_config,
uint8_t ssb_idx,
uint16_t nb_slots_per_frame,
uint16_t N_RB);
#endif
openair1/SCHED_NR_UE/defs.h
+2 -1
View File
@@ -123,9 +123,10 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t e
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param phy_vars_rn pointer to RN variables
*/
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t do_pdcch_flag,runmode_t mode);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
#ifdef UE_SLOT_PARALLELISATION
void *UE_thread_slot1_dl_processing(void *arg);
#endif
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+185 -181
View File
@@ -42,211 +42,215 @@ extern PHY_VARS_NR_UE ***PHY_vars_UE_g;
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
/// module id
module_id_t module_id = scheduled_response->module_id;
/// component carrier id
uint8_t cc_id = scheduled_response->CC_id;
uint32_t i;
if(scheduled_response != NULL){
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[0][0];
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[0];
NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0];
/// module id
module_id_t module_id = scheduled_response->module_id;
/// component carrier id
uint8_t cc_id = scheduled_response->CC_id;
uint32_t i;
if(scheduled_response != NULL){
// Note: we have to handle the thread IDs for this. To be revisited completely.
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[0][0];
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[0][0][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[0];
NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0];
// PUCCH_ConfigCommon_nr_t *pucch_config_common = PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0];
// PUCCH_Config_t *pucch_config_dedicated = PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0];
// PUCCH_ConfigCommon_nr_t *pucch_config_common = PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0];
// PUCCH_Config_t *pucch_config_dedicated = PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0];
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
for(i=0; i<dl_config->number_pdus; ++i){
if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){
pdcch_vars2->nb_search_space = pdcch_vars2->nb_search_space + 1;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *dci_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
for(i=0; i<dl_config->number_pdus; ++i){
if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){
pdcch_vars2->nb_search_space = pdcch_vars2->nb_search_space + 1;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *dci_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
pdcch_vars2->n_RB_BWP[i] = dci_config->N_RB_BWP;
pdcch_vars2->searchSpace[i].monitoringSymbolWithinSlot = dci_config->monitoring_symbols_within_slot;
pdcch_vars2->searchSpace[i].monitoringSymbolWithinSlot = dci_config->monitoring_symbols_within_slot;
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel1 = dci_config->number_of_candidates[0];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel2 = dci_config->number_of_candidates[1];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel4 = dci_config->number_of_candidates[2];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel8 = dci_config->number_of_candidates[3];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel16 = dci_config->number_of_candidates[4];
pdcch_vars2->coreset[i].duration = dci_config->coreset.duration;
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel1 = dci_config->number_of_candidates[0];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel2 = dci_config->number_of_candidates[1];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel4 = dci_config->number_of_candidates[2];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel8 = dci_config->number_of_candidates[3];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel16 = dci_config->number_of_candidates[4];
pdcch_vars2->coreset[i].frequencyDomainResources = dci_config->coreset.frequency_domain_resource;
pdcch_vars2->coreset[i].rb_offset = dci_config->coreset.rb_offset;
pdcch_vars2->coreset[i].duration = dci_config->coreset.duration;
if(dci_config->coreset.cce_reg_mapping_type == CCE_REG_MAPPING_TYPE_INTERLEAVED){
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = dci_config->coreset.cce_reg_interleaved_shift_index;
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = dci_config->coreset.cce_reg_interleaved_reg_bundle_size;
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = dci_config->coreset.cce_reg_interleaved_interleaver_size;
}else{ //CCE_REG_MAPPING_TYPE_NON_INTERLEAVED
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = 0;
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = 0;
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = 0;
}
pdcch_vars2->coreset[i].frequencyDomainResources = dci_config->coreset.frequency_domain_resource;
pdcch_vars2->coreset[i].rb_offset = dci_config->coreset.rb_offset;
pdcch_vars2->coreset[i].precoderGranularity = dci_config->coreset.precoder_granularity;
//pdcch_vars2->coreset[i].tciStatesPDCCH;
//pdcch_vars2->coreset[i].tciPresentInDCI;
pdcch_vars2->coreset[i].pdcchDMRSScramblingID = dci_config->coreset.pdcch_dmrs_scrambling_id;
if(dci_config->coreset.cce_reg_mapping_type == CCE_REG_MAPPING_TYPE_INTERLEAVED){
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = dci_config->coreset.cce_reg_interleaved_shift_index;
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = dci_config->coreset.cce_reg_interleaved_reg_bundle_size;
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = dci_config->coreset.cce_reg_interleaved_interleaver_size;
}else{ //CCE_REG_MAPPING_TYPE_NON_INTERLEAVED
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = 0;
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = 0;
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = 0;
}
}else{ //FAPI_NR_DL_CONFIG_TYPE_DLSCH
// dlsch config pdu
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr;
dlsch0->current_harq_pid = current_harq_pid;
dlsch0->active = 1;
pdcch_vars2->coreset[i].precoderGranularity = dci_config->coreset.precoder_granularity;
//pdcch_vars2->coreset[i].tciStatesPDCCH;
//pdcch_vars2->coreset[i].tciPresentInDCI;
pdcch_vars2->coreset[i].pdcchDMRSScramblingID = dci_config->coreset.pdcch_dmrs_scrambling_id;
}else{ //FAPI_NR_DL_CONFIG_TYPE_DLSCH
// dlsch config pdu
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr;
dlsch0->current_harq_pid = current_harq_pid;
dlsch0->active = 1;
//dlsch0->harq_processes[0]->mcs = &dlsch_config_pdu->mcs;
//dlsch0->harq_processes[0]->mcs = &dlsch_config_pdu->mcs;
NR_DL_UE_HARQ_t dlsch0_harq = *(dlsch0->harq_processes[current_harq_pid]);
NR_DL_UE_HARQ_t dlsch0_harq = *(dlsch0->harq_processes[current_harq_pid]);
//dlsch0->harq_processes[current_harq_pid]->nb_rb = dlsch_config_pdu->number_rbs;
//dlsch0->harq_processes[current_harq_pid]->nb_rb = dlsch_config_pdu->number_rbs;
dlsch0_harq.nb_rb = dlsch_config_pdu->number_rbs;
dlsch0_harq.start_rb = dlsch_config_pdu->start_rb;
dlsch0_harq.nb_symbols = dlsch_config_pdu->number_symbols;
dlsch0_harq.start_symbol = dlsch_config_pdu->start_symbol;
dlsch0_harq.mcs = dlsch_config_pdu->mcs;
dlsch0_harq.DCINdi = dlsch_config_pdu->ndi;
dlsch0_harq.rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
dlsch0_harq.harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id;
dlsch0_harq.harq_ack.slot_for_feedback_ack = dlsch_config_pdu->pdsch_to_harq_feedback_time_ind;
printf(">>>> \tdlsch0->g_pucch=%d\tdlsch0_harq.mcs=%d\n",dlsch0->g_pucch,dlsch0_harq.mcs);
//for (int j = 0 ; j<1000; j++) printf("\nk = %d",j);
dlsch0_harq.nb_rb = dlsch_config_pdu->number_rbs;
dlsch0_harq.start_rb = dlsch_config_pdu->start_rb;
dlsch0_harq.nb_symbols = dlsch_config_pdu->number_symbols;
dlsch0_harq.start_symbol = dlsch_config_pdu->start_symbol;
dlsch0_harq.mcs = dlsch_config_pdu->mcs;
dlsch0_harq.DCINdi = dlsch_config_pdu->ndi;
dlsch0_harq.rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
dlsch0_harq.harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id;
dlsch0_harq.harq_ack.slot_for_feedback_ack = dlsch_config_pdu->pdsch_to_harq_feedback_time_ind;
printf(">>>> \tdlsch0->g_pucch=%d\tdlsch0_harq.mcs=%d\n",dlsch0->g_pucch,dlsch0_harq.mcs);
//for (int j = 0 ; j<1000; j++) printf("\nk = %d",j);
#if 0
dlsch0->harq_processes[current_harq_pid]->mcs = dlsch_config_pdu->mcs;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
//pdlsch0->rnti = rnti;
#endif
}
}
}else{
pdcch_vars2->nb_search_space = 0;
}
if(scheduled_response->ul_config != NULL){
fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config;
for(i=0; i<ul_config->number_pdus; ++i){
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH){
// pusch config pdu
fapi_nr_ul_config_pusch_pdu_rel15_t *pusch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15;
uint8_t current_harq_pid = pusch_config_pdu->harq_process_nbr;
ulsch0->harq_processes[current_harq_pid]->nb_rb = pusch_config_pdu->number_rbs;
ulsch0->harq_processes[current_harq_pid]->first_rb = pusch_config_pdu->start_rb;
ulsch0->harq_processes[current_harq_pid]->nb_symbols = pusch_config_pdu->number_symbols;
ulsch0->harq_processes[current_harq_pid]->start_symbol = pusch_config_pdu->start_symbol;
ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs;
ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi;
ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv;
ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
}
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){
// pucch config pdu
fapi_nr_ul_config_pucch_pdu *pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu;
uint8_t pucch_resource_id = 0; //FIXME!!!
uint8_t format = 1; // FIXME!!!
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = pucch_config_pdu->hoppingId;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = pucch_config_pdu->p0_nominal;
/* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
pucch_config_common->hoppingId = pucch_config_pdu->hoppingId;
pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/
}
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PRACH){
// prach config pdu
fapi_nr_ul_config_prach_pdu *prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu;
frame_parms.prach_config_common.rootSequenceIndex = prach_config_pdu->root_sequence_index;
frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex = prach_config_pdu->prach_configuration_index;
frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = prach_config_pdu->zero_correlation_zone_config;
frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag = prach_config_pdu->restrictedset_config;
frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset = prach_config_pdu->prach_freq_offset;
prach_resources->ra_PreambleIndex = prach_config_pdu->preamble_index;
}
}
}else{
}
if(scheduled_response->tx_request != NULL){
}else{
}
#if 0
dlsch0->harq_processes[current_harq_pid]->mcs = dlsch_config_pdu->mcs;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
//pdlsch0->rnti = rnti;
#endif
}
}
}else{
pdcch_vars2->nb_search_space = 0;
}
return 0;
if(scheduled_response->ul_config != NULL){
fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config;
for(i=0; i<ul_config->number_pdus; ++i){
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH){
// pusch config pdu
fapi_nr_ul_config_pusch_pdu_rel15_t *pusch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15;
uint8_t current_harq_pid = pusch_config_pdu->harq_process_nbr;
ulsch0->harq_processes[current_harq_pid]->nb_rb = pusch_config_pdu->number_rbs;
ulsch0->harq_processes[current_harq_pid]->first_rb = pusch_config_pdu->start_rb;
ulsch0->harq_processes[current_harq_pid]->nb_symbols = pusch_config_pdu->number_symbols;
ulsch0->harq_processes[current_harq_pid]->start_symbol = pusch_config_pdu->start_symbol;
ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs;
ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi;
ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv;
ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
}
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){
// pucch config pdu
fapi_nr_ul_config_pucch_pdu *pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu;
uint8_t pucch_resource_id = 0; //FIXME!!!
uint8_t format = 1; // FIXME!!!
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = pucch_config_pdu->hoppingId;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = pucch_config_pdu->p0_nominal;
/* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
pucch_config_common->hoppingId = pucch_config_pdu->hoppingId;
pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/
}
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PRACH){
// prach config pdu
fapi_nr_ul_config_prach_pdu *prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu;
frame_parms.prach_config_common.rootSequenceIndex = prach_config_pdu->root_sequence_index;
frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex = prach_config_pdu->prach_configuration_index;
frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = prach_config_pdu->zero_correlation_zone_config;
frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag = prach_config_pdu->restrictedset_config;
frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset = prach_config_pdu->prach_freq_offset;
prach_resources->ra_PreambleIndex = prach_config_pdu->preamble_index;
}
}
}else{
}
if(scheduled_response->tx_request != NULL){
}else{
}
}
return 0;
}
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
if(phy_config != NULL){
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
printf("[L1][IF module][PHY CONFIG]\n");
printf("subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common);
printf("ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset);
printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position);
printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1);
printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred);
printf("intra frequency reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number);
printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index);
printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
printf("-------------------------------\n");
if(phy_config != NULL){
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
printf("[L1][IF module][PHY CONFIG]\n");
printf("subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common);
printf("ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset);
printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position);
printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1);
printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred);
printf("intra frequency reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number);
printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index);
printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
printf("-------------------------------\n");
PHY_vars_UE_g[0][0]->proc.proc_rxtx[0].frame_rx = phy_config->config_req.pbch_config.system_frame_number;
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){
}
PHY_vars_UE_g[0][0]->proc.proc_rxtx[0].frame_rx = phy_config->config_req.pbch_config.system_frame_number;
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){
}
}
return 0;
return 0;
}
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+2272 -2269
View File
File diff suppressed because it is too large Load Diff
openair1/SIMULATION/LTE_PHY/dlsim.c
+2 -2
View File
@@ -1650,7 +1650,7 @@ int main(int argc, char **argv)
start_meas(&eNB->ofdm_mod_stats);
ru->proc.subframe_tx=subframe;
ru->proc.tti_tx=subframe;
memcpy((void*)ru->frame_parms,(void*)&eNB->frame_parms,sizeof(LTE_DL_FRAME_PARMS));
feptx_prec(ru);
feptx_ofdm(ru);
@@ -1670,7 +1670,7 @@ int main(int argc, char **argv)
phy_procedures_eNB_TX(eNB,proc_eNB,0);
ru->proc.subframe_tx=(subframe+1)%10;
ru->proc.tti_tx=(subframe+1)%10;
feptx_prec(ru);
feptx_ofdm(ru);
openair1/SIMULATION/LTE_PHY/ulsim.c
+1 -1
View File
@@ -1158,7 +1158,7 @@ int main(int argc, char **argv) {
eNB->proc.frame_rx = 1;
eNB->proc.subframe_rx = subframe;
ru->proc.frame_rx = 1;
ru->proc.subframe_rx = subframe;
ru->proc.tti_rx = subframe;
proc_rxtx_ue->frame_tx = proc_rxtx->frame_rx;
proc_rxtx_ue->frame_rx = proc_rxtx->frame_tx;
proc_rxtx_ue->subframe_tx = proc_rxtx->subframe_rx;
openair1/SIMULATION/NR_PHY/dlschsim.c
+492 -501
View File
File diff suppressed because it is too large Load Diff
openair1/SIMULATION/NR_PHY/dlsim.c
+48 -16
View File
@@ -54,6 +54,7 @@
#include "NR_PHY_INTERFACE/NR_IF_Module.h"
#include "NR_UE_PHY_INTERFACE/NR_IF_Module.h"
PHY_VARS_gNB *gNB;
PHY_VARS_NR_UE *UE;
RAN_CONTEXT_t RC;
@@ -72,14 +73,15 @@ int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) { return(0
int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req) {return(0);}
uint32_t from_earfcn(int eutra_bandP,uint32_t dl_earfcn) {return(0);}
int32_t get_uldl_offset(int eutra_bandP) {return(0);}
int32_t get_uldl_offset(int nr_bandP) {return(0);}
NR_IF_Module_t *NR_IF_Module_init(int Mod_id){return(NULL);}
int8_t dummy_nr_ue_dl_indication(nr_downlink_indication_t *dl_info){return(0);}
int8_t dummy_nr_ue_ul_indication(nr_uplink_indication_t *ul_info){return(0);}
lte_subframe_t subframe_select(LTE_DL_FRAME_PARMS *frame_parms,unsigned char subframe) { return(SF_DL);}
void exit_function(const char* file, const char* function, const int line,const char *s) {
const char * msg= s==NULL ? "no comment": s;
printf("Exiting at: %s:%d %s(), %s\n", file, line, function, msg);
@@ -97,6 +99,12 @@ int rlc_module_init (void) {return(0);}
void pdcp_layer_init(void) {}
int rrc_init_nr_global_param(void){return(0);}
void config_common(int Mod_idP,
int CC_idP,
int nr_bandP,
uint64_t dl_CarrierFreqP,
uint32_t dl_BandwidthP
);
// needed for some functions
@@ -146,7 +154,7 @@ int main(int argc, char **argv)
unsigned char frame_type = 0;
unsigned char pbch_phase = 0;
int frame=0,subframe=1;
int frame=0,slot=1;
int frame_length_complex_samples;
int frame_length_complex_samples_no_prefix;
NR_DL_FRAME_PARMS *frame_parms;
@@ -376,6 +384,8 @@ int main(int argc, char **argv)
RC.gNB = (PHY_VARS_gNB***) malloc(sizeof(PHY_VARS_gNB **));
RC.gNB[0] = (PHY_VARS_gNB**) malloc(sizeof(PHY_VARS_gNB *));
RC.gNB[0][0] = malloc(sizeof(PHY_VARS_gNB));
memset(RC.gNB[0][0],0,sizeof(PHY_VARS_gNB));
gNB = RC.gNB[0][0];
gNB_config = &gNB->gNB_config;
frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
@@ -384,9 +394,14 @@ int main(int argc, char **argv)
frame_parms->N_RB_DL = N_RB_DL;
frame_parms->N_RB_UL = N_RB_DL;
// stub to configure frame_parms
nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu);
// call MAC to configure common parameters
phy_init_nr_gNB(gNB,0,0);
double fs,bw;
if (mu == 1 && N_RB_DL == 217) {
@@ -455,13 +470,14 @@ int main(int argc, char **argv)
//configure UE
UE = malloc(sizeof(PHY_VARS_NR_UE));
memset((void*)UE,0,sizeof(PHY_VARS_NR_UE));
PHY_vars_UE_g = malloc(sizeof(PHY_VARS_NR_UE**));
PHY_vars_UE_g[0] = malloc(sizeof(PHY_VARS_NR_UE*));
PHY_vars_UE_g[0][0] = UE;
memcpy(&UE->frame_parms,frame_parms,sizeof(NR_DL_FRAME_PARMS));
phy_init_nr_top(UE);
if (run_initial_sync==1) UE->is_synchronized = 0;
else UE->is_synchronized = 1;
else {UE->is_synchronized = 1; UE->UE_mode[0]=PUSCH;}
UE->perfect_ce = 0;
@@ -471,19 +487,25 @@ int main(int argc, char **argv)
exit(-1);
}
init_nr_ue_transport(UE,0);
nr_gold_pbch(UE);
nr_gold_pdcch(UE,0,2);
RC.nb_nr_macrlc_inst = 1;
mac_top_init_gNB();
gNB_mac = RC.nrmac[0];
config_common(0,0,78,(uint64_t)3640000000L,N_RB_DL);
config_nr_mib(0,0,1,kHz30,0,0,0,0);
nr_l2_init_ue();
UE_mac = get_mac_inst(0);
UE->if_inst = nr_ue_if_module_init(0);
UE->if_inst->scheduled_response = nr_ue_scheduled_response;
UE->if_inst->phy_config_request = nr_ue_phy_config_request;
UE->if_inst->dl_indication = dummy_nr_ue_dl_indication;
UE->if_inst->dl_indication = nr_ue_dl_indication;
UE->if_inst->ul_indication = dummy_nr_ue_ul_indication;
@@ -495,11 +517,11 @@ int main(int argc, char **argv)
gNB->pbch_configured = 1;
for (int i=0;i<4;i++) gNB->pbch_pdu[i]=i+1;
nr_schedule_css_dlsch_phytest(0,frame,subframe);
nr_schedule_css_dlsch_phytest(0,frame,slot);
Sched_INFO.module_id = 0;
Sched_INFO.CC_id = 0;
Sched_INFO.frame = frame;
Sched_INFO.subframe = subframe;
Sched_INFO.slot = slot;
Sched_INFO.DL_req = &gNB_mac->DL_req[0];
Sched_INFO.UL_req = NULL;
Sched_INFO.HI_DCI0_req = NULL;
@@ -507,7 +529,7 @@ int main(int argc, char **argv)
nr_schedule_response(&Sched_INFO);
gNB_proc.frame_tx = frame;
gNB_proc.subframe_tx = subframe;
gNB_proc.slot_tx = slot;
phy_procedures_gNB_TX(gNB,&gNB_proc,0);
//nr_common_signal_procedures (gNB,frame,subframe);
@@ -563,7 +585,15 @@ int main(int argc, char **argv)
}
}
//Configure UE
rrc_gNB_carrier_data_t carrier;
uint32_t pdcch_ConfigSIB1 = 0;
uint32_t ssb_SubcarrierOffset = 0;
carrier.MIB = (uint8_t*) malloc(4);
carrier.sizeof_MIB = do_MIB_NR(&carrier,0,ssb_SubcarrierOffset,pdcch_ConfigSIB1,30,2);
nr_rrc_mac_config_req_ue(0,0,0,carrier.mib.message.choice.mib,NULL,NULL,NULL);
fapi_nr_dl_config_request_t dl_config;
// Type0 PDCCH search space
dl_config.number_pdus = 1;
@@ -604,8 +634,9 @@ int main(int argc, char **argv)
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[4] = table_38213_10_1_1_c2[4]; // CCE aggregation level = 16
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.duration = search_space_duration;
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.N_RB_BWP = N_RB_DL;
for (SNR=snr0; SNR<snr1; SNR+=.2) {
n_errors = 0;
@@ -644,19 +675,20 @@ int main(int argc, char **argv)
UE->rx_offset=0;
UE_proc.frame_rx = frame;
UE_proc.nr_tti_rx= subframe;
UE_proc.subframe_rx = subframe;
UE_proc.nr_tti_rx= slot;
UE_proc.subframe_rx = slot;
UE_mac->scheduled_response.dl_config = &dl_config;
nr_ue_scheduled_response(&UE_mac->scheduled_response);
printf("Running phy procedures UE RX %d.%d\n",frame,slot);
phy_procedures_nrUE_RX(UE,
&UE_proc,
0,
0,
do_pdcch_flag,
normal_txrx,
no_relay);
normal_txrx);
if (UE->dci_ind.number_of_dcis==0) n_errors++;
}
openair1/SIMULATION/NR_PHY/pbchsim.c
+19 -16
View File
@@ -66,8 +66,8 @@ int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) { return(0
int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req) {return(0);}
uint32_t from_earfcn(int eutra_bandP,uint32_t dl_earfcn) {return(0);}
int32_t get_uldl_offset(int eutra_bandP) {return(0);}
uint32_t from_nrarfcn(int nr_bandP,uint32_t dl_nrarfcn) {return(0);}
int32_t get_uldl_offset(int nr_bandP) {return(0);}
NR_IF_Module_t *NR_IF_Module_init(int Mod_id){return(NULL);}
@@ -85,7 +85,7 @@ int main(int argc, char **argv)
char c;
int i,l,aa;
int i,aa;//,l;
double sigma2, sigma2_dB=10,SNR,snr0=-2.0,snr1=2.0;
double cfo=0;
uint8_t snr1set=0;
@@ -99,27 +99,29 @@ int main(int argc, char **argv)
FILE *output_fd = NULL;
uint8_t write_output_file=0;
//int result;
int freq_offset;
//int freq_offset;
// int subframe_offset;
// char fname[40], vname[40];
int trial,n_trials=1,n_errors,n_errors_payload;
int trial,n_trials=1,n_errors=0,n_errors_payload=0;
uint8_t transmission_mode = 1,n_tx=1,n_rx=1;
uint16_t Nid_cell=0;
channel_desc_t *gNB2UE;
uint32_t nsymb,tx_lev,tx_lev1 = 0,tx_lev2 = 0;
uint8_t extended_prefix_flag=0;
int8_t interf1=-21,interf2=-21;
FILE *input_fd=NULL,*pbch_file_fd=NULL;
char input_val_str[50],input_val_str2[50];
uint8_t frame_mod4,num_pdcch_symbols = 0;
//uint32_t nsymb,tx_lev,tx_lev1 = 0,tx_lev2 = 0;
//char input_val_str[50],input_val_str2[50];
//uint8_t frame_mod4,num_pdcch_symbols = 0;
//double pbch_sinr;
//int pbch_tx_ant;
SCM_t channel_model=AWGN;//Rayleigh1_anticorr;
double pbch_sinr;
int pbch_tx_ant;
int N_RB_DL=273,mu=1;
unsigned char frame_type = 0;
@@ -363,7 +365,7 @@ int main(int argc, char **argv)
frame_parms->N_RB_DL = N_RB_DL;
frame_parms->N_RB_UL = N_RB_DL;
nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu);
nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell);
phy_init_nr_gNB(gNB,0,0);
double fs,bw,scs,eps;
@@ -500,7 +502,7 @@ int main(int argc, char **argv)
frame_length_complex_samples,
input_fd) != frame_length_complex_samples) {
printf("error reading from file\n");
exit(-1);
//exit(-1);
}
}
@@ -538,6 +540,7 @@ int main(int argc, char **argv)
sigma2_dB = 10*log10((double)txlev)-SNR;
sigma2 = pow(10,sigma2_dB/10);
// printf("sigma2 %f (%f dB)\n",sigma2,sigma2_dB);
if(eps!=0.0)
rf_rx(r_re, // real part of txdata
r_im, // imag part of txdata
@@ -568,9 +571,9 @@ int main(int argc, char **argv)
}
if (n_trials==1) {
LOG_M("rxsig0.m","rxs0", UE->common_vars.rxdata[0],frame_length_complex_samples,1,1);
LOG_M("rxsig0.m","rxs0", UE->common_vars.rxdata[0],frame_parms->samples_per_subframe,1,1);
if (gNB->frame_parms.nb_antennas_tx>1)
LOG_M("rxsig1.m","rxs1", UE->common_vars.rxdata[1],frame_length_complex_samples,1,1);
LOG_M("rxsig1.m","rxs1", UE->common_vars.rxdata[1],frame_parms->samples_per_subframe,1,1);
}
if (UE->is_synchronized == 0) {
@@ -606,7 +609,7 @@ int main(int argc, char **argv)
0,
1,
NR_PBCH_EST);
ret = nr_rx_pbch(UE,
&UE->proc.proc_rxtx[0],
UE->pbch_vars[0],
@@ -633,7 +636,7 @@ int main(int argc, char **argv)
n_errors_payload++;
}
if (ret<0) n_errors++;
if (ret!=0) n_errors++;
}
} //noise trials
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/dummy_functions.c
+2 -2
View File
@@ -119,9 +119,9 @@ void dl_phy_sync_success(module_id_t module_idP,
frame_t frameP,
unsigned char eNB_index, uint8_t first_sync){}
uint32_t from_earfcn(int eutra_bandP, uint32_t dl_earfcn) { return(0);}
uint32_t from_nrarfcn(int nr_bandP, uint32_t dl_nrarfcn) { return(0);}
int32_t get_uldl_offset(int eutra_bandP) { return(0);}
int32_t get_uldl_offset(int nr_bandP) { return(0);}
IF_Module_t *IF_Module_init(int Mod_id) { return(NULL);}
openair2/COMMON/rrc_messages_types.h
+2 -2
View File
@@ -310,8 +310,8 @@ typedef struct NRRrcConfigurationReq_s {
uint8_t tdd_config_s[MAX_NUM_CCs];
lte_prefix_type_t DL_prefix_type[MAX_NUM_CCs];
lte_prefix_type_t UL_prefix_type[MAX_NUM_CCs];
int16_t eutra_band[MAX_NUM_CCs];
uint32_t downlink_frequency[MAX_NUM_CCs];
int16_t nr_band[MAX_NUM_CCs];
uint64_t downlink_frequency[MAX_NUM_CCs];
int32_t uplink_frequency_offset[MAX_NUM_CCs];
int16_t Nid_cell[MAX_NUM_CCs];// for testing, change later
int16_t N_RB_DL[MAX_NUM_CCs];// for testing, change later
openair2/GNB_APP/RRC_nr_paramsvalues.h
+1 -1
View File
@@ -39,7 +39,7 @@
#define GNB_CONFIG_STRING_FRAME_TYPE "frame_type"
#define GNB_CONFIG_STRING_DL_PREFIX_TYPE "DL_prefix_type"
#define GNB_CONFIG_STRING_UL_PREFIX_TYPE "UL_prefix_type"
#define GNB_CONFIG_STRING_EUTRA_BAND "eutra_band"
#define GNB_CONFIG_STRING_NR_BAND "nr_band"
#define GNB_CONFIG_STRING_DOWNLINK_FREQUENCY "downlink_frequency"
#define GNB_CONFIG_STRING_UPLINK_FREQUENCY_OFFSET "uplink_frequency_offset"
#define GNB_CONFIG_STRING_NID_CELL "Nid_cell"
openair2/GNB_APP/gnb_config.c
+9 -9
View File
@@ -118,9 +118,9 @@ void RCconfig_nr_flexran()
*SearchSpace_searchSpaceType, *ue_Specific__dci_Formats,
*RateMatchPatternLTE_CRS_subframeAllocation_choice;
long long int downlink_frequency;
uint64_t downlink_frequency;
int32_t eutra_band, uplink_frequency_offset, N_RB_DL, nb_antenna_ports,
int32_t nr_band, uplink_frequency_offset, N_RB_DL, nb_antenna_ports,
MIB_subCarrierSpacingCommon, MIB_ssb_SubcarrierOffset, MIB_dmrs_TypeA_Position,
pdcch_ConfigSIB1, SIB1_ssb_PeriodicityServingCell, SIB1_ss_PBCH_BlockPower,
absoluteFrequencySSB, DL_FreqBandIndicatorNR,
@@ -431,8 +431,8 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
char* DL_prefix_type = NULL;
char* UL_prefix_type = NULL;
int32_t eutra_band = 0;
long long int downlink_frequency = 0;
int32_t nr_band = 0;
uint64_t downlink_frequency = 0;
int32_t uplink_frequency_offset = 0;
int32_t Nid_cell = 0;
int32_t N_RB_DL = 0;
@@ -788,8 +788,8 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
RC.config_file_name, i, UL_prefix_type);
}
NRRRC_CONFIGURATION_REQ (msg_p).eutra_band[j] = eutra_band;
NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j] = (uint32_t) downlink_frequency;
NRRRC_CONFIGURATION_REQ (msg_p).nr_band[j] = nr_band;
NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j] = (uint64_t) downlink_frequency;
NRRRC_CONFIGURATION_REQ (msg_p).uplink_frequency_offset[j] = (unsigned int) uplink_frequency_offset;
NRRRC_CONFIGURATION_REQ (msg_p).Nid_cell[j]= Nid_cell;
@@ -844,12 +844,12 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
RC.config_file_name, i, UL_prefix_type);
}
NRRRC_CONFIGURATION_REQ (msg_p).eutra_band[j] = eutra_band;
NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j] = (uint32_t) downlink_frequency;
NRRRC_CONFIGURATION_REQ (msg_p).nr_band[j] = nr_band;
NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j] = (uint64_t) downlink_frequency;
NRRRC_CONFIGURATION_REQ (msg_p).uplink_frequency_offset[j] = (unsigned int) uplink_frequency_offset;
if (config_check_band_frequencies(j,
NRRRC_CONFIGURATION_REQ (msg_p).eutra_band[j],
NRRRC_CONFIGURATION_REQ (msg_p).nr_band[j],
NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j],
NRRRC_CONFIGURATION_REQ (msg_p).uplink_frequency_offset[j],
NRRRC_CONFIGURATION_REQ (msg_p).frame_type[j])) {
openair2/GNB_APP/gnb_paramdef.h
+5 -5
View File
@@ -602,12 +602,12 @@ typedef enum {
/* optname helpstr paramflags XXXptr defXXXval type numelt checked_param */
/*---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
#define NRCCPARAMS_DESC { \
{GNB_CONFIG_STRING_FRAME_TYPE, NULL, 0, strptr:&frame_type, defstrval:"FDD", TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_FRAME_TYPE, NULL, 0, strptr:&frame_type, defstrval:"TDD", TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_DL_PREFIX_TYPE, NULL, 0, strptr:&DL_prefix_type, defstrval:"NORMAL", TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_UL_PREFIX_TYPE, NULL, 0, strptr:&UL_prefix_type, defstrval:"NORMAL", TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_EUTRA_BAND, NULL, 0, iptr:&eutra_band, defintval:7, TYPE_UINT, 0}, \
{GNB_CONFIG_STRING_DOWNLINK_FREQUENCY, NULL, 0, i64ptr:(int64_t *)&downlink_frequency, defint64val:2680000000, TYPE_UINT64, 0}, \
{GNB_CONFIG_STRING_UPLINK_FREQUENCY_OFFSET, NULL, 0, iptr:&uplink_frequency_offset, defintval:-120000000, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_NR_BAND, NULL, 0, iptr:&nr_band, defintval:78, TYPE_UINT, 0}, \
{GNB_CONFIG_STRING_DOWNLINK_FREQUENCY, NULL, 0, i64ptr:(int64_t *)&downlink_frequency, defint64val:3600000000, TYPE_UINT64, 0}, \
{GNB_CONFIG_STRING_UPLINK_FREQUENCY_OFFSET, NULL, 0, iptr:&uplink_frequency_offset, defintval:0, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_NID_CELL, NULL, 0, iptr:&Nid_cell, defintval:0, TYPE_UINT, 0}, \
{GNB_CONFIG_STRING_N_RB_DL, NULL, 0, iptr:&N_RB_DL, defintval:25, TYPE_UINT, 0}, \
{GNB_CONFIG_STRING_NB_ANT_PORTS, NULL, 0, iptr:&nb_antenna_ports, defintval:15, TYPE_UINT, 0}, \
@@ -751,7 +751,7 @@ typedef enum {
#define GNB_CONFIG_FRAME_TYPE_IDX 0
#define GNB_CONFIG_DL_PREFIX_TYPE_IDX 1
#define GNB_CONFIG_UL_PREFIX_TYPE_IDX 2
#define GNB_CONFIG_EUTRA_BAND_IDX 3
#define GNB_CONFIG_NR_BAND_IDX 3
#define GNB_CONFIG_DOWNLINK_FREQUENCY_IDX 4
#define GNB_CONFIG_UPLINK_FREQUENCY_OFFSET_IDX 5
#define GNB_CONFIG_NID_CELL_IDX 6
openair2/LAYER2/NR_MAC_UE/mac_proto.h
+4 -1
View File
@@ -127,5 +127,8 @@ void nr_ue_process_mac_pdu(
uint8_t *pduP,
uint16_t mac_pdu_len,
uint8_t eNB_index);
int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, void *pduP, uint32_t pdu_len);
#endif
/** @}*/
/** @}*/
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+16 -11
View File
@@ -95,7 +95,7 @@ int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index,
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.tpmi = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_dmrs_cdm_groups = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.dmrs_ports[4] = 0;
for (int i=0;i<4;i++) ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.dmrs_ports[i]=0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_front_load_symb = 0;
//ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.srs_config = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.csi_reportTriggerSize = 0;
@@ -125,7 +125,7 @@ int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index,
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping = phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_group_hopping;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId = phy_config->config_req.ul_bwp_common.pucch_config_common.hopping_id;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal = phy_config->config_req.ul_bwp_common.pucch_config_common.p0_nominal;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[NUMBER_PUCCH_FORMAT_NR] = 0;
for (int i=0;i<NUMBER_PUCCH_FORMAT_NR;i++) ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[i] = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0; /* INTEGER (1..8) */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Value = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.twoPUCCH_PC_AdjustmentStates = 0;
@@ -180,14 +180,14 @@ int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index,
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping = phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_group_hopping;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId = phy_config->config_req.ul_bwp_common.pucch_config_common.hopping_id;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal = phy_config->config_req.ul_bwp_common.pucch_config_common.p0_nominal;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[NUMBER_PUCCH_FORMAT_NR] = 0;
for (int i=0;i<NUMBER_PUCCH_FORMAT_NR; i++) ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[i] = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0; /* INTEGER (1..8) */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Value = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.twoPUCCH_PC_AdjustmentStates = 0;
}
if(mac->if_module != NULL && mac->if_module->ul_indication != NULL){
mac->if_module->ul_indication(&mac->scheduled_response);
mac->if_module->dl_indication(&mac->scheduled_response);
}
return 0;
}
@@ -659,9 +659,15 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config;
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
dl_config->number_pdus = dl_config->number_pdus + 1;
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106; // to be set
/*
printf("nr_ue_scheduler Type0 PDCCH with rnti %x, BWP %d\n",
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti,
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP);
*/
dl_config->number_pdus = dl_config->number_pdus + 1;
}
if(search_space_mask & type0a_pdcch){
@@ -1301,9 +1307,9 @@ printf("\n>>> nr_ue_process_dci at MAC layer with dci_format=%d\n",dci_format);
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu_0_0 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15;
/* IDENTIFIER_DCI_FORMATS */
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
nr_ue_process_dci_freq_dom_resource_assignment(&ulsch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
nr_ue_process_dci_freq_dom_resource_assignment(ulsch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
/* TIME_DOM_RESOURCE_ASSIGNMENT */
nr_ue_process_dci_time_dom_resource_assignment(&ulsch_config_pdu_0_0,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
nr_ue_process_dci_time_dom_resource_assignment(ulsch_config_pdu_0_0,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
/* FREQ_HOPPING_FLAG */
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) &&
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0))
@@ -1377,9 +1383,9 @@ printf("\n>>> nr_ue_process_dci at MAC layer with dci_format=%d\n",dci_format);
/* BANDWIDTH_PART_IND */
ulsch_config_pdu_0_1->bandwidth_part_ind = dci->bandwidth_part_ind;
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
nr_ue_process_dci_freq_dom_resource_assignment(&ulsch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
nr_ue_process_dci_freq_dom_resource_assignment(ulsch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
/* TIME_DOM_RESOURCE_ASSIGNMENT */
nr_ue_process_dci_time_dom_resource_assignment(&ulsch_config_pdu_0_1,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
nr_ue_process_dci_time_dom_resource_assignment(ulsch_config_pdu_0_1,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
/* FREQ_HOPPING_FLAG */
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) &&
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0))
@@ -1769,8 +1775,7 @@ printf("\n>>> nr_ue_process_dci at MAC layer with dci_format=%d\n",dci_format);
//for (int k=0;k<1000;k++) printf(">>> %d ",k);
//mac->if_module->dl_indication(&mac->dl_info);
//mac->if_module->dl_indication(&mac->dl_config_request);
mac->if_module->dl_indication(&mac->phy_config);
mac->if_module->dl_indication(&mac->phy_config);
break;
openair2/LAYER2/NR_MAC_gNB/config.c
+104 -88
View File
@@ -52,99 +52,108 @@ extern uint8_t nfapi_mode;
int32_t **rxdata;
int32_t **txdata;
typedef struct eutra_bandentry_s {
typedef struct nr_bandentry_s {
int16_t band;
uint32_t ul_min;
uint32_t ul_max;
uint32_t dl_min;
uint32_t dl_max;
uint32_t N_OFFs_DL;
} eutra_bandentry_t;
uint64_t ul_min;
uint64_t ul_max;
uint64_t dl_min;
uint64_t dl_max;
uint64_t N_OFFs_DL;
uint64_t step_size;
} nr_bandentry_t;
typedef struct band_info_s {
int nbands;
eutra_bandentry_t band_info[100];
} band_info_t;
nr_bandentry_t band_info[100];
} nr_band_info_t;
static const eutra_bandentry_t eutra_bandtable[] = {
{1, 19200, 19800, 21100, 21700, 0},
{2, 18500, 19100, 19300, 19900, 6000},
{3, 17100, 17850, 18050, 18800, 12000},
{4, 17100, 17550, 21100, 21550, 19500},
{5, 8240, 8490, 8690, 8940, 24000},
{6, 8300, 8400, 8750, 8850, 26500},
{7, 25000, 25700, 26200, 26900, 27500},
{8, 8800, 9150, 9250, 9600, 34500},
{9, 17499, 17849, 18449, 18799, 38000},
{10, 17100, 17700, 21100, 21700, 41500},
{11, 14279, 14529, 14759, 15009, 47500},
{12, 6980, 7160, 7280, 7460, 50100},
{13, 7770, 7870, 7460, 7560, 51800},
{14, 7880, 7980, 7580, 7680, 52800},
{17, 7040, 7160, 7340, 7460, 57300},
{18, 8150, 9650, 8600, 10100, 58500},
{19, 8300, 8450, 8750, 8900, 60000},
{20, 8320, 8620, 7910, 8210, 61500},
{21, 14479, 14629, 14959, 15109, 64500},
{22, 34100, 34900, 35100, 35900, 66000},
{23, 20000, 20200, 21800, 22000, 75000},
{24, 16126, 16605, 15250, 15590, 77000},
{25, 18500, 19150, 19300, 19950, 80400},
{26, 8140, 8490, 8590, 8940, 86900},
{27, 8070, 8240, 8520, 8690, 90400},
{28, 7030, 7580, 7580, 8130, 92100},
{29, 0, 0, 7170, 7280, 96600},
{30, 23050, 23250, 23500, 23600, 97700},
{31, 45250, 34900, 46250, 35900, 98700},
{32, 0, 0, 14520, 14960, 99200},
{33, 19000, 19200, 19000, 19200, 36000},
{34, 20100, 20250, 20100, 20250, 36200},
{35, 18500, 19100, 18500, 19100, 36350},
{36, 19300, 19900, 19300, 19900, 36950},
{37, 19100, 19300, 19100, 19300, 37550},
{38, 25700, 26200, 25700, 26300, 37750},
{39, 18800, 19200, 18800, 19200, 38250},
{40, 23000, 24000, 23000, 24000, 38650},
{41, 24960, 26900, 24960, 26900, 39650},
{42, 34000, 36000, 34000, 36000, 41590},
{43, 36000, 38000, 36000, 38000, 43590},
{44, 7030, 8030, 7030, 8030, 45590},
{45, 14470, 14670, 14470, 14670, 46590},
{46, 51500, 59250, 51500, 59250, 46790},
{65, 19200, 20100, 21100, 22000, 65536},
{66, 17100, 18000, 21100, 22000, 66436},
{67, 0, 0, 7380, 7580, 67336},
{68, 6980, 7280, 7530, 7830, 67536}
static const nr_bandentry_t nr_bandtable[] = {
{1, 1920000, 1980000, 2110000, 2170000, 20, 422000},
{2, 1850000, 1910000, 1930000, 1990000, 20, 386000},
{3, 1710000, 1785000, 1805000, 1880000, 20, 361000},
{5, 824000, 849000, 869000, 894000, 20, 173800},
{7, 2500000, 2570000, 2620000, 2690000, 20, 524000},
{8, 880000, 915000, 925000, 960000, 20, 185000},
{12, 698000, 716000, 728000, 746000, 20, 145800},
{20, 832000, 862000, 791000, 821000, 20, 158200},
{25, 1850000, 1915000, 1930000, 1995000, 20, 386000},
{28, 703000, 758000, 758000, 813000, 20, 151600},
{34, 2010000, 2025000, 2010000, 2025000, 20, 402000},
{38, 2570000, 2620000, 2570000, 2630000, 20, 514000},
{39, 1880000, 1920000, 1880000, 1920000, 20, 376000},
{40, 2300000, 2400000, 2300000, 2400000, 20, 460000},
{41, 2496000, 2690000, 2496000, 2690000, 3, 499200},
{50, 1432000, 1517000, 1432000, 1517000, 20, 286400},
{51, 1427000, 1432000, 1427000, 1432000, 20, 285400},
{66, 1710000, 1780000, 2110000, 2200000, 20, 422000},
{70, 1695000, 1710000, 1995000, 2020000, 20, 399000},
{71, 663000, 698000, 617000, 652000, 20, 123400},
{74, 1427000, 1470000, 1475000, 1518000, 20, 295000},
{75, 000, 000, 1432000, 1517000, 20, 286400},
{76, 000, 000, 1427000, 1432000, 20, 285400},
{77, 3300000, 4200000, 3300000, 4200000, 1, 620000},
{78, 3300000, 3800000, 3300000, 3800000, 1, 620000},
{79, 4400000, 5000000, 4400000, 5000000, 2, 693334},
{80, 1710000, 1785000, 000, 000, 20, 342000},
{81, 860000, 915000, 000, 000, 20, 176000},
{82, 832000, 862000, 000, 000, 20, 166400},
{83, 703000, 748000, 000, 000, 20, 140600},
{84, 1920000, 1980000, 000, 000, 20, 384000},
{86, 1710000, 1785000, 000, 000, 20, 342000}
};
uint32_t nr_to_earfcn(int eutra_bandP, uint32_t dl_CarrierFreq, uint32_t bw)
uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint32_t bw)
{
uint32_t dl_CarrierFreq_by_100k = dl_CarrierFreq / 100000;
int bw_by_100 = bw / 100;
uint64_t dl_CarrierFreq_by_1k = dl_CarrierFreq / 1000;
int bw_kHz = bw / 1000;
int i;
AssertFatal(eutra_bandP < 69, "eutra_band %d > 68\n", eutra_bandP);
for (i = 0; i < 69 && eutra_bandtable[i].band != eutra_bandP; i++);
LOG_I(MAC,"Searching for nr band %d DL Carrier frequency %llu bw %u\n",nr_bandP,(long long unsigned int)dl_CarrierFreq,bw);
AssertFatal(nr_bandP < 86, "nr_band %d > 86\n", nr_bandP);
for (i = 0; i < 30 && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(dl_CarrierFreq_by_100k >= eutra_bandtable[i].dl_min,
"Band %d, bw %u : DL carrier frequency %u Hz < %u\n",
eutra_bandP, bw, dl_CarrierFreq,
eutra_bandtable[i].dl_min);
AssertFatal(dl_CarrierFreq_by_100k <=
(eutra_bandtable[i].dl_max - bw_by_100),
"Band %d, bw %u: DL carrier frequency %u Hz > %d\n",
eutra_bandP, bw, dl_CarrierFreq,
eutra_bandtable[i].dl_max - bw_by_100);
AssertFatal(dl_CarrierFreq_by_1k >= nr_bandtable[i].dl_min,
"Band %d, bw %u : DL carrier frequency %llu kHz < %llu\n",
nr_bandP, bw, (long long unsigned int)dl_CarrierFreq_by_1k,
(long long unsigned int)nr_bandtable[i].dl_min);
AssertFatal(dl_CarrierFreq_by_1k <=
(nr_bandtable[i].dl_max - bw_kHz),
"Band %d, dl_CarrierFreq %llu bw %u: DL carrier frequency %llu kHz > %llu\n",
nr_bandP, (long long unsigned int)dl_CarrierFreq,bw, (long long unsigned int)dl_CarrierFreq_by_1k,
(long long unsigned int)(nr_bandtable[i].dl_max - bw_kHz));
int deltaFglobal;
if (dl_CarrierFreq < 3e9) deltaFglobal = 5;
else deltaFglobal = 15;
return (dl_CarrierFreq_by_100k - eutra_bandtable[i].dl_min +
(eutra_bandtable[i].N_OFFs_DL / 10));
// This is equation before Table 5.4.2.1-1 in 38101-1-f30
// F_REF=F_REF_Offs + deltaF_Global(N_REF-NREF_REF_Offs)
return (((dl_CarrierFreq_by_1k - nr_bandtable[i].dl_min)/deltaFglobal) +
nr_bandtable[i].N_OFFs_DL);
}
uint64_t from_nrarfcn(int nr_bandP, uint32_t dl_nrarfcn)
{
int i;
int deltaFglobal;
if (nr_bandP < 77 || nr_bandP > 79) deltaFglobal = 5;
else deltaFglobal = 15;
AssertFatal(nr_bandP < 87, "nr_band %d > 86\n", nr_bandP);
for (i = 0; i < 31 && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(dl_nrarfcn>=nr_bandtable[i].N_OFFs_DL,"dl_nrarfcn %u < N_OFFs_DL %llu\n",dl_nrarfcn, (long long unsigned int)nr_bandtable[i].N_OFFs_DL);
return 1000*(nr_bandtable[i].dl_min + (dl_nrarfcn - nr_bandtable[i].N_OFFs_DL) * deltaFglobal);
}
void config_nr_mib(int Mod_idP,
int CC_idP,
int p_gNBP,
@@ -159,24 +168,31 @@ void config_nr_mib(int Mod_idP,
cfg->num_tlv=0;
cfg->rf_config.tx_antenna_ports.value = p_gNBP;
cfg->rf_config.tx_antenna_ports.tl.tag = NFAPI_RF_CONFIG_TX_ANTENNA_PORTS_TAG;
cfg->rf_config.dl_subcarrierspacing.value = subCarrierSpacingCommon;
cfg->rf_config.dl_subcarrierspacing.tl.tag = NFAPI_NR_RF_CONFIG_DL_SUBCARRIERSPACING_TAG;
cfg->num_tlv++;
cfg->sch_config.ssb_subcarrier_offset.value = ssb_SubcarrierOffset;
cfg->rf_config.ul_subcarrierspacing.value = subCarrierSpacingCommon;
cfg->rf_config.ul_subcarrierspacing.tl.tag = NFAPI_NR_RF_CONFIG_UL_SUBCARRIERSPACING_TAG;
cfg->num_tlv++;
cfg->sch_config.ssb_subcarrier_offset.value = ssb_SubcarrierOffset;
cfg->sch_config.ssb_subcarrier_offset.tl.tag = NFAPI_NR_SCH_CONFIG_SSB_SUBCARRIER_OFFSET_TAG;
cfg->num_tlv++;
}
void config_common(int Mod_idP,
int CC_idP,
int eutra_bandP,
int dl_CarrierFreqP,
int dl_BandwidthP
int nr_bandP,
uint64_t dl_CarrierFreqP,
uint32_t dl_BandwidthP
){
nfapi_nr_config_request_t *cfg = &RC.nrmac[Mod_idP]->config[CC_idP];
int mu = 1;
// FDD
cfg->subframe_config.duplex_mode.value = 1;
cfg->subframe_config.duplex_mode.tl.tag = NFAPI_SUBFRAME_CONFIG_DUPLEX_MODE_TAG;
@@ -184,15 +200,15 @@ void config_common(int Mod_idP,
/// In NR DL and UL will be different band
cfg->nfapi_config.rf_bands.number_rf_bands = 1;
cfg->nfapi_config.rf_bands.rf_band[0] = eutra_bandP;
cfg->nfapi_config.rf_bands.rf_band[0] = nr_bandP;
cfg->nfapi_config.rf_bands.tl.tag = NFAPI_PHY_RF_BANDS_TAG;
cfg->num_tlv++;
cfg->nfapi_config.earfcn.value = nr_to_earfcn(eutra_bandP,dl_CarrierFreqP,dl_BandwidthP*180/100);
cfg->nfapi_config.earfcn.tl.tag = NFAPI_NFAPI_EARFCN_TAG;
cfg->nfapi_config.nrarfcn.value = to_nrarfcn(nr_bandP,dl_CarrierFreqP,dl_BandwidthP*180000*(1+mu));
cfg->nfapi_config.nrarfcn.tl.tag = NFAPI_NR_NFAPI_NRARFCN_TAG;
cfg->num_tlv++;
cfg->subframe_config.numerology_index_mu.value = 1;
cfg->subframe_config.numerology_index_mu.value = mu;
//cfg->subframe_config.tl.tag =
//cfg->num_tlv++;
@@ -217,8 +233,8 @@ void config_common(int Mod_idP,
int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int CC_idP,
int p_gNB,
int eutra_bandP,
int dl_CarrierFreqP,
int nr_bandP,
uint64_t dl_CarrierFreqP,
int dl_BandwidthP,
NR_BCCH_BCH_Message_t *mib,
NR_ServingCellConfigCommon_t *servingcellconfigcommon
@@ -245,7 +261,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
if( servingcellconfigcommon != NULL ){
config_common(Mod_idP,
CC_idP,
eutra_bandP,
nr_bandP,
dl_CarrierFreqP,
dl_BandwidthP
);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+24 -19
View File
@@ -71,7 +71,7 @@ uint16_t nr_pdcch_order_table[6] = { 31, 31, 511, 2047, 2047, 8191 };
void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
int CC_idP,
frame_t frameP,
sub_frame_t subframeP){
sub_frame_t slotP){
nfapi_nr_dl_config_request_t *DL_req = &gNB->DL_req[0];
nfapi_ul_config_request_t *UL_req = &gNB->UL_req[0];
@@ -87,7 +87,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
DL_req[CC_idP].dl_config_request_body.number_pdsch_rnti = 0;
//DL_req[CC_idP].dl_config_request_body.transmission_power_pcfich = 6000;
HI_DCI0_req[CC_idP].hi_dci0_request_body.sfnsf = subframeP + (frameP<<4);
HI_DCI0_req[CC_idP].hi_dci0_request_body.sfnsf = slotP + (frameP<<7);
HI_DCI0_req[CC_idP].hi_dci0_request_body.number_of_dci = 0;
@@ -104,7 +104,7 @@ void check_nr_ul_failure(module_id_t module_idP,
int CC_id,
int UE_id,
frame_t frameP,
sub_frame_t subframeP) {
sub_frame_t slotP) {
UE_list_t *UE_list = &RC.nrmac[module_idP]->UE_list;
nfapi_nr_dl_config_request_t *DL_req = &RC.nrmac[module_idP]->DL_req[0];
@@ -259,14 +259,14 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
}
}
*/
void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
{
int CC_id;
gNB_MAC_INST *mac = RC.nrmac[module_idP];
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
nfapi_ul_config_request_t *ul_req_tmp = &mac->UL_req_tmp[CC_id][subframeP];
nfapi_ul_config_request_t *ul_req_tmp = &mac->UL_req_tmp[CC_id][slotP];
nfapi_ul_config_request_t *ul_req = &mac->UL_req[CC_id];
nfapi_ul_config_request_pdu_t *ul_req_pdu = ul_req->ul_config_request_body.ul_config_pdu_list;
@@ -274,12 +274,12 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP
// Restore the pointer
ul_req->ul_config_request_body.ul_config_pdu_list = ul_req_pdu;
ul_req->sfn_sf = (frameP<<4) + subframeP;
ul_req->sfn_sf = (frameP<<7) + slotP;
ul_req_tmp->ul_config_request_body.number_of_pdus = 0;
if (ul_req->ul_config_request_body.number_of_pdus>0)
{
LOG_D(PHY, "%s() active NOW (frameP:%d subframeP:%d) pdus:%d\n", __FUNCTION__, frameP, subframeP, ul_req->ul_config_request_body.number_of_pdus);
LOG_D(PHY, "%s() active NOW (frameP:%d slotP:%d) pdus:%d\n", __FUNCTION__, frameP, slotP, ul_req->ul_config_request_body.number_of_pdus);
}
memcpy((void*)ul_req->ul_config_request_body.ul_config_pdu_list,
@@ -290,7 +290,7 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP){
sub_frame_t slotP){
protocol_ctxt_t ctxt;
int CC_id, i = -1;
@@ -303,7 +303,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
RC.nrmac[module_idP]->frame = frameP;
RC.nrmac[module_idP]->subframe = subframeP;
RC.nrmac[module_idP]->slot = slotP;
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
//mbsfn_status[CC_id] = 0;
@@ -312,17 +313,20 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
memset(cc[CC_id].vrb_map, 0, 100);
memset(cc[CC_id].vrb_map_UL, 0, 100);
clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frameP, subframeP);
clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frameP, slotP);
}
// refresh UE list based on UEs dropped by PHY in previous subframe
for (i = 0; i < MAX_MOBILES_PER_GNB; i++) {
if (UE_list->active[i]) {
nfapi_nr_config_request_t *cfg = &RC.nrmac[module_idP]->config[CC_id];
rnti = UE_RNTI(module_idP, i);
CC_id = UE_PCCID(module_idP, i);
if (((frameP&127) == 0) && (subframeP == 0)) {
int spf = get_spf(cfg);
if (((frameP&127) == 0) && (slotP == 0)) {
LOG_I(MAC,
"UE rnti %x : %s, PHR %d dB DL CQI %d PUSCH SNR %d PUCCH SNR %d\n",
rnti,
@@ -334,11 +338,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
(UE_list->UE_sched_ctrl[i].pucch1_snr[CC_id] - 128) / 2);
}
RC.gNB[module_idP][CC_id]->pusch_stats_bsr[i][(frameP * 10) + subframeP] = -63;
RC.gNB[module_idP][CC_id]->pusch_stats_bsr[i][to_absslot(cfg,frameP,slotP)] = -63;
if (i == UE_list->head)
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_BSR,RC.gNB[module_idP][CC_id]->
pusch_stats_bsr[i][(frameP * 10) + subframeP]);
pusch_stats_bsr[i][to_absslot(cfg,frameP,slotP)]);
// increment this, it is cleared when we receive an sdu
RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ul_inactivity_timer++;
@@ -407,20 +411,21 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
} //END if (UE_list->active[i])
} //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++)
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES,NOT_A_RNTI, frameP, subframeP,module_idP);
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES,NOT_A_RNTI, frameP, slotP,module_idP);
pdcp_run(&ctxt);
//rrc_rx_tx(&ctxt, CC_id);
// This schedules MIB
if((subframeP == 0) && (frameP & 7) == 0){
schedule_nr_mib(module_idP, frameP, subframeP);
if((slotP == 0) && (frameP & 7) == 0){
schedule_nr_mib(module_idP, frameP, slotP);
}
// Phytest scheduling/ option not activated because of pending bug
if (subframeP==1)
nr_schedule_css_dlsch_phytest(module_idP, frameP, subframeP);
if (slotP==2)
nr_schedule_css_dlsch_phytest(module_idP, frameP, slotP);
/*
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+5 -5
View File
@@ -57,7 +57,7 @@
extern RAN_CONTEXT_t RC;
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP){
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
NR_COMMON_channels_t *cc;
@@ -70,9 +70,9 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
int mib_sdu_length;
int CC_id;
uint16_t sfn_sf = frameP << 4 | subframeP;
uint16_t sfn_sf = frameP << 7 | slotP;
AssertFatal(subframeP == 0, "Subframe must be 0\n");
AssertFatal(slotP == 0, "Subframe must be 0\n");
AssertFatal((frameP & 7) == 0, "Frame must be a multiple of 8\n");
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
@@ -83,11 +83,11 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
mib_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, MIBCH, 1, &cc->MIB_pdu.payload[0]); // not used in this case
LOG_D(MAC, "Frame %d, subframe %d: BCH PDU length %d\n", frameP, subframeP, mib_sdu_length);
LOG_D(MAC, "Frame %d, slot %d: BCH PDU length %d\n", frameP, slotP, mib_sdu_length);
if (mib_sdu_length > 0) {
LOG_D(MAC, "Frame %d, subframe %d: Adding BCH PDU in position %d (length %d)\n", frameP, subframeP, dl_req->number_pdu, mib_sdu_length);
LOG_D(MAC, "Frame %d, slot %d: Adding BCH PDU in position %d (length %d)\n", frameP, slotP, dl_req->number_pdu, mib_sdu_length);
if ((frameP & 1023) < 80){
LOG_D(MAC,"[gNB %d] Frame %d : MIB->BCH CC_id %d, Received %d bytes\n",module_idP, frameP, CC_id, mib_sdu_length);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+17 -10
View File
@@ -30,6 +30,7 @@
#include "nr_mac_gNB.h"
#include "SCHED_NR/sched_nr.h"
#include "mac_proto.h"
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "PHY/NR_TRANSPORT/nr_dci.h"
@@ -39,7 +40,7 @@ extern RAN_CONTEXT_t RC;
* current version has only a DCI for type 1 PDCCH for C_RNTI*/
void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP)
sub_frame_t slotP)
{
uint8_t CC_id;
@@ -49,15 +50,19 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
nfapi_nr_dl_config_request_pdu_t *dl_config_dci_pdu;
nfapi_nr_dl_config_request_pdu_t *dl_config_dlsch_pdu;
nfapi_tx_request_pdu_t *TX_req;
uint16_t sfn_sf = frameP << 4 | subframeP;
nfapi_nr_config_request_t *cfg = &nr_mac->config[0];
uint16_t rnti = 0x1234;
uint16_t sfn_sf = frameP << 7 | slotP;
int dl_carrier_bandwidth = cfg->rf_config.dl_carrier_bandwidth.value;
// everything here is hard-coded to 30 kHz
int scs = get_dlscs(cfg);
int slots_per_frame = get_spf(cfg);
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
LOG_I(MAC, "Scheduling common search space DCI type 1 for CC_id %d\n",CC_id);
PHY_VARS_gNB *gNB = RC.gNB[module_idP][CC_id];
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
dl_req = &nr_mac->DL_req[CC_id].dl_config_request_body;
dl_config_dci_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
@@ -85,11 +90,13 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
dlsch_pdu_rel15->ndi = 1;
dlsch_pdu_rel15->redundancy_version = 0;
nr_configure_css_dci_from_mib(&gNB->pdcch_type0_params,
kHz30, kHz30, nr_FR1, 0, 0,
fp->slots_per_frame,
cfg->rf_config.dl_carrier_bandwidth.value);
memcpy((void*)params_rel15, (void*)&gNB->pdcch_type0_params, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t));
nr_configure_css_dci_initial(params_rel15,
scs, scs, nr_FR1, 0, 0,
slots_per_frame,
dl_carrier_bandwidth);
params_rel15->first_slot = 0;
pdu_rel15->frequency_domain_assignment = get_RIV(dlsch_pdu_rel15->start_prb, dlsch_pdu_rel15->n_prb, cfg->rf_config.dl_carrier_bandwidth.value);
pdu_rel15->time_domain_assignment = get_SLIV(dlsch_pdu_rel15->start_symbol, dlsch_pdu_rel15->nb_symbols);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+169 -53
View File
@@ -65,59 +65,175 @@ extern RAN_CONTEXT_t RC;
extern int n_active_slices;
int is_nr_UL_sf(NR_COMMON_channels_t * ccP, sub_frame_t subframeP){
// if FDD return dummy value
if (ccP->tdd_Config == NULL)
/// LUT for the number of symbols in the coreset indexed by coreset index (4 MSB rmsi_pdcch_config)
uint8_t nr_coreset_nsymb_pdcch_type_0_b40Mhz[16] = {2,2,2,2,2,3,3,3,3,3,1,1,1,2,2,2}; // below 40Mhz bw
uint8_t nr_coreset_nsymb_pdcch_type_0_a40Mhz[10] = {2,2,3,3,1,1,2,2,3,3}; // above 40Mhz bw
/// LUT for the number of RBs in the coreset indexed by coreset index
uint8_t nr_coreset_rb_offset_pdcch_type_0_b40Mhz[16] = {0,1,2,3,4,0,1,2,3,4,12,14,16,12,14,16};
uint8_t nr_coreset_rb_offset_pdcch_type_0_a40Mhz[10] = {0,4,0,4,0,28,0,28,0,28};
/// LUT for monitoring occasions param O indexed by ss index (4 LSB rmsi_pdcch_config)
uint8_t nr_ss_param_O_type_0_mux1_FR1[16] = {0,0,2,2,5,5,7,7,0,5,0,0,2,2,5,5};
uint8_t nr_ss_param_O_type_0_mux1_FR2[14] = {0,0,2.5,2.5,5,5,0,2.5,5,7.5,7.5,7.5,0,5};
/// LUT for number of SS sets per slot indexed by ss index
uint8_t nr_ss_sets_per_slot_type_0_FR1[16] = {1,2,1,2,1,2,1,2,1,1,1,1,1,1,1,1};
uint8_t nr_ss_sets_per_slot_type_0_FR2[14] = {1,2,1,2,1,2,2,2,2,1,2,2,1,1};
/// LUT for monitoring occasions param M indexed by ss index
uint8_t nr_ss_param_M_type_0_mux1_FR1[16] = {1,0.5,1,0.5,1,0.5,1,0.5,2,2,1,1,1,1,1,1};
uint8_t nr_ss_param_M_type_0_mux1_FR2[14] = {1,0.5,1,0.5,1,0.5,0.5,0.5,0.5,1,0.5,0.5,2,2};
/// LUT for SS first symbol index indexed by ss index
uint8_t nr_ss_first_symb_idx_type_0_mux1_FR1[8] = {0,0,1,2,1,2,1,2};
int is_nr_UL_slot(NR_COMMON_channels_t * ccP, int slot){
return (0);
}
void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
nr_scs_e scs_common,
nr_scs_e pdcch_scs,
nr_frequency_range_e freq_range,
uint8_t rmsi_pdcch_config,
uint8_t ssb_idx,
uint16_t nb_slots_per_frame,
uint16_t N_RB)
{
uint8_t O, M;
uint8_t ss_idx = rmsi_pdcch_config&0xf;
uint8_t cset_idx = (rmsi_pdcch_config>>4)&0xf;
uint8_t mu;
/// Coreset params
switch(scs_common) {
case kHz15:
mu = 0;
break;
case kHz30:
mu = 1;
if (N_RB < 106) { // Minimum 40Mhz bandwidth not satisfied
switch(pdcch_scs) {
case kHz15:
AssertFatal(1==0,"kHz15 not supported yet\n");
break;
case kHz30:
pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
pdcch_params->n_rb = (cset_idx < 10)? 24 : 48;
pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_b40Mhz[cset_idx];
pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_b40Mhz[cset_idx];
break;
default:
AssertFatal(1==0,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
}
}
else {
AssertFatal(ss_idx<10 ,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
switch(pdcch_scs) {
case kHz15:
AssertFatal(1==0,"15 kHz SCS not supported yet\n");
break;
case kHz30:
pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
pdcch_params->n_rb = (cset_idx < 4)? 24 : 48;
pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_b40Mhz[cset_idx];
pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_b40Mhz[cset_idx];
break;
default:
AssertFatal(1==0,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
}
}
case kHz60:
mu = 2;
break;
case kHz120:
mu = 3;
break;
default:
AssertFatal(1==0,"Invalid common subcarrier spacing %d\n", scs_common);
}
/// Search space params
switch(pdcch_params->mux_pattern) {
case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1:
if (freq_range == nr_FR1) {
O = nr_ss_param_O_type_0_mux1_FR1[ss_idx];
pdcch_params->nb_ss_sets_per_slot = nr_ss_sets_per_slot_type_0_FR1[ss_idx];
M = nr_ss_param_M_type_0_mux1_FR1[ss_idx];
pdcch_params->first_symbol = (ss_idx < 8)? ( (ss_idx&1)? pdcch_params->n_symb : 0 ) : nr_ss_first_symb_idx_type_0_mux1_FR1[ss_idx - 8];
}
else {
AssertFatal(ss_idx<14 ,"Invalid search space index for multiplexing type 1 and FR2 %d\n", ss_idx);
O = nr_ss_param_O_type_0_mux1_FR2[ss_idx];
pdcch_params->nb_ss_sets_per_slot = nr_ss_sets_per_slot_type_0_FR2[ss_idx];
M = nr_ss_param_M_type_0_mux1_FR2[ss_idx];
pdcch_params->first_symbol = (ss_idx < 12)? ( (ss_idx&1)? 7 : 0 ) : 0;
}
pdcch_params->nb_slots = 2;
pdcch_params->sfn_mod2 = ((uint8_t)(floor( (O*pow(2, mu) + floor(ssb_idx*M)) / nb_slots_per_frame )) & 1)? 1 : 0;
pdcch_params->first_slot = (uint8_t)(O*pow(2, mu) + floor(ssb_idx*M)) % nb_slots_per_frame;
break;
case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2:
break;
case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE3:
break;
default:
AssertFatal(1==0, "Invalid SSB and coreset multiplexing pattern %d\n", pdcch_params->mux_pattern);
}
pdcch_params->config_type = NFAPI_NR_CSET_CONFIG_MIB_SIB1;
pdcch_params->cr_mapping_type = NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED;
pdcch_params->precoder_granularity = NFAPI_NR_CSET_SAME_AS_REG_BUNDLE;
pdcch_params->reg_bundle_size = 6;
pdcch_params->interleaver_size = 2;
// set initial banwidth part to full bandwidth
pdcch_params->n_RB_BWP = N_RB;
}
void nr_configure_css_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
nfapi_nr_coreset_t* coreset,
nfapi_nr_search_space_t* search_space) {
}
int get_dlscs(nfapi_nr_config_request_t *cfg) {
return(cfg->rf_config.dl_subcarrierspacing.value);
}
int get_ulscs(nfapi_nr_config_request_t *cfg) {
return(cfg->rf_config.ul_subcarrierspacing.value);
}
int get_spf(nfapi_nr_config_request_t *cfg) {
int mu = cfg->rf_config.dl_subcarrierspacing.value;
AssertFatal(mu>=0&&mu<4,"Illegal scs %d\n",mu);
return(10 * (1<<mu));
}
int to_absslot(nfapi_nr_config_request_t *cfg,int frame,int slot) {
return(get_spf(cfg)*frame) + slot;
switch (ccP->tdd_Config->subframeAssignment) {
case 1:
switch (subframeP) {
case 0:
case 4:
case 5:
case 9:
return (0);
break;
case 2:
case 3:
case 7:
case 8:
return (1);
break;
default:
return (0);
break;
}
break;
case 3:
if ((subframeP <= 1) || (subframeP >= 5))
return (0);
else if ((subframeP > 1) && (subframeP < 5))
return (1);
else
AssertFatal(1 == 0, "Unknown subframe number\n");
break;
case 4:
if ((subframeP <= 1) || (subframeP >= 4))
return (0);
else if ((subframeP > 1) && (subframeP < 4))
return (1);
else
AssertFatal(1 == 0, "Unknown subframe number\n");
break;
case 5:
if ((subframeP <= 1) || (subframeP >= 3))
return (0);
else if ((subframeP > 1) && (subframeP < 3))
return (1);
else
AssertFatal(1 == 0, "Unknown subframe number\n");
break;
default:
AssertFatal(1 == 0,
"subframe %d Unsupported TDD configuration %d\n",
subframeP, (int) ccP->tdd_Config->subframeAssignment);
break;
}
}
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+32 -3
View File
@@ -39,14 +39,14 @@ void mac_top_init_gNB(void);
int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int CC_id,
int p_gNB,
int eutra_bandP,
int dl_CarrierFreqP,
int nr_bandP,
uint64_t dl_CarrierFreqP,
int dl_BandwidthP,
NR_BCCH_BCH_Message_t *mib,
NR_ServingCellConfigCommon_t *servingcellconfigcommon
);
int is_nr_UL_sf(NR_COMMON_channels_t * ccP, sub_frame_t subframeP);
int is_nr_UL_slot(NR_COMMON_channels_t * ccP, int slotP);
void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
int CC_idP,
@@ -59,4 +59,33 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP);
void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP);
void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
nr_scs_e scs_common,
nr_scs_e pdcch_scs,
nr_frequency_range_e freq_range,
uint8_t rmsi_pdcch_config,
uint8_t ssb_idx,
uint16_t nb_slots_per_frame,
uint16_t N_RB);
void nr_configure_css_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
nfapi_nr_coreset_t* coreset,
nfapi_nr_search_space_t* search_space);
int get_dlscs(nfapi_nr_config_request_t *cfg);
int get_ulscs(nfapi_nr_config_request_t *cfg);
int get_spf(nfapi_nr_config_request_t *cfg);
int to_absslot(nfapi_nr_config_request_t *cfg,int frame,int slot);
#endif /*__LAYER2_NR_MAC_PROTO_H__*/
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+3 -3
View File
@@ -67,7 +67,7 @@ typedef struct {
int physCellId;
int p_gNB;
int Ncp;
int eutra_band;
int nr_band;
uint32_t dl_CarrierFreq;
NR_BCCH_BCH_Message_t *mib;
TDD_Config_t *tdd_Config;
@@ -107,8 +107,8 @@ typedef struct gNB_MAC_INST_s {
module_id_t Mod_id;
/// frame counter
frame_t frame;
/// subframe counter
sub_frame_t subframe;
/// slot counter
int slot;
/// Pointer to IF module instance for PHY
NR_IF_Module_t *if_inst;
/// Common cell resources
openair2/NR_PHY_INTERFACE/NR_IF_Module.c
+28 -26
View File
@@ -59,7 +59,7 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) {
AssertFatal(UL_info->rach_ind.rach_indication_body.number_of_preambles==1,"More than 1 preamble not supported\n");
UL_info->rach_ind.rach_indication_body.number_of_preambles=0;
LOG_D(MAC,"UL_info[Frame %d, Subframe %d] Calling initiate_ra_proc RACH:SFN/SF:%d\n",UL_info->frame,UL_info->subframe, NFAPI_SFNSF2DEC(UL_info->rach_ind.sfn_sf));
LOG_D(MAC,"UL_info[Frame %d, Slot %d] Calling initiate_ra_proc RACH:SFN/SF:%d\n",UL_info->frame,UL_info->slot, NFAPI_SFNSF2DEC(UL_info->rach_ind.sfn_sf));
initiate_ra_proc(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rach_ind.sfn_sf),
@@ -80,12 +80,12 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) {
for (i=0;i<UL_info->rach_ind_br.rach_indication_body.number_of_preambles;i++) {
AssertFatal(UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type>0,
"Got regular PRACH preamble, not BL/CE\n");
LOG_D(MAC,"Frame %d, Subframe %d Calling initiate_ra_proc (CE_level %d)\n",UL_info->frame,UL_info->subframe,
LOG_D(MAC,"Frame %d, Slot %d Calling initiate_ra_proc (CE_level %d)\n",UL_info->frame,UL_info->slot,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type-1);
initiate_ra_proc(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->slot,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.preamble,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.timing_advance,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.rnti,
@@ -113,7 +113,7 @@ void handle_nr_sr(NR_UL_IND_t *UL_info) {
SR_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->slot,
UL_info->sr_ind.sr_indication_body.sr_pdu_list[i].rx_ue_information.rnti,
UL_info->sr_ind.sr_indication_body.sr_pdu_list[i].ul_cqi_information.ul_cqi);
}
@@ -133,7 +133,7 @@ void handle_nr_cqi(NR_UL_IND_t *UL_info) {
nfapi_cqi_indication_t ind;
ind.header.message_id = NFAPI_RX_CQI_INDICATION;
ind.sfn_sf = UL_info->frame<<4 | UL_info->subframe;
ind.sfn_sf = UL_info->frame<<4 | UL_info->slot;
ind.cqi_indication_body = UL_info->cqi_ind;
oai_nfapi_cqi_indication(&ind);
@@ -147,7 +147,7 @@ void handle_nr_cqi(NR_UL_IND_t *UL_info) {
cqi_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->slot,
UL_info->cqi_ind.cqi_pdu_list[i].rx_ue_information.rnti,
&UL_info->cqi_ind.cqi_pdu_list[i].cqi_indication_rel9,
UL_info->cqi_ind.cqi_raw_pdu_list[i].pdu,
@@ -220,11 +220,11 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti) {
LOG_D(PHY, "UL_info->crc_ind.crc_indication_body.crc_pdu_list[%d].crc_indication_rel8.crc_flag:%d\n", j, UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].crc_indication_rel8.crc_flag);
if (UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].crc_indication_rel8.crc_flag == 1) { // CRC error indication
LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->subframe);
LOG_D(MAC,"Frame %d, Slot %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->slot);
rx_sdu(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->subframe,
NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->slot,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
(uint8_t *)NULL,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
@@ -232,11 +232,11 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
}
else {
LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC ok) \n",UL_info->frame,UL_info->subframe);
LOG_D(MAC,"Frame %d, Slot %d Calling rx_sdu (CRC ok) \n",UL_info->frame,UL_info->slot);
rx_sdu(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->subframe,
NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->slot,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].data,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
@@ -250,12 +250,12 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
} // for (i=0;i<UL_info->rx_ind.number_of_pdus;i++)
UL_info->crc_ind.crc_indication_body.number_of_crcs=0;
UL_info->rx_ind.rx_indication_body.number_of_pdus = 0;
} // UL_info->rx_ind.rx_indication_body.number_of_pdus>0 && UL_info->subframe && UL_info->crc_ind.crc_indication_body.number_of_crcs>0
} // UL_info->rx_ind.rx_indication_body.number_of_pdus>0 && UL_info->slot && UL_info->crc_ind.crc_indication_body.number_of_crcs>0
else if (UL_info->rx_ind.rx_indication_body.number_of_pdus!=0 || UL_info->crc_ind.crc_indication_body.number_of_crcs!=0) {
LOG_E(PHY,"hoping not to have mis-match between CRC ind and RX ind - hopefully the missing message is coming shortly rx_ind:%d(SFN/SF:%05d) crc_ind:%d(SFN/SF:%05d) UL_info(SFN/SF):%04d%d\n",
UL_info->rx_ind.rx_indication_body.number_of_pdus, NFAPI_SFNSF2DEC(UL_info->rx_ind.sfn_sf),
UL_info->crc_ind.crc_indication_body.number_of_crcs, NFAPI_SFNSF2DEC(UL_info->crc_ind.sfn_sf),
UL_info->frame, UL_info->subframe);
UL_info->frame, UL_info->slot);
}
}
}
@@ -276,7 +276,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info)
gNB_MAC_INST *mac = RC.nrmac[module_id];
LOG_D(PHY,"SFN/SF:%d%d module_id:%d CC_id:%d UL_info[rx_ind:%d harqs:%d crcs:%d cqis:%d preambles:%d sr_ind:%d]\n",
UL_info->frame,UL_info->subframe,
UL_info->frame,UL_info->slot,
module_id,CC_id,
UL_info->rx_ind.rx_indication_body.number_of_pdus, UL_info->harq_ind.harq_indication_body.number_of_harqs, UL_info->crc_ind.crc_indication_body.number_of_crcs, UL_info->cqi_ind.number_of_cqis, UL_info->rach_ind.rach_indication_body.number_of_preambles, UL_info->sr_ind.sr_indication_body.number_of_srs);
@@ -284,18 +284,18 @@ void NR_UL_indication(NR_UL_IND_t *UL_info)
{
if (ifi->CC_mask==0) {
ifi->current_frame = UL_info->frame;
ifi->current_subframe = UL_info->subframe;
ifi->current_slot = UL_info->slot;
}
else {
AssertFatal(UL_info->frame != ifi->current_frame,"CC_mask %x is not full and frame has changed\n",ifi->CC_mask);
AssertFatal(UL_info->subframe != ifi->current_subframe,"CC_mask %x is not full and subframe has changed\n",ifi->CC_mask);
AssertFatal(UL_info->slot != ifi->current_slot,"CC_mask %x is not full and slot has changed\n",ifi->CC_mask);
}
ifi->CC_mask |= (1<<CC_id);
}
// clear DL/UL info for new scheduling round
clear_nr_nfapi_information(RC.nrmac[module_id],CC_id,UL_info->frame,UL_info->subframe);
clear_nr_nfapi_information(mac,CC_id,UL_info->frame,UL_info->slot);
handle_nr_rach(UL_info);
@@ -315,24 +315,26 @@ void NR_UL_indication(NR_UL_IND_t *UL_info)
if (ifi->CC_mask == ((1<<MAX_NUM_CCs)-1)) {
/*
eNB_dlsch_ulsch_scheduler(module_id,
(UL_info->frame+((UL_info->subframe>(9-sf_ahead))?1:0)) % 1024,
(UL_info->subframe+sf_ahead)%10);
(UL_info->frame+((UL_info->slot>(9-sf_ahead))?1:0)) % 1024,
(UL_info->slot+sf_ahead)%10);
*/
nfapi_nr_config_request_t *cfg = &mac->config[CC_id];
int spf = get_spf(cfg);
gNB_dlsch_ulsch_scheduler(module_id,
(UL_info->frame+((UL_info->subframe>(9-sf_ahead))?1:0)) % 1024,
(UL_info->subframe+sf_ahead)%10);
(UL_info->frame+((UL_info->slot>(spf-1-sf_ahead))?1:0)) % 1024,
(UL_info->slot+sf_ahead)%spf);
ifi->CC_mask = 0;
sched_info->module_id = module_id;
sched_info->CC_id = CC_id;
sched_info->frame = (UL_info->frame + ((UL_info->subframe>(9-sf_ahead)) ? 1 : 0)) % 1024;
sched_info->subframe = (UL_info->subframe+sf_ahead)%10;
sched_info->frame = (UL_info->frame + ((UL_info->slot>(spf-1-sf_ahead)) ? 1 : 0)) % 1024;
sched_info->slot = (UL_info->slot+sf_ahead)%spf;
sched_info->DL_req = &mac->DL_req[CC_id];
sched_info->HI_DCI0_req = &mac->HI_DCI0_req[CC_id];
if ((mac->common_channels[CC_id].tdd_Config==NULL) ||
(is_nr_UL_sf(&mac->common_channels[CC_id],(sched_info->subframe+sf_ahead)%10)>0))
(is_nr_UL_slot(&mac->common_channels[CC_id],(sched_info->slot+sf_ahead)%spf)>0))
sched_info->UL_req = &mac->UL_req[CC_id];
else
sched_info->UL_req = NULL;
@@ -352,7 +354,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info)
ifi->NR_Schedule_response(sched_info);
}
LOG_D(PHY,"NR_Schedule_response: SFN_SF:%d%d dl_pdus:%d\n",sched_info->frame,sched_info->subframe,sched_info->DL_req->dl_config_request_body.number_pdu);
LOG_D(PHY,"NR_Schedule_response: SFN_SF:%d%d dl_pdus:%d\n",sched_info->frame,sched_info->slot,sched_info->DL_req->dl_config_request_body.number_pdu);
}
}
}
@@ -374,4 +376,4 @@ NR_IF_Module_t *NR_IF_Module_init(int Mod_id){
"allocation of if_inst[%d]->if_mutex fails\n",Mod_id);
}
return if_inst[Mod_id];
}
}
openair2/NR_PHY_INTERFACE/NR_IF_Module.h
+7 -7
View File
@@ -57,8 +57,8 @@ typedef struct{
int CC_id;
/// frame
frame_t frame;
/// subframe
sub_frame_t subframe;
/// slot
slot_t slot;
/// harq indication list
nfapi_harq_indication_t harq_ind;
@@ -88,7 +88,7 @@ typedef struct{
} NR_UL_IND_t;
// Downlink subframe P7
// Downlink slot P7
typedef struct{
@@ -98,8 +98,8 @@ typedef struct{
uint8_t CC_id;
/// frame
frame_t frame;
/// subframe
sub_frame_t subframe;
/// slot
slot_t slot;
/// nFAPI DL Config Request
nfapi_nr_dl_config_request_t *DL_req;
/// nFAPI UL Config Request
@@ -123,7 +123,7 @@ typedef struct NR_IF_Module_s{
void (*NR_PHY_config_req)(NR_PHY_Config_t* config_INFO);
uint32_t CC_mask;
uint16_t current_frame;
uint8_t current_subframe;
uint8_t current_slot;
pthread_mutex_t if_mutex;
} NR_IF_Module_t;
@@ -137,4 +137,4 @@ void NR_UL_indication(NR_UL_IND_t *UL_INFO);
/*Interface for Downlink, transmitting the DLSCH SDU, DCI SDU*/
void NR_Schedule_Response(NR_Sched_Rsp_t *Sched_INFO);
#endif /*_NFAPI_INTERFACE_NR_H_*/
#endif /*_NFAPI_INTERFACE_NR_H_*/
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
+148 -147
View File
@@ -41,217 +41,218 @@
static nr_ue_if_module_t *nr_ue_if_module_inst[MAX_IF_MODULES];
// L2 Abstraction Layer
int8_t handle_bcch_bch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint8_t *pduP, uint8_t additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id){
int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id){
return nr_ue_decode_mib( module_id,
cc_id,
gNB_index,
additional_bits,
ssb_length, // Lssb = 64 is not support
ssb_index,
pduP,
cell_id);
return nr_ue_decode_mib( module_id,
cc_id,
gNB_index,
additional_bits,
ssb_length, // Lssb = 64 is not support
ssb_index,
pduP,
cell_id);
}
// L2 Abstraction Layer
int8_t handle_bcch_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len){
int handle_bcch_dlsch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len){
return 0;
return 0;
}
// L2 Abstraction Layer
int8_t handle_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type){
int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type){
return nr_ue_process_dci(module_id, cc_id, gNB_index, dci, rnti, dci_type);
printf("handle_dci: rnti %x,dci_type %d\n",rnti,dci_type);
return nr_ue_process_dci(module_id, cc_id, gNB_index, dci, rnti, dci_type);
}
// L2 Abstraction Layer
int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len){
// return 0;
return nr_ue_process_dlsch( module_id,
cc_id,
gNB_index,
&dci_ind,
pduP,
pdu_len);
// return 0;
return nr_ue_process_dlsch( module_id,
cc_id,
gNB_index,
&dci_ind,
pduP,
pdu_len);
}
int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
NR_UE_L2_STATE_t ret;
module_id_t module_id = ul_info->module_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
NR_UE_L2_STATE_t ret;
module_id_t module_id = ul_info->module_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
// clean previous FAPI messages
mac->tx_request.number_of_pdus = 0;
mac->ul_config_request.number_pdus = 0;
mac->dl_config_request.number_pdus = 0;
// clean previous FAPI messages
// clean previous FAPI messages
mac->tx_request.number_of_pdus = 0;
mac->ul_config_request.number_pdus = 0;
mac->dl_config_request.number_pdus = 0;
// clean previous FAPI messages
ret = nr_ue_scheduler(
ul_info->module_id,
ul_info->gNB_index,
ul_info->cc_id,
ul_info->frame,
ul_info->slot,
ul_info->ssb_index,
0, 0); // TODO check tx/rx frame/slot is need for NR version
ret = nr_ue_scheduler(
ul_info->module_id,
ul_info->gNB_index,
ul_info->cc_id,
ul_info->frame,
ul_info->slot,
ul_info->ssb_index,
0, 0); // TODO check tx/rx frame/slot is need for NR version
switch(ret){
case CONNECTION_OK:
break;
case CONNECTION_LOST:
break;
case PHY_RESYNCH:
break;
case PHY_HO_PRACH:
break;
default:
break;
}
switch(ret){
case CONNECTION_OK:
break;
case CONNECTION_LOST:
break;
case PHY_RESYNCH:
break;
case PHY_HO_PRACH:
break;
default:
break;
}
mac->if_module->scheduled_response(&mac->scheduled_response);
mac->if_module->scheduled_response(&mac->scheduled_response);
return 0;
return 0;
}
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
int32_t i;
uint32_t ret_mask = 0x0;
module_id_t module_id = dl_info->module_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
int32_t i;
uint32_t ret_mask = 0x0;
module_id_t module_id = dl_info->module_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
// clean up scheduled_response structure
// clean up scheduled_response structure
if(dl_info->dci_ind != NULL){
printf("[L2][IF MODULE][DL INDICATION][DCI_IND]\n");
for(i=0; i<dl_info->dci_ind->number_of_dcis; ++i){
//printf(">>>NR_IF_Module i=%d, dl_info->dci_ind->number_of_dcis=%d\n",i,dl_info->dci_ind->number_of_dcis);
fapi_nr_dci_pdu_rel15_t *dci = &dl_info->dci_ind->dci_list[i].dci;
if(dl_info->dci_ind != NULL){
printf("[L2][IF MODULE][DL INDICATION][DCI_IND]\n");
for(i=0; i<dl_info->dci_ind->number_of_dcis; ++i){
printf(">>>NR_IF_Module i=%d, dl_info->dci_ind->number_of_dcis=%d\n",i,dl_info->dci_ind->number_of_dcis);
fapi_nr_dci_pdu_rel15_t *dci = &dl_info->dci_ind->dci_list[i].dci;
ret_mask |= (handle_dci(
dl_info->module_id,
dl_info->cc_id,
dl_info->gNB_index,
dci,
(dl_info->dci_ind->dci_list+i)->rnti,
(dl_info->dci_ind->dci_list+i)->dci_format)) << FAPI_NR_DCI_IND;
ret_mask |= (handle_dci(
dl_info->module_id,
dl_info->cc_id,
dl_info->gNB_index,
dci,
(dl_info->dci_ind->dci_list+i)->rnti,
(dl_info->dci_ind->dci_list+i)->dci_format)) << FAPI_NR_DCI_IND;
/*switch((dl_info->dci_ind->dci_list+i)->dci_type){
case FAPI_NR_DCI_TYPE_0_0:
case FAPI_NR_DCI_TYPE_0_1:
case FAPI_NR_DCI_TYPE_1_1:
case FAPI_NR_DCI_TYPE_2_0:
case FAPI_NR_DCI_TYPE_2_1:
case FAPI_NR_DCI_TYPE_2_2:
case FAPI_NR_DCI_TYPE_2_3:
AssertFatal(1==0, "Not yet support at this moment!\n");
break;
/*switch((dl_info->dci_ind->dci_list+i)->dci_type){
case FAPI_NR_DCI_TYPE_0_0:
case FAPI_NR_DCI_TYPE_0_1:
case FAPI_NR_DCI_TYPE_1_1:
case FAPI_NR_DCI_TYPE_2_0:
case FAPI_NR_DCI_TYPE_2_1:
case FAPI_NR_DCI_TYPE_2_2:
case FAPI_NR_DCI_TYPE_2_3:
AssertFatal(1==0, "Not yet support at this moment!\n");
break;
case FAPI_NR_DCI_TYPE_1_0:
case FAPI_NR_DCI_TYPE_1_0:
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
// mapping into DL_CONFIG_REQ for DL-SCH
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
// mapping into DL_CONFIG_REQ for DL-SCH
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = 0x0000; // TX RNTI: UE-spec
memcpy(dlsch_config_pdu, dci, sizeof(fapi_nr_dci_pdu_rel15_t));
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = 0x0000; // TX RNTI: UE-spec
memcpy(dlsch_config_pdu, dci, sizeof(fapi_nr_dci_pdu_rel15_t));
dl_config->number_pdus = dl_config->number_pdus + 1;
dl_config->number_pdus = dl_config->number_pdus + 1;
ret_mask |= (handle_dci(
dl_info->module_id,
dl_info->cc_id,
dl_info->gNB_index,
dci,
(dl_info->dci_ind->dci_list+i)->rnti,
(dl_info->dci_ind->dci_list+i)->dci_type)) << FAPI_NR_DCI_IND;
ret_mask |= (handle_dci(
dl_info->module_id,
dl_info->cc_id,
dl_info->gNB_index,
dci,
(dl_info->dci_ind->dci_list+i)->rnti,
(dl_info->dci_ind->dci_list+i)->dci_type)) << FAPI_NR_DCI_IND;
break;
break;
default:
break;
}*/
default:
break;
}*/
//(dl_info->dci_list+i)->rnti
//(dl_info->dci_list+i)->rnti
}
}
}
if(dl_info->rx_ind != NULL){
printf("[L2][IF MODULE][DL INDICATION][RX_IND]\n");
for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
switch(dl_info->rx_ind->rx_indication_body[i].pdu_type){
case FAPI_NR_RX_PDU_TYPE_MIB:
ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.additional_bits,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_length,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.cell_id )) << FAPI_NR_RX_PDU_TYPE_MIB;
break;
case FAPI_NR_RX_PDU_TYPE_SIB:
ret_mask |= (handle_bcch_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.sibs_mask,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu_length )) << FAPI_NR_RX_PDU_TYPE_SIB;
break;
case FAPI_NR_RX_PDU_TYPE_DLSCH:
// ret_mask |= (0) << FAPI_NR_RX_PDU_TYPE_DLSCH;
ret_mask |= (handle_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index, &dl_info->dci_ind,
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu_length)) << FAPI_NR_RX_PDU_TYPE_DLSCH;
if(dl_info->rx_ind != NULL){
printf("[L2][IF MODULE][DL INDICATION][RX_IND]\n");
for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
switch(dl_info->rx_ind->rx_indication_body[i].pdu_type){
case FAPI_NR_RX_PDU_TYPE_MIB:
ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.additional_bits,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_length,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.cell_id )) << FAPI_NR_RX_PDU_TYPE_MIB;
break;
case FAPI_NR_RX_PDU_TYPE_SIB:
ret_mask |= (handle_bcch_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.sibs_mask,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu_length )) << FAPI_NR_RX_PDU_TYPE_SIB;
break;
case FAPI_NR_RX_PDU_TYPE_DLSCH:
// ret_mask |= (0) << FAPI_NR_RX_PDU_TYPE_DLSCH;
ret_mask |= (handle_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index, dl_info->dci_ind,
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu_length)) << FAPI_NR_RX_PDU_TYPE_DLSCH;
break;
default:
break;
default:
break;
break;
}
}
}
}
}
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
return 0;
return 0;
}
nr_ue_if_module_t *nr_ue_if_module_init(uint32_t module_id){
if (nr_ue_if_module_inst[module_id] == NULL) {
nr_ue_if_module_inst[module_id] = (nr_ue_if_module_t *)malloc(sizeof(nr_ue_if_module_t));
memset((void*)nr_ue_if_module_inst[module_id],0,sizeof(nr_ue_if_module_t));
if (nr_ue_if_module_inst[module_id] == NULL) {
nr_ue_if_module_inst[module_id] = (nr_ue_if_module_t *)malloc(sizeof(nr_ue_if_module_t));
memset((void*)nr_ue_if_module_inst[module_id],0,sizeof(nr_ue_if_module_t));
nr_ue_if_module_inst[module_id]->cc_mask=0;
nr_ue_if_module_inst[module_id]->current_frame = 0;
nr_ue_if_module_inst[module_id]->current_slot = 0;
nr_ue_if_module_inst[module_id]->phy_config_request = NULL;
nr_ue_if_module_inst[module_id]->scheduled_response = NULL;
nr_ue_if_module_inst[module_id]->dl_indication = nr_ue_dl_indication;
nr_ue_if_module_inst[module_id]->ul_indication = nr_ue_ul_indication;
}
nr_ue_if_module_inst[module_id]->cc_mask=0;
nr_ue_if_module_inst[module_id]->current_frame = 0;
nr_ue_if_module_inst[module_id]->current_slot = 0;
nr_ue_if_module_inst[module_id]->phy_config_request = NULL;
nr_ue_if_module_inst[module_id]->scheduled_response = NULL;
nr_ue_if_module_inst[module_id]->dl_indication = nr_ue_dl_indication;
nr_ue_if_module_inst[module_id]->ul_indication = nr_ue_ul_indication;
}
return nr_ue_if_module_inst[module_id];
return nr_ue_if_module_inst[module_id];
}
int8_t nr_ue_if_module_kill(uint32_t module_id) {
int nr_ue_if_module_kill(uint32_t module_id) {
if (nr_ue_if_module_inst[module_id] != NULL){
free(nr_ue_if_module_inst[module_id]);
}
return 0;
if (nr_ue_if_module_inst[module_id] != NULL){
free(nr_ue_if_module_inst[module_id]);
}
return 0;
}
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h
+40 -21
View File
@@ -38,6 +38,21 @@
typedef struct {
/// module id
module_id_t module_id;
/// gNB index
uint32_t gNB_index;
/// component carrier id
int cc_id;
/// frame
frame_t frame;
/// slot
int slot;
fapi_nr_dl_config_request_t dl_config_req;
} nr_dcireq_t;
typedef struct {
/// module id
module_id_t module_id;
@@ -48,7 +63,7 @@ typedef struct {
/// frame
frame_t frame;
/// slot
uint8_t slot;
int slot;
/// NR UE FAPI-like P7 message, direction: L1 to L2
/// data reception indication structure
@@ -72,7 +87,7 @@ typedef struct {
/// slot
uint32_t slot;
/// ssb_index, if ssb is not present in current TTI, thie value set to -1
int8_t ssb_index;
int ssb_index;
} nr_uplink_indication_t;
// Downlink subframe P7
@@ -82,13 +97,13 @@ typedef struct {
/// module id
module_id_t module_id;
/// component carrier id
uint8_t CC_id;
int CC_id;
/// frame
frame_t frame;
/// subframe
sub_frame_t subframe;
/// slot
uint8_t slot;
int slot;
/// NR UE FAPI-like P7 message, direction: L2 to L1
/// downlink transmission configuration request structure
@@ -142,7 +157,7 @@ typedef int8_t (nr_ue_phy_config_request_f)(nr_phy_config_t *phy_config);
* -1: Failed to consume bytes. Abort the mission.
* Non-negative return values indicate success, and ignored.
*/
typedef int8_t (nr_ue_dl_indication_f)(nr_downlink_indication_t *dl_info);
typedef int (nr_ue_dl_indication_f)(nr_downlink_indication_t *dl_info);
/*
* Generic type of an application-defined callback to return various
@@ -151,19 +166,21 @@ typedef int8_t (nr_ue_dl_indication_f)(nr_downlink_indication_t *dl_info);
* -1: Failed to consume bytes. Abort the mission.
* Non-negative return values indicate success, and ignored.
*/
typedef int8_t (nr_ue_ul_indication_f)(nr_uplink_indication_t *ul_info);
typedef int (nr_ue_ul_indication_f)(nr_uplink_indication_t *ul_info);
typedef int (nr_ue_dcireq_f)(nr_dcireq_t *ul_info);
// TODO check this stuff can be reuse of need modification
typedef struct nr_ue_if_module_s {
nr_ue_scheduled_response_f *scheduled_response;
nr_ue_phy_config_request_f *phy_config_request;
nr_ue_dl_indication_f *dl_indication;
nr_ue_ul_indication_f *ul_indication;
uint32_t cc_mask;
uint32_t current_frame;
uint32_t current_slot;
//pthread_mutex_t nr_if_mutex;
nr_ue_scheduled_response_f *scheduled_response;
nr_ue_phy_config_request_f *phy_config_request;
nr_ue_dl_indication_f *dl_indication;
nr_ue_ul_indication_f *ul_indication;
//nr_ue_dcireq_f *dcireq;
uint32_t cc_mask;
uint32_t current_frame;
uint32_t current_slot;
//pthread_mutex_t nr_if_mutex;
} nr_ue_if_module_t;
@@ -174,14 +191,16 @@ nr_ue_if_module_t *nr_ue_if_module_init(uint32_t module_id);
/**\brief done free of memory allocation by module_id and release to pointer pool.
\param module_id module id*/
int8_t nr_ue_if_module_kill(uint32_t module_id);
int nr_ue_if_module_kill(uint32_t module_id);
/**\brief interface between L1/L2, indicating the downlink related information, like dci_ind and rx_req
\param dl_info including dci_ind and rx_request messages*/
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info);
int nr_ue_dl_indication(nr_downlink_indication_t *dl_info);
int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info);
int nr_ue_ul_indication(nr_uplink_indication_t *ul_info);
int nr_ue_dcireq(nr_dcireq_t *dcireq);
// TODO check
/**\brief handle BCCH-BCH message from dl_indication
@@ -190,15 +209,15 @@ int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info);
\param ssb_index SSB index within 0 - (L_ssb-1) corresponding to 38.331 ch.13 parameter i
\param ssb_length corresponding to L1 parameter L_ssb
\param cell_id cell id */
int8_t handle_bcch_bch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint8_t *pduP, uint8_t additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id);
int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id);
// TODO check
/**\brief handle BCCH-DL-SCH message from dl_indication
\param pdu_len length(bytes) of pdu
\param pduP pointer to pdu*/
int8_t handle_bcch_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len);
int handle_bcch_dlsch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len);
int8_t handle_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type);
int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type);
#endif
openair2/RRC/LTE/MESSAGES/asn1_msg.c
+1 -1
View File
@@ -39,7 +39,7 @@
#include <asn_application.h>
#include <asn_internal.h> /* for _ASN_DEFAULT_STACK_MAX */
#include <per_encoder.h>
//#include "COMMON/messages_types.h"
#include "assertions.h"
#include "RRCConnectionRequest.h"
#include "UL-CCCH-Message.h"
openair2/RRC/NR/MESSAGES/asn1_msg.c
-1
View File
@@ -42,7 +42,6 @@
#include "asn1_msg.h"
#include "RRC/NR/nr_rrc_extern.h"
#if defined(NR_Rel15)
#include "NR_SCS-SpecificCarrier.h"
#include "NR_TDD-UL-DL-ConfigCommon.h"
openair2/RRC/NR/nr_rrc_defs.h
+2 -2
View File
@@ -385,8 +385,8 @@ typedef struct {
int Ncp_UL; //cyclic prefix for UL
int p_gNB; //number of tx antenna port
int p_rx_gNB; //number of receiving antenna ports
uint32_t dl_CarrierFreq; //detected by the UE
uint32_t ul_CarrierFreq; //detected by the UE
uint64_t dl_CarrierFreq; //detected by the UE
uint64_t ul_CarrierFreq; //detected by the UE
//are the only static one (memory has been already allocated)
NR_BCCH_BCH_Message_t mib;
openair2/RRC/NR/rrc_gNB.c
+1 -1
View File
@@ -265,7 +265,7 @@ static void init_NR_SI(const protocol_ctxt_t* const ctxt_pP,
rrc_mac_config_req_gNB(ctxt_pP->module_id,
CC_id,
RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].p_gNB,
configuration->eutra_band[CC_id],
configuration->nr_band[CC_id],
RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].dl_CarrierFreq,
configuration->N_RB_DL[CC_id],
(NR_BCCH_BCH_Message_t *)&RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].mib,
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
+2 -2
View File
@@ -262,9 +262,9 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_DISABLE";
worker_config = "WORKER_ENABLE";
}
);
targets/RT/USER/gNB_usrp.gtkw
+6 -6
View File
@@ -24,9 +24,9 @@ variables.trx_tst[63:0]
functions.eNB_thread_rxtx0
@24
variables.frame_number_RX0_RU[63:0]
variables.subframe_number_RX0_RU[63:0]
variables.tti_number_RX0_RU[63:0]
variables.frame_number_TX0_RU[63:0]
variables.subframe_number_TX0_RU[63:0]
variables.tti_number_TX0_RU[63:0]
@28
functions.mac_schedule_dlsch
functions.macxface_eNB_dlsch_ulsch_scheduler
@@ -34,16 +34,16 @@ functions.macxface_ue_scheduler
functions.phy_eNB_ofdm_mod_l
@24
variables.frame_number_RX0_gNB[63:0]
variables.subframe_number_RX0_gNB[63:0]
variables.slot_number_RX0_gNB[63:0]
variables.frame_number_TX0_gNB[63:0]
variables.subframe_number_TX0_gNB[63:0]
variables.slot_number_TX0_gNB[63:0]
@28
functions.gNB_thread_rxtx0
@24
variables.frame_number_RX1_gNB[63:0]
variables.subframe_number_RX1_gNB[63:0]
variables.slot_number_RX1_gNB[63:0]
variables.frame_number_TX1_gNB[63:0]
variables.subframe_number_TX1_gNB[63:0]
variables.slot_number_TX1_gNB[63:0]
@28
functions.gNB_thread_rxtx1
functions.phy_procedures_ru_feprx0
targets/RT/USER/lte-enb.c
+7 -7
View File
@@ -453,13 +453,13 @@ void eNB_top(PHY_VARS_eNB *eNB, int frame_rx, int subframe_rx, char *string,RU_t
proc_rxtx->timestamp_tx = ru_proc->timestamp_rx + (sf_ahead*fp->samples_per_tti);
proc_rxtx->frame_rx = ru_proc->frame_rx;
proc_rxtx->subframe_rx = ru_proc->subframe_rx;
proc_rxtx->subframe_rx = ru_proc->tti_rx;
proc_rxtx->frame_tx = (proc_rxtx->subframe_rx > (9-sf_ahead)) ? (proc_rxtx->frame_rx+1)&1023 : proc_rxtx->frame_rx;
proc_rxtx->subframe_tx = (proc_rxtx->subframe_rx + sf_ahead)%10;
if (rxtx(eNB,proc_rxtx,string) < 0) LOG_E(PHY,"eNB %d CC_id %d failed during execution\n",eNB->Mod_id,eNB->CC_id);
ru_proc->timestamp_tx = proc_rxtx->timestamp_tx;
ru_proc->subframe_tx = proc_rxtx->subframe_tx;
ru_proc->tti_tx = proc_rxtx->subframe_tx;
ru_proc->frame_tx = proc_rxtx->frame_tx;
}
}
@@ -474,24 +474,24 @@ int wakeup_txfh(eNB_rxtx_proc_t *proc,RU_proc_t *ru_proc) {
if(wait_on_condition(&ru_proc->mutex_eNBs,&ru_proc->cond_eNBs,&ru_proc->ru_tx_ready,"wakeup_txfh")<0) {
LOG_E(PHY,"Frame %d, subframe %d: TX FH not ready\n", ru_proc->frame_tx, ru_proc->subframe_tx);
LOG_E(PHY,"Frame %d, subframe %d: TX FH not ready\n", ru_proc->frame_tx, ru_proc->tti_tx);
return(-1);
}
if (release_thread(&ru_proc->mutex_eNBs,&ru_proc->ru_tx_ready,"wakeup_txfh")<0) return(-1);
if (ru_proc->instance_cnt_eNBs == 0) {
LOG_E(PHY,"Frame %d, subframe %d: TX FH thread busy, dropping Frame %d, subframe %d\n", ru_proc->frame_tx, ru_proc->subframe_tx, proc->frame_rx, proc->subframe_rx);
LOG_E(PHY,"Frame %d, subframe %d: TX FH thread busy, dropping Frame %d, subframe %d\n", ru_proc->frame_tx, ru_proc->tti_tx, proc->frame_rx, proc->subframe_rx);
return(-1);
}
if (pthread_mutex_timedlock(&ru_proc->mutex_eNBs,&wait) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB TX1 thread %d (IC %d)\n", ru_proc->subframe_rx&1,ru_proc->instance_cnt_eNBs );
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB TX1 thread %d (IC %d)\n", ru_proc->tti_rx&1,ru_proc->instance_cnt_eNBs );
exit_fun( "error locking mutex_eNB" );
return(-1);
}
++ru_proc->instance_cnt_eNBs;
ru_proc->timestamp_tx = proc->timestamp_tx;
ru_proc->subframe_tx = proc->subframe_tx;
ru_proc->tti_tx = proc->subframe_tx;
ru_proc->frame_tx = proc->frame_tx;
// the thread can now be woken up
@@ -622,7 +622,7 @@ int wakeup_rxtx(PHY_VARS_eNB *eNB,RU_t *ru) {
// and proc->subframe_tx = proc->subframe_rx+sf_ahead
proc_rxtx0->timestamp_tx = ru_proc->timestamp_rx + (sf_ahead*fp->samples_per_tti);
proc_rxtx0->frame_rx = ru_proc->frame_rx;
proc_rxtx0->subframe_rx = ru_proc->subframe_rx;
proc_rxtx0->subframe_rx = ru_proc->tti_rx;
proc_rxtx0->frame_tx = (proc_rxtx0->subframe_rx > (9-sf_ahead)) ? (proc_rxtx0->frame_rx+1)&1023 : proc_rxtx0->frame_rx;
proc_rxtx0->subframe_tx = (proc_rxtx0->subframe_rx + sf_ahead)%10;
targets/RT/USER/lte-ru.c
+91 -91
View File
@@ -311,21 +311,21 @@ int connect_rau(RU_t *ru) {
// southbound IF5 fronthaul for 16-bit OAI format
static inline void fh_if5_south_out(RU_t *ru) {
if (ru == RC.ru[0]) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx&0xffffffff );
send_IF5(ru, ru->proc.timestamp_tx, ru->proc.subframe_tx, &ru->seqno, IF5_RRH_GW_DL);
send_IF5(ru, ru->proc.timestamp_tx, ru->proc.tti_tx, &ru->seqno, IF5_RRH_GW_DL);
}
// southbound IF5 fronthaul for Mobipass packet format
static inline void fh_if5_mobipass_south_out(RU_t *ru) {
if (ru == RC.ru[0]) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx&0xffffffff );
send_IF5(ru, ru->proc.timestamp_tx, ru->proc.subframe_tx, &ru->seqno, IF5_MOBIPASS);
send_IF5(ru, ru->proc.timestamp_tx, ru->proc.tti_tx, &ru->seqno, IF5_MOBIPASS);
}
// southbound IF4p5 fronthaul
static inline void fh_if4p5_south_out(RU_t *ru) {
if (ru == RC.ru[0]) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx&0xffffffff );
LOG_D(PHY,"Sending IF4p5 for frame %d subframe %d\n",ru->proc.frame_tx,ru->proc.subframe_tx);
if (subframe_select(ru->frame_parms,ru->proc.subframe_tx)!=SF_UL)
send_IF4p5(ru,ru->proc.frame_tx, ru->proc.subframe_tx, IF4p5_PDLFFT);
LOG_D(PHY,"Sending IF4p5 for frame %d subframe %d\n",ru->proc.frame_tx,ru->proc.tti_tx);
if (subframe_select(ru->frame_parms,ru->proc.tti_tx)!=SF_UL)
send_IF4p5(ru,ru->proc.frame_tx, ru->proc.tti_tx, IF4p5_PDLFFT);
}
/*************************************************************/
@@ -340,11 +340,11 @@ void fh_if5_south_in(RU_t *ru,int *frame, int *subframe) {
recv_IF5(ru, &proc->timestamp_rx, *subframe, IF5_RRH_GW_UL);
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_tti*10))&1023;
proc->subframe_rx = (proc->timestamp_rx / fp->samples_per_tti)%10;
proc->tti_rx = (proc->timestamp_rx / fp->samples_per_tti)%10;
if (proc->first_rx == 0) {
if (proc->subframe_rx != *subframe){
LOG_E(PHY,"Received Timestamp doesn't correspond to the time we think it is (proc->subframe_rx %d, subframe %d)\n",proc->subframe_rx,*subframe);
if (proc->tti_rx != *subframe){
LOG_E(PHY,"Received Timestamp doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",proc->tti_rx,*subframe);
exit_fun("Exiting");
}
@@ -355,7 +355,7 @@ void fh_if5_south_in(RU_t *ru,int *frame, int *subframe) {
} else {
proc->first_rx = 0;
*frame = proc->frame_rx;
*subframe = proc->subframe_rx;
*subframe = proc->tti_rx;
}
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
@@ -396,16 +396,16 @@ void fh_if4p5_south_in(RU_t *ru,int *frame,int *subframe) {
} while(proc->symbol_mask[*subframe] != symbol_mask_full);
//caculate timestamp_rx, timestamp_tx based on frame and subframe
proc->subframe_rx = sf;
proc->tti_rx = sf;
proc->frame_rx = f;
proc->timestamp_rx = ((proc->frame_rx * 10) + proc->subframe_rx ) * fp->samples_per_tti ;
proc->timestamp_rx = ((proc->frame_rx * 10) + proc->tti_rx ) * fp->samples_per_tti ;
// proc->timestamp_tx = proc->timestamp_rx + (4*fp->samples_per_tti);
proc->subframe_tx = (sf+sf_ahead)%10;
proc->tti_tx = (sf+sf_ahead)%10;
proc->frame_tx = (sf>(9-sf_ahead)) ? (f+1)&1023 : f;
if (proc->first_rx == 0) {
if (proc->subframe_rx != *subframe){
LOG_E(PHY,"Received Timestamp (IF4p5) doesn't correspond to the time we think it is (proc->subframe_rx %d, subframe %d)\n",proc->subframe_rx,*subframe);
if (proc->tti_rx != *subframe){
LOG_E(PHY,"Received Timestamp (IF4p5) doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",proc->tti_rx,*subframe);
exit_fun("Exiting");
}
if (proc->frame_rx != *frame) {
@@ -415,14 +415,14 @@ void fh_if4p5_south_in(RU_t *ru,int *frame,int *subframe) {
} else {
proc->first_rx = 0;
*frame = proc->frame_rx;
*subframe = proc->subframe_rx;
*subframe = proc->tti_rx;
}
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU, f );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, sf );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, sf );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, proc->frame_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, proc->subframe_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, proc->tti_tx );
}
proc->symbol_mask[sf] = 0;
@@ -455,22 +455,22 @@ void fh_if5_south_asynch_in_mobipass(RU_t *ru,int *frame,int *subframe) {
pthread_mutex_lock(&proc->mutex_asynch_rxtx);
int offset_mobipass = 40120;
pthread_mutex_lock(&proc->mutex_asynch_rxtx);
proc->subframe_rx = ((proc->timestamp_rx-offset_mobipass)/fp->samples_per_tti)%10;
proc->tti_rx = ((proc->timestamp_rx-offset_mobipass)/fp->samples_per_tti)%10;
proc->frame_rx = ((proc->timestamp_rx-offset_mobipass)/(fp->samples_per_tti*10))&1023;
proc->subframe_rx = (proc->timestamp_rx/fp->samples_per_tti)%10;
proc->tti_rx = (proc->timestamp_rx/fp->samples_per_tti)%10;
proc->frame_rx = (proc->timestamp_rx/(10*fp->samples_per_tti))&1023;
if (proc->first_rx == 1) {
proc->first_rx =2;
*subframe = proc->subframe_rx;
*subframe = proc->tti_rx;
*frame = proc->frame_rx;
LOG_E(PHY,"[Mobipass]timestamp_rx:%llu, frame_rx %d, subframe: %d\n",(unsigned long long int)proc->timestamp_rx,proc->frame_rx,proc->subframe_rx);
LOG_E(PHY,"[Mobipass]timestamp_rx:%llu, frame_rx %d, subframe: %d\n",(unsigned long long int)proc->timestamp_rx,proc->frame_rx,proc->tti_rx);
}
else {
if (proc->subframe_rx != *subframe) {
if (proc->tti_rx != *subframe) {
proc->first_rx++;
LOG_E(PHY,"[Mobipass]timestamp:%llu, subframe_rx %d is not what we expect %d, first_rx:%d\n",(unsigned long long int)proc->timestamp_rx, proc->subframe_rx,*subframe, proc->first_rx);
LOG_E(PHY,"[Mobipass]timestamp:%llu, tti_rx %d is not what we expect %d, first_rx:%d\n",(unsigned long long int)proc->timestamp_rx, proc->tti_rx,*subframe, proc->first_rx);
//exit_fun("Exiting");
}
if (proc->frame_rx != *frame) {
@@ -479,7 +479,7 @@ void fh_if5_south_asynch_in_mobipass(RU_t *ru,int *frame,int *subframe) {
// exit_fun("Exiting");
}
// temporary solution
*subframe = proc->subframe_rx;
*subframe = proc->tti_rx;
*frame = proc->frame_rx;
}
@@ -503,15 +503,15 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *subframe) {
prach_rx = 0;
do { // Blocking, we need a timeout on this !!!!!!!!!!!!!!!!!!!!!!!
recv_IF4p5(ru, &proc->frame_rx, &proc->subframe_rx, &packet_type, &symbol_number);
recv_IF4p5(ru, &proc->frame_rx, &proc->tti_rx, &packet_type, &symbol_number);
// grab first prach information for this new subframe
if (got_prach_info==0) {
prach_rx = is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx);
prach_rx = is_prach_subframe(fp, proc->frame_rx, proc->tti_rx);
got_prach_info = 1;
}
if (proc->first_rx != 0) {
*frame = proc->frame_rx;
*subframe = proc->subframe_rx;
*subframe = proc->tti_rx;
proc->first_rx = 0;
}
else {
@@ -519,8 +519,8 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *subframe) {
LOG_E(PHY,"frame_rx %d is not what we expect %d\n",proc->frame_rx,*frame);
exit_fun("Exiting");
}
if (proc->subframe_rx != *subframe) {
LOG_E(PHY,"subframe_rx %d is not what we expect %d\n",proc->subframe_rx,*subframe);
if (proc->tti_rx != *subframe) {
LOG_E(PHY,"tti_rx %d is not what we expect %d\n",proc->tti_rx,*subframe);
exit_fun("Exiting");
}
}
@@ -564,7 +564,7 @@ void fh_if4p5_north_in(RU_t *ru,int *frame,int *subframe) {
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, *frame );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, *subframe );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, *subframe );
}
}
@@ -572,23 +572,23 @@ void fh_if5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
LTE_DL_FRAME_PARMS *fp = ru->frame_parms;
RU_proc_t *proc = &ru->proc;
int subframe_tx,frame_tx;
int tti_tx,frame_tx;
openair0_timestamp timestamp_tx;
recv_IF5(ru, &timestamp_tx, *subframe, IF5_RRH_GW_DL);
// printf("Received subframe %d (TS %llu) from RCC\n",subframe_tx,timestamp_tx);
// printf("Received subframe %d (TS %llu) from RCC\n",tti_tx,timestamp_tx);
subframe_tx = (timestamp_tx/fp->samples_per_tti)%10;
tti_tx = (timestamp_tx/fp->samples_per_tti)%10;
frame_tx = (timestamp_tx/(fp->samples_per_tti*10))&1023;
if (proc->first_tx != 0) {
*subframe = subframe_tx;
*subframe = tti_tx;
*frame = frame_tx;
proc->first_tx = 0;
}
else {
AssertFatal(subframe_tx == *subframe,
"subframe_tx %d is not what we expect %d\n",subframe_tx,*subframe);
AssertFatal(tti_tx == *subframe,
"tti_tx %d is not what we expect %d\n",tti_tx,*subframe);
AssertFatal(frame_tx == *frame,
"frame_tx %d is not what we expect %d\n",frame_tx,*frame);
}
@@ -601,28 +601,28 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
uint16_t packet_type;
uint32_t symbol_number,symbol_mask,symbol_mask_full;
int subframe_tx,frame_tx;
int tti_tx,frame_tx;
LOG_D(PHY, "%s(ru:%p frame, subframe)\n", __FUNCTION__, ru);
symbol_number = 0;
symbol_mask = 0;
symbol_mask_full = ((subframe_select(fp,*subframe) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_tti))-1;
do {
recv_IF4p5(ru, &frame_tx, &subframe_tx, &packet_type, &symbol_number);
if ((subframe_select(fp,subframe_tx) == SF_DL) && (symbol_number == 0)) start_meas(&ru->rx_fhaul);
recv_IF4p5(ru, &frame_tx, &tti_tx, &packet_type, &symbol_number);
if ((subframe_select(fp,tti_tx) == SF_DL) && (symbol_number == 0)) start_meas(&ru->rx_fhaul);
LOG_D(PHY,"subframe %d (%d): frame %d, subframe %d, symbol %d\n",
*subframe,subframe_select(fp,*subframe),frame_tx,subframe_tx,symbol_number);
*subframe,subframe_select(fp,*subframe),frame_tx,tti_tx,symbol_number);
if (proc->first_tx != 0) {
*frame = frame_tx;
*subframe = subframe_tx;
*subframe = tti_tx;
proc->first_tx = 0;
symbol_mask_full = ((subframe_select(fp,*subframe) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_tti))-1;
}
else {
AssertFatal(frame_tx == *frame,
"frame_tx %d is not what we expect %d\n",frame_tx,*frame);
AssertFatal(subframe_tx == *subframe,
"subframe_tx %d is not what we expect %d\n",subframe_tx,*subframe);
AssertFatal(tti_tx == *subframe,
"tti_tx %d is not what we expect %d\n",tti_tx,*subframe);
}
if (packet_type == IF4p5_PDLFFT) {
symbol_mask = symbol_mask | (1<<symbol_number);
@@ -630,20 +630,20 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
else AssertFatal(1==0,"Illegal IF4p5 packet type (should only be IF4p5_PDLFFT%d\n",packet_type);
} while (symbol_mask != symbol_mask_full);
if (subframe_select(fp,subframe_tx) == SF_DL) stop_meas(&ru->rx_fhaul);
if (subframe_select(fp,tti_tx) == SF_DL) stop_meas(&ru->rx_fhaul);
proc->subframe_tx = subframe_tx;
proc->tti_tx = tti_tx;
proc->frame_tx = frame_tx;
if ((frame_tx == 0)&&(subframe_tx == 0)) proc->frame_tx_unwrap += 1024;
if ((frame_tx == 0)&&(tti_tx == 0)) proc->frame_tx_unwrap += 1024;
proc->timestamp_tx = ((((uint64_t)frame_tx + (uint64_t)proc->frame_tx_unwrap) * 10) + (uint64_t)subframe_tx) * (uint64_t)fp->samples_per_tti;
proc->timestamp_tx = ((((uint64_t)frame_tx + (uint64_t)proc->frame_tx_unwrap) * 10) + (uint64_t)tti_tx) * (uint64_t)fp->samples_per_tti;
LOG_D(PHY,"RU %d/%d TST %llu, frame %d, subframe %d\n",ru->idx,0,(long long unsigned int)proc->timestamp_tx,frame_tx,subframe_tx);
LOG_D(PHY,"RU %d/%d TST %llu, frame %d, subframe %d\n",ru->idx,0,(long long unsigned int)proc->timestamp_tx,frame_tx,tti_tx);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, subframe_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, tti_tx );
}
if (ru->feptx_ofdm) ru->feptx_ofdm(ru);
@@ -657,7 +657,7 @@ void fh_if5_north_out(RU_t *ru) {
/// **** send_IF5 of rxdata to BBU **** ///
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_SEND_IF5, 1 );
send_IF5(ru, proc->timestamp_rx, proc->subframe_rx, &seqno, IF5_RRH_GW_UL);
send_IF5(ru, proc->timestamp_rx, proc->tti_rx, &seqno, IF5_RRH_GW_UL);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_SEND_IF5, 0 );
}
@@ -667,17 +667,17 @@ void fh_if4p5_north_out(RU_t *ru) {
RU_proc_t *proc=&ru->proc;
LTE_DL_FRAME_PARMS *fp = ru->frame_parms;
const int subframe = proc->subframe_rx;
if (ru->idx==0) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, proc->subframe_rx );
const int subframe = proc->tti_rx;
if (ru->idx==0) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, proc->tti_rx );
if ((fp->frame_type == TDD) && (subframe_select(fp,subframe)!=SF_UL)) {
/// **** in TDD during DL send_IF4 of ULTICK to RCC **** ///
send_IF4p5(ru, proc->frame_rx, proc->subframe_rx, IF4p5_PULTICK);
send_IF4p5(ru, proc->frame_rx, proc->tti_rx, IF4p5_PULTICK);
return;
}
start_meas(&ru->tx_fhaul);
send_IF4p5(ru, proc->frame_rx, proc->subframe_rx, IF4p5_PULFFT);
send_IF4p5(ru, proc->frame_rx, proc->tti_rx, IF4p5_PULFFT);
stop_meas(&ru->tx_fhaul);
}
@@ -780,38 +780,38 @@ void rx_rf(RU_t *ru,int *frame,int *subframe) {
}
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_tti*10))&1023;
proc->subframe_rx = (proc->timestamp_rx / fp->samples_per_tti)%10;
proc->tti_rx = (proc->timestamp_rx / fp->samples_per_tti)%10;
// synchronize first reception to frame 0 subframe 0
#ifdef PHY_TX_THREAD
proc->timestamp_phy_tx = proc->timestamp_rx+((sf_ahead-1)*fp->samples_per_tti);
proc->subframe_phy_tx = (proc->subframe_rx+(sf_ahead-1))%10;
proc->frame_phy_tx = (proc->subframe_rx>(9-(sf_ahead-1))) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
proc->subframe_phy_tx = (proc->tti_rx+(sf_ahead-1))%10;
proc->frame_phy_tx = (proc->tti_rx>(9-(sf_ahead-1))) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
#else
proc->timestamp_tx = proc->timestamp_rx+(sf_ahead*fp->samples_per_tti);
proc->subframe_tx = (proc->subframe_rx+sf_ahead)%10;
proc->frame_tx = (proc->subframe_rx>(9-sf_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
proc->tti_tx = (proc->tti_rx+sf_ahead)%10;
proc->frame_tx = (proc->tti_rx>(9-sf_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
#endif
//proc->timestamp_tx = proc->timestamp_rx+(sf_ahead*fp->samples_per_tti);
//proc->subframe_tx = (proc->subframe_rx+sf_ahead)%10;
//proc->frame_tx = (proc->subframe_rx>(9-sf_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
//proc->subframe_tx = (proc->tti_rx+sf_ahead)%10;
//proc->frame_tx = (proc->tti_rx>(9-sf_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
LOG_D(PHY,"RU %d/%d TS %llu (off %d), frame %d, subframe %d\n",
ru->idx,
0,
(unsigned long long int)proc->timestamp_rx,
(int)ru->ts_offset,proc->frame_rx,proc->subframe_rx);
(int)ru->ts_offset,proc->frame_rx,proc->tti_rx);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU, proc->frame_rx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, proc->subframe_rx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, proc->tti_rx );
}
if (proc->first_rx == 0) {
if (proc->subframe_rx != *subframe){
LOG_E(PHY,"Received Timestamp (%llu) doesn't correspond to the time we think it is (proc->subframe_rx %d, subframe %d)\n",(long long unsigned int)proc->timestamp_rx,proc->subframe_rx,*subframe);
if (proc->tti_rx != *subframe){
LOG_E(PHY,"Received Timestamp (%llu) doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",(long long unsigned int)proc->timestamp_rx,proc->tti_rx,*subframe);
exit_fun("Exiting");
}
@@ -822,10 +822,10 @@ void rx_rf(RU_t *ru,int *frame,int *subframe) {
} else {
proc->first_rx = 0;
*frame = proc->frame_rx;
*subframe = proc->subframe_rx;
*subframe = proc->tti_rx;
}
//printf("timestamp_rx %lu, frame %d(%d), subframe %d(%d)\n",ru->timestamp_rx,proc->frame_rx,frame,proc->subframe_rx,subframe);
//printf("timestamp_rx %lu, frame %d(%d), subframe %d(%d)\n",ru->timestamp_rx,proc->frame_rx,frame,proc->tti_rx,subframe);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
@@ -849,12 +849,12 @@ void tx_rf(RU_t *ru) {
unsigned int txs;
int i;
T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(proc->frame_tx), T_INT(proc->subframe_tx),
T_INT(0), T_BUFFER(&ru->common.txdata[0][proc->subframe_tx * fp->samples_per_tti], fp->samples_per_tti * 4));
T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(proc->frame_tx), T_INT(proc->tti_tx),
T_INT(0), T_BUFFER(&ru->common.txdata[0][proc->tti_tx * fp->samples_per_tti], fp->samples_per_tti * 4));
lte_subframe_t SF_type = subframe_select(fp,proc->subframe_tx%10);
lte_subframe_t prevSF_type = subframe_select(fp,(proc->subframe_tx+9)%10);
lte_subframe_t nextSF_type = subframe_select(fp,(proc->subframe_tx+1)%10);
lte_subframe_t SF_type = subframe_select(fp,proc->tti_tx%10);
lte_subframe_t prevSF_type = subframe_select(fp,(proc->tti_tx+9)%10);
lte_subframe_t nextSF_type = subframe_select(fp,(proc->tti_tx+1)%10);
int sf_extension = 0;
if ((SF_type == SF_DL) ||
@@ -892,7 +892,7 @@ void tx_rf(RU_t *ru) {
#endif
for (i=0; i<ru->nb_tx; i++)
txp[i] = (void*)&ru->common.txdata[i][(proc->subframe_tx*fp->samples_per_tti)-sf_extension];
txp[i] = (void*)&ru->common.txdata[i][(proc->tti_tx*fp->samples_per_tti)-sf_extension];
/* add fail safe for late command */
if(late_control!=STATE_BURST_NORMAL){//stop burst
@@ -926,7 +926,7 @@ void tx_rf(RU_t *ru) {
/* add fail safe for late command end */
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, proc->frame_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, proc->subframe_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, proc->tti_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (proc->timestamp_tx-ru->openair0_cfg.tx_sample_advance)&0xffffffff );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 1 );
@@ -940,7 +940,7 @@ void tx_rf(RU_t *ru) {
flags);
LOG_D(PHY,"[TXPATH] RU %d tx_rf, writing to TS %llu, frame %d, unwrapped_frame %d, subframe %d\n",ru->idx,
(long long unsigned int)proc->timestamp_tx,proc->frame_tx,proc->frame_tx_unwrap,proc->subframe_tx);
(long long unsigned int)proc->timestamp_tx,proc->frame_tx,proc->frame_tx_unwrap,proc->tti_tx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 );
@@ -1033,7 +1033,7 @@ void wakeup_slaves(RU_proc_t *proc) {
int cnt_slave = ++slave_proc->instance_cnt_FH;
slave_proc->frame_rx = proc->frame_rx;
slave_proc->subframe_rx = proc->subframe_rx;
slave_proc->tti_rx = proc->tti_rx;
slave_proc->timestamp_rx = proc->timestamp_rx;
slave_proc->timestamp_tx = proc->timestamp_tx;
@@ -1263,7 +1263,7 @@ void wakeup_eNBs(RU_t *ru) {
char string[20];
sprintf(string,"Incoming RU %d",ru->idx);
LOG_D(PHY,"RU %d Call eNB_top\n",ru->idx);
ru->eNB_top(eNB_list[0],ru->proc.frame_rx,ru->proc.subframe_rx,string,ru);
ru->eNB_top(eNB_list[0],ru->proc.frame_rx,ru->proc.tti_rx,string,ru);
ru->proc.emulate_rf_busy = 0;
}
else {
@@ -1276,7 +1276,7 @@ void wakeup_eNBs(RU_t *ru) {
eNB_list[i]->proc.ru_proc = &ru->proc;
if (ru->wakeup_rxtx!=0 && ru->wakeup_rxtx(eNB_list[i],ru) < 0)
{
LOG_E(PHY,"could not wakeup eNB rxtx process for subframe %d\n", ru->proc.subframe_rx);
LOG_E(PHY,"could not wakeup eNB rxtx process for subframe %d\n", ru->proc.tti_rx);
}
ru->proc.emulate_rf_busy = 0;
}
@@ -1298,12 +1298,12 @@ static inline int wakeup_prach_ru(RU_t *ru) {
if (ru->proc.instance_cnt_prach==-1) {
++ru->proc.instance_cnt_prach;
ru->proc.frame_prach = ru->proc.frame_rx;
ru->proc.subframe_prach = ru->proc.subframe_rx;
ru->proc.subframe_prach = ru->proc.tti_rx;
// DJP - think prach_procedures() is looking at eNB frame_prach
if (ru->eNB_list[0]) {
ru->eNB_list[0]->proc.frame_prach = ru->proc.frame_rx;
ru->eNB_list[0]->proc.subframe_prach = ru->proc.subframe_rx;
ru->eNB_list[0]->proc.subframe_prach = ru->proc.tti_rx;
}
LOG_D(PHY,"RU %d: waking up PRACH thread\n",ru->idx);
// the thread can now be woken up
@@ -1331,7 +1331,7 @@ static inline int wakeup_prach_ru_br(RU_t *ru) {
if (ru->proc.instance_cnt_prach_br==-1) {
++ru->proc.instance_cnt_prach_br;
ru->proc.frame_prach_br = ru->proc.frame_rx;
ru->proc.subframe_prach_br = ru->proc.subframe_rx;
ru->proc.subframe_prach_br = ru->proc.tti_rx;
LOG_D(PHY,"RU %d: waking up PRACH thread\n",ru->idx);
// the thread can now be woken up
@@ -1571,10 +1571,10 @@ static void* ru_thread_tx( void* param ) {
else {
for (int i=0; i<ru->nb_tx; i++) {
if(proc->frame_tx == 2) {
sprintf(filename,"txdataF%d_frame%d_sf%d.m",i,proc->frame_tx,proc->subframe_tx);
sprintf(filename,"txdataF%d_frame%d_sf%d.m",i,proc->frame_tx,proc->tti_tx);
LOG_M(filename,"txdataF_frame",ru->common.txdataF_BF[i],fp->symbols_per_tti*fp->ofdm_symbol_size, 1, 1);
}
if(proc->frame_tx == 2 && proc->subframe_tx==0){
if(proc->frame_tx == 2 && proc->tti_tx==0){
sprintf(filename,"txdata%d_frame%d.m",i,proc->frame_tx);
LOG_M(filename,"txdata_frame",ru->common.txdata[i],fp->samples_per_tti*10, 1, 1);
}
@@ -1748,13 +1748,13 @@ static void* ru_thread( void* param ) {
LOG_D(PHY,"RU thread (do_prach %d, is_prach_subframe %d), received frame %d, subframe %d\n",
ru->do_prach,
is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx),
proc->frame_rx,proc->subframe_rx);
if ((ru->do_prach>0) && (is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx)==1)) {
is_prach_subframe(fp, proc->frame_rx, proc->tti_rx),
proc->frame_rx,proc->tti_rx);
if ((ru->do_prach>0) && (is_prach_subframe(fp, proc->frame_rx, proc->tti_rx)==1)) {
wakeup_prach_ru(ru);
}
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
else if ((ru->do_prach>0) && (is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx)>1)) {
else if ((ru->do_prach>0) && (is_prach_subframe(fp, proc->frame_rx, proc->tti_rx)>1)) {
wakeup_prach_ru_br(ru);
}
#endif
@@ -1817,10 +1817,10 @@ static void* ru_thread( void* param ) {
else {
for (int i=0; i<ru->nb_tx; i++) {
if(proc->frame_tx == 2) {
sprintf(filename,"txdataF%d_frame%d_sf%d.m",i,proc->frame_tx,proc->subframe_tx);
sprintf(filename,"txdataF%d_frame%d_sf%d.m",i,proc->frame_tx,proc->tti_tx);
LOG_M(filename,"txdataF_frame",ru->common.txdataF_BF[i],fp->symbols_per_tti*fp->ofdm_symbol_size, 1, 1);
}
if(proc->frame_tx == 2 && proc->subframe_tx==0){
if(proc->frame_tx == 2 && proc->tti_tx==0){
sprintf(filename,"txdata%d_frame%d.m",i,proc->frame_tx);
LOG_M(filename,"txdata_frame",ru->common.txdata[i],fp->samples_per_tti*10, 1, 1);
}
@@ -2018,7 +2018,7 @@ static void* eNB_thread_phy_tx( void* param ) {
LOG_D(PHY,"Running eNB phy tx procedures\n");
if(ru->num_eNB == 1){
proc_rxtx.subframe_tx = proc->subframe_phy_tx;
proc_rxtx.tti_tx = proc->subframe_phy_tx;
proc_rxtx.frame_tx = proc->frame_phy_tx;
phy_procedures_eNB_TX(eNB_list[0], &proc_rxtx, 1);
phy_tx_txdataF_end = 1;
@@ -2029,7 +2029,7 @@ static void* eNB_thread_phy_tx( void* param ) {
if (ru->proc.instance_cnt_rf_tx==-1) {
++ru->proc.instance_cnt_rf_tx;
ru->proc.frame_tx = proc->frame_phy_tx;
ru->proc.subframe_tx = proc->subframe_phy_tx;
ru->proc.tti_tx = proc->subframe_phy_tx;
ru->proc.timestamp_tx = proc->timestamp_phy_tx;
// the thread can now be woken up
targets/RT/USER/nr-gnb.c
+43 -67
View File
@@ -118,8 +118,8 @@ extern openair0_config_t openair0_cfg[MAX_CARDS];
extern int transmission_mode;
uint16_t sl_ahead=4;
uint16_t sf_ahead=4;
//pthread_t main_gNB_thread;
time_stats_t softmodem_stats_mt; // main thread
@@ -168,14 +168,14 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc, char *thread_
// I am a PNF and I need to let nFAPI know that we have a (sub)frame tick
uint16_t frame = proc->frame_rx;
uint16_t subframe = proc->subframe_rx;
uint16_t slot = proc->slot_rx;
//add_subframe(&frame, &subframe, 4);
//oai_subframe_ind(proc->frame_tx, proc->subframe_tx);
//LOG_D(PHY, "oai_subframe_ind(frame:%u, subframe:%d) - NOT CALLED ********\n", frame, subframe);
start_meas(&nfapi_meas);
oai_subframe_ind(frame, subframe);
oai_subframe_ind(frame, slot);
stop_meas(&nfapi_meas);
if (gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus||
@@ -190,8 +190,8 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc, char *thread_
NFAPI_SFNSF2DEC(gNB->UL_INFO.crc_ind.sfn_sf), gNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs,
NFAPI_SFNSF2DEC(gNB->UL_INFO.rach_ind.sfn_sf), gNB->UL_INFO.rach_ind.rach_indication_body.number_of_preambles,
gNB->UL_INFO.cqi_ind.number_of_cqis,
proc->frame_rx, proc->subframe_rx,
proc->frame_tx, proc->subframe_tx);
proc->frame_rx, proc->slot_rx,
proc->frame_tx, proc->slot_tx);
}
}
@@ -200,11 +200,11 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc, char *thread_
// ****************************************
// Common RX procedures subframe n
T(T_GNB_PHY_DL_TICK, T_INT(gNB->Mod_id), T_INT(proc->frame_tx), T_INT(proc->subframe_tx));
T(T_GNB_PHY_DL_TICK, T_INT(gNB->Mod_id), T_INT(proc->frame_tx), T_INT(proc->slot_tx));
/*
// if this is IF5 or 3GPP_gNB
if (gNB && gNB->RU_list && gNB->RU_list[0] && gNB->RU_list[0]->function < NGFI_RAU_IF4p5) {
wakeup_prach_gNB(gNB,NULL,proc->frame_rx,proc->subframe_rx);
wakeup_prach_gNB(gNB,NULL,proc->frame_rx,proc->slot_rx);
}
// UE-specific RX processing for subframe n
@@ -215,7 +215,7 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc, char *thread_
pthread_mutex_lock(&gNB->UL_INFO_mutex);
gNB->UL_INFO.frame = proc->frame_rx;
gNB->UL_INFO.subframe = proc->subframe_rx;
gNB->UL_INFO.slot = proc->slot_rx;
gNB->UL_INFO.module_id = gNB->Mod_id;
gNB->UL_INFO.CC_id = gNB->CC_id;
@@ -225,7 +225,7 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc, char *thread_
/// end
// *****************************************
// TX processing for subframe n+sf_ahead
// TX processing for subframe n+sl_ahead
// run PHY TX procedures the one after the other for all CCs to avoid race conditions
// (may be relaxed in the future for performance reasons)
// *****************************************
@@ -238,7 +238,7 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc, char *thread_
stop_meas( &softmodem_stats_rxtx_sf );
LOG_D(PHY,"%s() Exit proc[rx:%d%d tx:%d%d]\n", __FUNCTION__, proc->frame_rx, proc->subframe_rx, proc->frame_tx, proc->subframe_tx);
LOG_D(PHY,"%s() Exit proc[rx:%d%d tx:%d%d]\n", __FUNCTION__, proc->frame_rx, proc->slot_rx, proc->frame_tx, proc->slot_tx);
#if 0
LOG_D(PHY, "rxtx:%lld nfapi:%lld phy:%lld tx:%lld rx:%lld prach:%lld ofdm:%lld ",
@@ -311,8 +311,8 @@ static void* gNB_L1_thread_tx(void* param) {
// (may be relaxed in the future for performance reasons)
// *****************************************
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX1_GNB,proc->subframe_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX1_GNB,proc->subframe_rx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX1_GNB,proc->slot_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX1_GNB,proc->slot_rx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX1_GNB,proc->frame_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX1_GNB,proc->frame_rx);
@@ -364,8 +364,8 @@ static void* gNB_L1_thread( void* param ) {
if (wait_on_condition(&proc->mutex,&proc->cond,&proc->instance_cnt,thread_name)<0) break;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PROC_RXTX0, 1 );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_GNB,proc->subframe_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_GNB,proc->subframe_rx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX0_GNB,proc->slot_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX0_GNB,proc->slot_rx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_GNB,proc->frame_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_GNB,proc->frame_rx);
@@ -420,7 +420,7 @@ static void wait_system_ready (char *message, volatile int *start_flag) {
void gNB_top(PHY_VARS_gNB *gNB, int frame_rx, int subframe_rx, char *string, struct RU_t_s *ru)
void gNB_top(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, char *string, struct RU_t_s *ru)
{
gNB_L1_proc_t *proc = &gNB->proc;
gNB_L1_rxtx_proc_t *L1_proc = &proc->L1_proc;
@@ -428,20 +428,20 @@ void gNB_top(PHY_VARS_gNB *gNB, int frame_rx, int subframe_rx, char *string, str
RU_proc_t *ru_proc=&ru->proc;
proc->frame_rx = frame_rx;
proc->subframe_rx = subframe_rx;
proc->slot_rx = slot_rx;
if (!oai_exit) {
T(T_ENB_MASTER_TICK, T_INT(0), T_INT(proc->frame_rx), T_INT(proc->subframe_rx));
T(T_ENB_MASTER_TICK, T_INT(0), T_INT(proc->frame_rx), T_INT(proc->slot_rx));
L1_proc->timestamp_tx = ru_proc->timestamp_rx + (sf_ahead*fp->samples_per_subframe);
L1_proc->timestamp_tx = ru_proc->timestamp_rx + (sl_ahead*fp->samples_per_slot);
L1_proc->frame_rx = ru_proc->frame_rx;
L1_proc->subframe_rx = ru_proc->subframe_rx;
L1_proc->frame_tx = (L1_proc->subframe_rx > (9-sf_ahead)) ? (L1_proc->frame_rx+1)&1023 : L1_proc->frame_rx;
L1_proc->subframe_tx = (L1_proc->subframe_rx + sf_ahead)%10;
L1_proc->slot_rx = ru_proc->tti_rx;
L1_proc->frame_tx = (L1_proc->slot_rx > (fp->slots_per_frame-1-sl_ahead)) ? (L1_proc->frame_rx+1)&1023 : L1_proc->frame_rx;
L1_proc->slot_tx = (L1_proc->slot_rx + sl_ahead)%fp->slots_per_frame;
if (rxtx(gNB,L1_proc,string) < 0) LOG_E(PHY,"gNB %d CC_id %d failed during execution\n",gNB->Mod_id,gNB->CC_id);
ru_proc->timestamp_tx = L1_proc->timestamp_tx;
ru_proc->subframe_tx = L1_proc->subframe_tx;
ru_proc->tti_tx = L1_proc->slot_tx;
ru_proc->frame_tx = L1_proc->frame_tx;
}
}
@@ -455,10 +455,10 @@ int wakeup_txfh(gNB_L1_rxtx_proc_t *proc,PHY_VARS_gNB *gNB) {
struct timespec wait;
wait.tv_sec=0;
wait.tv_nsec=5000000L;
//printf("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~inside wakeup_txfh %d.%d IC_RU = %d\n", proc->frame_tx, proc->subframe_tx, proc->instance_cnt_RUs);
//printf("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~inside wakeup_txfh %d.%d IC_RU = %d\n", proc->frame_tx, proc->slot_tx, proc->instance_cnt_RUs);
if(wait_on_condition(&proc->mutex_RUs,&proc->cond_RUs,&proc->instance_cnt_RUs,"wakeup_txfh")<0) {
LOG_E(PHY,"Frame %d, subframe %d: TX FH not ready\n", proc->frame_tx, proc->subframe_tx);
LOG_E(PHY,"Frame %d, subframe %d: TX FH not ready\n", proc->frame_tx, proc->slot_tx);
return(-1);
}
pthread_mutex_lock(&gNB->proc.mutex_RU_tx);
@@ -471,21 +471,21 @@ int wakeup_txfh(gNB_L1_rxtx_proc_t *proc,PHY_VARS_gNB *gNB) {
ru = gNB->RU_list[i];
ru_proc = &ru->proc;
if (ru_proc->instance_cnt_gNBs == 0) {
LOG_E(PHY,"Frame %d, subframe %d: TX FH thread busy, dropping Frame %d, subframe %d\n", ru_proc->frame_tx, ru_proc->subframe_tx, proc->frame_rx, proc->subframe_rx);
LOG_E(PHY,"Frame %d, subframe %d: TX FH thread busy, dropping Frame %d, subframe %d\n", ru_proc->frame_tx, ru_proc->tti_tx, proc->frame_rx, proc->slot_rx);
return(-1);
}
if (pthread_mutex_timedlock(&ru_proc->mutex_gNBs,&wait) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB TX1 thread %d (IC %d)\n", ru_proc->subframe_rx&1,ru_proc->instance_cnt_gNBs );
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB TX1 thread %d (IC %d)\n", ru_proc->tti_rx&1,ru_proc->instance_cnt_gNBs );
exit_fun( "error locking mutex_gNB" );
return(-1);
}
ru_proc->instance_cnt_gNBs = 0;
ru_proc->timestamp_tx = proc->timestamp_tx;
ru_proc->subframe_tx = proc->subframe_tx;
ru_proc->tti_tx = proc->slot_tx;
ru_proc->frame_tx = proc->frame_tx;
LOG_I(PHY,"Signaling tx_thread_fh for %d.%d\n",ru_proc->frame_tx,ru_proc->tti_tx);
// the thread can now be woken up
if (pthread_cond_signal(&ru_proc->cond_gNBs) != 0) {
LOG_E( PHY, "[gNB] ERROR pthread_cond_signal for gNB TXnp4 thread\n");
@@ -524,9 +524,9 @@ int wakeup_tx(PHY_VARS_gNB *gNB) {
L1_proc_tx->instance_cnt = 0;
L1_proc_tx->subframe_rx = L1_proc->subframe_rx;
L1_proc_tx->slot_rx = L1_proc->slot_rx;
L1_proc_tx->frame_rx = L1_proc->frame_rx;
L1_proc_tx->subframe_tx = L1_proc->subframe_tx;
L1_proc_tx->slot_tx = L1_proc->slot_tx;
L1_proc_tx->frame_tx = L1_proc->frame_tx;
L1_proc_tx->timestamp_tx = L1_proc->timestamp_tx;
@@ -557,7 +557,7 @@ int wakeup_rxtx(PHY_VARS_gNB *gNB,RU_t *ru) {
if (ru == gNB->RU_list[i]) {
if ((proc->RU_mask&(1<<i)) > 0)
LOG_E(PHY,"gNB %d frame %d, subframe %d : previous information from RU %d (num_RU %d,mask %x) has not been served yet!\n",
gNB->Mod_id,proc->frame_rx,proc->subframe_rx,ru->idx,gNB->num_RU,proc->RU_mask);
gNB->Mod_id,proc->frame_rx,proc->slot_rx,ru->idx,gNB->num_RU,proc->RU_mask);
proc->RU_mask |= (1<<i);
}
}
@@ -576,19 +576,19 @@ int wakeup_rxtx(PHY_VARS_gNB *gNB,RU_t *ru) {
wait.tv_nsec=5000000L;
/* accept some delay in processing - up to 5ms */
for (i = 0; i < 10 && L1_proc->instance_cnt == 0; i++) {
LOG_W( PHY,"[gNB] Frame %d Subframe %d, gNB RXn-TXnp4 thread busy!! (cnt %i)\n", L1_proc->frame_tx, L1_proc->subframe_tx, L1_proc->instance_cnt);
usleep(500);
for (i = 0; i < fp->slots_per_frame && L1_proc->instance_cnt == 0; i++) {
LOG_W( PHY,"[gNB] SFN.SL %d.%d, gNB RXn-TXnp4 thread busy!! (i %d, cnt %i)\n", L1_proc->frame_tx, L1_proc->slot_tx, i,L1_proc->instance_cnt);
usleep(100);
}
if (L1_proc->instance_cnt == 0) {
exit_fun( "TX thread busy" );
return(-1);
}
// wake up TX for subframe n+sf_ahead
// wake up TX for subframe n+sl_ahead
// lock the TX mutex and make sure the thread is ready
if (pthread_mutex_timedlock(&L1_proc->mutex,&wait) != 0) {
LOG_E( PHY, "[gNB] ERROR pthread_mutex_lock for gNB RXTX thread %d (IC %d)\n", L1_proc->subframe_rx&1,L1_proc->instance_cnt );
LOG_E( PHY, "[gNB] ERROR pthread_mutex_lock for gNB RXTX thread %d (IC %d)\n", L1_proc->slot_rx&1,L1_proc->instance_cnt );
exit_fun( "error locking mutex" );
return(-1);
}
@@ -599,15 +599,15 @@ int wakeup_rxtx(PHY_VARS_gNB *gNB,RU_t *ru) {
// TS_rx is the last received timestamp (start of 1st slot), TS_tx is the desired
// transmitted timestamp of the next TX slot (first).
// The last (TS_rx mod samples_per_frame) was n*samples_per_tti,
// we want to generate subframe (n+sf_ahead), so TS_tx = TX_rx+sf_ahead*samples_per_tti,
// and proc->subframe_tx = proc->subframe_rx+sf_ahead
L1_proc->timestamp_tx = ru_proc->timestamp_rx + (sf_ahead*fp->samples_per_subframe);
// we want to generate subframe (n+sl_ahead), so TS_tx = TX_rx+sl_ahead*samples_per_tti,
// and proc->slot_tx = proc->slot_rx+sl_ahead
L1_proc->timestamp_tx = ru_proc->timestamp_rx + (sl_ahead*fp->samples_per_slot);
L1_proc->frame_rx = ru_proc->frame_rx;
L1_proc->subframe_rx = ru_proc->subframe_rx;
L1_proc->frame_tx = (L1_proc->subframe_rx > (9-sf_ahead)) ? (L1_proc->frame_rx+1)&1023 : L1_proc->frame_rx;
L1_proc->subframe_tx = (L1_proc->subframe_rx + sf_ahead)%10;
L1_proc->slot_rx = ru_proc->tti_rx;
L1_proc->frame_tx = (L1_proc->slot_rx > (fp->slots_per_frame-1-sl_ahead)) ? (L1_proc->frame_rx+1)&1023 : L1_proc->frame_rx;
L1_proc->slot_tx = (L1_proc->slot_rx + sl_ahead)%fp->slots_per_frame;
//printf("~~~~~~~~~~~~~~~~~~~~~~passing parameter IC = %d, RX: %d.%d, TX: %d.%d to L1 sf_ahead = %d\n", L1_proc->instance_cnt, L1_proc->frame_rx, L1_proc->subframe_rx, L1_proc->frame_tx, L1_proc->subframe_tx, sf_ahead);
LOG_I(PHY,"wakeupL1: passing parameter IC = %d, RX: %d.%d, TX: %d.%d to L1 sl_ahead = %d\n", L1_proc->instance_cnt, L1_proc->frame_rx, L1_proc->slot_rx, L1_proc->frame_tx, L1_proc->slot_tx, sl_ahead);
// the thread can now be woken up
if (pthread_cond_signal(&L1_proc->cond) != 0) {
@@ -925,7 +925,6 @@ void init_eNB_afterRU(void) {
// map antennas and PRACH signals to gNB RX
if (0) AssertFatal(gNB->num_RU>0,"Number of RU attached to gNB %d is zero\n",gNB->Mod_id);
LOG_I(PHY,"Mapping RX ports from %d RUs to gNB %d\n",gNB->num_RU,gNB->Mod_id);
gNB->gNB_config.rf_config.tx_antenna_ports.value = 0;
//LOG_I(PHY,"Overwriting gNB->prach_vars.rxsigF[0]:%p\n", gNB->prach_vars.rxsigF[0]);
@@ -934,7 +933,6 @@ void init_eNB_afterRU(void) {
LOG_I(PHY,"gNB->num_RU:%d\n", gNB->num_RU);
for (ru_id=0,aa=0;ru_id<gNB->num_RU;ru_id++) {
gNB->gNB_config.rf_config.tx_antenna_ports.value += gNB->RU_list[ru_id]->nb_rx;
AssertFatal(gNB->RU_list[ru_id]->common.rxdataF!=NULL,
"RU %d : common.rxdataF is NULL\n",
@@ -957,29 +955,7 @@ void init_eNB_afterRU(void) {
* In monolithic mode, we come here with nb_antennas_rx == 0
* (not tested in other modes).
*/
if (gNB->gNB_config.rf_config.tx_antenna_ports.value < 1)
{
LOG_I(PHY, "%s() ************* DJP ***** gNB->gNB_config.rf_config.tx_antenna_ports:%d - GOING TO HARD CODE TO 1", __FUNCTION__, gNB->gNB_config.rf_config.tx_antenna_ports.value);
gNB->gNB_config.rf_config.tx_antenna_ports.value = 1;
}
else
{
//LOG_I(PHY," Delete code\n");
}
if (gNB->gNB_config.rf_config.tx_antenna_ports.value < 1)
{
LOG_I(PHY, "%s() ************* DJP ***** gNB->gNB_config.rf_config.tx_antenna_ports:%d - GOING TO HARD CODE TO 1", __FUNCTION__, gNB->gNB_config.rf_config.tx_antenna_ports.value);
gNB->gNB_config.rf_config.tx_antenna_ports.value = 1;
}
else
{
//LOG_I(PHY," Delete code\n");
}
AssertFatal(gNB->gNB_config.rf_config.tx_antenna_ports.value >0,
"inst %d, CC_id %d : nb_antennas_rx %d\n",inst,CC_id,gNB->gNB_config.rf_config.tx_antenna_ports.value);
LOG_I(PHY,"inst %d, CC_id %d : nb_antennas_rx %d\n",inst,CC_id,gNB->gNB_config.rf_config.tx_antenna_ports.value);
//init_precoding_weights(RC.gNB[inst][CC_id]);
}
init_gNB_proc(inst);
targets/RT/USER/nr-ru.c
+142 -248
View File
@@ -7,7 +7,6 @@
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
OpenAirInterface is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
@@ -135,7 +134,7 @@ int attach_rru(RU_t *ru);
int connect_rau(RU_t *ru);
extern uint16_t sf_ahead;
extern uint16_t sl_ahead;
extern int emulate_rf;
extern int numerology;
@@ -309,40 +308,40 @@ int connect_rau(RU_t *ru) {
// southbound IF5 fronthaul for 16-bit OAI format
static inline void fh_if5_south_out(RU_t *ru) {
if (ru == RC.ru[0]) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx&0xffffffff );
send_IF5(ru, ru->proc.timestamp_tx, ru->proc.subframe_tx, &ru->seqno, IF5_RRH_GW_DL);
send_IF5(ru, ru->proc.timestamp_tx, ru->proc.tti_tx, &ru->seqno, IF5_RRH_GW_DL);
}
// southbound IF5 fronthaul for Mobipass packet format
static inline void fh_if5_mobipass_south_out(RU_t *ru) {
if (ru == RC.ru[0]) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx&0xffffffff );
send_IF5(ru, ru->proc.timestamp_tx, ru->proc.subframe_tx, &ru->seqno, IF5_MOBIPASS);
send_IF5(ru, ru->proc.timestamp_tx, ru->proc.tti_tx, &ru->seqno, IF5_MOBIPASS);
}
// southbound IF4p5 fronthaul
static inline void fh_if4p5_south_out(RU_t *ru) {
if (ru == RC.ru[0]) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx&0xffffffff );
LOG_D(PHY,"Sending IF4p5 for frame %d subframe %d\n",ru->proc.frame_tx,ru->proc.subframe_tx);
if (nr_subframe_select(&ru->gNB_list[0]->gNB_config,ru->proc.subframe_tx)!=SF_UL)
send_IF4p5(ru,ru->proc.frame_tx, ru->proc.subframe_tx, IF4p5_PDLFFT);
LOG_D(PHY,"Sending IF4p5 for frame %d subframe %d\n",ru->proc.frame_tx,ru->proc.tti_tx);
if (nr_slot_select(&ru->gNB_list[0]->gNB_config,ru->proc.tti_tx)!=SF_UL)
send_IF4p5(ru,ru->proc.frame_tx, ru->proc.tti_tx, IF4p5_PDLFFT);
}
/*************************************************************/
/* Input Fronthaul from south RCC/RAU */
// Synchronous if5 from south
void fh_if5_south_in(RU_t *ru,int *frame, int *subframe) {
void fh_if5_south_in(RU_t *ru,int *frame, int *tti) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
RU_proc_t *proc = &ru->proc;
recv_IF5(ru, &proc->timestamp_rx, *subframe, IF5_RRH_GW_UL);
recv_IF5(ru, &proc->timestamp_rx, *tti, IF5_RRH_GW_UL);
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_subframe*10))&1023;
proc->subframe_rx = (proc->timestamp_rx / fp->samples_per_subframe)%10;
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_slot*20))&1023;
proc->tti_rx = (proc->timestamp_rx / fp->samples_per_slot)%20;
if (proc->first_rx == 0) {
if (proc->subframe_rx != *subframe){
LOG_E(PHY,"Received Timestamp doesn't correspond to the time we think it is (proc->subframe_rx %d, subframe %d)\n",proc->subframe_rx,*subframe);
if (proc->tti_rx != *tti){
LOG_E(PHY,"Received Timestamp doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",proc->tti_rx,*tti);
exit_fun("Exiting");
}
@@ -353,7 +352,7 @@ void fh_if5_south_in(RU_t *ru,int *frame, int *subframe) {
} else {
proc->first_rx = 0;
*frame = proc->frame_rx;
*subframe = proc->subframe_rx;
*tti = proc->tti_rx;
}
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
@@ -361,49 +360,49 @@ void fh_if5_south_in(RU_t *ru,int *frame, int *subframe) {
}
// Synchronous if4p5 from south
void fh_if4p5_south_in(RU_t *ru,int *frame,int *subframe) {
void fh_if4p5_south_in(RU_t *ru,int *frame,int *slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
RU_proc_t *proc = &ru->proc;
int f,sf;
int f,sl;
uint16_t packet_type;
uint32_t symbol_number=0;
uint32_t symbol_mask_full=0;
/*
if ((fp->frame_type == TDD) && (subframe_select(fp,*subframe)==SF_S))
if ((fp->frame_type == TDD) && (subframe_select(fp,*slot)==SF_S))
symbol_mask_full = (1<<fp->ul_symbols_in_S_subframe)-1;
else
symbol_mask_full = (1<<fp->symbols_per_tti)-1;
symbol_mask_full = (1<<fp->symbols_per_slot)-1;
AssertFatal(proc->symbol_mask[*subframe]==0,"rx_fh_if4p5: proc->symbol_mask[%d] = %x\n",*subframe,proc->symbol_mask[*subframe]);*/
AssertFatal(proc->symbol_mask[*slot]==0,"rx_fh_if4p5: proc->symbol_mask[%d] = %x\n",*slot,proc->symbol_mask[*slot]);*/
do { // Blocking, we need a timeout on this !!!!!!!!!!!!!!!!!!!!!!!
recv_IF4p5(ru, &f, &sf, &packet_type, &symbol_number);
recv_IF4p5(ru, &f, &sl, &packet_type, &symbol_number);
if (packet_type == IF4p5_PULFFT) proc->symbol_mask[sf] = proc->symbol_mask[sf] | (1<<symbol_number);
if (packet_type == IF4p5_PULFFT) proc->symbol_mask[sl] = proc->symbol_mask[sl] | (1<<symbol_number);
else if (packet_type == IF4p5_PULTICK) {
if ((proc->first_rx==0) && (f!=*frame)) LOG_E(PHY,"rx_fh_if4p5: PULTICK received frame %d != expected %d\n",f,*frame);
if ((proc->first_rx==0) && (sf!=*subframe)) LOG_E(PHY,"rx_fh_if4p5: PULTICK received subframe %d != expected %d (first_rx %d)\n",sf,*subframe,proc->first_rx);
if ((proc->first_rx==0) && (sl!=*slot)) LOG_E(PHY,"rx_fh_if4p5: PULTICK received subframe %d != expected %d (first_rx %d)\n",sl,*slot,proc->first_rx);
break;
} else if (packet_type == IF4p5_PRACH) {
// nothing in RU for RAU
}
LOG_D(PHY,"rx_fh_if4p5: subframe %d symbol mask %x\n",*subframe,proc->symbol_mask[*subframe]);
} while(proc->symbol_mask[*subframe] != symbol_mask_full);
LOG_D(PHY,"rx_fh_if4p5: subframe %d symbol mask %x\n",*slot,proc->symbol_mask[sl]);
} while(proc->symbol_mask[sl] != symbol_mask_full);
//caculate timestamp_rx, timestamp_tx based on frame and subframe
proc->subframe_rx = sf;
proc->tti_rx = sl;
proc->frame_rx = f;
proc->timestamp_rx = ((proc->frame_rx * 10) + proc->subframe_rx ) * fp->samples_per_subframe ;
proc->timestamp_rx = ((proc->frame_rx * fp->slots_per_frame) + proc->tti_rx ) * fp->samples_per_slot ;
// proc->timestamp_tx = proc->timestamp_rx + (4*fp->samples_per_subframe);
proc->subframe_tx = (sf+sf_ahead)%10;
proc->frame_tx = (sf>(9-sf_ahead)) ? (f+1)&1023 : f;
proc->tti_tx = (sl+sl_ahead)%fp->slots_per_frame;
proc->frame_tx = (sl>(fp->slots_per_frame-sl_ahead)) ? (f+1)&1023 : f;
if (proc->first_rx == 0) {
if (proc->subframe_rx != *subframe){
LOG_E(PHY,"Received Timestamp (IF4p5) doesn't correspond to the time we think it is (proc->subframe_rx %d, subframe %d)\n",proc->subframe_rx,*subframe);
if (proc->tti_rx != *slot){
LOG_E(PHY,"Received Timestamp (IF4p5) doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",proc->tti_rx,*slot);
exit_fun("Exiting");
}
if (proc->frame_rx != *frame) {
@@ -413,81 +412,23 @@ void fh_if4p5_south_in(RU_t *ru,int *frame,int *subframe) {
} else {
proc->first_rx = 0;
*frame = proc->frame_rx;
*subframe = proc->subframe_rx;
*slot = proc->tti_rx;
}
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU, f );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, sf );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, sl);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, proc->frame_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, proc->subframe_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, proc->tti_tx );
}
proc->symbol_mask[sf] = 0;
proc->symbol_mask[proc->tti_rx] = 0;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
LOG_D(PHY,"RU %d: fh_if4p5_south_in sleeping ...\n",ru->idx);
usleep(100);
}
// Dummy FH from south for getting synchronization from master RU
void fh_slave_south_in(RU_t *ru,int *frame,int *subframe) {
// This case is for synchronization to another thread
// it just waits for an external event. The actual rx_fh is handle by the asynchronous RX thread
RU_proc_t *proc=&ru->proc;
if (wait_on_condition(&proc->mutex_FH,&proc->cond_FH,&proc->instance_cnt_FH,"fh_slave_south_in") < 0)
return;
release_thread(&proc->mutex_FH,&proc->instance_cnt_FH,"rx_fh_slave_south_in");
}
// asynchronous inbound if5 fronthaul from south (Mobipass)
void fh_if5_south_asynch_in_mobipass(RU_t *ru,int *frame,int *subframe) {
RU_proc_t *proc = &ru->proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
recv_IF5(ru, &proc->timestamp_rx, *subframe, IF5_MOBIPASS);
pthread_mutex_lock(&proc->mutex_asynch_rxtx);
int offset_mobipass = 40120;
pthread_mutex_lock(&proc->mutex_asynch_rxtx);
proc->subframe_rx = ((proc->timestamp_rx-offset_mobipass)/fp->samples_per_subframe)%10;
proc->frame_rx = ((proc->timestamp_rx-offset_mobipass)/(fp->samples_per_subframe*10))&1023;
proc->subframe_rx = (proc->timestamp_rx/fp->samples_per_subframe)%10;
proc->frame_rx = (proc->timestamp_rx/(10*fp->samples_per_subframe))&1023;
if (proc->first_rx == 1) {
proc->first_rx =2;
*subframe = proc->subframe_rx;
*frame = proc->frame_rx;
LOG_E(PHY,"[Mobipass]timestamp_rx:%llu, frame_rx %d, subframe: %d\n",(unsigned long long int)proc->timestamp_rx,proc->frame_rx,proc->subframe_rx);
}
else {
if (proc->subframe_rx != *subframe) {
proc->first_rx++;
LOG_E(PHY,"[Mobipass]timestamp:%llu, subframe_rx %d is not what we expect %d, first_rx:%d\n",(unsigned long long int)proc->timestamp_rx, proc->subframe_rx,*subframe, proc->first_rx);
//exit_fun("Exiting");
}
if (proc->frame_rx != *frame) {
proc->first_rx++;
LOG_E(PHY,"[Mobipass]timestamp:%llu, frame_rx %d is not what we expect %d, first_rx:%d\n",(unsigned long long int)proc->timestamp_rx,proc->frame_rx,*frame, proc->first_rx);
// exit_fun("Exiting");
}
// temporary solution
*subframe = proc->subframe_rx;
*frame = proc->frame_rx;
}
pthread_mutex_unlock(&proc->mutex_asynch_rxtx);
} // gNodeB_3GPP_BBU
// asynchronous inbound if4p5 fronthaul from south
void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *subframe) {
void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
RU_proc_t *proc = &ru->proc;
@@ -497,19 +438,19 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *subframe) {
// uint32_t got_prach_info=0;
symbol_number = 0;
symbol_mask = (1<<(fp->symbols_per_slot * fp->slots_per_subframe))-1;
symbol_mask = (1<<(fp->symbols_per_slot))-1;
prach_rx = 0;
do { // Blocking, we need a timeout on this !!!!!!!!!!!!!!!!!!!!!!!
recv_IF4p5(ru, &proc->frame_rx, &proc->subframe_rx, &packet_type, &symbol_number);
recv_IF4p5(ru, &proc->frame_rx, &proc->tti_rx, &packet_type, &symbol_number);
// grab first prach information for this new subframe
/*if (got_prach_info==0) {
prach_rx = is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx);
prach_rx = is_prach_subframe(fp, proc->frame_rx, proc->tti_rx);
got_prach_info = 1;
}*/
if (proc->first_rx != 0) {
*frame = proc->frame_rx;
*subframe = proc->subframe_rx;
*slot = proc->tti_rx;
proc->first_rx = 0;
}
else {
@@ -517,8 +458,8 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *subframe) {
LOG_E(PHY,"frame_rx %d is not what we expect %d\n",proc->frame_rx,*frame);
exit_fun("Exiting");
}
if (proc->subframe_rx != *subframe) {
LOG_E(PHY,"subframe_rx %d is not what we expect %d\n",proc->subframe_rx,*subframe);
if (proc->tti_rx != *slot) {
LOG_E(PHY,"tti_rx %d is not what we expect %d\n",proc->tti_rx,*slot);
exit_fun("Exiting");
}
}
@@ -536,7 +477,7 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *subframe) {
// RRU IF4p5 TX fronthaul receiver. Assumes an if_device on input and if or rf device on output
// receives one subframe's worth of IF4p5 OFDM symbols and OFDM modulates
void fh_if4p5_north_in(RU_t *ru,int *frame,int *subframe) {
void fh_if4p5_north_in(RU_t *ru,int *frame,int *slot) {
uint32_t symbol_number=0;
uint32_t symbol_mask, symbol_mask_full;
@@ -546,47 +487,47 @@ void fh_if4p5_north_in(RU_t *ru,int *frame,int *subframe) {
/// **** incoming IF4p5 from remote RCC/RAU **** ///
symbol_number = 0;
symbol_mask = 0;
symbol_mask_full = (1<<(ru->nr_frame_parms->symbols_per_slot* ru->nr_frame_parms->slots_per_subframe))-1;
symbol_mask_full = (1<<(ru->nr_frame_parms->symbols_per_slot))-1;
do {
recv_IF4p5(ru, frame, subframe, &packet_type, &symbol_number);
recv_IF4p5(ru, frame, slot, &packet_type, &symbol_number);
symbol_mask = symbol_mask | (1<<symbol_number);
} while (symbol_mask != symbol_mask_full);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, *frame );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, *subframe );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, *slot );
}
}
void fh_if5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
void fh_if5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
RU_proc_t *proc = &ru->proc;
int subframe_tx,frame_tx;
int tti_tx,frame_tx;
openair0_timestamp timestamp_tx;
recv_IF5(ru, &timestamp_tx, *subframe, IF5_RRH_GW_DL);
// printf("Received subframe %d (TS %llu) from RCC\n",subframe_tx,timestamp_tx);
recv_IF5(ru, &timestamp_tx, *slot, IF5_RRH_GW_DL);
// printf("Received subframe %d (TS %llu) from RCC\n",tti_tx,timestamp_tx);
subframe_tx = (timestamp_tx/fp->samples_per_subframe)%10;
frame_tx = (timestamp_tx/(fp->samples_per_subframe*10))&1023;
tti_tx = (timestamp_tx/fp->samples_per_slot)%fp->slots_per_frame;
frame_tx = (timestamp_tx/(fp->samples_per_slot*fp->slots_per_frame))&1023;
if (proc->first_tx != 0) {
*subframe = subframe_tx;
*slot = tti_tx;
*frame = frame_tx;
proc->first_tx = 0;
}
else {
AssertFatal(subframe_tx == *subframe,
"subframe_tx %d is not what we expect %d\n",subframe_tx,*subframe);
AssertFatal(tti_tx == *slot,
"tti_tx %d is not what we expect %d\n",tti_tx,*slot);
AssertFatal(frame_tx == *frame,
"frame_tx %d is not what we expect %d\n",frame_tx,*frame);
}
}
void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
@@ -594,28 +535,28 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
uint16_t packet_type;
uint32_t symbol_number,symbol_mask,symbol_mask_full=0;
int subframe_tx,frame_tx;
int slot_tx,frame_tx;
LOG_D(PHY, "%s(ru:%p frame, subframe)\n", __FUNCTION__, ru);
symbol_number = 0;
symbol_mask = 0;
// symbol_mask_full = ((subframe_select(fp,*subframe) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_tti))-1;
// symbol_mask_full = ((subframe_select(fp,*slot) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_slot))-1;
do {
recv_IF4p5(ru, &frame_tx, &subframe_tx, &packet_type, &symbol_number);
if ((nr_subframe_select(cfg,subframe_tx) == SF_DL) && (symbol_number == 0)) start_meas(&ru->rx_fhaul);
recv_IF4p5(ru, &frame_tx, &slot_tx, &packet_type, &symbol_number);
if ((nr_slot_select(cfg,slot_tx) == SF_DL) && (symbol_number == 0)) start_meas(&ru->rx_fhaul);
LOG_D(PHY,"subframe %d (%d): frame %d, subframe %d, symbol %d\n",
*subframe,nr_subframe_select(cfg,*subframe),frame_tx,subframe_tx,symbol_number);
*slot,nr_slot_select(cfg,*slot),frame_tx,slot_tx,symbol_number);
if (proc->first_tx != 0) {
*frame = frame_tx;
*subframe = subframe_tx;
*frame = frame_tx;
*slot = slot_tx;
proc->first_tx = 0;
//symbol_mask_full = ((subframe_select(fp,*subframe) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_tti))-1;
//symbol_mask_full = ((subframe_select(fp,*slot) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_slot))-1;
}
else {
AssertFatal(frame_tx == *frame,
"frame_tx %d is not what we expect %d\n",frame_tx,*frame);
AssertFatal(subframe_tx == *subframe,
"subframe_tx %d is not what we expect %d\n",subframe_tx,*subframe);
AssertFatal(slot_tx == *slot,
"slot_tx %d is not what we expect %d\n",slot_tx,*slot);
}
if (packet_type == IF4p5_PDLFFT) {
symbol_mask = symbol_mask | (1<<symbol_number);
@@ -623,20 +564,20 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
else AssertFatal(1==0,"Illegal IF4p5 packet type (should only be IF4p5_PDLFFT%d\n",packet_type);
} while (symbol_mask != symbol_mask_full);
if (nr_subframe_select(cfg,subframe_tx) == SF_DL) stop_meas(&ru->rx_fhaul);
if (nr_slot_select(cfg,slot_tx) == SF_DL) stop_meas(&ru->rx_fhaul);
proc->subframe_tx = subframe_tx;
proc->tti_tx = slot_tx;
proc->frame_tx = frame_tx;
if ((frame_tx == 0)&&(subframe_tx == 0)) proc->frame_tx_unwrap += 1024;
if ((frame_tx == 0)&&(slot_tx == 0)) proc->frame_tx_unwrap += 1024;
proc->timestamp_tx = ((((uint64_t)frame_tx + (uint64_t)proc->frame_tx_unwrap) * 10) + (uint64_t)subframe_tx) * (uint64_t)fp->samples_per_subframe;
proc->timestamp_tx = ((((uint64_t)frame_tx + (uint64_t)proc->frame_tx_unwrap) * fp->slots_per_frame) + (uint64_t)slot_tx) * (uint64_t)fp->samples_per_slot;
LOG_D(PHY,"RU %d/%d TST %llu, frame %d, subframe %d\n",ru->idx,0,(long long unsigned int)proc->timestamp_tx,frame_tx,subframe_tx);
LOG_D(PHY,"RU %d/%d TST %llu, frame %d, subframe %d\n",ru->idx,0,(long long unsigned int)proc->timestamp_tx,frame_tx,slot_tx);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, subframe_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot_tx );
}
if (ru->feptx_ofdm) ru->feptx_ofdm(ru);
@@ -650,7 +591,7 @@ void fh_if5_north_out(RU_t *ru) {
/// **** send_IF5 of rxdata to BBU **** ///
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_SEND_IF5, 1 );
send_IF5(ru, proc->timestamp_rx, proc->subframe_rx, &seqno, IF5_RRH_GW_UL);
send_IF5(ru, proc->timestamp_rx, proc->tti_rx, &seqno, IF5_RRH_GW_UL);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_SEND_IF5, 0 );
}
@@ -660,17 +601,17 @@ void fh_if4p5_north_out(RU_t *ru) {
RU_proc_t *proc=&ru->proc;
//NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
//const int subframe = proc->subframe_rx;
if (ru->idx==0) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, proc->subframe_rx );
//const int subframe = proc->tti_rx;
if (ru->idx==0) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, proc->tti_rx );
/*
if ((fp->frame_type == TDD) && (subframe_select(fp,subframe)!=SF_UL)) {
/// **** in TDD during DL send_IF4 of ULTICK to RCC **** ///
send_IF4p5(ru, proc->frame_rx, proc->subframe_rx, IF4p5_PULTICK);
send_IF4p5(ru, proc->frame_rx, proc->tti_rx, IF4p5_PULTICK);
return;
}*/
start_meas(&ru->tx_fhaul);
send_IF4p5(ru, proc->frame_rx, proc->subframe_rx, IF4p5_PULFFT);
send_IF4p5(ru, proc->frame_rx, proc->tti_rx, IF4p5_PULFFT);
stop_meas(&ru->tx_fhaul);
}
@@ -703,7 +644,7 @@ static void* emulatedRF_thread(void* param) {
return 0;
}
void rx_rf(RU_t *ru,int *frame,int *subframe) {
void rx_rf(RU_t *ru,int *frame,int *slot) {
RU_proc_t *proc = &ru->proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
@@ -711,25 +652,28 @@ void rx_rf(RU_t *ru,int *frame,int *subframe) {
unsigned int rxs;
int i;
openair0_timestamp ts,old_ts;
AssertFatal(*slot<fp->slots_per_frame && *slot>=0, "slot %d is illegal (%d)\n",*slot,fp->slots_per_frame);
for (i=0; i<ru->nb_rx; i++)
rxp[i] = (void*)&ru->common.rxdata[i][*subframe*fp->samples_per_subframe];
rxp[i] = (void*)&ru->common.rxdata[i][*slot*fp->samples_per_slot];
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_READ, 1 );
old_ts = proc->timestamp_rx;
LOG_I(PHY,"Reading %d samples for slot %d (%p)\n",fp->samples_per_slot,*slot,rxp[0]);
if(emulate_rf){
wait_on_condition(&proc->mutex_emulateRF,&proc->cond_emulateRF,&proc->instance_cnt_emulateRF,"emulatedRF_thread");
release_thread(&proc->mutex_emulateRF,&proc->instance_cnt_emulateRF,"emulatedRF_thread");
rxs = fp->samples_per_subframe;
rxs = fp->samples_per_slot;
ts = old_ts + rxs;
}
else{
rxs = ru->rfdevice.trx_read_func(&ru->rfdevice,
&ts,
rxp,
fp->samples_per_subframe,
fp->samples_per_slot,
ru->nb_rx);
}
@@ -739,43 +683,43 @@ void rx_rf(RU_t *ru,int *frame,int *subframe) {
//AssertFatal(rxs == fp->samples_per_subframe,
//"rx_rf: Asked for %d samples, got %d from USRP\n",fp->samples_per_subframe,rxs);
if (rxs != fp->samples_per_subframe) LOG_E(PHY, "rx_rf: Asked for %d samples, got %d from USRP\n",fp->samples_per_subframe,rxs);
if (rxs != fp->samples_per_slot) LOG_E(PHY, "rx_rf: Asked for %d samples, got %d from USRP\n",fp->samples_per_slot,rxs);
if (proc->first_rx == 1) {
ru->ts_offset = proc->timestamp_rx;
proc->timestamp_rx = 0;
}
else {
if (proc->timestamp_rx - old_ts != fp->samples_per_subframe) {
LOG_I(PHY,"rx_rf: rfdevice timing drift of %"PRId64" samples (ts_off %"PRId64")\n",proc->timestamp_rx - old_ts - fp->samples_per_subframe,ru->ts_offset);
ru->ts_offset += (proc->timestamp_rx - old_ts - fp->samples_per_subframe);
if (proc->timestamp_rx - old_ts != fp->samples_per_slot) {
LOG_I(PHY,"rx_rf: rfdevice timing drift of %"PRId64" samples (ts_off %"PRId64")\n",proc->timestamp_rx - old_ts - fp->samples_per_slot,ru->ts_offset);
ru->ts_offset += (proc->timestamp_rx - old_ts - fp->samples_per_slot);
proc->timestamp_rx = ts-ru->ts_offset;
}
}
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_subframe*10))&1023;
proc->subframe_rx = (proc->timestamp_rx / fp->samples_per_subframe)%10;
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_slot*fp->slots_per_frame))&1023;
proc->tti_rx = (proc->timestamp_rx / fp->samples_per_slot)%fp->slots_per_frame;
// synchronize first reception to frame 0 subframe 0
proc->timestamp_tx = proc->timestamp_rx+(sf_ahead*fp->samples_per_subframe);
proc->subframe_tx = (proc->subframe_rx+sf_ahead)%10;
proc->frame_tx = (proc->subframe_rx>(9-sf_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
proc->timestamp_tx = proc->timestamp_rx+(sl_ahead*fp->samples_per_slot);
proc->tti_tx = (proc->tti_rx+sl_ahead)%fp->slots_per_frame;
proc->frame_tx = (proc->tti_rx>(fp->slots_per_frame-1-sl_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
LOG_D(PHY,"RU %d/%d TS %llu (off %d), frame %d, subframe %d\n",
LOG_I(PHY,"RU %d/%d TS %llu (off %d), frame %d, slot %d.%d / %d\n",
ru->idx,
0,
(unsigned long long int)proc->timestamp_rx,
(int)ru->ts_offset,proc->frame_rx,proc->subframe_rx);
(int)ru->ts_offset,proc->frame_rx,proc->tti_rx,proc->tti_tx,fp->slots_per_frame);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU, proc->frame_rx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, proc->subframe_rx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, proc->tti_rx );
}
if (proc->first_rx == 0) {
if (proc->subframe_rx != *subframe){
LOG_E(PHY,"Received Timestamp (%llu) doesn't correspond to the time we think it is (proc->subframe_rx %d, subframe %d)\n",(long long unsigned int)proc->timestamp_rx,proc->subframe_rx,*subframe);
if (proc->tti_rx != *slot){
LOG_E(PHY,"Received Timestamp (%llu) doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",(long long unsigned int)proc->timestamp_rx,proc->tti_rx,*slot);
exit_fun("Exiting");
}
@@ -786,14 +730,14 @@ void rx_rf(RU_t *ru,int *frame,int *subframe) {
} else {
proc->first_rx = 0;
*frame = proc->frame_rx;
*subframe = proc->subframe_rx;
*slot = proc->tti_rx;
}
//printf("timestamp_rx %lu, frame %d(%d), subframe %d(%d)\n",ru->timestamp_rx,proc->frame_rx,frame,proc->subframe_rx,subframe);
//printf("timestamp_rx %lu, frame %d(%d), subframe %d(%d)\n",ru->timestamp_rx,proc->frame_rx,frame,proc->tti_rx,subframe);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
if (rxs != fp->samples_per_subframe)
if (rxs != fp->samples_per_slot)
{
//exit_fun( "problem receiving samples" );
LOG_E(PHY, "problem receiving samples\n");
@@ -810,18 +754,17 @@ void tx_rf(RU_t *ru) {
unsigned int txs;
int i;
T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(proc->frame_tx), T_INT(proc->subframe_tx),
T_INT(0), T_BUFFER(&ru->common.txdata[0][proc->subframe_tx * fp->samples_per_subframe], fp->samples_per_subframe * 4));
T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(proc->frame_tx), T_INT(proc->tti_tx),
T_INT(0), T_BUFFER(&ru->common.txdata[0][proc->tti_tx * fp->samples_per_slot], fp->samples_per_slot * 4));
nr_subframe_t SF_type = nr_subframe_select(cfg,proc->subframe_tx%10);
/*nr_subframe_t prevSF_type = nr_subframe_select(cfg,(proc->subframe_tx+9)%10);
nr_subframe_t nextSF_type = nr_subframe_select(cfg,(proc->subframe_tx+1)%10);*/
nr_subframe_t SF_type = nr_slot_select(cfg,proc->tti_tx%fp->slots_per_frame);
int sf_extension = 0;
if ((SF_type == SF_DL) ||
(SF_type == SF_S)) {
int siglen=fp->samples_per_slot,flags=1;
int siglen=fp->samples_per_subframe,flags=1;
/*
if (SF_type == SF_S) {
siglen = fp->dl_symbols_in_S_subframe*(fp->ofdm_symbol_size+fp->nb_prefix_samples0);
@@ -843,11 +786,12 @@ void tx_rf(RU_t *ru) {
sf_extension = ru->N_TA_offset<<1;
} */
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, proc->frame_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, proc->subframe_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, proc->tti_tx );
for (i=0; i<ru->nb_tx; i++)
txp[i] = (void*)&ru->common.txdata[i][(proc->subframe_tx*fp->samples_per_subframe)-sf_extension];
txp[i] = (void*)&ru->common.txdata[i][(proc->tti_tx*fp->samples_per_slot)-sf_extension];
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (proc->timestamp_tx-ru->openair0_cfg.tx_sample_advance)&0xffffffff );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 1 );
// prepare tx buffer pointers
@@ -859,7 +803,7 @@ void tx_rf(RU_t *ru) {
flags);
LOG_D(PHY,"[TXPATH] RU %d tx_rf, writing to TS %llu, frame %d, unwrapped_frame %d, subframe %d\n",ru->idx,
(long long unsigned int)proc->timestamp_tx,proc->frame_tx,proc->frame_tx_unwrap,proc->subframe_tx);
(long long unsigned int)proc->timestamp_tx,proc->frame_tx,proc->frame_tx_unwrap,proc->tti_tx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 );
@@ -916,7 +860,7 @@ static void* ru_thread_asynch_rxtx( void* param ) {
if (ru->fh_south_asynch_in) ru->fh_south_asynch_in(ru,&frame,&subframe);
// asynchronous receive from north (RRU IF4/IF5)
else if (ru->fh_north_asynch_in) {
if (nr_subframe_select(&ru->gNB_list[0]->gNB_config,subframe)!=SF_UL)
if (nr_slot_select(&ru->gNB_list[0]->gNB_config,subframe)!=SF_UL)
ru->fh_north_asynch_in(ru,&frame,&subframe);
}
else AssertFatal(1==0,"Unknown function in ru_thread_asynch_rxtx\n");
@@ -929,47 +873,6 @@ static void* ru_thread_asynch_rxtx( void* param ) {
void wakeup_slaves(RU_proc_t *proc) {
int i;
struct timespec wait;
wait.tv_sec=0;
wait.tv_nsec=5000000L;
for (i=0;i<proc->num_slaves;i++) {
RU_proc_t *slave_proc = proc->slave_proc[i];
// wake up slave FH thread
// lock the FH mutex and make sure the thread is ready
if (pthread_mutex_timedlock(&slave_proc->mutex_FH,&wait) != 0) {
LOG_E( PHY, "ERROR pthread_mutex_lock for RU %d slave %d (IC %d)\n",proc->ru->idx,slave_proc->ru->idx,slave_proc->instance_cnt_FH);
exit_fun( "error locking mutex_rxtx" );
break;
}
int cnt_slave = ++slave_proc->instance_cnt_FH;
slave_proc->frame_rx = proc->frame_rx;
slave_proc->subframe_rx = proc->subframe_rx;
slave_proc->timestamp_rx = proc->timestamp_rx;
slave_proc->timestamp_tx = proc->timestamp_tx;
pthread_mutex_unlock( &slave_proc->mutex_FH );
if (cnt_slave == 0) {
// the thread was presumably waiting where it should and can now be woken up
if (pthread_cond_signal(&slave_proc->cond_FH) != 0) {
LOG_E( PHY, "ERROR pthread_cond_signal for RU %d, slave RU %d\n",proc->ru->idx,slave_proc->ru->idx);
exit_fun( "ERROR pthread_cond_signal" );
break;
}
} else {
LOG_W( PHY,"[RU] Frame %d, slave %d thread busy!! (cnt_FH %i)\n",slave_proc->frame_rx,slave_proc->ru->idx, cnt_slave);
exit_fun( "FH thread busy" );
break;
}
}
}
/*!
* \brief The prach receive thread of RU.
* \param param is a \ref RU_proc_t structure which contains the info what to process.
@@ -1142,7 +1045,7 @@ void wakeup_gNB_L1s(RU_t *ru) {
char string[20];
sprintf(string,"Incoming RU %d",ru->idx);
LOG_D(PHY,"RU %d Call gNB_top\n",ru->idx);
ru->gNB_top(gNB_list[0],ru->proc.frame_rx,ru->proc.subframe_rx,string,ru);
ru->gNB_top(gNB_list[0],ru->proc.frame_rx,ru->proc.tti_rx,string,ru);
}
else {
@@ -1153,7 +1056,7 @@ void wakeup_gNB_L1s(RU_t *ru) {
LOG_D(PHY,"ru->wakeup_rxtx:%p\n", ru->nr_wakeup_rxtx);
if (ru->nr_wakeup_rxtx!=0 && ru->nr_wakeup_rxtx(gNB_list[i],ru) < 0)
{
LOG_E(PHY,"could not wakeup gNB rxtx process for subframe %d\n", ru->proc.subframe_rx);
LOG_E(PHY,"could not wakeup gNB rxtx process for subframe %d\n", ru->proc.tti_rx);
}
}
}
@@ -1174,12 +1077,12 @@ static inline int wakeup_prach_ru(RU_t *ru) {
if (ru->proc.instance_cnt_prach==-1) {
++ru->proc.instance_cnt_prach;
ru->proc.frame_prach = ru->proc.frame_rx;
ru->proc.subframe_prach = ru->proc.subframe_rx;
ru->proc.subframe_prach = ru->proc.tti_rx;
// DJP - think prach_procedures() is looking at gNB frame_prach
if (ru->gNB_list[0]) {
ru->gNB_list[0]->proc.frame_prach = ru->proc.frame_rx;
ru->gNB_list[0]->proc.subframe_prach = ru->proc.subframe_rx;
ru->gNB_list[0]->proc.slot_prach = ru->proc.tti_rx;
}
LOG_I(PHY,"RU %d: waking up PRACH thread\n",ru->idx);
// the thread can now be woken up
@@ -1410,9 +1313,9 @@ static void* ru_thread_tx( void* param ) {
wait_on_condition(&proc->mutex_gNBs,&proc->cond_gNBs,&proc->instance_cnt_gNBs,"ru_thread_tx");
if (oai_exit) break;
//printf("~~~~~~~~~~~~~~~~start process for ru_thread_tx %d.%d\n", proc->frame_tx, proc->subframe_tx);
//printf("~~~~~~~~~~~~~~~~start process for ru_thread_tx %d.%d\n", proc->frame_tx, proc->tti_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, proc->frame_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, proc->subframe_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, proc->tti_tx );
// do TX front-end processing if needed (precoding and/or IDFTs)
if (ru->feptx_prec) ru->feptx_prec(ru);
@@ -1430,9 +1333,9 @@ static void* ru_thread_tx( void* param ) {
{
for (i=0; i<ru->nb_tx; i++)
{
sprintf(filename,"tx%ddataF_frame%d_sf%d.m", i, print_frame, proc->subframe_tx);
sprintf(filename,"tx%ddataF_frame%d_sf%d.m", i, print_frame, proc->tti_tx);
LOG_M(filename,"txdataF_frame",&ru->common.txdataF_BF[i][0],fp->samples_per_subframe_wCP, 1, 1);
if(proc->subframe_tx == 9)
if(proc->tti_tx == 9)
{
sprintf(filename,"tx%ddata_frame%d.m", i, print_frame);
LOG_M(filename,"txdata_frame",&ru->common.txdata[i][0],fp->samples_per_frame, 1, 1);
@@ -1448,7 +1351,7 @@ static void* ru_thread_tx( void* param ) {
else {
LOG_E(PHY,"Cannot write to file %s\n",filename);
}
}//if(proc->subframe_tx == 9)
}//if(proc->tti_tx == 9)
}//for (i=0; i<ru->nb_tx; i++)
}//if(proc->frame_tx == print_frame)
}//else emulate_rf
@@ -1463,7 +1366,7 @@ static void* ru_thread_tx( void* param ) {
if (ru == gNB->RU_list[j]) {
if ((gNB_proc->RU_mask_tx&(1<<j)) > 0)
LOG_E(PHY,"eNB %d frame %d, subframe %d : previous information from RU tx %d (num_RU %d,mask %x) has not been served yet!\n",
gNB->Mod_id,gNB_proc->frame_rx,gNB_proc->subframe_rx,ru->idx,gNB->num_RU,gNB_proc->RU_mask_tx);
gNB->Mod_id,gNB_proc->frame_rx,gNB_proc->slot_rx,ru->idx,gNB->num_RU,gNB_proc->RU_mask_tx);
gNB_proc->RU_mask_tx |= (1<<j);
}
}
@@ -1497,7 +1400,7 @@ static void* ru_thread( void* param ) {
RU_proc_t *proc = &ru->proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
int ret;
int subframe =9;
int slot = fp->slots_per_frame-1;
int frame =1023;
char filename[40],threadname[40];
int print_frame = 2;
@@ -1590,36 +1493,36 @@ static void* ru_thread( void* param ) {
// these are local subframe/frame counters to check that we are in synch with the fronthaul timing.
// They are set on the first rx/tx in the underly FH routines.
if (subframe==9) {
subframe=0;
if (slot==(fp->slots_per_frame-1)) {
slot=0;
frame++;
frame&=1023;
} else {
subframe++;
slot++;
}
// synchronization on input FH interface, acquire signals/data and block
if (ru->fh_south_in) ru->fh_south_in(ru,&frame,&subframe);
if (ru->fh_south_in) ru->fh_south_in(ru,&frame,&slot);
else AssertFatal(1==0, "No fronthaul interface at south port");
LOG_D(PHY,"AFTER fh_south_in - SFN/SF:%d%d RU->proc[RX:%d%d TX:%d%d] RC.gNB[0][0]:[RX:%d%d TX(SFN):%d]\n",
frame,subframe,
proc->frame_rx,proc->subframe_rx,
proc->frame_tx,proc->subframe_tx,
RC.gNB[0][0]->proc.frame_rx,RC.gNB[0][0]->proc.subframe_rx,
LOG_I(PHY,"AFTER fh_south_in - SFN/SL:%d%d RU->proc[RX:%d.%d TX:%d.%d] RC.gNB[0][0]:[RX:%d%d TX(SFN):%d]\n",
frame,slot,
proc->frame_rx,proc->tti_rx,
proc->frame_tx,proc->tti_tx,
RC.gNB[0][0]->proc.frame_rx,RC.gNB[0][0]->proc.slot_rx,
RC.gNB[0][0]->proc.frame_tx);
/*
LOG_D(PHY,"RU thread (do_prach %d, is_prach_subframe %d), received frame %d, subframe %d\n",
ru->do_prach,
is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx),
proc->frame_rx,proc->subframe_rx);
is_prach_subframe(fp, proc->frame_rx, proc->tti_rx),
proc->frame_rx,proc->tti_rx);
if ((ru->do_prach>0) && (is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx)==1)) {
if ((ru->do_prach>0) && (is_prach_subframe(fp, proc->frame_rx, proc->tti_rx)==1)) {
wakeup_prach_ru(ru);
}*/
// adjust for timing offset between RU
//printf("~~~~~~~~~~~~~~~~~~~~~~~~~~%d.%d in ru_thread is in process\n", proc->frame_rx, proc->subframe_rx);
//printf("~~~~~~~~~~~~~~~~~~~~~~~~~~%d.%d in ru_thread is in process\n", proc->frame_rx, proc->tti_rx);
if (ru->idx!=0) proc->frame_tx = (proc->frame_tx+proc->frame_offset)&1023;
@@ -1627,8 +1530,6 @@ static void* ru_thread( void* param ) {
if (ru->feprx) ru->feprx(ru);
// At this point, all information for subframe has been received on FH interface
// If this proc is to provide synchronization, do so
wakeup_slaves(proc);
// wakeup all gNB processes waiting for this RU
if (ru->num_gNB>0) wakeup_gNB_L1s(ru);
@@ -1653,9 +1554,9 @@ static void* ru_thread( void* param ) {
{
for (i=0; i<ru->nb_tx; i++)
{
sprintf(filename,"tx%ddataF_frame%d_sf%d.m", i, print_frame, proc->subframe_tx);
LOG_M(filename,"txdataF_frame",&ru->common.txdataF_BF[i][0],fp->samples_per_subframe_wCP, 1, 1);
if(proc->subframe_tx == 9)
sprintf(filename,"tx%ddataF_frame%d_sf%d.m", i, print_frame, proc->tti_tx);
LOG_M(filename,"txdataF_frame",&ru->common.txdataF_BF[i][0],fp->samples_per_slot_wCP, 1, 1);
if(proc->tti_tx == 9)
{
sprintf(filename,"tx%ddata_frame%d.m", i, print_frame);
LOG_M(filename,"txdata_frame",&ru->common.txdata[i][0],fp->samples_per_frame, 1, 1);
@@ -1671,7 +1572,7 @@ static void* ru_thread( void* param ) {
else {
LOG_E(PHY,"Cannot write to file %s\n",filename);
}
}//if(proc->subframe_tx == 9)
}//if(proc->tti_tx == 9)
}//for (i=0; i<ru->nb_tx; i++)
}//if(proc->frame_tx == print_frame)
}//else emulate_rf
@@ -2243,16 +2144,9 @@ void set_function_spec_param(RU_t *ru)
ru->feprx = (get_nprocs()<=2) ? fep_full : fep_full; // this is frequency-shift + DFTs
ru->feptx_prec = feptx_prec; // need to do transmit Precoding + IDFTs
ru->feptx_ofdm = (get_nprocs()<=2) ? nr_feptx_ofdm : nr_feptx_ofdm_2thread; // need to do transmit Precoding + IDFTs
if (ru->if_timing == synch_to_other) {
ru->fh_south_in = fh_slave_south_in; // synchronize to master
ru->fh_south_out = fh_if5_mobipass_south_out; // use send_IF5 for mobipass
ru->fh_south_asynch_in = fh_if5_south_asynch_in_mobipass; // UL is asynchronous
}
else {
ru->fh_south_in = fh_if5_south_in; // synchronous IF5 reception
ru->fh_south_out = fh_if5_south_out; // synchronous IF5 transmission
ru->fh_south_asynch_in = NULL; // no asynchronous UL
}
ru->fh_south_in = fh_if5_south_in; // synchronous IF5 reception
ru->fh_south_out = fh_if5_south_out; // synchronous IF5 transmission
ru->fh_south_asynch_in = NULL; // no asynchronous UL
ru->start_rf = NULL; // no local RF
ru->stop_rf = NULL;
ru->start_if = start_if; // need to start if interface for IF5
targets/RT/USER/nr-softmodem.c
-2
View File
@@ -610,8 +610,6 @@ void set_default_frame_parms(nfapi_nr_config_request_t *config[MAX_NUM_CCs], NR_
config[CC_id]->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config[CC_id]->rf_config.dl_carrier_bandwidth.value = 106;
config[CC_id]->rf_config.ul_carrier_bandwidth.value = 106;
config[CC_id]->rf_config.tx_antenna_ports.value = 1;
config[CC_id]->rf_config.rx_antenna_ports.value = 1;
config[CC_id]->sch_config.physical_cell_id.value = 0;
///dl frequency to be filled in
targets/RT/USER/nr-ue.c
+44 -35
View File
@@ -634,7 +634,7 @@ static void *UE_thread_rxn_txnp4(void *arg) {
proc->instance_cnt_rxtx=-1;
proc->subframe_rx=proc->sub_frame_start;
proc->dci_err_cnt=0;
proc->dci_err_cnt=0;
char threadname[256];
sprintf(threadname,"UE_%d_proc_%d", UE->Mod_id, proc->sub_frame_start);
cpu_set_t cpuset;
@@ -679,11 +679,20 @@ static void *UE_thread_rxn_txnp4(void *arg) {
UE->dci_ind.number_of_dcis = 0;
//clean previous FAPI MESSAGE
// call L2 for DL_CONFIG (DCI)
UE->dcireq.module_id = UE->Mod_id;
UE->dcireq.gNB_index = 0;
UE->dcireq.cc_id = 0;
UE->dcireq.frame = proc->frame_rx;
UE->dcireq.slot = proc->nr_tti_rx;
//UE->if_inst->dcireq(&UE->dcireq);
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else
phy_procedures_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay);
//printf(">>> nr_ue_pdcch_procedures ended\n");
phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode);
// printf(">>> nr_ue_pdcch_procedures ended\n");
#endif
}
@@ -1107,42 +1116,42 @@ void *UE_thread(void *arg) {
// pickStaticTime(lastTime);
} //UE->mode != loop_through_memory
else {
proc->nr_tti_rx=subframe_nr;
proc->subframe_rx=subframe_nr;
if(subframe_nr == 0) {
for (th_id=0; th_id < RX_NB_TH; th_id++) {
UE->proc.proc_rxtx[th_id].frame_rx++;
}
proc->nr_tti_rx=subframe_nr;
proc->subframe_rx=subframe_nr;
if(subframe_nr == 0) {
for (th_id=0; th_id < RX_NB_TH; th_id++) {
UE->proc.proc_rxtx[th_id].frame_rx++;
}
proc->frame_tx = proc->frame_rx;
proc->nr_tti_tx= subframe_nr + DURATION_RX_TO_TX;
if (proc->nr_tti_tx > NR_NUMBER_OF_SUBFRAMES_PER_FRAME) {
proc->frame_tx = (proc->frame_tx + 1)%MAX_FRAME_NUMBER;
proc->nr_tti_tx %= NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
}
proc->subframe_tx=proc->nr_tti_tx;
printf("Processing subframe %d\n",proc->subframe_rx);
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL){
UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.slot = 0; // to be fill
UE->ul_indication.frame = 0; // to be fill
// [TODO] mapping right after NR initial sync
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx;
UE->if_inst->ul_indication(&UE->ul_indication);
}
phy_procedures_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay);
getchar();
}
proc->frame_tx = proc->frame_rx;
proc->nr_tti_tx= subframe_nr + DURATION_RX_TO_TX;
if (proc->nr_tti_tx > NR_NUMBER_OF_SUBFRAMES_PER_FRAME) {
proc->frame_tx = (proc->frame_tx + 1)%MAX_FRAME_NUMBER;
proc->nr_tti_tx %= NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
}
proc->subframe_tx=proc->nr_tti_tx;
printf("Processing subframe %d\n",proc->subframe_rx);
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL){
UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.slot = 0; // to be fill
UE->ul_indication.frame = 0; // to be fill
// [TODO] mapping right after NR initial sync
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx;
UE->if_inst->ul_indication(&UE->ul_indication);
}
phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode);
getchar();
} // else loop_through_memory
} // start_rx_stream==1
} // UE->is_synchronized==1
} // while !oai_exit
return NULL;
}
targets/RT/USER/nr-uesoftmodem.c
-2
View File
@@ -659,8 +659,6 @@ void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
config[CC_id]->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config[CC_id]->rf_config.dl_carrier_bandwidth.value = 106;
config[CC_id]->rf_config.ul_carrier_bandwidth.value = 106;
config[CC_id]->rf_config.tx_antenna_ports.value = 1;
config[CC_id]->rf_config.rx_antenna_ports.value = 1;
config[CC_id]->sch_config.physical_cell_id.value = 0;
frame_parms[CC_id]->frame_type = FDD;