|
|
|
@@ -102,7 +102,7 @@ store_dlsch_buffer(module_id_t Mod_id,
|
|
|
|
|
if (UE_list->active[UE_id] != TRUE)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (!ue_slice_membership(UE_id, slice_id, RC.mac[Mod_id]->slice_info.n_dl))
|
|
|
|
|
if (!ue_dl_slice_membership(Mod_id, UE_id, slice_id))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
UE_template = &UE_list->UE_template[UE_PCCID(Mod_id, UE_id)][UE_id];
|
|
|
|
@@ -192,7 +192,7 @@ assign_rbs_required(module_id_t Mod_id,
|
|
|
|
|
// clear rb allocations across all CC_id
|
|
|
|
|
for (UE_id = 0; UE_id < MAX_MOBILES_PER_ENB; UE_id++) {
|
|
|
|
|
if (UE_list->active[UE_id] != TRUE) continue;
|
|
|
|
|
if (!ue_slice_membership(UE_id, slice_id, sli->n_dl)) continue;
|
|
|
|
|
if (!ue_dl_slice_membership(Mod_id, UE_id, slice_id)) continue;
|
|
|
|
|
pCCid = UE_PCCID(Mod_id, UE_id);
|
|
|
|
|
|
|
|
|
|
//update CQI information across component carriers
|
|
|
|
@@ -478,7 +478,7 @@ void sort_UEs(module_id_t Mod_idP, slice_id_t slice_id, int frameP, sub_frame_t
|
|
|
|
|
if (UE_list->active[i] == FALSE) continue;
|
|
|
|
|
if (UE_RNTI(Mod_idP, i) == NOT_A_RNTI) continue;
|
|
|
|
|
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1) continue;
|
|
|
|
|
if (!ue_slice_membership(i, slice_id, RC.mac[Mod_idP]->slice_info.n_dl)) continue;
|
|
|
|
|
if (!ue_dl_slice_membership(Mod_idP, i, slice_id)) continue;
|
|
|
|
|
|
|
|
|
|
list[list_size] = i;
|
|
|
|
|
list_size++;
|
|
|
|
@@ -582,7 +582,7 @@ void dlsch_scheduler_pre_processor_partitioning(module_id_t Mod_id,
|
|
|
|
|
|
|
|
|
|
if (UE_RNTI(Mod_id, UE_id) == NOT_A_RNTI) continue;
|
|
|
|
|
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
|
|
|
|
|
if (!ue_slice_membership(UE_id, slice_id, RC.mac[Mod_id]->slice_info.n_dl)) continue;
|
|
|
|
|
if (!ue_dl_slice_membership(Mod_id, UE_id, slice_id)) continue;
|
|
|
|
|
|
|
|
|
|
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
|
|
|
|
|
|
|
|
|
@@ -620,7 +620,6 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
|
|
|
|
|
uint8_t ue_retx_flag[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
|
|
|
|
|
|
|
|
|
|
UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
|
|
|
|
|
slice_info_t *sli = &RC.mac[Mod_id]->slice_info;
|
|
|
|
|
UE_sched_ctrl *ue_sched_ctl;
|
|
|
|
|
COMMON_channels_t *cc;
|
|
|
|
|
|
|
|
|
@@ -641,7 +640,7 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
|
|
|
|
|
rnti = UE_RNTI(Mod_id, UE_id);
|
|
|
|
|
if (rnti == NOT_A_RNTI) continue;
|
|
|
|
|
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
|
|
|
|
|
if (!ue_slice_membership(UE_id, slice_id, sli->n_dl)) continue;
|
|
|
|
|
if (!ue_dl_slice_membership(Mod_id, UE_id, slice_id)) continue;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < UE_num_active_CC(UE_list, UE_id); ++i) {
|
|
|
|
|
CC_id = UE_list->ordered_CCids[i][UE_id];
|
|
|
|
@@ -681,7 +680,7 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
|
|
|
|
|
rnti = UE_RNTI(Mod_id, UE_id);
|
|
|
|
|
if (rnti == NOT_A_RNTI) continue;
|
|
|
|
|
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
|
|
|
|
|
if (!ue_slice_membership(UE_id, slice_id, sli->n_dl)) continue;
|
|
|
|
|
if (!ue_dl_slice_membership(Mod_id, UE_id, slice_id)) continue;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
|
|
|
|
|
CC_id = UE_list->ordered_CCids[i][UE_id];
|
|
|
|
@@ -701,7 +700,7 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
|
|
|
|
|
|
|
|
|
|
if (rnti == NOT_A_RNTI) continue;
|
|
|
|
|
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
|
|
|
|
|
if (!ue_slice_membership(UE_id, slice_id, sli->n_dl)) continue;
|
|
|
|
|
if (!ue_dl_slice_membership(Mod_id, UE_id, slice_id)) continue;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < UE_num_active_CC(UE_list, UE_id); ++i) {
|
|
|
|
|
|
|
|
|
@@ -726,7 +725,7 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
|
|
|
|
|
rnti = UE_RNTI(Mod_id, UE_id);
|
|
|
|
|
if (rnti == NOT_A_RNTI) continue;
|
|
|
|
|
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
|
|
|
|
|
if (!ue_slice_membership(UE_id, slice_id, sli->n_dl)) continue;
|
|
|
|
|
if (!ue_dl_slice_membership(Mod_id, UE_id, slice_id)) continue;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
|
|
|
|
|
CC_id = UE_list->ordered_CCids[i][UE_id];
|
|
|
|
@@ -745,7 +744,7 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
|
|
|
|
|
rnti = UE_RNTI(Mod_id, UE_id);
|
|
|
|
|
if (rnti == NOT_A_RNTI) continue;
|
|
|
|
|
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
|
|
|
|
|
if (!ue_slice_membership(UE_id, slice_id, sli->n_dl)) continue;
|
|
|
|
|
if (!ue_dl_slice_membership(Mod_id, UE_id, slice_id)) continue;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
|
|
|
|
|
CC_id = UE_list->ordered_CCids[i][UE_id];
|
|
|
|
@@ -780,7 +779,6 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id,
|
|
|
|
|
int N_RBG[NFAPI_CC_MAX];
|
|
|
|
|
|
|
|
|
|
UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
|
|
|
|
|
slice_info_t *sli = &RC.mac[Mod_id]->slice_info;
|
|
|
|
|
|
|
|
|
|
decode_slice_positioning(Mod_id, slice_id, slice_allocation_mask);
|
|
|
|
|
|
|
|
|
@@ -794,7 +792,7 @@ void dlsch_scheduler_pre_processor_positioning(module_id_t Mod_id,
|
|
|
|
|
|
|
|
|
|
if (UE_RNTI(Mod_id, UE_id) == NOT_A_RNTI) continue;
|
|
|
|
|
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
|
|
|
|
|
if (!ue_slice_membership(UE_id, slice_id, sli->n_dl)) continue;
|
|
|
|
|
if (!ue_dl_slice_membership(Mod_id, UE_id, slice_id)) continue;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
|
|
|
|
|
CC_id = UE_list->ordered_CCids[i][UE_id];
|
|
|
|
@@ -1020,7 +1018,7 @@ void dlsch_scheduler_pre_processor_intraslice_sharing(module_id_t Mod_id,
|
|
|
|
|
|
|
|
|
|
if (UE_RNTI(Mod_id, UE_id) == NOT_A_RNTI) continue;
|
|
|
|
|
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1) continue;
|
|
|
|
|
if (!ue_slice_membership(UE_id, slice_id, sli->n_dl)) continue;
|
|
|
|
|
if (!ue_dl_slice_membership(Mod_id, UE_id, slice_id)) continue;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
|
|
|
|
|
CC_id = UE_list->ordered_CCids[i][UE_id];
|
|
|
|
@@ -1405,7 +1403,6 @@ dlsch_scheduler_pre_processor_reset(module_id_t module_idP,
|
|
|
|
|
|
|
|
|
|
rnti_t rnti;
|
|
|
|
|
UE_list_t *UE_list;
|
|
|
|
|
slice_info_t *sli = &RC.mac[module_idP]->slice_info;
|
|
|
|
|
UE_sched_ctrl *ue_sched_ctl;
|
|
|
|
|
uint8_t *vrb_map;
|
|
|
|
|
COMMON_channels_t *cc;
|
|
|
|
@@ -1435,7 +1432,7 @@ dlsch_scheduler_pre_processor_reset(module_id_t module_idP,
|
|
|
|
|
if (UE_list->active[UE_id] != TRUE)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (!ue_slice_membership(UE_id, slice_id, sli->n_dl))
|
|
|
|
|
if (!ue_dl_slice_membership(module_idP, UE_id, slice_id))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
vrb_map = RC.mac[module_idP]->common_channels[CC_id].vrb_map;
|
|
|
|
@@ -1709,7 +1706,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|
|
|
|
// This is the actual CC_id in the list
|
|
|
|
|
CC_id = UE_list->ordered_ULCCids[n][i];
|
|
|
|
|
UE_template = &UE_list->UE_template[CC_id][i];
|
|
|
|
|
if (!ue_slice_membership(i, slice_id, sli->n_ul))
|
|
|
|
|
if (!ue_ul_slice_membership(module_idP, i, slice_id))
|
|
|
|
|
continue;
|
|
|
|
|
if (UE_template->pre_allocated_nb_rb_ul[slice_id] > 0) {
|
|
|
|
|
total_ue_count[CC_id] += 1;
|
|
|
|
@@ -1730,7 +1727,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|
|
|
|
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (!ue_slice_membership(UE_id, slice_id, sli->n_ul))
|
|
|
|
|
if (!ue_ul_slice_membership(module_idP, UE_id, slice_id))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
LOG_D(MAC, "In ulsch_preprocessor: handling UE %d/%x\n", UE_id,
|
|
|
|
@@ -1787,7 +1784,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|
|
|
|
continue;
|
|
|
|
|
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
|
|
|
|
|
continue;
|
|
|
|
|
if (!ue_slice_membership(i, slice_id, sli->n_ul))
|
|
|
|
|
if (!ue_ul_slice_membership(module_idP, i, slice_id))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
@@ -1828,7 +1825,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|
|
|
|
continue;
|
|
|
|
|
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
|
|
|
|
|
continue;
|
|
|
|
|
if (!ue_slice_membership(i, slice_id, sli->n_ul))
|
|
|
|
|
if (!ue_ul_slice_membership(module_idP, i, slice_id))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
UE_id = i;
|
|
|
|
@@ -1905,7 +1902,7 @@ assign_max_mcs_min_rb(module_id_t module_idP, int slice_id, int frameP,
|
|
|
|
|
continue;
|
|
|
|
|
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
|
|
|
|
|
continue;
|
|
|
|
|
if (!ue_slice_membership(i, slice_id, sli->n_ul))
|
|
|
|
|
if (!ue_ul_slice_membership(module_idP, i, slice_id))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (UE_list->UE_sched_ctrl[i].phr_received == 1) {
|
|
|
|
|