Implement delta MCS in UL Power estimation
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@@ -881,31 +881,65 @@ static bool nr_UE_is_to_be_scheduled(const NR_ServingCellConfigCommon_t *scc,
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return has_data || sched_ctrl->SR || high_inactivity;
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}
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int estimate_nr_ue_tx_power(int mu, uint32_t tbs, int rb)
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int estimate_nr_ue_tx_power(int mu, uint32_t tbs_bits, int code_rate, int rb, int n_symbols)
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{
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/* TODO: delta_mcs? */
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/* see TS 38.213 Sec 7.1.1 */
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const unsigned int CRC = (tbs_bits >> 3) > 3824 ? 24 : 16; /* from nr_dlsch_encoding(): 24 or 16 bits CRC */
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const unsigned int B = tbs_bits + CRC;
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unsigned int C; /* number of code blocks */
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unsigned int K; /* total code block size */
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unsigned int Zout; /* unused */
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unsigned int F; /* unused */
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/* to scale MCS 20 and 26 in 214 Tab 5.1.3.1-2 (decimal and input 2* in * nr_target_code_rate_table2) */
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const float targetCodeRate = code_rate < 1000 ? (float) code_rate / 1024.0f : (float) code_rate / 2048.0f;
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const unsigned int BG = get_BG(tbs_bits, targetCodeRate);
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const int32_t Kb = nr_segmentation(NULL, NULL, B, &C, &K, &Zout, &F, BG);
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AssertFatal(Kb >= 0, "problem with segmentation for B %d BG %d\n", B, BG);
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const unsigned int Nre = 12 * rb * n_symbols;
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const unsigned int BPRE = C * K / Nre;
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const float f = pow(2, (float) BPRE * 1.25);
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const float beta = 1.0f;
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const int delta_tf = 10 * log10((f - 1) * beta);
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const int bw_factor = 10 * log10(rb << mu);
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return bw_factor;
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LOG_D(NR_MAC, "estimated UE TX power %d (Nre %d C %d K %d Nre %d BPRE %d delta_tf %d rb %d bw_factor %d)\n",
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bw_factor + delta_tf, Nre, C, K, Nre, BPRE, delta_tf, rb, bw_factor);
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return bw_factor + delta_tf;
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}
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int nr_ue_max_rbSize_phr(int mu, const NR_UE_sched_ctrl_t *sched_ctrl, uint16_t minRb, uint16_t *maxRb, uint8_t *mcs)
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void update_ul_ue_R_Qm(int mcs, const NR_pusch_semi_static_t *ps, uint16_t *R, uint8_t *Qm)
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{
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*R = nr_get_code_rate_ul(mcs, ps->mcs_table);
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*Qm = nr_get_Qm_ul(mcs, ps->mcs_table);
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if (ps->pusch_Config && ps->pusch_Config->tp_pi2BPSK && ((ps->mcs_table == 3 && mcs < 2) || (ps->mcs_table == 4 && mcs < 6))) {
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*R >>= 1;
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*Qm <<= 1;
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}
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}
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int nr_ue_max_mcs_min_rb(int mu, int ph, NR_pusch_semi_static_t *ps, uint16_t minRb, int tbs, uint16_t *maxRb, uint8_t *mcs)
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{
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AssertFatal(*maxRb >= minRb, "illegal maxRb %d < minRb %d\n", *maxRb, minRb);
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AssertFatal(*mcs >= 0 && *mcs <= 28, "illegal MCS %d\n", *mcs);
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const int ph = sched_ctrl->ph;
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//const int pcmax = sched_ctrl->pcmax;
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const int tbs_bits = tbs << 3;
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uint16_t R;
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uint8_t Qm;
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update_ul_ue_R_Qm(*mcs, ps, &R, &Qm);
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int tx_power = estimate_nr_ue_tx_power(mu, /* unused tbs */ 0, *maxRb);
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int tx_power = estimate_nr_ue_tx_power(mu, tbs_bits, R, *maxRb, ps->nrOfSymbols);
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while (ph < tx_power && *maxRb >= minRb) {
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(*maxRb)--;
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tx_power = estimate_nr_ue_tx_power(mu, /* unused tbs */ 0, *maxRb);
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tx_power = estimate_nr_ue_tx_power(mu, tbs_bits, R, *maxRb, ps->nrOfSymbols);
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}
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while (ph < tx_power && *mcs > 6) {
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(*mcs)--;
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tx_power = estimate_nr_ue_tx_power(mu, /* unused tbs */ 0, *maxRb);
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update_ul_ue_R_Qm(*mcs, ps, &R, &Qm);
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tx_power = estimate_nr_ue_tx_power(mu, tbs_bits, R, *maxRb, ps->nrOfSymbols);
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}
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if (ph < tx_power)
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@@ -1078,18 +1112,6 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
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return true;
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}
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void update_ul_ue_R_Qm(NR_sched_pusch_t *sched_pusch, const NR_pusch_semi_static_t *ps)
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{
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const int mcs = sched_pusch->mcs;
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sched_pusch->R = nr_get_code_rate_ul(mcs, ps->mcs_table);
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sched_pusch->Qm = nr_get_Qm_ul(mcs, ps->mcs_table);
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if (ps->pusch_Config && ps->pusch_Config->tp_pi2BPSK && ((ps->mcs_table == 3 && mcs < 2) || (ps->mcs_table == 4 && mcs < 6))) {
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sched_pusch->R >>= 1;
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sched_pusch->Qm <<= 1;
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}
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}
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uint32_t ul_pf_tbs[3][29]; // pre-computed, approximate TBS values for PF coefficient
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typedef struct UEsched_s {
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float coef;
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@@ -1260,7 +1282,7 @@ void pf_ul(module_id_t module_id,
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NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
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sched_pusch->mcs = min(nrmac->min_grant_mcs, sched_pusch->mcs);
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update_ul_ue_R_Qm(sched_pusch, ps);
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update_ul_ue_R_Qm(sched_pusch->mcs, ps, &sched_pusch->R, &sched_pusch->Qm);
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sched_pusch->rbStart = rbStart;
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sched_pusch->rbSize = min_rb;
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sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm,
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@@ -1362,7 +1384,7 @@ void pf_ul(module_id_t module_id,
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nrOfLayers,
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ps);
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}
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update_ul_ue_R_Qm(sched_pusch, ps);
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update_ul_ue_R_Qm(sched_pusch->mcs, ps, &sched_pusch->R, &sched_pusch->Qm);
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const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
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while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
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@@ -1380,12 +1402,15 @@ void pf_ul(module_id_t module_id,
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else
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LOG_D(NR_MAC,"allocating UL data for RNTI %04x (rbStsart %d, min_rb %d, bwpSize %d)\n", iterator->UE->rnti,rbStart,min_rb,bwpSize);
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/* reduce max_rbSize according to PHR */
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const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
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const int tx_power = nr_ue_max_rbSize_phr(mu, sched_ctrl, min_rbSize, &max_rbSize, &sched_pusch->mcs);
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/* Calculate the current scheduling bytes and the necessary RBs */
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/* Calculate the current scheduling bytes */
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const int B = cmax(sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes, 0);
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/* reduce max_rbSize according to PHR and BPRE */
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const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
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nr_ue_max_mcs_min_rb(mu, sched_ctrl->ph, ps, min_rbSize, B, &max_rbSize, &sched_pusch->mcs);
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if (sched_pusch->mcs < sched_ctrl->ul_bler_stats.mcs)
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sched_ctrl->ul_bler_stats.mcs = sched_pusch->mcs; /* force estimated MCS down */
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uint16_t rbSize = 0;
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uint32_t TBS = 0;
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@@ -1413,7 +1413,8 @@ void fill_initial_SpCellConfig(int uid,
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ASN_SEQUENCE_ADD(&pusch_Config->pusch_PowerControl->pathlossReferenceRSToAddModList->list,plrefRS);
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pusch_Config->pusch_PowerControl->pathlossReferenceRSToReleaseList = NULL;
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pusch_Config->pusch_PowerControl->twoPUSCH_PC_AdjustmentStates = NULL;
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pusch_Config->pusch_PowerControl->deltaMCS = NULL;
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pusch_Config->pusch_PowerControl->deltaMCS = calloc(1, sizeof(*pusch_Config->pusch_PowerControl->deltaMCS));
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*pusch_Config->pusch_PowerControl->deltaMCS = NR_PUSCH_PowerControl__deltaMCS_enabled;
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pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToAddModList = calloc(1,sizeof(*pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToAddModList));
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NR_SRI_PUSCH_PowerControl_t *sriPUSCHPC=calloc(1,sizeof(*sriPUSCHPC));
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sriPUSCHPC->sri_PUSCH_PowerControlId=0;
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@@ -401,7 +401,8 @@ void fill_default_nsa_uplinkBWP(NR_BWP_Uplink_t *ubwp,
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pusch_Config->pusch_PowerControl->pathlossReferenceRSToAddModList = NULL;
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pusch_Config->pusch_PowerControl->pathlossReferenceRSToReleaseList = NULL;
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pusch_Config->pusch_PowerControl->twoPUSCH_PC_AdjustmentStates = NULL;
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pusch_Config->pusch_PowerControl->deltaMCS = NULL;
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pusch_Config->pusch_PowerControl->deltaMCS = calloc(1, sizeof(*pusch_Config->pusch_PowerControl->deltaMCS));
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*pusch_Config->pusch_PowerControl->deltaMCS = NR_PUSCH_PowerControl__deltaMCS_enabled;
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pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToAddModList = NULL;
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pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToReleaseList = NULL;
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pusch_Config->frequencyHopping=NULL;
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@@ -858,7 +859,8 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
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pusch_Config->pusch_PowerControl->pathlossReferenceRSToAddModList = NULL;
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pusch_Config->pusch_PowerControl->pathlossReferenceRSToReleaseList = NULL;
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pusch_Config->pusch_PowerControl->twoPUSCH_PC_AdjustmentStates = NULL;
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pusch_Config->pusch_PowerControl->deltaMCS = NULL;
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pusch_Config->pusch_PowerControl->deltaMCS = calloc(1, sizeof(*pusch_Config->pusch_PowerControl->deltaMCS));
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*pusch_Config->pusch_PowerControl->deltaMCS = NR_PUSCH_PowerControl__deltaMCS_enabled;
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pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToAddModList = NULL;
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pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToReleaseList = NULL;
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pusch_Config->frequencyHopping=NULL;
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