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Merge branch 'develop-nr' into nr_polar_uci

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This commit is contained in:
Florian Kaltenberger
2018-08-27 01:37:57 -07:00
parent d631a32fb3 84f771ceb5
commit 0962fbbecc
189 changed files with 832233 additions and 14369 deletions
Download Patch File Download Diff File Expand all files Collapse all files
.gitignore
+4
View File
@@ -0,0 +1,4 @@
cmake_targets/log/
cmake_targets/ran_build/
targets/bin/
ci-scripts/Jenkinsfile-gitlab
+38
View File
@@ -45,6 +45,44 @@ pipeline {
}
}
}
post {
failure {
script {
def message = "OAI " + JOB_NAME + " build (" + BUILD_ID + "): Merge Conflicts -- Cannot perform CI"
addGitLabMRComment comment: message
}
}
}
}
stage ("Start VM -- cppcheck") {
steps {
sh "./ci-scripts/createVM.sh --variant cppcheck --job-name ${JOB_NAME} --build-id ${BUILD_ID}"
}
}
stage ("Start VM -- enb-usrp") {
steps {
sh "./ci-scripts/createVM.sh --variant enb-usrp --job-name ${JOB_NAME} --build-id ${BUILD_ID}"
}
}
stage ("Start VM -- phy-sim") {
steps {
sh "./ci-scripts/createVM.sh --variant phy-sim --job-name ${JOB_NAME} --build-id ${BUILD_ID}"
}
}
stage ("Start VM -- gnb-usrp") {
steps {
sh "./ci-scripts/createVM.sh --variant gnb-usrp --job-name ${JOB_NAME} --build-id ${BUILD_ID}"
}
}
stage ("Start VM -- nu-ue-usrp") {
steps {
sh "./ci-scripts/createVM.sh --variant nu-ue-usrp --job-name ${JOB_NAME} --build-id ${BUILD_ID}"
}
}
stage ("Variant Builds") {
ci-scripts/buildOnVM.sh
+63 -19
View File
@@ -24,12 +24,14 @@ function usage {
echo " --workspace #### OR -ws ####"
echo " Specify the workspace."
echo ""
echo " --variant enb-usrp OR -v1"
echo " --variant basic-sim OR -v2"
echo " --variant phy-sim OR -v3"
echo " --variant cppcheck OR -v4"
echo " --variant gnb-usrp OR -v5"
echo " --variant nu-ue-usrp OR -v6"
echo " --variant enb-usrp OR -v1"
echo " --variant basic-sim OR -v2"
echo " --variant phy-sim OR -v3"
echo " --variant cppcheck OR -v4"
echo " --variant gnb-usrp OR -v5"
echo " --variant nu-ue-usrp OR -v6"
echo " --variant enb-ethernet OR -v7"
echo " --variant ue-ethernet OR -v8"
echo " Specify the variant to build."
echo ""
echo " --keep-vm-alive OR -k"
@@ -44,12 +46,14 @@ function variant_usage {
echo "OAI VM Build Check script"
echo " Original Author: Raphael Defosseux"
echo ""
echo " --variant enb-usrp OR -v1"
echo " --variant basic-sim OR -v2"
echo " --variant phy-sim OR -v3"
echo " --variant cppcheck OR -v4"
echo " --variant gnb-usrp OR -v5"
echo " --variant nu-ue-usrp OR -v6"
echo " --variant enb-usrp OR -v1"
echo " --variant basic-sim OR -v2"
echo " --variant phy-sim OR -v3"
echo " --variant cppcheck OR -v4"
echo " --variant gnb-usrp OR -v5"
echo " --variant nu-ue-usrp OR -v6"
echo " --variant enb-ethernet OR -v7"
echo " --variant ue-ethernet OR -v8"
echo ""
}
@@ -65,6 +69,7 @@ VM_TEMPLATE=ci-
JOB_NAME=XX
BUILD_ID=XX
VM_NAME=ci-enb-usrp
VM_MEMORY=2048
ARCHIVES_LOC=enb_usrp
LOG_PATTERN=.Rel14.txt
NB_PATTERN_FILES=4
@@ -126,10 +131,11 @@ case $key in
;;
-v4)
VM_NAME=ci-cppcheck
VM_MEMORY=8192
ARCHIVES_LOC=cppcheck
LOG_PATTERN=cppcheck.xml
NB_PATTERN_FILES=1
BUILD_OPTIONS="--enable=warning --force --xml --xml-version=2"
BUILD_OPTIONS="--enable=warning --force --xml --xml-version=2 -i openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c"
shift
;;
-v5)
@@ -148,6 +154,22 @@ case $key in
BUILD_OPTIONS="--nrUE -w USRP"
shift
;;
-v7)
VM_NAME=ci-enb-ethernet
ARCHIVES_LOC=enb_eth
LOG_PATTERN=.Rel14.txt
NB_PATTERN_FILES=6
BUILD_OPTIONS="--eNB -t ETHERNET --noS1"
shift
;;
-v8)
VM_NAME=ci-ue-ethernet
ARCHIVES_LOC=ue_eth
LOG_PATTERN=.Rel14.txt
NB_PATTERN_FILES=6
BUILD_OPTIONS="--UE -t ETHERNET --noS1"
shift
;;
--variant)
variant="$2"
case $variant in
@@ -174,10 +196,11 @@ case $key in
;;
cppcheck)
VM_NAME=ci-cppcheck
VM_MEMORY=8192
ARCHIVES_LOC=cppcheck
LOG_PATTERN=cppcheck.xml
NB_PATTERN_FILES=1
BUILD_OPTIONS="--enable=warning --force --xml --xml-version=2"
BUILD_OPTIONS="--enable=warning --force --xml --xml-version=2 -i openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c"
;;
gnb-usrp)
VM_NAME=ci-gnb-usrp
@@ -193,6 +216,20 @@ case $key in
NB_PATTERN_FILES=4
BUILD_OPTIONS="--nrUE -w USRP"
;;
enb-ethernet)
VM_NAME=ci-enb-ethernet
ARCHIVES_LOC=enb_eth
LOG_PATTERN=.Rel14.txt
NB_PATTERN_FILES=6
BUILD_OPTIONS="--eNB -t ETHERNET --noS1"
;;
ue-ethernet)
VM_NAME=ci-ue-ethernet
ARCHIVES_LOC=ue_eth
LOG_PATTERN=.Rel14.txt
NB_PATTERN_FILES=6
BUILD_OPTIONS="--UE -t ETHERNET --noS1"
;;
*)
echo ""
echo "Syntax Error: Invalid Variant option -> $variant"
@@ -240,10 +277,16 @@ echo "JENKINS_WKSP = $JENKINS_WKSP"
echo "ARCHIVES_LOC = $ARCHIVES_LOC"
echo "BUILD_OPTIONS = $BUILD_OPTIONS"
echo "############################################################"
echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################"
uvt-kvm create $VM_NAME release=xenial --memory 2048 --cpu 4 --unsafe-caching --template ci-scripts/template-host.xml
IS_VM_ALIVE=`uvt-kvm list | grep -c $VM_NAME`
if [ $IS_VM_ALIVE -eq 0 ]
then
echo "############################################################"
echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################"
uvt-kvm create $VM_NAME release=xenial --memory $VM_MEMORY --cpu 4 --unsafe-caching --template ci-scripts/template-host.xml
fi
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
@@ -267,7 +310,8 @@ then
echo "sudo apt-get --yes install zip cppcheck >> zip-install.txt 2>&1" >> $VM_CMDS
else
echo "echo \"sudo apt-get --yes --quiet install zip subversion libboost-dev \"" >> $VM_CMDS
echo "sudo apt-get --yes install zip subversion libboost-dev > zip-install.txt 2>&1" >> $VM_CMDS
echo "sudo apt-get update > zip-install.txt 2>&1" >> $VM_CMDS
echo "sudo apt-get --yes install zip subversion libboost-dev >> zip-install.txt 2>&1" >> $VM_CMDS
fi
echo "mkdir tmp" >> $VM_CMDS
echo "cd tmp" >> $VM_CMDS
ci-scripts/createVM.sh
Executable
+188
View File
@@ -0,0 +1,188 @@
#!/bin/bash
function usage {
echo "OAI VM Creation script"
echo " Original Author: Raphael Defosseux"
echo " Requirements:"
echo " -- uvtool uvtool-libvirt apt-cacher"
echo " -- xenial image already synced"
echo " Default:"
echo " -- eNB with USRP"
echo ""
echo "Usage:"
echo "------"
echo " createVM.sh [OPTIONS]"
echo ""
echo "Options:"
echo "--------"
echo " --job-name #### OR -jn ####"
echo " Specify the name of the Jenkins job."
echo ""
echo " --build-id #### OR -id ####"
echo " Specify the build ID of the Jenkins job."
echo ""
echo " --variant enb-usrp OR -v1"
echo " --variant basic-sim OR -v2"
echo " --variant phy-sim OR -v3"
echo " --variant cppcheck OR -v4"
echo " --variant gnb-usrp OR -v5"
echo " --variant nu-ue-usrp OR -v6"
echo " --variant enb-ethernet OR -v7"
echo " --variant ue-ethernet OR -v8"
echo " Specify the variant to build."
echo ""
echo " --help OR -h"
echo " Print this help message."
echo ""
}
function variant_usage {
echo "OAI VM Build Check script"
echo " Original Author: Raphael Defosseux"
echo ""
echo " --variant enb-usrp OR -v1"
echo " --variant basic-sim OR -v2"
echo " --variant phy-sim OR -v3"
echo " --variant cppcheck OR -v4"
echo " --variant gnb-usrp OR -v5"
echo " --variant nu-ue-usrp OR -v6"
echo " --variant enb-ethernet OR -v7"
echo " --variant ue-ethernet OR -v8"
echo ""
}
if [ $# -lt 1 ] || [ $# -gt 6 ]
then
echo "Syntax Error: not the correct number of arguments"
echo ""
usage
exit 1
fi
VM_TEMPLATE=ci-
VM_MEMORY=2048
JOB_NAME=XX
BUILD_ID=XX
VM_NAME=ci-enb-usrp
while [[ $# -gt 0 ]]
do
key="$1"
case $key in
-h|--help)
shift
usage
exit 0
;;
-jn|--job-name)
JOB_NAME="$2"
shift
shift
;;
-id|--build-id)
BUILD_ID="$2"
shift
shift
;;
-v1)
VM_NAME=ci-enb-usrp
shift
;;
-v2)
VM_NAME=ci-basic-sim
shift
;;
-v3)
VM_NAME=ci-phy-sim
shift
;;
-v4)
VM_NAME=ci-cppcheck
VM_MEMORY=8192
shift
;;
-v5)
VM_NAME=ci-gnb-usrp
shift
;;
-v6)
VM_NAME=ci-ue-nr-usrp
shift
;;
-v7)
VM_NAME=ci-enb-ethernet
shift
;;
-v8)
VM_NAME=ci-ue-ethernet
shift
;;
--variant)
variant="$2"
case $variant in
enb-usrp)
VM_NAME=ci-enb-usrp
;;
basic-sim)
VM_NAME=ci-basic-sim
;;
phy-sim)
VM_NAME=ci-phy-sim
;;
cppcheck)
VM_NAME=ci-cppcheck
VM_MEMORY=8192
;;
gnb-usrp)
VM_NAME=ci-gnb-usrp
;;
nu-ue-usrp)
VM_NAME=ci-ue-nr-usrp
;;
enb-ethernet)
VM_NAME=ci-enb-ethernet
;;
ue-ethernet)
VM_NAME=ci-ue-ethernet
;;
*)
echo ""
echo "Syntax Error: Invalid Variant option -> $variant"
echo ""
variant_usage
exit 1
esac
shift
shift
;;
*)
echo "Syntax Error: unknown option: $key"
echo ""
usage
exit 1
esac
done
if [ "$JOB_NAME" == "XX" ] || [ "$BUILD_ID" == "XX" ]
then
VM_TEMPLATE=ci-
else
VM_TEMPLATE=${JOB_NAME}-b${BUILD_ID}-
fi
VM_NAME=`echo $VM_NAME | sed -e "s#ci-#$VM_TEMPLATE#"`
VM_CMDS=${VM_NAME}_cmds.txt
echo "VM_NAME = $VM_NAME"
echo "############################################################"
echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################"
uvt-kvm create $VM_NAME release=xenial --memory $VM_MEMORY --cpu 4 --unsafe-caching --template ci-scripts/template-host.xml
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
exit 0
ci-scripts/doGitLabMerge.sh
+7 -3
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@@ -104,6 +104,10 @@ git checkout -f $SOURCE_COMMIT_ID
git merge --ff $TARGET_COMMIT_ID -m "Temporary merge for CI"
exit 0
STATUS=`git status | egrep -c "You have unmerged paths.|fix conflicts"`
if [ $STATUS -ne 0 ]
then
echo "There are merge conflicts.. Cannot perform further build tasks"
STATUS=-1
fi
exit $STATUS
ci-scripts/reportBuildLocally.sh
+37 -1
View File
@@ -232,6 +232,10 @@ function sca_summary_table_footer {
echo " <th>Total</th>" >> ./build_results.html
echo " <th>Unknown</th>" >> ./build_results.html
echo " <th>Unknown</th>" >> ./build_results.html
if [ -f ccp_error_cnt.txt ]
then
rm -f ccp_error_cnt.txt
fi
fi
echo " </tr>" >> ./build_results.html
echo " </table>" >> ./build_results.html
@@ -528,6 +532,30 @@ then
summary_table_footer
fi
if [ -f archives/enb_eth/lte-softmodem-nos1.Rel14.txt ]
then
summary_table_header "OAI Build eNB -- ETHERNET transport option"
summary_table_row "LTE SoftModem w/o S1 - Release 14" ./archives/enb_eth/lte-softmodem-nos1.Rel14.txt "Built target lte-softmodem" ./enb_eth_row1.html
summary_table_row "Coding - Release 14" ./archives/enb_eth/coding.Rel14.txt "Built target coding" ./enb_eth_row2.html
summary_table_row "OAI ETHERNET transport - Release 14" ./archives/enb_eth/oai_eth_transpro.Rel14.txt "Built target oai_eth_transpro" ./enb_eth_row3.html
summary_table_row "Parameters Lib Config - Release 14" ./archives/enb_eth/params_libconfig.Rel14.txt "Built target params_libconfig" ./enb_eth_row4.html
summary_table_row "RB Tools - Release 14" ./archives/enb_eth/rb_tool.Rel14.txt "Built target rb_tool" ./enb_eth_row5.html
summary_table_row "NAS Mesh - Release 14" ./archives/enb_eth/nasmesh.Rel14.txt "Built target nasmesh" ./enb_eth_row6.html
summary_table_footer
fi
if [ -f archives/ue_eth/lte-uesoftmodem-nos1.Rel14.txt ]
then
summary_table_header "OAI Build UE -- ETHERNET transport option"
summary_table_row "LTE UE SoftModem w/o S1 - Release 14" ./archives/ue_eth/lte-uesoftmodem-nos1.Rel14.txt "Built target lte-uesoftmodem" ./ue_eth_row1.html
summary_table_row "Coding - Release 14" ./archives/ue_eth/coding.Rel14.txt "Built target coding" ./ue_eth_row2.html
summary_table_row "OAI ETHERNET transport - Release 14" ./archives/ue_eth/oai_eth_transpro.Rel14.txt "Built target oai_eth_transpro" ./ue_eth_row3.html
summary_table_row "Parameters Lib Config - Release 14" ./archives/ue_eth/params_libconfig.Rel14.txt "Built target params_libconfig" ./ue_eth_row4.html
summary_table_row "RB Tools - Release 14" ./archives/ue_eth/rb_tool.Rel14.txt "Built target rb_tool" ./ue_eth_row5.html
summary_table_row "NAS Mesh - Release 14" ./archives/ue_eth/nasmesh.Rel14.txt "Built target nasmesh" ./ue_eth_row6.html
summary_table_footer
fi
echo " <h3>Details</h3>" >> ./build_results.html
for DETAILS_TABLE in `ls ./enb_usrp_row*.html`
@@ -550,7 +578,15 @@ for DETAILS_TABLE in `ls ./nrue_usrp_row*.html`
do
cat $DETAILS_TABLE >> ./build_results.html
done
rm -f ./enb_usrp_row*.html ./basic_sim_row*.html ./phy_sim_row*.html ./gnb_usrp_row*.html ./nrue_usrp_row*.html
for DETAILS_TABLE in `ls ./enb_eth_row*.html`
do
cat $DETAILS_TABLE >> ./build_results.html
done
for DETAILS_TABLE in `ls ./ue_eth_row*.html`
do
cat $DETAILS_TABLE >> ./build_results.html
done
rm -f ./enb_usrp_row*.html ./basic_sim_row*.html ./phy_sim_row*.html ./gnb_usrp_row*.html ./nrue_usrp_row*.html ./enb_eth_row*.html ./ue_eth_row*.html
echo "</body>" >> ./build_results.html
echo "</html>" >> ./build_results.html
cmake_targets/CMakeLists.txt
+163 -25
View File
@@ -176,7 +176,8 @@ set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,-rpath -Wl,${CMAKE_CU
# these changes are related to hardcoded path to include .h files
add_definitions(-DCMAKER)
set(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS} -g -DMALLOC_CHECK_=3")
set(CMAKE_C_FLAGS_RELWITHDEBINFO "${CMAKE_C_FLAGS} -g -DMALLOC_CHECK_=3 -O2")
#set(CMAKE_C_FLAGS_RELWITHDEBINFO "${CMAKE_C_FLAGS} -g -DMALLOC_CHECK_=3 -O2")
set(CMAKE_C_FLAGS_RELWITHDEBINFO "${CMAKE_C_FLAGS} -g -DMALLOC_CHECK_=3")
set(GIT_BRANCH "UNKNOWN")
@@ -350,7 +351,7 @@ add_custom_command (
add_list2_option(NR_RRC_ASN1_VERSION "NR_Rel15" "ASN.1 version of NR_RRC interface")
if (${NR_RRC_ASN1_VERSION} STREQUAL "NR_Rel15")
set (NR_RRC_GRAMMAR ${OPENAIR2_DIR}/RRC/NR/MESSAGES/asn1c/ASN1_files/NR-RRC-Definitions.asn)
set (NR_RRC_GRAMMAR ${OPENAIR2_DIR}/RRC/NR/MESSAGES/asn1c/ASN1_files/NR-RRC-38331-f10.asn)
endif (${NR_RRC_ASN1_VERSION} STREQUAL "NR_Rel15")
set (NR_RRC_FULL_DIR ${asn1_generated_dir}/${NR_RRC_ASN1_VERSION})
@@ -359,12 +360,15 @@ if(NOT EXISTS ${asn1c_call})
message( FATAL_ERROR "The script ${asn1c_call} must be present" )
endif(NOT EXISTS ${asn1c_call})
message("calling ASN1C_PREFIX=NR_ asn1c -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${RRC_FULL_DIR} ${RRC_GRAMMAR}")
message("calling ASN1C_PREFIX=NR_ asn1c -findirect-choice -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${RRC_FULL_DIR} ${RRC_GRAMMAR}")
execute_process(COMMAND ${asn1c_call}
${NR_RRC_FULL_DIR}
${NR_RRC_GRAMMAR}
NR_RRC
RESULT_VARIABLE ret)
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET )
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${asn1c_call}: error")
@@ -373,7 +377,6 @@ endif (NOT ${ret} STREQUAL 0)
if(NOT EXISTS ${fix_asn1c_call})
message( FATAL_ERROR "The script ${fix_asn1c_call} must be present" )
endif(NOT EXISTS ${fix_asn1c_call})
execute_process(COMMAND ${fix_asn1c_call}
${NR_RRC_FULL_DIR}
NR_RRC
@@ -388,13 +391,16 @@ file(GLOB nr_rrc_source ${NR_RRC_FULL_DIR}/*.c)
file(GLOB nr_rrc_h ${NR_RRC_FULL_DIR}/*.h)
set(nr_rrc_h ${nr_rrc_h} ${NR_RRC_FULL_DIR}/asn1_constants.h)
set_source_files_properties(${nr_rrc_source} PROPERTIES COMPILE_FLAGS -w) # suppress warnings from generated code
add_library(NR_RRC_LIB ${nr_rrc_h} ${nr_rrc_source}
${OPENAIR2_DIR}/RRC/NR/MESSAGES/asn1_msg.c)
add_library(NR_RRC_LIB
${nr_rrc_h}
${nr_rrc_source}
${OPENAIR2_DIR}/RRC/NR/MESSAGES/asn1_msg.c)
include_directories ("${NR_RRC_FULL_DIR}")
# add the command to generate the source code
# Warning: if you modify ASN.1 source file to generate new C files, cmake should be re-run instead of make
add_custom_command (
OUTPUT ${NR_RRC_FULL_DIR}/asn1_constants.h
COMMAND ${asn1c_call} ${NR_RRC_FULL_DIR} ${NR_RRC_GRAMMAR} RRC
@@ -431,7 +437,11 @@ message("calling ASN1C_PREFIX=S1AP_ asn1c -fcompound-names -fno-include-deps -ge
execute_process(COMMAND mkdir -p ${S1AP_C_DIR}
COMMAND env "ASN1C_PREFIX=S1AP_" asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${S1AP_C_DIR} ${S1AP_ASN_DIR}/${S1AP_ASN_FILES}
RESULT_VARIABLE ret)
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET
)
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${ret}: error")
@@ -491,10 +501,21 @@ endif(${X2AP_VERSION} STREQUAL "R14")
set(X2AP_ASN_DIR ${X2AP_DIR}/MESSAGES/ASN1/${ASN1RELDIR})
set(X2AP_C_DIR ${asn1_generated_dir}/X2AP_${ASN1RELDIR})
message("calling asn1c -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${X2AP_C_DIR} ${X2AP_ASN_DIR}/${X2AP_ASN_FILES}")
execute_process(COMMAND mkdir -p ${X2AP_C_DIR}
COMMAND env "ASN1C_PREFIX=X2AP_" asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${X2AP_C_DIR} ${X2AP_ASN_DIR}/${X2AP_ASN_FILES}
RESULT_VARIABLE ret)
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET )
#execute_process(COMMAND ${asn1c_call}
# ${X2AP_C_DIR}
# ${X2AP_ASN_DIR}/${X2AP_ASN_FILES}
# X2AP
# RESULT_VARIABLE ret)
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${asn1c_call}: error")
endif (NOT ${ret} STREQUAL 0)
@@ -510,6 +531,13 @@ add_custom_command (
DEPENDS ${X2AP_ASN_DIR}/${X2AP_ASN_FILES}
)
#add_custom_command (
# OUTPUT ${X2AP_C_DIR}/X2AP_asn_constant.h
# COMMAND ${asn1c_call} ${X2AP_C_DIR} ${X2AP_ASN_DIR}/${X2AP_ASN_FILES} X2AP
# COMMAND ${fix_asn1c_call} ${X2AP_C_DIR} X2AP ${X2AP_VERSION}
# DEPENDS ${X2AP_ASN_DIR}/${X2AP_ASN_FILES}
# )
add_library(X2AP_LIB
${X2AP_source}
${X2AP_DIR}/x2ap_common.c
@@ -794,6 +822,7 @@ include_directories("${OPENAIR_DIR}/targets/ARCH/COMMON")
include_directories("${OPENAIR_DIR}/targets/ARCH/EXMIMO/USERSPACE/LIB/")
include_directories("${OPENAIR_DIR}/targets/ARCH/EXMIMO/DEFS")
include_directories("${OPENAIR2_DIR}/ENB_APP")
include_directories("${OPENAIR2_DIR}/GNB_APP")
include_directories("${OPENAIR2_DIR}/ENB_APP/CONTROL_MODULES/MAC")
include_directories("${OPENAIR2_DIR}/ENB_APP/CONTROL_MODULES/RRC")
include_directories("${OPENAIR2_DIR}/ENB_APP/CONTROL_MODULES/PDCP")
@@ -1002,6 +1031,7 @@ set(SCHED_SRC
add_library(SCHED_LIB ${SCHED_SRC})
set(SCHED_NR_SRC
${OPENAIR1_DIR}/SCHED_NR/fapi_nr_l1.c
${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_common.c
${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_gNB.c
)
@@ -1023,6 +1053,17 @@ set(SCHED_SRC_UE
)
add_library(SCHED_UE_LIB ${SCHED_SRC_UE})
set(SCHED_SRC_NR_UE
${OPENAIR1_DIR}/SCHED_NR_UE/phy_procedures_nr_ue.c
${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_common.c
${OPENAIR1_DIR}/SCHED_NR_UE/fapi_nr_ue_l1.c
${OPENAIR1_DIR}/SCHED_NR_UE/phy_frame_config_nr.c
${OPENAIR1_DIR}/SCHED_NR_UE/harq_nr.c
${OPENAIR1_DIR}/SCHED_NR_UE/pucch_uci_ue_nr.c
${OPENAIR1_DIR}/SCHED_NR_UE/pucch_power_control_ue_nr.c
)
add_library(SCHED_NR_UE_LIB ${SCHED_SRC_NR_UE})
# nFAPI
#################################
set(NFAPI_COMMON_SRC
@@ -1106,7 +1147,13 @@ set(PHY_POLARSRC
)
set(PHY_TURBOIF
${OPENAIR1_DIR}/PHY/CODING/coding_load.c
)
)
set(PHY_LDPCSRC
${OPENAIR1_DIR}/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c
${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_encoder.c
${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c
${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c
)
add_library(coding MODULE ${PHY_TURBOSRC} )
@@ -1259,6 +1306,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/TOOLS/time_meas.c
${OPENAIR1_DIR}/PHY/TOOLS/lut.c
${PHY_POLARSRC}
${PHY_LDPCSRC}
)
set(PHY_NR_UE_SRC
@@ -1277,6 +1325,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/srs_modulation_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/dci_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/pucch_nr.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/ul_ref_seq_nr.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_dmrs_rx.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold_ue.c
@@ -1294,8 +1343,8 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/TOOLS/time_meas.c
${OPENAIR1_DIR}/PHY/TOOLS/lut.c
${OPENAIR1_DIR}/PHY/INIT/nr_init_ue.c
${OPENAIR1_DIR}/SCHED_NR_UE/phy_procedures_nr_ue.c
#${OPENAIR1_DIR}/SCHED_NR_UE/phy_procedures_nr_common_ue.c
${PHY_POLARSRC}
${PHY_LDPCSRC}
)
@@ -1308,6 +1357,10 @@ if (${COMPILATION_AVX2} STREQUAL "True")
set(PHY_SRC_UE ${PHY_SRC_UE} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
endif ()
if (${COMPILATION_AVX2} STREQUAL "True")
set(PHY_NR_UE_SRC ${PHY_NR_UE_SRC} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
endif ()
add_library(PHY_COMMON ${PHY_SRC_COMMON})
add_library(PHY ${PHY_SRC})
add_library(PHY_UE ${PHY_SRC_UE})
@@ -1318,12 +1371,18 @@ add_library(PHY_RU ${PHY_SRC_RU})
#Layer 2 library
#####################
set(MAC_DIR ${OPENAIR2_DIR}/LAYER2/MAC)
set(NR_MAC_DIR ${OPENAIR2_DIR}/LAYER2/NR_MAC_gNB)
set(NR_UE_MAC_DIR ${OPENAIR2_DIR}/LAYER2/NR_MAC_UE)
set(PHY_INTERFACE_DIR ${OPENAIR2_DIR}/PHY_INTERFACE)
set(NR_PHY_INTERFACE_DIR ${OPENAIR2_DIR}/NR_PHY_INTERFACE)
set(NR_UE_PHY_INTERFACE_DIR ${OPENAIR2_DIR}/NR_UE_PHY_INTERFACE)
set(RLC_DIR ${OPENAIR2_DIR}/LAYER2/RLC)
set(RLC_UM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/UM_v9.3.0)
set(RLC_AM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/AM_v9.3.0)
set(RLC_TM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/TM_v9.3.0)
set(RRC_DIR ${OPENAIR2_DIR}/RRC/LTE)
set(NR_RRC_DIR ${OPENAIR2_DIR}/RRC/NR)
set(NR_UE_RRC_DIR ${OPENAIR2_DIR}/RRC/NR_UE)
set(PDCP_DIR ${OPENAIR2_DIR}/LAYER2/PDCP_v10.1.0)
set(L2_SRC
${OPENAIR2_DIR}/LAYER2/openair2_proc.c
@@ -1369,6 +1428,9 @@ set(L2_SRC
${RRC_DIR}/L2_interface.c
${RRC_DIR}/L2_interface_common.c
${RRC_DIR}/L2_interface_ue.c
${NR_RRC_DIR}/rrc_gNB.c
${NR_RRC_DIR}/nr_rrc_common.c
${NR_RRC_DIR}/L2_nr_interface.c
)
set(L2_SRC_UE
@@ -1412,6 +1474,14 @@ set(L2_SRC_UE
${RRC_DIR}/L2_interface_ue.c
)
set(NR_L2_SRC_UE
${NR_UE_RRC_DIR}/L2_interface_ue.c
${NR_UE_RRC_DIR}/main_ue.c
${NR_UE_RRC_DIR}/rrc_UE.c
# ${NR_UE_RRC_DIR}/mac_vars.c
#${RRC_DIR}/rrc_UE.c
)
set (MAC_SRC
${PHY_INTERFACE_DIR}/IF_Module.c
${MAC_DIR}/main.c
@@ -1432,8 +1502,15 @@ set (MAC_SRC
${MAC_DIR}/pre_processor.c
${MAC_DIR}/config.c
${MAC_DIR}/config_ue.c
${NR_PHY_INTERFACE_DIR}/NR_IF_Module.c
${NR_MAC_DIR}/main.c
${NR_MAC_DIR}/config.c
${NR_MAC_DIR}/gNB_scheduler.c
${NR_MAC_DIR}/gNB_scheduler_bch.c
${NR_MAC_DIR}/gNB_scheduler_primitives.c
)
set (MAC_SRC_UE
${MAC_DIR}/main_ue.c
${MAC_DIR}/ue_procedures.c
@@ -1441,27 +1518,84 @@ set (MAC_SRC_UE
${MAC_DIR}/l1_helpers.c
${MAC_DIR}/rar_tools_ue.c
${MAC_DIR}/config_ue.c
)
set (MAC_NR_SRC_UE
${NR_UE_PHY_INTERFACE_DIR}/NR_IF_Module.c
${NR_UE_MAC_DIR}/config_ue.c
${NR_UE_MAC_DIR}/mac_vars.c
${NR_UE_MAC_DIR}/main_ue_nr.c
${NR_UE_MAC_DIR}/nr_ue_procedures.c
)
set (ENB_APP_SRC
${OPENAIR2_DIR}/ENB_APP/enb_app.c
${OPENAIR2_DIR}/ENB_APP/enb_config.c
${OPENAIR2_DIR}/ENB_APP/RRC_config_tools.c
)
set (GNB_APP_SRC
${OPENAIR2_DIR}/GNB_APP/gnb_app.c
${OPENAIR2_DIR}/GNB_APP/gnb_config.c
)
add_library(L2
${L2_SRC}
${MAC_SRC}
${ENB_APP_SRC})
${ENB_APP_SRC}
${GNB_APP_SRC})
# ${OPENAIR2_DIR}/RRC/L2_INTERFACE/openair_rrc_L2_interface.c)
add_library(L2_UE
${L2_SRC_UE}
${MAC_SRC_UE}
#${MAC_NR_SRC_UE}
)
add_library( NR_L2_UE
#${L2_SRC_UE}
${NR_L2_SRC_UE}
${MAC_NR_SRC_UE}
#${MAC_SRC_UE}
)
include_directories(${NFAPI_USER_DIR})
set ( NR_LTE_UE_REUSE_SRC
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_sync_timefreq.c
${OPENAIR1_DIR}/SCHED/phy_procedures_lte_common.c
#${OPENAIR1_DIR}/SCHED_UE/phy_procedures_lte_ue.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_mcs.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pmch_common.c
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_dl_cell_spec.c
${OPENAIR1_DIR}/PHY/CODING/lte_segmentation.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/prach_common.c
# ${OPENAIR1_DIR}/PHY/INIT/lte_init_ue.c
${OPENAIR1_DIR}/PHY/CODING/crc_byte.c
${OPENAIR1_DIR}/PHY/CODING/viterbi_lte.c
${OPENAIR1_DIR}/PHY/CODING/viterbi.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/phich_common.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci_tools_common.c
${OPENAIR1_DIR}/PHY/CODING/lte_rate_matching.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte_lte.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte.c
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_gold.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_est_freq_offset.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_dl_channel_estimation.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_ue_measurements.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c
#${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c
)
add_library( NR_LTE_UE_REUSE_LIB
${NR_LTE_UE_REUSE_SRC}
)
include_directories("${OPENAIR2_DIR}/NR_UE_PHY_INTERFACE")
include_directories("${OPENAIR2_DIR}/LAYER2/NR_MAC_UE")
include_directories("${OPENAIR1_DIR}/SCHED_NR_UE")
#include_directories("${NFAPI_USER_DIR}"")
# L3 Libs
##########################
@@ -2135,6 +2269,7 @@ target_link_libraries (lte-uesoftmodem-nos1 ${T_LIB})
add_executable(nr-softmodem
${rrc_h}
${nr_rrc_h}
${s1ap_h}
${OPENAIR_BIN_DIR}/messages_xml.h
${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
@@ -2142,7 +2277,7 @@ add_executable(nr-softmodem
${OPENAIR_TARGETS}/RT/USER/nr-ru.c
${OPENAIR_TARGETS}/RT/USER/nr-softmodem.c
${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
${OPENAIR_TARGETS}/COMMON/create_tasks.c
${OPENAIR_TARGETS}/COMMON/create_nr_tasks.c
${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
${OPENAIR_DIR}/common/utils/utils.c
@@ -2159,7 +2294,7 @@ target_link_libraries (nr-softmodem
-Wl,--start-group
UTIL HASHTABLE SCTP_CLIENT UDP SCHED_LIB SCHED_RU_LIB SCHED_NR_LIB PHY_NR PHY PHY_COMMON PHY_RU LFDS GTPV1U SECU_CN SECU_OSA
${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} ${FLEXRAN_AGENT_LIB} LFDS7 ${MSC_LIB} ${RAL_LIB} ${NAS_UE_LIB}
RRC_LIB S1AP_LIB S1AP_ENB L2
RRC_LIB NR_RRC_LIB S1AP_LIB S1AP_ENB L2
NFAPI_COMMON_LIB NFAPI_LIB NFAPI_VNF_LIB NFAPI_PNF_LIB NFAPI_USER_LIB
-Wl,--end-group z dl)
@@ -2195,18 +2330,18 @@ add_executable(nr-softmodem-nos1
${SHLIB_LOADER_SOURCES}
)
target_link_libraries (nr-softmodem
target_link_libraries (nr-softmodem-nos1
-Wl,--start-group
UTIL HASHTABLE SCTP_CLIENT UDP SCHED_LIB SCHED_RU_LIB SCHED_NR_LIB PHY_NR PHY PHY_COMMON PHY_RU LFDS GTPV1U SECU_CN SECU_OSA
${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} ${FLEXRAN_AGENT_LIB} LFDS7 ${MSC_LIB} ${RAL_LIB} ${NAS_UE_LIB} ${MIH_LIB}
RRC_LIB S1AP_LIB S1AP_ENB L2
RRC_LIB NR_RRC_LIB S1AP_LIB S1AP_ENB L2
NFAPI_COMMON_LIB NFAPI_LIB NFAPI_VNF_LIB NFAPI_PNF_LIB NFAPI_USER_LIB
-Wl,--end-group z dl)
target_link_libraries (nr-softmodem ${LIBXML2_LIBRARIES})
target_link_libraries (nr-softmodem pthread m ${CONFIG_LIBRARIES} rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} ${NETTLE_LIBRARIES} sctp ${XFORMS_LIBRARIES} ${PROTOBUF_LIB} ${CMAKE_DL_LIBS} ${LIBYAML_LIBRARIES})
target_link_libraries (nr-softmodem ${LIB_LMS_LIBRARIES})
target_link_libraries (nr-softmodem ${T_LIB})
target_link_libraries (nr-softmodem-nos1 ${LIBXML2_LIBRARIES})
target_link_libraries (nr-softmodem-nos1 pthread m ${CONFIG_LIBRARIES} rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} ${NETTLE_LIBRARIES} sctp ${XFORMS_LIBRARIES} ${PROTOBUF_LIB} ${CMAKE_DL_LIBS} ${LIBYAML_LIBRARIES})
target_link_libraries (nr-softmodem-nos1 ${LIB_LMS_LIBRARIES})
target_link_libraries (nr-softmodem-nos1 ${T_LIB})
# nr-uesoftmodem is UE implementation
#######################################
@@ -2219,7 +2354,7 @@ add_executable(nr-uesoftmodem
${OPENAIR_TARGETS}/RT/USER/nr-ue.c
${OPENAIR_TARGETS}/RT/USER/nr-uesoftmodem.c
${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
${OPENAIR_TARGETS}/COMMON/create_tasks_ue.c
# ${OPENAIR_TARGETS}/COMMON/create_tasks_ue.c
${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
${OPENAIR3_DIR}/NAS/UE/nas_ue_task.c
@@ -2234,7 +2369,7 @@ add_executable(nr-uesoftmodem
target_link_libraries (nr-uesoftmodem
-Wl,--start-group
RRC_LIB S1AP_LIB S1AP_ENB GTPV1U SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_RU_LIB SCHED_UE_LIB PHY_NR_UE PHY_COMMON PHY_UE PHY_RU LFDS L2_UE
RRC_LIB NR_RRC_LIB S1AP_LIB S1AP_ENB GTPV1U SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_RU_LIB SCHED_NR_UE_LIB PHY_NR_UE PHY_RU LFDS NR_L2_UE NR_LTE_UE_REUSE_LIB
${MSC_LIB} ${RAL_LIB} ${NAS_UE_LIB} ${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} LFDS7
-Wl,--end-group z dl)
@@ -2269,7 +2404,7 @@ add_executable(nr-uesoftmodem-nos1
target_link_libraries (nr-uesoftmodem-nos1
-Wl,--start-group
RRC_LIB S1AP_LIB S1AP_ENB GTPV1U SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_RU_LIB SCHED_UE_LIB PHY_NR_UE PHY_COMMON PHY_UE PHY_RU LFDS L2_UE
RRC_LIB S1AP_LIB S1AP_ENB GTPV1U SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_RU_LIB SCHED_UE_LIB SCHED_NR_UE_LIB PHY_NR_UE PHY_COMMON PHY_UE PHY_RU LFDS L2_UE
${MSC_LIB} ${RAL_LIB} ${NAS_UE_LIB} ${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} LFDS7
-Wl,--end-group z dl)
@@ -2414,6 +2549,9 @@ target_link_libraries (dlsim_tm4
add_executable(polartest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/polartest.c)
target_link_libraries(polartest m SIMU PHY PHY_NR PHY_COMMON -lm ${ATLAS_LIBRARIES})
add_executable(ldpctest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c)
target_link_libraries(ldpctest m SIMU PHY PHY_NR ${ATLAS_LIBRARIES})
foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim)
add_executable(${myExe}
cmake_targets/build_oai
+1 -1
View File
@@ -544,7 +544,7 @@ function main() {
if [ "$NOS1" = "1" ] ; then
build_dir=noS1_ran_build
if [ "$gNB" = "1" ] ; then
exec=nr-softmodem
exec=nr-softmodem-nos1
elif [ "$nrUE" = "1" ] ; then
exec=nr-uesoftmodem-nos1
elif [ "$eNB" = "1" ] ; then
cmake_targets/noS1_ran_build/CMakeLists.template
+61
View File
@@ -0,0 +1,61 @@
set ( DEBUG_OMG False )
set ( DISABLE_XER_PRINT False )
set ( DRIVER2013 True )
set ( ENABLE_ITTI True )
set ( ENABLE_NAS_UE_LOGGING False )
set ( ENABLE_NEW_MULTICAST True )
set ( ENABLE_RAL False )
set ( ENABLE_SECURITY False )
set ( ENABLE_STANDALONE_EPC False)
set ( ENABLE_USE_CPU_EXECUTION_TIME True )
set ( ENABLE_USE_MME False )
set ( ENABLE_USE_RAW_SOCKET_FOR_SGI False)
set ( ENABLE_VCD_FIFO False )
set ( ENB_MODE True )
set ( EXMIMO_IOT True )
set ( JUMBO_FRAME True )
set ( LARGE_SCALE False )
set ( LINK_ENB_PDCP_TO_GTPV1U False)
set ( LINUX_LIST False )
set ( LINUX True )
set ( LOCALIZATION False )
set ( LOG_NO_THREAD 1 )
set ( DEADLINE_SCHEDULER False )
set ( MAC_CONTEXT 1 )
set ( MAX_NUM_CCs 1 )
set ( MESSAGE_CHART_GENERATOR False )
set ( MESSAGE_CHART_GENERATOR_RLC_MAC False )
set ( MESSAGE_CHART_GENERATOR_PHY False )
set ( MSG_PRINT False )
set ( MU_RECEIVER False )
set ( NAS_ADDRESS_FIX False )
set ( NAS_BUILT_IN_UE False)
set ( NAS_MME False )
set ( NAS_UE False )
set ( NB_ANTENNAS_RX "2" )
set ( NB_ANTENNAS_TX "2" )
set ( NO_RRM True )
set ( OAISIM False )
set ( OAI_NW_DRIVER_TYPE_ETHERNET False )
set ( OAI_NW_DRIVER_USE_NETLINK True )
set ( OPENAIR2 True )
set ( OPENAIR_LTE True )
set ( PACKAGE_NAME "nr-softmodem-nos1" )
set ( PDCP_USE_NETLINK True )
set ( PDCP_MSG_PRINT False )
set ( PHY_CONTEXT False )
set ( PHY_EMUL False )
set ( PHYSIM True )
set ( RF_BOARD "False" )
set ( RRC_ASN1_VERSION "Rel15" )
set ( RLC_STOP_ON_LOST_PDU False )
set ( RRC_MSG_PRINT False )
set ( SECU False )
set ( SMBV False )
set ( TEST_OMG False )
set ( USE_3GPP_ADDR_AS_LINK_ADDR False )
set ( USE_MME "R10" )
set ( XER_PRINT False )
set ( DEBUG_PHY False )
set ( DEBUG_PHY_PROC False)
set ( DEBUG_DLSCH False)
cmake_targets/tools/build_helper
+5 -6
View File
@@ -277,7 +277,7 @@ check_install_usrp_uhd_driver(){
$SUDO apt-get -y --allow-unauthenticated install libuhd-dev libuhd003 uhd-host
elif [[ "$OS_BASEDISTRO" == "fedora" ]]; then
$SUDO $INSTALLER -y install python boost libusb-devel libusbx-devel boost-devel python-mako python-docutils cmake
$SUDO pip install requests
$SUDO -H pip install requests
if [[ "$OS_DISTRO" == "rhel" ]] || [[ "$OS_DISTRO" == "centos" ]]; then
# until EPEL repo hasn't bumped UHD driver to >=3.10 in EPEL, build driver from source
$SUDO $INSTALLER -y remove uhd uhd-devel uhd-firmware
@@ -460,8 +460,8 @@ check_install_additional_tools (){
#The packages below are already installed for Redhat distros (RHEL, CentOS, Fedora)
if [[ "$OS_DISTRO" == "ubuntu" ]]; then
$SUDO pip install paramiko
$SUDO pip install pyroute2 colorama
$SUDO -H pip install paramiko
$SUDO -H pip install pyroute2 colorama
log_netiface=$OPENAIR_DIR/cmake_targets/log/netiface_install_log.txt
echo_info "Installing Netinterfaces package. The logfile for installation is in $log_netiface"
(
@@ -659,10 +659,9 @@ install_asn1c_from_source(){
echo_info "\nInstalling ASN1. The log file for ASN1 installation is here: $asn1_install_log "
(
$SUDO rm -rf /tmp/asn1c
# GIT_SSL_NO_VERIFY=true git clone https://gitlab.eurecom.fr/oai/asn1c.git /tmp/asn1c
git clone https://github.com/velichkov/asn1c /tmp/asn1c
git clone https://github.com/brchiu/asn1c /tmp/asn1c
cd /tmp/asn1c
git checkout s1ap
git checkout velichkov_s1ap_plus_option_group
test -f configure || autoreconf -iv
./configure
make -j`nproc`
cmake_targets/tools/generate_asn1
+10 -2
View File
@@ -107,12 +107,16 @@ case "$module" in
;;
NR_RRC )
export ASN1C_PREFIX=NR_
asn1c -gen-PER -fcompound-names -no-gen-example fixed_grammar.asn 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
asn1c -gen-PER -fcompound-names -findirect-choice -no-gen-example fixed_grammar.asn 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
;;
S1AP )
export ASN1C_PREFIX=S1AP_
asn1c -gen-PER -fcompound-names -no-gen-example fixed_grammar.asn 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
;;
X2AP )
export ASN1C_PREFIX=X2AP_
asn1c -gen-PER -fcompound-names -no-gen-example fixed_grammar.asn 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
;;
esac
@@ -129,12 +133,16 @@ case "$module" in
;;
NR_RRC )
export ASN1C_PREFIX=NR_
asn1c -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example $* 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
asn1c -fcompound-names -findirect-choice -fno-include-deps -gen-PER -no-gen-OER -no-gen-example $* 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
;;
S1AP )
export ASN1C_PREFIX=S1AP_
asn1c -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example $* 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
;;
X2AP )
export ASN1C_PREFIX=X2AP_
asn1c -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example $* 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
;;
esac
fi
common/ran_context.h
+12 -1
View File
@@ -49,7 +49,8 @@
#include "PHY/defs_L1_NB_IoT.h"
#include "RRC/LTE/defs_NB_IoT.h"
#include "RRC/NR/defs_NR.h"
#include "RRC/NR/nr_rrc_defs.h"
typedef struct {
/// RAN context config file name
@@ -68,14 +69,22 @@ typedef struct {
int nb_macrlc_inst;
/// Number of NB_IoT MACRLC instances in this node
int nb_nb_iot_macrlc_inst;
/// Number of NR MACRLC instances in this node
int nb_nr_macrlc_inst;
/// Number of component carriers per instance in this node
int *nb_mac_CC;
/// Number of component carriers per instance in this node
int *nb_nr_mac_CC;
/// Number of L1 instances in this node
int nb_L1_inst;
/// Number of NB_IoT L1 instances in this node
int nb_nb_iot_L1_inst;
/// Number of NR L1 instances in this node
int nb_nr_L1_inst;
/// Number of Component Carriers per instance in this node
int *nb_L1_CC;
/// Number of NR Component Carriers per instance in this node
int *nb_nr_L1_CC;
/// Number of RU instances in this node
int nb_RU;
/// FlexRAN context variables
@@ -96,6 +105,8 @@ typedef struct {
struct eNB_MAC_INST_s **mac;
/// NB_IoT MAC context variables
struct eNB_MAC_INST_NB_IoT_s **nb_iot_mac;
/// NR MAC context variables
struct gNB_MAC_INST_s **nrmac;
/// GTPu descriptor
gtpv1u_data_t *gtpv1u_data_g;
/// RU descriptors. These describe what each radio unit is supposed to do and contain the necessary functions for fronthaul interfaces
nfapi/oai_integration/nfapi_vnf.c
+20 -1
View File
@@ -31,7 +31,7 @@
#include <netinet/in.h>
#include <arpa/inet.h>
#include "nfapi_interface.h"
#include "nfapi_nr_interface.h"
#include "nfapi_vnf_interface.h"
#include "nfapi.h"
#include "vendor_ext.h"
@@ -1161,6 +1161,25 @@ int oai_nfapi_dl_config_req(nfapi_dl_config_request_t *dl_config_req)
return retval;
}
int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req)
{
nfapi_vnf_p7_config_t *p7_config = vnf.p7_vnfs[0].config;
dl_config_req->header.phy_id = 1; // DJP HACK TODO FIXME - need to pass this around!!!!
int retval = nfapi_vnf_p7_dl_config_req(p7_config, dl_config_req);
dl_config_req->dl_config_request_body.number_pdcch_ofdm_symbols = 1;
dl_config_req->dl_config_request_body.number_dci = 0;
dl_config_req->dl_config_request_body.number_pdu = 0;
dl_config_req->dl_config_request_body.number_pdsch_rnti = 0;
if (retval!=0) {
LOG_E(PHY, "%s() Problem sending retval:%d\n", __FUNCTION__, retval);
}
return retval;
}
int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req)
{
nfapi_vnf_p7_config_t *p7_config = vnf.p7_vnfs[0].config;
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h
+57
View File
@@ -0,0 +1,57 @@
#ifndef _FAPI_NR_UE_CONSTANTS_H_
#define _FAPI_NR_UE_CONSTANTS_H_
// constants defined by specification 38.331
#define FAPI_NR_MAX_NUM_DL_ALLOCATIONS 16
#define FAPI_NR_MAX_NUM_UL_ALLOCATIONS 16
#define FAPI_NR_MAX_NUM_SERVING_CELLS 32
#define FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET 16
#define FAPI_NR_MAX_NUM_CANDIDATE_BEAMS 16
#define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS 64
/// RX_IND
#define FAPI_NR_RX_PDU_TYPE_MIB 0x01
#define FAPI_NR_RX_PDU_TYPE_SIB 0x02
#define FAPI_NR_RX_PDU_TYPE_DLSCH 0x03
#define FAPI_NR_DCI_IND 0x04
#define FAPI_NR_SIBS_MASK_SIB1 0x1
/// DCI_IND
#define FAPI_NR_DCI_TYPE_0_0 0x01
#define FAPI_NR_DCI_TYPE_0_1 0x02
#define FAPI_NR_DCI_TYPE_1_0 0x03
#define FAPI_NR_DCI_TYPE_1_1 0x04
#define FAPI_NR_DCI_TYPE_2_0 0x05
#define FAPI_NR_DCI_TYPE_2_1 0x06
#define FAPI_NR_DCI_TYPE_2_2 0x07
#define FAPI_NR_DCI_TYPE_2_3 0x08
/// TX_REQ
/// DL_CONFIG_REQ
#define FAPI_NR_DL_CONFIG_LIST_NUM 10
#define FAPI_NR_DL_CONFIG_TYPE_DCI 0x01
#define FAPI_NR_DL_CONFIG_TYPE_DLSCH 0x02
#define CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
#define CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02
#define PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE 0x01
#define PRECODER_GRANULARITY_ALL_CONTIGUOUS_RBS 0x02
/// UL_CONFIG_REQ
#define FAPI_NR_UL_CONFIG_LIST_NUM 10
#define FAPI_NR_DL_CONFIG_TYPE_PRACH 0x01
#define FAPI_NR_DL_CONFIG_TYPE_PUCCH 0x02
#define FAPI_NR_DL_CONFIG_TYPE_PUSCH 0x03
#endif
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+765
View File
@@ -0,0 +1,765 @@
/*
* Copyright 2017 Cisco Systems, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef _FAPI_NR_UE_INTERFACE_H_
#define _FAPI_NR_UE_INTERFACE_H_
#include "stddef.h"
#include "platform_types.h"
#include "fapi_nr_ue_constants.h"
/*
typedef unsigned int uint32_t;
typedef unsigned short uint16_t;
typedef unsigned char uint8_t;
typedef signed int int32_t;
typedef signed short int16_t;
typedef signed char int8_t;
*/
typedef struct {
uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t tpc_cmd_number ; // 5 TPC_CMD_NUMBER: The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
uint8_t block_number ; // 6 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
uint8_t short_messages ; // 9 SHORT_MESSAGES:
uint16_t freq_dom_resource_assignment_UL; // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
uint16_t freq_dom_resource_assignment_DL; // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
uint8_t vrb_to_prb_mapping ; // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 16 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 18 TB1_MCS:
uint8_t tb1_ndi ; // 19 TB1_NDI:
uint8_t tb1_rv ; // 20 TB1_RV:
uint8_t tb2_mcs ; // 21 TB2_MCS:
uint8_t tb2_ndi ; // 22 TB2_NDI:
uint8_t tb2_rv ; // 23 TB2_RV:
uint8_t mcs ; // 24 MCS:
uint8_t ndi ; // 25 NDI:
uint8_t rv ; // 26 RV:
uint8_t harq_process_number ; // 27 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
uint8_t first_dai ; // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tb_scaling ; // 31 TB_SCALING:
uint8_t tpc_pusch ; // 32 TPC_PUSCH:
uint8_t tpc_pucch ; // 33 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 34 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t srs_resource_ind ; // 36 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 37 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 40 SRS_REQUEST:
uint8_t tpc_cmd_number_format2_3 ; // 41 TPC_CMD_NUMBER_FORMAT2_3:
uint8_t csi_request ; // 42 CSI_REQUEST:
uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 45 PTRS_DMRS:
uint8_t beta_offset_ind ; // 46 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
uint8_t ul_sch_ind ; // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
uint16_t padding_nr_dci ; // 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
uint8_t sul_ind_0_0 ; // 50 SUL_IND_0_0:
uint8_t ra_preamble_index ; // 51 RA_PREAMBLE_INDEX:
uint8_t sul_ind_1_0 ; // 52 SUL_IND_1_0:
uint8_t ss_pbch_index ; // 53 SS_PBCH_INDEX
uint8_t prach_mask_index ; // 54 PRACH_MASK_INDEX
uint8_t reserved_nr_dci ; // 55 RESERVED_NR_DCI
} fapi_nr_dci_pdu_rel15_t;
typedef struct {
uint8_t uci_format;
uint8_t uci_channel;
uint8_t harq_ack_bits;
uint32_t harq_ack;
uint8_t csi_bits;
uint32_t csi;
uint8_t sr_bits;
uint32_t sr;
} fapi_nr_uci_pdu_rel15_t;
typedef struct {
/// frequency_domain_resource;
//uint32_t rb_start;
//uint32_t rb_end;
uint64_t frequency_domain_resource;
uint16_t rb_offset;
uint8_t duration;
uint8_t cce_reg_mapping_type; // interleaved or noninterleaved
uint8_t cce_reg_interleaved_reg_bundle_size; // valid if CCE to REG mapping type is interleaved type
uint8_t cce_reg_interleaved_interleaver_size; // valid if CCE to REG mapping type is interleaved type
uint8_t cce_reg_interleaved_shift_index; // valid if CCE to REG mapping type is interleaved type
uint8_t precoder_granularity;
uint16_t pdcch_dmrs_scrambling_id;
uint8_t tci_state_pdcch;
uint8_t tci_present_in_dci;
} fapi_nr_coreset_t;
//
// Top level FAPI messages
//
//
// P7
//
typedef struct {
uint16_t rnti;
uint8_t dci_format;
fapi_nr_dci_pdu_rel15_t dci;
} fapi_nr_dci_indication_pdu_t;
///
typedef struct {
uint32_t sfn_slot;
uint16_t number_of_dcis;
fapi_nr_dci_indication_pdu_t dci_list[10];
} fapi_nr_dci_indication_t;
typedef struct {
uint32_t pdu_length;
uint8_t* pdu;
} fapi_nr_pdsch_pdu_t;
typedef struct {
uint8_t* pdu; // 3bytes
uint8_t additional_bits;
uint8_t ssb_index;
uint8_t ssb_length;
uint16_t cell_id;
} fapi_nr_mib_pdu_t;
typedef struct {
uint32_t pdu_length;
uint8_t* pdu;
uint32_t sibs_mask;
} fapi_nr_sib_pdu_t;
typedef struct {
uint8_t pdu_type;
union {
fapi_nr_pdsch_pdu_t pdsch_pdu;
fapi_nr_mib_pdu_t mib_pdu;
fapi_nr_sib_pdu_t sib_pdu;
};
} fapi_nr_rx_indication_body_t;
///
typedef struct {
uint32_t sfn_slot;
uint16_t number_pdus;
fapi_nr_rx_indication_body_t *rx_indication_body;
} fapi_nr_rx_indication_t;
typedef struct {
uint8_t ul_cqi;
uint16_t timing_advance;
uint16_t rnti;
} fapi_nr_tx_config_t;
typedef struct {
uint16_t pdu_length;
uint16_t pdu_index;
uint8_t* pdu;
} fapi_nr_tx_request_body_t;
///
typedef struct {
uint32_t sfn_slot;
fapi_nr_tx_config_t tx_config;
uint16_t number_of_pdus;
fapi_nr_tx_request_body_t *tx_request_body;
} fapi_nr_tx_request_t;
typedef struct {
} fapi_nr_ul_config_rach_pdu;
typedef struct {
} fapi_nr_ul_config_pucch_pdu;
typedef struct {
uint16_t number_rbs;
uint16_t start_rb;
uint16_t number_symbols;
uint16_t start_symbol;
uint8_t mcs;
} fapi_nr_ul_config_pusch_pdu_rel15_t;
typedef struct {
uint16_t rnti;
fapi_nr_ul_config_pusch_pdu_rel15_t ulsch_pdu_rel15;
} fapi_nr_ul_config_pusch_pdu;
typedef struct {
uint8_t pdu_type;
union {
fapi_nr_ul_config_rach_pdu prach_config_pdu;
fapi_nr_ul_config_pucch_pdu pucch_config_pdu;
fapi_nr_ul_config_pusch_pdu ulsch_config_pdu;
};
} fapi_nr_ul_config_request_pdu_t;
///
typedef struct {
uint32_t sfn_slot;
uint8_t number_pdus;
fapi_nr_ul_config_request_pdu_t ul_config_list[FAPI_NR_UL_CONFIG_LIST_NUM];
} fapi_nr_ul_config_request_t;
typedef struct {
uint16_t rnti;
fapi_nr_coreset_t coreset;
uint32_t duration;
uint8_t number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint16_t monitoring_symbols_within_slot;
// DCI foramt-specific
uint8_t format_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint8_t format_2_3_monitorying_periodicity;
uint8_t format_2_3_number_of_candidates;
} fapi_nr_dl_config_dci_dl_pdu_rel15_t;
typedef struct {
fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15;
} fapi_nr_dl_config_dci_pdu;
//typedef fapi_nr_dci_pdu_rel15_t fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
uint16_t number_rbs;
uint16_t start_rb;
uint16_t number_symbols;
uint16_t start_symbol;
uint8_t mcs;
uint8_t rv;
// to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
} fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
uint16_t rnti;
fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_rel15;
} fapi_nr_dl_config_dlsch_pdu;
typedef struct {
uint8_t pdu_type;
union {
fapi_nr_dl_config_dci_pdu dci_config_pdu;
fapi_nr_dl_config_dlsch_pdu dlsch_config_pdu;
};
} fapi_nr_dl_config_request_pdu_t;
typedef struct {
uint32_t sfn_slot;
uint8_t number_pdus;
fapi_nr_dl_config_request_pdu_t dl_config_list[FAPI_NR_DL_CONFIG_LIST_NUM];
} fapi_nr_dl_config_request_t;
//
// P5
//
typedef struct {
fapi_nr_coreset_t coreset;
uint8_t monitoring_slot_peridicity;
uint8_t monitoring_slot_offset;
uint16_t duration;
uint16_t monitoring_symbols_within_slot;
uint8_t number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint8_t dci_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint8_t dci_2_3_monitorying_periodicity;
uint8_t dci_2_3_number_of_candidates;
} fapi_nr_search_space_t;
typedef struct {
fapi_nr_search_space_t search_space_sib1;
fapi_nr_search_space_t search_space_others_sib;
fapi_nr_search_space_t search_space_paging;
//fapi_nr_coreset_t coreset_ra; // common coreset
fapi_nr_search_space_t search_space_ra;
} fapi_nr_pdcch_config_common_t;
typedef struct {
uint8_t k0;
uint8_t mapping_type;
uint8_t symbol_starting;
uint8_t symbol_length;
} fapi_nr_pdsch_time_domain_resource_allocation_t;
typedef struct {
fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
} fapi_nr_pdsch_config_common_t;
typedef struct {
uint8_t prach_configuration_index;
uint8_t msg1_fdm;
uint8_t msg1_frequency_start;
uint8_t zero_correlation_zone_config;
uint8_t preamble_received_target_power;
uint8_t preamble_transmission_max;
uint8_t power_ramping_step;
uint8_t ra_window_size;
uint8_t total_number_of_preamble;
uint8_t ssb_occasion_per_rach;
uint8_t cb_preamble_per_ssb;
uint8_t group_a_msg3_size;
uint8_t group_a_number_of_preamble;
uint8_t group_b_power_offset;
uint8_t contention_resolution_timer;
uint8_t rsrp_threshold_ssb;
uint8_t rsrp_threshold_ssb_sul;
uint8_t prach_length; // l839, l139
uint8_t prach_root_sequence_index; // 0 - 837 for l839, 0 - 137 for l139
uint8_t msg1_subcarrier_spacing;
uint8_t restrictedset_config;
uint8_t msg3_transform_precoding;
} fapi_nr_rach_config_common_t;
typedef struct {
uint8_t k2;
uint8_t mapping_type;
uint8_t symbol_starting;
uint8_t symbol_length;
} fapi_nr_pusch_time_domain_resource_allocation_t;
typedef struct {
uint8_t group_hopping_enabled_transform_precoding;
fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
uint8_t msg3_delta_preamble;
uint8_t p0_nominal_with_grant;
} fapi_nr_pusch_config_common_t;
typedef struct {
uint8_t pucch_resource_common;
uint8_t pucch_group_hopping;
uint8_t hopping_id;
uint8_t p0_nominal;
} fapi_nr_pucch_config_common_t;
typedef struct {
uint8_t subcarrier_spacing_common;
uint8_t ssb_subcarrier_offset;
uint8_t dmrs_type_a_position;
uint8_t pdcch_config_sib1;
uint8_t cell_barred;
uint8_t intra_frequency_reselection;
uint16_t system_frame_number;
uint8_t ssb_index;
uint8_t half_frame_bit;
} fapi_nr_pbch_config_t;
typedef struct {
fapi_nr_pdcch_config_common_t pdcch_config_common;
fapi_nr_pdsch_config_common_t pdsch_config_common;
} fapi_nr_dl_bwp_common_config_t;
typedef struct {
uint16_t int_rnti;
uint8_t time_frequency_set;
uint8_t dci_payload_size;
uint8_t serving_cell_id[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
uint8_t position_in_dci[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
} fapi_nr_downlink_preemption_t;
typedef struct {
uint8_t tpc_index;
uint8_t tpc_index_sul;
uint8_t target_cell;
} fapi_nr_pusch_tpc_command_config_t;
typedef struct {
uint8_t tpc_index_pcell;
uint8_t tpc_index_pucch_scell;
} fapi_nr_pucch_tpc_command_config_t;
typedef struct {
uint8_t starting_bit_of_format_2_3;
uint8_t feild_type_format_2_3;
} fapi_nr_srs_tpc_command_config_t;
typedef struct {
fapi_nr_downlink_preemption_t downlink_preemption;
fapi_nr_pusch_tpc_command_config_t tpc_pusch;
fapi_nr_pucch_tpc_command_config_t tpc_pucch;
fapi_nr_srs_tpc_command_config_t tpc_srs;
} fapi_nr_pdcch_config_dedicated_t;
typedef struct {
uint8_t dmrs_type;
uint8_t dmrs_addition_position;
uint8_t max_length;
uint16_t scrambling_id0;
uint16_t scrambling_id1;
uint8_t ptrs_frequency_density[2]; // phase tracking rs
uint8_t ptrs_time_density[3]; // phase tracking rs
uint8_t ptrs_epre_ratio; // phase tracking rs
uint8_t ptrs_resource_element_offset; // phase tracking rs
} fapi_nr_dmrs_downlink_config_t;
typedef struct {
uint8_t bwp_or_cell_level;
uint8_t pattern_type;
uint32_t resource_blocks[9]; // bitmaps type 275 bits
uint8_t slot_type; // bitmaps type one/two slot(s)
uint32_t symbols_in_resouece_block; // bitmaps type 14/28 bits
uint8_t periodic; // bitmaps type
uint32_t pattern[2]; // bitmaps type 2/4/5/8/10/20/40 bits
fapi_nr_coreset_t coreset; // coreset
uint8_t subcarrier_spacing;
uint8_t mode;
} fapi_nr_rate_matching_pattern_group_t;
typedef struct {
// resource mapping
uint8_t row; // row1/row2/row4/other
uint16_t frequency_domain_allocation; // 4/12/3/6 bits
uint8_t number_of_ports;
uint8_t first_ofdm_symbol_in_time_domain;
uint8_t first_ofdm_symbol_in_time_domain2;
uint8_t cdm_type;
uint8_t density; // .5/1/3
uint8_t density_dot5_type; // even/odd PRBs
uint8_t frequency_band_starting_rb; // freqBand
uint8_t frequency_band_number_of_rb; // freqBand
// periodicityAndOffset
uint8_t periodicity; // slot4/5/8/10/16/20/32/40/64/80/160/320/640
uint32_t offset; // 0..639 bits
} fapi_nr_zp_csi_rs_resource_t;
typedef struct {
uint16_t data_scrambling_id_pdsch;
fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_a;
fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_b;
uint8_t vrb_to_prb_interleaver;
uint8_t resource_allocation;
fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
uint8_t pdsch_aggregation_factor;
fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group1;
fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group2;
uint8_t rbg_size;
uint8_t mcs_table;
uint8_t max_num_of_code_word_scheduled_by_dci;
uint8_t bundle_size; // prb_bundling static
uint8_t bundle_size_set1; // prb_bundling dynamic
uint8_t bundle_size_set2; // prb_bundling dynamic
fapi_nr_zp_csi_rs_resource_t periodically_zp_csi_rs_resource_set[FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET];
} fapi_nr_pdsch_config_dedicated_t;
typedef struct {
uint16_t starting_prb;
uint8_t intra_slot_frequency_hopping;
uint16_t second_hop_prb;
uint8_t format; // pucch format 0..4
uint8_t initial_cyclic_shift;
uint8_t number_of_symbols;
uint8_t starting_symbol_index;
uint8_t time_domain_occ;
uint8_t number_of_prbs;
uint8_t occ_length;
uint8_t occ_index;
} fapi_nr_pucch_resource_t;
typedef struct {
uint8_t periodicity;
uint8_t number_of_harq_process;
fapi_nr_pucch_resource_t n1_pucch_an;
} fapi_nr_sps_config_t;
typedef struct {
uint8_t beam_failure_instance_max_count;
uint8_t beam_failure_detection_timer;
} fapi_nr_radio_link_monitoring_config_t;
typedef struct {
fapi_nr_pdcch_config_dedicated_t pdcch_config_dedicated;
fapi_nr_pdsch_config_dedicated_t pdsch_config_dedicated;
fapi_nr_sps_config_t sps_config;
fapi_nr_radio_link_monitoring_config_t radio_link_monitoring_config;
} fapi_nr_dl_bwp_dedicated_config_t;
typedef struct {
fapi_nr_rach_config_common_t rach_config_common;
fapi_nr_pusch_config_common_t pusch_config_common;
fapi_nr_pucch_config_common_t pucch_config_common;
} fapi_nr_ul_bwp_common_config_t;
typedef struct {
uint8_t inter_slot_frequency_hopping;
uint8_t additional_dmrs;
uint8_t max_code_rate;
uint8_t number_of_slots;
uint8_t pi2bpsk;
uint8_t simultaneous_harq_ack_csi;
} fapi_nr_pucch_format_config_t;
typedef struct {
fapi_nr_pucch_format_config_t format1;
fapi_nr_pucch_format_config_t format2;
fapi_nr_pucch_format_config_t format3;
fapi_nr_pucch_format_config_t format4;
fapi_nr_pucch_resource_t multi_csi_pucch_resources[2];
uint8_t dl_data_to_ul_ack[8];
// pucch power control
uint8_t deltaF_pucch_f0;
uint8_t deltaF_pucch_f1;
uint8_t deltaF_pucch_f2;
uint8_t deltaF_pucch_f3;
uint8_t deltaF_pucch_f4;
uint8_t two_pucch_pc_adjusment_states;
} fapi_nr_pucch_config_dedicated_t;
typedef struct {
uint8_t dmrs_type;
uint8_t dmrs_addition_position;
uint8_t ptrs_type; //cp-OFDM, dft-S-OFDM
uint16_t ptrs_frequency_density[2];
uint8_t ptrs_time_density[3];
uint8_t ptrs_max_number_of_ports;
uint8_t ptrs_resource_element_offset;
uint8_t ptrs_power;
uint16_t ptrs_sample_density[5];
uint8_t ptrs_time_density_transform_precoding;
uint8_t max_length;
uint16_t scrambling_id0;
uint16_t scrambling_id1;
uint8_t npusch_identity;
uint8_t disable_sequence_group_hopping;
uint8_t sequence_hopping_enable;
} fapi_nr_dmrs_uplink_config_t;
typedef struct {
uint8_t tpc_accmulation;
uint8_t msg3_alpha;
uint8_t p0_nominal_with_grant;
uint8_t two_pusch_pc_adjustments_states;
uint8_t delta_mcs;
} fapi_nr_pusch_power_control_t;
typedef struct {
uint16_t data_scrambling_identity;
uint8_t tx_config;
fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_a;
fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_b;
fapi_nr_pusch_power_control_t pusch_power_control;
uint8_t frequency_hopping;
uint16_t frequency_hopping_offset_lists[4];
uint8_t resource_allocation;
fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
uint8_t pusch_aggregation_factor;
uint8_t mcs_table;
uint8_t mcs_table_transform_precoder;
uint8_t transform_precoder;
uint8_t codebook_subset;
uint8_t max_rank;
uint8_t rbg_size;
//uci-OnPUSCH
uint8_t uci_on_pusch_type; //dynamic, semi-static
uint8_t beta_offset_ack_index1[4];
uint8_t beta_offset_ack_index2[4];
uint8_t beta_offset_ack_index3[4];
uint8_t beta_offset_csi_part1_index1[4];
uint8_t beta_offset_csi_part1_index2[4];
uint8_t beta_offset_csi_part2_index1[4];
uint8_t beta_offset_csi_part2_index2[4];
uint8_t tp_pi2BPSK;
} fapi_nr_pusch_config_dedicated_t;
typedef struct {
uint8_t frequency_hopping;
fapi_nr_dmrs_uplink_config_t cg_dmrs_configuration;
uint8_t mcs_table;
uint8_t mcs_table_transform_precoder;
//uci-OnPUSCH
uint8_t uci_on_pusch_type; //dynamic, semi-static
uint8_t beta_offset_ack_index1[4];
uint8_t beta_offset_ack_index2[4];
uint8_t beta_offset_ack_index3[4];
uint8_t beta_offset_csi_part1_index1[4];
uint8_t beta_offset_csi_part1_index2[4];
uint8_t beta_offset_csi_part2_index1[4];
uint8_t beta_offset_csi_part2_index2[4];
uint8_t resource_allocation;
// rgb-Size structure missing in spec.
uint8_t power_control_loop_to_use;
// p0-PUSCH-Alpha
uint8_t p0;
uint8_t alpha;
uint8_t transform_precoder;
uint8_t number_of_harq_process;
uint8_t rep_k;
uint8_t rep_k_rv;
uint8_t periodicity;
uint8_t configured_grant_timer;
// rrc-ConfiguredUplinkGrant
uint16_t time_domain_offset;
uint8_t time_domain_allocation;
uint32_t frequency_domain_allocation;
uint8_t antenna_ports;
uint8_t dmrs_seq_initialization;
uint8_t precoding_and_number_of_layers;
uint8_t srs_resource_indicator;
uint8_t mcs_and_tbs;
uint8_t frequency_hopping_offset;
uint8_t path_loss_reference_index;
} fapi_nr_configured_grant_config_t;
typedef struct {
uint8_t qcl_type1_serving_cell_index;
uint8_t qcl_type1_bwp_id;
uint8_t qcl_type1_rs_type; // csi-rs or ssb
uint8_t qcl_type1_nzp_csi_rs_resource_id;
uint8_t qcl_type1_ssb_index;
uint8_t qcl_type1_type;
uint8_t qcl_type2_serving_cell_index;
uint8_t qcl_type2_bwp_id;
uint8_t qcl_type2_rs_type; // csi-rs or ssb
uint8_t qcl_type2_nzp_csi_rs_resource_id;
uint8_t qcl_type2_ssb_index;
uint8_t qcl_type2_type;
} fapi_nr_tci_state_t;
typedef struct {
uint8_t root_sequence_index;
// rach genertic
uint8_t prach_configuration_index;
uint8_t msg1_fdm;
uint8_t msg1_frequency_start;
uint8_t zero_correlation_zone_config;
uint8_t preamble_received_target_power;
uint8_t preamble_transmission_max;
uint8_t power_ramping_step;
uint8_t ra_window_size;
uint8_t rsrp_threshold_ssb;
// PRACH-ResourceDedicatedBFR
uint8_t bfr_ssb_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_ssb_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
// NZP-CSI-RS-Resource
uint8_t bfr_csi_rs_nzp_resource_mapping[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_power_control_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_power_control_offset_ss[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint16_t bfr_csi_rs_scrambling_id[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_resource_periodicity[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint16_t bfr_csi_rs_resource_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
fapi_nr_tci_state_t qcl_infomation_periodic_csi_rs[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csirs_ra_occasions[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csirs_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS][FAPI_NR_MAX_RA_OCCASION_PER_CSIRS];
uint8_t ssb_per_rach_occasion;
uint8_t ra_ssb_occasion_mask_index;
fapi_nr_search_space_t recovery_search_space;
// RA-Prioritization
uint8_t power_ramping_step_high_priority;
uint8_t scaling_factor_bi;
uint8_t beam_failure_recovery_timer;
} fapi_nr_beam_failure_recovery_config_t;
typedef struct {
fapi_nr_pucch_config_dedicated_t pucch_config_dedicated;
fapi_nr_pusch_config_dedicated_t pusch_config_dedicated;
fapi_nr_configured_grant_config_t configured_grant_config;
// SRS-Config
uint8_t srs_tpc_accumulation;
fapi_nr_beam_failure_recovery_config_t beam_failure_recovery_config;
} fapi_nr_ul_bwp_dedicated_config_t;
#define FAPI_NR_CONFIG_REQUEST_MASK_PBCH 0x01
#define FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON 0x02
#define FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON 0x04
#define FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED 0x08
#define FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED 0x10
typedef struct {
uint32_t config_mask;
fapi_nr_pbch_config_t pbch_config; // MIB
fapi_nr_dl_bwp_common_config_t dl_bwp_common;
fapi_nr_dl_bwp_dedicated_config_t dl_bwp_dedicated;
fapi_nr_ul_bwp_common_config_t ul_bwp_common;
fapi_nr_ul_bwp_dedicated_config_t ul_bwp_dedicated;
} fapi_nr_config_request_t;
#endif
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
+249 -121
View File
@@ -1,8 +1,19 @@
#ifndef _NFAPI_INTERFACE_NR_H_
#define _NFAPI_INTERFACE_NR_H_
#ifndef _NFAPI_NR_INTERFACE_H_
#define _NFAPI_NR_INTERFACE_H_
#include "nfapi_interface.h"
// nFAPI enums
typedef enum {
NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE = 0,
NFAPI_NR_DL_CONFIG_BCH_PDU_TYPE,
NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE,
NFAPI_NR_DL_CONFIG_PCH_PDU_TYPE,
NFAPI_NR_DL_CONFIG_NBCH_PDU_TYPE,
NFAPI_NR_DL_CONFIG_NPDCCH_PDU_TYPE,
NFAPI_NR_DL_CONFIG_NDLSCH_PDU_TYPE
} nfapi_nr_dl_config_pdu_type_e;
//These TLVs are used exclusively by nFAPI
typedef struct
{
@@ -62,6 +73,8 @@ typedef struct
typedef struct {
nfapi_uint16_tlv_t numerology_index_mu;
nfapi_uint16_tlv_t duplex_mode;
nfapi_uint16_tlv_t dl_cyclic_prefix_type;
nfapi_uint16_tlv_t ul_cyclic_prefix_type;
} nfapi_nr_subframe_config_t;
#define NFAPI_NR_SUBFRAME_CONFIG_DUPLEX_MODE_TAG 0x5001
@@ -74,6 +87,23 @@ typedef struct {
typedef struct {
nfapi_uint16_tlv_t tx_antenna_ports;
nfapi_uint16_tlv_t rx_antenna_ports;
nfapi_uint16_tlv_t dl_channel_bandwidth;
nfapi_uint16_tlv_t ul_channel_bandwidth;
nfapi_uint16_tlv_t dl_BWP_carrierBandwidth;
nfapi_uint16_tlv_t ul_BWP_carrierBandwidth;
nfapi_uint16_tlv_t dl_locationAndBandwidth;
nfapi_uint16_tlv_t ul_locationAndBandwidth;
nfapi_uint16_tlv_t dl_BWP_SubcarrierSpacing;
nfapi_uint16_tlv_t ul_BWP_SubcarrierSpacing;
nfapi_uint16_tlv_t dl_absoluteFrequencyPointA;
nfapi_uint16_tlv_t ul_absoluteFrequencyPointA;
nfapi_uint16_tlv_t dl_offsetToCarrier;
nfapi_uint16_tlv_t ul_offsetToCarrier;
nfapi_uint16_tlv_t dl_SCS_SubcarrierSpacing;
nfapi_uint16_tlv_t ul_SCS_SubcarrierSpacing;
nfapi_uint16_tlv_t dl_SCS_SpecificCarrier_k0;
nfapi_uint16_tlv_t ul_SCS_SpecificCarrier_k0;
nfapi_uint16_tlv_t NIA_SubcarrierSpacing;
} nfapi_nr_rf_config_t;
#define NFAPI_NR_RF_CONFIG_DL_CHANNEL_BANDWIDTH_TAG 0x500A
@@ -86,7 +116,8 @@ typedef struct {
nfapi_uint16_tlv_t physical_cell_id;
nfapi_uint16_tlv_t half_frame_index;
nfapi_uint16_tlv_t ssb_subcarrier_offset;
nfapi_uint16_tlv_t ssb_position_in_burst;
nfapi_uint16_tlv_t ssb_sib1_position_in_burst;
nfapi_uint16_tlv_t ssb_scg_position_in_burst;
nfapi_uint16_tlv_t ssb_periodicity;
nfapi_uint16_tlv_t ss_pbch_block_power;
nfapi_uint16_tlv_t n_ssb_crb;
@@ -115,45 +146,10 @@ typedef struct {
} nfapi_nr_rach_config_t;
typedef struct {
//NR FrequencyInfoDL
nfapi_uint16_tlv_t absoluteFrequencySSB;
nfapi_uint16_tlv_t ssb_SubcarrierOffset; ///// L1 parameter 'kssb'
nfapi_uint16_tlv_t DL_FreqBandIndicatorNR;
nfapi_uint16_tlv_t DL_absoluteFrequencyPointA; ///// L1 parameter 'offset-ref-low-scs-ref-PRB'
//NR DL SCS-SpecificCarrier ///// L1 parameter 'offset-pointA-set'
nfapi_uint16_tlv_t DL_offsetToCarrier; ///// L1 parameter 'offset-pointA-low-scs '
nfapi_uint16_tlv_t DL_SCS_SubcarrierSpacing; ///// L1 parameter 'ref-scs'
nfapi_uint16_tlv_t DL_SCS_SpecificCarrier_k0; ///// L1 parameter 'k0'
nfapi_uint16_tlv_t DL_carrierBandwidth; ///// L1 parameter 'BW'
} nfapi_nr_dl_frequencyinfo_t;
typedef struct {
//NR BWP-DownlinkCommon
nfapi_uint16_tlv_t DL_locationAndBandwidth; ///// L1 parameter 'DL-BWP-loc'
nfapi_uint16_tlv_t DL_BWP_SubcarrierSpacing; ///// Corresponds to subcarrier spacing according to 38.211, Table 4.2-1
nfapi_uint16_tlv_t DL_BWP_prefix_type;
} nfapi_nr_bwp_dl_t;
typedef struct {
//NR FrequencyInfoUL
nfapi_uint16_tlv_t UL_FreqBandIndicatorNR;
nfapi_uint16_tlv_t UL_absoluteFrequencyPointA; ///// L1 parameter 'offset-ref-low-scs-ref-PRB'
nfapi_uint16_tlv_t UL_additionalSpectrumEmission;
nfapi_uint16_tlv_t UL_p_Max;
nfapi_uint16_tlv_t UL_frequencyShift7p5khz;
//NR UL SCS-SpecificCarrier ///// L1 parameter 'offset-pointA-set'
nfapi_uint16_tlv_t UL_offsetToCarrier; ///// L1 parameter 'offset-pointA-low-scs '
nfapi_uint16_tlv_t UL_SCS_SubcarrierSpacing; ///// L1 parameter 'ref-scs'
nfapi_uint16_tlv_t UL_SCS_SpecificCarrier_k0; ///// L1 parameter 'k0'
nfapi_uint16_tlv_t UL_carrierBandwidth; ///// L1 parameter 'BW'
} nfapi_nr_ul_frequencyinfo_t;
typedef struct {
//NR BWP-UplinkCommon ///// L1 parameter 'initial-UL-BWP'
nfapi_uint16_tlv_t UL_locationAndBandwidth; ///// L1 parameter 'DL-BWP-loc'
nfapi_uint16_tlv_t UL_BWP_SubcarrierSpacing; ///// Corresponds to subcarrier spacing according to 38.211, Table 4.2-1
nfapi_uint16_tlv_t UL_BWP_prefix_type;
} nfapi_nr_bwp_ul_t;
nfapi_uint16_tlv_t dmrs_TypeA_Position; ///// Position of (first) DL DM-RS
nfapi_uint16_tlv_t TimeDomainResourceAllocation_k0; ///// L1 parameter 'K0'
nfapi_uint16_tlv_t TimeDomainResourceAllocation_mappingType; ///// L1 parameter 'Mapping-type'
} nfapi_nr_pdsch_config_t;
typedef struct {
nfapi_uint16_tlv_t groupHoppingEnabledTransformPrecoding; ///// L1 parameter 'Group-hopping-enabled-Transform-precoding'
@@ -168,59 +164,6 @@ typedef struct {
nfapi_uint16_tlv_t p0_nominal; ///// L1 parameter 'p0-nominal-pucch'
} nfapi_nr_pucch_config_t;
typedef struct {
nfapi_uint16_tlv_t TimeDomainResourceAllocation_k0; ///// L1 parameter 'K0'
nfapi_uint16_tlv_t TimeDomainResourceAllocation_mappingType; ///// L1 parameter 'Mapping-type'
} nfapi_nr_pdsch_config_t;
typedef struct{
nfapi_uint16_tlv_t controlResourceSetId; ///// L1 parameter 'CORESET-ID'
nfapi_uint16_tlv_t frequencyDomainResources ///// L1 parameter 'CORESET-freq-dom'
nfapi_uint16_tlv_t duration; ///// L1 parameter 'CORESET-time-duration'
nfapi_uint16_tlv_t cce_REG_MappingType; ///// L1 parameter 'CORESET-CCE-REG-mapping-type'
nfapi_uint16_tlv_t reg_BundleSize; ///// L1 parameter 'CORESET-REG-bundle-size'
nfapi_uint16_tlv_t interleaverSize; ///// L1 parameter 'CORESET-interleaver-size'
nfapi_uint16_tlv_t shiftIndex; ///// L1 parameter 'CORESET-shift-index'
nfapi_uint16_tlv_t precoderGranularity; ///// L1 parameter 'CORESET-precoder-granuality'
nfapi_uint16_tlv_t TCI_StateId; ///// L1 parameter 'TCI-StatesPDCCH'
nfapi_uint16_tlv_t tci_PresentInDCI; ///// L1 parameter 'TCI-PresentInDCI'
nfapi_uint16_tlv_t pdcch_DMRS_ScramblingID; ///// L1 parameter 'PDCCH-DMRS-Scrambling-ID'
} nfapi_nr_pdcch_commonControlResourcesSets_t;
typedef struct{
nfapi_uint16_tlv_t SearchSpaceId;
nfapi_uint16_tlv_t commonSearchSpaces_controlResourceSetId;
nfapi_uint16_tlv_t SearchSpace_monitoringSlotPeriodicityAndOffset; ///// L1 parameters 'Montoring-periodicity-PDCCH-slot'
nfapi_uint16_tlv_t monitoringSymbolsWithinSlot ///// L1 parameter 'Montoring-symbols-PDCCH-within-slot'
nfapi_uint16_tlv_t SearchSpace_nrofCandidates_aggregationLevel1; ///// L1 parameter 'Aggregation-level-1'
nfapi_uint16_tlv_t SearchSpace_nrofCandidates_aggregationLevel2; ///// L1 parameter 'Aggregation-level-2'
nfapi_uint16_tlv_t SearchSpace_nrofCandidates_aggregationLevel4; ///// L1 parameter 'Aggregation-level-4'
nfapi_uint16_tlv_t SearchSpace_nrofCandidates_aggregationLevel8; ///// L1 parameter 'Aggregation-level-8'
nfapi_uint16_tlv_t SearchSpace_nrofCandidates_aggregationLevel16; ///// L1 parameter 'Aggregation-level-16'
nfapi_uint16_tlv_t Common_dci_Format2_0_nrofCandidates_SFI_And_aggregationLevel; ///// L1 parameters 'SFI-Num-PDCCH-cand' and 'SFI-Aggregation-Level'
nfapi_uint16_tlv_t Common_dci_Format2_3_monitoringPeriodicity; ///// L1 parameter 'SRS-monitoring-periodicity'
nfapi_uint16_tlv_t Common_dci_Format2_3_nrofPDCCH_Candidates; ///// L1 parameter 'SRS-Num-PDCCH-cand'
nfapi_uint16_tlv_t ue_Specific__dci_Formats;
} nfapi_nr_pdcch_commonSearchSpaces_t;
typedef struct {
nfapi_nr_pdcch_commonControlResourcesSets_t commonControlResourcesSets;
nfapi_nr_pfcch_commonSearchSpaces_t commonSearchSpaces;
nfapi_uint16_tlv_t searchSpaceSIB1; ///// L1 parameter 'rmsi-SearchSpace'
nfapi_uint16_tlv_t searchSpaceOtherSystemInformation; ///// L1 parameter 'osi-SearchSpace'
nfapi_uint16_tlv_t pagingSearchSpace; ///// L1 parameter 'paging-SearchSpace'
nfapi_uint16_tlv_t ra_SearchSpace; ///// L1 parameter 'ra-SearchSpace'
nfapi_uint16_tlv_t rach_ra_ControlResourceSet; ///// L1 parameter 'rach-coreset-configuration'
} nfapi_nr_pdcch_common_config_t;
typedef struct {
nfapi_uint16_tlv_t ssb_PositionsInBurst_PR; ///// L1 parameter 'SSB-Transmitted
nfapi_uint16_tlv_t ssb_periodicityServingCell;
nfapi_uint16_tlv_t dmrs_TypeA_Position; ///// Position of (first) DL DM-RS
nfapi_uint16_tlv_t NIA_SubcarrierSpacing; ///// Used only for non-initial access (e.g. SCells, PCell of SCG)
nfapi_uint16_tlv_t ss_PBCH_BlockPower;
} nfapi_nr_servingcellconfigcommon_t;
typedef struct {
//NR TDD-UL-DL-ConfigCommon ///// L1 parameter 'UL-DL-configuration-common'
@@ -255,9 +198,6 @@ typedef struct {
nfapi_uint16_tlv_t RateMatchPatternLTE_CRS_subframeAllocation_choice;
} nfapi_nr_ratematchpattern_lte_crs_t;
typedef struct {
nfapi_p4_p5_message_header_t header;
uint8_t num_tlv;
@@ -265,15 +205,9 @@ typedef struct {
nfapi_nr_rf_config_t rf_config;
nfapi_nr_sch_config_t sch_config;
nfapi_nr_rach_config_t rach_config;
nfapi_nr_dl_frequencyinfo_t dl_frequencyinfo;
nfapi_nr_bwp_dl_t bwp_dl;
nfapi_nr_ul_frequencyinfo_t ul_frequencyinfo;
nfapi_nr_bwp_ul_t bwp_ul;
nfapi_nr_pdsch_config_t pdsch_config;
nfapi_nr_pusch_config_t pusch_config;
nfapi_nr_pucch_config_t pucch_config;
nfapi_nr_pdsch_config_t pdsch_config;
nfapi_nr_pucch_config_t pdcch_config;
nfapi_nr_servingcellconfigcommon_t servingcellconfigcommon;
nfapi_nr_tdd_ul_dl_config_t tdd_ul_dl_config;
nfapi_nr_ratematchpattern_t ratematchpattern;
nfapi_nr_ratematchpattern_lte_crs_t ratematchpattern_lte_crs;
@@ -283,35 +217,229 @@ typedef struct {
} nfapi_nr_config_request_t;
typedef enum {
NFAPI_NR_DL_DCI_FORMAT_1_0 = 0,
NFAPI_NR_DL_DCI_FORMAT_1_1,
NFAPI_NR_DL_DCI_FORMAT_1_0 = 0,
NFAPI_NR_DL_DCI_FORMAT_1_1,
NFAPI_NR_DL_DCI_FORMAT_2_0,
NFAPI_NR_DL_DCI_FORMAT_2_1,
NFAPI_NR_DL_DCI_FORMAT_2_2,
NFAPI_NR_DL_DCI_FORMAT_2_3,
NFAPI_NR_DL_DCI_FORMAT_2_3
} nfapi_nr_dl_dci_format_e;
typedef enum {
NFAPI_NR_UL_DCI_FORMAT_0_0 = 0,
NFAPI_NR_UL_DCI_FORMAT_1_0,
NFAPI_NR_UL_DCI_FORMAT_0_0 = 0,
NFAPI_NR_UL_DCI_FORMAT_1_0,
} nfapi_nr_ul_dci_format_e;
typedef enum {
NFAPI_NR_RNTI_new = 0,
NFAPI_NR_RNTI_C,
NFAPI_NR_RNTI_RA,
NFAPI_NR_RNTI_P,
NFAPI_NR_RNTI_CS,
NFAPI_NR_RNTI_TC,
NFAPI_NR_RNTI_SP_CSI,
NFAPI_NR_RNTI_SI,
NFAPI_NR_RNTI_SFI,
NFAPI_NR_RNTI_INT,
NFAPI_NR_RNTI_TPC_PUSCH,
NFAPI_NR_RNTI_TPC_PUCCH,
NFAPI_NR_RNTI_TPC_SRS
} nfapi_nr_rnti_type_e ;
// P7 Sub Structures
//formats 0_0 and 0_1
typedef struct {
nfapi_tl_t tl;
// conf
uint8_t dci_format;
uint8_t cce_idx;
uint8_t aggregation_level;
uint16_t rnti;
// DCI fields
nfapi_tl_t tl;
uint8_t cce_idx;
uint8_t aggregation_level;
uint16_t rnti;
uint8_t dci_format; //1 bit
uint16_t frequency_domain_resource_assignment; //up to 9 bits
uint8_t time_domain_resource_assignment; //0, 1, 2, 3 or 4 bits
uint8_t frequency_hopping_flag; //1 bit
uint8_t mcs; //5 bits
uint8_t new_data_indicator; //1 bit
uint8_t redundancy_version; //2 bits
uint8_t harq_process; //4 bits
uint8_t tpc; //2 bits
uint16_t padding;
uint8_t ul_sul_indicator; //0 or 1 bit
uint8_t carrier_indicator; //0 or 3 bits
uint8_t bwp_indicator; //0, 1 or 2 bits
uint8_t downlink_assignment_index1; //1 or 2 bits
uint8_t downlink_assignment_index2; //0 or 2 bits
uint8_t srs_resource_indicator;
uint8_t precoding_information;
uint8_t antenna_ports;
uint8_t srs_request;
uint8_t csi_request;
uint8_t cbgti; //CBG Transmission Information: 0, 2, 4, 6 or 8 bits
uint8_t ptrs_dmrs_association;
uint8_t beta_offset_indicator; //0 or 2 bits
uint8_t dmrs_sequence_initialization; //0 or 1 bit
uint8_t ul_sch_indicator; //1 bit
} nfapi_nr_ul_config_dci_ul_pdu_rel15_t;
//#define NFAPI_NR_UL_CONFIG_REQUEST_DCI_UL_PDU_REL15_TAG 0x????
//formats 1_0, 1_1, 2_0, 2_1, 2_2 and 2_3
typedef struct {
nfapi_tl_t tl;
uint8_t cce_idx;
uint8_t aggregation_level;
uint16_t rnti;
uint8_t dci_format; //1 bit
uint16_t frequency_domain_resource_assignment; //up to 9 bits
uint8_t ra_preamble_index; //6 bits
uint8_t ul_sul_indicator; //1 bit
uint8_t ss_pbch_index; //6 bits
uint8_t prach_mask_index; //4 bits
uint16_t reserved; //1_0/C-RNTI:10 bits, 1_0/P-RNTI: 6 bits, 1_0/SI-&RA-RNTI: 16 bits
uint8_t time_domain_resource_assignment; //0, 1, 2, 3 or 4 bits
uint8_t vrb_to_prb_mapping; //0 or 1 bit
uint8_t mcs; //5 bits
uint8_t new_data_indicator; //1 bit
uint8_t redundancy_version; //2 bits
uint8_t harq_process; //4 bits
uint8_t downlink_assignment_index; //0, 2 or 4 bits
uint8_t tpc; //2 bits
uint8_t pucch_resource_indicator; //3 bits
uint8_t pdsch_to_harq_feedback_timing_indicator; //0, 1, 2 or 3 bits
uint8_t short_messages_indicator; //2 bits
uint8_t short_messages; //8 bits
uint8_t tb_scaling; //2 bits
uint8_t carrier_indicator; //0 or 3 bits
uint8_t bwp_indicator; //0, 1 or 2 bits
uint8_t prb_bundling_size_indicator; //0 or 1 bits
uint8_t rate_matching_indicator; //0, 1 or 2 bits
uint8_t zp_csi_rs_trigger; //0, 1 or 2 bits
uint8_t antenna_ports; //4, 5 or 6 bits
uint8_t transmission_configuration_indication; //0 or 3 bits
uint8_t srs_request; //2 bits
uint8_t cbgti; //CBG Transmission Information: 0, 2, 4, 6 or 8 bits
uint8_t cbgfi; //CBG Flushing Out Information: 0 or 1 bit
uint8_t dmrs_sequence_initialization; //0 or 1 bit
uint8_t slot_format_indicator_count;
uint8_t *slot_format_indicators;
uint8_t pre_emption_indication_count;
uint16_t *pre_emption_indications; //14 bit
uint8_t block_number_count;
uint8_t *block_numbers;
} nfapi_nr_dl_config_dci_dl_pdu_rel15_t;
#define NFAPI_NR_DL_CONFIG_REQUEST_DCI_DL_PDU_REL15_TAG
//#define NFAPI_NR_DL_CONFIG_REQUEST_DCI_DL_PDU_REL15_TAG 0x????
typedef struct{
nfapi_uint16_tlv_t controlResourceSetId; ///// L1 parameter 'CORESET-ID'
nfapi_uint16_tlv_t frequencyDomainResources; ///// L1 parameter 'CORESET-freq-dom'
nfapi_uint16_tlv_t duration; ///// L1 parameter 'CORESET-time-duration'
nfapi_uint16_tlv_t cce_REG_MappingType; ///// L1 parameter 'CORESET-CCE-REG-mapping-type'
nfapi_uint16_tlv_t reg_BundleSize; ///// L1 parameter 'CORESET-REG-bundle-size'
nfapi_uint16_tlv_t interleaverSize; ///// L1 parameter 'CORESET-interleaver-size'
nfapi_uint16_tlv_t shiftIndex; ///// L1 parameter 'CORESET-shift-index'
nfapi_uint16_tlv_t precoderGranularity; ///// L1 parameter 'CORESET-precoder-granuality'
nfapi_uint16_tlv_t TCI_StateId; ///// L1 parameter 'TCI-StatesPDCCH'
nfapi_uint16_tlv_t tci_PresentInDCI; ///// L1 parameter 'TCI-PresentInDCI'
nfapi_uint16_tlv_t pdcch_DMRS_ScramblingID; ///// L1 parameter 'PDCCH-DMRS-Scrambling-ID'
} nfapi_nr_ControlResourcesSets_t;
typedef struct{
nfapi_uint16_tlv_t SearchSpaceId;
nfapi_uint16_tlv_t controlResourceSetId;
nfapi_uint16_tlv_t monitoringSlotPeriodicityAndOffset; ///// L1 parameters 'Montoring-periodicity-PDCCH-slot'
nfapi_uint16_tlv_t monitoringSymbolsWithinSlot; ///// L1 parameter 'Montoring-symbols-PDCCH-within-slot'
nfapi_uint16_tlv_t nrofCand_aggLevel1; ///// L1 parameter 'Aggregation-level-1'
nfapi_uint16_tlv_t nrofCand_aggLevel2; ///// L1 parameter 'Aggregation-level-2'
nfapi_uint16_tlv_t nrofCand_aggLevel4; ///// L1 parameter 'Aggregation-level-4'
nfapi_uint16_tlv_t nrofCand_aggLevel8; ///// L1 parameter 'Aggregation-level-8'
nfapi_uint16_tlv_t nrofCand_aggLevel16; ///// L1 parameter 'Aggregation-level-16'
nfapi_uint16_tlv_t Com_dci_Format2_0_nrofCand_SFI_And_aggLevel; ///// L1 parameters 'SFI-Num-PDCCH-cand' and 'SFI-Aggregation-Level'
nfapi_uint16_tlv_t Com_dci_Format2_3_monitoringPeriodicity; ///// L1 parameter 'SRS-monitoring-periodicity'
nfapi_uint16_tlv_t Com_dci_Format2_3_nrofPDCCH_Candidates; ///// L1 parameter 'SRS-Num-PDCCH-cand'
nfapi_uint16_tlv_t ue_Specific_dci_Formats;
} nfapi_nr_SearchSpaces_t;
typedef struct {
nfapi_nr_dl_config_dci_dl_pdu_rel15_t dci_dl_pdu_rel15;
} nfapi_nr_dl_config_dci_dl_pdu;
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
uint16_t transmission_power;
}nfapi_nr_dl_config_bch_pdu_rel15_t;
#define NFAPI_NR_DL_CONFIG_REQUEST_BCH_PDU_REL15_TAG 0x5025
typedef struct {
nfapi_tl_t tl;
nfapi_nr_SearchSpaces_t sib1searchSpace;
nfapi_nr_ControlResourcesSets_t sib1ControlResourceSets;
nfapi_nr_SearchSpaces_t sibssearchSpace;
nfapi_nr_ControlResourcesSets_t sibsControlResourceSets;
nfapi_nr_SearchSpaces_t ra_SearchSpace;
nfapi_nr_ControlResourcesSets_t ra_ControlResourceSets;
}nfapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
nfapi_tl_t tl;
nfapi_nr_SearchSpaces_t pagingSearchSpace;
nfapi_nr_ControlResourcesSets_t pagingControlResourceSets;
}nfapi_nr_dl_config_pch_pdu_rel15_t;
typedef struct {
}nfapi_nr_dl_config_nbch_pdu_rel15_t;
typedef struct {
}nfapi_nr_dl_config_npdcch_pdu_rel15_t;
typedef struct {
}nfapi_nr_dl_config_ndlsch_pdu_rel15_t;
typedef struct {
uint8_t pdu_type;
uint8_t pdu_size;
union {
nfapi_nr_dl_config_dci_dl_pdu_rel15_t dci_dl_pdu_rel15;
nfapi_nr_ul_config_dci_ul_pdu_rel15_t dci_ul_pdu_rel15;
nfapi_nr_dl_config_bch_pdu_rel15_t bch_pdu_rel15;
nfapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_pdu_rel15;
nfapi_nr_dl_config_pch_pdu_rel15_t pch_pdu_rel15;
nfapi_nr_dl_config_nbch_pdu_rel15_t nbch_pdu_rel15;
nfapi_nr_dl_config_npdcch_pdu_rel15_t npdcch_pdu_rel15;
nfapi_nr_dl_config_ndlsch_pdu_rel15_t ndlsch_pdu_rel15;
};
} nfapi_nr_dl_config_request_pdu_t;
typedef struct {
nfapi_tl_t tl;
uint8_t number_pdcch_ofdm_symbols;
uint8_t number_dci;
uint16_t number_pdu;
uint8_t number_pdsch_rnti;
nfapi_nr_dl_config_request_pdu_t *dl_config_pdu_list;
} nfapi_nr_dl_config_request_body_t;
typedef struct {
nfapi_p7_message_header_t header;
uint16_t sfn_sf;
nfapi_nr_dl_config_request_body_t dl_config_request_body;
nfapi_vendor_extension_tlv_t vendor_extension;
} nfapi_nr_dl_config_request_t;
#endif
nfapi/open-nFAPI/nfapi/public_inc/nr_fapi_ue_interface.h
-3886
View File
File diff suppressed because it is too large Load Diff
openair1/PHY/CODING/TESTBENCH/ldpctest.c
+41 -30
View File
@@ -25,8 +25,18 @@
#include <string.h>
#include "SIMULATION/TOOLS/sim.h"
#include "PHY/CODING/nrLDPC_encoder/defs.h"
#include "PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.h"
#define MAX_NUM_DLSCH_SEGMENTS 16
#ifndef malloc16
# ifdef __AVX2__
# define malloc16(x) memalign(32,x)
# else
# define malloc16(x) memalign(16,x)
# endif
#endif
// 4-bit quantizer
char quantize4bit(double D,double x)
@@ -66,7 +76,7 @@ int test_ldpc(short No_iteration,
int denom_rate,
double SNR,
unsigned char qbits,
short block_length,
unsigned short block_length,
unsigned int ntrials,
unsigned int *errors,
unsigned int *crc_misses)
@@ -107,7 +117,9 @@ int test_ldpc(short No_iteration,
modulated_input = (double *)malloc(sizeof(double) * 68*384);
channel_output = (double *)malloc(sizeof(double) * 68*384);
channel_output_fixed = (char *)malloc16(sizeof(char) * 68*384);
estimated_output = (unsigned char*) malloc16(sizeof(unsigned char) * block_length/8);
estimated_output = (unsigned char*) malloc16(sizeof(unsigned char) * block_length);
memset(channel_output_fixed,0,sizeof(char) * 68*384);
reset_meas(&time);
reset_meas(&time_optim);
@@ -124,14 +136,14 @@ int test_ldpc(short No_iteration,
}
//determine number of bits in codeword
//if (block_length>3840)
if ((block_length>3840) && (block_length <= MAX_BLOCK_LENGTH))
{
BG=1;
Kb = 22;
nrows=46; //parity check bits
ncols=22; //info bits
}
/*else if (block_length<=3840)
else if (block_length<=3840)
{
BG=2;
nrows=42; //parity check bits
@@ -145,11 +157,14 @@ int test_ldpc(short No_iteration,
Kb = 8;
else
Kb = 6;
}*/
}
else {
printf("block_length %d not supported\n",block_length);
exit(-1);
}
//find minimum value in all sets of lifting size
Zc=0;
for (i1=0; i1 < 51; i1++)
{
if (lift_size[i1] >= (double) block_length/Kb)
@@ -165,7 +180,7 @@ int test_ldpc(short No_iteration,
// printf("puncture:%d\n",no_punctured_columns);
removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(int)(block_length/((float)nom_rate/(float)denom_rate));
if (ntrials==0)
ldpc_encoder_orig(test_input[0],channel_input[0], block_length, nom_rate, denom_rate, 1);
ldpc_encoder_orig(test_input[0],channel_input[0], block_length, BG, 1);
for (trial=0; trial < ntrials; trial++)
{
@@ -173,20 +188,20 @@ int test_ldpc(short No_iteration,
//// encoder
start_meas(&time);
for(j=0;j<n_segments;j++) {
ldpc_encoder_orig(test_input[j], channel_input[j],block_length,nom_rate,denom_rate,0);
ldpc_encoder_orig(test_input[j], channel_input[j],block_length,BG,0);
}
stop_meas(&time);
start_meas(&time_optim);
ldpc_encoder_optim_8seg(test_input,channel_input_optim,block_length,nom_rate,denom_rate,n_segments,&tinput,&tprep,&tparity,&toutput);
ldpc_encoder_optim_8seg(test_input,channel_input_optim,block_length,BG,n_segments,&tinput,&tprep,&tparity,&toutput);
/*for(j=0;j<n_segments;j++) {
ldpc_encoder_optim(test_input[j],channel_input_optim[j],block_length,nom_rate,denom_rate,&tinput,&tprep,&tparity,&toutput);
ldpc_encoder_optim(test_input[j],channel_input_optim[j],block_length,BG,&tinput,&tprep,&tparity,&toutput);
}*/
stop_meas(&time_optim);
if (ntrials==1)
for (j=0;j<n_segments;j++)
for (i = 0; i < block_length+(nrows-no_punctured_columns) * Zc - removed_bit; i++)
for (i = 0; i < 3*block_length; i++)
if (channel_input[j][i]!=channel_input_optim[j][i]) {
printf("differ in seg %d pos %d (%d,%d)\n",j,i,channel_input[j][i],channel_input_optim[j][i]);
return (-1);
@@ -199,9 +214,9 @@ int test_ldpc(short No_iteration,
//printf("%d ",channel_input[i]);
//if ((BG==2) && (Zc==128||Zc==256))
if (0)
if (1)
{
for (i = 2*Zc; i < (Kb+nrows-no_punctured_columns) * Zc-removed_bit; i++)
for (i = 2*Zc; i < 3*block_length; i++)
{
#ifdef DEBUG_CODER
if ((i&0xf)==0)
@@ -209,7 +224,7 @@ int test_ldpc(short No_iteration,
#endif
if (channel_input[0][i-2*Zc]==0)
modulated_input[i]=1/sqrt(2); //QPSK
modulated_input[i]=1/sqrt(2); //BPSK
else
modulated_input[i]=-1/sqrt(2);
@@ -218,16 +233,12 @@ int test_ldpc(short No_iteration,
//printf("llr[%d]=%d\n",i,channel_output_fixed[i]);
}
//for (i=(Kb+nrows) * Zc-5;i<(Kb+nrows) * Zc;i++)
//{
// printf("channel_input[%d]=%d\n",i,channel_input[i]);
//printf("%lf %d\n",channel_output[i], channel_output_fixed[i]);
//printf("v[%d]=%lf\n",i,modulated_input[i]);}
#ifdef DEBUG_CODER
printf("\n");
exit(-1);
#endif
/*
the LDPC decoder supports several rates and the input has to be adapted accordingly (by padding with zeros to the next lower supported rate). Moreover, the first 2*Z LLRs are zero (since they are punctured and not transmitted) then you have the LLRs corresponding to the systematic bits. After that come the filler bits, the encoder uses 0 for the filler bits hence for the decoder you need to put 127 (max LLR for bit 0) at their place. Then come the LLRs corresponding to the punctured bits followed by zeros to pad for the supported decoder rate.
*/
for (i=0;i<2*Zc;i++)
channel_output_fixed[i] = 0;
decParams.BG=BG;
decParams.Z=Zc;
decParams.R=13;
@@ -236,9 +247,9 @@ int test_ldpc(short No_iteration,
// decode the sequence
// decoder supports BG2, Z=128 & 256
//esimated_output=ldpc_decoder(channel_output_fixed, block_length, No_iteration, (double)((float)nom_rate/(float)denom_rate));
//estimated_output=ldpc_decoder(channel_output_fixed, block_length, No_iteration, (double)((float)nom_rate/(float)denom_rate));
nrLDPC_decoder(&decParams, channel_output_fixed, estimated_output, NULL);
nrLDPC_decoder(&decParams, (int8_t*) channel_output_fixed, (int8_t*) estimated_output, NULL);
//for (i=(Kb+nrows) * Zc-5;i<(Kb+nrows) * Zc;i++)
// printf("esimated_output[%d]=%d\n",i,esimated_output[i]);
@@ -248,15 +259,15 @@ int test_ldpc(short No_iteration,
{
if (estimated_output[i] != test_input[0][i])
{
//printf("error pos %d (%d, %d)\n",i,estimated_output[i],test_input[i]);
printf("error pos %d (%d, %d)\n",i,estimated_output[i],test_input[0][i]);
*errors = (*errors) + 1;
break;
}
}
}
/*else if (trial==0)
printf("decoder is not supported\n");*/
else if (trial==0)
printf("decoder is not supported\n");
}
for(j=0;j<MAX_NUM_DLSCH_SEGMENTS;j++) {
openair1/PHY/CODING/nrLDPC_encoder/defs.h
+13 -1
View File
@@ -31,6 +31,18 @@
#include "PHY/TOOLS/time_meas.h"
/*ldpc_encoder.c*/
int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,short Zc,short Kb,short block_length);
/*ldpc_encoder2.c*/
void encode_parity_check_part_optim(uint8_t *c,uint8_t *d, short BG,short Zc,short Kb);
int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,short block_length,short BG,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
/*ldpc_generate_coefficient.c*/
int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,unsigned char gen_code);
/*
int encode_parity_check_part(unsigned char *c,unsigned char *d, short BG,short Zc,short Kb);
int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,short Zc,short Kb,short block_length);
int ldpc_encoder(unsigned char *test_input,unsigned char *channel_input,short block_length, double rate);
@@ -38,4 +50,4 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
int ldpc_encoder_multi_segment(unsigned char **test_input,unsigned char **channel_input,short block_length,double rate,uint8_t n_segments);
int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,short block_length,int nom_rate,int denom_rate,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,short block_length,int nom_rate,int denom_rate,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
*/
openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c
+10 -14
View File
@@ -198,10 +198,10 @@ void encode_parity_check_part_optim(uint8_t *c,uint8_t *d, short BG,short Zc,sho
}
int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,short block_length,int nom_rate,int denom_rate,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
{
short BG,Zc,Kb,nrows,ncols;
short Kb,Zc,nrows,ncols;
int i,i1;
int no_punctured_columns,removed_bit;
@@ -211,16 +211,14 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
int simd_size;
//determine number of bits in codeword
//if (block_length>3840)
if (BG==1)
{
BG=1;
Kb = 22;
nrows=46; //parity check bits
ncols=22; //info bits
}
/*else if (block_length<=3840)
else if (BG==2)
{
BG=2;
nrows=42; //parity check bits
ncols=10; // info bits
@@ -232,7 +230,7 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
Kb = 8;
else
Kb = 6;
}*/
}
//find minimum value in all sets of lifting size
Zc=0;
@@ -315,10 +313,10 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
return 0;
}
int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,short block_length,int nom_rate,int denom_rate,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,short block_length,short BG,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
{
short BG,Zc,Kb,nrows,ncols;
short Kb,Zc,nrows,ncols;
int i,i1,j;
int no_punctured_columns,removed_bit;
//Table of possible lifting sizes
@@ -345,16 +343,14 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
AssertFatal(n_segments>0&&n_segments<=8,"0 < n_segments %d <= 8\n",n_segments);
//determine number of bits in codeword
//if (block_length>3840)
if (BG==1)
{
BG=1;
Kb = 22;
nrows=46; //parity check bits
ncols=22; //info bits
}
/*else if (block_length<=3840)
else if (BG==2)
{
BG=2;
nrows=42; //parity check bits
ncols=10; // info bits
@@ -366,7 +362,7 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
Kb = 8;
else
Kb = 6;
}*/
}
//find minimum value in all sets of lifting size
Zc=0;
openair1/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c
+15 -9
View File
@@ -361,13 +361,13 @@ short *choose_generator_matrix(short BG,short Zc)
return Gen_shift_values;
}
int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,short block_length,int nom_rate,int denom_rate,unsigned char gen_code)
int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,unsigned char gen_code)
{
unsigned char c[22*384]; //padded input, unpacked, max size
unsigned char d[68*384]; //coded output, unpacked, max size
unsigned char channel_temp,temp;
short *Gen_shift_values, *no_shift_values, *pointer_shift_values;
short BG,Zc,Kb,nrows,ncols;
short Zc,Kb,nrows,ncols;
int i,i1,i2,i3,i4,i5,temp_prime,var;
int no_punctured_columns,removed_bit;
//Table of possible lifting sizes
@@ -378,16 +378,14 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
int indlist2[1000];
//determine number of bits in codeword
//if (block_length>3840)
if (BG==1)
{
BG=1;
Kb = 22;
nrows=46; //parity check bits
ncols=22; //info bits
}
/*else if (block_length<=3840)
else if (BG==2)
{
BG=2;
nrows=42; //parity check bits
ncols=10; // info bits
@@ -399,7 +397,7 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
Kb = 8;
else
Kb = 6;
}*/
}
//find minimum value in all sets of lifting size
Zc=0;
@@ -417,6 +415,8 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
return(-1);
}
int K = ncols*Zc;
Gen_shift_values=choose_generator_matrix(BG,Zc);
if (Gen_shift_values==NULL) {
printf("ldpc_encoder_orig: could not find generator matrix\n");
@@ -438,9 +438,15 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
}
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc;
//nrows - no_punctured_columns = 2 +2*block_length/Zc
removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(block_length*3);
// ((nrows-no_punctured_columns) * Zc-removed_bit) =
// 2Zc + 2*block_length
//printf("%d\n",no_punctured_columns);
//printf("%d\n",removed_bit);
//printf("%d\n",nrows-no_punctured_columns);
//printf("%d\n",((nrows-no_punctured_columns) * Zc-removed_bit));
// unpack input
memset(c,0,sizeof(unsigned char) * ncols * Zc);
memset(d,0,sizeof(unsigned char) * nrows * Zc);
@@ -608,8 +614,8 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
}
// information part and puncture columns
memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char));
memcpy(&channel_input[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char));
memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char)); //systematic bits
memcpy(&channel_input[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char)); //systematic bits 2Zc + 2*block_length
//memcpy(channel_input,c,Kb*Zc*sizeof(unsigned char));
return 0;
}
openair1/PHY/INIT/nr_init.c
+81 -18
View File
@@ -33,6 +33,10 @@
#include "assertions.h"
#include <math.h>
#include "PHY/NR_REFSIG/defs.h"
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "SCHED_NR/fapi_nr_l1.h"
extern uint32_t from_earfcn(int eutra_bandP,uint32_t dl_earfcn);
extern int32_t get_uldl_offset(int eutra_bandP);
@@ -40,36 +44,35 @@ int l1_north_init_gNB() {
int i,j;
if (RC.nb_L1_inst > 0 && RC.nb_L1_CC != NULL && RC.gNB != NULL)
if (RC.nb_nr_L1_inst > 0 && RC.nb_nr_L1_CC != NULL && RC.gNB != NULL)
{
AssertFatal(RC.nb_L1_inst>0,"nb_L1_inst=%d\n",RC.nb_L1_inst);
AssertFatal(RC.nb_L1_CC!=NULL,"nb_L1_CC is null\n");
AssertFatal(RC.nb_nr_L1_inst>0,"nb_nr_L1_inst=%d\n",RC.nb_nr_L1_inst);
AssertFatal(RC.nb_nr_L1_CC!=NULL,"nb_nr_L1_CC is null\n");
AssertFatal(RC.gNB!=NULL,"RC.gNB is null\n");
LOG_I(PHY,"%s() RC.nb_L1_inst:%d\n", __FUNCTION__, RC.nb_L1_inst);
LOG_I(PHY,"%s() RC.nb_nr_L1_inst:%d\n", __FUNCTION__, RC.nb_nr_L1_inst);
for (i=0;i<RC.nb_L1_inst;i++) {
for (i=0;i<RC.nb_nr_L1_inst;i++) {
AssertFatal(RC.gNB[i]!=NULL,"RC.gNB[%d] is null\n",i);
AssertFatal(RC.nb_L1_CC[i]>0,"RC.nb_L1_CC[%d]=%d\n",i,RC.nb_L1_CC[i]);
AssertFatal(RC.nb_nr_L1_CC[i]>0,"RC.nb_nr_L1_CC[%d]=%d\n",i,RC.nb_nr_L1_CC[i]);
LOG_I(PHY,"%s() RC.nb_L1_CC[%d]:%d\n", __FUNCTION__, i, RC.nb_L1_CC[i]);
LOG_I(PHY,"%s() RC.nb_nr_L1_CC[%d]:%d\n", __FUNCTION__, i, RC.nb_nr_L1_CC[i]);
for (j=0;j<RC.nb_L1_CC[i];j++) {
for (j=0;j<RC.nb_nr_L1_CC[i];j++) {
AssertFatal(RC.gNB[i][j]!=NULL,"RC.gNB[%d][%d] is null\n",i,j);
if ((RC.gNB[i][j]->if_inst = IF_Module_init(i))<0) return(-1);
if ((RC.gNB[i][j]->if_inst = NR_IF_Module_init(i))<0) return(-1);
LOG_I(PHY,"%s() RC.gNB[%d][%d] installing callbacks\n", __FUNCTION__, i, j);
RC.gNB[i][j]->if_inst->PHY_config_req = phy_config_request;
nr_phy_config_request(RC.gNB[i][j]);
RC.gNB[i][j]->if_inst->schedule_response = schedule_response;
RC.gNB[i][j]->if_inst->NR_PHY_config_req = nr_phy_config_request;
RC.gNB[i][j]->if_inst->NR_Schedule_response = nr_schedule_response;
}
}
}
else
{
LOG_I(PHY,"%s() Not installing PHY callbacks - RC.nb_L1_inst:%d RC.nb_L1_CC:%p RC.gNB:%p\n", __FUNCTION__, RC.nb_L1_inst, RC.nb_L1_CC, RC.gNB);
LOG_I(PHY,"%s() Not installing PHY callbacks - RC.nb_nr_L1_inst:%d RC.nb_nr_L1_CC:%p RC.gNB:%p\n", __FUNCTION__, RC.nb_nr_L1_inst, RC.nb_nr_L1_CC, RC.gNB);
}
return(0);
}
@@ -82,7 +85,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
// shortcuts
NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
nfapi_config_request_t* cfg = &gNB->gNB_config;
nfapi_nr_config_request_t* cfg = &gNB->gNB_config;
NR_gNB_COMMON* const common_vars = &gNB->common_vars;
LTE_eNB_PUSCH** const pusch_vars = gNB->pusch_vars;
LTE_eNB_SRS* const srs_vars = gNB->srs_vars;
@@ -227,7 +230,7 @@ void phy_config_request(PHY_Config_t *phy_config) {
uint8_t Mod_id = phy_config->Mod_id;
int CC_id = phy_config->CC_id;
nfapi_config_request_t *cfg = phy_config->cfg;
nfapi_nr_config_request_t *cfg = phy_config->cfg;
NR_DL_FRAME_PARMS *fp;
PHICH_RESOURCE_t phich_resource_table[4]={oneSixth,half,one,two};
@@ -269,7 +272,7 @@ void phy_config_request(PHY_Config_t *phy_config) {
void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
{
// NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
nfapi_config_request_t *cfg = &gNB->gNB_config;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_gNB_COMMON* const common_vars = &gNB->common_vars;
LTE_eNB_PUSCH** const pusch_vars = gNB->pusch_vars;
LTE_eNB_SRS* const srs_vars = gNB->srs_vars;
@@ -338,10 +341,11 @@ void install_schedule_handlers(IF_Module_t *if_inst)
}*/
/// this function is a temporary addition for NR configuration
void nr_phy_config_request(PHY_VARS_gNB *gNB)
/*void nr_phy_config_request(PHY_VARS_gNB *gNB)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
nfapi_config_request_t *gNB_config = &gNB->gNB_config;
nfapi_nr_config_request_t *gNB_config = &gNB->gNB_config;
//overwrite for new NR parameters
gNB_config->nfapi_config.rf_bands.rf_band[0] = 22;
@@ -367,4 +371,63 @@ void nr_phy_config_request(PHY_VARS_gNB *gNB)
gNB->configured = 1;
LOG_I(PHY,"gNB configured\n");
}*/
void nr_phy_config_request(NR_PHY_Config_t *phy_config)
{
uint8_t Mod_id = phy_config->Mod_id;
int CC_id = phy_config->CC_id;
NR_DL_FRAME_PARMS *fp = &RC.gNB[Mod_id][CC_id]->frame_parms;
nfapi_nr_config_request_t *gNB_config = &RC.gNB[Mod_id][CC_id]->gNB_config;
gNB_config->nfapi_config.rf_bands.rf_band[0] = phy_config->cfg->nfapi_config.rf_bands.rf_band[0]; //22
gNB_config->nfapi_config.earfcn.value = phy_config->cfg->nfapi_config.earfcn.value; //6600
gNB_config->subframe_config.numerology_index_mu.value = phy_config->cfg->subframe_config.numerology_index_mu.value;//1
gNB_config->rf_config.tx_antenna_ports.value = phy_config->cfg->rf_config.tx_antenna_ports.value; //1
gNB_config->rf_config.dl_channel_bandwidth.value = phy_config->cfg->rf_config.dl_channel_bandwidth.value;//106;
gNB_config->rf_config.ul_channel_bandwidth.value = phy_config->cfg->rf_config.ul_channel_bandwidth.value;//106;
gNB_config->sch_config.half_frame_index.value = 0;
gNB_config->sch_config.ssb_subcarrier_offset.value = phy_config->cfg->sch_config.ssb_subcarrier_offset.value;//0;
gNB_config->sch_config.n_ssb_crb.value = 86;
gNB_config->sch_config.physical_cell_id.value = phy_config->cfg->sch_config.physical_cell_id.value;
if (phy_config->cfg->subframe_config.duplex_mode.value == 0) {
gNB_config->subframe_config.duplex_mode.value = TDD;
}
else {
gNB_config->subframe_config.duplex_mode.value = FDD;
}
RC.gNB[Mod_id][CC_id]->mac_enabled = 1;
fp->dl_CarrierFreq = from_earfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.earfcn.value);
fp->ul_CarrierFreq = fp->dl_CarrierFreq - (get_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
fp->threequarter_fs = 0;
LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,gNB_tx_antenna_ports %d,DL freq %u)\n",
Mod_id,
CC_id,
gNB_config->nfapi_config.rf_bands.rf_band[0],
gNB_config->rf_config.dl_channel_bandwidth.value,
gNB_config->rf_config.ul_channel_bandwidth.value,
gNB_config->sch_config.physical_cell_id.value,
gNB_config->rf_config.tx_antenna_ports.value,
fp->dl_CarrierFreq );
nr_init_frame_parms(gNB_config, fp);
if (RC.gNB[Mod_id][CC_id]->configured == 1){
LOG_E(PHY,"Already gNB already configured, do nothing\n");
return;
}
RC.gNB[Mod_id][CC_id]->configured = 1;
LOG_I(PHY,"gNB %d/%d configured\n",Mod_id,CC_id);
}
openair1/PHY/INIT/nr_init_ru.c
+5 -5
View File
@@ -100,12 +100,12 @@ int nr_phy_init_RU(RU_t *ru) {
LOG_D(PHY,"[INIT] prach_vars->rxsigF[%d] = %p\n",i,ru->prach_rxsigF[i]);
}
AssertFatal(RC.nb_L1_inst <= NUMBER_OF_eNB_MAX,"gNB instances %d > %d\n",
RC.nb_L1_inst,NUMBER_OF_eNB_MAX);
AssertFatal(RC.nb_nr_L1_inst <= NUMBER_OF_eNB_MAX,"gNB instances %d > %d\n",
RC.nb_nr_L1_inst,NUMBER_OF_gNB_MAX);
LOG_E(PHY,"[INIT] %s() RC.nb_L1_inst:%d \n", __FUNCTION__, RC.nb_L1_inst);
LOG_E(PHY,"[INIT] %s() RC.nb_nr_L1_inst:%d \n", __FUNCTION__, RC.nb_nr_L1_inst);
for (i=0; i<RC.nb_L1_inst; i++) {
for (i=0; i<RC.nb_nr_L1_inst; i++) {
for (p=0;p<15;p++) {
LOG_D(PHY,"[INIT] %s() nb_antenna_ports_eNB:%d \n", __FUNCTION__, ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value);
if (p<ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value || p==5) {
@@ -178,7 +178,7 @@ void nr_phy_free_RU(RU_t *ru)
free_and_zero(ru->prach_rxsigF);
/* ru->prach_rxsigF_br is not allocated -> don't free */
for (i = 0; i < RC.nb_L1_inst; i++) {
for (i = 0; i < RC.nb_nr_L1_inst; i++) {
for (p = 0; p < 15; p++) {
if (p < ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value || p == 5) {
for (j=0; j<ru->nb_tx; j++) free_and_zero(ru->beam_weights[i][p][j]);
openair1/PHY/INIT/nr_init_ue.c
+12 -5
View File
@@ -33,6 +33,7 @@
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h"
//uint8_t dmrs1_tab_ue[8] = {0,2,3,4,6,8,9,10};
@@ -656,6 +657,9 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
printf("Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx);
//LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST);
//phy_init_nr_top(&ue->frame_parms);
//nr_init_frame_parms_ue(&ue->frame_parms);
// many memory allocation sizes are hard coded
AssertFatal( fp->nb_antennas_rx <= 2, "hard coded allocation for ue_common_vars->dl_ch_estimates[eNB_id]" );
@@ -841,17 +845,17 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
pbch_vars[eNB_id]->rxdataF_ext = (int32_t**)malloc16( fp->nb_antennas_rx*sizeof(int32_t*) );
pbch_vars[eNB_id]->rxdataF_comp = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pbch_vars[eNB_id]->dl_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pbch_vars[eNB_id]->llr = (int8_t*)malloc16_clear( 1920 );
pbch_vars[eNB_id]->llr = (int8_t*)malloc16_clear( 1920 );//
prach_vars[eNB_id]->prachF = (int16_t*)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) );
prach_vars[eNB_id]->prach = (int16_t*)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) );
for (i=0; i<fp->nb_antennas_rx; i++) {
pbch_vars[eNB_id]->rxdataF_ext[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*6*12*4 );
pbch_vars[eNB_id]->rxdataF_ext[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*20*12*4 );
for (j=0; j<4; j++) {//fp->nb_antennas_tx;j++) {
int idx = (j<<1)+i;
pbch_vars[eNB_id]->rxdataF_comp[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*6*12*4 );
pbch_vars[eNB_id]->dl_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*6*12*4 );
pbch_vars[eNB_id]->rxdataF_comp[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*20*12*4 );
pbch_vars[eNB_id]->dl_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*20*12*4 );
}
}
}
@@ -870,7 +874,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
if (abstraction_flag == 0) {
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
phy_init_lte_ue__PDSCH( (*pdsch_vars_th)[th_id][eNB_id], fp );
//phy_init_lte_ue__PDSCH( (*pdsch_vars_th)[th_id][eNB_id], fp );
(*pdsch_vars_th)[th_id][eNB_id]->llr[1] = (int16_t*)malloc16_clear( (8*((3*8*8448)+12))*sizeof(int16_t) );
}
@@ -955,6 +959,9 @@ void phy_init_nr_top(NR_DL_FRAME_PARMS *frame_parms)
generate_ul_reference_signal_sequences(SHRT_MAX);
// Polar encoder init for PBCH
nr_polar_init(&frame_parms->pbch_polar_params, 1);
//lte_sync_time_init(frame_parms);
//generate_ul_ref_sigs();
openair1/PHY/INIT/nr_parms.c
+4 -17
View File
@@ -26,7 +26,7 @@
uint32_t nr_subcarrier_spacing[MAX_NUM_SUBCARRIER_SPACING] = {15e3, 30e3, 60e3, 120e3, 240e3};
uint16_t nr_slots_per_subframe[MAX_NUM_SUBCARRIER_SPACING] = {1, 2, 4, 16, 32};
int nr_init_frame_parms(nfapi_config_request_t* config,
int nr_init_frame_parms(nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
@@ -146,13 +146,12 @@ int nr_init_frame_parms(nfapi_config_request_t* config,
frame_parms->samples_per_subframe = (frame_parms->samples_per_subframe_wCP + (frame_parms->nb_prefix_samples0 * frame_parms->slots_per_subframe) +
(frame_parms->nb_prefix_samples * frame_parms->slots_per_subframe * (frame_parms->symbols_per_slot - 1)));
frame_parms->samples_per_frame = 10 * frame_parms->samples_per_subframe;
frame_parms->freq_range = (frame_parms->dl_CarrierFreq < 6e9)? nr_FR1 : nr_FR2;
return 0;
}
int nr_init_frame_parms_ue(nfapi_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms)
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms)
{
int N_RB = 106;
@@ -165,18 +164,6 @@ int nr_init_frame_parms_ue(nfapi_config_request_t* config,
LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, N_RB, Ncp);
#endif
frame_parms->frame_type = FDD;
frame_parms->tdd_config = 3;
//frame_parms[CC_id]->tdd_config_S = 0;
frame_parms->N_RB_DL = 100;
frame_parms->N_RB_UL = 100;
frame_parms->Ncp = NORMAL;
//frame_parms[CC_id]->Ncp_UL = NORMAL;
frame_parms->Nid_cell = 0;
//frame_parms[CC_id]->num_MBSFN_config = 0;
frame_parms->nb_antenna_ports_eNB = 1;
frame_parms->nb_antennas_tx = 1;
frame_parms->nb_antennas_rx = 1;
if (Ncp == EXTENDED)
AssertFatal(mu == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, mu);
@@ -295,7 +282,7 @@ int nr_init_frame_parms_ue(nfapi_config_request_t* config,
//frame_parms->samples_per_subframe = (frame_parms->samples_per_subframe_wCP + (frame_parms->nb_prefix_samples0 * frame_parms->slots_per_subframe) +
// (frame_parms->nb_prefix_samples * frame_parms->slots_per_subframe * (frame_parms->symbols_per_slot - 1)));
frame_parms->samples_per_frame = 10 * frame_parms->samples_per_subframe;
frame_parms->freq_range = (frame_parms->dl_CarrierFreq < 6e9)? nr_FR1 : nr_FR2;
return 0;
}
openair1/PHY/INIT/phy_init.h
+5 -3
View File
@@ -374,12 +374,14 @@ void phy_config_request(PHY_Config_t *phy_config);
int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf);
void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms(nfapi_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(nfapi_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms(nfapi_nr_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms);
int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB,uint8_t abstraction_flag);
void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms);
int phy_init_nr_gNB(PHY_VARS_gNB *gNB, unsigned char is_secondary_gNB, unsigned char abstraction_flag);
void nr_phy_config_request(PHY_VARS_gNB *gNB);
void nr_phy_config_request(NR_PHY_Config_t *gNB);
void phy_free_nr_gNB(PHY_VARS_gNB *gNB);
int l1_north_init_gNB(void);
/** @} */
#endif
openair1/PHY/MODULATION/modulation_UE.h
+3 -2
View File
@@ -48,12 +48,13 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue,
int no_prefix,
int reset_freq_est);
int slot_fep_pbch(PHY_VARS_NR_UE *phy_vars_ue,
int nr_slot_fep(PHY_VARS_NR_UE *phy_vars_ue,
unsigned char l,
unsigned char Ns,
int sample_offset,
int no_prefix,
int reset_freq_est);
int reset_freq_est,
NR_CHANNEL_EST_t channel);
int slot_fep_mbsfn(PHY_VARS_UE *phy_vars_ue,
unsigned char l,
openair1/PHY/MODULATION/slot_fep.c
+76 -10
View File
@@ -23,17 +23,19 @@
#include "PHY/defs_nr_UE.h"
#include "modulation_UE.h"
#include "PHY/LTE_ESTIMATION/lte_estimation.h"
#include "PHY/NR_UE_ESTIMATION/nr_estimation.h"
//#define DEBUG_FEP
#define SOFFSET 0
int slot_fep_pbch(PHY_VARS_NR_UE *ue,
int nr_slot_fep(PHY_VARS_NR_UE *ue,
unsigned char l,
unsigned char Ns,
int sample_offset,
int no_prefix,
int reset_freq_est)
int reset_freq_est,
NR_CHANNEL_EST_t channel)
{
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
NR_UE_COMMON *common_vars = &ue->common_vars;
@@ -44,9 +46,14 @@ int slot_fep_pbch(PHY_VARS_NR_UE *ue,
unsigned int nb_prefix_samples0 = (no_prefix ? 0 : frame_parms->nb_prefix_samples0);
unsigned int subframe_offset;//,subframe_offset_F;
unsigned int slot_offset;
int i;
//int i;
unsigned int frame_length_samples = frame_parms->samples_per_subframe * 10;
unsigned int rx_offset;
//NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0];
uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset;
uint16_t nb_rb_coreset = 24;
uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset;
uint16_t nb_rb_pdsch = 100;
/*LTE_UE_DLSCH_t **dlsch_ue = phy_vars_ue->dlsch_ue[eNB_id];
unsigned char harq_pid = dlsch_ue[0]->current_harq_pid;
@@ -94,10 +101,10 @@ int slot_fep_pbch(PHY_VARS_NR_UE *ue,
slot_offset = (frame_parms->samples_per_tti>>1) * (Ns%2);
}
if (l<0 || l>=7-frame_parms->Ncp) {
/*if (l<0 || l>=7-frame_parms->Ncp) {
printf("slot_fep: l must be between 0 and %d\n",7-frame_parms->Ncp);
return(-1);
}
}*/
if (Ns<0 || Ns>=20) {
printf("slot_fep: Ns must be between 0 and 19\n");
@@ -181,12 +188,15 @@ int slot_fep_pbch(PHY_VARS_NR_UE *ue,
}
if (ue->perfect_ce == 0) {
if ((l>0) && (l<4)) {
switch(channel){
case NR_PBCH_EST:
//if ((l>4) && (l<8)) {
for (aa=0; aa<frame_parms->nb_antenna_ports_eNB; aa++) {
#ifdef DEBUG_FEP
//#ifdef DEBUG_FEP
printf("Channel estimation eNB %d, aatx %d, slot %d, symbol %d\n",eNB_id,aa,Ns,l);
#endif
//#endif
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_channel_estimation_stats);
#endif
@@ -195,8 +205,10 @@ int slot_fep_pbch(PHY_VARS_NR_UE *ue,
aa,
l,
symbol);
}
//}
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats);
#endif
// do frequency offset estimation here!
// use channel estimates from current symbol (=ch_t) and last symbol (ch_{t-1})
@@ -221,6 +233,60 @@ int slot_fep_pbch(PHY_VARS_NR_UE *ue,
}
}
break;
case NR_PDCCH_EST:
for (aa=0; aa<frame_parms->nb_antenna_ports_eNB; aa++) {
#ifdef DEBUG_FEP
printf("Channel estimation eNB %d, aatx %d, slot %d, symbol %d\n",eNB_id,aa,Ns,l);
#endif
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_channel_estimation_stats);
#endif
nr_pdcch_channel_estimation(ue,eNB_id,0,
Ns,
aa,
l,
symbol,
coreset_start_subcarrier,
nb_rb_coreset);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats);
#endif
}
break;
case NR_PDSCH_EST:
for (aa=0; aa<frame_parms->nb_antenna_ports_eNB; aa++) {
#ifdef DEBUG_FEP
printf("Channel estimation eNB %d, aatx %d, slot %d, symbol %d\n",eNB_id,aa,Ns,l);
#endif
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_channel_estimation_stats);
#endif
nr_pdsch_channel_estimation(ue,eNB_id,0,
Ns,
aa,
l,
symbol,
bwp_start_subcarrier,
nb_rb_pdsch);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats);
#endif
}
break;
case NR_SSS_EST:
break;
default:
LOG_E(PHY,"[UE][FATAL] Unknown channel format %d\n",channel);
return(-1);
break;
}
}
openair1/PHY/NR_REFSIG/nr_dmrs_rx.c
+99 -19
View File
@@ -41,6 +41,7 @@
#include "refsig_defs_ue.h"
#include "PHY/defs_nr_UE.h"
#include "nr_mod_table.h"
#include "log.h"
/*Table 7.4.1.1.2-1/2 from 38.211 */
@@ -49,18 +50,69 @@ int wt1[8][2] = {{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1}};
int wf2[12][2] = {{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,1},{1,1},{1,-1},{1,1},{1,1}};
int wt2[12][2] = {{1,1},{1,1},{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1},{1,-1},{1,-1}};
short nr_mod_table[14] = {0,0,23170,23170,-23170,-23170,23170,23170,23170,-23170,-23170,23170,-23170,-23170};
//extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
short nr_rx_mod_table[NR_MOD_TABLE_SIZE_SHORT] = {0,0,23170,-23170,-23170,23170,23170,-23170,23170,23170,-23170,-23170,-23170,23170};
/*int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int nr_gold_pdcch[7][20][3][10],
int32_t *output,
unsigned short p,
int length_dmrs,
unsigned short nb_rb_coreset)
{
int32_t qpsk[4],n;
int w,ind,l,ind_dword,ind_qpsk_symb,kp,k;
short pamp;
pamp = ONE_OVER_SQRT2_Q15;
// This includes complex conjugate for channel estimation
((short *)&qpsk[0])[0] = pamp;
((short *)&qpsk[0])[1] = -pamp;
((short *)&qpsk[1])[0] = -pamp;
((short *)&qpsk[1])[1] = -pamp;
((short *)&qpsk[2])[0] = pamp;
((short *)&qpsk[2])[1] = pamp;
((short *)&qpsk[3])[0] = -pamp;
((short *)&qpsk[3])[1] = pamp;
if (p==2000) {
for (n=0; n<nb_rb_coreset*3; n++) {
for (l =0; l<length_dmrs; l++){
for (kp=0; kp<3; kp++){
ind = 3*n+kp;
ind_dword = ind>>4;
ind_qpsk_symb = ind&0xf;
output[k] = qpsk[(nr_gold_pdcch[eNB_offset][Ns][l][ind_dword]>>(2*ind_qpsk_symb))&3];
#ifdef DEBUG_DL_DMRS
LOG_I(PHY,"Ns %d, p %d, ind_dword %d, ind_qpsk_symbol %d\n",
Ns,p,idx_dword,idx_qpsk_symb);
LOG_I(PHY,"index = %d\n",(nr_gold_pdsch[0][Ns][lprime][ind_dword]>>(2*ind_qpsk_symb))&3);
#endif
k++;
}
}
}
} else {
LOG_E(PHY,"Illegal PDCCH DMRS port %d\n",p);
}
return(0);
}*/
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
unsigned int ncp,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int nr_gold_pdsch[2][20][2][21],
int32_t *output,
unsigned short p,
int length_dmrs,
unsigned short nb_pdsch_rb)
unsigned short nb_rb_pdsch)
{
int32_t qpsk[4],nqpsk[4],*qpsk_p, n;
int w,mprime,ind,l,ind_dword,ind_qpsk_symb,kp,lp, config_type, k;
@@ -74,7 +126,7 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
printf("dmrs config type %d port %d\n", config_type, p);
// Compute the correct pilot amplitude, sqrt_rho_b = Q3.13
pamp = 23170; //ONE_OVER_SQRT2_Q15;
pamp = ONE_OVER_SQRT2_Q15;
// This includes complex conjugate for channel estimation
((short *)&qpsk[0])[0] = pamp;
@@ -102,10 +154,9 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
LOG_E(PHY,"Bad PDSCH DMRS config type %d\n", config_type);
if ((p>=1000) && (p<((config_type==0) ? 1008 : 1012))) {
if (/*ue->frame_parms.Ncp == NORMAL*/ncp ==0) {
// r_n from 38.211 7.4.1.1
for (n=0; n<nb_pdsch_rb*((config_type==0) ? 3:2); n++) {
for (n=0; n<nb_rb_pdsch*((config_type==0) ? 3:2); n++) {
for (lp =0; lp<length_dmrs; lp++){
for (kp=0; kp<2; kp++){
w = (wf[p-1000][kp])*(wt[p-1000][lp]);
@@ -115,7 +166,7 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
ind_dword = ind>>4;
ind_qpsk_symb = ind&0xf;
output[k] = qpsk_p[(ue->nr_gold_pdsch[0][Ns][lp][ind_dword]>>(2*ind_qpsk_symb))&3];
output[k] = qpsk_p[(nr_gold_pdsch[0][Ns][lp][ind_dword]>>(2*ind_qpsk_symb))&3];
#ifdef DEBUG_DL_DMRS
@@ -128,9 +179,6 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
}
}
}
} else {
LOG_E(PHY,"extended cp not supported for PDSCH DMRS yet\n");
}
} else {
LOG_E(PHY,"Illegal p %d PDSCH DMRS port\n",p);
}
@@ -138,19 +186,51 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
return(0);
}
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int *nr_gold_pdcch,
int32_t *output,
unsigned short p,
unsigned short nb_rb_coreset)
{
uint8_t idx=0;
uint8_t pdcch_rb_offset =0;
//nr_gold_pdcch += ((int)floor(ue->frame_parms.ssb_start_subcarrier/12)+pdcch_rb_offset)*3/32;
if (p==2000) {
for (int i=0; i<((nb_rb_coreset*6)>>1); i++) {
idx = ((((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
((int16_t*)output)[i<<1] = nr_rx_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
((int16_t*)output)[(i<<1)+1] = nr_rx_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_PDCCH
printf("i %d idx %d pdcch gold %d b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, nr_gold_pdcch[(i<<1)>>5], (((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1),
(((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), ((int16_t*)output)[i<<1], ((int16_t*)output)[(m<<1)+1],&output[0]);
#endif
}
}
return(0);
}
int nr_pbch_dmrs_rx(unsigned int *nr_gold_pbch,
int32_t *output )
{
int m;
int m;
uint8_t idx=0;
/// QPSK modulation
for (m=0; m<NR_PBCH_DMRS_LENGTH>>1; m++) {
idx = ((((nr_gold_pbch[(m<<1)>>5])>>((m<<1)&0x1f))&1)<<1) ^ (((nr_gold_pbch[((m<<1)+1)>>5])>>(((m<<1)+1)&0x1f))&1);
((int16_t*)output)[m<<1] = nr_rx_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
((int16_t*)output)[(m<<1)+1] = nr_rx_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
/// BPSK modulation
for (m=0; m<NR_PBCH_DMRS_LENGTH; m++) {
((int16_t*)output)[m<<1] = nr_mod_table[((1 + ((nr_gold_pbch[m>>5]&(1<<(m&0x1f)))>>(m&0x1f)))<<1)];
((int16_t*)output)[(m<<1)+1] = nr_mod_table[((1 + ((nr_gold_pbch[m>>5]&(1<<(m&0x1f)))>>(m&0x1f)))<<1) + 1];
#ifdef DEBUG_PBCH
//printf("nr_gold_pbch[m>>5] %x\n",nr_gold_pbch[m>>5]);
if (m<6)
printf("m %d output %d %d addr %p\n", m, output[2*m], output[2*m+1],&output[0]);
if (m<16)
{printf("nr_gold_pbch[(m<<1)>>5] %x\n",nr_gold_pbch[(m<<1)>>5]);
printf("m %d output %d %d addr %p\n", m, ((int16_t*)output)[m<<1], ((int16_t*)output)[(m<<1)+1],&output[0]);
}
#endif
}
openair1/PHY/NR_REFSIG/nr_gold.c
+1 -1
View File
@@ -27,7 +27,7 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB)
unsigned int n, x1, x2;
unsigned char Nid, i_ssb, i_ssb2;
unsigned char Lmax, l, n_hf, N_hf;
nfapi_config_request_t *cfg = &gNB->gNB_config;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
Nid = cfg->sch_config.physical_cell_id.value;
openair1/PHY/NR_REFSIG/nr_gold_ue.c
+48 -5
View File
@@ -64,11 +64,54 @@ void nr_gold_pbch(PHY_VARS_NR_UE* ue)
}
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned int nr_gold_pdsch[2][20][2][21],unsigned int Nid_cell, unsigned short *n_idDMRS, unsigned short length_dmrs)
void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned short n_idDMRS, unsigned short length_dmrs)
{
unsigned char ns,l;
unsigned int n,x1,x2,x2tmp0,x2tmp1, x2tmp2,x2s;
unsigned int n,x1,x2,x2tmp0;
unsigned int nid;
if (n_idDMRS)
nid = n_idDMRS;
else
nid = ue->frame_parms.Nid_cell;
for (ns=0; ns<20; ns++) {
for (l=0; l<length_dmrs; l++) {
x2tmp0 = ((14*ns+l+1)*((nid<<1)+1))<<17;
x2 = (x2tmp0+(nid<<1))%(1<<31); //cinit
x1 = 1+ (1<<31);
x2=x2 ^ ((x2 ^ (x2>>1) ^ (x2>>2) ^ (x2>>3))<<31);
// skip first 50 double words (1600 bits)
for (n=1; n<50; n++) {
x1 = (x1>>1) ^ (x1>>4);
x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
x2 = x2 ^ (x2<<31) ^ (x2<<30) ^ (x2<<29) ^ (x2<<28);
//printf("x1 : %x, x2 : %x\n",x1,x2);
}
for (n=0; n<52; n++) {
x1 = (x1>>1) ^ (x1>>4);
x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
x2 = x2 ^ (x2<<31) ^ (x2<<30) ^ (x2<<29) ^ (x2<<28);
ue->nr_gold_pdcch[0][ns][l][n] = x1^x2;
//printf("n=%d : c %x\n",n,x1^x2);
}
}
}
}
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned short *n_idDMRS, unsigned short length_dmrs)
{
unsigned char ns,l;
unsigned int n,x1,x2,x2tmp0;
int nscid;
unsigned int nid;
@@ -79,14 +122,14 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned int nr_gold_p
if (n_idDMRS)
nid = n_idDMRS[nscid];
else
nid = Nid_cell;
nid = ue->frame_parms.Nid_cell;
for (ns=0; ns<20; ns++) {
for (l=0; l<length_dmrs; l++) {
x2tmp0 = ((14*ns+(lbar+l)+1)*((nid<<1)+1))<<17;
x2 = (x2tmp0+(nid<<1))%(1<<31); //cinit
x2 = (x2tmp0+(nid<<1)+nscid)%(1<<31); //cinit
x1 = 1+ (1<<31);
x2=x2 ^ ((x2 ^ (x2>>1) ^ (x2>>2) ^ (x2>>3))<<31);
@@ -105,7 +148,7 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned int nr_gold_p
x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
x2 = x2 ^ (x2<<31) ^ (x2<<30) ^ (x2<<29) ^ (x2<<28);
nr_gold_pdsch[nscid][ns][l][n] = x1^x2;
ue->nr_gold_pdsch[nscid][ns][l][n] = x1^x2;
//printf("n=%d : c %x\n",n,x1^x2);
}
openair1/PHY/NR_REFSIG/nr_mod_table.h
+1 -1
View File
@@ -1,4 +1,4 @@
#define NR_MOD_TABLE_SIZE_SHORT 14
#define NR_MOD_TABLE_BPSK_OFFSET 1
#define NR_MOD_TABLE_QPSK_OFFSET 3
short nr_mod_table[MOD_TABLE_SIZE_SHORT] = {0,0,23170,23170,-23170,-23170,23170,23170,23170,-23170,-23170,23170,-23170,-23170};
short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT] = {0,0,23170,23170,-23170,-23170,23170,23170,23170,-23170,-23170,23170,-23170,-23170};
openair1/PHY/NR_REFSIG/pss_nr.h
+1 -1
View File
@@ -49,7 +49,7 @@
//#define CIC_DECIMATOR /* it allows enabling decimation based on CIC filter. By default, decimation is based on a FIF filter */
#define TEST_SYNCHRO_TIMING_PSS (1) /* enable time profiling */
#define TEST_SYNCHRO_TIMING_PSS (1) /* enable time profiling */
//#define DBG_PSS_NR
openair1/PHY/NR_REFSIG/refsig_defs_ue.h
+18 -5
View File
@@ -31,21 +31,34 @@
*/
int nr_pbch_dmrs_rx(unsigned int *nr_gold_pbch, int32_t *output );
/*int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
unsigned int ncp,
/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PDCCH DMRS.
@param PHY_VARS_NR_UE* ue structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
*/
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int *nr_gold_pdcch,
int32_t *output,
unsigned short p,
unsigned short nb_rb_corset);
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int nr_gold_pdsch[2][20][2][21],
int32_t *output,
unsigned short p,
int length_dmrs,
unsigned short nb_pdsch_rb);*/
unsigned short nb_rb_pdsch);
void nr_gold_pbch(PHY_VARS_NR_UE* ue);
void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
unsigned short n_idDMRS,
unsigned short length_dmrs);
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
unsigned short lbar,
unsigned int nr_gold_pdsch[2][20][2][21],
unsigned int Nid_cell,
unsigned short *n_idDMRS,
unsigned short length_dmrs);
openair1/PHY/NR_REFSIG/ss_pbch_nr.h
+10 -4
View File
@@ -51,10 +51,16 @@
#define PSS_SC_START_NR (52) /* see from TS 38.211 table 7.4.3.1-1: Resources within an SS/PBCH block for PSS... */
/* define ofdm symbol offset in the SS/PBCH block of NR synchronisation */
#define PSS_SYMBOL_NB (0) /* symbol numbers for each element */
#define PBCH_SYMBOL_NB (1)
#define SSS_SYMBOL_NB (2)
#define PBCH_LAST_SYMBOL_NB (3)
#ifdef NR_UNIT_TEST
#define OFFSET_SS_PBCH (0)
#else
#define OFFSET_SS_PBCH (4)
#endif
#define PSS_SYMBOL_NB ((0) + OFFSET_SS_PBCH) /* symbol numbers for each element */
#define PBCH_SYMBOL_NB ((1) + OFFSET_SS_PBCH)
#define SSS_SYMBOL_NB ((2) + OFFSET_SS_PBCH)
#define PBCH_LAST_SYMBOL_NB ((3) + OFFSET_SS_PBCH)
/* SS/PBCH parameters */
#define N_RB_SS_PBCH_BLOCK (20)
openair1/PHY/NR_REFSIG/sss_nr.h
+1 -1
View File
@@ -32,6 +32,7 @@
#ifndef SSS_NR_H
#define SSS_NR_H
#include "limits.h"
#include "PHY/defs_nr_UE.h"
#include "PHY/types.h"
@@ -46,7 +47,6 @@
/************** DEFINE ********************************************/
#define INT_MIN (-2147483647 - 1)
#define SAMPLES_IQ (sizeof(int16_t)*2)
#define NUMBER_SSS_SEQUENCE (336)
#define INVALID_SSS_SEQUENCE (NUMBER_SSS_SEQUENCE)
openair1/PHY/NR_TRANSPORT/nr_dci.c
+1 -1
View File
@@ -130,7 +130,7 @@ uint8_t nr_generate_dci_top(NR_DCI_ALLOC_t dci_alloc,
int32_t** txdataF,
int16_t amp,
NR_DL_FRAME_PARMS* frame_parms,
nfapi_config_request_t* config)
nfapi_nr_config_request_t* config)
{
return 0;
}
openair1/PHY/NR_TRANSPORT/nr_dci.h
+3 -40
View File
@@ -18,50 +18,13 @@
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#ifndef __PHY_NR_TRANSPORT_DCI__H
#define __PHY_NR_TRANSPORT_DCI__H
#include "defs_gNB.h"
typedef enum {
nr_dci_format_0_0=0,
nr_dci_format_0_1,
nr_dci_format_2_0,
nr_dci_format_2_1,
nr_dci_format_2_2,
nr_dci_format_2_3,
nr_dci_format_1_0,
nr_dci_format_1_1,
} nr_dci_format_e;
typedef enum {
nr_rnti_type_SI_RNTI=0,
nr_rnti_type_RA_RNTI,
nr_rnti_type_C_RNTI,
nr_rnti_type_TC_RNTI,
nr_rnti_type_CS_RNTI,
nr_rnti_type_P_RNTI
} nr_rnti_type_e;
typedef struct {
/// Length of DCI in bits
uint8_t size;
/// Aggregation level
uint8_t L;
/// Position of first CCE of the dci
int firstCCE;
/// flag to indicate that this is a RA response
boolean_t ra_flag;
/// rnti
nr_rnti_type_e rnti;
/// Format
DCI_format_t format;
/// DCI pdu
uint8_t dci_pdu[8];
} NR_DCI_ALLOC_t;
typedef unsigned __int128 uint128_t;
uint8_t nr_get_dci_size(nr_dci_format_e format,
nr_rnti_type_e rnti,
@@ -72,6 +35,6 @@ uint8_t nr_generate_dci_top(NR_DCI_ALLOC_t dci_alloc,
int32_t** txdataF,
int16_t amp,
NR_DL_FRAME_PARMS* frame_parms,
nfapi_config_request_t* config)
nfapi_nr_config_request_t* config)
#endif //__PHY_NR_TRANSPORT_DCI__H
openair1/PHY/NR_TRANSPORT/nr_mcs.c
+59
View File
@@ -0,0 +1,59 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file PHY/NR_TRANSPORT/nr_mcs.c
* \brief Some support routines for NR MCS computations
* \author
* \date 2018
* \version 0.1
* \company Eurecom
* \email:
* \note
* \warning
*/
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
//get_Qm under PHY/LTE_TRANSPORT/lte_mcs.c is the same for NR.
uint8_t get_nr_Qm(uint8_t I_MCS)
{
if (I_MCS < 5)
return(2);
else if (I_MCS < 11)
return(4);
else if (I_MCS < 20)
return(6);
else
return(8);
}
uint8_t get_nr_Qm_ul(uint8_t I_MCS) {
if (I_MCS < 2)
return(2); //This should be 1 if UE has reported to support pi/2 BPSK, and 2 otherwise.
else if (I_MCS < 10)
return(2);
else if (I_MCS < 17)
return(4);
else
return(6);
}
openair1/PHY/NR_TRANSPORT/nr_pbch.c
+144 -36
View File
@@ -45,22 +45,25 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t nushift,
nfapi_config_request_t* config,
nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
int k,l;
int16_t a;
int16_t mod_dmrs[2 * NR_PBCH_DMRS_LENGTH];
int16_t mod_dmrs[NR_PBCH_DMRS_LENGTH<<1];
uint8_t idx=0;
uint8_t nushift = config->sch_config.physical_cell_id.value &3;
LOG_I(PHY, "PBCH DMRS mapping started at symbol %d shift %d\n", ssb_start_symbol+1, nushift);
/// BPSK modulation
/// QPSK modulation
for (int m=0; m<NR_PBCH_DMRS_LENGTH; m++) {
mod_dmrs[m<<1] = nr_mod_table[((NR_MOD_TABLE_BPSK_OFFSET + ((gold_pbch_dmrs[m>>5]&(1<<(m&0x1f)))>>(m&0x1f)))<<1)];
mod_dmrs[(m<<1)+1] = nr_mod_table[((NR_MOD_TABLE_BPSK_OFFSET + ((gold_pbch_dmrs[m>>5]&(1<<(m&0x1f)))>>(m&0x1f)))<<1) + 1];
idx = ((((gold_pbch_dmrs[(m<<1)>>5])>>((m<<1)&0x1f))&1)<<1) ^ (((gold_pbch_dmrs[((m<<1)+1)>>5])>>(((m<<1)+1)&0x1f))&1);
mod_dmrs[m<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
mod_dmrs[(m<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_PBCH_DMRS
printf("m %d mod_dmrs %d %d\n", m, mod_dmrs[2*m], mod_dmrs[2*m+1]);
printf("m %d idx %d gold seq %d b0-b1 %d-%d mod_dmrs %d %d\n", m, idx, gold_pbch_dmrs[(m<<1)>>5], (((gold_pbch_dmrs[(m<<1)>>5])>>((m<<1)&0x1f))&1),
(((gold_pbch_dmrs[((m<<1)+1)>>5])>>(((m<<1)+1)&0x1f))&1), mod_dmrs[(m<<1)], mod_dmrs[(m<<1)+1]);
#endif
}
@@ -128,81 +131,185 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
return 0;
}
void nr_pbch_scrambling(uint32_t Nid,
void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
uint32_t Nid,
uint8_t nushift,
uint8_t *pbch_a,
uint32_t length)
uint16_t M,
uint16_t length,
uint8_t bitwise)
{
uint8_t reset;
uint8_t reset, offset;
uint32_t x1, x2, s=0;
uint8_t *pbch_e = pbch->pbch_e;
uint32_t *pbch_a_prime = (uint32_t*)pbch->pbch_a_prime;
uint32_t *pbch_a_interleaved = (uint32_t*)pbch->pbch_a_interleaved;
uint32_t unscrambling_mask = 0x100006D;
reset = 1;
// x1 is set in lte_gold_generic
x2 = Nid;
// The Gold sequence is shifted by nushift* M, so we skip (nushift*M /32) double words
for (int i=0; i<(uint16_t)ceil((nushift*M)/32); i++) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
// Scrambling is now done with offset (nushift*M)%32
offset = (nushift*M)&0x1f;
#ifdef DEBUG_PBCH_ENCODING
printf("Scrambling params: nushift %d M %d length %d bitwise %d offset %d\n", nushift, M, length, bitwise, offset);
#endif
for (int i=0; i<length; i++) {
if ((i&0x1f)==0) {
if (((i+offset)&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
pbch_a[i] = (pbch_a[i]&1) ^ ((s>>(i&0x1f))&1);
#ifdef DEBUG_PBCH_ENCODING
printf("s: %04x\t", s);
#endif
if (bitwise) {
(*pbch_a_prime) ^= ((unscrambling_mask>>i)&1)? (((*pbch_a_interleaved)>>i)&1)<<i : ((((*pbch_a_interleaved)>>i)&1) ^ ((s>>((i+offset)&0x1f))&1))<<i;
}
else
pbch_e[i] = (pbch_e[i]&1) ^ ((s>>((i+offset)&0x1f))&1);
}
}
// This portion of code is temporarily kept until the optimized version is validated
uint8_t nr_pbch_payload_interleaving_pattern[32] = {16, 23, 18, 17, 8, 30, 10, 6, 24, 7, 0, 5, 3, 2, 1, 4,
9, 11, 12, 13, 14, 15, 19, 20, 21, 22, 25, 26, 27, 28, 29, 31};
uint8_t nr_pbch_payload_interleaver(uint8_t i) {
uint8_t j_sfn=6, j_hrf=10, j_ssb=11, j_other=14;
if (24<=i && i<=27) //Sfn bits
return nr_pbch_payload_interleaving_pattern[j_sfn + i -24];
else if (i==28) // Hrf bit
return nr_pbch_payload_interleaving_pattern[j_hrf];
else if (29<=i) // Ssb bits
return nr_pbch_payload_interleaving_pattern[j_ssb + (i-29)];
else
return nr_pbch_payload_interleaving_pattern[(j_other + i)&0x1f];
}
/*This pattern takes into account the adjustments for the field specific counters j_sfn, j_hrf, j_ssb and j_other*/
//uint8_t nr_pbch_payload_interleaving_pattern[32] = {1,4,9,11,12,13,14,15,19,20,21,22,25,26,27,28,
// 29,31,16,23,18,17,8,30,10,6,24,7,0,5,3,2};
int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint8_t *pbch_pdu,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t nushift,
uint8_t n_hf,
uint8_t Lmax,
uint8_t ssb_index,
int sfn,
int frame_mod8,
nfapi_config_request_t* config,
nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
int k,l,m;
int16_t a;
int16_t mod_pbch_e[NR_POLAR_PBCH_E<<1];
uint8_t sfn_4lsb, idx=0;
int16_t mod_pbch_e[NR_POLAR_PBCH_E];
uint8_t idx=0;
uint16_t M;
uint8_t nushift;
uint8_t *xbyte = pbch->pbch_a;
memset((void*) xbyte, 0, 1);
uint8_t pbch_a_b[32];
LOG_I(PHY, "PBCH generation started\n");
///Payload generation
// Fix byte endian
if (!frame_mod8)
for (int i=0; i<NR_PBCH_PDU_BITS; i++)
pbch->pbch_a[NR_PBCH_PDU_BITS-i-1] = pbch_pdu[i];
// Extra bits generation
sfn_4lsb = sfn&3;
for (int i=0; i<4; i++)
pbch->pbch_a[NR_PBCH_PDU_BITS+i] = (sfn_4lsb>>i)&1; // 4 lsb of sfn
pbch->pbch_a[NR_PBCH_PDU_BITS+4] = n_hf; // half frame index bit
pbch->pbch_a[NR_PBCH_PDU_BITS+5] = (config->sch_config.ssb_subcarrier_offset.value>>5)&1; //MSB of k0 -- Note the case Lssb=64 is not supported (FR2)
if (!(sfn&7))
for (int i=0; i<(NR_PBCH_PDU_BITS>>3); i++)
pbch->pbch_a[(NR_POLAR_PBCH_PAYLOAD_BITS>>3)-i-1] = pbch_pdu[i];
#ifdef DEBUG_PBCH_ENCODING
printf("Byte endian fix:\n");
for (int i=0; i<4; i++)
printf("pbch_a[%d]: 0x%02x\n", i, pbch->pbch_a[i]);
#endif
// Extra byte generation
for (int i=0; i<4; i++)
(*xbyte) ^= ((sfn>>i)&1)<<i; // 4 lsb of sfn
(*xbyte) ^= n_hf<<4; // half frame index bit
if (Lmax == 64)
for (int i=0; i<3; i++)
(*xbyte) ^= ((ssb_index>>(3+i))&1)<<(5+i); // resp. 4th, 5th and 6th bits of ssb_index
else
(*xbyte) ^= ((config->sch_config.ssb_subcarrier_offset.value>>5)&1)<<5; //MSB of k_SSB
#ifdef DEBUG_PBCH_ENCODING
printf("Extra byte:\n");
for (int i=0; i<4; i++)
printf("pbch_a[%d]: 0x%02x\n", i, pbch->pbch_a[i]);
#endif
// Payload interleaving
uint32_t in=0, out=0;
for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS>>3; i++)
in |= (uint32_t)(pbch->pbch_a[i]<<((3-i)<<3));
for (int i=0; i<32; i++) {
out |= ((in>>i)&1)<<(nr_pbch_payload_interleaver(i));//nr_pbch_payload_interleaving_pattern[i]
#ifdef DEBUG_PBCH_ENCODING
printf("i %d in 0x%08x out 0x%08x ilv %d (in>>i)&1) %d\n", i, in, out, nr_pbch_payload_interleaver(i), (in>>i)&1);
#endif
}
for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS>>3; i++)
pbch->pbch_a_interleaved[i] = (uint8_t)((out>>(i<<3))&0xff);
#ifdef DEBUG_PBCH_ENCODING
printf("Interleaving:\n");
for (int i=0; i<4; i++)
printf("pbch_a_interleaved[%d]: 0x%02x\n", i, pbch->pbch_a_interleaved[i]);
#endif
// Scrambling
nr_pbch_scrambling((uint32_t)config->sch_config.physical_cell_id.value, nushift, pbch->pbch_a, NR_POLAR_PBCH_PAYLOAD_BITS);
M = (Lmax == 64)? (NR_POLAR_PBCH_PAYLOAD_BITS - 6) : (NR_POLAR_PBCH_PAYLOAD_BITS - 3);
nushift = (((sfn>>2)&1)<<1) ^ ((sfn>>1)&1);
nr_pbch_scrambling(pbch, (uint32_t)config->sch_config.physical_cell_id.value, nushift, M, NR_POLAR_PBCH_PAYLOAD_BITS, 1);
#ifdef DEBUG_PBCH_ENCODING
printf("Payload scrambling:\n");
for (int i=0; i<4; i++)
printf("pbch_a_prime[%d]: 0x%02x\n", i, pbch->pbch_a_prime[i]);
#endif
for (int m=0;m<32;m++){
pbch_a_b[m] = ((pbch->pbch_a_prime[m/8]>>(m&7))&01);
//printf("pbch_a_b[%d] %d\n", m, pbch_a_b[m] );
}
/// CRC, coding and rate matching
polar_encoder (pbch->pbch_a, pbch->pbch_e, &frame_parms->pbch_polar_params);
polar_encoder (pbch->pbch_a_prime, pbch->pbch_e, &frame_parms->pbch_polar_params);
#ifdef DEBUG_PBCH_ENCODING
printf("Channel coding:\n");
for (int i=0; i<NR_POLAR_PBCH_E>>3; i++)
printf("pbch_e[%d]: 0x%02x\t", i, pbch->pbch_e[i]);
printf("\n");
#endif
/// Scrambling
M = NR_POLAR_PBCH_E;
nushift = (Lmax==4)? ssb_index&3 : ssb_index&7;
nr_pbch_scrambling(pbch, (uint32_t)config->sch_config.physical_cell_id.value, nushift, M, NR_POLAR_PBCH_E, 0);
#ifdef DEBUG_PBCH_ENCODING
printf("Scrambling:\n");
for (int i=0; i<NR_POLAR_PBCH_E>>3; i++)
printf("pbch_e[%d]: 0x%02x\t", i, pbch->pbch_e[i]);
printf("\n");
#endif
/// QPSK modulation
for (int i=0; i<NR_POLAR_PBCH_E>>1; i++){
idx = (pbch->pbch_e[i<<1]&1) ^ ((pbch->pbch_e[(i<<1)+1]&1)<<1);
idx = ((pbch->pbch_e[i<<1]&1)<<1) ^ (pbch->pbch_e[(i<<1)+1]&1);
mod_pbch_e[i<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
mod_pbch_e[(i<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1)+1];
@@ -212,6 +319,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
}
/// Resource mapping
nushift = config->sch_config.physical_cell_id.value &3;
a = (config->rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
for (int aa = 0; aa < config->rf_config.tx_antenna_ports.value; aa++)
openair1/PHY/NR_TRANSPORT/nr_pss.c
+1 -1
View File
@@ -28,7 +28,7 @@ int nr_generate_pss( int16_t *d_pss,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_config_request_t* config,
nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
int i,k,l,m;
openair1/PHY/NR_TRANSPORT/nr_sss.c
+1 -1
View File
@@ -27,7 +27,7 @@ int nr_generate_sss( int16_t *d_sss,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_config_request_t* config,
nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
int i,k,l;
openair1/PHY/NR_TRANSPORT/nr_transport.h
+19 -10
View File
@@ -36,7 +36,7 @@ int nr_generate_pss( int16_t *d_pss,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_config_request_t* config,
nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
@@ -49,7 +49,7 @@ int nr_generate_sss( int16_t *d_sss,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_config_request_t* config,
nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
@@ -62,8 +62,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t nushift,
nfapi_config_request_t* config,
nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
@@ -71,10 +70,12 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
\brief PBCH scrambling function
@param
*/
void nr_pbch_scrambling(uint32_t Nid,
void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
uint32_t Nid,
uint8_t nushift,
uint8_t *pbch_a,
uint32_t length);
uint16_t M,
uint16_t length,
uint8_t bitwise);
/*!
\fn int nr_generate_pbch
@@ -87,11 +88,19 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t nushift,
uint8_t n_hf,
uint8_t Lmax,
uint8_t ssb_index,
int sfn,
int frame_mod8,
nfapi_config_request_t* config,
nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
\fn int nr_generate_pbch
\brief PBCH interleaving function
@param bit index i of the input payload
@returns the bit index of the output
*/
uint8_t nr_pbch_payload_interleaver(uint8_t i);
#endif /*__NR_TRANSPORT__H__*/
openair2/NR_UE_PHY_INTERFACE/vars.h → openair1/PHY/NR_TRANSPORT/nr_transport_common_proto.h
+19 -17
View File
@@ -19,26 +19,28 @@
* contact@openairinterface.org
*/
#ifndef __PHY_INTERFACE_VARS_H__
#define __PHY_INTERFACE_VARS_H__
/*! \file PHY/NR_TRANSPORT/nr_mcs.c
* \brief Some support routines for NR MCS computations
* \author
* \date 2018
* \version 0.1
* \company Eurecom
* \email:
* \note
* \warning
*/
//#include "SIMULATION/PHY_EMULATION/spec_defs.h"
#include "defs.h"
#ifndef __NR_TRANSPORT_COMMON_PROTO__H__
#define __NR_TRANSPORT_COMMON_PROTO__H__
#ifdef PHY_EMUL
#include "SIMULATION/PHY_EMULATION/DEVICE_DRIVER/defs.h"
#include "SIMULATION/simulation_defs.h"
#endif
// Functions below implement minor procedures from 38-214
/** \brief Computes Q based on I_MCS PDSCH and when 'MCS-Table-PDSCH' is set to "256QAM". Implements Table 5.1.3.1-2 from 38.214.
@param I_MCS */
uint8_t get_nr_Qm(uint8_t I_MCS);
unsigned int mac_debug;
//MAC_xface *mac_xface;
//MACPHY_PARAMS MACPHY_params;
unsigned int mac_registered;
/** \brief Computes Q based on I_MCS PUSCH. Implements Table 6.1.4.1-1 from 38.214.
@param I_MCS */
uint8_t get_nr_Qm_ul(uint8_t I_MCS);
#endif
openair1/PHY/NR_UE_ESTIMATION/filt16a_32.h
+25
View File
@@ -84,3 +84,28 @@ short filt16a_2l1[16] = {
short filt16a_2r1[16] = {
-4096,0,4096,8192,12288,16384,0,0,0,0,0,0,0,0,0,0};
/*filter8*/
short filt8_l0[8] = {
16384,8192,0,0,0,0,0,0};
short filt8_mr0[8] = {
0,8192,16384,8192,0,-8192,0,0};
short filt8_r0[8] = {
0,8192,16384,24576,0,0,0,0};
short filt8_m0[8] = {
0,8192,16384,8192,0,0,0,0};
short filt8_l1[8] = {
24576,16384,0,0,0,0,0,0};
short filt8_ml1[8] = {
-8192,0,8192,16384,8192,0,0,0};
short filt8_r1[8] = {
0,0,8192,16384,0,0,0,0};
short filt8_m1[8] = {
0,0,8192,16384,8192,0,0,0};
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
+384 -58
View File
@@ -27,7 +27,7 @@
#include "PHY/defs_nr_UE.h"
#include "filt16a_32.h"
#include "T.h"
#define DEBUG_CH
//#define DEBUG_CH
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
@@ -41,20 +41,18 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned char aarx;
unsigned short k;
unsigned int pilot_cnt;
int16_t ch[2],*pil,*rxF,*dl_ch,*fl,*fm,*f2l,*fr,f1,*f2r,*fl_dc,*fm_dc,*fr_dc;
int16_t ch[2],*pil,*rxF,*dl_ch,*fl,*fm,*fr;
int ch_offset,symbol_offset;
uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
uint8_t previous_thread_id = ue->current_thread_id[Ns>>1]==0 ? (RX_NB_TH-1):(ue->current_thread_id[Ns>>1]-1);
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset];
uint8_t nushift, ssb_index=0, n_hf=0;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset];
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF;
// recompute nushift with eNB_offset corresponding to adjacent eNB on which to perform channel estimation
nushift = Nid_cell%4;
nushift = ue->frame_parms.Nid_cell%4;
ue->frame_parms.nushift = nushift;
if (ue->high_speed_flag == 0) // use second channel estimate position for temporary storage
ch_offset = ue->frame_parms.ofdm_symbol_size ;
else
@@ -74,48 +72,24 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
fl = filt16a_l0;
fm = filt16a_m0;
fr = filt16a_r0;
fl_dc = filt16a_l0;
fm_dc = filt16a_m0;
fr_dc = filt16a_r0;
f1 = filt16a_1;
f2l = filt16a_2l0;
f2r = filt16a_2r0;
break;
case 1:
fl = filt16a_l1;
fm = filt16a_m1;
fr = filt16a_r1;
fl_dc = filt16a_l1;
fm_dc = filt16a_m1;
fr_dc = filt16a_r1;
f1 = filt16a_1;
f2l = filt16a_2l1;
f2r = filt16a_2r1;
break;
case 2:
fl = filt16a_l2;
fm = filt16a_m2;
fr = filt16a_r2;
fl_dc = filt16a_l2;
fm_dc = filt16a_m2;
fr_dc = filt16a_r2;
f1 = filt16a_1;
f2l = filt16a_2l0;
f2r = filt16a_2r0;
break;
case 3:
fl = filt16a_l3;
fm = filt16a_m3;
fr = filt16a_r3;
fl_dc = filt16a_l3;
fm_dc = filt16a_m3;
fr_dc = filt16a_r3;
f1 = filt16a_1;
f2l = filt16a_2l1;
f2r = filt16a_2r1;
break;
default:
@@ -124,11 +98,8 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
break;
}
// generate pilot
nr_pbch_dmrs_rx(ue->nr_gold_pbch,
&pilot[p][0]);
nr_pbch_dmrs_rx(ue->nr_gold_pbch[n_hf][ssb_index], &pilot[p][0]);
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
@@ -136,6 +107,173 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+(ue->frame_parms.ofdm_symbol_size-10*12))];
dl_ch = (int16_t *)&dl_ch_estimates[(p<<1)+aarx][ch_offset];
memset(dl_ch,0,4*(ue->frame_parms.ofdm_symbol_size));
if (ue->high_speed_flag==0) // multiply previous channel estimate by ch_est_alpha
multadd_complex_vector_real_scalar(dl_ch-(ue->frame_parms.ofdm_symbol_size<<1),
ue->ch_est_alpha,dl_ch-(ue->frame_parms.ofdm_symbol_size<<1),
1,ue->frame_parms.ofdm_symbol_size);
//#ifdef DEBUG_CH
printf("ch est pilot addr %p RB_DL %d\n",&pilot[p][0], ue->frame_parms.N_RB_DL);
printf("k %d, first_carrier %d\n",k,ue->frame_parms.first_carrier_offset);
printf("rxF addr %p\n", rxF);
printf("dl_ch addr %p\n",dl_ch);
//#endif
//if ((ue->frame_parms.N_RB_DL&1)==0) {
// Treat first 2 pilots specially (left edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
//#ifdef DEBUG_CH
printf("ch 0 %d\n",((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1]));
printf("pilot 0 : rxF - > (%d,%d) addr %p ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],&rxF[0],ch[0],ch[1],pil[0],pil[1]);
//#endif
multadd_real_vector_complex_scalar(fl,
ch,
dl_ch,
16);
pil+=2;
rxF+=8;
//for (int i= 0; i<8; i++)
//printf("dl_ch addr %p %d\n", dl_ch+i, *(dl_ch+i));
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("pilot 1 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fm,
ch,
dl_ch,
16);
pil+=2;
rxF+=8;
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("pilot 2 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fr,
ch,
dl_ch,
16);
pil+=2;
rxF+=8;
dl_ch+=24;
for (pilot_cnt=3; pilot_cnt<(3*20); pilot_cnt+=3) {
if (pilot_cnt == 30)
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fl,
ch,
dl_ch,
16);
//for (int i= 0; i<8; i++)
// printf("pilot_cnt %d dl_ch %d %d\n", pilot_cnt, dl_ch+i, *(dl_ch+i));
pil+=2;
rxF+=8;
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fm,
ch,
dl_ch,
16);
pil+=2;
rxF+=8;
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("pilot 1 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fr,
ch,
dl_ch,
16);
pil+=2;
rxF+=8;
dl_ch+=24;
}
//}
}
return(0);
}
int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char p,
unsigned char l,
unsigned char symbol,
unsigned short coreset_start_subcarrier,
unsigned short nb_rb_coreset)
{
int pilot[2][200] __attribute__((aligned(16)));
unsigned char aarx;
unsigned short k;
unsigned int pilot_cnt;
int16_t ch[2],*pil,*rxF,*dl_ch,*fl,*fm,*fr;
int ch_offset,symbol_offset;
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset];
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF;
nushift = 1;
ue->frame_parms.nushift = nushift;
if (ue->high_speed_flag == 0) // use second channel estimate position for temporary storage
ch_offset = ue->frame_parms.ofdm_symbol_size ;
else
ch_offset = ue->frame_parms.ofdm_symbol_size*symbol;
symbol_offset = ue->frame_parms.ofdm_symbol_size*symbol;
k = coreset_start_subcarrier;
#ifdef DEBUG_CH
printf("PBCH Channel Estimation : ThreadId %d, eNB_offset %d cell_id %d ch_offset %d, OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns>>1], eNB_offset,Nid_cell,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,l,Ns,k, symbol);
#endif
fl = filt16a_l1;
fm = filt16a_m1;
fr = filt16a_r1;
// generate pilot
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[p][0],2000,nb_rb_coreset);
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
pil = (int16_t *)&pilot[p][0];
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];
dl_ch = (int16_t *)&dl_ch_estimates[(p<<1)+aarx][ch_offset];
memset(dl_ch,0,4*(ue->frame_parms.ofdm_symbol_size));
if (ue->high_speed_flag==0) // multiply previous channel estimate by ch_est_alpha
multadd_complex_vector_real_scalar(dl_ch-(ue->frame_parms.ofdm_symbol_size<<1),
@@ -154,7 +292,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("ch 0 %d\n",((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1]));
printf("pilot 0 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("pilot 0 : rxF - > (%d,%d) addr %p ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],&rxF[0],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fl,
ch,
@@ -162,8 +300,8 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
16);
pil+=2;
rxF+=8;
for (int i= 0; i<8; i++)
printf("dl_ch addr %p %d\n", dl_ch+i, *(dl_ch+i));
//for (int i= 0; i<8; i++)
//printf("dl_ch addr %p %d\n", dl_ch+i, *(dl_ch+i));
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
@@ -174,19 +312,15 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
ch,
dl_ch,
16);
//printf("after dl_ch %d %d\n", dl_ch, *(dl_ch));
//for (int i= 0; i<16; i++)
// printf("dl_ch %d %d\n", dl_ch+i, *(dl_ch+i));
pil+=2;
rxF+=8;
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("pilot 2 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
#ifdef DEBUG_CH
printf("pilot 2 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fr,
ch,
@@ -195,16 +329,18 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
pil+=2;
rxF+=8;
dl_ch+=24;
k+=12;
for (pilot_cnt=3; pilot_cnt<(3*20); pilot_cnt+=3) {
for (pilot_cnt=3; pilot_cnt<(3*nb_rb_coreset); pilot_cnt+=3) {
if (pilot_cnt == 30)
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k)];
if (k >= ue->frame_parms.ofdm_symbol_size){
k-=ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];}
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
//printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fl,
ch,
@@ -216,11 +352,11 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
pil+=2;
rxF+=8;
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
//printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fm,
ch,
@@ -232,9 +368,9 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
// printf("pilot 1 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
#ifdef DEBUG_CH
printf("pilot 1 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fr,
ch,
@@ -243,13 +379,203 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
pil+=2;
rxF+=8;
dl_ch+=24;
k+=12;
}
}
printf("finish dl_ch addr %p\n", dl_ch);
}
return(0);
}
int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char p,
unsigned char l,
unsigned char symbol,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pdsch)
{
int pilot[2][200] __attribute__((aligned(16)));
unsigned char aarx;
unsigned short k;
unsigned int pilot_cnt;
int16_t ch[2],*pil,*rxF,*dl_ch,*fl,*fm,*fr,*fml,*fmr;
int ch_offset,symbol_offset;
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset];
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF;
nushift = (p>>1)&1;
ue->frame_parms.nushift = nushift;
if (ue->high_speed_flag == 0) // use second channel estimate position for temporary storage
ch_offset = ue->frame_parms.ofdm_symbol_size ;
else
ch_offset = ue->frame_parms.ofdm_symbol_size*symbol;
symbol_offset = ue->frame_parms.ofdm_symbol_size*symbol;
k = bwp_start_subcarrier;
#ifdef DEBUG_CH
printf("PBCH Channel Estimation : ThreadId %d, eNB_offset %d cell_id %d ch_offset %d, OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns>>1], eNB_offset,Nid_cell,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,l,Ns,k, symbol);
#endif
switch (nushift) {
case 0:
fl = filt8_l0;
fm = filt8_m0;
fr = filt8_r0;
fml = filt8_m0;
fmr = filt8_mr0;
break;
case 1:
fl = filt8_l1;
fm = filt8_m1;
fr = filt8_r1;
fml = filt8_ml1;
fmr = filt8_m1;
break;
default:
msg("pdsch_channel_estimation: nushift=%d -> ERROR\n",nushift);
return(-1);
break;
}
// generate pilot
nr_pdsch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdsch[eNB_offset][Ns][symbol], &pilot[p][0],1000,1,nb_rb_pdsch);
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
pil = (int16_t *)&pilot[p][0];
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];
dl_ch = (int16_t *)&dl_ch_estimates[(p<<1)+aarx][ch_offset];
memset(dl_ch,0,4*(ue->frame_parms.ofdm_symbol_size));
if (ue->high_speed_flag==0) // multiply previous channel estimate by ch_est_alpha
multadd_complex_vector_real_scalar(dl_ch-(ue->frame_parms.ofdm_symbol_size<<1),
ue->ch_est_alpha,dl_ch-(ue->frame_parms.ofdm_symbol_size<<1),
1,ue->frame_parms.ofdm_symbol_size);
#ifdef DEBUG_CH
printf("ch est pilot addr %p RB_DL %d\n",&pilot[p][0], ue->frame_parms.N_RB_DL);
printf("k %d, first_carrier %d\n",k,ue->frame_parms.first_carrier_offset);
printf("rxF addr %p\n", rxF);
printf("dl_ch addr %p\n",dl_ch);
#endif
if ((ue->frame_parms.N_RB_DL&1)==0) {
// Treat first 2 pilots specially (left edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("ch 0 %d\n",((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1]));
printf("pilot 0 : rxF - > (%d,%d) addr %p ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],&rxF[0],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fl,
ch,
dl_ch,
8);
pil+=2;
rxF+=4;
//for (int i= 0; i<8; i++)
//printf("dl_ch addr %p %d\n", dl_ch+i, *(dl_ch+i));
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("pilot 1 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fml,
ch,
dl_ch,
8);
pil+=2;
rxF+=4;
dl_ch+=4;
k+=4;
for (pilot_cnt=2; pilot_cnt<(6*(nb_rb_pdsch-1)+4); pilot_cnt+=2) {
if ((pilot_cnt%6)==0)
dl_ch+=4;
if (k >= ue->frame_parms.ofdm_symbol_size){
k-=ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];}
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fm,
ch,
dl_ch,
8);
pil+=2;
rxF+=4;
dl_ch+=4;
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fm,
ch,
dl_ch,
8);
pil+=2;
rxF+=4;
dl_ch+=4;
k+=4;
}
// Treat first 2 pilots specially (right edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("ch 0 %d\n",((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1]));
printf("pilot 0 : rxF - > (%d,%d) addr %p ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],&rxF[0],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fmr,
ch,
dl_ch,
8);
pil+=2;
rxF+=4;
//for (int i= 0; i<8; i++)
//printf("dl_ch addr %p %d\n", dl_ch+i, *(dl_ch+i));
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_CH
printf("pilot 1 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fr,
ch,
dl_ch,
8);
pil+=2;
rxF+=4;
dl_ch+=4;
k+=4;
}
}
openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h
+17 -5
View File
@@ -19,12 +19,12 @@
* contact@openairinterface.org
*/
#ifndef __LTE_ESTIMATION_DEFS__H__
#define __LTE_ESTIMATION_DEFS__H__
#ifndef __NR_ESTIMATION_DEFS__H__
#define __NR_ESTIMATION_DEFS__H__
#include "PHY/defs_nr_UE.h"
#include "PHY/defs_gNB.h"
//#include "PHY/defs_gNB.h"
/** @addtogroup _PHY_PARAMETER_ESTIMATION_BLOCKS_
* @{
*/
@@ -42,13 +42,15 @@
\param l symbol within slot
\param symbol symbol within frame
*/
int nr_dl_channel_estimation(PHY_VARS_NR_UE *ue,
int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char p,
unsigned char l,
unsigned char symbol);
unsigned char symbol,
unsigned short coreset_start_subcarrier,
unsigned short nb_rb_coreset);
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
@@ -57,4 +59,14 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned char p,
unsigned char l,
unsigned char symbol);
int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char p,
unsigned char l,
unsigned char symbol,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pdsch);
#endif
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
+616 -442
View File
File diff suppressed because it is too large Load Diff
openair1/PHY/NR_UE_TRANSPORT/dci_nr.h
+67 -57
View File
@@ -42,70 +42,80 @@
#define NR_PDCCH_DCI_H
#ifdef NR_PDCCH_DCI_H
struct NR_DCI_INFO_EXTRACTED {
uint8_t carrier_ind ; // 0 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 1 SUL_IND_0_1:
uint8_t identifier_dci_formats ; // 2 IDENTIFIER_DCI_FORMATS:
uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t tpc_cmd_number ; // 5 TPC_CMD_NUMBER: The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
uint8_t block_number ; // 6 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint16_t freq_dom_resource_assignment_UL; // 8 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
uint16_t freq_dom_resource_assignment_DL; // 9 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 10 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
uint8_t vrb_to_prb_mapping ; // 11 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 12 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 13 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 14 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 15 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 16 TB1_MCS:
uint8_t tb1_ndi ; // 17 TB1_NDI:
uint8_t tb1_rv ; // 18 TB1_RV:
uint8_t tb2_mcs ; // 19 TB2_MCS:
uint8_t tb2_ndi ; // 20 TB2_NDI:
uint8_t tb2_rv ; // 21 TB2_RV:
uint8_t mcs ; // 22 MCS:
uint8_t ndi ; // 23 NDI:
uint8_t rv ; // 24 RV:
uint8_t harq_process_number ; // 25 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 26 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
uint8_t first_dai ; // 27 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 28 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tpc_pusch ; // 29 TPC_PUSCH:
uint8_t tpc_pucch ; // 30 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 31 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 32 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t short_message_ind ; // 33 SHORT_MESSAGE_IND: 1 bit if crc scrambled with P-RNTI
uint8_t srs_resource_ind ; // 34 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 35 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 36 ANTENNA_PORTS:
uint8_t tci ; // 37 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 38 SRS_REQUEST:
uint8_t tpc_cmd_number_format2_3 ; // 39 TPC_CMD_NUMBER_FORMAT2_3:
uint8_t csi_request ; // 40 CSI_REQUEST:
uint8_t cbgti ; // 41 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 42 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 43 PTRS_DMRS:
uint8_t beta_offset_ind ; // 44 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 45 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
uint8_t sul_ind_0_0 ; // 46 SUL_IND_0_0:
uint16_t padding ; // 47 PADDING: (Note 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
uint8_t short_messages ; // 9 SHORT_MESSAGES:
uint16_t freq_dom_resource_assignment_UL; // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
uint16_t freq_dom_resource_assignment_DL; // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
uint8_t vrb_to_prb_mapping ; // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 16 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 18 TB1_MCS:
uint8_t tb1_ndi ; // 19 TB1_NDI:
uint8_t tb1_rv ; // 20 TB1_RV:
uint8_t tb2_mcs ; // 21 TB2_MCS:
uint8_t tb2_ndi ; // 22 TB2_NDI:
uint8_t tb2_rv ; // 23 TB2_RV:
uint8_t mcs ; // 24 MCS:
uint8_t ndi ; // 25 NDI:
uint8_t rv ; // 26 RV:
uint8_t harq_process_number ; // 27 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
uint8_t first_dai ; // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tb_scaling ; // 31 TB_SCALING:
uint8_t tpc_pusch ; // 32 TPC_PUSCH:
uint8_t tpc_pucch ; // 33 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 34 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t srs_resource_ind ; // 36 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 37 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 40 SRS_REQUEST:
uint8_t tpc_cmd_number_format2_3 ; // 41 TPC_CMD_NUMBER_FORMAT2_3:
uint8_t csi_request ; // 42 CSI_REQUEST:
uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 45 PTRS_DMRS:
uint8_t beta_offset_ind ; // 46 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
uint8_t ul_sch_ind ; // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
uint16_t padding_nr_dci ; // 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
uint8_t sul_ind_0_0 ; // 50 SUL_IND_0_0:
uint8_t ra_preamble_index ; // 51 RA_PREAMBLE_INDEX:
uint8_t sul_ind_1_0 ; // 52 SUL_IND_1_0:
uint8_t ss_pbch_index ; // 53 SS_PBCH_INDEX
uint8_t prach_mask_index ; // 54 PRACH_MASK_INDEX
uint8_t reserved_nr_dci ; // 55 RESERVED_NR_DCI
};
typedef struct NR_DCI_INFO_EXTRACTED NR_DCI_INFO_EXTRACTED_t;
#endif
openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
+434 -219
View File
File diff suppressed because it is too large Load Diff
openair1/PHY/NR_UE_TRANSPORT/dmrs_nr.c
-1
View File
@@ -30,7 +30,6 @@
*
************************************************************************/
//#include "PHY/LTE_REFSIG/defs.h"
#include "PHY/NR_REFSIG/ss_pbch_nr.h"
#include "PHY/NR_REFSIG/dmrs_nr.h"
openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
+68 -87
View File
@@ -45,19 +45,21 @@
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
extern openair0_config_t openair0_cfg[];
static nfapi_config_request_t config_t;
static nfapi_config_request_t* config =&config_t;
static nfapi_nr_config_request_t config_t;
static nfapi_nr_config_request_t* config =&config_t;
int cnt=0;
/* forward declarations */
void set_default_frame_parms_single(nfapi_config_request_t *config, NR_DL_FRAME_PARMS *frame_parms);
void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRAME_PARMS *frame_parms);
//#define DEBUG_INITIAL_SYNCH
int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
int nr_pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
{
printf("nr pbch detec RB_DL %d\n", ue->frame_parms.N_RB_DL);
uint8_t l,pbch_decoded,frame_mod4,pbch_tx_ant,dummy;
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
char phich_resource[6];
int ret =-1;
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"[UE%d] Initial sync: starting PBCH detection (rx_offset %d)\n",ue->Mod_id,
@@ -68,35 +70,40 @@ int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
frame_parms->nb_prefix_samples0 = 0;
//symbol 1
slot_fep_pbch(ue,
1,
nr_slot_fep(ue,
5,
0,
ue->rx_offset,
0,
1);
1,
NR_PBCH_EST);
//symbol 2
slot_fep_pbch(ue,
2,
nr_slot_fep(ue,
6,
0,
ue->rx_offset,
0,
1);
1,
NR_PBCH_EST);
//symbol 3
slot_fep_pbch(ue,
3,
nr_slot_fep(ue,
7,
0,
ue->rx_offset,
0,
1);
1,
NR_PBCH_EST);
frame_parms->nb_prefix_samples0 = nb_prefix_samples0;
pbch_decoded = 0;
printf("pbch_detection nid_cell %d\n",frame_parms->Nid_cell);
//for (frame_mod4=0; frame_mod4<4; frame_mod4++) {
pbch_tx_ant = nr_rx_pbch(ue,
ret = nr_rx_pbch(ue,
&ue->proc.proc_rxtx[0],
ue->pbch_vars[0],
frame_parms,
@@ -105,17 +112,14 @@ int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
ue->high_speed_flag,
frame_mod4);
if ((pbch_tx_ant>0) && (pbch_tx_ant<=2)) {
pbch_decoded = 1;
pbch_decoded = 0; //to be updated
// break;
}
//}
if (pbch_decoded) {
if (ret==0) {
frame_parms->nb_antenna_ports_eNB = pbch_tx_ant;
frame_parms->nb_antenna_ports_eNB = 1; //pbch_tx_ant;
// set initial transmission mode to 1 or 2 depending on number of detected TX antennas
//frame_parms->mode1_flag = (pbch_tx_ant==1);
@@ -127,63 +131,17 @@ int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
// ue->pbch_vars[0]->decoded_output[0] = ue->pbch_vars[0]->decoded_output[2];
// ue->pbch_vars[0]->decoded_output[2] = dummy;
// now check for Bandwidth of Cell
dummy = (ue->pbch_vars[0]->decoded_output[2]>>5)&7;
switch (dummy) {
case 0 :
frame_parms->N_RB_DL = 6;
break;
case 1 :
frame_parms->N_RB_DL = 15;
break;
case 2 :
frame_parms->N_RB_DL = 25;
break;
case 3 :
frame_parms->N_RB_DL = 50;
break;
case 4 :
frame_parms->N_RB_DL = 75;
break;
case 5:
frame_parms->N_RB_DL = 100;
break;
default:
LOG_E(PHY,"[UE%d] Initial sync: PBCH decoding: Unknown N_RB_DL\n",ue->Mod_id);
return -1;
break;
}
for(int i=0; i<RX_NB_TH;i++)
{
ue->proc.proc_rxtx[i].frame_rx = (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2;
ue->proc.proc_rxtx[i].frame_rx = (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2;
#ifndef USER_MODE
// one frame delay
ue->proc.proc_rxtx[i].frame_rx ++;
#endif
ue->proc.proc_rxtx[i].frame_tx = ue->proc.proc_rxtx[0].frame_rx;
}
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"[UE%d] Initial sync: pbch decoded sucessfully mode1_flag %d, tx_ant %d, frame %d, N_RB_DL %d, phich_duration %d, phich_resource %s!\n",
LOG_I(PHY,"[UE%d] Initial sync: pbch decoded sucessfully mode1_flag %d, tx_ant %d, frame %d\n",
ue->Mod_id,
frame_parms->mode1_flag,
pbch_tx_ant,
ue->proc.proc_rxtx[0].frame_rx,
frame_parms->N_RB_DL,
frame_parms->phich_config_common.phich_duration,
phich_resource); //frame_parms->phich_config_common.phich_resource);
ue->proc.proc_rxtx[0].frame_rx,);
#endif
return(0);
} else {
@@ -192,21 +150,20 @@ int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
}
char phich_string[13][4] = {"","1/6","","1/2","","","one","","","","","","two"};
char duplex_string[2][4] = {"FDD","TDD"};
char prefix_string[2][9] = {"NORMAL","EXTENDED"};
int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
{
int32_t sync_pos, sync_pos2, k_ssb, N_ssb_crb;
int32_t sync_pos, sync_pos2, k_ssb, N_ssb_crb, sync_pos_slot;
int32_t metric_fdd_ncp=0;
uint8_t phase_fdd_ncp;
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
int ret=-1;
int aarx,rx_power=0;
//nfapi_config_request_t* config;
//nfapi_nr_config_request_t* config;
/*offset parameters to be updated from higher layer */
k_ssb =0;
@@ -218,9 +175,10 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
// LOG_I(PHY,"**************************************************************\n");
// First try FDD normal prefix
frame_parms->Ncp=NORMAL;
frame_parms->frame_type=FDD;
frame_parms->frame_type=TDD;
set_default_frame_parms_single(config,frame_parms);
nr_init_frame_parms_ue(config,frame_parms);
nr_init_frame_parms_ue(frame_parms);
printf("nr_initial sync ue RB_DL %d\n", ue->frame_parms.N_RB_DL);
/*
write_output("rxdata0.m","rxd0",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
exit(-1);
@@ -238,12 +196,27 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
* --------------------------
* sync_pos SS/PBCH block
*/
cnt++;
if (cnt >100){
cnt =0;
/* process pss search on received buffer */
sync_pos = pss_synchro_nr(ue, NO_RATE_CHANGE);
sync_pos_slot = (frame_parms->samples_per_tti>>1) - 3*(frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples);
if (sync_pos >= frame_parms->nb_prefix_samples)
sync_pos2 = sync_pos - frame_parms->nb_prefix_samples;
else
sync_pos2 = sync_pos + FRAME_LENGTH_COMPLEX_SAMPLES - frame_parms->nb_prefix_samples;
/* offset is used by sss serach as it is returned from pss search */
ue->rx_offset = sync_pos;
if (sync_pos2 >= sync_pos_slot)
ue->rx_offset = sync_pos2 - sync_pos_slot;
else
ue->rx_offset = FRAME_LENGTH_COMPLEX_SAMPLES + sync_pos2 - sync_pos_slot;
printf("sync_pos %d sync_pos_slot %d rx_offset %d\n",sync_pos,sync_pos_slot, ue->rx_offset);
// write_output("rxdata1.m","rxd1",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
@@ -260,11 +233,19 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
rx_sss_nr(ue,&metric_fdd_ncp,&phase_fdd_ncp);
set_default_frame_parms_single(config,&ue->frame_parms);
//set_default_frame_parms_single(config,&ue->frame_parms);
nr_init_frame_parms_ue(config,&ue->frame_parms);
nr_gold_pbch(ue);
ret = pbch_detection(ue,mode);
ret = nr_pbch_detection(ue,mode);
LOG_I(PHY,"[UE %d] AUTOTEST Cell Sync : frame = %d, rx_offset %d, freq_offset %d \n",
ue->Mod_id,
ue->proc.proc_rxtx[0].frame_rx,
ue->rx_offset,
ue->common_vars.freq_offset );
//ret = -1; //to be deleted
// write_output("rxdata2.m","rxd2",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
#ifdef DEBUG_INITIAL_SYNCH
@@ -277,6 +258,10 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
LOG_I(PHY,"FDD Normal prefix: SSS error condition: sync_pos %d, sync_pos_slot %d\n", sync_pos, sync_pos_slot);
#endif
}
}
else {
ret = -1;
}
/* Consider this is a false detection if the offset is > 1000 Hz */
if( (abs(ue->common_vars.freq_offset) > 150) && (ret == 0) )
@@ -322,10 +307,6 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
}
#endif
generate_pcfich_reg_mapping(frame_parms);
generate_phich_reg_mapping(frame_parms);
ue->pbch_vars[0]->pdu_errors_conseq=0;
}
@@ -414,9 +395,9 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
rx_power = 0;
// do a measurement on the best guess of the PSS
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++)
rx_power += signal_energy(&ue->common_vars.rxdata[aarx][sync_pos2],
frame_parms->ofdm_symbol_size+frame_parms->nb_prefix_samples);
//for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++)
// rx_power += signal_energy(&ue->common_vars.rxdata[aarx][sync_pos2],
// frame_parms->ofdm_symbol_size+frame_parms->nb_prefix_samples);
/*
// do a measurement on the full frame
@@ -438,7 +419,7 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
#ifndef OAI_BLADERF
#ifndef OAI_LMSSDR
#ifndef OAI_ADRV9371_ZC706
phy_adjust_gain(ue,ue->measurements.rx_power_avg_dB[0],0);
//phy_adjust_gain(ue,ue->measurements.rx_power_avg_dB[0],0);
#endif
#endif
#endif
@@ -451,7 +432,7 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
#ifndef OAI_BLADERF
#ifndef OAI_LMSSDR
#ifndef OAI_ADRV9371_ZC706
phy_adjust_gain(ue,dB_fixed(ue->measurements.rssi),0);
//phy_adjust_gain(ue,dB_fixed(ue->measurements.rssi),0);
#endif
#endif
#endif
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
+210 -225
View File
@@ -31,20 +31,12 @@
*/
#include "PHY/defs_nr_UE.h"
#include "PHY/CODING/coding_extern.h"
#include "PHY/CODING/lte_interleaver_inline.h"
//#include "defs.h"
//#include "extern.h"
#include "PHY/phy_extern_nr_ue.h"
#include "PHY/sse_intrin.h"
#ifdef PHY_ABSTRACTION
#include "SIMULATION/TOOLS/defs.h"
#endif
#include "SIMULATION/TOOLS/sim.h"
//#define DEBUG_PBCH 1
//#define DEBUG_PBCH_ENCODING
//#define INTERFERENCE_MITIGATION 1
#ifdef OPENAIR2
//#include "PHY_INTERFACE/defs.h"
@@ -71,17 +63,17 @@ uint16_t nr_pbch_extract(int **rxdataF,
int nushiftmod4 = frame_parms->nushift;
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
printf("extract_rbs (nushift %d): rx_offset=%d, symbol %d\n",frame_parms->nushift,
(rx_offset + (symbol*(frame_parms->ofdm_symbol_size))),symbol);
rxF = &rxdataF[aarx][(rx_offset + (symbol*(frame_parms->ofdm_symbol_size)))];
rxF_ext = &rxdataF_ext[aarx][symbol*(20*12)];
#ifdef DEBUG_PBCH
printf("extract_rbs (nushift %d): rx_offset=%d, symbol %d\n",frame_parms->nushift,
(rx_offset + (symbol*(frame_parms->ofdm_symbol_size))),symbol);
int16_t *p = (int16_t *)rxF;
for (int i =0; i<240;i++){
for (int i =0; i<8;i++){
printf("rxF [%d]= %d\n",i,rxF[i]);
printf("pbch pss %d %d @%p\n", p[2*i], p[2*i+1], &p[2*i]);
printf("pbch extract rxF %d %d addr %p\n", p[2*i], p[2*i+1], &p[2*i]);
printf("rxF ext addr %p\n", &rxF_ext[i]);
}
#endif
@@ -91,7 +83,7 @@ uint16_t nr_pbch_extract(int **rxdataF,
}
j=0;
if ((symbol==1) || (symbol==3)) {
if ((symbol==5) || (symbol==7)) {
for (i=0; i<12; i++) {
if ((i!=nushiftmod4) &&
(i!=(nushiftmod4+4)) &&
@@ -105,13 +97,13 @@ uint16_t nr_pbch_extract(int **rxdataF,
rxF+=12;
rxF_ext+=9;
} else { //symbol 2
if ((rb < 4) && (rb >15)){
if ((rb < 4) || (rb >15)){
for (i=0; i<12; i++) {
if ((i!=nushiftmod4) &&
(i!=(nushiftmod4+4)) &&
(i!=(nushiftmod4+8))) {
rxF_ext[j]=rxF[i];
//printf("rxF ext[%d] = %d at %p\n",j,rxF_ext[j],&rxF[i]);
//printf("symbol2 rxF ext[%d] = %d at %p\n",j,rxF_ext[j],&rxF[i]);
j++;
}
}
@@ -128,20 +120,20 @@ uint16_t nr_pbch_extract(int **rxdataF,
else
dl_ch0 = &dl_ch_estimates[(aatx<<1)+aarx][0];
printf("dl_ch0 addr %p\n",dl_ch0);
//printf("dl_ch0 addr %p\n",dl_ch0);
dl_ch0_ext = &dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*(20*12)];
for (rb=0; rb<20; rb++) {
j=0;
if ((symbol==1) || (symbol==3)) {
if ((symbol==5) || (symbol==7)) {
for (i=0; i<12; i++) {
if ((i!=nushiftmod4) &&
(i!=(nushiftmod4+4)) &&
(i!=(nushiftmod4+8))) {
dl_ch0_ext[j]=dl_ch0[i];
if ((rb==0) && (i<2))
printf("dl ch0 ext[%d] = %d dl_ch0 [%d]= %d\n",j,dl_ch0_ext[j],i,dl_ch0[i]);
printf("dl ch0 ext[%d] = %d dl_ch0 [%d]= %d\n",j,dl_ch0_ext[j],i,dl_ch0[i]);
j++;
}
}
@@ -149,13 +141,14 @@ uint16_t nr_pbch_extract(int **rxdataF,
dl_ch0+=12;
dl_ch0_ext+=9;
}
else { //symbol 2
if ((rb < 4) && (rb >15)){
else {
if ((rb < 4) || (rb >15)){
for (i=0; i<12; i++) {
if ((i!=nushiftmod4) &&
(i!=(nushiftmod4+4)) &&
(i!=(nushiftmod4+8))) {
dl_ch0_ext[j]=dl_ch0[i];
//printf("symbol2 dl ch0 ext[%d] = %d dl_ch0 [%d]= %d\n",j,dl_ch0_ext[j],i,dl_ch0[i]);
j++;
}
}
@@ -181,7 +174,7 @@ int nr_pbch_channel_level(int **dl_ch_estimates_ext,
uint32_t symbol)
{
int16_t rb, nb_rb=6;
int16_t rb, nb_rb=20;
uint8_t aatx,aarx;
#if defined(__x86_64__) || defined(__i386__)
@@ -193,19 +186,16 @@ int nr_pbch_channel_level(int **dl_ch_estimates_ext,
#endif
int avg1=0,avg2=0;
uint32_t nsymb = (frame_parms->Ncp==0) ? 7:6;
uint32_t symbol_mod = symbol % nsymb;
for (aatx=0; aatx<4; aatx++) //frame_parms->nb_antenna_ports_eNB;aatx++)
for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB;aatx++)
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
//clear average level
#if defined(__x86_64__) || defined(__i386__)
avg128 = _mm_setzero_si128();
dl_ch128=(__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol_mod*6*12];
dl_ch128=(__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*20*12];
#elif defined(__arm__)
avg128 = vdupq_n_s32(0);
dl_ch128=(int16x8_t *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol_mod*6*12];
dl_ch128=(int16x8_t *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*20*12];
#endif
for (rb=0; rb<nb_rb; rb++) {
@@ -257,22 +247,24 @@ void nr_pbch_channel_compensation(int **rxdataF_ext,
uint8_t output_shift)
{
uint16_t rb,nb_rb=6;
uint8_t aatx,aarx,symbol_mod;
uint16_t rb,nb_rb=20;
uint8_t aatx,aarx;
#if defined(__x86_64__) || defined(__i386__)
__m128i *dl_ch128,*rxdataF128,*rxdataF_comp128;
#elif defined(__arm__)
#endif
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
for (aatx=0; aatx<4; aatx++) //frame_parms->nb_antenna_ports_eNB;aatx++)
for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB;aatx++)
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
#if defined(__x86_64__) || defined(__i386__)
dl_ch128 = (__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol_mod*6*12];
rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol_mod*6*12];
rxdataF_comp128 = (__m128i *)&rxdataF_comp[(aatx<<1)+aarx][symbol_mod*6*12];
dl_ch128 = (__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*20*12];
rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol*20*12];
rxdataF_comp128 = (__m128i *)&rxdataF_comp[(aatx<<1)+aarx][symbol*20*12];
//printf("ch compensation dl_ch ext addr %p \n", &dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*20*12]);
//printf("rxdataf ext addr %p symbol %d\n", &rxdataF_ext[aarx][symbol*20*12], symbol);
//printf("rxdataf_comp addr %p\n",&rxdataF_comp[(aatx<<1)+aarx][symbol*20*12]);
#elif defined(__arm__)
// to be filled in
@@ -321,7 +313,6 @@ void nr_pbch_channel_compensation(int **rxdataF_ext,
// print_shorts("ch:",dl_ch128+1);
// print_shorts("pack:",rxdataF_comp128+1);
if (symbol_mod>1) {
// multiply by conjugated channel
mmtmpP0 = _mm_madd_epi16(dl_ch128[2],rxdataF128[2]);
// mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
@@ -342,11 +333,7 @@ void nr_pbch_channel_compensation(int **rxdataF_ext,
dl_ch128+=3;
rxdataF128+=3;
rxdataF_comp128+=3;
} else {
dl_ch128+=2;
rxdataF128+=2;
rxdataF_comp128+=2;
}
#elif defined(__arm__)
// to be filled in
#endif
@@ -399,60 +386,58 @@ void nr_pbch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
#endif
}
void nr_pbch_scrambling(NR_DL_FRAME_PARMS *frame_parms,
uint8_t *pbch_e,
uint32_t length)
void nr_pbch_unscrambling(NR_UE_PBCH *pbch,
uint16_t Nid,
uint8_t nushift,
uint16_t M,
uint16_t length,
uint8_t bitwise)
{
int i;
uint8_t reset;
uint8_t reset, offset;
uint32_t x1, x2, s=0;
double *demod_pbch_e = pbch->demod_pbch_e;
uint32_t *pbch_a_prime = (uint32_t*)pbch->pbch_a_prime;
uint32_t *pbch_a_interleaved = (uint32_t*)pbch->pbch_a_interleaved;
uint32_t unscrambling_mask = 0x100006D;
reset = 1;
// x1 is set in lte_gold_generic
x2 = frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.6.1
// msg("pbch_scrambling: Nid_cell = %d\n",x2);
for (i=0; i<length; i++) {
if ((i&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
// printf("lte_gold[%d]=%x\n",i,s);
reset = 0;
}
pbch_e[i] = (pbch_e[i]&1) ^ ((s>>(i&0x1f))&1);
}
}
void nr_pbch_unscrambling(NR_DL_FRAME_PARMS *frame_parms,
int8_t* llr,
uint32_t length,
uint8_t frame_mod4)
{
int i;
uint8_t reset;
uint32_t x1, x2, s=0;
printf("unscramb nid_cell %d\n",Nid);
reset = 1;
// x1 is set in first call to lte_gold_generic
x2 = frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.6.1
// msg("pbch_unscrambling: Nid_cell = %d\n",x2);
x2 = Nid; //this is c_init
for (i=0; i<length; i++) {
if (i%32==0) {
s = lte_gold_generic(&x1, &x2, reset);
// printf("lte_gold[%d]=%x\n",i,s);
reset = 0;
}
// take the quarter of the PBCH that corresponds to this frame
if ((i>=(frame_mod4*(length>>2))) && (i<((1+frame_mod4)*(length>>2)))) {
// if (((s>>(i%32))&1)==1)
if (((s>>(i%32))&1)==0)
llr[i] = -llr[i];
}
// The Gold sequence is shifted by nushift* M, so we skip (nushift*M /32) double words
for (int i=0; i<(uint16_t)ceil((nushift*M)/32); i++) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
// Scrambling is now done with offset (nushift*M)%32
offset = (nushift*M)&0x1f;
for (int i=0; i<length; i++) {
if (((i+offset)&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
#ifdef DEBUG_PBCH_ENCODING
if (i<8)
printf("s: %04x\t", s);
#endif
if (bitwise) {
(*pbch_a_interleaved) ^= ((unscrambling_mask>>i)&1)? (((*pbch_a_prime)>>i)&1)<<i : ((((*pbch_a_prime)>>i)&1) ^ ((s>>((i+offset)&0x1f))&1))<<i;
}
else {
if (((s>>((i+offset)&0x1f))&1)==1)
demod_pbch_e[i] = -demod_pbch_e[i];
#ifdef DEBUG_PBCH_ENCODING
if (i<8)
printf("s %d demod_pbch_e[i] %d\n", ((s>>((i+offset)&0x1f))&1), demod_pbch_e[i]);
#endif
}
}
}
void nr_pbch_alamouti(NR_DL_FRAME_PARMS *frame_parms,
@@ -501,21 +486,23 @@ void nr_pbch_quantize(int8_t *pbch_llr8,
uint16_t i;
for (i=0; i<len; i++) {
if (pbch_llr[i]>7)
pbch_llr8[i]=7;
else if (pbch_llr[i]<-8)
pbch_llr8[i]=-8;
if (pbch_llr[i]>127)
pbch_llr8[i]=127;
else if (pbch_llr[i]<-128)
pbch_llr8[i]=-128;
else
pbch_llr8[i] = (char)(pbch_llr[i]);
}
}
static unsigned char dummy_w_rx[3*3*(16+PBCH_A)];
static int8_t pbch_w_rx[3*3*(16+PBCH_A)],pbch_d_rx[96+(3*(16+PBCH_A))];
unsigned char sign(int8_t x) {
return (unsigned char)x >> 7;
}
uint8_t pbch_deinterleaving_pattern[32] = {28,0,31,30,1,29,25,27,22,2,24,3,4,5,6,7,18,21,20,8,9,10,11,19,26,12,13,14,15,16,23,17};
uint16_t nr_rx_pbch( PHY_VARS_NR_UE *ue,
int nr_rx_pbch( PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_PBCH *nr_ue_pbch_vars,
NR_DL_FRAME_PARMS *frame_parms,
@@ -527,39 +514,45 @@ uint16_t nr_rx_pbch( PHY_VARS_NR_UE *ue,
NR_UE_COMMON *nr_ue_common_vars = &ue->common_vars;
uint8_t log2_maxh;//,aatx,aarx;
uint8_t log2_maxh;
int max_h=0;
int symbol,i;
uint32_t nsymb = (frame_parms->Ncp==0) ? 14:12;
uint16_t pbch_E;
uint8_t pbch_a[8];
uint8_t RCC;
//uint8_t pbch_a[64];
uint8_t *pbch_a = malloc(sizeof(uint8_t) * 32);
uint8_t *pbch_a_prime;
uint8_t *pbch_a_b = malloc(sizeof(uint8_t) *NR_POLAR_PBCH_PAYLOAD_BITS);
int8_t *pbch_e_rx;
uint8_t *decoded_output = nr_ue_pbch_vars->decoded_output;
uint16_t crc;
uint8_t nushift;
uint16_t M;
uint8_t Lmax=8; //to update
uint8_t ssb_index=0;
//uint16_t crc;
//short nr_demod_table[8] = {0,0,0,1,1,0,1,1};
double nr_demod_table[8] = {0.707,0.707,-0.707,0.707,0.707,-0.707,-0.707,-0.707};
double *demod_pbch_e = malloc (sizeof(double) * 864);
unsigned short idx_demod =0;
int8_t decoderState=0;
uint8_t decoderListSize = 8, pathMetricAppr = 0;
double aPrioriArray[frame_parms->pbch_polar_params.payloadBits]; // assume no a priori knowledge available about the payload.
memset(&pbch_a[0], 0, sizeof(uint8_t) * NR_POLAR_PBCH_PAYLOAD_BITS);
//printf("nr_pbch_ue nid_cell %d\n",frame_parms->Nid_cell);
for (int i=0; i<frame_parms->pbch_polar_params.payloadBits; i++) aPrioriArray[i] = NAN;
int subframe_rx = proc->subframe_rx;
// pbch_D = 16+PBCH_A;
pbch_E = (frame_parms->Ncp==0) ? 1920 : 1728; //RE/RB * #RB * bits/RB (QPSK)
pbch_e_rx = &nr_ue_pbch_vars->llr[frame_mod4*(pbch_E>>2)];
#ifdef DEBUG_PBCH
msg("[PBCH] starting symbol loop (Ncp %d, frame_mod4 %d,mimo_mode %d\n",frame_parms->Ncp,frame_mod4,mimo_mode);
#endif
pbch_e_rx = &nr_ue_pbch_vars->llr[0];
// clear LLR buffer
memset(nr_ue_pbch_vars->llr,0,pbch_E);
memset(nr_ue_pbch_vars->llr,0,NR_POLAR_PBCH_E);
for (symbol=1; symbol<4; symbol++) {
for (symbol=5; symbol<8; symbol++) {
#ifdef DEBUG_PBCH
msg("[PBCH] starting extract ofdm size %d\n",frame_parms->ofdm_symbol_size );
#endif
printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF);
//printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF);
//write_output("rxdataF0_pbch.m","rxF0pbch",nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF,frame_parms->ofdm_symbol_size*4,2,1);
nr_pbch_extract(nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF,
@@ -570,7 +563,7 @@ uint16_t nr_rx_pbch( PHY_VARS_NR_UE *ue,
high_speed_flag,
frame_parms);
#ifdef DEBUG_PBCH
msg("[PHY] PBCH Symbol %d\n",symbol);
msg("[PHY] PBCH Symbol %d ofdm size %d\n",symbol, frame_parms->ofdm_symbol_size );
msg("[PHY] PBCH starting channel_level\n");
#endif
@@ -590,6 +583,8 @@ uint16_t nr_rx_pbch( PHY_VARS_NR_UE *ue,
symbol,
log2_maxh); // log2_maxh+I0_shift
//write_output("rxdataF_comp.m","rxFcomp",nr_ue_pbch_vars->rxdataF_comp,180,2,1);
/*if (frame_parms->nb_antennas_rx > 1)
pbch_detection_mrc(frame_parms,
nr_ue_pbch_vars->rxdataF_comp,
@@ -598,140 +593,130 @@ uint16_t nr_rx_pbch( PHY_VARS_NR_UE *ue,
if (mimo_mode == ALAMOUTI) {
nr_pbch_alamouti(frame_parms,nr_ue_pbch_vars->rxdataF_comp,symbol);
// msg("[PBCH][RX] Alamouti receiver not yet implemented!\n");
// return(-1);
} else if (mimo_mode != SISO) {
msg("[PBCH][RX] Unsupported MIMO mode\n");
return(-1);
}
if (symbol>(nsymb>>1)+1) {
if (symbol==6) {
nr_pbch_quantize(pbch_e_rx,
(short*)&(nr_ue_pbch_vars->rxdataF_comp[0][(symbol%(nsymb>>1))*72]),
(short*)&(nr_ue_pbch_vars->rxdataF_comp[0][symbol*240]),
144);
pbch_e_rx+=144;
} else {
nr_pbch_quantize(pbch_e_rx,
(short*)&(nr_ue_pbch_vars->rxdataF_comp[0][(symbol%(nsymb>>1))*72]),
96);
(short*)&(nr_ue_pbch_vars->rxdataF_comp[0][symbol*240]),
360);
pbch_e_rx+=96;
pbch_e_rx+=360;
}
}
pbch_e_rx = nr_ue_pbch_vars->llr;
demod_pbch_e = nr_ue_pbch_vars->demod_pbch_e;
pbch_a = nr_ue_pbch_vars->pbch_a;
pbch_a_prime = nr_ue_pbch_vars->pbch_a_prime;
//#ifdef DEBUG_PBCH
//pbch_e_rx = &nr_ue_pbch_vars->llr[0];
short *p = (short *)&(nr_ue_pbch_vars->rxdataF_comp[0][5*20*12]);
for (int cnt = 0; cnt < 8 ; cnt++)
printf("pbch rx llr %d rxdata_comp %d addr %p\n",*(pbch_e_rx+cnt), p[cnt], &p[0]);
//#endif
//un-scrambling
for (i=0; i<NR_POLAR_PBCH_E/2; i++){
idx_demod = (sign(pbch_e_rx[i<<1])&1) ^ ((sign(pbch_e_rx[(i<<1)+1])&1)<<1);
demod_pbch_e[i<<1] = nr_demod_table[(idx_demod)<<1];
demod_pbch_e[(i<<1)+1] = nr_demod_table[((idx_demod)<<1)+1];
#ifdef DEBUG_PBCH
msg("[PBCH] doing unscrambling\n");
if (i<16){
printf("idx[%d]= %d\n", i , idx_demod);
printf("sign[%d]= %d sign[%d]= %d\n", i<<1 , sign(pbch_e_rx[i<<1]), (i<<1)+1 , sign(pbch_e_rx[(i<<1)+1]));
printf("demod_pbch_e[%d] r = %2.3f i = %2.3f\n", i<<1 , demod_pbch_e[i<<1], demod_pbch_e[(i<<1)+1]);}
#endif
nr_pbch_unscrambling(frame_parms,
pbch_e_rx,
pbch_E,
frame_mod4);
//un-rate matching
#ifdef DEBUG_PBCH
msg("[PBCH] doing un-rate-matching\n");
#endif
memset(dummy_w_rx,0,3*3*(16+PBCH_A));
RCC = generate_dummy_w_cc(16+PBCH_A,
dummy_w_rx);
lte_rate_matching_cc_rx(RCC,pbch_E,pbch_w_rx,dummy_w_rx,pbch_e_rx);
sub_block_deinterleaving_cc((unsigned int)(PBCH_A+16),
&pbch_d_rx[96],
&pbch_w_rx[0]);
memset(pbch_a,0,((16+PBCH_A)>>3));
phy_viterbi_lte_sse2(pbch_d_rx+96,pbch_a,16+PBCH_A);
// Fix byte endian of PBCH (bit 23 goes in first)
for (i=0; i<(PBCH_A>>3); i++)
decoded_output[(PBCH_A>>3)-i-1] = pbch_a[i];
#ifdef DEBUG_PBCH
for (i=0; i<(PBCH_A>>3); i++)
msg("[PBCH] pbch_a[%d] = %x\n",i,decoded_output[i]);
#endif //DEBUG_PBCH
#ifdef DEBUG_PBCH
msg("PBCH CRC %x : %x\n",
crc16(pbch_a,PBCH_A),
((uint16_t)pbch_a[PBCH_A>>3]<<8)+pbch_a[(PBCH_A>>3)+1]);
#endif
crc = (crc16(pbch_a,PBCH_A)>>16) ^
(((uint16_t)pbch_a[PBCH_A>>3]<<8)+pbch_a[(PBCH_A>>3)+1]);
if (crc == 0x0000)
return(1);
else if (crc == 0xffff)
return(2);
else if (crc == 0x5555)
return(4);
else
return(-1);
}
#ifdef PHY_ABSTRACTION
uint16_t rx_pbch_emul(PHY_VARS_UE *phy_vars_ue,
uint8_t eNB_id,
uint8_t pbch_phase)
{
double bler=0.0;//, x=0.0;
double sinr=0.0;
uint16_t nb_rb = phy_vars_ue->frame_parms.N_RB_DL;
int16_t f;
uint8_t CC_id=phy_vars_ue->CC_id;
int frame_rx = phy_vars_ue->proc.proc_rxtx[0].frame_rx;
// compute effective sinr
// TODO: adapt this to varible bandwidth
for (f=(nb_rb*6-3*12); f<(nb_rb*6+3*12); f++) {
if (f!=0) //skip DC
sinr += pow(10, 0.1*(phy_vars_ue->sinr_dB[f]));
}
sinr = 10*log10(sinr/(6*12));
//un-scrambling
M = NR_POLAR_PBCH_E;
nushift = (Lmax==4)? ssb_index&3 : ssb_index&7;
nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_E,0);
bler = pbch_bler(sinr);
//#ifdef DEBUG_PBCH
for (i=0; i<16; i++){
printf("unscrambling demod_pbch_e[%d] r = %2.3f i = %2.3f\n", i<<1 , demod_pbch_e[i<<1], demod_pbch_e[(i<<1)+1]);}
//#endif
//polar decoding de-rate matching
decoderState = polar_decoder(demod_pbch_e, pbch_a_b, &frame_parms->pbch_polar_params, decoderListSize, aPrioriArray, pathMetricAppr);
printf("polar decoder state %d\n", decoderState);
if(decoderState == -1)
return(decoderState);
LOG_D(PHY,"EMUL UE rx_pbch_emul: eNB_id %d, pbch_phase %d, sinr %f dB, bler %f \n",
eNB_id,
pbch_phase,
sinr,
bler);
memset(&pbch_a_prime[0], 0, sizeof(uint8_t) * NR_POLAR_PBCH_PAYLOAD_BITS>>3);
for (i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS; i++)
{
pbch_a_prime[i/8] ^= (pbch_a_b[i]&1)<<(i&7);
//printf("pbch_a_b[%d] = %u pbch_a_prime[i/8] 0x%02x \n", i,pbch_a_b[i],pbch_a_prime[i/8]);
}
if (pbch_phase == (frame_rx % 4)) {
if (uniformrandom() >= bler) {
memcpy(phy_vars_ue->pbch_vars[eNB_id]->decoded_output,PHY_vars_eNB_g[eNB_id][CC_id]->pbch_pdu,PBCH_PDU_SIZE);
return(PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms.nb_antenna_ports_eNB);
} else
return(-1);
} else
return(-1);
}
//#ifdef DEBUG_PBCH
for (i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS>>3; i++)
printf("pbch_a_prime[%d] = 0x%02x\n", i,pbch_a_prime[i]);
//#endif
//payload un-scrambling
memset(nr_ue_pbch_vars->pbch_a_interleaved, 0, sizeof(uint8_t) * NR_POLAR_PBCH_PAYLOAD_BITS>>3);
M = (Lmax == 64)? (NR_POLAR_PBCH_PAYLOAD_BITS - 6) : (NR_POLAR_PBCH_PAYLOAD_BITS - 3);
nushift = ((pbch_a_prime[0]>>6)&1) ^ (((pbch_a_prime[3])&1)<<1);
//printf("payload unscrambling nushift %d sfn3 %d sfn2 %d M %d\n",nushift, ((pbch_a_prime[0]>>6)&1),((pbch_a_prime[3])&1),M);
nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_PAYLOAD_BITS,1);
//payload deinterleaving
uint32_t in=0, out=0;
for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS>>3; i++)
in |= (uint32_t)(nr_ue_pbch_vars->pbch_a_interleaved[i]<<(i<<3));
for (int i=0; i<32; i++) {
out |= ((in>>i)&1)<<(pbch_deinterleaving_pattern[i]);
#ifdef DEBUG_PBCH
printf("i %d in 0x%08x out 0x%08x ilv %d (in>>i)&1) 0x%08x\n", i, in, out, pbch_deinterleaving_pattern[i], (in>>i)&1);
#endif
}
for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS>>3; i++)
pbch_a[i] = (uint8_t)((out>>(i<<3))&0xff);
// Fix byte endian
for (i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++)
decoded_output[(NR_POLAR_PBCH_PAYLOAD_BITS>>3)-i-1] = pbch_a[i];
//#ifdef DEBUG_PBCH
for (i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++){
//printf("unscrambling pbch_a[%d] = %x \n", i,pbch_a[i]);
printf("[PBCH] decoder payload[%d] = %x\n",i,decoded_output[i]);
}
//#endif
ue->dl_indication.rx_ind = &ue->rx_ind; // hang on rx_ind instance
//ue->rx_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance()
ue->rx_ind.number_pdus = ue->rx_ind.number_pdus + 1;
ue->rx_ind.rx_indication_body = (fapi_nr_rx_indication_body_t *)malloc(sizeof(fapi_nr_rx_indication_body_t));
ue->rx_ind.rx_indication_body->pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
ue->rx_ind.rx_indication_body->mib_pdu.pdu = &decoded_output[1];
ue->rx_ind.rx_indication_body->mib_pdu.additional_bits = decoded_output[0];
ue->rx_ind.rx_indication_body->mib_pdu.ssb_index = ssb_index; // confirm with TCL
ue->rx_ind.rx_indication_body->mib_pdu.ssb_length = Lmax; // confirm with TCL
ue->rx_ind.rx_indication_body->mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
ue->if_inst->dl_indication(&ue->dl_indication);
return 0;
}
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+1 -19
View File
@@ -1352,24 +1352,6 @@ int dump_dci(NR_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci);
int dump_ue_stats(PHY_VARS_NR_UE *phy_vars_ue, UE_nr_rxtx_proc_t *proc, char* buffer, int length, runmode_t mode, int input_level_dBm);
void generate_pcfich_reg_mapping(NR_DL_FRAME_PARMS *frame_parms);
void pcfich_unscrambling(NR_DL_FRAME_PARMS *frame_parms,
uint8_t subframe,
int16_t *d);
uint8_t rx_pcfich(NR_DL_FRAME_PARMS *frame_parms,
uint8_t subframe,
NR_UE_PDCCH *lte_ue_pdcch_vars,
MIMO_mode_t mimo_mode);
void generate_phich_reg_mapping(NR_DL_FRAME_PARMS *frame_parms);
void init_transport_channels(uint8_t);
void generate_RIV_tables(void);
@@ -1381,7 +1363,7 @@ void generate_RIV_tables(void);
parameters are know, the routine calls some basic initialization routines (cell-specific reference signals, etc.)
@param phy_vars_ue Pointer to UE variables
*/
int initial_sync(PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode);
int nr_initial_sync(PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode);
/*!
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
+63 -28
View File
@@ -31,7 +31,9 @@
*/
#ifndef __NR_TRANSPORT_UE__H__
#define __NR_TRANSPORT_UE__H__
#include "PHY/defs_nr_UE.h"
#include <limits.h>
#include "PHY/impl_defs_top.h"
//#include "PHY/defs_nr_UE.h"
//#include "../LTE_TRANSPORT/dci.h"
//#include "../LTE_TRANSPORT/mdci.h"
//#include "../LTE_TRANSPORT/uci_common.h"
@@ -48,7 +50,31 @@
* @{
*/
#define SHRT_MAX 32767
//#if defined(UPGRADE_RAT_NR)
#if 1
typedef struct {
/// HARQ process id
uint8_t harq_id;
/// ACK bits (after decoding) 0:NACK / 1:ACK / 2:DTX
uint8_t ack;
/// send status (for PUCCH)
uint8_t send_harq_status;
/// nCCE (for PUCCH)
uint8_t nCCE;
/// DAI value detected from DCI1/1a/1b/1d/2/2a/2b/2c. 0xff indicates not touched
uint8_t vDAI_DL;
/// DAI value detected from DCI0/4. 0xff indicates not touched
uint8_t vDAI_UL;
/// allow to define pucch parameters TS 38.213 9.2.3 UE procedure for reporting HARQ-ACK
uint8_t pucch_resource_indicator;
/// slot on which feedback ack should be send to network
uint16_t slot_for_feedback_ack;
/// index of a first CCE for the PDCCH reception
uint8_t n_CCE;
/// number of CCEs in a control resource set of a PDCCH reception conveying DCI format 1_0
uint8_t N_CCE;
} NR_UE_HARQ_STATUS_t;
#endif
typedef struct {
/// Indicator of first transmission
@@ -128,9 +154,15 @@ typedef struct {
/// Current Number of Symbols
uint8_t Nsymb_pusch;
/// SRS active flag
uint8_t srs_active;
/// Pointers to 8 HARQ processes for the ULSCH
NR_UL_UE_HARQ_t *harq_processes[8];
uint8_t srs_active;
//#if defined(UPGRADE_RAT_NR)
#if 1
// Pointers to HARQ processes for the ULSCH
NR_UL_UE_HARQ_t *harq_processes[NR_MAX_ULSCH_HARQ_PROCESSES];
int harq_process_id[NR_MAX_SLOTS_PAR_FRAME];
// UL number of harq processes
uint8_t number_harq_processes_for_pusch;
#endif
/// Pointer to CQI data (+1 for 8 bits crc)
uint8_t o[1+MAX_CQI_BYTES];
/// Length of CQI data (bits)
@@ -197,9 +229,6 @@ typedef struct {
uint8_t Mlimit;
} NR_UE_ULSCH_t;
typedef struct {
/// Indicator of first transmission
uint8_t first_tx;
@@ -253,6 +282,12 @@ typedef struct {
uint32_t G;
/// Current Number of RBs
uint16_t nb_rb;
/// Starting RB number
uint16_t start_rb;
/// Number of Symbols
uint16_t nb_symbols;
/// Starting Symbol number
uint16_t start_symbol;
/// Current subband PMI allocation
uint16_t pmi_alloc;
/// Current RB allocation (even slots)
@@ -269,24 +304,10 @@ typedef struct {
uint32_t errors[8];
/// codeword this transport block is mapped to
uint8_t codeword;
/// HARQ-ACKs
NR_UE_HARQ_STATUS_t harq_ack;
} NR_DL_UE_HARQ_t;
typedef struct {
/// HARQ process id
uint8_t harq_id;
/// ACK bits (after decoding) 0:NACK / 1:ACK / 2:DTX
uint8_t ack;
/// send status (for PUCCH)
uint8_t send_harq_status;
/// nCCE (for PUCCH)
uint8_t nCCE;
/// DAI value detected from DCI1/1a/1b/1d/2/2a/2b/2c. 0xff indicates not touched
uint8_t vDAI_DL;
/// DAI value detected from DCI0/4. 0xff indicates not touched
uint8_t vDAI_UL;
} nr_harq_status_t;
typedef struct {
/// RNTI
uint16_t rnti;
@@ -310,10 +331,17 @@ typedef struct {
uint32_t cqi_alloc2;
/// saved subband PMI allocation from last PUSCH/PUCCH report
uint16_t pmi_alloc;
/// HARQ-ACKs
nr_harq_status_t harq_ack[10];
/// Pointers to up to 8 HARQ processes
NR_DL_UE_HARQ_t *harq_processes[8];
//#if defined(UPGRADE_RAT_NR)
#if 1
/// Pointers to up to HARQ processes
NR_DL_UE_HARQ_t *harq_processes[NR_MAX_DLSCH_HARQ_PROCESSES];
// DL number of harq processes
uint8_t number_harq_processes_for_pdsch;
/* higher layer parameter for reception of two transport blocks TS 38.213 9.1.3.1 Type-2 HARQ-ACK codebook dtermination */
uint8_t Number_MCS_HARQ_DL_DCI;
/* spatial bundling of PUCCH */
uint8_t HARQ_ACK_spatial_bundling_PUCCH;
#endif
/// Maximum number of HARQ processes(for definition see 36-212 V8.6 2009-03, p.17
uint8_t Mdlharq;
/// MIMO transmission mode indicator for this sub-frame (for definition see 36-212 V8.6 2009-03, p.17)
@@ -363,6 +391,13 @@ typedef struct {
dci_space_t search_space;
/// DCI pdu
uint8_t dci_pdu[8];
//#if defined(UPGRADE_RAT_NR)
#if 1
/// harq information
uint8_t harq_pid_pusch;
/// delay between current slot and slot to transmit
uint8_t number_slots_rx_to_tx;
#endif
} NR_DCI_ALLOC_t;
openair1/PHY/NR_UE_TRANSPORT/pss_nr.c
+14 -15
View File
@@ -369,7 +369,7 @@ void init_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue)
assert(0);
}
size = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(int)*frame_parms_ue->samples_per_subframe;
size = NR_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(int)*frame_parms_ue->samples_per_subframe;
q = malloc16(size);
if (q != NULL) {
pss_corr_ue[i] = q;
@@ -578,7 +578,7 @@ void restore_frame_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue, int rate_ch
void decimation_synchro_nr(PHY_VARS_NR_UE *PHY_vars_UE, int rate_change, int **rxdata)
{
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int samples_for_frame = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti;
int samples_for_frame = NR_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti;
#if TEST_SYNCHRO_TIMING_PSS
@@ -631,7 +631,7 @@ int pss_synchro_nr(PHY_VARS_NR_UE *PHY_vars_UE, int rate_change)
#ifdef DBG_PSS_NR
int samples_for_frame = frame_parms->samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME;
int samples_for_frame = frame_parms->samples_per_subframe*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
write_output("rxdata0_rand.m","rxd0_rand", &PHY_vars_UE->common_vars.rxdata[0][0], samples_for_frame, 1, 1);
@@ -669,24 +669,21 @@ int pss_synchro_nr(PHY_VARS_NR_UE *PHY_vars_UE, int rate_change)
#endif
#if 1
synchro_position = pss_search_time_nr(rxdata,
frame_parms,
(int *)&PHY_vars_UE->common_vars.eNb_id);
#else
synchro_position = lte_sync_time(rxdata,
frame_parms,
(int *)&PHY_vars_UE->common_vars.eNb_id);
#endif
#if TEST_SYNCHRO_TIMING_PSS
stop_meas(&generic_time[TIME_PSS]);
printf("PSS execution duration %5.2f \n", generic_time[TIME_PSS].p_time/(cpuf*1000.0));
int duration_ms = generic_time[TIME_PSS].p_time/(cpuf*1000.0);
#ifndef NR_UNIT_TEST
printf("PSS execution duration %4d microseconds \n", duration_ms);
#endif
#endif
@@ -775,7 +772,7 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain
int result;
int synchro_out;
unsigned int tmp[NUMBER_PSS_SEQUENCE];
unsigned int length = (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->ttis_per_subframe*frame_parms->samples_per_tti); /* 1 frame for now, it should be 2 TODO_NR */
unsigned int length = (NR_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->ttis_per_subframe*frame_parms->samples_per_tti); /* 1 frame for now, it should be 2 TODO_NR */
for (int i = 0; i < NUMBER_PSS_SEQUENCE; i++) {
tmp[i] = 0;
@@ -855,7 +852,9 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain
}
//#endif
#ifdef DEBUG_PHY
#ifdef DBG_PSS_NR
static debug_cnt = 0;
if (debug_cnt == 0) {
write_output("pss_corr_ue0.m","pss_corr_ue0",pss_corr_ue[0],length,1,2);
openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c
+1480
View File
File diff suppressed because it is too large Load Diff
openair1/PHY/NR_UE_TRANSPORT/sss_nr.c
+7 -47
View File
@@ -181,7 +181,7 @@ void insert_sss_nr(int16_t *sss_time,
/* get sss in the frequency domain by applying an inverse FFT */
idft2048(synchroF_tmp, /* complex input */
synchro_tmp, /* complex output */
1); /* scaling factor */
1); /* scaling factor */
/* then get final sss in time */
for (unsigned int i=0; i<ofdm_symbol_size; i++) {
@@ -305,8 +305,6 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
int32_t **rxdataF;
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
#if 1
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
pss_symbol = PSS_SYMBOL_NB; /* symbol position */
@@ -361,46 +359,6 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
printf(" pss_rxF_ext [%d] %d %d at address %p\n", i, p2[2*i], p2[2*i+1], &p2[2*i]);
}
#endif
#else
/* same method as LTE implementation */
uint16_t rb,nb_rb = N_RB_SS_PBCH_BLOCK;
int rx_offset = frame_parms->ofdm_symbol_size - (LENGTH_SSS_NR/2);
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
pss_symbol = PSS_SYMBOL_NB;
sss_symbol = SSS_SYMBOL_NB;
rxdataF = ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF;
pss_rxF = &rxdataF[aarx][(rx_offset + (pss_symbol*(frame_parms->ofdm_symbol_size)))];
sss_rxF = &rxdataF[aarx][(rx_offset + (sss_symbol*(frame_parms->ofdm_symbol_size)))];
//printf("extract_rbs: symbol_mod=%d, rx_offset=%d, ch_offset=%d\n",symbol_mod,
// (rx_offset + (symbol*(frame_parms->ofdm_symbol_size)))*2,
// LTE_CE_OFFSET+ch_offset+(symbol_mod*(frame_parms->ofdm_symbol_size)));
pss_rxF_ext = &pss_ext[aarx][0];
sss_rxF_ext = &sss_ext[aarx][0];
for (rb=0; rb<nb_rb; rb++) {
for (int i=0; i<N_SC_RB; i++) {
if (doPss) {pss_rxF_ext[i] = pss_rxF[i];}
if (doSss) {sss_rxF_ext[i] = sss_rxF[i];}
}
pss_rxF += N_SC_RB;
sss_rxF += N_SC_RB;
pss_rxF_ext += N_SC_RB;
sss_rxF_ext += N_SC_RB;
}
}
#endif
return(0);
@@ -466,20 +424,22 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max)
// Do FFTs for SSS/PSS
// SSS
slot_fep_pbch(ue,
nr_slot_fep(ue,
SSS_SYMBOL_NB, // symbol number
0, // Ns slot number
ue->rx_offset, // sample_offset of int16_t
0, // no_prefix
1); // reset frequency estimation
1, // reset frequency estimation
NR_SSS_EST);
// PSS
slot_fep_pbch(ue,
nr_slot_fep(ue,
PSS_SYMBOL_NB,
0,
ue->rx_offset,
0,
1);
1,
NR_SSS_EST);
frame_parms->nb_prefix_samples0 = nb_prefix_samples0;
openair1/PHY/defs.h
+1683
View File
File diff suppressed because it is too large Load Diff
openair1/PHY/defs_NR.h
+3 -3
View File
@@ -114,11 +114,11 @@ typedef struct PHY_VARS_gNB_s {
int (*te)(struct PHY_VARS_gNB_s *,uint8_t *,uint8_t,LTE_eNB_DLSCH_t *,int,uint8_t,time_stats_t *,time_stats_t *,time_stats_t *);
int (*start_if)(struct RU_t_s *ru,struct PHY_VARS_gNB_s *eNB);
uint8_t local_flag;
nfapi_config_request_t gNB_config;
nfapi_nr_config_request_t gNB_config;
NR_DL_FRAME_PARMS frame_parms;
PHY_MEASUREMENTS_gNB measurements;
IF_Module_t *if_inst;
UL_IND_t UL_INFO;
NR_IF_Module_t *if_inst;
NR_UL_IND_t UL_INFO;
pthread_mutex_t UL_INFO_mutex;
/// NFAPI RX ULSCH information
nfapi_rx_indication_pdu_t rx_pdu_list[NFAPI_RX_IND_MAX_PDU];
openair1/PHY/defs_gNB.h
+7 -5
View File
@@ -35,10 +35,12 @@
#include "defs_eNB.h"
#include "defs_nr_common.h"
#include "CODING/nrPolar_tools/nr_polar_pbch_defs.h"
#include "openair2/NR_PHY_INTERFACE/NR_IF_Module.h"
typedef struct {
uint8_t pbch_a[NR_POLAR_PBCH_PAYLOAD_BITS];
uint8_t pbch_a[NR_POLAR_PBCH_PAYLOAD_BITS>>3];
uint8_t pbch_a_interleaved[NR_POLAR_PBCH_PAYLOAD_BITS>>3];
uint8_t pbch_a_prime[NR_POLAR_PBCH_PAYLOAD_BITS>>3];
uint8_t pbch_e[NR_POLAR_PBCH_E];
} NR_gNB_PBCH;
@@ -240,11 +242,11 @@ typedef struct PHY_VARS_gNB_s {
int rx_total_gain_dB;
int (*start_if)(struct RU_t_s *ru,struct PHY_VARS_gNB_s *gNB);
uint8_t local_flag;
nfapi_config_request_t gNB_config;
nfapi_nr_config_request_t gNB_config;
NR_DL_FRAME_PARMS frame_parms;
PHY_MEASUREMENTS_gNB measurements;
IF_Module_t *if_inst;
UL_IND_t UL_INFO;
NR_IF_Module_t *if_inst;
NR_UL_IND_t UL_INFO;
pthread_mutex_t UL_INFO_mutex;
/// NFAPI RX ULSCH information
nfapi_rx_indication_pdu_t rx_pdu_list[NFAPI_RX_IND_MAX_PDU];
openair1/PHY/defs_nr_UE.h
+186 -57
View File
@@ -34,6 +34,8 @@
#include "defs_nr_common.h"
#include "CODING/nrPolar_tools/nr_polar_pbch_defs.h"
#define _GNU_SOURCE
#include <stdio.h>
@@ -80,6 +82,15 @@
//#define RX_NB_TH_MAX 3
//#define RX_NB_TH 3
#ifdef NR_UNIT_TEST
#define FILE_NAME " "
#define LINE_FILE (0)
#define NR_TST_PHY_PRINTF(...) printf(__VA_ARGS__)
#else
#define FILE_NAME (__FILE__)
#define LINE_FILE (__LINE__)
#define NR_TST_PHY_PRINTF(...)
#endif
//#ifdef SHRLIBDEV
//extern int rxrescale;
@@ -110,8 +121,8 @@
#define openair_sched_exit() exit(-1)
#define max(a,b) ((a)>(b) ? (a) : (b))
#define min(a,b) ((a)<(b) ? (a) : (b))
//#define max(a,b) ((a)>(b) ? (a) : (b))
//#define min(a,b) ((a)<(b) ? (a) : (b))
#define bzero(s,n) (memset((s),0,(n)))
@@ -147,7 +158,28 @@
#include "targets/ARCH/COMMON/common_lib.h"
#include "NR_IF_Module.h"
//#if defined(UPGRADE_RAT_NR)
#if 1
/* see 38.321 Table 7.1-2 RNTI usage */
typedef enum { /* Type for Radio Network Temporary Identifier */
C_RNTI_NR = 0, /* Cell RNTI */
Temporary_C_RNTI_NR, /* Temporary C-RNTI */
CS_RNTI_NR, /* Configured Scheduling RNTI */
P_RNTI_NR, /* Paging RNTI */
SI_RNTI_NR, /* System information RNTI */
RA_RNTI_NR, /* Random Access RNTI */
TPC_CS_RNTI_NR, /* configured scheduling uplink power control */
TPC_PUCCH_RNTI_NR, /* PUCCH power control */
TPC_PUSCH_RNTI_NR, /* PUSCH power control */
TPC_SRS_RNTI_NR, /* SRS trigger and power control */
INT_RNTI_NR, /* Indication pre-emption in DL */
SFI_RNTI_NR, /* Slot Format Indication on the given cell */
SP_CSI_RNTI_NR /* Semipersistent CSI reporting on PUSCH */
} nr_rnti_type_t;
#endif
/// Context data structure for RX/TX portion of subframe processing
typedef struct {
@@ -280,6 +312,13 @@ typedef struct {
UE_nr_rxtx_proc_t proc_rxtx[RX_NB_TH];
} UE_nr_proc_t;
typedef enum {
NR_PBCH_EST=0,
NR_PDCCH_EST,
NR_PDSCH_EST,
NR_SSS_EST,
} NR_CHANNEL_EST_t;
#define debug_msg if (((mac_xface->frame%100) == 0) || (mac_xface->frame < 50)) msg
typedef struct {
@@ -572,61 +611,112 @@ typedef struct {
} NR_UE_PDSCH_FLP;
#define NR_PDCCH_DEFS_NR_UE
#define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
#define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearchSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
#define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
#define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearchSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
#ifdef NR_PDCCH_DEFS_NR_UE
#define NBR_NR_FORMATS 8
#define NBR_NR_DCI_FIELDS 48
// The following parameters define 'position' of each DCI field described in TS 38.212
#define CARRIER_IND 0
#define SUL_IND_0_1 1
#define IDENTIFIER_DCI_FORMATS 2
#define MAX_NR_DCI_DECODED_SLOT 10 // This value is not specified
#define NBR_NR_FORMATS 8 // The number of formats is 8 (0_0, 0_1, 1_0, 1_1, 2_0, 2_1, 2_2, 2_3)
#define NBR_NR_DCI_FIELDS 56 // The number of different dci fields defined in TS 38.212 subclause 7.3.1
#define IDENTIFIER_DCI_FORMATS 0
#define CARRIER_IND 1
#define SUL_IND_0_1 2
#define SLOT_FORMAT_IND 3
#define PRE_EMPTION_IND 4
#define TPC_CMD_NUMBER 5
#define BLOCK_NUMBER 6
#define BANDWIDTH_PART_IND 7
#define FREQ_DOM_RESOURCE_ASSIGNMENT_UL 8
#define FREQ_DOM_RESOURCE_ASSIGNMENT_DL 9
#define TIME_DOM_RESOURCE_ASSIGNMENT 10
#define VRB_TO_PRB_MAPPING 11
#define PRB_BUNDLING_SIZE_IND 12
#define RATE_MATCHING_IND 13
#define ZP_CSI_RS_TRIGGER 14
#define FREQ_HOPPING_FLAG 15
#define TB1_MCS 16
#define TB1_NDI 17
#define TB1_RV 18
#define TB2_MCS 19
#define TB2_NDI 20
#define TB2_RV 21
#define MCS 22
#define NDI 23
#define RV 24
#define HARQ_PROCESS_NUMBER 25
#define DAI_ 26
#define FIRST_DAI 27
#define SECOND_DAI 28
#define TPC_PUSCH 29
#define TPC_PUCCH 30
#define PUCCH_RESOURCE_IND 31
#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 32
#define SHORT_MESSAGE_IND 33
#define SRS_RESOURCE_IND 34
#define PRECOD_NBR_LAYERS 35
#define ANTENNA_PORTS 36
#define TCI 37
#define SRS_REQUEST 38
#define TPC_CMD_NUMBER_FORMAT2_3 39
#define CSI_REQUEST 40
#define CBGTI 41
#define CBGFI 42
#define PTRS_DMRS 43
#define BETA_OFFSET_IND 44
#define DMRS_SEQ_INI 45
#define SUL_IND_0_0 46
#define PADDING 47
#define SHORT_MESSAGE_IND 8
#define SHORT_MESSAGES 9
#define FREQ_DOM_RESOURCE_ASSIGNMENT_UL 10
#define FREQ_DOM_RESOURCE_ASSIGNMENT_DL 11
#define TIME_DOM_RESOURCE_ASSIGNMENT 12
#define VRB_TO_PRB_MAPPING 13
#define PRB_BUNDLING_SIZE_IND 14
#define RATE_MATCHING_IND 15
#define ZP_CSI_RS_TRIGGER 16
#define FREQ_HOPPING_FLAG 17
#define TB1_MCS 18
#define TB1_NDI 19
#define TB1_RV 20
#define TB2_MCS 21
#define TB2_NDI 22
#define TB2_RV 23
#define MCS 24
#define NDI 25
#define RV 26
#define HARQ_PROCESS_NUMBER 27
#define DAI_ 28
#define FIRST_DAI 29
#define SECOND_DAI 30
#define TB_SCALING 31
#define TPC_PUSCH 32
#define TPC_PUCCH 33
#define PUCCH_RESOURCE_IND 34
#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 35
#define SRS_RESOURCE_IND 36
#define PRECOD_NBR_LAYERS 37
#define ANTENNA_PORTS 38
#define TCI 39
#define SRS_REQUEST 40
#define TPC_CMD_NUMBER_FORMAT2_3 41
#define CSI_REQUEST 42
#define CBGTI 43
#define CBGFI 44
#define PTRS_DMRS 45
#define BETA_OFFSET_IND 46
#define DMRS_SEQ_INI 47
#define UL_SCH_IND 48
#define PADDING_NR_DCI 49
#define SUL_IND_0_0 50
#define RA_PREAMBLE_INDEX 51
#define SUL_IND_1_0 52
#define SS_PBCH_INDEX 53
#define PRACH_MASK_INDEX 54
#define RESERVED_NR_DCI 55
typedef enum {
_format_0_0_found=0,
_format_0_1_found=1,
_format_1_0_found=2,
_format_1_1_found=3,
_format_2_0_found=4,
_format_2_1_found=5,
_format_2_2_found=6,
_format_2_3_found=7} format_found_t;
#define TOTAL_NBR_SCRAMBLED_VALUES 13
#define _C_RNTI_ 0
#define _CS_RNTI_ 1
#define _NEW_RNTI_ 2
#define _TC_RNTI_ 3
#define _P_RNTI_ 4
#define _SI_RNTI_ 5
#define _RA_RNTI_ 6
#define _SP_CSI_RNTI_ 7
#define _SFI_RNTI_ 8
#define _INT_RNTI_ 9
#define _TPC_PUSCH_RNTI_ 10
#define _TPC_PUCCH_RNTI_ 11
#define _TPC_SRS_RNTI_ 12
typedef enum {
_c_rnti = _C_RNTI_,
_cs_rnti = _CS_RNTI_,
_new_rnti = _NEW_RNTI_,
_tc_rnti = _TC_RNTI_,
_p_rnti = _P_RNTI_,
_si_rnti = _SI_RNTI_,
_ra_rnti = _RA_RNTI_,
_sp_csi_rnti = _SP_CSI_RNTI_,
_sfi_rnti = _SFI_RNTI_,
_int_rnti = _INT_RNTI_,
_tpc_pusch_rnti = _TPC_PUSCH_RNTI_,
_tpc_pucch_rnti = _TPC_PUCCH_RNTI_,
_tpc_srs_rnti = _TPC_SRS_RNTI_} crc_scrambled_t;
typedef enum {bundle_n2=2,bundle_n3=3,bundle_n6=6} NR_UE_CORESET_REG_bundlesize_t;
@@ -683,11 +773,11 @@ typedef struct {
int tciStatesPDCCH;
int tciPresentInDCI;
uint16_t pdcchDMRSScramblingID;
uint16_t rb_offset;
} NR_UE_PDCCH_CORESET;
// Slots for PDCCH Monitoring configured as periodicity and offset
typedef enum {nr_sl1=1,nr_sl2=2,nr_sl4=4,nr_sl5=5,nr_sl8=8,nr_sl10=10,nr_sl16=16,nr_sl20=20} NR_UE_SLOT_PERIOD_OFFSET_t;
typedef enum {nr_sl1=1,nr_sl2=2,nr_sl4=4,nr_sl5=5,nr_sl8=8,nr_sl10=10,nr_sl16=16,nr_sl20=20,nr_sl40=40,nr_sl80=80,nr_sl160=160,nr_sl320=320,nr_sl640=640,nr_sl1280=1280,nr_sl2560=2560} NR_UE_SLOT_PERIOD_OFFSET_t;
typedef enum {nc0=0,nc1=1,nc2=2,nc3=3,nc4=4,nc5=5,nc6=6,nc8=8} NR_UE_SEARCHSPACE_nbrCAND_t;
typedef enum {nsfi1=1,nsfi2=2} NR_UE_SEARCHSPACE_nbrCAND_SFI_t;
typedef enum {n2_3_1=1,n2_3_2=2} NR_UE_SEARCHSPACE_nbrCAND_2_3_t;
@@ -757,9 +847,12 @@ typedef struct {
// INTEGER (0..maxNrofSearchSpaces-1) (0..40-1)
int searchSpaceId;
int controlResourceSetId;
// FIXME! Verify type to be used for this parameter (sl1, sl2, sl4, sl5, sl8, sl10, sl16, sl20). Maybe enum.
NR_UE_SLOT_PERIOD_OFFSET_t monitoringSlotPeriodicityAndOffset;
int monitoringSlotPeriodicityAndOffset_offset;
uint16_t monitoringSlotPeriodicityAndOffset_offset;
// duration is number of consecutive slots that a SearchSpace lasts in every occasion, i.e., upon every period as given in the periodicityAndOffset
// if the field is absent, the UE applies the value 1 slot
// the maximum valid duration is peridicity-1 (periodicity as given in the monitoringSlotPeriodicityAndOffset)
uint16_t duration;
// bit string size 14. Bitmap to indicate symbols within slot where PDCCH has to be monitored
// the MSB (left) bit represents first OFDM in slot
uint16_t monitoringSymbolWithinSlot;
@@ -825,11 +918,14 @@ typedef struct {
uint8_t dciFormat;
uint8_t agregationLevel;
#ifdef NR_PDCCH_DEFS_NR_UE
int nb_searchSpaces;
// CORESET structure, where maximum number of CORESETs to be handled is 3 (according to 38.331 V15.1.0)
NR_UE_PDCCH_CORESET coreset[NR_NBR_CORESET_ACT_BWP];
// SEARCHSPACE structure, where maximum number of SEARCHSPACEs to be handled is 10 (according to 38.331 V15.1.0)
// Each SearchSpace is associated with one ControlResourceSet
NR_UE_PDCCH_SEARCHSPACE searchSpace[NR_NBR_SEARCHSPACE_ACT_BWP];
uint32_t nb_search_space;
#endif
} NR_UE_PDCCH;
@@ -848,6 +944,11 @@ typedef struct {
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..287] (hard coded)
int32_t **dl_ch_estimates_ext;
uint8_t pbch_a[NR_POLAR_PBCH_PAYLOAD_BITS>>3];
uint8_t pbch_a_interleaved[NR_POLAR_PBCH_PAYLOAD_BITS>>3];
uint8_t pbch_a_prime[NR_POLAR_PBCH_PAYLOAD_BITS>>3];
uint8_t pbch_e[NR_POLAR_PBCH_E];
double demod_pbch_e[NR_POLAR_PBCH_E];
/// \brief Pointer to PBCH llrs.
/// - first index: ? [0..1919] (hard coded)
int8_t *llr;
@@ -919,9 +1020,9 @@ typedef struct {
/// \brief Total gains with bypassed RF gain stage (ExpressMIMO2/Lime)
uint32_t rx_gain_byp[4];
/// \brief Current transmit power
int16_t tx_power_dBm[10];
int16_t tx_power_dBm[MAX_NR_OF_SLOTS];
/// \brief Total number of REs in current transmission
int tx_total_RE[10];
int tx_total_RE[MAX_NR_OF_SLOTS];
/// \brief Maximum transmit power
int8_t tx_power_max_dBm;
/// \brief Number of eNB seen by UE
@@ -937,6 +1038,12 @@ typedef struct {
NR_DL_FRAME_PARMS frame_parms_before_ho;
NR_UE_COMMON common_vars;
nr_ue_if_module_t *if_inst;
nr_downlink_indication_t dl_indication;
nr_uplink_indication_t ul_indication;
fapi_nr_rx_indication_t rx_ind;
fapi_nr_dci_indication_t dci_ind;
// point to the current rxTx thread index
uint8_t current_thread_id[10];
@@ -986,7 +1093,7 @@ typedef struct {
uint32_t nr_gold_pdsch[2][20][2][21];
/// PDCCH DMRS
uint32_t nr_gold_pdcch[10][3][42];
uint32_t nr_gold_pdcch[7][20][3][52];
uint32_t X_u[64][839];
@@ -1093,6 +1200,22 @@ typedef struct {
PUCCH_CONFIG_DEDICATED pucch_config_dedicated[NUMBER_OF_CONNECTED_eNB_MAX];
//#if defined(UPGRADE_RAT_NR)
#if 1
SystemInformationBlockType1_nr_t systemInformationBlockType1_nr;
CellGroupConfig_t cell_group_config;
PDSCH_ServingCellConfig_t PDSCH_ServingCellConfig;
PDSCH_Config_t PDSCH_Config;
PUCCH_ConfigCommon_nr_t pucch_config_common_nr[NUMBER_OF_CONNECTED_eNB_MAX];
PUCCH_Config_t pucch_config_dedicated_nr[NUMBER_OF_CONNECTED_eNB_MAX];
PUSCH_Config_t pusch_config;
#endif
uint8_t ncs_cell[20][7];
/// UL-POWER-Control
@@ -1111,6 +1234,12 @@ typedef struct {
/// Scheduling Request Config
SCHEDULING_REQUEST_CONFIG scheduling_request_config[NUMBER_OF_CONNECTED_eNB_MAX];
//#if defined(UPGRADE_RAT_NR)
#if 1
scheduling_request_config_t scheduling_request_config_nr[NUMBER_OF_CONNECTED_eNB_MAX];
#endif
/// Transmission mode per eNB
uint8_t transmission_mode[NUMBER_OF_CONNECTED_eNB_MAX];
openair1/PHY/defs_nr_common.h
+10 -3
View File
@@ -34,7 +34,7 @@
#define __PHY_DEFS_NR_COMMON__H__
#include "defs_common.h"
#include "nfapi_interface.h"
#include "nfapi_nr_interface.h"
#include "impl_defs_nr.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
@@ -54,8 +54,8 @@
#define NR_PSS_LENGTH 127
#define NR_SSS_LENGTH 127
#define NR_PBCH_DMRS_LENGTH 144
#define NR_PBCH_DMRS_LENGTH_DWORD 5 // roundup(NR_PBCH_DMRS_LENGTH/32)
#define NR_PBCH_DMRS_LENGTH 144 // in mod symbols
#define NR_PBCH_DMRS_LENGTH_DWORD 10 // roundup(2(QPSK)*NR_PBCH_DMRS_LENGTH/32)
#define NR_MAX_NUM_BWP 4
@@ -76,6 +76,11 @@ typedef enum{
nr_ssb_type_E
} nr_ssb_type_e;
typedef enum {
nr_FR1 = 0,
nr_FR2
} nr_frequency_range_e;
typedef struct NR_BWP_PARMS {
/// Associated numerology index
uint8_t numerology_index;
@@ -88,6 +93,8 @@ typedef struct NR_BWP_PARMS {
} NR_BWP_PARMS;
typedef struct NR_DL_FRAME_PARMS {
/// frequency range
nr_frequency_range_e freq_range;
/// Number of resource blocks (RB) in DL
uint8_t N_RB_DL;
/// Number of resource blocks (RB) in UL
openair1/PHY/impl_defs_lte.h
+1291
View File
File diff suppressed because it is too large Load Diff
openair1/PHY/impl_defs_nr.h
+541 -32
View File
@@ -34,6 +34,7 @@
#ifndef PHY_IMPL_DEFS_NR_H
#define PHY_IMPL_DEFS_NR_H
#include <stdbool.h>
#include "types.h"
#ifdef DEFINE_VARIABLES_PHY_IMPLEMENTATION_DEFS_NR_H
@@ -65,6 +66,46 @@ EXTERN const uint8_t N_slot_subframe[MU_NUMBER]
#endif
;
//#define RX_NB_TH_MAX 3
//#define RX_NB_TH 3
#if 0
#define LTE_SLOTS_PER_SUBFRAME (2)
#define LTE_NUMBER_OF_SUBFRAMES_PER_FRAME (10)
#define LTE_SLOTS_PER_FRAME (20)
#define LTE_CE_FILTER_LENGTH (5)
#define LTE_CE_OFFSET (LTE_CE_FILTER_LENGTH)
#define TX_RX_SWITCH_SYMBOL (NUMBER_OF_SYMBOLS_PER_FRAME>>1)
#define PBCH_PDU_SIZE (3) //bytes
#define PRACH_SYMBOL (3) //position of the UL PSS wrt 2nd slot of special subframe
#define NUMBER_OF_FREQUENCY_GROUPS (lte_frame_parms->N_RB_DL)
#define SSS_AMP (1148)
#define MAX_NUM_PHICH_GROUPS (56) //110 RBs Ng=2, p.60 36-212, Sec. 6.9
#define MAX_MBSFN_AREA (8)
#endif
#define NB_DL_DATA_TO_UL_ACK (8) /* size of table TS 38.213 Table 9.2.3-1 */
/***********************************************************************
*
* FUNCTIONALITY : System information type 1
*
* DESCRIPTION : parameters provided by system information 1
*
************************************************************************/
typedef struct {
int N_BWP_SIZE; /* size of bandwidth part */
}
SystemInformationBlockType1_nr_t;
/***********************************************************************
*
* FUNCTIONALITY : Time Division Duplex
@@ -73,12 +114,15 @@ EXTERN const uint8_t N_slot_subframe[MU_NUMBER]
*
************************************************************************/
#define MAX_NR_OF_SLOTS (320) /* maximum number of slots for tdd configuration which is periodic */
#define MAX_NR_OF_SLOTS (320) /* maximum number of slots */
#define NR_TDD_DOWNLINK_SLOT (0x0000)
#define NR_TDD_UPLINK_SLOT (0x3FFF) /* uplink bitmap for each symbol, there are 14 symbols per slots */
#define NR_TDD_SET_ALL_SYMBOLS (0x3FFF)
#define NR_DOWNLINK_SLOT (0x01)
#define NR_UPLINK_SLOT (0x02)
#define FRAME_DURATION_MICRO_SEC (10000) /* frame duration in microsecond */
typedef enum {
@@ -177,23 +221,23 @@ typedef enum {
} resourceType_t;
typedef enum {
sl1 = 0,
sl2 = 1,
sl4 = 2,
sl5 = 3,
sl8 = 4,
sl10 = 5,
sl16 = 6,
sl20 = 7,
sl32 = 8,
sl40 = 9,
sl64 = 10,
sl80 = 11,
sl160 = 12,
sl320 = 13,
sl640 = 14,
sl1280 = 15,
sl2560 = 16
srs_sl1 = 0,
srs_sl2 = 1,
srs_sl4 = 2,
srs_sl5 = 3,
srs_sl8 = 4,
srs_sl10 = 5,
srs_sl16 = 6,
srs_sl20 = 7,
srs_sl32 = 8,
srs_sl40 = 9,
srs_sl64 = 10,
srs_sl80 = 11,
srs_sl160 = 12,
srs_sl320 = 13,
srs_sl640 = 14,
srs_sl1280 = 15,
srs_sl2560 = 16
} SRS_Periodicity_t;
#define NB_SRS_PERIOD (17)
@@ -318,27 +362,492 @@ typedef struct {
SRS_ResourceSet_t *p_SRS_ResourceSetList[MAX_NR_OF_SRS_RESOURCE_SET]; /* ue implementation specific */
} SRS_NR;
//#define RX_NB_TH_MAX 3
//#define RX_NB_TH 3
/***********************************************************************
*
* FUNCTIONALITY : Packed Downlink Shared Channel PDSCH
*
* DESCRIPTION : interface description for PSCH configuration
*
************************************************************************/
#define LTE_SLOTS_PER_SUBFRAME 2
/* FFS TODO_NR partial structure that should be complete */
#define LTE_NUMBER_OF_SUBFRAMES_PER_FRAME 10
#define LTE_SLOTS_PER_FRAME 20
#define LTE_CE_FILTER_LENGTH 5
#define LTE_CE_OFFSET LTE_CE_FILTER_LENGTH
#define TX_RX_SWITCH_SYMBOL (NUMBER_OF_SYMBOLS_PER_FRAME>>1)
#define PBCH_PDU_SIZE 3 //bytes
typedef enum {
nb_code_n1 = 1,
nb_code_n2 = 2
} maxNrofCodeWordsScheduledByDCI_t;
#define PRACH_SYMBOL 3 //position of the UL PSS wrt 2nd slot of special subframe
typedef struct {
/*
Maximum number of code words that a single DCI may schedule. This changes the number of MCS/RV/NDI bits in the DCI message from 1 to 2.
*/
maxNrofCodeWordsScheduledByDCI_t maxNrofCodeWordsScheduledByDCI;
#define NUMBER_OF_FREQUENCY_GROUPS (lte_frame_parms->N_RB_DL)
} PDSCH_Config_t;
#define SSS_AMP 1148
/***********************************************************************
*
* FUNCTIONALITY : Packed Uplink Shared Channel
*
* DESCRIPTION : configuration for PUSCH
*
************************************************************************/
#define MAX_NUM_PHICH_GROUPS 56 //110 RBs Ng=2, p.60 36-212, Sec. 6.9
#define MAX_NR_OF_UL_ALLOCATIONS (16)
#define MAX_MBSFN_AREA 8
typedef enum {
enable_tpc_accumulation = 0, /* by default it is enable */
disable_tpc_accumulation = 1
} tpc_Accumulation_t;
typedef enum {
typeA = 0,
typeB = 1
} mappingType_t;
typedef struct {
tpc_Accumulation_t tpc_Accumulation;
} PUSCH_PowerControl_t;
typedef struct {
uint8_t k2;
mappingType_t mappingType;
uint8_t startSymbolAndLength;
} PUSCH_TimeDomainResourceAllocation_t;
typedef struct {
PUSCH_PowerControl_t pusch_PowerControl;
PUSCH_TimeDomainResourceAllocation_t *pusch_TimeDomainResourceAllocation[MAX_NR_OF_UL_ALLOCATIONS];
} PUSCH_Config_t;
/***********************************************************************
*
* FUNCTIONALITY : Pucch Power Control
*
* DESCRIPTION : configuration for pucch power control
*
************************************************************************/
#define MAX_NR_OF_PUCCH_P0_PER_SET (8)
#define NUMBER_PUCCH_FORMAT_NR (5)
typedef int8_t power_level_t; /* INTEGER (-16..15) */
typedef struct {
uint8_t p0_PUCCH_Id; /* INTEGER (1..8) */
power_level_t p0_PUCCH_Value;
} P0_PUCCH_t;
typedef struct {
power_level_t deltaF_PUCCH_f[NUMBER_PUCCH_FORMAT_NR];
P0_PUCCH_t *p0_Set[MAX_NR_OF_PUCCH_P0_PER_SET];
// pathlossReferenceRSs SEQUENCE (SIZE (1..maxNrofPUCCH-PathlossReferenceRSs)) OF PUCCH-PathlossReferenceRS OPTIONAL, -- Need M
int8_t twoPUCCH_PC_AdjustmentStates;
} PUCCH_PowerControl_t;
/***********************************************************************
*
* FUNCTIONALITY : Packed Uplink Control Channel aka PUCCH
*
* DESCRIPTION : interface description for managing PUCCH
* There are two main configurations:
* - a first one in SIB1 which gives configuration (common) for initial access
* - a second one which is send by network for dedicated mode
*
************************************************************************/
typedef enum {
neither = 0,
enable = 1,
disable = 2,
} pucch_GroupHopping_t;
typedef struct {
/*
PUCCH-ConfigCommon ::= SEQUENCE {
-- An entry into a 16-row table where each row configures a set of cell-specific PUCCH resources/parameters. The UE uses
-- those PUCCH resources during initial access on the initial uplink BWP. Once the network provides a dedicated PUCCH-Config
-- for that bandwidth part the UE applies that one instead of the one provided in this field.
-- Corresponds to L1 parameter 'PUCCH-resource-common' (see 38.213, section 9.2)
pucch-ResourceCommon BIT STRING (SIZE (4)) OPTIONAL, -- Need R
*/
uint16_t pucch_ResourceCommon;
/*
-- Configuration of group- and sequence hopping for all the PUCCH formats 0, 1, 3 and 4. "neither" implies neither group
-- or sequence hopping is enabled. "enable" enables group hopping and disables sequence hopping. "disable"” disables group
-- hopping and enables sequence hopping. Corresponds to L1 parameter 'PUCCH-GroupHopping' (see 38.211, section 6.4.1.3)
pucch-GroupHopping ENUMERATED { neither, enable, disable },
*/
pucch_GroupHopping_t pucch_GroupHopping;
/*
-- Cell-Specific scrambling ID for group hoppping and sequence hopping if enabled.
-- Corresponds to L1 parameter 'HoppingID' (see 38.211, section 6.3.2.2)
hoppingId BIT STRING (SIZE (10)) OPTIONAL, -- Need R
*/
uint16_t hoppingId;
/*
-- Power control parameter P0 for PUCCH transmissions. Value in dBm. Only even values (step size 2) allowed.
-- Corresponds to L1 parameter 'p0-nominal-pucch' (see 38.213, section 7.2)
p0-nominal INTEGER (-202..24) OPTIONAL, -- Need R
*/
int8_t p0_nominal;
} PUCCH_ConfigCommon_nr_t;
#define MAX_NB_OF_PUCCH_RESOURCE_SETS (4)
#define MAX_NB_OF_PUCCH_RESOURCES_PER_SET (32)
#define MAX_NB_OF_PUCCH_RESOURCES_PER_SET_NOT_0 (8)
#define MAX_NB_OF_PUCCH_RESOURCES (128)
#define NB_INITIAL_PUCCH_RESOURCE (16)
#define MAX_PUCCH_RESOURCE_INDICATOR (8)
#define MAX_NB_CYCLIC_SHIFT (4)
#define MAX_NR_OF_SPATIAL_RELATION_INFOS (8)
typedef enum {
pucch_format0_nr = 0,
pucch_format1_nr = 1,
pucch_format2_nr = 2,
pucch_format3_nr = 3,
pucch_format4_nr = 4,
} pucch_format_nr_t;
typedef enum {
feature_disabled = 0,
feature_enabled = 1,
} feature_status_t;
typedef enum {
disable_feature = 0,
enable_feature = 1
} enable_feature_t;
typedef enum {
zeroDot08 = 0,
zeroDot15 = 1,
zeroDot25 = 2,
zeroDot35 = 3,
zeroDot45 = 4,
zeroDot60 = 5,
zeroDot80 = 6,
reserved = 7
} PUCCH_MaxCodeRate_t;
typedef struct {
pucch_format_nr_t format;
uint8_t startingSymbolIndex;
uint8_t nrofSymbols;
uint16_t PRB_offset;
uint8_t nb_CS_indexes;
uint8_t initial_CS_indexes[MAX_NB_CYCLIC_SHIFT];
} initial_pucch_resource_t;
const initial_pucch_resource_t initial_pucch_resource[NB_INITIAL_PUCCH_RESOURCE]; /* TS 36.213 Table 9.2.1-1: PUCCH resource sets before dedicated PUCCH resource configuration */
/* structure with all possible field for pucch format from 0 to 4 */
typedef struct {
pucch_format_nr_t format; /* format 0 1 2 3 4 */
uint8_t initialCyclicShift; /* x x */
uint8_t nrofSymbols; /* x x x x x */
uint8_t startingSymbolIndex; /* x x x x x */
uint8_t timeDomainOCC; /* x */
uint8_t nrofPRBs; /* x x */
uint8_t occ_length; /* x */
uint8_t occ_Index; /* x */
} PUCCH_format_t;
typedef struct {
uint8_t pucch_ResourceId; /* maxNrofPUCCH-Resources = 128 */
uint16_t startingPRB; /* maxNrofPhysicalResourceBlocks = 275 */
feature_status_t intraSlotFrequencyHopping;
uint16_t secondHopPRB;
PUCCH_format_t format_parameters;
} PUCCH_Resource_t;
typedef struct {
uint8_t pucch_ResourceSetId; /* maxNrofPUCCH-ResourceSets = 4 */
/*
-- PUCCH resources of format0 and format1 are only allowed in the first PUCCH reosurce set,
-- i.e., in a PUCCH-ResourceSet with pucch-ResourceSetId = 0. This set may contain between 8 and 32 resources.
-- PUCCH resources of format2, format3 and format4 are only allowed in a PUCCH-ReosurceSet with pucch-ResourceSetId > 0. If present, these sets must contain 8 resources each.
-- The UE chooses a PUCCH-Resource from this list based on the 3-bit PUCCH resource indicator field in DCI as
-- speciied in 38.213, FFS_section.
-- Note that this list contains only a list of resource IDs. The actual resources are configured in PUCCH-Config.
*/
uint8_t pucch_resource_id[MAX_NB_OF_PUCCH_RESOURCES_PER_SET]; /* pucch resources belonging to current set is a 32 bit map to address maxNrofPUCCH-ResourcesPerSet = 32 resources */
uint8_t first_resources_set_R_PUCCH; /* size of first resource set which can be higher than 8 */
/*
-- Maximum number of payload bits minus 1 that the UE may transmit using this PUCCH resource set. In a PUCCH occurrence, the UE
-- chooses the first of its PUCCH-ResourceSet which supports the number of bits that the UE wants to transmit.
-- The field is not present in the first set (Set0) since the maximum Size of Set0 is specified to be 3 bit.
-- The field is not present in the last configured set since the UE derives its maximum payload size as specified in 38.213.
-- This field can take integer values that are multiples of 4. Corresponds to L1 parameter 'N_2' or 'N_3' (see 38.213, section 9.2)
*/
uint16_t maxPayloadMinus1; /* INTEGER (4..256) */
} PUCCH_ResourceSet_t;
typedef struct {
/*
-- Enabling inter-slot frequency hopping when PUCCH Format 1, 3 or 4 is repeated over multiple slots.
-- The field is not applicable for format 2.
*/
feature_status_t interslotFrequencyHopping;
/*
-- Enabling 2 DMRS symbols per hop of a PUCCH Format 3 or 4 if both hops are more than X symbols when FH is enabled (X=4).
-- Enabling 4 DMRS sybmols for a PUCCH Format 3 or 4 with more than 2X+1 symbols when FH is disabled (X=4).
-- Corresponds to L1 parameter 'PUCCH-F3-F4-additional-DMRS' (see 38.213, section 9.2.1)
-- The field is not applicable for format 1 and 2.
*/
enable_feature_t additionalDMRS;
/*
-- Max coding rate to determine how to feedback UCI on PUCCH for format 2, 3 or 4
-- Corresponds to L1 parameter 'PUCCH-F2-maximum-coderate', 'PUCCH-F3-maximum-coderate' and 'PUCCH-F4-maximum-coderate'
-- (see 38.213, section 9.2.5)
-- The field is not applicable for format 1.
*/
PUCCH_MaxCodeRate_t maxCodeRate;
/*
-- Number of slots with the same PUCCH F1, F3 or F4. When the field is absent the UE applies the value n1.
-- Corresponds to L1 parameter 'PUCCH-F1-number-of-slots', 'PUCCH-F3-number-of-slots' and 'PUCCH-F4-number-of-slots'
-- (see 38.213, section 9.2.6)
-- The field is not applicable for format 2.
*/
uint8_t nrofSlots;
/*
-- Enabling pi/2 BPSK for UCI symbols instead of QPSK for PUCCH.
-- Corresponds to L1 parameter 'PUCCH-PF3-PF4-pi/2PBSK' (see 38.213, section 9.2.5)
-- The field is not applicable for format 1 and 2.
*/
feature_status_t pi2PBSK;
/*
-- Enabling simultaneous transmission of CSI and HARQ-ACK feedback with or without SR with PUCCH Format 2, 3 or 4
-- Corresponds to L1 parameter 'PUCCH-F2-Simultaneous-HARQ-ACK-CSI', 'PUCCH-F3-Simultaneous-HARQ-ACK-CSI' and
-- 'PUCCH-F4-Simultaneous-HARQ-ACK-CSI' (see 38.213, section 9.2.5)
-- When the field is absent the UE applies the value OFF
-- The field is not applicable for format 1.
*/
enable_feature_t simultaneousHARQ_ACK_CSI;
} PUCCH_FormatConfig_t;
typedef struct {
PUCCH_Resource_t *PUCCH_Resource[MAX_NB_OF_PUCCH_RESOURCES];
PUCCH_ResourceSet_t *PUCCH_ResourceSet[MAX_NB_OF_PUCCH_RESOURCE_SETS];
PUCCH_FormatConfig_t *formatConfig[NUMBER_PUCCH_FORMAT_NR-1]; /* format 0 is not there */
uint8_t dl_DataToUL_ACK[NB_DL_DATA_TO_UL_ACK]; /* table TS 38.213 Table 9.2.3-1: Mapping of PSDCH-to-HARQ_feedback timing indicator field values to numbers of slots */
void *spatial_Relation_Info[MAX_NR_OF_SPATIAL_RELATION_INFOS];
PUCCH_PowerControl_t pucch_PowerControl;
} PUCCH_Config_t;
/***********************************************************************
*
* FUNCTIONALITY : PhysicalCellGroupConfig
*
* DESCRIPTION : Physical cell group configuration
*
************************************************************************/
typedef uint16_t RNTI_value_t;
typedef enum {
semiStatic = 0,
dynamic = 1
} pdsch_HARQ_ACK_Codebook_t;
typedef struct {
/*
-- Enables spatial bundling of HARQ ACKs. It is configured per cell group (i.e. for all the cells within the cell group) for PUCCH
-- reporting of HARQ-ACK. It is only applicable when more than 4 layers are possible to schedule.
-- Corresponds to L1 parameter 'HARQ-ACK-spatial-bundling' (see 38.213, section FFS_Section)
-- Absence indicates that spatial bundling is disabled.
*/
bool harq_ACK_SpatialBundlingPUCCH;
/*
-- Enables spatial bundling of HARQ ACKs. It is configured per cell group (i.e. for all the cells within the cell group) for PUSCH
-- reporting of HARQ-ACK. It is only applicable when more than 4 layers are possible to schedule.
-- Corresponds to L1 parameter 'HARQ-ACK-spatial-bundling' (see 38.213, section FFS_Section)
-- Absence indicates that spatial bundling is disabled.
*/
bool harq_ACK_SpatialBundlingPUSCH;
/*
-- The maximum transmit power to be used by the UE in this NR cell group.
*/
uint8_t p_NR;
/*
-- The PDSCH HARQ-ACK codebook is either semi-static of dynamic. This is applicable to both CA and none CA operation.
-- Corresponds to L1 parameter 'HARQ-ACK-codebook' (see 38.213, section FFS_Section)
*/
pdsch_HARQ_ACK_Codebook_t pdsch_HARQ_ACK_Codebook;
/*
-- RNTI used for SRS TPC commands on DCI. Corresponds to L1 parameter 'TPC-SRS-RNTI' (see 38.213, section 10)
*/
RNTI_value_t tpc_SRS_RNTI;
/*
-- RNTI used for PUCCH TPC commands on DCI. Corresponds to L1 parameter 'TPC-PUCCH-RNTI' (see 38.213, section 10).
*/
RNTI_value_t tpc_PUCCH_RNTI;
/*
-- RNTI used for PUSCH TPC commands on DCI. Corresponds to L1 parameter 'TPC-PUSCH-RNTI' (see 38.213, section 10)
*/
RNTI_value_t tpc_PUSCH_RNTI;
} PhysicalCellGroupConfig_t;
/***********************************************************************
*
* FUNCTIONALITY : CellGroupConfig
*
* DESCRIPTION : Cell Group configuration
*
************************************************************************/
/* FFS TODO_NR partial structure that should be complete */
typedef struct {
/*
cellGroupId CellGroupId,
-- Logical Channel configuration and association with radio bearers:
rlc-BearerToAddModList SEQUENCE (SIZE(1..maxLC-ID)) OF RLC-Bearer-Config OPTIONAL, -- Need N
rlc-BearerToReleaseList SEQUENCE (SIZE(1..maxLC-ID)) OF LogicalChannelIdentity OPTIONAL, -- Need N
-- Parameters applicable for the entire cell group:
mac-CellGroupConfig MAC-CellGroupConfig OPTIONAL, -- Need M
*/
PhysicalCellGroupConfig_t physicalCellGroupConfig;
/*
-- Serving Cell specific parameters (SpCell and SCells)
spCellConfig SpCellConfig OPTIONAL, -- Need M
sCellToAddModList SEQUENCE (SIZE (1..maxNrofSCells)) OF SCellConfig OPTIONAL, -- Need N
-- List of seconary serving cells to be released (not applicable for SpCells)
sCellToReleaseList SEQUENCE (SIZE (1..maxNrofSCells)) OF SCellIndex OPTIONAL, -- Need N
...
*/
} CellGroupConfig_t;
/***********************************************************************
*
* FUNCTIONALITY : PDSCH_ServingCellConfig
*
* DESCRIPTION : pdsch serving cell configuration
*
************************************************************************/
/* FFS TODO_NR partial structure that should be complete */
typedef int PDSCH_CodeBlockGroupTransmission_t; /* dummy struct which should be change by correct structure */
typedef enum {
xOh6 = 0,
xOh12 = 1,
xOh18 = 2
} xOverhead_t;
typedef enum {
n2_dl_harq = 2,
n4_dl_harq = 4,
n6_dl_harq = 6,
n10_dl_harq = 10,
n12_dl_harq = 12,
n16_dl_harq = 16
} nrofHARQ_ProcessesForPDSCH_t;
typedef struct {
/*
-- Enables and configures code-block-group (CBG) based transmission (see 38.213, section 9.1.1)
*/
PDSCH_CodeBlockGroupTransmission_t *codeBlockGroupTransmission;
/*
-- Accounts for overhead from CSI-RS, CORESET, etc. If the field is absent, the UE applies value xOh0.
-- Corresponds to L1 parameter 'Xoh-PDSCH' (see 38.214, section 5.1.3.2)
*/
xOverhead_t xOverhead;
/*
-- The number of HARQ processes to be used on the PDSCH of a serving cell. n2 corresponds to 2 HARQ processes, n4 to 4 HARQ processes
-- and so on. If the field is absent, the UE uses 8 HARQ processes.
-- Corresponds to L1 parameter 'number-HARQ-process-PDSCH' (see 38.214, section REF)
*/
nrofHARQ_ProcessesForPDSCH_t nrofHARQ_ProcessesForPDSCH;
/*
-- The ID of the serving cell (of the same cell group) to use for PUCCH.
-- If the field is absent, the UE sends the HARQ feedback on the PUCCH of the SpCell of this cell group.
*/
uint8_t pucch_Cell;
} PDSCH_ServingCellConfig_t;
/***********************************************************************
*
* FUNCTIONALITY : Scheduling Request Configuration (SR)
*
* DESCRIPTION : Configuration for Scheduling Request send on PUCCH
* In the case that scheduling should be send alone
* in a PUCCH, it should used its configuration.
*
************************************************************************/
#define MAX_NR_OF_SR_CONFIG_PER_CELL_GROUP (8)
#define NB_SR_PERIOD (15)
const uint16_t scheduling_request_periodicity[NB_SR_PERIOD]
#ifdef INIT_VARIABLES_PHY_IMPLEMENTATION_DEFS_NR_H
= { 0, 0, 1, 2, 4, 5, 8, 10, 16, 20, 40, 80, 160, 320, 640 }
#endif
;
typedef enum {
sr_sym2 = 0,
sr_sym6or7 = 1,
sr_sl1 = 2,
sr_sl2 = 3,
sr_sl4 = 4,
sr_sl5 = 5,
sr_sl8 = 6,
sr_sl10 = 7,
sr_sl16 = 8,
sr_sl20 = 9,
sr_sl40 = 10,
sr_sl80 = 11,
sr_sl160 = 12,
sr_sl320 = 13,
sr_sl640 = 14
} sr_periodicity_t;
typedef struct {
uint8_t schedulingRequestResourceId;
/*
-- The ID of the SchedulingRequestConfig that uses this scheduling request resource.
*/
uint8_t schedulingRequestID;
/*
-- SR periodicity and offset in number of slots. Corresponds to L1 parameter 'SR-periodicity' and 'SR-offset' (see 38.213, section 9.2.2)
-- The following periodicities may be configured depending on the chosen subcarrier spacing:
-- SCS = 15 kHz: 2sym, 7sym, 1sl, 2sl, 4sl, 5sl, 8sl, 10sl, 16sl, 20sl, 40sl, 80sl
-- SCS = 30 kHz: 2sym, 7sym, 1sl, 2sl, 4sl, 8sl, 10sl, 16sl, 20sl, 40sl, 80sl, 160sl
-- SCS = 60 kHz: 2sym, 7sym/6sym, 1sl, 2sl, 4sl, 8sl, 16sl, 20sl, 40sl, 80sl, 160sl, 320sl
-- SCS = 120 kHz: 2sym, 7sym, 1sl, 2sl, 4sl, 8sl, 16sl, 40sl, 80sl, 160sl, 320sl, sl640
-- sym6or7 corresponds to 6 symbols if extended cyclic prefix and a SCS of 60 kHz are configured, otherwise it corresponds to 7 symbols.
-- For periodicities sym2, sym7 and sl1 the UE assumes an offset of 0 slots.
*/
sr_periodicity_t periodicity;
uint16_t offset;
/*
-- ID of the PUCCH resource in which the UE shall send the scheduling request. The
-- actual PUCCH-Resource is configured in PUCCH-Config of the same UL BWP and serving cell as this SchedulingRequestResourceConfig.
-- The network configures a PUCCH-Resource of PUCCH-format0 or PUCCH-format1
-- (other formats not supported). Corresponds to L1 parameter 'SR-resource' (see 38.213, section 9.2.2)
*/
uint8_t resource;
} SchedulingRequestResourceConfig_t;
typedef struct {
int active_sr_id;
SchedulingRequestResourceConfig_t *sr_ResourceConfig[MAX_NR_OF_SR_CONFIG_PER_CELL_GROUP];
} scheduling_request_config_t;
#undef EXTERN
#undef INIT_VARIABLES_PHY_IMPLEMENTATION_DEFS_NR_H
openair1/PHY/impl_defs_top.h
+15
View File
@@ -256,6 +256,21 @@
/// Threshold for PUCCH Format 1a/1b detection
#define PUCCH1a_THRES 4
//#if defined(UPGRADE_RAT_NR)
#if 1
#define NB_NUMEROLOGIES_NR (5)
#define TDD_CONFIG_NB_FRAMES (2)
#define NR_MAX_SLOTS_PAR_FRAME (160) /* number of slots per frame */
#define NR_UE_CAPABILITY_SLOT_RX_TO_TX (4) /* FFS_NR_TODO it defines ue capability which is the number of slots */
/* - between reception of pdsch and tarnsmission of its acknowlegment */
/* - between reception of un uplink grant and its related transmission */
#define NR_MAX_HARQ_PROCESSES (16)
#define NR_MAX_ULSCH_HARQ_PROCESSES (NR_MAX_HARQ_PROCESSES) /* cf 38.214 6.1 UE procedure for receiving the physical uplink shared channel */
#define NR_MAX_DLSCH_HARQ_PROCESSES (NR_MAX_HARQ_PROCESSES) /* cf 38.214 5.1 UE procedure for receiving the physical downlink shared channel */
#endif
/// Data structure for transmission.
typedef struct {
/// RAW TX sample buffer
openair1/PHY/phy_extern_nr_ue.h
+1 -1
View File
@@ -23,7 +23,7 @@
#define __PHY_EXTERN_UE__H__
#include "PHY/defs_nr_UE.h"
#include "common/ran_context.h"
//#include "common/ran_context.h"
extern char* namepointer_chMag ;
extern char* namepointer_log2;
openair1/PHY/phy_vars_nr_ue.h
+1 -2
View File
@@ -24,7 +24,6 @@
#include "PHY/types.h"
#include "PHY/defs_nr_UE.h"
#include "PHY/phy_vars_nr_ue.h"
#include "common/ran_context.h"
@@ -45,7 +44,7 @@ int16_t *primary_synch2_time;
#ifndef OCP_FRAMEWORK
PHY_VARS_NR_UE ***PHY_vars_UE_g;
PHY_VARS_eNB ***PHY_vars_eNB_g;
LTE_DL_FRAME_PARMS *lte_frame_parms_g;
NR_DL_FRAME_PARMS *lte_frame_parms_g;
#else
PHY_VARS_NR_UE * PHY_vars_UE_g[MAX_UE][MAX_NUM_CCs]={NULL};
openair1/SCHED_NR/fapi_nr_l1.c
+114
View File
@@ -0,0 +1,114 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file fapi_l1.c
* \brief functions for FAPI L1 interface
* \author R. Knopp
* \date 2017
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr
* \note
* \warning
*/
#include "fapi_nr_l1.h"
int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req);
int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req);
extern uint8_t nfapi_mode;
void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
gNB_rxtx_proc_t *proc,
nfapi_nr_dl_config_request_pdu_t *dl_config_pdu,
uint8_t *sdu)
{
AssertFatal(dl_config_pdu->bch_pdu_rel15.length == 3, "BCH PDU has length %d != 3\n",
dl_config_pdu->bch_pdu_rel15.length);
LOG_I(PHY,"pbch_pdu[0]: %x,pbch_pdu[1]: %x,gNB->pbch_pdu[2]: %x\n",sdu[0],sdu[1],sdu[2]);
gNB->pbch_pdu[0] = sdu[2];
gNB->pbch_pdu[1] = sdu[1];
gNB->pbch_pdu[2] = sdu[0];
// adjust transmit amplitude here based on NFAPI info
}
void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
PHY_VARS_gNB *gNB;
gNB_rxtx_proc_t *proc;
// copy data from L2 interface into L1 structures
module_id_t Mod_id = Sched_INFO->module_id;
uint8_t CC_id = Sched_INFO->CC_id;
nfapi_nr_dl_config_request_t *DL_req = Sched_INFO->DL_req;
nfapi_tx_request_t *TX_req = Sched_INFO->TX_req;
frame_t frame = Sched_INFO->frame;
sub_frame_t subframe = Sched_INFO->subframe;
AssertFatal(RC.gNB!=NULL,"RC.gNB is null\n");
AssertFatal(RC.gNB[Mod_id]!=NULL,"RC.gNB[%d] is null\n",Mod_id);
AssertFatal(RC.gNB[Mod_id][CC_id]!=NULL,"RC.gNB[%d][%d] is null\n",Mod_id,CC_id);
gNB = RC.gNB[Mod_id][CC_id];
proc = &gNB->proc.proc_rxtx[0];
uint8_t number_dl_pdu = DL_req->dl_config_request_body.number_pdu;
nfapi_nr_dl_config_request_pdu_t *dl_config_pdu;
int i;
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SF:%04d%d DL_req:SFN/SF:%04d%d:dl_pdu:%d tx_req:SFN/SF:%04d%d:pdus:%d \n",
frame,subframe,
NFAPI_SFNSF2SFN(DL_req->sfn_sf),NFAPI_SFNSF2SF(DL_req->sfn_sf),number_dl_pdu,
NFAPI_SFNSF2SFN(TX_req->sfn_sf),NFAPI_SFNSF2SF(TX_req->sfn_sf),TX_req->tx_request_body.number_of_pdus);
int do_oai =0;
int dont_send =0;
for (i=0;i<number_dl_pdu;i++) {
dl_config_pdu = &DL_req->dl_config_request_body.dl_config_pdu_list[i];
//LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_config_pdu->pdu_type);
switch (dl_config_pdu->pdu_type) {
case NFAPI_NR_DL_CONFIG_BCH_PDU_TYPE:
AssertFatal(dl_config_pdu->bch_pdu_rel15.pdu_index < TX_req->tx_request_body.number_of_pdus,
"bch_pdu_rel8.pdu_index>=TX_req->number_of_pdus (%d>%d)\n",
dl_config_pdu->bch_pdu_rel15.pdu_index,
TX_req->tx_request_body.number_of_pdus);
gNB->pbch_configured=1;
do_oai=1;
handle_nr_nfapi_bch_pdu(gNB,
proc,
dl_config_pdu,
TX_req->tx_request_body.tx_pdu_list[dl_config_pdu->bch_pdu_rel15.pdu_index].segments[0].segment_data);
break;
}
}
if (nfapi_mode && do_oai && !dont_send) {
oai_nfapi_tx_req(Sched_INFO->TX_req);
oai_nfapi_nr_dl_config_req(Sched_INFO->DL_req); // DJP - .dl_config_request_body.dl_config_pdu_list[0]); // DJP - FIXME TODO - yuk - only copes with 1 pdu
}
}
openair2/LAYER2/NR_MAC_UE/vars.c → openair1/SCHED_NR/fapi_nr_l1.h
+18 -11
View File
@@ -19,16 +19,23 @@
* contact@openairinterface.org
*/
/*! \file vars.h
* \brief mac vars
* \author Navid Nikaein and Raymond Knopp
* \date 2010 - 2014
* \version 1.0
* \email navid.nikaein@eurecom.fr
* @ingroup _mac
*/
UE_MAC_INST_t UE_mac_inst; //[NB_MODULE_MAX];
/*! \file fapi_l1.h
* \brief function prototypes for FAPI L1 interface
* \author R. Knopp
* \date 2017
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr
* \note
* \warning
*/
#include "PHY/defs_gNB.h"
#include "PHY/phy_extern.h"
#include "PHY/LTE_TRANSPORT/transport_proto.h"
#include "SCHED/sched_eNB.h"
#include "SCHED/sched_common.h"
#include "SCHED_NR/sched_nr.h"
#include "nfapi_nr_interface.h"
void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO);
openair1/SCHED_NR/nr_ru_procedures.c
+3 -3
View File
@@ -86,7 +86,7 @@ void nr_feptx0(RU_t *ru,int slot) {
void nr_feptx_ofdm_2thread(RU_t *ru) {
NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms;
nfapi_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
RU_proc_t *proc = &ru->proc;
struct timespec wait;
int subframe = ru->proc.subframe_tx;
@@ -185,7 +185,7 @@ void nr_init_feptx_thread(RU_t *ru,pthread_attr_t *attr_feptx) {
void nr_feptx_ofdm(RU_t *ru) {
NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms;
nfapi_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
unsigned int aa,slot_offset, slot_offset_F;
int dummy_tx_b[7680*4] __attribute__((aligned(32)));
@@ -238,7 +238,7 @@ void nr_feptx_ofdm(RU_t *ru) {
}
// if S-subframe generate first slot only
if (nr_subframe_select(fp,subframe) == SF_S)
if (nr_subframe_select(cfg,subframe) == SF_S)
len = fp->samples_per_subframe / fp->slots_per_subframe;
else
len = fp->samples_per_subframe;
openair1/SCHED_NR/phy_procedures_nr_common.c
+1 -1
View File
@@ -34,7 +34,7 @@
#include "sched_nr.h"
nr_subframe_t nr_subframe_select(nfapi_config_request_t *cfg,unsigned char subframe)
nr_subframe_t nr_subframe_select(nfapi_nr_config_request_t *cfg,unsigned char subframe)
{
if (cfg->subframe_config.duplex_mode.value == FDD)
return(SF_DL);
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+7 -10
View File
@@ -76,7 +76,7 @@ int return_ssb_type(nfapi_config_request_t *cfg)
}*/
// First SSB starting symbol candidate is used and type B is chosen for 30kHz SCS
int nr_get_ssb_start_symbol(nfapi_config_request_t *cfg, NR_DL_FRAME_PARMS *fp)
int nr_get_ssb_start_symbol(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp)
{
int mu = cfg->subframe_config.numerology_index_mu.value;
int symbol = 0;
@@ -109,7 +109,7 @@ int nr_get_ssb_start_symbol(nfapi_config_request_t *cfg, NR_DL_FRAME_PARMS *fp)
return symbol;
}
void nr_set_ssb_first_subcarrier(nfapi_config_request_t *cfg, NR_DL_FRAME_PARMS *fp)
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp)
{
int start_rb = cfg->sch_config.n_ssb_crb.value / pow(2,cfg->subframe_config.numerology_index_mu.value);
fp->ssb_start_subcarrier = 12 * start_rb + cfg->sch_config.ssb_subcarrier_offset.value;
@@ -119,20 +119,17 @@ void nr_set_ssb_first_subcarrier(nfapi_config_request_t *cfg, NR_DL_FRAME_PARMS
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe) {
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_config_request_t *cfg = &gNB->gNB_config;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
int **txdataF = gNB->common_vars.txdataF;
uint8_t *pbch_pdu=&gNB->pbch_pdu[0];
int ss_subframe = (cfg->sch_config.half_frame_index.value)? 5 : 0;
int sfn = 10*frame + subframe;
int frame_mod8 = frame&7;
uint8_t Lmax, nushift, ssb_index=0, n_hf=0;
uint8_t Lmax, ssb_index=0, n_hf=0;
LOG_D(PHY,"common_signal_procedures: frame %d, subframe %d\n",frame,subframe);
int ssb_start_symbol = nr_get_ssb_start_symbol(cfg, fp);
nr_set_ssb_first_subcarrier(cfg, fp);
Lmax = (fp->dl_CarrierFreq < 3e9)? 4:8;
nushift = (Lmax < 8)? ssb_index&3 : ssb_index&7;
if (subframe == ss_subframe)
@@ -147,8 +144,8 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe) {
if (gNB->pbch_configured != 1)return;
gNB->pbch_configured = 0;
}*/
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],txdataF, AMP_OVER_2, ssb_start_symbol, nushift, cfg, fp);
nr_generate_pbch(&gNB->pbch, pbch_pdu, txdataF, AMP_OVER_2, ssb_start_symbol, nushift, sfn, n_hf, frame_mod8, cfg, fp);
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],txdataF, AMP_OVER_2, ssb_start_symbol, cfg, fp);
nr_generate_pbch(&gNB->pbch, pbch_pdu, txdataF, AMP_OVER_2, ssb_start_symbol, n_hf, Lmax, ssb_index, frame, cfg, fp);
}
}
@@ -162,7 +159,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
int subframe=proc->subframe_tx;
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_config_request_t *cfg = &gNB->gNB_config;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
int offset = gNB->CC_id;
openair1/SCHED_NR/sched_nr.h
+3 -2
View File
@@ -32,8 +32,9 @@
#include "PHY_INTERFACE/phy_interface.h"
#include "SCHED/sched_eNB.h"
lte_subframe_t nr_subframe_select (nfapi_config_request_t *cfg, unsigned char subframe);
void nr_set_ssb_first_subcarrier(nfapi_config_request_t *cfg, NR_DL_FRAME_PARMS *fp);
lte_subframe_t nr_subframe_select (nfapi_nr_config_request_t *cfg, unsigned char subframe);
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp);
void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, gNB_rxtx_proc_t *proc, int do_meas);
void nr_init_feptx_thread(RU_t *ru,pthread_attr_t *attr_feptx);
void nr_feptx_ofdm(RU_t *ru);
openair1/SCHED_NR_UE/defs.h
+5 -2
View File
@@ -123,7 +123,7 @@ void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param phy_vars_rn pointer to RN variables
*/
int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
int phy_procedures_slot_parallelization_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
#ifdef UE_SLOT_PARALLELISATION
@@ -219,6 +219,7 @@ void ra_failed(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
*/
void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
#if 0
/*! \brief Compute ACK/NACK information for PUSCH/PUCCH for UE transmission in subframe n. This function implements table 10.1-1 of 36.213, p. 69.
@param frame_parms Pointer to DL frame parameter descriptor
@param harq_ack Pointer to dlsch_ue harq_ack status descriptor
@@ -264,6 +265,7 @@ uint8_t nr_ul_ACK_subframe2_M(NR_DL_FRAME_PARMS *frame_parms,unsigned char subfr
@param eNB_id ID of eNB which is to receive the SR
@returns 1 if TXOp is active.
*/
#endif
uint8_t nr_is_SR_TXOp(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id);
/*! \brief Gives the UL subframe corresponding to a PDDCH order in subframe n
@@ -295,6 +297,7 @@ unsigned int get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb
void phy_reset_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
#if 0
/*! \brief This function retrives the resource (n1_pucch) corresponding to a PDSCH transmission in
subframe n-4 which is acknowledged in subframe n (for FDD) according to n1_pucch = Ncce + N1_pucch. For
TDD, this routine computes the complex procedure described in Section 10.1 of 36.213 (through tables 10.1-1,10.1-2)
@@ -313,7 +316,7 @@ uint16_t nr_get_n1_pucch(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t *b,
uint8_t SR);
#endif
/*! \brief This function retrieves the PHY UE mode. It is used as a helper function for the UE MAC.
@param Mod_id Local UE index on which to act
@param CC_id Component Carrier Index
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+153
View File
@@ -0,0 +1,153 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/* \file fapi_nr_ue_l1.c
* \brief functions for NR UE FAPI-like interface
* \author R. Knopp, K.H. HSU
* \date 2018
* \version 0.1
* \company Eurecom / NTUST
* \email: knopp@eurecom.fr, kai-hsiang.hsu@eurecom.fr
* \note
* \warning
*/
#include <stdio.h>
#include "fapi_nr_ue_interface.h"
#include "fapi_nr_ue_l1.h"
//#include "PHY/phy_vars_nr_ue.h"
#include "PHY/defs_nr_UE.h"
extern PHY_VARS_NR_UE ***PHY_vars_UE_g;
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
/// module id
module_id_t module_id = scheduled_response->module_id;
/// component carrier id
uint8_t cc_id = scheduled_response->CC_id;
uint32_t i;
if(scheduled_response != NULL){
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[0][0];
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
for(i=0; i<dl_config->number_pdus; ++i){
if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){
pdcch_vars2->nb_search_space = pdcch_vars2->nb_search_space + 1;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *dci_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
pdcch_vars2->searchSpace[i].monitoringSymbolWithinSlot = dci_config->monitoring_symbols_within_slot;
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel1 = dci_config->number_of_candidates[0];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel2 = dci_config->number_of_candidates[1];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel4 = dci_config->number_of_candidates[2];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel8 = dci_config->number_of_candidates[3];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel16 = dci_config->number_of_candidates[4];
pdcch_vars2->coreset[i].duration = dci_config->coreset.duration;
pdcch_vars2->coreset[i].frequencyDomainResources = dci_config->coreset.frequency_domain_resource;
pdcch_vars2->coreset[i].rb_offset = dci_config->coreset.rb_offset;
if(dci_config->coreset.cce_reg_mapping_type == CCE_REG_MAPPING_TYPE_INTERLEAVED){
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = dci_config->coreset.cce_reg_interleaved_shift_index;
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = dci_config->coreset.cce_reg_interleaved_reg_bundle_size;
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = dci_config->coreset.cce_reg_interleaved_interleaver_size;
}else{ //CCE_REG_MAPPING_TYPE_NON_INTERLEAVED
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = 0;
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = 0;
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = 0;
}
pdcch_vars2->coreset[i].precoderGranularity = dci_config->coreset.precoder_granularity;
//pdcch_vars2->coreset[i].tciStatesPDCCH;
//pdcch_vars2->coreset[i].tciPresentInDCI;
pdcch_vars2->coreset[i].pdcchDMRSScramblingID = dci_config->coreset.pdcch_dmrs_scrambling_id;
}else{ //FAPI_NR_DL_CONFIG_TYPE_DLSCH
// dlsch config pdu
}
}
}else{
pdcch_vars2->nb_search_space = 0;
}
if(scheduled_response->ul_config != NULL){
}else{
}
if(scheduled_response->tx_request != NULL){
}else{
}
}
return 0;
}
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
if(phy_config != NULL){
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
printf("[L1][IF module][PHY CONFIG]\n");
printf("subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common);
printf("ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset);
printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position);
printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1);
printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred);
printf("intra frequcney reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number);
printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index);
printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
printf("-------------------------------\n");
PHY_vars_UE_g[0][0]->proc.proc_rxtx[0].frame_rx = phy_config->config_req.pbch_config.system_frame_number;
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){
}
}
return 0;
}
openair1/SCHED_NR_UE/fapi_nr_ue_l1.h
Executable
+47
View File
@@ -0,0 +1,47 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/* \file fapi_nr_ue_l1.c
* \brief functions for FAPI L1 interface
* \author R. Knopp, K.H. HSU
* \date 2018
* \version 0.1
* \company Eurecom / NTUST
* \email: knopp@eurecom.fr, kai-hsiang.hsu@eurecom.fr
* \note
* \warning
*/
#ifndef __FAPI_NR_UE_L1_H__
#define __FAPI_NR_UE_L1_H__
#include "NR_IF_Module.h"
/**\brief NR UE FAPI-like P7 messages, scheduled response from L2 indicating L1
\param scheduled_response including transmission config(dl_config, ul_config) and data transmission (tx_req)*/
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response);
/**\brief NR UE FAPI-like P5 message, physical configuration from L2 to configure L1
\param scheduled_response including transmission config(dl_config, ul_config) and data transmission (tx_req)*/
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config);
#endif
openair1/SCHED_NR_UE/harq_nr.c
+456
View File
@@ -0,0 +1,456 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/**********************************************************************
*
* FILENAME : harq_nr.c
*
* MODULE : HARQ
*
* DESCRIPTION : functions related to HARQ feature (Hybrid Automatic Repeat Request Acknowledgment)
* This feature allows to acknowledge downlink and uplink transport blocks
* TS 38.214 5.1 UE procedure for transmitting the physical downlink shared channel
* TS 38.214 6.1 UE procedure for transmitting the physical uplink shared channel
* TS 38.214 6.1.2.1 Resource allocation in time domain
* TS 38.212 7.3 Downlink control information
* TS 38.213 9.2.3 UE procedure for reporting HARQ-ACK
* TS 38.321 5.4.1 UL Grant reception
* TS 38.321 5.4.2.1 HARQ Entity
*
* Downlink HARQ mechanism
* -----------------------
* A downlink DCI is received in a PDCCH.
* Then received parameters are communicated to HARQ entity (including NDI new data indicator and K which is the number of slots
* between current reception and transmission of this downlink acknowledgment.
*
* Reception on slot n transmission of acknowledgment
* slot k
* ---+---------------+---
* | |
* Frame | PUCCH / PUSCH |
* Subframe | |
* Slot n ---+------------+--+---
* ---+-------------+--- / |
* | PDCCH | / |
* | DCI | / |
* | downlink | +---------------+/ |
* | NDI--->------------->----------| downlink HARQ | |
* | k | | entity | |
* ---+-----|-------+--- +---------------+ |
* | | |
* v |/__________________________________________\|
* | \ slot between reception and transmission /|
* |________________________^
*
* Uplink HARQ mechanism
* ---------------------
* An uplink DCI is received in a PDCCH.
* Then received parameters are communicated to HARQ entity (including NDI new data indicator and K which is the number of slots
* between current reception and related PUSCH transmission).
* Uplink HARQ entity decides to transmit a new block or to retransmit current one.
* transmission/retransmission parameters should be determined based on received parameters.
*
* Reception on slot n Transmission on slot k
* slot k
* ---+---------------+---
* | PUSCH |
* Frame | Transmission |
* Subframe | Retransmission|
* Slot n ---+------------+--+---
* ---+-------------+--- / |
* | PDCCH | / |
* | DCI | / |
* | uplink | +-------------+/ |
* | NDI--->------------->----------->| uplink HARQ | |
* | k | | entity | |
* ---+-----|-------+--- +-------------+ |
* | | |
* v |/__________________________________________\|
* | \ slot between reception and transmission /|
* |________________________^
************************************************************************/
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
#include "SCHED_NR_UE/harq_nr.h"
/*******************************************************************
*
* NAME : config_uplink_harq_process
*
* PARAMETERS : pointer to ue context
* id of current gNB
* number of uplink processes
* maximum number of uplink retransmissions
* RETURN : none
*
* DESCRIPTION : configuration of uplink HARQ entity
*
*********************************************************************/
void config_uplink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, uint8_t number_harq_processes_pusch)
{
NR_UE_ULSCH_t *ulsch;
ulsch = (NR_UE_ULSCH_t *)malloc16(sizeof(NR_UE_ULSCH_t));
if (ulsch != NULL) {
memset(ulsch,0,sizeof(NR_UE_ULSCH_t));
ue->ulsch[gNB_id] = ulsch;
}
else {
LOG_E(PHY, "Fatal memory allocation problem at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
assert(0);
}
ulsch->number_harq_processes_for_pusch = number_harq_processes_pusch;
/* allocation of HARQ process context */
for (int harq_pid = 0; harq_pid < number_harq_processes_pusch; harq_pid++) {
ulsch->harq_processes[harq_pid] = (NR_UL_UE_HARQ_t *)malloc16(sizeof(NR_UL_UE_HARQ_t));
if (ulsch->harq_processes[harq_pid] == NULL) {
LOG_E(PHY, "Fatal memory allocation problem at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
assert(0);
}
ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 0;
ulsch->harq_processes[harq_pid]->first_tx = 1;
ulsch->harq_processes[harq_pid]->round = 0;
}
}
/*******************************************************************
*
* NAME : release_uplink_harq_process
*
* PARAMETERS : pointer to ue context
* id of current gNB
*
* RETURN : none
*
* DESCRIPTION : release of HARQ uplink entity
*
*********************************************************************/
void release_uplink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id)
{
NR_UE_ULSCH_t *ulsch = ue->ulsch[gNB_id];
for (int process_id = 0; process_id < ulsch->number_harq_processes_for_pusch; process_id++) {
free16(ulsch->harq_processes[process_id],sizeof(NR_UL_UE_HARQ_t));
ulsch->harq_processes[process_id] = NULL;
}
free16(ulsch, sizeof(NR_UE_ULSCH_t));
ue->ulsch[gNB_id] = NULL;
}
/*******************************************************************
*
* NAME : set_tx_harq_id
*
* PARAMETERS : ue context
* slot_tx slot for transmission
* gNB_id identifier
*
* RETURN : none
*
* DESCRIPTION : store tx harq process identifier for given transmission slot
*
*********************************************************************/
void set_tx_harq_id(PHY_VARS_NR_UE *ue, int gNB_id, int harq_pid, int slot_tx)
{
ue->ulsch[gNB_id]->harq_process_id[slot_tx] = harq_pid;
}
/*******************************************************************
*
* NAME : get_tx_harq_id
*
* PARAMETERS : ue context
* slot_tx slot for transmission
* gNB_id identifier
*
* RETURN : harq process identifier
*
* DESCRIPTION : return tx harq process identifier for given transmission slot
*
*********************************************************************/
int get_tx_harq_id(PHY_VARS_NR_UE *ue, int gNB_id, int slot_tx)
{
return (ue->ulsch[gNB_id]->harq_process_id[slot_tx]);
}
/*******************************************************************
*
* NAME : get_dci_slot_rx_to_tx
*
* PARAMETERS : dci index
*
* RETURN : number of slots
*
* DESCRIPTION : extract from DCI number of slots between current reception and its related transmission
*
*********************************************************************/
int get_dci_slot_rx_to_tx(int dci_index)
{
return (4);
}
/*******************************************************************
*
* NAME : uplink_harq_process
*
* PARAMETERS : ue context
* slot_tx slot for transmission
* gNB_id identifier
* ndi from DCI
* rnti_type from DCI
*
* RETURN : true it a new transmission
* false it is a retransmission
*
* DESCRIPTION : manage uplink grant information for transmissions/retransmissions
* TS 38.321 5.4.1 UL Grant reception
* TS 38.321 5.4.2.1 HARQ Entity
*
*********************************************************************/
harq_result_t uplink_harq_process(NR_UE_ULSCH_t *ulsch, int harq_pid, int ndi, nr_rnti_type_t rnti_type)
{
harq_result_t result_harq = RETRANSMISSION_HARQ;
if ((rnti_type != C_RNTI_NR) && (rnti_type != Temporary_C_RNTI_NR)) {
LOG_E(PHY, "Fatal error in HARQ entity due to unsupported RNTI at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
assert(0);
}
else if (harq_pid > ulsch->number_harq_processes_for_pusch) {
LOG_E(PHY, "Fatal error in HARQ entity due to unknown process identity %d at line %d in function %s of file %s \n", harq_pid, __LINE__ , __func__, __FILE__);
assert(0);
}
/* 38.321 5.4.2.1 2> if the uplink grant was received on PDCCH for the C-RNTI and the HARQ buffer of the identified process is empty */
if ((ulsch->harq_processes[harq_pid]->first_tx == 1) && (rnti_type == C_RNTI_NR)) { /* no transmission yet on this process so consider its harq buffer as empty */
ulsch->harq_processes[harq_pid]->first_tx = 0;
ulsch->harq_processes[harq_pid]->DCINdi = ndi; /* store first value of ndi */
ulsch->harq_processes[harq_pid]->round = 0;
ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
result_harq = NEW_TRANSMISSION_HARQ;
NR_TST_PHY_PRINTF("[HARQ-UL-PUSCH harqId : %d] first new transmission \n", harq_pid);
}
/* 38.321 5.4.2.1 2> if the received grant was not addressed to a Temporary C-RNTI on PDCCH, and the NDI provided in the associated HARQ */
/* information has been toggled compared to the value in the previous transmission of this TB of this HARQ process */
else if ((ulsch->harq_processes[harq_pid]->DCINdi != ndi) && (rnti_type != Temporary_C_RNTI_NR)) { /* is ndi toogled so this is a new grant ? */
ulsch->harq_processes[harq_pid]->DCINdi = ndi; /* store first value of ndi */
ulsch->harq_processes[harq_pid]->round = 0;
ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
result_harq = NEW_TRANSMISSION_HARQ;
NR_TST_PHY_PRINTF("[HARQ-UL-PUSCH harqId : %d] new transmission due to toogle of ndi \n", harq_pid);
}
/* 38.321 5.4.2.1 2> else (i.e. retransmission): */
else {
ulsch->harq_processes[harq_pid]->DCINdi = ndi; /* ndi has not toggled si this is a retransmission */
ulsch->harq_processes[harq_pid]->round++; /* increment number of retransmission */
result_harq = RETRANSMISSION_HARQ;
NR_TST_PHY_PRINTF("[HARQ-UL-PUSCH harqId : %d] retransmission \n", harq_pid);
}
return (result_harq);
}
/*******************************************************************
*
* NAME : init_downlink_harq_status
*
* PARAMETERS : pointer to dl harq status
*
* RETURN : none
*
* DESCRIPTION : initialisation of downlink HARQ status
*
*********************************************************************/
void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq)
{
dl_harq->status = SCH_IDLE;
dl_harq->first_tx = 1;
dl_harq->round = 0;
dl_harq->harq_ack.ack = DL_ACKNACK_NO_SET;
dl_harq->harq_ack.send_harq_status = 0;
dl_harq->harq_ack.vDAI_UL = UL_DAI_NO_SET;
dl_harq->harq_ack.vDAI_DL = DL_DAI_NO_SET;
dl_harq->harq_ack.slot_for_feedback_ack = NR_MAX_SLOTS_PAR_FRAME;
dl_harq->harq_ack.pucch_resource_indicator = MAX_PUCCH_RESOURCE_INDICATOR;
dl_harq->harq_ack.n_CCE = 0;
dl_harq->harq_ack.N_CCE = 0;;
}
/*******************************************************************
*
* NAME : config_downlink_harq_process
*
* PARAMETERS : pointer to ue context
* id of current gNB
* number of downlink processes
*
* RETURN : none
*
* DESCRIPTION : configuration of downlink HARQ entity
*
*********************************************************************/
void config_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int execution_thread_number, uint8_t number_harq_processes_for_pdsch)
{
NR_UE_DLSCH_t *dlsch;
dlsch = (NR_UE_DLSCH_t *)malloc16(sizeof(NR_UE_DLSCH_t));
if (dlsch != NULL) {
memset(dlsch,0,sizeof(NR_UE_DLSCH_t));
ue->dlsch[execution_thread_number][gNB_id][TB_id] = dlsch;
}
else {
LOG_E(PHY, "Fatal memory allocation problem at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
assert(0);
}
dlsch->Mdlharq = number_harq_processes_for_pdsch; /* an additional HARQ is reserved for PBCCH */
dlsch->number_harq_processes_for_pdsch = number_harq_processes_for_pdsch;
/* allocation of HARQ process context */
for (int harq_pid = 0; harq_pid < number_harq_processes_for_pdsch; harq_pid++) {
dlsch->harq_processes[harq_pid] = (NR_DL_UE_HARQ_t *)malloc16(sizeof(NR_DL_UE_HARQ_t));
if (dlsch->harq_processes[harq_pid] == NULL) {
LOG_E(PHY, "Fatal memory allocation problem at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
assert(0);
}
memset(dlsch->harq_processes[harq_pid],0,sizeof(NR_DL_UE_HARQ_t));
NR_DL_UE_HARQ_t *dl_harq = dlsch->harq_processes[harq_pid];
init_downlink_harq_status(dl_harq);
}
}
/*******************************************************************
*
* NAME : release_downlink_harq_process
*
* PARAMETERS : pointer to ue context
* id of current gNB
* TB_id transport block identity 0 or 1
* execution_thread_number thread number for current downlink processing
* RETURN : none
*
* DESCRIPTION : release of HARQ downlink entity
*
*********************************************************************/
void release_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int execution_thread_number)
{
NR_UE_DLSCH_t *dlsch = ue->dlsch[execution_thread_number][gNB_id][TB_id];
for (int process_id = 0; process_id < dlsch->Mdlharq; process_id++) {
free16(dlsch->harq_processes[process_id],sizeof(NR_DL_UE_HARQ_t));
dlsch->harq_processes[process_id] = NULL;
}
free16(dlsch,sizeof(NR_UE_DLSCH_t));
ue->dlsch[execution_thread_number][gNB_id][TB_id] = NULL;
}
/*******************************************************************
*
* NAME : downlink_harq_process
*
* PARAMETERS : downlink harq context
* harq identifier
* ndi (new data indicator) from DCI
* rnti_type from DCI
*
* RETURN : none
*
* DESCRIPTION : manage downlink information from DCI for downlink transmissions/retransmissions
* TS 38.321 5.3.1 DL Assignment reception
* TS 38.321 5.3.2 HARQ operation
*
*********************************************************************/
harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int ndi, nr_rnti_type_t rnti_type)
{
harq_result_t result_harq = RETRANSMISSION_HARQ;
if ((rnti_type != C_RNTI_NR) && (rnti_type != Temporary_C_RNTI_NR)) {
LOG_E(PHY, "Fatal error in HARQ entity due to unknown RNTI at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
assert(0);
}
if (dl_harq->first_tx == 1) {
dl_harq->round = 0;
dl_harq->status = ACTIVE;
dl_harq->DCINdi = ndi;
dl_harq->first_tx = 0;
result_harq = NEW_TRANSMISSION_HARQ;
NR_TST_PHY_PRINTF("[HARQ-DL-PDSCH harqId : %d] first new reception \n", harq_pid);
} else if (dl_harq->DCINdi != ndi) {
dl_harq->round = 0;
dl_harq->status = ACTIVE;
dl_harq->DCINdi = ndi;
result_harq = NEW_TRANSMISSION_HARQ;
NR_TST_PHY_PRINTF("[HARQ-DL-PDSCH harqId : %d] new reception due to toogle of ndi \n", harq_pid);
} else {
dl_harq->round++;
result_harq = RETRANSMISSION_HARQ;
NR_TST_PHY_PRINTF("[HARQ-DL-PDSCH harqId : %d] reception of a retransmission \n", harq_pid);
}
return (result_harq);
}
openair1/SCHED_NR_UE/harq_nr.h
+153
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@@ -0,0 +1,153 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/***********************************************************************
*
* FILENAME : harq_nr.h
*
* MODULE : HARQ
*
* DESCRIPTION : header related to Hybrid Automatic Repeat Request Acknowledgment
* This feature allows to acknowledge downlink and uplink transport blocks
*
************************************************************************/
#ifndef HARQ_NR_H
#define HARQ_NR_H
/************** DEFINE ********************************************/
#if 0
/* these define are in file PHY/impl_defs_top.h" because of compilation problems due to multiple header files inclusions */
#define NR_MAX_HARQ_PROCESSES (16)
#define NR_MAX_ULSCH_HARQ_PROCESSES (NR_MAX_HARQ_PROCESSES) /* TS 38.214 6.1 UE procedure for receiving the physical uplink shared channel */
#define NR_MAX_DLSCH_HARQ_PROCESSES (NR_MAX_HARQ_PROCESSES) /* TS 38.214 5.1 UE procedure for receiving the physical downlink shared channel */
#endif
#define NR_DEFAULT_DLSCH_HARQ_PROCESSES (8) /* TS 38.214 5.1 */
#define NR_DL_MAX_DAI (4) /* TS 38.213 table 9.1.3-1 Value of counter DAI for DCI format 1_0 and 1_1 */
#define NR_DL_MAX_NB_CW (2) /* number of downlink code word */
#define DL_ACKNACK_NO_SET (2)
#define DL_NACK (0)
#define DL_ACK (1)
#define DL_MAX_NB_FEEDBACK (NR_DL_MAX_DAI * NR_DL_MAX_NB_CW)
#define DL_DAI_NO_SET (0xFF)
#define UL_DAI_NO_SET (DL_DAI_NO_SET)
/************** INCLUDE *******************************************/
#include "PHY/defs_nr_UE.h"
/************* TYPE ***********************************************/
typedef enum {
NEW_TRANSMISSION_HARQ,
RETRANSMISSION_HARQ
} harq_result_t;
/************** VARIABLES *****************************************/
/*************** FUNCTIONS ****************************************/
/** \brief This function configures uplink HARQ context
@param PHY_VARS_NR_UE ue context
@param gNB_id gNodeB identifier
@param number_harq_processes_pusch maximum number of uplink HARQ processes
@returns none */
void config_uplink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, uint8_t number_harq_processes_pusch);
/** \brief This function releases uplink HARQ context
@param PHY_VARS_NR_UE ue context
@param gNB_id gNodeB identifier
@returns none */
void release_uplink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id);
/** \brief This function stores slot for transmission in HARQ context
@param ulsch_harq uplink harq context
@param harq process identifier harq_pid
@param slot_tx slot for transmission related to current downlink PDCCH
@returns 0 none */
void set_tx_harq_id(PHY_VARS_NR_UE *ue, int gNB_id, int harq_pid, int slot_tx);
/** \brief This function initialises context of an uplink HARQ process
@param ulsch_harq uplink harq context
@param harq process identifier harq_pid
@returns 0 none */
int get_tx_harq_id(PHY_VARS_NR_UE *ue, int gNB_id, int slot_tx);
/** \brief This function returns number of slots between current reception and related transmission
@param dci value
@returns slots number between reception and related transmission */
int get_dci_slot_rx_to_tx(int dci_index);
/** \brief This function update uplink harq context and return transmission type (new transmission or retransmission)
@param ulsch uplink harq context
@param harq process identifier harq_pid
@returns retransmission or new transmission */
harq_result_t uplink_harq_process(NR_UE_ULSCH_t *ulsch, int harq_pid, int ndi, nr_rnti_type_t rnti_type);
/** \brief This function initialises downlink HARQ status
@param pointer to downlink harq status
@returns none */
void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq);
/** \brief This function configures downlink HARQ context
@param PHY_VARS_NR_UE ue context
@param gNB_id gNodeB identifier
@param TB_id transport block identifier
@param execution_thread_number thread_number
@param number_harq_processes maximum number of downlink HARQ processes
@returns none */
void config_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int execution_thread_number, uint8_t number_harq_processes);
/** \brief This function releases downlink HARQ context
@param PHY_VARS_NR_UE ue context
@param gNB_id gNodeB identifier
@param TB_id transport block identifier
@param execution_thread_number thread_number
@returns none */
void release_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int execution_thread_number);
/** \brief This function update downlink harq context and return reception type (new transmission or retransmission)
@param dlsch downlink harq context
@param harq process identifier harq_pid
@param rnti_type type of rnti
@returns retransmission or new transmission */
harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dlsch, int harq_pid, int ndi, nr_rnti_type_t rnti_type);
#undef EXTERN
#undef INIT_VARIABLES_HARQ_NR_H
#endif /* HARQ_NR_H */
openair1/SCHED_NR_UE/phy_frame_config_nr.c
+342
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@@ -0,0 +1,342 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/***********************************************************************
*
* FILENAME : phy_frame_configuration_nr.c
*
* DESCRIPTION : functions related to FDD/TDD configuration for NR
* see TS 38.213 11.1 Slot configuration
* and TS 38.331 for RRC configuration
*
************************************************************************/
#include "SCHED_NR_UE/defs.h"
#include "PHY/defs_nr_UE.h"
#include "SCHED_NR_UE/phy_frame_config_nr.h"
/*******************************************************************
*
* NAME : set_tdd_configuration
*
* PARAMETERS : pointer to frame configuration
*
* OUTPUT: table of uplink symbol for each slot for 2 frames
*
* RETURN : 0 if tdd has been properly configurated
* -1 tdd configuration can not be done
*
* DESCRIPTION : generate bit map for uplink symbol for each slot for several frames
* see TS 38.213 11.1 Slot configuration
*
*********************************************************************/
int set_tdd_config_nr(NR_DL_FRAME_PARMS *frame_parms, int dl_UL_TransmissionPeriodicity,
int nrofDownlinkSlots, int nrofDownlinkSymbols,
int nrofUplinkSlots, int nrofUplinkSymbols)
{
TDD_UL_DL_configCommon_t *p_tdd_ul_dl_configuration;
int slot_number = 0;
int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
/* allocate buffer for configuration structure */
p_tdd_ul_dl_configuration = calloc( 1, sizeof(TDD_UL_DL_configCommon_t));
if (p_tdd_ul_dl_configuration == NULL) {
printf("Error test_frame_configuration: memory allocation problem \n");
assert(0);
}
else {
frame_parms->frame_type = TDD;
}
p_tdd_ul_dl_configuration->dl_UL_TransmissionPeriodicity = dl_UL_TransmissionPeriodicity;
p_tdd_ul_dl_configuration->nrofDownlinkSlots = nrofDownlinkSlots;
p_tdd_ul_dl_configuration->nrofDownlinkSymbols = nrofDownlinkSymbols;
p_tdd_ul_dl_configuration->nrofUplinkSlots = nrofUplinkSlots;
p_tdd_ul_dl_configuration->nrofUplinkSymbols = nrofUplinkSymbols;
frame_parms->p_tdd_UL_DL_Configuration = p_tdd_ul_dl_configuration;
int nb_periods_per_frame = (FRAME_DURATION_MICRO_SEC/dl_UL_TransmissionPeriodicity);
int nb_slots_per_period = (frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)/nb_periods_per_frame;
if (nb_slots_per_period != (nrofDownlinkSlots + nrofUplinkSlots)) {
LOG_E(PHY,"set_tdd_configuration_nr: given period is inconsistent with current tdd configuration \n");
return (-1);
}
while(slot_number != nb_slots_to_set) {
for (int number_of_slot = 0; number_of_slot < nrofDownlinkSlots; number_of_slot++) {
frame_parms->tdd_uplink_nr[slot_number] = NR_TDD_DOWNLINK_SLOT;
slot_number++;
}
if (p_tdd_ul_dl_configuration->nrofDownlinkSymbols != 0) {
LOG_E(PHY,"set_tdd_configuration_nr: downlink symbol for slot is not supported for tdd configuration \n");
return (-1);
}
for (int number_of_slot = 0; number_of_slot < nrofUplinkSlots; number_of_slot++) {
frame_parms->tdd_uplink_nr[slot_number] = NR_TDD_UPLINK_SLOT;
slot_number++;
}
if (p_tdd_ul_dl_configuration->nrofUplinkSymbols != 0) {
LOG_E(PHY,"set_tdd_configuration_nr: uplink symbol for slot is not supported for tdd configuration \n");
return (-1);
}
}
if (frame_parms->p_tdd_UL_DL_ConfigurationCommon2 != NULL) {
LOG_E(PHY,"set_tdd_configuration_nr: additionnal tdd configuration 2 is not supported for tdd configuration \n");
return (-1);
}
return (0);
}
/*******************************************************************
*
* NAME : add_tdd_dedicated_configuration_nr
*
* PARAMETERS : pointer to frame configuration
*
* OUTPUT: table of uplink symbol for each slot for several frames
*
* RETURN : 0 if tdd has been properly configurated
* -1 tdd configuration can not be done
*
* DESCRIPTION : generate bit map for uplink symbol for each slot for several frames
* see TS 38.213 11.1 Slot configuration
*
*********************************************************************/
void add_tdd_dedicated_configuration_nr(NR_DL_FRAME_PARMS *frame_parms, int slotIndex, int nrofDownlinkSymbols, int nrofUplinkSymbols)
{
TDD_UL_DL_SlotConfig_t *p_TDD_UL_DL_ConfigDedicated = frame_parms->p_TDD_UL_DL_ConfigDedicated;
TDD_UL_DL_SlotConfig_t *p_previous_TDD_UL_DL_ConfigDedicated;
int next = 0;
while (p_TDD_UL_DL_ConfigDedicated != NULL) {
p_previous_TDD_UL_DL_ConfigDedicated = p_TDD_UL_DL_ConfigDedicated;
p_TDD_UL_DL_ConfigDedicated = (TDD_UL_DL_SlotConfig_t *)(p_TDD_UL_DL_ConfigDedicated->p_next_TDD_UL_DL_SlotConfig);
next = 1;
}
p_TDD_UL_DL_ConfigDedicated = calloc( 1, sizeof(TDD_UL_DL_SlotConfig_t));
//printf("allocate pt %p \n", p_TDD_UL_DL_ConfigDedicated);
if (p_TDD_UL_DL_ConfigDedicated == NULL) {
printf("Error test_frame_configuration: memory allocation problem \n");
assert(0);
}
if (next == 0) {
frame_parms->p_TDD_UL_DL_ConfigDedicated = p_TDD_UL_DL_ConfigDedicated;
}
else {
p_previous_TDD_UL_DL_ConfigDedicated->p_next_TDD_UL_DL_SlotConfig = (struct TDD_UL_DL_SlotConfig_t *)p_TDD_UL_DL_ConfigDedicated;
}
p_TDD_UL_DL_ConfigDedicated->slotIndex = slotIndex;
p_TDD_UL_DL_ConfigDedicated->nrofDownlinkSymbols = nrofDownlinkSymbols;
p_TDD_UL_DL_ConfigDedicated->nrofUplinkSymbols = nrofUplinkSymbols;
}
/*******************************************************************
*
* NAME : set_tdd_configuration_dedicated_nr
*
* PARAMETERS : pointer to frame configuration
*
* OUTPUT: table of uplink symbol for each slot for several frames
*
* RETURN : 0 if tdd has been properly configurated
* -1 tdd configuration can not be done
*
* DESCRIPTION : generate bit map for uplink symbol for each slot for several frames
* see TS 38.213 11.1 Slot configuration
*
*********************************************************************/
int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms)
{
TDD_UL_DL_SlotConfig_t *p_current_TDD_UL_DL_SlotConfig;
p_current_TDD_UL_DL_SlotConfig = frame_parms->p_TDD_UL_DL_ConfigDedicated;
NR_TST_PHY_PRINTF("\nSet tdd dedicated configuration\n ");
while(p_current_TDD_UL_DL_SlotConfig != NULL) {
int slot_index = p_current_TDD_UL_DL_SlotConfig->slotIndex;
if (slot_index < TDD_CONFIG_NB_FRAMES*(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)) {
if (p_current_TDD_UL_DL_SlotConfig->nrofDownlinkSymbols != 0) {
if (p_current_TDD_UL_DL_SlotConfig->nrofDownlinkSymbols == NR_TDD_SET_ALL_SYMBOLS) {
if (p_current_TDD_UL_DL_SlotConfig->nrofUplinkSymbols == 0) {
frame_parms->tdd_uplink_nr[slot_index] = NR_TDD_DOWNLINK_SLOT;
NR_TST_PHY_PRINTF(" DL[%d] ", slot_index);
}
else {
LOG_E(PHY,"set_tdd_configuration_dedicated_nr: tdd downlink & uplink symbol configuration is not supported \n");
return (-1);
}
}
else {
LOG_E(PHY,"set_tdd_configuration_dedicated_nr: tdd downlink symbol configuration is not supported \n");
return (-1);
}
}
else if (p_current_TDD_UL_DL_SlotConfig->nrofUplinkSymbols != 0) {
if (p_current_TDD_UL_DL_SlotConfig->nrofUplinkSymbols == NR_TDD_SET_ALL_SYMBOLS) {
frame_parms->tdd_uplink_nr[slot_index] = NR_TDD_UPLINK_SLOT;
NR_TST_PHY_PRINTF(" UL[%d] ", slot_index);
}
else {
LOG_E(PHY,"set_tdd_configuration_dedicated_nr: tdd uplink symbol configuration is not supported \n");
return (-1);
}
}
else {
LOG_E(PHY,"set_tdd_configuration_dedicated_nr: no tdd symbol configuration is specified \n");
return (-1);
}
}
else {
LOG_E(PHY,"set_tdd_configuration_dedicated_nr: tdd slot index exceeds maximum value \n");
return (-1);
}
p_current_TDD_UL_DL_SlotConfig = (TDD_UL_DL_SlotConfig_t *)(p_current_TDD_UL_DL_SlotConfig->p_next_TDD_UL_DL_SlotConfig);
}
NR_TST_PHY_PRINTF("\n");
return (0);
}
/*******************************************************************
*
* NAME : set_tdd_configuration
*
* PARAMETERS : pointer to tdd common configuration
* pointer to tdd common configuration2
* pointer to tdd dedicated configuration
*
* OUTPUT: table of uplink symbol for each slot for 2 frames
*
* RETURN : 0 if srs sequence has been successfully generated
* -1 if sequence can not be properly generated
*
* DESCRIPTION : generate bit map for uplink symbol for each slot for 2 frames
* see TS 38.213 11.1 Slot configuration
*
*********************************************************************/
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti)
{
/* for FFD all slot can be considered as an uplink */
if (frame_parms->frame_type == FDD) {
return (NR_UPLINK_SLOT | NR_DOWNLINK_SLOT );
}
if (nr_frame%2 == 0) {
if (frame_parms->tdd_uplink_nr[nr_tti] == NR_TDD_UPLINK_SLOT) {
return (NR_UPLINK_SLOT);
}
else {
return (NR_DOWNLINK_SLOT);
}
}
else if ((frame_parms->tdd_uplink_nr[(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti] == NR_TDD_UPLINK_SLOT)) {
return (NR_UPLINK_SLOT);
}
else {
return (NR_DOWNLINK_SLOT);
}
}
/*******************************************************************
*
* NAME : free_tdd_configuration_nr
*
* PARAMETERS : pointer to frame configuration
*
* RETURN : none
*
* DESCRIPTION : free structure related to tdd configuration
*
*********************************************************************/
void free_tdd_configuration_nr(NR_DL_FRAME_PARMS *frame_parms)
{
TDD_UL_DL_configCommon_t *p_tdd_UL_DL_Configuration = frame_parms->p_tdd_UL_DL_Configuration;
free_tdd_configuration_dedicated_nr(frame_parms);
if (p_tdd_UL_DL_Configuration != NULL) {
frame_parms->p_tdd_UL_DL_Configuration = NULL;
free(p_tdd_UL_DL_Configuration);
}
for (int number_of_slot = 0; number_of_slot < MAX_NR_OF_SLOTS; number_of_slot++) {
frame_parms->tdd_uplink_nr[number_of_slot] = NR_TDD_DOWNLINK_SLOT;
}
}
/*******************************************************************
*
* NAME : free_tdd_configuration_dedicated_nr
*
* PARAMETERS : pointer to frame configuration
*
* RETURN : none
*
* DESCRIPTION : free structure related to tdd dedicated configuration
*
*********************************************************************/
void free_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms)
{
TDD_UL_DL_SlotConfig_t *p_current_TDD_UL_DL_ConfigDedicated = frame_parms->p_TDD_UL_DL_ConfigDedicated;
TDD_UL_DL_SlotConfig_t *p_next_TDD_UL_DL_ConfigDedicated;
int next = 0;
if (p_current_TDD_UL_DL_ConfigDedicated != NULL) {
do {
if (p_current_TDD_UL_DL_ConfigDedicated->p_next_TDD_UL_DL_SlotConfig != NULL) {
next = 1;
p_next_TDD_UL_DL_ConfigDedicated = (TDD_UL_DL_SlotConfig_t *)(p_current_TDD_UL_DL_ConfigDedicated->p_next_TDD_UL_DL_SlotConfig);
p_current_TDD_UL_DL_ConfigDedicated->p_next_TDD_UL_DL_SlotConfig = NULL;
//printf("free pt %p \n", p_current_TDD_UL_DL_ConfigDedicated);
free(p_current_TDD_UL_DL_ConfigDedicated);
p_current_TDD_UL_DL_ConfigDedicated = p_next_TDD_UL_DL_ConfigDedicated;
}
else {
if (p_current_TDD_UL_DL_ConfigDedicated != NULL) {
frame_parms->p_TDD_UL_DL_ConfigDedicated = NULL;
//printf("free pt %p \n", p_current_TDD_UL_DL_ConfigDedicated);
free(p_current_TDD_UL_DL_ConfigDedicated);
next = 0;
}
}
} while (next);
}
}
openair1/SCHED_NR_UE/phy_frame_config_nr.h
+94
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/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/***********************************************************************
*
* FILENAME : phy_frame_configuration_nr.h
*
* DESCRIPTION : functions related to FDD/TDD configuration for NR
* see TS 38.213 11.1 Slot configuration
* and TS 38.331 for RRC configuration
*
************************************************************************/
#ifndef PHY_FRAME_CONFIG_NR_H
#define PHY_FRAME_CONFIG_NR_H
/************** DEFINE ********************************************/
/*************** FUNCTIONS *****************************************/
/** \brief This function processes tdd dedicated configuration for nr
* @param frame_parms NR DL Frame parameters
* @param dl_UL_TransmissionPeriodicity periodicity
* @param nrofDownlinkSlots number of downlink slots
* @param nrofDownlinkSymbols number of downlink symbols
* @param nrofUplinkSlots number of uplink slots
* @param nrofUplinkSymbols number of uplink symbols
@returns 0 if tdd dedicated configuration has been properly set or -1 on error with message */
int set_tdd_config_nr(NR_DL_FRAME_PARMS *frame_parms, int dl_UL_TransmissionPeriodicity,
int nrofDownlinkSlots, int nrofDownlinkSymbols,
int nrofUplinkSlots, int nrofUplinkSymbols);
/** \brief This function adds a slot configuration to current dedicated configuration for nr
* @param frame_parms NR DL Frame parameters
* @param slotIndex
* @param nrofDownlinkSymbols
* @param nrofUplinkSymbols
@returns none */
void add_tdd_dedicated_configuration_nr(NR_DL_FRAME_PARMS *frame_parms, int slotIndex,
int nrofDownlinkSymbols, int nrofUplinkSymbols);
/** \brief This function processes tdd dedicated configuration for nr
* @param frame_parms nr frame parameters
* @param dl_UL_TransmissionPeriodicity periodicity
* @param nrofDownlinkSlots number of downlink slots
* @param nrofDownlinkSymbols number of downlink symbols
* @param nrofUplinkSlots number of uplink slots
* @param nrofUplinkSymbols number of uplink symbols
@returns 0 if tdd dedicated configuration has been properly set or -1 on error with message */
int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
/** \brief This function checks nr slot direction : downlink or uplink
* @param frame_parms NR DL Frame parameters
* @param nr_frame : frame number
* @param nr_tti : slot number
@returns nr_slot_t : downlink or uplink */
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti);
/** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters
@returns none */
void free_tdd_configuration_nr(NR_DL_FRAME_PARMS *frame_parms);
/** \brief This function frees tdd dedicated configuration for nr
* @param frame_parms NR DL Frame parameters
@returns none */
void free_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
#endif /* PHY_FRAME_CONFIG_NR_H */
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+289 -656
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openair1/SCHED_NR_UE/pucch_power_control_ue_nr.c
+206
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/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/************************************************************************
*
* MODULE : PUCCH power control for UE NR
*
* DESCRIPTION : functions related to PUCCH Transmit power
* TS 38.213 7.2.1 UE behaviour
*
**************************************************************************/
#include "PHY/NR_REFSIG/ss_pbch_nr.h"
#include "PHY/defs_nr_UE.h"
#include "SCHED_NR_UE/pucch_uci_ue_nr.h"
#include "SCHED_NR_UE/pucch_power_control_ue_nr.h"
/**************** defines **************************************/
/**************** variables **************************************/
/**************** functions **************************************/
/*******************************************************************
*
* NAME : get_pucch_tx_power_ue
*
* PARAMETERS : ue context
* gNB_id identity
* slots for rx and tx
* pucch_format_nr_t pucch format
* nb_of_prbs number of prb allocated to pucch
* N_sc_ctrl_RB subcarrier control rb related to current pucch format
* N_symb_PUCCH number of pucch symbols excluding those reserved for dmrs
* O_UCI number of bits for UCI Uplink Control Information
* O_SR number of bits for SR scheduling Request
* O_UCI number of bits for CSI Channel State Information
* O_ACK number of bits for HARQ-ACK
* O_CRC number of bits for CRC
* n_HARQ_ACK use for obtaining a PUCCH transmission power
*
* RETURN : pucch power level in dBm
*
* DESCRIPTION : determines pucch transmission power in dBm
* TS 38.213 7.2.1 UE behaviour
*
*********************************************************************/
int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t *proc, pucch_format_nr_t pucch_format,
int nb_of_prbs, int N_sc_ctrl_RB, int N_symb_PUCCH, int O_UCI, int O_SR, int O_CSI, int O_ACK,
int O_CRC, int n_HARQ_ACK) {
int16_t P_O_NOMINAL_PUCCH = ue->pucch_config_common_nr[gNB_id].p0_nominal;
PUCCH_PowerControl_t *power_config = &ue->pucch_config_dedicated_nr[gNB_id].pucch_PowerControl;
int16_t P_O_UE_PUCCH;
int16_t G_b_f_c = 0;
if (ue->pucch_config_dedicated_nr[gNB_id].spatial_Relation_Info[0] != NULL) { /* FFS TODO NR */
LOG_E(PHY,"PUCCH Spatial relation infos are not yet implemented : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (PUCCH_POWER_DEFAULT);
}
if (power_config->p0_Set[0] != NULL) {
P_O_UE_PUCCH = power_config->p0_Set[0]->p0_PUCCH_Value; /* get from index 0 if no spatial relation set */
G_b_f_c = 0;
}
else {
G_b_f_c = ue->dlsch[ue->current_thread_id[proc->subframe_rx]][gNB_id][0]->g_pucch;
LOG_W(PHY,"PUCCH Transmit power control command not yet implemented for NR : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (PUCCH_POWER_DEFAULT);
}
int P_O_PUCCH = P_O_NOMINAL_PUCCH + P_O_UE_PUCCH;
int16_t PL = get_PL(ue->Mod_id, ue->CC_id, gNB_id); /* LTE function because NR path loss not yet implemented FFS TODO NR */
int16_t delta_F_PUCCH = power_config->deltaF_PUCCH_f[pucch_format];
int DELTA_TF;
uint16_t N_ref_PUCCH;
/* computing of pucch transmission power adjustment */
switch (pucch_format) {
case pucch_format0_nr:
{
N_ref_PUCCH = 2;
DELTA_TF = 10 * log10(N_ref_PUCCH/N_symb_PUCCH);
break;
}
case pucch_format1_nr:
{
N_ref_PUCCH = N_SYMB_SLOT;
DELTA_TF = 10 * log10(N_ref_PUCCH/N_symb_PUCCH);
break;
}
case pucch_format2_nr:
case pucch_format3_nr:
case pucch_format4_nr:
{
float N_RE = nb_of_prbs * N_sc_ctrl_RB * N_symb_PUCCH;
float K1 = 6;
/* initial phase so no higher layer parameters */
if (ue->UE_mode[gNB_id] != PUSCH) {
if (O_ACK == 0) {
n_HARQ_ACK = 0;
}
else {
n_HARQ_ACK = 1;
}
}
if (O_UCI < 12) {
DELTA_TF = 10 * log10((double)(((K1 * (n_HARQ_ACK + O_SR + O_CSI))/N_RE)));
}
else {
float K2 = 2.4;
float BPRE = (O_ACK + O_SR + O_CSI + O_CRC)/N_RE;
DELTA_TF = 10 * log10((double)(pow(2,(K2*BPRE)) - 1));
}
break;
}
default:
{
LOG_E(PHY,"PUCCH unknown pucch format : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (0);
}
}
int l = 0;
int k2;
if (power_config->twoPUCCH_PC_AdjustmentStates > 1) {
LOG_E(PHY,"PUCCH power control adjustment states with 2 states not yet implemented : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (PUCCH_POWER_DEFAULT);
}
/* response to a detection by the UE of a DCI format 1_0 or DCI format 1_1 */
int K_PUCCH = 0;
if (O_ACK != 0) {
/* it assumes that PDCCH is in the first symbol of receive slot FFS TDDO NR */
int slots_gap = (proc->nr_tti_tx > proc->nr_tti_rx ? (proc->nr_tti_tx - proc->nr_tti_rx - 1) : ((proc->nr_tti_tx + ue->frame_parms.ttis_per_subframe) - proc->nr_tti_rx - 1));
K_PUCCH = (slots_gap * (ue->frame_parms.symbols_per_tti)) - 1;
}
else {
/* field k2 is not present - to check k2 of pucch from upper layer FFS TDDO NR */
if (ue->pusch_config.pusch_TimeDomainResourceAllocation[0] == NULL) {
if (ue->frame_parms.numerology_index == 0) {
k2 = 1;
}
else {
k2 = ue->frame_parms.numerology_index;
}
}
else
{
/* get minimum value of k2 */
int i = 0;
int k2_min = 32; /* max value of k2 */
do {
k2 = ue->pusch_config.pusch_TimeDomainResourceAllocation[i]->k2;
if (k2 < k2_min) {
k2_min = k2;
}
i++;
if (i >= MAX_NR_OF_UL_ALLOCATIONS) {
break;
}
} while(ue->pusch_config.pusch_TimeDomainResourceAllocation[i] != NULL);
k2 = k2_min;
}
K_PUCCH = N_SYMB_SLOT * k2; /* the product of a number of symbols per slot and the minimum of the values provided by higher layer parameter k2 */
}
int contributor = (10 * log10((double)(pow(2,(ue->frame_parms.numerology_index)) * nb_of_prbs)));
int16_t pucch_power = P_O_PUCCH + contributor + PL + delta_F_PUCCH + DELTA_TF + G_b_f_c;
if (pucch_power > ue->tx_power_max_dBm) {
pucch_power = ue->tx_power_max_dBm;
}
NR_TST_PHY_PRINTF("PUCCH ( Tx power : %d dBm ) ( 10Log(...) : %d ) ( from Path Loss : %d ) ( delta_F_PUCCH : %d ) ( DELTA_TF : %d ) ( G_b_f_c : %d ) \n",
pucch_power, contributor, PL, delta_F_PUCCH, DELTA_TF, G_b_f_c);
return (pucch_power);
}
openair1/SCHED_NR_UE/pucch_power_control_ue_nr.h
+65
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/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/************************************************************************
*
* MODULE : PUCCH power control for UE NR
*
* DESCRIPTION : functions related to PUCCH Transmit power
* TS 38.213 7.2.1 UE behaviour
*
**************************************************************************/
#ifndef PUCCH_POWER_CONTROL_H
#define PUCCH_POWER_CONTROL_H
/*************** INCLUDE *******************************************/
/*************** DEFINE ********************************************/
#define PUCCH_POWER_DEFAULT (0) /* in dBm */
/*************** VARIABLES *****************************************/
/*************** FUNCTIONS *****************************************/
/** \brief This function returns pucch power level in dBm
@param ue context
@param gNB_id identity
@param slots for rx and tx
@param pucch_format_nr_t pucch format
@param nb_of_prbs number of prb allocated to pucch
@param N_sc_ctrl_RB subcarrier control rb related to current pucch format
@param N_symb_PUCCH number of pucch symbols excluding those reserved for dmrs
@param O_UCI number of bits for UCI Uplink Control Information
@param O_SR number of bits for SR scheduling Request
@param int O_UCI number of bits for CSI Channel State Information
@param O_ACK number of bits for HARQ-ACK
@param O_CRC number of bits for CRC
@param n_HARQ_ACK use for obtaining a PUCCH transmission power
@returns pucch power level in dBm */
int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t *proc, pucch_format_nr_t pucch_format,
int nb_of_prbs, int N_sc_ctrl_RB, int N_symb_PUCCH, int O_UCI, int O_SR, int O_CSI, int O_ACK,
int O_CRC, int n_HARQ_ACK);
#endif /* PUCCH_POWER_CONTROL_H */
openair1/SCHED_NR_UE/pucch_uci_ue_nr.c
+1149
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openair1/SCHED_NR_UE/pucch_uci_ue_nr.h
+235
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/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/**********************************************************************
*
* FILENAME : pucch_uci_ue_nr.h
*
* MODULE : Packed Uplink Control Channel aka PUCCH
* PUCCH is used to trasnmit Uplink Control Information UCI
* which is composed of:
* - SR Scheduling Request
* - HARQ ACK/NACK
* - CSI Channel State Information
*
* DESCRIPTION : functions related to PUCCH management
* TS 38.213 9 UE procedure for reporting control information
*
************************************************************************/
#ifndef PUCCH_UCI_UE_NR_H
#define PUCCH_UCI_UE_NR_H
/************** INCLUDE *******************************************/
#include "PHY/defs_nr_UE.h"
#ifdef DEFINE_VARIABLES_PUCCH_UE_NR_H
#define EXTERN
#define INIT_VARIABLES_PUCCH_UE_NR_H
#else
#define EXTERN extern
#undef INIT_VARIABLES_PUCCH_UE_NR_H
#endif
/************** DEFINE ********************************************/
#define BITS_PER_SYMBOL_BPSK (1) /* 1 bit per symbol for bpsk modulation */
#define BITS_PER_SYMBOL_QPSK (2) /* 2 bits per symbol for bpsk modulation */
/************** VARIABLES *****************************************/
/* TS 36.213 Table 9.2.1-1: PUCCH resource sets before dedicated PUCCH resource configuration */
const initial_pucch_resource_t initial_pucch_resource[NB_INITIAL_PUCCH_RESOURCE]
#ifdef INIT_VARIABLES_PUCCH_UE_NR_H
=
{
/* format first symbol Number of symbols PRB offset nb index for set of initial CS */
/* 0 */ { pucch_format0_nr, 12, 2, 0, 2, { 0, 3, 0, 0 } },
/* 1 */ { pucch_format0_nr, 12, 2, 0, 3, { 0, 4, 8, 0 } },
/* 2 */ { pucch_format0_nr, 12, 2, 3, 3, { 0, 4, 8, 0 } },
/* 3 */ { pucch_format1_nr, 10, 4, 0, 2, { 0, 6, 0, 0 } },
/* 4 */ { pucch_format1_nr, 10, 4, 0, 4, { 0, 3, 6, 9 } },
/* 5 */ { pucch_format1_nr, 10, 4, 2, 4, { 0, 3, 6, 9 } },
/* 6 */ { pucch_format1_nr, 10, 4, 4, 4, { 0, 3, 6, 9 } },
/* 7 */ { pucch_format1_nr, 4, 10, 0, 2, { 0, 6, 0, 0 } },
/* 8 */ { pucch_format1_nr, 4, 10, 0, 4, { 0, 3, 6, 9 } },
/* 9 */ { pucch_format1_nr, 4, 10, 2, 4, { 0, 3, 6, 9 } },
/* 10 */ { pucch_format1_nr, 4, 10, 4, 4, { 0, 3, 6, 9 } },
/* 11 */ { pucch_format1_nr, 0, 14, 0, 2, { 0, 6, 0, 0 } },
/* 12 */ { pucch_format1_nr, 0, 14, 0, 4, { 0, 3, 6, 9 } },
/* 13 */ { pucch_format1_nr, 0, 14, 2, 4, { 0, 3, 6, 9 } },
/* 14 */ { pucch_format1_nr, 0, 14, 4, 4, { 0, 3, 6, 9 } },
/* 15 */ { pucch_format1_nr, 0, 14, 0, 4, { 0, 3, 6, 9 } },
}
#endif
;
/* TS 36.213 Table 9.2.3-3: Mapping of values for one HARQ-ACK bit to sequences */
const int sequence_cyclic_shift_1_harq_ack_bit[2]
#ifdef INIT_VARIABLES_PUCCH_UE_NR_H
/* HARQ-ACK Value 0 1 */
/* Sequence cyclic shift */ = { 0, 6 }
#endif
;
/* TS 38.213 Table 9.2.3-4: Mapping of values for two HARQ-ACK bits to sequences */
const int sequence_cyclic_shift_2_harq_ack_bits[4]
#ifdef INIT_VARIABLES_PUCCH_UE_NR_H
/* HARQ-ACK Value (0,0) (0,1) (1,0) (1,1) */
/* Sequence cyclic shift */ = { 0, 3, 9, 6 }
#endif
;
/* TS 36.213 Table 9.2.5-1: Mapping of values for one HARQ-ACK bit and positive SR to sequences */
const int sequence_cyclic_shift_1_harq_ack_bit_positive_sr[2]
#ifdef INIT_VARIABLES_PUCCH_UE_NR_H
/* HARQ-ACK Value 0 1 */
/* Sequence cyclic shift */ = { 3, 9 }
#endif
;
/* TS 36.213 Table 9.2.5-2: Mapping of values for two HARQ-ACK bits and positive SR to sequences */
const int sequence_cyclic_shift_2_harq_ack_bits_positive_sr[4]
#ifdef INIT_VARIABLES_PUCCH_UE_NR_H
/* HARQ-ACK Value (0,0) (0,1) (1,0) (1,1) */
/* Sequence cyclic shift */ = { 1, 4, 10, 7 }
#endif
;
/* TS 36.213 Table 9.2.5.2-1: Code rate corresponding to higher layer parameter PUCCH-F2-maximum-coderate, */
/* or PUCCH-F3-maximum-coderate, or PUCCH-F4-maximum-coderate */
/* add one additional element set to 0 for parsing the array until this end */
/* stored values are code rates * 100 */
const int code_rate_r_time_100[8]
#ifdef INIT_VARIABLES_PUCCH_UE_NR_H
= { (0.08 * 100), (0.15 * 100), (0.25*100), (0.35*100), (0.45*100), (0.60*100), (0.80*100), 0 }
#endif
;
#define NB_SYMBOL_MINUS_FOUR (11)
#define I_PUCCH_NO_ADDITIONAL_DMRS (0)
#define I_PUCCH_ADDITIONAL_DMRS (1)
#define I_PUCCH_NO_HOPPING (0)
#define I_PUCCH_HOPING (1)
/* TS 38.211 Table 6.4.1.3.3.2-1: DM-RS positions for PUCCH format 3 and 4 */
const int nb_symbols_excluding_dmrs[NB_SYMBOL_MINUS_FOUR][2][2]
#ifdef INIT_VARIABLES_PUCCH_UE_NR_H
= {
/* No additional DMRS Additional DMRS */
/* PUCCH length No hopping hopping No hopping hopping */
/* index 0 1 0 1 */
/* 4 */ {{ 3 , 2 } , { 3 , 2 }},
/* 5 */ {{ 3 , 3 } , { 3 , 3 }},
/* 6 */ {{ 4 , 4 } , { 4 , 4 }},
/* 7 */ {{ 5 , 5 } , { 5 , 5 }},
/* 8 */ {{ 6 , 6 } , { 6 , 6 }},
/* 9 */ {{ 7 , 7 } , { 7 , 7 }},
/* 10 */ {{ 8 , 8 } , { 6 , 6 }},
/* 11 */ {{ 9 , 9 } , { 7 , 7 }},
/* 12 */ {{ 10 , 10 } , { 8 , 8 }},
/* 13 */ {{ 11 , 11 } , { 9 , 9 }},
/* 14 */ {{ 12 , 12 } , { 10 , 10 }},
}
#endif
;
/* TS 38.213 9.2.5.2 UE procedure for multiplexing HARQ-ACK/SR and CSI in a PUCCH */
/* this is a counter of number of pucch format 4 per subframe */
int nb_pucch_format_4_in_subframes[LTE_NUMBER_OF_SUBFRAMES_PER_FRAME]
#ifdef INIT_VARIABLES_PUCCH_UE_NR_H
= { 0 }
#endif
;
/*************** FUNCTIONS ****************************************/
bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t *proc, bool reset_harq);
/** \brief This function return number of downlink acknowledgement and its bitmap
@param ue context
@param gNB_id identity
@param slots for rx and tx
@param o_ACK HARQ-ACK information bits
@param n_HARQ_ACK use for obtaining a PUCCH transmission power
@param do_reset reset downlink HARQ context
@returns number of bits of o_ACK */
uint8_t get_downlink_ack(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t *proc, uint32_t *o_ACK,
int *n_HARQ_ACK, bool do_reset);
/** \brief This function selects a pucch resource
@param ue context
@param gNB_id identity
@param uci size number of uci bits
@param pucch_resource_indicator is from downlink DCI
@param initial_pucch_id pucch resource id for initial phase
@param resource_set_id pucch resource set if any
@param resource_id pucch resource id if any
@returns TRUE a pucch resource has been found FALSE no valid pucch resource */
boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int uci_size, int pucch_resource_indicator,
int *initial_pucch_id, int *resource_set_id, int *resource_id, NR_UE_HARQ_STATUS_t *harq_status);
/** \brief This function select a pucch resource set
@param ue context
@param gNB_id identity
@param uci size number of uci bits
@returns number of the pucch resource set */
int find_pucch_resource_set(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int uci_size);
/** \brief This function check pucch format
@param ue context
@param gNB_id identity
@param format_pucch pucch format
@param nb_symbols_for_tx number of symbols for pucch transmission
@param uci size number of uci bits
@returns TRUE pucch format matched uci size and constraints, FALSE invalid pucch format */
boolean_t check_pucch_format(PHY_VARS_NR_UE *ue, uint8_t gNB_id, pucch_format_nr_t format_pucch, int nb_symbols_for_tx,
int uci_size);
/** \brief This function selects a pucch resource
@param ue context
@param gNB_id identity
@param slots for rx and tx
@returns TRUE a scheduling request is triggered */
int trigger_periodic_scheduling_request(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t *proc);
/** \brief This function reads current CSI
@param ue context
@param gNB_id identity
@param csi_payload is updated with CSI
@returns number of bits of CSI */
int get_csi_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint32_t *csi_payload);
/** \brief This dummy function sets current CSI for simulation
@param csi_status
@param csi_payload is updated with CSI
@returns none */
void set_csi_nr(int csi_status, uint32_t csi_payload);
#endif /* PUCCH_UCI_UE_NR_H */
openair1/SIMULATION/ETH_TRANSPORT/extern.h
+1
View File
@@ -33,6 +33,7 @@
#include <pthread.h>
extern unsigned char Emulation_status;
extern unsigned char emu_tx_status;
extern unsigned char emu_rx_status;
openair1/SIMULATION/NR_UE_PHY/unit_tests/build/CMakeLists.txt
+96
View File
@@ -0,0 +1,96 @@
#/*
# * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
# * contributor license agreements. See the NOTICE file distributed with
# * this work for additional information regarding copyright ownership.
# * The OpenAirInterface Software Alliance licenses this file to You under
# * the OAI Public License, Version 1.1 (the "License"); you may not use this file
# * except in compliance with the License.
# * You may obtain a copy of the License at
# *
# * http://www.openairinterface.org/?page_id=698
# *
# * Unless required by applicable law or agreed to in writing, software
# * distributed under the License is distributed on an "AS IS" BASIS,
# * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# * See the License for the specific language governing permissions and
# * limitations under the License.
# *-------------------------------------------------------------------------------
# * For more information about the OpenAirInterface (OAI) Software Alliance:
# * contact@openairinterface.org
# */
cmake_minimum_required(VERSION 2.8)
set(CMAKE_C_FLAGS
"${CMAKE_C_FLAGS} -O0 -g -Wextra -march=native"
)
add_definitions("-DUPGRADE_RAT_NR")
add_definitions("-DDEBUG_PSS_NR")
add_definitions("-DDEBUG_SSS_NR")
add_definitions("-DNR_UNIT_TEST")
set(PACKAGE_NAME "Testbench for unitary tests")
set(PHYSIM True)
set(RF_BOARD None)
set(XFORMS False)
set(ENABLE_ITTI False)
set(DEBUG_PHY False)
set(DEBUG_PSS True)
set(DEBUG_PHY True)
set(DEBUG_PHY_PROC False)
set(DEBUG_DLSCH True)
# standard cmake file for nr ue build
include(../../../../../cmake_targets/CMakeLists.txt)
set(SRC_UNIT_TESTS
${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pss_util_test.c
${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/dummy_functions.c
)
set(INC_UNIT_TESTS
${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pss_util_test.h
)
add_executable(pss_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pss_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(pss_test
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(sss_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/sss_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(sss_test
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(frame_config_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/frame_config_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(frame_config_test
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(harq_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/harq_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(harq_test
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(srs_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/srs_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(srs_test
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(pbch_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pbch_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(pbch_test
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(pucch_uci_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pucch_uci_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(pucch_uci_test
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
openair1/SIMULATION/NR_UE_PHY/unit_tests/build/reflogs/frame_config_test.txt
+180
View File
@@ -0,0 +1,180 @@
FRAME CONFIGURATION TEST
--------------------------
log init done
Start lte_param_init, frame_type 0, extended_prefix 0
[PHY][I][nr_init_frame_parms_ue] Initializing frame parms for mu 1, N_RB 106, Ncp 0
Initializing UE vars (abstraction 0) for eNB TXant 1, UE RXant 1
[PHY][E][set_tdd_config_nr] set_tdd_configuration_nr: given period is inconsistent with current tdd configuration

Tdd configuration tti 2 downlink 5 uplink 1 period 2500
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] D [ 5] D [ 6] D [ 7] D [ 8] D [ 9] D [ 10] D [ 11] D [ 12] D [ 13] D [ 14] D [ 15] D [ 16] D [ 17] D [ 18] D [ 19] D
[ 20] D [ 21] D [ 22] D [ 23] D [ 24] D [ 25] D [ 26] D [ 27] D [ 28] D [ 29] D [ 30] D [ 31] D [ 32] D [ 33] D [ 34] D [ 35] D [ 36] D [ 37] D [ 38] D [ 39] D
[PHY][E][set_tdd_config_nr] set_tdd_configuration_nr: given period is inconsistent with current tdd configuration

Tdd configuration tti 2 downlink 4 uplink 2 period 2500
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] D [ 5] D [ 6] D [ 7] D [ 8] D [ 9] D [ 10] D [ 11] D [ 12] D [ 13] D [ 14] D [ 15] D [ 16] D [ 17] D [ 18] D [ 19] D
[ 20] D [ 21] D [ 22] D [ 23] D [ 24] D [ 25] D [ 26] D [ 27] D [ 28] D [ 29] D [ 30] D [ 31] D [ 32] D [ 33] D [ 34] D [ 35] D [ 36] D [ 37] D [ 38] D [ 39] D
[PHY][E][set_tdd_config_nr] set_tdd_configuration_nr: given period is inconsistent with current tdd configuration

Tdd configuration tti 2 downlink 4 uplink 1 period 500
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] D [ 5] D [ 6] D [ 7] D [ 8] D [ 9] D [ 10] D [ 11] D [ 12] D [ 13] D [ 14] D [ 15] D [ 16] D [ 17] D [ 18] D [ 19] D
[ 20] D [ 21] D [ 22] D [ 23] D [ 24] D [ 25] D [ 26] D [ 27] D [ 28] D [ 29] D [ 30] D [ 31] D [ 32] D [ 33] D [ 34] D [ 35] D [ 36] D [ 37] D [ 38] D [ 39] D
Tdd configuration tti 1 downlink 1 uplink 1 period 2000
[ 0] D [ 1] U [ 2] D [ 3] U [ 4] D [ 5] U [ 6] D [ 7] U [ 8] D [ 9] U [ 10] D [ 11] U [ 12] D [ 13] U [ 14] D [ 15] U [ 16] D [ 17] U [ 18] D [ 19] U
Tdd configuration tti 1 downlink 4 uplink 1 period 5000
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] U [ 5] D [ 6] D [ 7] D [ 8] D [ 9] U [ 10] D [ 11] D [ 12] D [ 13] D [ 14] U [ 15] D [ 16] D [ 17] D [ 18] D [ 19] U
Tdd configuration tti 1 downlink 9 uplink 1 period 10000
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] D [ 5] D [ 6] D [ 7] D [ 8] D [ 9] U [ 10] D [ 11] D [ 12] D [ 13] D [ 14] D [ 15] D [ 16] D [ 17] D [ 18] D [ 19] U
Tdd configuration tti 2 downlink 1 uplink 1 period 1000
[ 0] D [ 1] U [ 2] D [ 3] U [ 4] D [ 5] U [ 6] D [ 7] U [ 8] D [ 9] U [ 10] D [ 11] U [ 12] D [ 13] U [ 14] D [ 15] U [ 16] D [ 17] U [ 18] D [ 19] U
[ 20] D [ 21] U [ 22] D [ 23] U [ 24] D [ 25] U [ 26] D [ 27] U [ 28] D [ 29] U [ 30] D [ 31] U [ 32] D [ 33] U [ 34] D [ 35] U [ 36] D [ 37] U [ 38] D [ 39] U
Tdd configuration tti 2 downlink 3 uplink 1 period 2000
[ 0] D [ 1] D [ 2] D [ 3] U [ 4] D [ 5] D [ 6] D [ 7] U [ 8] D [ 9] D [ 10] D [ 11] U [ 12] D [ 13] D [ 14] D [ 15] U [ 16] D [ 17] D [ 18] D [ 19] U
[ 20] D [ 21] D [ 22] D [ 23] U [ 24] D [ 25] D [ 26] D [ 27] U [ 28] D [ 29] D [ 30] D [ 31] U [ 32] D [ 33] D [ 34] D [ 35] U [ 36] D [ 37] D [ 38] D [ 39] U
Tdd configuration tti 2 downlink 4 uplink 1 period 2500
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] U [ 5] D [ 6] D [ 7] D [ 8] D [ 9] U [ 10] D [ 11] D [ 12] D [ 13] D [ 14] U [ 15] D [ 16] D [ 17] D [ 18] D [ 19] U
[ 20] D [ 21] D [ 22] D [ 23] D [ 24] U [ 25] D [ 26] D [ 27] D [ 28] D [ 29] U [ 30] D [ 31] D [ 32] D [ 33] D [ 34] U [ 35] D [ 36] D [ 37] D [ 38] D [ 39] U
Tdd configuration tti 2 downlink 9 uplink 1 period 5000
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] D [ 5] D [ 6] D [ 7] D [ 8] D [ 9] U [ 10] D [ 11] D [ 12] D [ 13] D [ 14] D [ 15] D [ 16] D [ 17] D [ 18] D [ 19] U
[ 20] D [ 21] D [ 22] D [ 23] D [ 24] D [ 25] D [ 26] D [ 27] D [ 28] D [ 29] U [ 30] D [ 31] D [ 32] D [ 33] D [ 34] D [ 35] D [ 36] D [ 37] D [ 38] D [ 39] U
Tdd configuration tti 2 downlink 19 uplink 1 period 10000
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] D [ 5] D [ 6] D [ 7] D [ 8] D [ 9] D [ 10] D [ 11] D [ 12] D [ 13] D [ 14] D [ 15] D [ 16] D [ 17] D [ 18] D [ 19] U
[ 20] D [ 21] D [ 22] D [ 23] D [ 24] D [ 25] D [ 26] D [ 27] D [ 28] D [ 29] D [ 30] D [ 31] D [ 32] D [ 33] D [ 34] D [ 35] D [ 36] D [ 37] D [ 38] D [ 39] U
Tdd configuration tti 4 downlink 1 uplink 1 period 500
[ 0] D [ 1] U [ 2] D [ 3] U [ 4] D [ 5] U [ 6] D [ 7] U [ 8] D [ 9] U [ 10] D [ 11] U [ 12] D [ 13] U [ 14] D [ 15] U [ 16] D [ 17] U [ 18] D [ 19] U
[ 20] D [ 21] U [ 22] D [ 23] U [ 24] D [ 25] U [ 26] D [ 27] U [ 28] D [ 29] U [ 30] D [ 31] U [ 32] D [ 33] U [ 34] D [ 35] U [ 36] D [ 37] U [ 38] D [ 39] U
[ 40] D [ 41] U [ 42] D [ 43] U [ 44] D [ 45] U [ 46] D [ 47] U [ 48] D [ 49] U [ 50] D [ 51] U [ 52] D [ 53] U [ 54] D [ 55] U [ 56] D [ 57] U [ 58] D [ 59] U
[ 60] D [ 61] U [ 62] D [ 63] U [ 64] D [ 65] U [ 66] D [ 67] U [ 68] D [ 69] U [ 70] D [ 71] U [ 72] D [ 73] U [ 74] D [ 75] U [ 76] D [ 77] U [ 78] D [ 79] U
Tdd configuration tti 4 downlink 3 uplink 1 period 1000
[ 0] D [ 1] D [ 2] D [ 3] U [ 4] D [ 5] D [ 6] D [ 7] U [ 8] D [ 9] D [ 10] D [ 11] U [ 12] D [ 13] D [ 14] D [ 15] U [ 16] D [ 17] D [ 18] D [ 19] U
[ 20] D [ 21] D [ 22] D [ 23] U [ 24] D [ 25] D [ 26] D [ 27] U [ 28] D [ 29] D [ 30] D [ 31] U [ 32] D [ 33] D [ 34] D [ 35] U [ 36] D [ 37] D [ 38] D [ 39] U
[ 40] D [ 41] D [ 42] D [ 43] U [ 44] D [ 45] D [ 46] D [ 47] U [ 48] D [ 49] D [ 50] D [ 51] U [ 52] D [ 53] D [ 54] D [ 55] U [ 56] D [ 57] D [ 58] D [ 59] U
[ 60] D [ 61] D [ 62] D [ 63] U [ 64] D [ 65] D [ 66] D [ 67] U [ 68] D [ 69] D [ 70] D [ 71] U [ 72] D [ 73] D [ 74] D [ 75] U [ 76] D [ 77] D [ 78] D [ 79] U
Tdd configuration tti 4 downlink 4 uplink 1 period 1250
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] U [ 5] D [ 6] D [ 7] D [ 8] D [ 9] U [ 10] D [ 11] D [ 12] D [ 13] D [ 14] U [ 15] D [ 16] D [ 17] D [ 18] D [ 19] U
[ 20] D [ 21] D [ 22] D [ 23] D [ 24] U [ 25] D [ 26] D [ 27] D [ 28] D [ 29] U [ 30] D [ 31] D [ 32] D [ 33] D [ 34] U [ 35] D [ 36] D [ 37] D [ 38] D [ 39] U
[ 40] D [ 41] D [ 42] D [ 43] D [ 44] U [ 45] D [ 46] D [ 47] D [ 48] D [ 49] U [ 50] D [ 51] D [ 52] D [ 53] D [ 54] U [ 55] D [ 56] D [ 57] D [ 58] D [ 59] U
[ 60] D [ 61] D [ 62] D [ 63] D [ 64] U [ 65] D [ 66] D [ 67] D [ 68] D [ 69] U [ 70] D [ 71] D [ 72] D [ 73] D [ 74] U [ 75] D [ 76] D [ 77] D [ 78] D [ 79] U
Tdd configuration tti 4 downlink 7 uplink 1 period 2000
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] D [ 5] D [ 6] D [ 7] U [ 8] D [ 9] D [ 10] D [ 11] D [ 12] D [ 13] D [ 14] D [ 15] U [ 16] D [ 17] D [ 18] D [ 19] D
[ 20] D [ 21] D [ 22] D [ 23] U [ 24] D [ 25] D [ 26] D [ 27] D [ 28] D [ 29] D [ 30] D [ 31] U [ 32] D [ 33] D [ 34] D [ 35] D [ 36] D [ 37] D [ 38] D [ 39] U
[ 40] D [ 41] D [ 42] D [ 43] D [ 44] D [ 45] D [ 46] D [ 47] U [ 48] D [ 49] D [ 50] D [ 51] D [ 52] D [ 53] D [ 54] D [ 55] U [ 56] D [ 57] D [ 58] D [ 59] D
[ 60] D [ 61] D [ 62] D [ 63] U [ 64] D [ 65] D [ 66] D [ 67] D [ 68] D [ 69] D [ 70] D [ 71] U [ 72] D [ 73] D [ 74] D [ 75] D [ 76] D [ 77] D [ 78] D [ 79] U
Tdd configuration tti 4 downlink 9 uplink 1 period 2500
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] D [ 5] D [ 6] D [ 7] D [ 8] D [ 9] U [ 10] D [ 11] D [ 12] D [ 13] D [ 14] D [ 15] D [ 16] D [ 17] D [ 18] D [ 19] U
[ 20] D [ 21] D [ 22] D [ 23] D [ 24] D [ 25] D [ 26] D [ 27] D [ 28] D [ 29] U [ 30] D [ 31] D [ 32] D [ 33] D [ 34] D [ 35] D [ 36] D [ 37] D [ 38] D [ 39] U
[ 40] D [ 41] D [ 42] D [ 43] D [ 44] D [ 45] D [ 46] D [ 47] D [ 48] D [ 49] U [ 50] D [ 51] D [ 52] D [ 53] D [ 54] D [ 55] D [ 56] D [ 57] D [ 58] D [ 59] U
[ 60] D [ 61] D [ 62] D [ 63] D [ 64] D [ 65] D [ 66] D [ 67] D [ 68] D [ 69] U [ 70] D [ 71] D [ 72] D [ 73] D [ 74] D [ 75] D [ 76] D [ 77] D [ 78] D [ 79] U
Tdd configuration tti 4 downlink 19 uplink 1 period 5000
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] D [ 5] D [ 6] D [ 7] D [ 8] D [ 9] D [ 10] D [ 11] D [ 12] D [ 13] D [ 14] D [ 15] D [ 16] D [ 17] D [ 18] D [ 19] U
[ 20] D [ 21] D [ 22] D [ 23] D [ 24] D [ 25] D [ 26] D [ 27] D [ 28] D [ 29] D [ 30] D [ 31] D [ 32] D [ 33] D [ 34] D [ 35] D [ 36] D [ 37] D [ 38] D [ 39] U
[ 40] D [ 41] D [ 42] D [ 43] D [ 44] D [ 45] D [ 46] D [ 47] D [ 48] D [ 49] D [ 50] D [ 51] D [ 52] D [ 53] D [ 54] D [ 55] D [ 56] D [ 57] D [ 58] D [ 59] U
[ 60] D [ 61] D [ 62] D [ 63] D [ 64] D [ 65] D [ 66] D [ 67] D [ 68] D [ 69] D [ 70] D [ 71] D [ 72] D [ 73] D [ 74] D [ 75] D [ 76] D [ 77] D [ 78] D [ 79] U
Tdd configuration tti 4 downlink 38 uplink 2 period 10000
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] D [ 5] D [ 6] D [ 7] D [ 8] D [ 9] D [ 10] D [ 11] D [ 12] D [ 13] D [ 14] D [ 15] D [ 16] D [ 17] D [ 18] D [ 19] D
[ 20] D [ 21] D [ 22] D [ 23] D [ 24] D [ 25] D [ 26] D [ 27] D [ 28] D [ 29] D [ 30] D [ 31] D [ 32] D [ 33] D [ 34] D [ 35] D [ 36] D [ 37] D [ 38] U [ 39] U
[ 40] D [ 41] D [ 42] D [ 43] D [ 44] D [ 45] D [ 46] D [ 47] D [ 48] D [ 49] D [ 50] D [ 51] D [ 52] D [ 53] D [ 54] D [ 55] D [ 56] D [ 57] D [ 58] D [ 59] D
[ 60] D [ 61] D [ 62] D [ 63] D [ 64] D [ 65] D [ 66] D [ 67] D [ 68] D [ 69] D [ 70] D [ 71] D [ 72] D [ 73] D [ 74] D [ 75] D [ 76] D [ 77] D [ 78] U [ 79] U
Tdd configuration tti 8 downlink 4 uplink 1 period 625
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] U [ 5] D [ 6] D [ 7] D [ 8] D [ 9] U [ 10] D [ 11] D [ 12] D [ 13] D [ 14] U [ 15] D [ 16] D [ 17] D [ 18] D [ 19] U
[ 20] D [ 21] D [ 22] D [ 23] D [ 24] U [ 25] D [ 26] D [ 27] D [ 28] D [ 29] U [ 30] D [ 31] D [ 32] D [ 33] D [ 34] U [ 35] D [ 36] D [ 37] D [ 38] D [ 39] U
[ 40] D [ 41] D [ 42] D [ 43] D [ 44] U [ 45] D [ 46] D [ 47] D [ 48] D [ 49] U [ 50] D [ 51] D [ 52] D [ 53] D [ 54] U [ 55] D [ 56] D [ 57] D [ 58] D [ 59] U
[ 60] D [ 61] D [ 62] D [ 63] D [ 64] U [ 65] D [ 66] D [ 67] D [ 68] D [ 69] U [ 70] D [ 71] D [ 72] D [ 73] D [ 74] U [ 75] D [ 76] D [ 77] D [ 78] D [ 79] U
[ 80] D [ 81] D [ 82] D [ 83] D [ 84] U [ 85] D [ 86] D [ 87] D [ 88] D [ 89] U [ 90] D [ 91] D [ 92] D [ 93] D [ 94] U [ 95] D [ 96] D [ 97] D [ 98] D [ 99] U
[100] D [101] D [102] D [103] D [104] U [105] D [106] D [107] D [108] D [109] U [110] D [111] D [112] D [113] D [114] U [115] D [116] D [117] D [118] D [119] U
[120] D [121] D [122] D [123] D [124] U [125] D [126] D [127] D [128] D [129] U [130] D [131] D [132] D [133] D [134] U [135] D [136] D [137] D [138] D [139] U
[140] D [141] D [142] D [143] D [144] U [145] D [146] D [147] D [148] D [149] U [150] D [151] D [152] D [153] D [154] U [155] D [156] D [157] D [158] D [159] U
Tdd configuration tti 16 downlink 7 uplink 1 period 500
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] D [ 5] D [ 6] D [ 7] U [ 8] D [ 9] D [ 10] D [ 11] D [ 12] D [ 13] D [ 14] D [ 15] U [ 16] D [ 17] D [ 18] D [ 19] D
[ 20] D [ 21] D [ 22] D [ 23] U [ 24] D [ 25] D [ 26] D [ 27] D [ 28] D [ 29] D [ 30] D [ 31] U [ 32] D [ 33] D [ 34] D [ 35] D [ 36] D [ 37] D [ 38] D [ 39] U
[ 40] D [ 41] D [ 42] D [ 43] D [ 44] D [ 45] D [ 46] D [ 47] U [ 48] D [ 49] D [ 50] D [ 51] D [ 52] D [ 53] D [ 54] D [ 55] U [ 56] D [ 57] D [ 58] D [ 59] D
[ 60] D [ 61] D [ 62] D [ 63] U [ 64] D [ 65] D [ 66] D [ 67] D [ 68] D [ 69] D [ 70] D [ 71] U [ 72] D [ 73] D [ 74] D [ 75] D [ 76] D [ 77] D [ 78] D [ 79] U
[ 80] D [ 81] D [ 82] D [ 83] D [ 84] D [ 85] D [ 86] D [ 87] U [ 88] D [ 89] D [ 90] D [ 91] D [ 92] D [ 93] D [ 94] D [ 95] U [ 96] D [ 97] D [ 98] D [ 99] D
[100] D [101] D [102] D [103] U [104] D [105] D [106] D [107] D [108] D [109] D [110] D [111] U [112] D [113] D [114] D [115] D [116] D [117] D [118] D [119] U
[120] D [121] D [122] D [123] D [124] D [125] D [126] D [127] U [128] D [129] D [130] D [131] D [132] D [133] D [134] D [135] U [136] D [137] D [138] D [139] D
[140] D [141] D [142] D [143] U [144] D [145] D [146] D [147] D [148] D [149] D [150] D [151] U [152] D [153] D [154] D [155] D [156] D [157] D [158] D [159] U
[160] D [161] D [162] D [163] D [164] D [165] D [166] D [167] U [168] D [169] D [170] D [171] D [172] D [173] D [174] D [175] U [176] D [177] D [178] D [179] D
[180] D [181] D [182] D [183] U [184] D [185] D [186] D [187] D [188] D [189] D [190] D [191] U [192] D [193] D [194] D [195] D [196] D [197] D [198] D [199] U
[200] D [201] D [202] D [203] D [204] D [205] D [206] D [207] U [208] D [209] D [210] D [211] D [212] D [213] D [214] D [215] U [216] D [217] D [218] D [219] D
[220] D [221] D [222] D [223] U [224] D [225] D [226] D [227] D [228] D [229] D [230] D [231] U [232] D [233] D [234] D [235] D [236] D [237] D [238] D [239] U
[240] D [241] D [242] D [243] D [244] D [245] D [246] D [247] U [248] D [249] D [250] D [251] D [252] D [253] D [254] D [255] U [256] D [257] D [258] D [259] D
[260] D [261] D [262] D [263] U [264] D [265] D [266] D [267] D [268] D [269] D [270] D [271] U [272] D [273] D [274] D [275] D [276] D [277] D [278] D [279] U
[280] D [281] D [282] D [283] D [284] D [285] D [286] D [287] U [288] D [289] D [290] D [291] D [292] D [293] D [294] D [295] U [296] D [297] D [298] D [299] D
[300] D [301] D [302] D [303] U [304] D [305] D [306] D [307] D [308] D [309] D [310] D [311] U [312] D [313] D [314] D [315] D [316] D [317] D [318] D [319] U
Tdd configuration tti 2 downlink 4 uplink 1 period 2500
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] U [ 5] D [ 6] D [ 7] D [ 8] D [ 9] U [ 10] D [ 11] D [ 12] D [ 13] D [ 14] U [ 15] D [ 16] D [ 17] D [ 18] D [ 19] U
[ 20] D [ 21] D [ 22] D [ 23] D [ 24] U [ 25] D [ 26] D [ 27] D [ 28] D [ 29] U [ 30] D [ 31] D [ 32] D [ 33] D [ 34] U [ 35] D [ 36] D [ 37] D [ 38] D [ 39] U
Set tdd dedicated configuration
[PHY][E][set_tdd_configuration_dedicated_nr] set_tdd_configuration_dedicated_nr: tdd downlink symbol configuration is not supported

Set tdd dedicated configuration
[PHY][E][set_tdd_configuration_dedicated_nr] set_tdd_configuration_dedicated_nr: tdd uplink symbol configuration is not supported

Set tdd dedicated configuration
[PHY][E][set_tdd_configuration_dedicated_nr] set_tdd_configuration_dedicated_nr: tdd slot index exceeds maximum value

Set tdd dedicated configuration
[PHY][E][set_tdd_configuration_dedicated_nr] set_tdd_configuration_dedicated_nr: tdd downlink & uplink symbol configuration is not supported

Set tdd dedicated configuration
[PHY][E][set_tdd_configuration_dedicated_nr] set_tdd_configuration_dedicated_nr: no tdd symbol configuration is specified

Set tdd dedicated configuration
UL[0] [PHY][E][set_tdd_configuration_dedicated_nr] set_tdd_configuration_dedicated_nr: no tdd symbol configuration is specified

Set tdd dedicated configuration
DL[0]
Tdd configuration tti 2 downlink 4 uplink 1 period 2500
[ 0] D [ 1] D [ 2] D [ 3] D [ 4] U [ 5] D [ 6] D [ 7] D [ 8] D [ 9] U [ 10] D [ 11] D [ 12] D [ 13] D [ 14] U [ 15] D [ 16] D [ 17] D [ 18] D [ 19] U
[ 20] D [ 21] D [ 22] D [ 23] D [ 24] U [ 25] D [ 26] D [ 27] D [ 28] D [ 29] U [ 30] D [ 31] D [ 32] D [ 33] D [ 34] U [ 35] D [ 36] D [ 37] D [ 38] D [ 39] U
Set tdd dedicated configuration
UL[0] UL[5] UL[10] UL[15] UL[20] UL[25] UL[30] UL[35] DL[4] DL[9] DL[14] DL[19] DL[19] DL[24] DL[29] DL[34] DL[39]
Tdd configuration tti 2 downlink 4 uplink 1 period 2500
[ 0] U [ 1] D [ 2] D [ 3] D [ 4] D [ 5] U [ 6] D [ 7] D [ 8] D [ 9] D [ 10] U [ 11] D [ 12] D [ 13] D [ 14] D [ 15] U [ 16] D [ 17] D [ 18] D [ 19] D
[ 20] U [ 21] D [ 22] D [ 23] D [ 24] D [ 25] U [ 26] D [ 27] D [ 28] D [ 29] D [ 30] U [ 31] D [ 32] D [ 33] D [ 34] D [ 35] U [ 36] D [ 37] D [ 38] D [ 39] D
Test NR FRAME CONFIGURATION is pass
openair1/SIMULATION/NR_UE_PHY/unit_tests/build/reflogs/harq_test.txt
+47
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@@ -0,0 +1,47 @@
HARQ TEST
----------
log init done
Start lte_param_init, frame_type 0, extended_prefix 0
[PHY][I][nr_init_frame_parms_ue] Initializing frame parms for mu 1, N_RB 106, Ncp 0
Initializing UE vars (abstraction 0) for eNB TXant 1, UE RXant 1
HARQ Uplink
First sequence ndi does not toggle
[HARQ-UL-PUSCH harqId : 0] first new transmission
[HARQ-UL-PUSCH harqId : 0] retransmission
[HARQ-UL-PUSCH harqId : 0] retransmission
[HARQ-UL-PUSCH harqId : 0] retransmission
[HARQ-UL-PUSCH harqId : 0] retransmission
Second sequence ndi toggle each transmission
[HARQ-UL-PUSCH harqId : 1] first new transmission
[HARQ-UL-PUSCH harqId : 1] new transmission due to toogle of ndi
[HARQ-UL-PUSCH harqId : 1] new transmission due to toogle of ndi
[HARQ-UL-PUSCH harqId : 1] new transmission due to toogle of ndi
[HARQ-UL-PUSCH harqId : 1] new transmission due to toogle of ndi
Third sequence ndi toggle each two transmissions
[HARQ-UL-PUSCH harqId : 2] first new transmission
[HARQ-UL-PUSCH harqId : 2] retransmission
[HARQ-UL-PUSCH harqId : 2] new transmission due to toogle of ndi
[HARQ-UL-PUSCH harqId : 2] retransmission
[HARQ-UL-PUSCH harqId : 2] new transmission due to toogle of ndi
HARQ Downlink
First sequence ndi does not toggle
[HARQ-DL-PDSCH harqId : 0] first new reception
[HARQ-DL-PDSCH harqId : 0] reception of a retransmission
[HARQ-DL-PDSCH harqId : 0] reception of a retransmission
[HARQ-DL-PDSCH harqId : 0] reception of a retransmission
[HARQ-DL-PDSCH harqId : 0] reception of a retransmission
Second sequence ndi toggle each transmission
[HARQ-DL-PDSCH harqId : 1] first new reception
[HARQ-DL-PDSCH harqId : 1] new reception due to toogle of ndi
[HARQ-DL-PDSCH harqId : 1] new reception due to toogle of ndi
[HARQ-DL-PDSCH harqId : 1] new reception due to toogle of ndi
[HARQ-DL-PDSCH harqId : 1] new reception due to toogle of ndi
Third sequence ndi toggle each two transmissions
[HARQ-DL-PDSCH harqId : 2] first new reception
[HARQ-DL-PDSCH harqId : 2] reception of a retransmission
[HARQ-DL-PDSCH harqId : 2] new reception due to toogle of ndi
[HARQ-DL-PDSCH harqId : 2] reception of a retransmission
[HARQ-DL-PDSCH harqId : 2] new reception due to toogle of ndi
Test NR HARQ is pass
openair2/NR_PHY_INTERFACE/IF_Module.h → openair1/SIMULATION/NR_UE_PHY/unit_tests/build/reflogs/pbch_test.txt
View File
openair1/SIMULATION/NR_UE_PHY/unit_tests/build/reflogs/pss_test.txt
+179
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@@ -0,0 +1,179 @@
PSS TEST
----------
log init done
Start lte_param_init, frame_type 0, extended_prefix 0
[PHY][I][nr_init_frame_parms_ue] Initializing frame parms for mu 1, N_RB 106, Ncp 0
Initializing UE vars (abstraction 0) for eNB TXant 1, UE RXant 1
***********************************
PSS NR Test synchronisation
***********************************
------------------------------------------------
Test nr pss with Nid2 0 at position 0
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 0, val = 232379536 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 0, val = 232379536 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 1 at position 0
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 0, val = 232105225 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 0, val = 232105225 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 2 at position 0
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 0, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 0, val = 231344100 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 0 at position 492
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 492, val = 232379536 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 492, val = 232379536 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 1 at position 492
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 492, val = 232105225 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 492, val = 232105225 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 2 at position 492
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 231344100 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 0 at position 493
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 492, val = 230217517 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 492, val = 230217517 (41 dB)
PSS NR Test is pass with warning: pss detected with a shift of 1
------------------------------------------------
Test nr pss with Nid2 1 at position 493
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 492, val = 230099437 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 492, val = 230099437 (41 dB)
PSS NR Test is pass with warning: pss detected with a shift of 1
------------------------------------------------
Test nr pss with Nid2 2 at position 493
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 229165600 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 229165600 (41 dB)
PSS NR Test is pass with warning: pss detected with a shift of 1
------------------------------------------------
Test nr pss with Nid2 0 at position 56788
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 56788, val = 232379536 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 56788, val = 232379536 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 1 at position 56788
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 56788, val = 232105225 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 56788, val = 232105225 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 2 at position 56788
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 56788, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 56788, val = 231344100 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 0 at position 56888
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 56888, val = 232379536 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 56888, val = 232379536 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 1 at position 56888
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 56888, val = 232105225 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 56888, val = 232105225 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 2 at position 56888
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 56888, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 56888, val = 231344100 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 0 at position 111111
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 111112, val = 230349320 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 111112, val = 230349320 (41 dB)
PSS NR Test is pass with warning: pss detected with a shift of 1
------------------------------------------------
Test nr pss with Nid2 1 at position 111111
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 111112, val = 230409881 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 111112, val = 230409881 (41 dB)
PSS NR Test is pass with warning: pss detected with a shift of 1
------------------------------------------------
Test nr pss with Nid2 2 at position 111111
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 111112, val = 229601794 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 111112, val = 229601794 (41 dB)
PSS NR Test is pass with warning: pss detected with a shift of 1
------------------------------------------------
Test nr pss with Nid2 0 at position 151234
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 151236, val = 219912170 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 151236, val = 219912170 (41 dB)
PSS NR Test is pass with warning: pss detected with a shift of 2
------------------------------------------------
Test nr pss with Nid2 1 at position 151234
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 151236, val = 219714314 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 151236, val = 219714314 (41 dB)
PSS NR Test is pass with warning: pss detected with a shift of 2
------------------------------------------------
Test nr pss with Nid2 2 at position 151234
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 151236, val = 219588850 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 151236, val = 219588850 (41 dB)
PSS NR Test is pass with warning: pss detected with a shift of 2
------------------------------------------------
Test nr pss with Nid2 0 at position 151500
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 151500, val = 232379536 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 151500, val = 232379536 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 1 at position 151500
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 151500, val = 232105225 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 151500, val = 232105225 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 2 at position 151500
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 151500, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 151500, val = 231344100 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 0 at position 200000
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 200000, val = 232379536 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 200000, val = 232379536 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 1 at position 200000
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 200000, val = 232105225 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 200000, val = 232105225 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 2 at position 200000
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 200000, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 200000, val = 231344100 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 0 at position 250004
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 250004, val = 232379536 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 250004, val = 232379536 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 1 at position 250004
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 250004, val = 232105225 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 250004, val = 232105225 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 2 at position 250004
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 250004, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 250004, val = 231344100 (41 dB)
PSS NR Test is pass: pss detected at right position
------------------------------------------------
Test nr pss with Nid2 0 at position 305152
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 305148, val = 185066768 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 305148, val = 185066768 (41 dB)
PSS NR Test is pass with warning: pss detected with a shift of 4
------------------------------------------------
Test nr pss with Nid2 1 at position 305152
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 305148, val = 185490842 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 305148, val = 185490842 (41 dB)
PSS NR Test is pass with warning: pss detected with a shift of 4
------------------------------------------------
Test nr pss with Nid2 2 at position 305152
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 305148, val = 185637380 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 305148, val = 185637380 (41 dB)
PSS NR Test is pass with warning: pss detected with a shift of 4
PSS NR Number of tests : 33 Pass : 21 Pass with warning : 12 Fail : 0
PSS NR Synchronisaton test is terminated.
openair1/SIMULATION/NR_UE_PHY/unit_tests/build/reflogs/pucch_uci_test.txt
+498
View File
@@ -0,0 +1,498 @@
PUCCH TEST
-----------
log init done
Start lte_param_init, frame_type 0, extended_prefix 0
[PHY][I][nr_init_frame_parms_ue] Initializing frame parms for mu 1, N_RB 106, Ncp 0
Initializing UE vars (abstraction 0) for eNB TXant 1, UE RXant 1
-------------------------------------------------------------------------------------------
=> Test : No harq feedback on going
Set pucch common configuration
PUCCH No feedback AbsSubframe 0.4
[PHY][D][pucch_procedures_ue_nr] PUCCH No feedback AbsSubframe 0.4
=> Test : Error due to acknownlegment not set
[PHY][E][get_downlink_ack] PUCCH Downlink acknowledgment has not been set : at line 0 in function get_downlink_ack of file
PUCCH No feedback AbsSubframe 0.4
[PHY][D][pucch_procedures_ue_nr] PUCCH No feedback AbsSubframe 0.4
=> Test : Error due to DAI not set
[PHY][E][get_downlink_ack] PUCCH Downlink DAI has not been set : at line 0 in function get_downlink_ack of file
PUCCH No feedback AbsSubframe 0.4
[PHY][D][pucch_procedures_ue_nr] PUCCH No feedback AbsSubframe 0.4
=> Test : Error due to DAI at wrong value
[PHY][E][get_downlink_ack] PUCCH Downlink DAI has an invalid value : at line 0 in function get_downlink_ack of file
PUCCH No feedback AbsSubframe 0.4
[PHY][D][pucch_procedures_ue_nr] PUCCH No feedback AbsSubframe 0.4
=> Test : Error due to ACK not ready to be send
[PHY][E][get_downlink_ack] PUCCH Downlink ack can not be transmitted : at line 0 in function get_downlink_ack of file
PUCCH No feedback AbsSubframe 0.4
[PHY][D][pucch_procedures_ue_nr] PUCCH No feedback AbsSubframe 0.4
=> Test : Error due to invalid DAI value
[PHY][E][get_downlink_ack] PUCCH Downlink dai is invalid : at line 0 in function get_downlink_ack of file
PUCCH No feedback AbsSubframe 0.4
[PHY][D][pucch_procedures_ue_nr] PUCCH No feedback AbsSubframe 0.4
Set pucch common configuration
=> Test : Error due to undefined PUCCH format from common config
PUCCH power n(1) = ( V(1) - U(1) )mod4 * N_TB(1) + N(1)
[PHY][E][select_pucch_resource] PUCCH Invalid initial resource index : at line 0 in function select_pucch_resource of file
[PHY][W][pucch_procedures_ue_nr] PUCCH No PUCCH resource found at AbsSubframe 0.4

=> Test : Error due to PUCCH format with multiple cells not already implemented
[PHY][E][get_downlink_ack] PUCCH ACK feedback is not implemented for mutiple gNB cells : at line 0 in function get_downlink_ack of file
PUCCH No feedback AbsSubframe 0.4
[PHY][D][pucch_procedures_ue_nr] PUCCH No feedback AbsSubframe 0.4
-------------------------------------------------------------------------------------------
Set pucch common configuration
=> Test : PUCCH format from common config in prach mode: one positive downlink ACKnowledgment
PUCCH power n(1) = ( V(1) - U(1) )mod4 * N_TB(1) + N(1)
PUCCH format 0 nb symbols 2 uci size 1 selected format 0
PUCCH common configuration with index 1
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 0 data 0x00 ) ( ack length 0 data 0x00 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 0 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 2 ) ( max code rate*100 : 0 ) ( starting_symbol_index : 12 )
PUCCH ( starting_prb : 0 ) ( second_hop : 99 ) ( m_0 : 4 ) ( m_CS : 6 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 4 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 1 ) ( DELTA_TF : 0 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from common config in prach mode: one negative downlink ACKnowledgment
PUCCH power n(1) = ( V(1) - U(1) )mod4 * N_TB(1) + N(1)
PUCCH format 0 nb symbols 2 uci size 1 selected format 0
PUCCH common configuration with index 1
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 0 data 0x00 ) ( ack length 0 data 0x00 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 0 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 2 ) ( max code rate*100 : 0 ) ( starting_symbol_index : 12 )
PUCCH ( starting_prb : 0 ) ( second_hop : 99 ) ( m_0 : 4 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 4 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 1 ) ( DELTA_TF : 0 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from common config in dedicated mode: two positive downlink ACKnowledgments
PUCCH power n(2) = ( V(2) - U(2) )mod4 * N_TB(1) + N(2)
PUCCH format 1 nb symbols 4 uci size 2 selected format 1
PUCCH common configuration with index 3
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 2 data 0x02 ) ( ack length 2 data 0x02 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 1 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 4 ) ( max code rate*100 : 0 ) ( starting_symbol_index : 10 )
PUCCH ( starting_prb : 1 ) ( second_hop : 98 ) ( m_0 : 6 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 9 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 2 ) ( DELTA_TF : 4 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from common config in dedicated mode: one positive and one negative downlink ACKnowledgments
PUCCH power n(2) = ( V(2) - U(2) )mod4 * N_TB(1) + N(2)
PUCCH format 1 nb symbols 4 uci size 2 selected format 1
PUCCH common configuration with index 3
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 2 data 0x00 ) ( ack length 2 data 0x00 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 1 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 4 ) ( max code rate*100 : 0 ) ( starting_symbol_index : 10 )
PUCCH ( starting_prb : 1 ) ( second_hop : 98 ) ( m_0 : 6 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 9 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 2 ) ( DELTA_TF : 4 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from common config in dedicated mode: two negative downlink ACKnowledgments
PUCCH power n(2) = ( V(2) - U(2) )mod4 * N_TB(1) + N(2)
PUCCH format 1 nb symbols 4 uci size 2 selected format 1
PUCCH common configuration with index 3
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 2 data 0x00 ) ( ack length 2 data 0x00 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 1 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 4 ) ( max code rate*100 : 0 ) ( starting_symbol_index : 10 )
PUCCH ( starting_prb : 1 ) ( second_hop : 98 ) ( m_0 : 6 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 9 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 2 ) ( DELTA_TF : 4 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from common config in dedicated mode: no resource is found
PUCCH power n(2) = ( V(2) - U(2) )mod4 * N_TB(1) + N(2)
[PHY][E][select_pucch_resource] PUCCH No compatible pucch format found : at line 0 in function select_pucch_resource of file
[PHY][W][pucch_procedures_ue_nr] PUCCH No PUCCH resource found at AbsSubframe 0.4

=> Test : PUCCH format from common config in dedicated mode: no PUCCH after reset of pending harq ACKnowledgments
PUCCH No feedback AbsSubframe 0.4
[PHY][D][pucch_procedures_ue_nr] PUCCH No feedback AbsSubframe 0.4
Set default pucch dedicated configuration
-------------------------------------------------------------------------------------------
=> Test : PUCCH format from dedicated config : pucch resource indicator is invalid
PUCCH power n(1) = ( V(1) - U(1) )mod4 * N_TB(1) + N(1)
PUCCH found resource set 0
[PHY][E][select_pucch_resource] PUCCH Invalid pucch resource indicator: at line 0 in function select_pucch_resource of file
[PHY][W][pucch_procedures_ue_nr] PUCCH No PUCCH resource found at AbsSubframe 0.4

=> Test : PUCCH format from dedicated config with 1 transport block : with 1 downlink ACKnowledgments and pucch resource indicator 0
PUCCH power n(1) = ( V(1) - U(1) )mod4 * N_TB(1) + N(1)
PUCCH found resource set 0
PUCCH format 0 nb symbols 1 uci size 1 selected format 0
PUCCH dedicated configuration with resource index 0
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 0 data 0x00 ) ( ack length 0 data 0x00 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 0 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 1 ) ( max code rate*100 : 0 ) ( starting_symbol_index : 0 )
PUCCH ( starting_prb : 1 ) ( second_hop : 1 ) ( m_0 : 2 ) ( m_CS : 6 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 7 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 1 ) ( DELTA_TF : 3 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 1 transport block : with 1 downlink ACKnowledgments and pucch resource indicator 5
PUCCH power n(1) = ( V(1) - U(1) )mod4 * N_TB(1) + N(1)
PUCCH found resource set 0
PUCCH format 1 nb symbols 9 uci size 1 selected format 1
PUCCH dedicated configuration with resource index 5
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 1 data 0x01 ) ( ack length 1 data 0x01 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 1 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 9 ) ( max code rate*100 : 8 ) ( starting_symbol_index : 0 )
PUCCH ( starting_prb : 1 ) ( second_hop : 1 ) ( m_0 : 2 ) ( m_CS : 0 ) ( time_domain_occ 5 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 5 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 2 ) ( DELTA_TF : 0 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 1 transport block : with 2 downlink ACKnowledgments and pucch resource indicator 1
PUCCH power n(2) = ( V(2) - U(2) )mod4 * N_TB(1) + N(2)
PUCCH found resource set 0
PUCCH format 1 nb symbols 5 uci size 2 selected format 1
PUCCH dedicated configuration with resource index 1
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 2 data 0x03 ) ( ack length 2 data 0x03 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 1 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 5 ) ( max code rate*100 : 8 ) ( starting_symbol_index : 0 )
PUCCH ( starting_prb : 1 ) ( second_hop : 1 ) ( m_0 : 2 ) ( m_CS : 0 ) ( time_domain_occ 1 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 8 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 2 ) ( DELTA_TF : 3 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 1 transport block : with 2 downlink ACKnowledgments and pucch resource indicator 0
PUCCH power n(2) = ( V(2) - U(2) )mod4 * N_TB(1) + N(2)
PUCCH found resource set 0
PUCCH format 0 nb symbols 1 uci size 2 selected format 0
PUCCH dedicated configuration with resource index 0
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 0 data 0x00 ) ( ack length 0 data 0x00 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 0 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 1 ) ( max code rate*100 : 0 ) ( starting_symbol_index : 0 )
PUCCH ( starting_prb : 1 ) ( second_hop : 1 ) ( m_0 : 2 ) ( m_CS : 6 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 7 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 1 ) ( DELTA_TF : 3 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 1 transport block : with 3 downlink ACKnowledgments and pucch resource indicator 1
PUCCH power n(3) = ( V(3) - U(3) )mod4 * N_TB(1) + N(3)
PUCCH found resource set 1
PUCCH format 3 nb symbols 5 uci size 3 selected format 3
PUCCH dedicated configuration with resource index 9
PUCCH Adjust number of prb : (N_UCI : 3 ) (payload_in_bits : 18) (N_sc_ctrl_RB : 12) (nb_symbols : 3) (Q_m : 2) (max_code_rate*100 : 25)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 3 data 0x07 ) ( ack length 3 data 0x07 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 3 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 3 ) ( max code rate*100 : 25 ) ( starting_symbol_index : 1 )
PUCCH ( starting_prb : 2 ) ( second_hop : 2 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 4 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 4 ) ( DELTA_TF : -3 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 1 transport block : with 3 downlink ACKnowledgments and pucch resource indicator 3
PUCCH power n(3) = ( V(3) - U(3) )mod4 * N_TB(1) + N(3)
PUCCH found resource set 1
PUCCH format 2 nb symbols 2 uci size 3 selected format 2
PUCCH dedicated configuration with resource index 11
PUCCH Adjust number of prb : (N_UCI : 3 ) (payload_in_bits : 4) (N_sc_ctrl_RB : 8) (nb_symbols : 2) (Q_m : 2) (max_code_rate*100 : 15)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 3 data 0x07 ) ( ack length 3 data 0x07 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 2 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 2 ) ( max code rate*100 : 15 ) ( starting_symbol_index : 1 )
PUCCH ( starting_prb : 2 ) ( second_hop : 2 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 6 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 3 ) ( DELTA_TF : 0 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 1 transport block : with 4 downlink ACKnowledgments and pucch resource indicator 5
PUCCH power n(4) = ( V(4) - U(4) )mod4 * N_TB(1) + N(4)
PUCCH found resource set 2
PUCCH format 4 nb symbols 9 uci size 4 selected format 3
PUCCH dedicated configuration with resource index 21
PUCCH Number of pucch format 4 in subframe 4 is 1
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 4 data 0x0f ) ( ack length 4 data 0x0f ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 4 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 7 ) ( max code rate*100 : 35 ) ( starting_symbol_index : 2 )
PUCCH ( starting_prb : 3 ) ( second_hop : 3 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 15 ) ( occ_Index : 16 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 3 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 5 ) ( DELTA_TF : -5 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 1 transport block : with 4 downlink ACKnowledgments and pucch resource indicator 7
PUCCH power n(4) = ( V(4) - U(4) )mod4 * N_TB(1) + N(4)
PUCCH found resource set 2
PUCCH format 3 nb symbols 11 uci size 4 selected format 3
PUCCH dedicated configuration with resource index 23
PUCCH Adjust number of prb : (N_UCI : 4 ) (payload_in_bits : 54) (N_sc_ctrl_RB : 12) (nb_symbols : 9) (Q_m : 2) (max_code_rate*100 : 25)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 4 data 0x0f ) ( ack length 4 data 0x0f ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 3 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 9 ) ( max code rate*100 : 25 ) ( starting_symbol_index : 2 )
PUCCH ( starting_prb : 3 ) ( second_hop : 3 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 1 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 4 ) ( DELTA_TF : -6 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 1 transport block and missed PDSCH : with 6 downlink ACKnowledgments and pucch resource indicator 5
PUCCH power n(4) = ( V(4) - U(2) )mod4 * N_TB(1) + N(2)
PUCCH found resource set 2
PUCCH format 4 nb symbols 9 uci size 4 selected format 3
PUCCH dedicated configuration with resource index 21
PUCCH Number of pucch format 4 in subframe 4 is 2
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 4 data 0x0a ) ( ack length 4 data 0x0a ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 4 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 7 ) ( max code rate*100 : 35 ) ( starting_symbol_index : 2 )
PUCCH ( starting_prb : 3 ) ( second_hop : 3 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 15 ) ( occ_Index : 16 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 6 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 5 ) ( DELTA_TF : -2 ) ( G_b_f_c : 0 )
-------------------------------------------------------------------------------------------
=> Test : PUCCH format from dedicated config with 2 transport blocks : with 1 downlink ACKnowledgments and pucch resource indicator 0
PUCCH power n(2) = ( V(1) - U(1) )mod4 * N_TB(2) + N(2)
PUCCH found resource set 0
PUCCH format 0 nb symbols 1 uci size 2 selected format 0
PUCCH dedicated configuration with resource index 0
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 0 data 0x00 ) ( ack length 0 data 0x00 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 0 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 1 ) ( max code rate*100 : 0 ) ( starting_symbol_index : 0 )
PUCCH ( starting_prb : 1 ) ( second_hop : 1 ) ( m_0 : 2 ) ( m_CS : 6 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 7 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 1 ) ( DELTA_TF : 3 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 2 transport blocks : with 1 downlink ACKnowledgments and pucch resource indicator 1
PUCCH power n(2) = ( V(1) - U(1) )mod4 * N_TB(2) + N(2)
PUCCH found resource set 0
PUCCH format 1 nb symbols 5 uci size 2 selected format 1
PUCCH dedicated configuration with resource index 1
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 2 data 0x03 ) ( ack length 2 data 0x03 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 1 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 5 ) ( max code rate*100 : 8 ) ( starting_symbol_index : 0 )
PUCCH ( starting_prb : 1 ) ( second_hop : 1 ) ( m_0 : 2 ) ( m_CS : 0 ) ( time_domain_occ 1 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 8 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 2 ) ( DELTA_TF : 3 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 2 transport blocks : with 2 downlink ACKnowledgments and pucch resource indicator 3
PUCCH power n(4) = ( V(2) - U(2) )mod4 * N_TB(2) + N(4)
PUCCH found resource set 2
PUCCH format 2 nb symbols 2 uci size 4 selected format 2
PUCCH dedicated configuration with resource index 19
PUCCH Adjust number of prb : (N_UCI : 4 ) (payload_in_bits : 4) (N_sc_ctrl_RB : 8) (nb_symbols : 2) (Q_m : 2) (max_code_rate*100 : 15)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 4 data 0x0f ) ( ack length 4 data 0x0f ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 2 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 2 ) ( max code rate*100 : 15 ) ( starting_symbol_index : 2 )
PUCCH ( starting_prb : 3 ) ( second_hop : 3 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 7 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 3 ) ( DELTA_TF : 1 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 2 transport blocks : with 2 downlink ACKnowledgments and pucch resource indicator 7
PUCCH power n(4) = ( V(2) - U(2) )mod4 * N_TB(2) + N(4)
PUCCH found resource set 2
PUCCH format 3 nb symbols 11 uci size 4 selected format 3
PUCCH dedicated configuration with resource index 23
PUCCH Adjust number of prb : (N_UCI : 4 ) (payload_in_bits : 54) (N_sc_ctrl_RB : 12) (nb_symbols : 9) (Q_m : 2) (max_code_rate*100 : 25)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 4 data 0x0f ) ( ack length 4 data 0x0f ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 3 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 9 ) ( max code rate*100 : 25 ) ( starting_symbol_index : 2 )
PUCCH ( starting_prb : 3 ) ( second_hop : 3 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 1 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 4 ) ( DELTA_TF : -6 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 2 transport blocks : with 3 downlink ACKnowledgments and pucch resource indicator 2
PUCCH power n(6) = ( V(3) - U(3) )mod4 * N_TB(2) + N(6)
PUCCH found resource set 3
PUCCH format 4 nb symbols 6 uci size 6 selected format 3
PUCCH dedicated configuration with resource index 26
PUCCH Number of pucch format 4 in subframe 4 is 3
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 6 data 0x3f ) ( ack length 6 data 0x3f ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 4 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 4 ) ( max code rate*100 : 35 ) ( starting_symbol_index : 3 )
PUCCH ( starting_prb : 4 ) ( second_hop : 4 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 12 ) ( occ_Index : 13 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 11 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 5 ) ( DELTA_TF : 3 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 2 transport blocks : with 3 downlink ACKnowledgments and pucch resource indicator 4
PUCCH power n(6) = ( V(3) - U(3) )mod4 * N_TB(2) + N(6)
PUCCH found resource set 3
PUCCH format 3 nb symbols 8 uci size 6 selected format 3
PUCCH dedicated configuration with resource index 28
PUCCH Adjust number of prb : (N_UCI : 6 ) (payload_in_bits : 36) (N_sc_ctrl_RB : 12) (nb_symbols : 6) (Q_m : 2) (max_code_rate*100 : 25)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 6 data 0x3f ) ( ack length 6 data 0x3f ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 3 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 6 ) ( max code rate*100 : 25 ) ( starting_symbol_index : 3 )
PUCCH ( starting_prb : 4 ) ( second_hop : 4 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 4 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 4 ) ( DELTA_TF : -3 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 2 transport blocks : with 4 downlink ACKnowledgments and pucch resource indicator 4
PUCCH power n(8) = ( V(4) - U(4) )mod4 * N_TB(2) + N(8)
PUCCH found resource set 3
PUCCH format 3 nb symbols 8 uci size 8 selected format 3
PUCCH dedicated configuration with resource index 28
PUCCH Adjust number of prb : (N_UCI : 8 ) (payload_in_bits : 36) (N_sc_ctrl_RB : 12) (nb_symbols : 6) (Q_m : 2) (max_code_rate*100 : 25)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 8 data 0xff ) ( ack length 8 data 0xff ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 3 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 6 ) ( max code rate*100 : 25 ) ( starting_symbol_index : 3 )
PUCCH ( starting_prb : 4 ) ( second_hop : 4 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 6 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 4 ) ( DELTA_TF : -1 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 2 transport blocks : with 4 downlink ACKnowledgments and pucch resource indicator 6
PUCCH power n(8) = ( V(4) - U(4) )mod4 * N_TB(2) + N(8)
PUCCH found resource set 3
PUCCH format 3 nb symbols 10 uci size 8 selected format 3
PUCCH dedicated configuration with resource index 30
PUCCH Adjust number of prb : (N_UCI : 8 ) (payload_in_bits : 48) (N_sc_ctrl_RB : 12) (nb_symbols : 8) (Q_m : 2) (max_code_rate*100 : 25)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 8 data 0xff ) ( ack length 8 data 0xff ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 3 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 8 ) ( max code rate*100 : 25 ) ( starting_symbol_index : 3 )
PUCCH ( starting_prb : 4 ) ( second_hop : 4 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 4 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 4 ) ( DELTA_TF : -3 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 2 transport blocks and 1 missed PDSCH : with 4 downlink ACKnowledgments and pucch resource indicator 4
PUCCH power n(8) = ( V(4) - U(3) )mod4 * N_TB(2) + N(6)
PUCCH found resource set 3
PUCCH format 3 nb symbols 10 uci size 8 selected format 3
PUCCH dedicated configuration with resource index 30
PUCCH Adjust number of prb : (N_UCI : 8 ) (payload_in_bits : 48) (N_sc_ctrl_RB : 12) (nb_symbols : 8) (Q_m : 2) (max_code_rate*100 : 25)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 8 data 0xfc ) ( ack length 8 data 0xfc ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 3 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 8 ) ( max code rate*100 : 25 ) ( starting_symbol_index : 3 )
PUCCH ( starting_prb : 4 ) ( second_hop : 4 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 4 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 4 ) ( DELTA_TF : -3 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with 2 transport blocks and 2 missed PDSCH : with 4 downlink ACKnowledgments and pucch resource indicator 4
PUCCH power n(8) = ( V(4) - U(2) )mod4 * N_TB(2) + N(4)
PUCCH found resource set 3
PUCCH format 3 nb symbols 10 uci size 8 selected format 3
PUCCH dedicated configuration with resource index 30
PUCCH Adjust number of prb : (N_UCI : 8 ) (payload_in_bits : 48) (N_sc_ctrl_RB : 12) (nb_symbols : 8) (Q_m : 2) (max_code_rate*100 : 25)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 8 data 0xcc ) ( ack length 8 data 0xcc ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 3 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 8 ) ( max code rate*100 : 25 ) ( starting_symbol_index : 3 )
PUCCH ( starting_prb : 4 ) ( second_hop : 4 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 4 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 4 ) ( DELTA_TF : -3 ) ( G_b_f_c : 0 )
-------------------------------------------------------------------------------------------
=> Test : PUCCH format from dedicated config with only a negative scheduling request : no PUCCH should be generated
PUCCH No feedback AbsSubframe 0.4
[PHY][D][pucch_procedures_ue_nr] PUCCH No feedback AbsSubframe 0.4
=> Test : PUCCH format 0 from dedicated config with only a positive scheduling request
PUCCH found resource set 0
PUCCH format 0 nb symbols 1 uci size 1 selected format 0
PUCCH dedicated configuration with resource index 0
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 0 data 0x00 ) ( ack length 0 data 0x00 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 0 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 1 ) ( max code rate*100 : 0 ) ( starting_symbol_index : 0 )
PUCCH ( starting_prb : 1 ) ( second_hop : 1 ) ( m_0 : 2 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 7 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 1 ) ( DELTA_TF : 3 ) ( G_b_f_c : 0 )
=> Test : PUCCH format 1 from dedicated config with only a positive scheduling request
PUCCH found resource set 0
PUCCH format 1 nb symbols 5 uci size 1 selected format 1
PUCCH dedicated configuration with resource index 1
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 1 data 0x00 ) ( ack length 0 data 0x00 ) ( sr length 1 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 1 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 5 ) ( max code rate*100 : 8 ) ( starting_symbol_index : 0 )
PUCCH ( starting_prb : 1 ) ( second_hop : 1 ) ( m_0 : 2 ) ( m_CS : 0 ) ( time_domain_occ 1 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 8 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 2 ) ( DELTA_TF : 3 ) ( G_b_f_c : 0 )
-------------------------------------------------------------------------------------------
=> Test : PUCCH format from dedicated config with a negative scheduling request and a positive ack
PUCCH power n(1) = ( V(1) - U(1) )mod4 * N_TB(1) + N(1)
PUCCH found resource set 0
PUCCH format 0 nb symbols 1 uci size 2 selected format 0
PUCCH dedicated configuration with resource index 0
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 0 data 0x00 ) ( ack length 0 data 0x00 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 0 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 1 ) ( max code rate*100 : 0 ) ( starting_symbol_index : 0 )
PUCCH ( starting_prb : 1 ) ( second_hop : 1 ) ( m_0 : 2 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 7 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 1 ) ( DELTA_TF : 3 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with a positive scheduling request and a positive ack
PUCCH power n(1) = ( V(1) - U(1) )mod4 * N_TB(1) + N(1)
PUCCH found resource set 0
PUCCH format 0 nb symbols 1 uci size 2 selected format 0
PUCCH dedicated configuration with resource index 0
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 0 data 0x00 ) ( ack length 0 data 0x00 ) ( sr length 0 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 0 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 1 ) ( max code rate*100 : 0 ) ( starting_symbol_index : 0 )
PUCCH ( starting_prb : 1 ) ( second_hop : 1 ) ( m_0 : 2 ) ( m_CS : 9 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 7 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 1 ) ( DELTA_TF : 3 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with a positive scheduling request and a positive ack
PUCCH power n(1) = ( V(1) - U(1) )mod4 * N_TB(1) + N(1)
PUCCH found resource set 0
PUCCH format 1 nb symbols 5 uci size 2 selected format 1
PUCCH dedicated configuration with resource index 1
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 2 data 0x01 ) ( ack length 1 data 0x01 ) ( sr length 1 value 0 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 1 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 5 ) ( max code rate*100 : 8 ) ( starting_symbol_index : 0 )
PUCCH ( starting_prb : 1 ) ( second_hop : 1 ) ( m_0 : 2 ) ( m_CS : 0 ) ( time_domain_occ 1 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 8 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 2 ) ( DELTA_TF : 3 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with a positive scheduling request and two positive acks
PUCCH power n(2) = ( V(2) - U(2) )mod4 * N_TB(1) + N(2)
PUCCH found resource set 1
PUCCH format 2 nb symbols 2 uci size 3 selected format 2
PUCCH dedicated configuration with resource index 8
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 3 data 0x07 ) ( ack length 2 data 0x03 ) ( sr length 1 value 1 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 2 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 2 ) ( max code rate*100 : 15 ) ( starting_symbol_index : 1 )
PUCCH ( starting_prb : 2 ) ( second_hop : 2 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 6 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 3 ) ( DELTA_TF : 0 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with a positive scheduling request and two positive acks
PUCCH power n(2) = ( V(2) - U(2) )mod4 * N_TB(1) + N(2)
PUCCH found resource set 1
PUCCH format 3 nb symbols 5 uci size 3 selected format 3
PUCCH dedicated configuration with resource index 9
PUCCH Adjust number of prb : (N_UCI : 3 ) (payload_in_bits : 18) (N_sc_ctrl_RB : 12) (nb_symbols : 3) (Q_m : 2) (max_code_rate*100 : 25)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 3 data 0x07 ) ( ack length 2 data 0x03 ) ( sr length 1 value 1 ) ( csi length 0 data : 0x00 )
PUCCH ( format : 3 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 3 ) ( max code rate*100 : 25 ) ( starting_symbol_index : 1 )
PUCCH ( starting_prb : 2 ) ( second_hop : 2 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 4 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 4 ) ( DELTA_TF : -3 ) ( G_b_f_c : 0 )
-------------------------------------------------------------------------------------------
=> Test : PUCCH format from dedicated config with CSI alone
PUCCH found resource set 2
PUCCH format 2 nb symbols 2 uci size 4 selected format 2
PUCCH dedicated configuration with resource index 16
PUCCH Adjust number of prb : (N_UCI : 4 ) (payload_in_bits : 4) (N_sc_ctrl_RB : 8) (nb_symbols : 2) (Q_m : 2) (max_code_rate*100 : 15)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 4 data 0x0e ) ( ack length 0 data 0x00 ) ( sr length 0 value 0 ) ( csi length 4 data : 0x0e )
PUCCH ( format : 2 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 2 ) ( max code rate*100 : 15 ) ( starting_symbol_index : 2 )
PUCCH ( starting_prb : 3 ) ( second_hop : 3 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 7 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 3 ) ( DELTA_TF : 1 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with ACK and CSI
PUCCH power n(1) = ( V(1) - U(1) )mod4 * N_TB(1) + N(1)
PUCCH found resource set 2
PUCCH format 2 nb symbols 2 uci size 5 selected format 2
PUCCH dedicated configuration with resource index 19
PUCCH Adjust number of prb : (N_UCI : 5 ) (payload_in_bits : 4) (N_sc_ctrl_RB : 8) (nb_symbols : 2) (Q_m : 2) (max_code_rate*100 : 15)
PUCCH Adjust number of prb : (N_UCI : 5 ) (payload_in_bits : 9) (N_sc_ctrl_RB : 8) (nb_symbols : 2) (Q_m : 2) (max_code_rate*100 : 15)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 5 data 0x1d ) ( ack length 1 data 0x01 ) ( sr length 0 value 0 ) ( csi length 4 data : 0x0e )
PUCCH ( format : 2 ) ( modulation : QPSK ) ( nb prb : 2 ) ( nb symbols : 2 ) ( max code rate*100 : 15 ) ( starting_symbol_index : 2 )
PUCCH ( starting_prb : 3 ) ( second_hop : 3 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 9 dBm ) ( 10Log(...) : 3 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 3 ) ( DELTA_TF : 0 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with ACK, negative SR and CSI
PUCCH power n(1) = ( V(1) - U(1) )mod4 * N_TB(1) + N(1)
PUCCH found resource set 3
PUCCH format 3 nb symbols 7 uci size 6 selected format 3
PUCCH dedicated configuration with resource index 27
PUCCH Adjust number of prb : (N_UCI : 2 ) (payload_in_bits : 30) (N_sc_ctrl_RB : 12) (nb_symbols : 5) (Q_m : 2) (max_code_rate*100 : 25)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 2 data 0x01 ) ( ack length 1 data 0x01 ) ( sr length 1 value 0 ) ( csi length 4 data : 0x00 )
PUCCH ( format : 3 ) ( modulation : QPSK ) ( nb prb : 1 ) ( nb symbols : 5 ) ( max code rate*100 : 25 ) ( starting_symbol_index : 3 )
PUCCH ( starting_prb : 4 ) ( second_hop : 4 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 1 dBm ) ( 10Log(...) : 0 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 4 ) ( DELTA_TF : -6 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with negative SR and CSI
PUCCH found resource set 2
PUCCH format 2 nb symbols 2 uci size 5 selected format 2
PUCCH dedicated configuration with resource index 16
PUCCH Adjust number of prb : (N_UCI : 5 ) (payload_in_bits : 4) (N_sc_ctrl_RB : 8) (nb_symbols : 2) (Q_m : 2) (max_code_rate*100 : 15)
PUCCH Adjust number of prb : (N_UCI : 5 ) (payload_in_bits : 9) (N_sc_ctrl_RB : 8) (nb_symbols : 2) (Q_m : 2) (max_code_rate*100 : 15)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 5 data 0x1c ) ( ack length 0 data 0x00 ) ( sr length 1 value 0 ) ( csi length 4 data : 0x0e )
PUCCH ( format : 2 ) ( modulation : QPSK ) ( nb prb : 2 ) ( nb symbols : 2 ) ( max code rate*100 : 15 ) ( starting_symbol_index : 2 )
PUCCH ( starting_prb : 3 ) ( second_hop : 3 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 9 dBm ) ( 10Log(...) : 3 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 3 ) ( DELTA_TF : 0 ) ( G_b_f_c : 0 )
=> Test : PUCCH format from dedicated config with positive SR and CSI
PUCCH found resource set 2
PUCCH format 2 nb symbols 2 uci size 5 selected format 2
PUCCH dedicated configuration with resource index 16
PUCCH Adjust number of prb : (N_UCI : 5 ) (payload_in_bits : 4) (N_sc_ctrl_RB : 8) (nb_symbols : 2) (Q_m : 2) (max_code_rate*100 : 15)
PUCCH Adjust number of prb : (N_UCI : 5 ) (payload_in_bits : 9) (N_sc_ctrl_RB : 8) (nb_symbols : 2) (Q_m : 2) (max_code_rate*100 : 15)
PUCCH ( AbsSubframe : 0.4 ) ( total payload size 5 data 0x1d ) ( ack length 0 data 0x00 ) ( sr length 1 value 1 ) ( csi length 4 data : 0x0e )
PUCCH ( format : 2 ) ( modulation : QPSK ) ( nb prb : 2 ) ( nb symbols : 2 ) ( max code rate*100 : 15 ) ( starting_symbol_index : 2 )
PUCCH ( starting_prb : 3 ) ( second_hop : 3 ) ( m_0 : 0 ) ( m_CS : 0 ) ( time_domain_occ 0 ) (occ_length : 0 ) ( occ_Index : 0 )
[PHY][D][get_PL] get_PL : Frame 0 : rsrp 0.000000 dBm/RE (-inf), eNB power 0 dBm/RE
PUCCH ( Tx power : 9 dBm ) ( 10Log(...) : 3 ) ( from Path Loss : 0 ) ( delta_F_PUCCH : 3 ) ( DELTA_TF : 0 ) ( G_b_f_c : 0 )
Release default pucch dedicated configuration
Test PUCCH is pass
openair1/SIMULATION/NR_UE_PHY/unit_tests/build/reflogs/srs_test.txt
+491906
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openair1/SIMULATION/NR_UE_PHY/unit_tests/build/reflogs/sss_test.txt
+709
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@@ -0,0 +1,709 @@
SSS TEST
----------
log init done
Start lte_param_init, frame_type 0, extended_prefix 0
[PHY][I][nr_init_frame_parms_ue] Initializing frame parms for mu 1, N_RB 106, Ncp 0
Initializing UE vars (abstraction 0) for eNB TXant 1, UE RXant 1
***********************************
SSS NR Test synchronisation
***********************************
------------------------------------------------
Test nr pss with Nid2 0 at position 0
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 0, val = 232379536 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 0, val = 232379536 (41 dB)
Test nr sss with Nid1 0
(phase,Nid1) (0,0), metric_phase -201728 tot_metric -201728, phase_max 0
(phase,Nid1) (0,1), metric_phase 2048 tot_metric 2048, phase_max 0
(phase,Nid1) (0,3), metric_phase 18432 tot_metric 18432, phase_max 0
(phase,Nid1) (0,8), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,13), metric_phase 22528 tot_metric 22528, phase_max 0
(phase,Nid1) (0,113), metric_phase 43008 tot_metric 43008, phase_max 0
(phase,Nid1) (0,135), metric_phase 45056 tot_metric 45056, phase_max 0
(phase,Nid1) (0,287), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (1,0), metric_phase 48128 tot_metric 48128, phase_max 1
(phase,Nid1) (2,0), metric_phase 310272 tot_metric 310272, phase_max 2
(phase,Nid1) (3,0), metric_phase 498176 tot_metric 498176, phase_max 3
(phase,Nid1) (4,0), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,0), metric_phase 760832 tot_metric 760832, phase_max 5
Nid2 0 Nid1 0 tot_metric 760832, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 0 Nid1 0 Nid2 0
------------------------------------------------
Test nr pss with Nid2 0 at position 492
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 492, val = 232379536 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 492, val = 232379536 (41 dB)
Test nr sss with Nid1 0
(phase,Nid1) (0,0), metric_phase -201728 tot_metric -201728, phase_max 0
(phase,Nid1) (0,1), metric_phase 2048 tot_metric 2048, phase_max 0
(phase,Nid1) (0,3), metric_phase 18432 tot_metric 18432, phase_max 0
(phase,Nid1) (0,8), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,13), metric_phase 22528 tot_metric 22528, phase_max 0
(phase,Nid1) (0,113), metric_phase 43008 tot_metric 43008, phase_max 0
(phase,Nid1) (0,135), metric_phase 45056 tot_metric 45056, phase_max 0
(phase,Nid1) (0,287), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (1,0), metric_phase 48128 tot_metric 48128, phase_max 1
(phase,Nid1) (2,0), metric_phase 310272 tot_metric 310272, phase_max 2
(phase,Nid1) (3,0), metric_phase 498176 tot_metric 498176, phase_max 3
(phase,Nid1) (4,0), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,0), metric_phase 760832 tot_metric 760832, phase_max 5
Nid2 0 Nid1 0 tot_metric 760832, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 492 Nid1 0 Nid2 0
------------------------------------------------
Test nr pss with Nid2 0 at position 493
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 492, val = 230217517 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 492, val = 230217517 (41 dB)
Test nr sss with Nid1 0
(phase,Nid1) (0,0), metric_phase -201728 tot_metric -201728, phase_max 0
(phase,Nid1) (0,1), metric_phase 2048 tot_metric 2048, phase_max 0
(phase,Nid1) (0,3), metric_phase 18432 tot_metric 18432, phase_max 0
(phase,Nid1) (0,8), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,13), metric_phase 22528 tot_metric 22528, phase_max 0
(phase,Nid1) (0,113), metric_phase 43008 tot_metric 43008, phase_max 0
(phase,Nid1) (0,135), metric_phase 45056 tot_metric 45056, phase_max 0
(phase,Nid1) (0,287), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (1,0), metric_phase 48128 tot_metric 48128, phase_max 1
(phase,Nid1) (2,0), metric_phase 310272 tot_metric 310272, phase_max 2
(phase,Nid1) (3,0), metric_phase 498176 tot_metric 498176, phase_max 3
(phase,Nid1) (4,0), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,0), metric_phase 760832 tot_metric 760832, phase_max 5
Nid2 0 Nid1 0 tot_metric 760832, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 493 Nid1 0 Nid2 0
------------------------------------------------
Test nr pss with Nid2 0 at position 56788
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 56788, val = 232379536 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 56788, val = 232379536 (41 dB)
Test nr sss with Nid1 0
(phase,Nid1) (0,0), metric_phase -201728 tot_metric -201728, phase_max 0
(phase,Nid1) (0,1), metric_phase 2048 tot_metric 2048, phase_max 0
(phase,Nid1) (0,3), metric_phase 18432 tot_metric 18432, phase_max 0
(phase,Nid1) (0,8), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,13), metric_phase 22528 tot_metric 22528, phase_max 0
(phase,Nid1) (0,113), metric_phase 43008 tot_metric 43008, phase_max 0
(phase,Nid1) (0,135), metric_phase 45056 tot_metric 45056, phase_max 0
(phase,Nid1) (0,287), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (1,0), metric_phase 48128 tot_metric 48128, phase_max 1
(phase,Nid1) (2,0), metric_phase 310272 tot_metric 310272, phase_max 2
(phase,Nid1) (3,0), metric_phase 498176 tot_metric 498176, phase_max 3
(phase,Nid1) (4,0), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,0), metric_phase 760832 tot_metric 760832, phase_max 5
Nid2 0 Nid1 0 tot_metric 760832, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 56788 Nid1 0 Nid2 0
------------------------------------------------
Test nr pss with Nid2 0 at position 111111
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 111112, val = 230349320 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 111112, val = 230349320 (41 dB)
Test nr sss with Nid1 0
(phase,Nid1) (0,0), metric_phase -201728 tot_metric -201728, phase_max 0
(phase,Nid1) (0,1), metric_phase 2048 tot_metric 2048, phase_max 0
(phase,Nid1) (0,3), metric_phase 18432 tot_metric 18432, phase_max 0
(phase,Nid1) (0,8), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,13), metric_phase 22528 tot_metric 22528, phase_max 0
(phase,Nid1) (0,113), metric_phase 43008 tot_metric 43008, phase_max 0
(phase,Nid1) (0,135), metric_phase 45056 tot_metric 45056, phase_max 0
(phase,Nid1) (0,287), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (1,0), metric_phase 48128 tot_metric 48128, phase_max 1
(phase,Nid1) (2,0), metric_phase 310272 tot_metric 310272, phase_max 2
(phase,Nid1) (3,0), metric_phase 498176 tot_metric 498176, phase_max 3
(phase,Nid1) (4,0), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,0), metric_phase 760832 tot_metric 760832, phase_max 5
Nid2 0 Nid1 0 tot_metric 760832, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 111111 Nid1 0 Nid2 0
------------------------------------------------
Test nr pss with Nid2 0 at position 222222
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 222224, val = 219912170 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 222224, val = 219912170 (41 dB)
Test nr sss with Nid1 0
(phase,Nid1) (0,0), metric_phase -201728 tot_metric -201728, phase_max 0
(phase,Nid1) (0,1), metric_phase 2048 tot_metric 2048, phase_max 0
(phase,Nid1) (0,3), metric_phase 18432 tot_metric 18432, phase_max 0
(phase,Nid1) (0,8), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,13), metric_phase 22528 tot_metric 22528, phase_max 0
(phase,Nid1) (0,113), metric_phase 43008 tot_metric 43008, phase_max 0
(phase,Nid1) (0,135), metric_phase 45056 tot_metric 45056, phase_max 0
(phase,Nid1) (0,287), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (1,0), metric_phase 48128 tot_metric 48128, phase_max 1
(phase,Nid1) (2,0), metric_phase 310272 tot_metric 310272, phase_max 2
(phase,Nid1) (3,0), metric_phase 498176 tot_metric 498176, phase_max 3
(phase,Nid1) (4,0), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,0), metric_phase 760832 tot_metric 760832, phase_max 5
Nid2 0 Nid1 0 tot_metric 760832, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 222222 Nid1 0 Nid2 0
------------------------------------------------
Test nr pss with Nid2 0 at position 0
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 0, val = 232379536 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 0, val = 232379536 (41 dB)
Test nr sss with Nid1 71
(phase,Nid1) (0,0), metric_phase -14336 tot_metric -14336, phase_max 0
(phase,Nid1) (0,1), metric_phase 2048 tot_metric 2048, phase_max 0
(phase,Nid1) (0,3), metric_phase 18432 tot_metric 18432, phase_max 0
(phase,Nid1) (0,8), metric_phase 20480 tot_metric 20480, phase_max 0
(phase,Nid1) (0,23), metric_phase 22528 tot_metric 22528, phase_max 0
(phase,Nid1) (0,79), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,113), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,226), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (1,71), metric_phase 60928 tot_metric 60928, phase_max 1
(phase,Nid1) (2,71), metric_phase 324608 tot_metric 324608, phase_max 2
(phase,Nid1) (3,71), metric_phase 509440 tot_metric 509440, phase_max 3
(phase,Nid1) (4,71), metric_phase 650240 tot_metric 650240, phase_max 4
(phase,Nid1) (5,71), metric_phase 770560 tot_metric 770560, phase_max 5
Nid2 0 Nid1 71 tot_metric 770560, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 0 Nid1 71 Nid2 0
------------------------------------------------
Test nr pss with Nid2 0 at position 492
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 492, val = 232379536 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 492, val = 232379536 (41 dB)
Test nr sss with Nid1 71
(phase,Nid1) (0,0), metric_phase -14336 tot_metric -14336, phase_max 0
(phase,Nid1) (0,1), metric_phase 2048 tot_metric 2048, phase_max 0
(phase,Nid1) (0,3), metric_phase 18432 tot_metric 18432, phase_max 0
(phase,Nid1) (0,8), metric_phase 20480 tot_metric 20480, phase_max 0
(phase,Nid1) (0,23), metric_phase 22528 tot_metric 22528, phase_max 0
(phase,Nid1) (0,79), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,113), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,226), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (1,71), metric_phase 60928 tot_metric 60928, phase_max 1
(phase,Nid1) (2,71), metric_phase 324608 tot_metric 324608, phase_max 2
(phase,Nid1) (3,71), metric_phase 509440 tot_metric 509440, phase_max 3
(phase,Nid1) (4,71), metric_phase 650240 tot_metric 650240, phase_max 4
(phase,Nid1) (5,71), metric_phase 770560 tot_metric 770560, phase_max 5
Nid2 0 Nid1 71 tot_metric 770560, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 492 Nid1 71 Nid2 0
------------------------------------------------
Test nr pss with Nid2 0 at position 493
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 492, val = 230217517 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 492, val = 230217517 (41 dB)
Test nr sss with Nid1 71
(phase,Nid1) (0,0), metric_phase -14336 tot_metric -14336, phase_max 0
(phase,Nid1) (0,1), metric_phase 2048 tot_metric 2048, phase_max 0
(phase,Nid1) (0,3), metric_phase 18432 tot_metric 18432, phase_max 0
(phase,Nid1) (0,8), metric_phase 20480 tot_metric 20480, phase_max 0
(phase,Nid1) (0,23), metric_phase 22528 tot_metric 22528, phase_max 0
(phase,Nid1) (0,79), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,113), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,226), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (1,71), metric_phase 60928 tot_metric 60928, phase_max 1
(phase,Nid1) (2,71), metric_phase 324608 tot_metric 324608, phase_max 2
(phase,Nid1) (3,71), metric_phase 509440 tot_metric 509440, phase_max 3
(phase,Nid1) (4,71), metric_phase 650240 tot_metric 650240, phase_max 4
(phase,Nid1) (5,71), metric_phase 770560 tot_metric 770560, phase_max 5
Nid2 0 Nid1 71 tot_metric 770560, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 493 Nid1 71 Nid2 0
------------------------------------------------
Test nr pss with Nid2 0 at position 56788
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 56788, val = 232379536 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 56788, val = 232379536 (41 dB)
Test nr sss with Nid1 71
(phase,Nid1) (0,0), metric_phase -14336 tot_metric -14336, phase_max 0
(phase,Nid1) (0,1), metric_phase 2048 tot_metric 2048, phase_max 0
(phase,Nid1) (0,3), metric_phase 18432 tot_metric 18432, phase_max 0
(phase,Nid1) (0,8), metric_phase 20480 tot_metric 20480, phase_max 0
(phase,Nid1) (0,23), metric_phase 22528 tot_metric 22528, phase_max 0
(phase,Nid1) (0,79), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,113), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,226), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (1,71), metric_phase 60928 tot_metric 60928, phase_max 1
(phase,Nid1) (2,71), metric_phase 324608 tot_metric 324608, phase_max 2
(phase,Nid1) (3,71), metric_phase 509440 tot_metric 509440, phase_max 3
(phase,Nid1) (4,71), metric_phase 650240 tot_metric 650240, phase_max 4
(phase,Nid1) (5,71), metric_phase 770560 tot_metric 770560, phase_max 5
Nid2 0 Nid1 71 tot_metric 770560, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 56788 Nid1 71 Nid2 0
------------------------------------------------
Test nr pss with Nid2 0 at position 111111
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 111112, val = 230349320 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 111112, val = 230349320 (41 dB)
Test nr sss with Nid1 71
(phase,Nid1) (0,0), metric_phase -14336 tot_metric -14336, phase_max 0
(phase,Nid1) (0,1), metric_phase 2048 tot_metric 2048, phase_max 0
(phase,Nid1) (0,3), metric_phase 18432 tot_metric 18432, phase_max 0
(phase,Nid1) (0,8), metric_phase 20480 tot_metric 20480, phase_max 0
(phase,Nid1) (0,23), metric_phase 22528 tot_metric 22528, phase_max 0
(phase,Nid1) (0,79), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,113), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,226), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (1,71), metric_phase 60928 tot_metric 60928, phase_max 1
(phase,Nid1) (2,71), metric_phase 324608 tot_metric 324608, phase_max 2
(phase,Nid1) (3,71), metric_phase 509440 tot_metric 509440, phase_max 3
(phase,Nid1) (4,71), metric_phase 650240 tot_metric 650240, phase_max 4
(phase,Nid1) (5,71), metric_phase 770560 tot_metric 770560, phase_max 5
Nid2 0 Nid1 71 tot_metric 770560, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 111111 Nid1 71 Nid2 0
------------------------------------------------
Test nr pss with Nid2 0 at position 222222
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 0, Peak found at pos 222224, val = 219912170 (41 dB)
[UE] nr_synchro_time: Sync source = 0, Peak found at pos 222224, val = 219912170 (41 dB)
Test nr sss with Nid1 71
(phase,Nid1) (0,0), metric_phase -14336 tot_metric -14336, phase_max 0
(phase,Nid1) (0,1), metric_phase 2048 tot_metric 2048, phase_max 0
(phase,Nid1) (0,3), metric_phase 18432 tot_metric 18432, phase_max 0
(phase,Nid1) (0,8), metric_phase 20480 tot_metric 20480, phase_max 0
(phase,Nid1) (0,23), metric_phase 22528 tot_metric 22528, phase_max 0
(phase,Nid1) (0,79), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,113), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,226), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (1,71), metric_phase 60928 tot_metric 60928, phase_max 1
(phase,Nid1) (2,71), metric_phase 324608 tot_metric 324608, phase_max 2
(phase,Nid1) (3,71), metric_phase 509440 tot_metric 509440, phase_max 3
(phase,Nid1) (4,71), metric_phase 650240 tot_metric 650240, phase_max 4
(phase,Nid1) (5,71), metric_phase 770560 tot_metric 770560, phase_max 5
Nid2 0 Nid1 71 tot_metric 770560, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 222222 Nid1 71 Nid2 0
------------------------------------------------
Test nr pss with Nid2 2 at position 0
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 0, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 0, val = 231344100 (41 dB)
Test nr sss with Nid1 21
(phase,Nid1) (0,0), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,8), metric_phase 21504 tot_metric 21504, phase_max 0
(phase,Nid1) (0,13), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,88), metric_phase 24576 tot_metric 24576, phase_max 0
(phase,Nid1) (0,124), metric_phase 41984 tot_metric 41984, phase_max 0
(phase,Nid1) (0,135), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,319), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (2,21), metric_phase 308736 tot_metric 308736, phase_max 2
(phase,Nid1) (3,21), metric_phase 494592 tot_metric 494592, phase_max 3
(phase,Nid1) (4,21), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,21), metric_phase 759808 tot_metric 759808, phase_max 5
Nid2 2 Nid1 21 tot_metric 759808, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 0 Nid1 21 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 492
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 231344100 (41 dB)
Test nr sss with Nid1 21
(phase,Nid1) (0,0), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,8), metric_phase 21504 tot_metric 21504, phase_max 0
(phase,Nid1) (0,13), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,88), metric_phase 24576 tot_metric 24576, phase_max 0
(phase,Nid1) (0,124), metric_phase 41984 tot_metric 41984, phase_max 0
(phase,Nid1) (0,135), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,319), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (2,21), metric_phase 308736 tot_metric 308736, phase_max 2
(phase,Nid1) (3,21), metric_phase 494592 tot_metric 494592, phase_max 3
(phase,Nid1) (4,21), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,21), metric_phase 759808 tot_metric 759808, phase_max 5
Nid2 2 Nid1 21 tot_metric 759808, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 492 Nid1 21 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 493
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 229165600 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 229165600 (41 dB)
Test nr sss with Nid1 21
(phase,Nid1) (0,0), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,8), metric_phase 21504 tot_metric 21504, phase_max 0
(phase,Nid1) (0,13), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,88), metric_phase 24576 tot_metric 24576, phase_max 0
(phase,Nid1) (0,124), metric_phase 41984 tot_metric 41984, phase_max 0
(phase,Nid1) (0,135), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,319), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (2,21), metric_phase 308736 tot_metric 308736, phase_max 2
(phase,Nid1) (3,21), metric_phase 494592 tot_metric 494592, phase_max 3
(phase,Nid1) (4,21), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,21), metric_phase 759808 tot_metric 759808, phase_max 5
Nid2 2 Nid1 21 tot_metric 759808, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 493 Nid1 21 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 56788
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 56788, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 56788, val = 231344100 (41 dB)
Test nr sss with Nid1 21
(phase,Nid1) (0,0), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,8), metric_phase 21504 tot_metric 21504, phase_max 0
(phase,Nid1) (0,13), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,88), metric_phase 24576 tot_metric 24576, phase_max 0
(phase,Nid1) (0,124), metric_phase 41984 tot_metric 41984, phase_max 0
(phase,Nid1) (0,135), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,319), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (2,21), metric_phase 308736 tot_metric 308736, phase_max 2
(phase,Nid1) (3,21), metric_phase 494592 tot_metric 494592, phase_max 3
(phase,Nid1) (4,21), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,21), metric_phase 759808 tot_metric 759808, phase_max 5
Nid2 2 Nid1 21 tot_metric 759808, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 56788 Nid1 21 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 111111
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 111112, val = 229601794 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 111112, val = 229601794 (41 dB)
Test nr sss with Nid1 21
(phase,Nid1) (0,0), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,8), metric_phase 21504 tot_metric 21504, phase_max 0
(phase,Nid1) (0,13), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,88), metric_phase 24576 tot_metric 24576, phase_max 0
(phase,Nid1) (0,124), metric_phase 41984 tot_metric 41984, phase_max 0
(phase,Nid1) (0,135), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,319), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (2,21), metric_phase 308736 tot_metric 308736, phase_max 2
(phase,Nid1) (3,21), metric_phase 494592 tot_metric 494592, phase_max 3
(phase,Nid1) (4,21), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,21), metric_phase 759808 tot_metric 759808, phase_max 5
Nid2 2 Nid1 21 tot_metric 759808, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 111111 Nid1 21 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 222222
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 222224, val = 219559301 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 222224, val = 219559301 (41 dB)
Test nr sss with Nid1 21
(phase,Nid1) (0,0), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,8), metric_phase 21504 tot_metric 21504, phase_max 0
(phase,Nid1) (0,13), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,88), metric_phase 24576 tot_metric 24576, phase_max 0
(phase,Nid1) (0,124), metric_phase 41984 tot_metric 41984, phase_max 0
(phase,Nid1) (0,135), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,319), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (2,21), metric_phase 308736 tot_metric 308736, phase_max 2
(phase,Nid1) (3,21), metric_phase 494592 tot_metric 494592, phase_max 3
(phase,Nid1) (4,21), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,21), metric_phase 759808 tot_metric 759808, phase_max 5
Nid2 2 Nid1 21 tot_metric 759808, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 222222 Nid1 21 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 0
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 0, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 0, val = 231344100 (41 dB)
Test nr sss with Nid1 21
(phase,Nid1) (0,0), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,8), metric_phase 21504 tot_metric 21504, phase_max 0
(phase,Nid1) (0,13), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,88), metric_phase 24576 tot_metric 24576, phase_max 0
(phase,Nid1) (0,124), metric_phase 41984 tot_metric 41984, phase_max 0
(phase,Nid1) (0,135), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,319), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (2,21), metric_phase 308736 tot_metric 308736, phase_max 2
(phase,Nid1) (3,21), metric_phase 494592 tot_metric 494592, phase_max 3
(phase,Nid1) (4,21), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,21), metric_phase 759808 tot_metric 759808, phase_max 5
Nid2 2 Nid1 21 tot_metric 759808, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 0 Nid1 21 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 492
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 231344100 (41 dB)
Test nr sss with Nid1 21
(phase,Nid1) (0,0), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,8), metric_phase 21504 tot_metric 21504, phase_max 0
(phase,Nid1) (0,13), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,88), metric_phase 24576 tot_metric 24576, phase_max 0
(phase,Nid1) (0,124), metric_phase 41984 tot_metric 41984, phase_max 0
(phase,Nid1) (0,135), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,319), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (2,21), metric_phase 308736 tot_metric 308736, phase_max 2
(phase,Nid1) (3,21), metric_phase 494592 tot_metric 494592, phase_max 3
(phase,Nid1) (4,21), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,21), metric_phase 759808 tot_metric 759808, phase_max 5
Nid2 2 Nid1 21 tot_metric 759808, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 492 Nid1 21 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 493
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 229165600 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 229165600 (41 dB)
Test nr sss with Nid1 21
(phase,Nid1) (0,0), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,8), metric_phase 21504 tot_metric 21504, phase_max 0
(phase,Nid1) (0,13), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,88), metric_phase 24576 tot_metric 24576, phase_max 0
(phase,Nid1) (0,124), metric_phase 41984 tot_metric 41984, phase_max 0
(phase,Nid1) (0,135), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,319), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (2,21), metric_phase 308736 tot_metric 308736, phase_max 2
(phase,Nid1) (3,21), metric_phase 494592 tot_metric 494592, phase_max 3
(phase,Nid1) (4,21), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,21), metric_phase 759808 tot_metric 759808, phase_max 5
Nid2 2 Nid1 21 tot_metric 759808, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 493 Nid1 21 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 56788
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 56788, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 56788, val = 231344100 (41 dB)
Test nr sss with Nid1 21
(phase,Nid1) (0,0), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,8), metric_phase 21504 tot_metric 21504, phase_max 0
(phase,Nid1) (0,13), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,88), metric_phase 24576 tot_metric 24576, phase_max 0
(phase,Nid1) (0,124), metric_phase 41984 tot_metric 41984, phase_max 0
(phase,Nid1) (0,135), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,319), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (2,21), metric_phase 308736 tot_metric 308736, phase_max 2
(phase,Nid1) (3,21), metric_phase 494592 tot_metric 494592, phase_max 3
(phase,Nid1) (4,21), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,21), metric_phase 759808 tot_metric 759808, phase_max 5
Nid2 2 Nid1 21 tot_metric 759808, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 56788 Nid1 21 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 111111
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 111112, val = 229601794 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 111112, val = 229601794 (41 dB)
Test nr sss with Nid1 21
(phase,Nid1) (0,0), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,8), metric_phase 21504 tot_metric 21504, phase_max 0
(phase,Nid1) (0,13), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,88), metric_phase 24576 tot_metric 24576, phase_max 0
(phase,Nid1) (0,124), metric_phase 41984 tot_metric 41984, phase_max 0
(phase,Nid1) (0,135), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,319), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (2,21), metric_phase 308736 tot_metric 308736, phase_max 2
(phase,Nid1) (3,21), metric_phase 494592 tot_metric 494592, phase_max 3
(phase,Nid1) (4,21), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,21), metric_phase 759808 tot_metric 759808, phase_max 5
Nid2 2 Nid1 21 tot_metric 759808, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 111111 Nid1 21 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 222222
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 222224, val = 219559301 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 222224, val = 219559301 (41 dB)
Test nr sss with Nid1 21
(phase,Nid1) (0,0), metric_phase 19456 tot_metric 19456, phase_max 0
(phase,Nid1) (0,8), metric_phase 21504 tot_metric 21504, phase_max 0
(phase,Nid1) (0,13), metric_phase 23552 tot_metric 23552, phase_max 0
(phase,Nid1) (0,88), metric_phase 24576 tot_metric 24576, phase_max 0
(phase,Nid1) (0,124), metric_phase 41984 tot_metric 41984, phase_max 0
(phase,Nid1) (0,135), metric_phase 46080 tot_metric 46080, phase_max 0
(phase,Nid1) (0,319), metric_phase 47104 tot_metric 47104, phase_max 0
(phase,Nid1) (2,21), metric_phase 308736 tot_metric 308736, phase_max 2
(phase,Nid1) (3,21), metric_phase 494592 tot_metric 494592, phase_max 3
(phase,Nid1) (4,21), metric_phase 642048 tot_metric 642048, phase_max 4
(phase,Nid1) (5,21), metric_phase 759808 tot_metric 759808, phase_max 5
Nid2 2 Nid1 21 tot_metric 759808, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 222222 Nid1 21 Nid2 2
------------------------------------------------
Test nr pss with Nid2 1 at position 0
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 0, val = 232105225 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 0, val = 232105225 (41 dB)
Test nr sss with Nid1 55
(phase,Nid1) (0,0), metric_phase -1536 tot_metric -1536, phase_max 0
(phase,Nid1) (0,1), metric_phase 1536 tot_metric 1536, phase_max 0
(phase,Nid1) (0,2), metric_phase 5632 tot_metric 5632, phase_max 0
(phase,Nid1) (0,3), metric_phase 20992 tot_metric 20992, phase_max 0
(phase,Nid1) (0,13), metric_phase 23040 tot_metric 23040, phase_max 0
(phase,Nid1) (0,120), metric_phase 28160 tot_metric 28160, phase_max 0
(phase,Nid1) (0,135), metric_phase 43520 tot_metric 43520, phase_max 0
(phase,Nid1) (0,228), metric_phase 44544 tot_metric 44544, phase_max 0
(phase,Nid1) (1,55), metric_phase 61440 tot_metric 61440, phase_max 1
(phase,Nid1) (2,55), metric_phase 326144 tot_metric 326144, phase_max 2
(phase,Nid1) (3,55), metric_phase 507392 tot_metric 507392, phase_max 3
(phase,Nid1) (4,55), metric_phase 651264 tot_metric 651264, phase_max 4
(phase,Nid1) (5,55), metric_phase 770560 tot_metric 770560, phase_max 5
Nid2 1 Nid1 55 tot_metric 770560, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 0 Nid1 55 Nid2 1
------------------------------------------------
Test nr pss with Nid2 1 at position 492
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 492, val = 232105225 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 492, val = 232105225 (41 dB)
Test nr sss with Nid1 55
(phase,Nid1) (0,0), metric_phase -1536 tot_metric -1536, phase_max 0
(phase,Nid1) (0,1), metric_phase 1536 tot_metric 1536, phase_max 0
(phase,Nid1) (0,2), metric_phase 5632 tot_metric 5632, phase_max 0
(phase,Nid1) (0,3), metric_phase 20992 tot_metric 20992, phase_max 0
(phase,Nid1) (0,13), metric_phase 23040 tot_metric 23040, phase_max 0
(phase,Nid1) (0,120), metric_phase 28160 tot_metric 28160, phase_max 0
(phase,Nid1) (0,135), metric_phase 43520 tot_metric 43520, phase_max 0
(phase,Nid1) (0,228), metric_phase 44544 tot_metric 44544, phase_max 0
(phase,Nid1) (1,55), metric_phase 61440 tot_metric 61440, phase_max 1
(phase,Nid1) (2,55), metric_phase 326144 tot_metric 326144, phase_max 2
(phase,Nid1) (3,55), metric_phase 507392 tot_metric 507392, phase_max 3
(phase,Nid1) (4,55), metric_phase 651264 tot_metric 651264, phase_max 4
(phase,Nid1) (5,55), metric_phase 770560 tot_metric 770560, phase_max 5
Nid2 1 Nid1 55 tot_metric 770560, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 492 Nid1 55 Nid2 1
------------------------------------------------
Test nr pss with Nid2 1 at position 493
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 492, val = 230099437 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 492, val = 230099437 (41 dB)
Test nr sss with Nid1 55
(phase,Nid1) (0,0), metric_phase -1536 tot_metric -1536, phase_max 0
(phase,Nid1) (0,1), metric_phase 1536 tot_metric 1536, phase_max 0
(phase,Nid1) (0,2), metric_phase 5632 tot_metric 5632, phase_max 0
(phase,Nid1) (0,3), metric_phase 20992 tot_metric 20992, phase_max 0
(phase,Nid1) (0,13), metric_phase 23040 tot_metric 23040, phase_max 0
(phase,Nid1) (0,120), metric_phase 28160 tot_metric 28160, phase_max 0
(phase,Nid1) (0,135), metric_phase 43520 tot_metric 43520, phase_max 0
(phase,Nid1) (0,228), metric_phase 44544 tot_metric 44544, phase_max 0
(phase,Nid1) (1,55), metric_phase 61440 tot_metric 61440, phase_max 1
(phase,Nid1) (2,55), metric_phase 326144 tot_metric 326144, phase_max 2
(phase,Nid1) (3,55), metric_phase 507392 tot_metric 507392, phase_max 3
(phase,Nid1) (4,55), metric_phase 651264 tot_metric 651264, phase_max 4
(phase,Nid1) (5,55), metric_phase 770560 tot_metric 770560, phase_max 5
Nid2 1 Nid1 55 tot_metric 770560, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 493 Nid1 55 Nid2 1
------------------------------------------------
Test nr pss with Nid2 1 at position 56788
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 56788, val = 232105225 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 56788, val = 232105225 (41 dB)
Test nr sss with Nid1 55
(phase,Nid1) (0,0), metric_phase -1536 tot_metric -1536, phase_max 0
(phase,Nid1) (0,1), metric_phase 1536 tot_metric 1536, phase_max 0
(phase,Nid1) (0,2), metric_phase 5632 tot_metric 5632, phase_max 0
(phase,Nid1) (0,3), metric_phase 20992 tot_metric 20992, phase_max 0
(phase,Nid1) (0,13), metric_phase 23040 tot_metric 23040, phase_max 0
(phase,Nid1) (0,120), metric_phase 28160 tot_metric 28160, phase_max 0
(phase,Nid1) (0,135), metric_phase 43520 tot_metric 43520, phase_max 0
(phase,Nid1) (0,228), metric_phase 44544 tot_metric 44544, phase_max 0
(phase,Nid1) (1,55), metric_phase 61440 tot_metric 61440, phase_max 1
(phase,Nid1) (2,55), metric_phase 326144 tot_metric 326144, phase_max 2
(phase,Nid1) (3,55), metric_phase 507392 tot_metric 507392, phase_max 3
(phase,Nid1) (4,55), metric_phase 651264 tot_metric 651264, phase_max 4
(phase,Nid1) (5,55), metric_phase 770560 tot_metric 770560, phase_max 5
Nid2 1 Nid1 55 tot_metric 770560, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 56788 Nid1 55 Nid2 1
------------------------------------------------
Test nr pss with Nid2 1 at position 111111
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 111112, val = 230409881 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 111112, val = 230409881 (41 dB)
Test nr sss with Nid1 55
(phase,Nid1) (0,0), metric_phase -1536 tot_metric -1536, phase_max 0
(phase,Nid1) (0,1), metric_phase 1536 tot_metric 1536, phase_max 0
(phase,Nid1) (0,2), metric_phase 5632 tot_metric 5632, phase_max 0
(phase,Nid1) (0,3), metric_phase 20992 tot_metric 20992, phase_max 0
(phase,Nid1) (0,13), metric_phase 23040 tot_metric 23040, phase_max 0
(phase,Nid1) (0,120), metric_phase 28160 tot_metric 28160, phase_max 0
(phase,Nid1) (0,135), metric_phase 43520 tot_metric 43520, phase_max 0
(phase,Nid1) (0,228), metric_phase 44544 tot_metric 44544, phase_max 0
(phase,Nid1) (1,55), metric_phase 61440 tot_metric 61440, phase_max 1
(phase,Nid1) (2,55), metric_phase 326144 tot_metric 326144, phase_max 2
(phase,Nid1) (3,55), metric_phase 507392 tot_metric 507392, phase_max 3
(phase,Nid1) (4,55), metric_phase 651264 tot_metric 651264, phase_max 4
(phase,Nid1) (5,55), metric_phase 770560 tot_metric 770560, phase_max 5
Nid2 1 Nid1 55 tot_metric 770560, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 111111 Nid1 55 Nid2 1
------------------------------------------------
Test nr pss with Nid2 1 at position 222222
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 222224, val = 219714314 (41 dB)
[UE] nr_synchro_time: Sync source = 1, Peak found at pos 222224, val = 219714314 (41 dB)
Test nr sss with Nid1 55
(phase,Nid1) (0,0), metric_phase -1536 tot_metric -1536, phase_max 0
(phase,Nid1) (0,1), metric_phase 1536 tot_metric 1536, phase_max 0
(phase,Nid1) (0,2), metric_phase 5632 tot_metric 5632, phase_max 0
(phase,Nid1) (0,3), metric_phase 20992 tot_metric 20992, phase_max 0
(phase,Nid1) (0,13), metric_phase 23040 tot_metric 23040, phase_max 0
(phase,Nid1) (0,120), metric_phase 28160 tot_metric 28160, phase_max 0
(phase,Nid1) (0,135), metric_phase 43520 tot_metric 43520, phase_max 0
(phase,Nid1) (0,228), metric_phase 44544 tot_metric 44544, phase_max 0
(phase,Nid1) (1,55), metric_phase 61440 tot_metric 61440, phase_max 1
(phase,Nid1) (2,55), metric_phase 326144 tot_metric 326144, phase_max 2
(phase,Nid1) (3,55), metric_phase 507392 tot_metric 507392, phase_max 3
(phase,Nid1) (4,55), metric_phase 651264 tot_metric 651264, phase_max 4
(phase,Nid1) (5,55), metric_phase 770560 tot_metric 770560, phase_max 5
Nid2 1 Nid1 55 tot_metric 770560, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 222222 Nid1 55 Nid2 1
------------------------------------------------
Test nr pss with Nid2 2 at position 0
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 0, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 0, val = 231344100 (41 dB)
Test nr sss with Nid1 111
(phase,Nid1) (0,0), metric_phase 19968 tot_metric 19968, phase_max 0
(phase,Nid1) (0,13), metric_phase 22016 tot_metric 22016, phase_max 0
(phase,Nid1) (0,109), metric_phase 23040 tot_metric 23040, phase_max 0
(phase,Nid1) (0,117), metric_phase 26112 tot_metric 26112, phase_max 0
(phase,Nid1) (0,124), metric_phase 37376 tot_metric 37376, phase_max 0
(phase,Nid1) (0,161), metric_phase 42496 tot_metric 42496, phase_max 0
(phase,Nid1) (0,170), metric_phase 43520 tot_metric 43520, phase_max 0
(phase,Nid1) (0,210), metric_phase 45568 tot_metric 45568, phase_max 0
(phase,Nid1) (1,111), metric_phase 62464 tot_metric 62464, phase_max 1
(phase,Nid1) (2,111), metric_phase 327680 tot_metric 327680, phase_max 2
(phase,Nid1) (3,111), metric_phase 511488 tot_metric 511488, phase_max 3
(phase,Nid1) (4,111), metric_phase 651264 tot_metric 651264, phase_max 4
(phase,Nid1) (5,111), metric_phase 770048 tot_metric 770048, phase_max 5
Nid2 2 Nid1 111 tot_metric 770048, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 0 Nid1 111 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 492
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 231344100 (41 dB)
Test nr sss with Nid1 111
(phase,Nid1) (0,0), metric_phase 19968 tot_metric 19968, phase_max 0
(phase,Nid1) (0,13), metric_phase 22016 tot_metric 22016, phase_max 0
(phase,Nid1) (0,109), metric_phase 23040 tot_metric 23040, phase_max 0
(phase,Nid1) (0,117), metric_phase 26112 tot_metric 26112, phase_max 0
(phase,Nid1) (0,124), metric_phase 37376 tot_metric 37376, phase_max 0
(phase,Nid1) (0,161), metric_phase 42496 tot_metric 42496, phase_max 0
(phase,Nid1) (0,170), metric_phase 43520 tot_metric 43520, phase_max 0
(phase,Nid1) (0,210), metric_phase 45568 tot_metric 45568, phase_max 0
(phase,Nid1) (1,111), metric_phase 62464 tot_metric 62464, phase_max 1
(phase,Nid1) (2,111), metric_phase 327680 tot_metric 327680, phase_max 2
(phase,Nid1) (3,111), metric_phase 511488 tot_metric 511488, phase_max 3
(phase,Nid1) (4,111), metric_phase 651264 tot_metric 651264, phase_max 4
(phase,Nid1) (5,111), metric_phase 770048 tot_metric 770048, phase_max 5
Nid2 2 Nid1 111 tot_metric 770048, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 492 Nid1 111 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 493
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 229165600 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 492, val = 229165600 (41 dB)
Test nr sss with Nid1 111
(phase,Nid1) (0,0), metric_phase 19968 tot_metric 19968, phase_max 0
(phase,Nid1) (0,13), metric_phase 22016 tot_metric 22016, phase_max 0
(phase,Nid1) (0,109), metric_phase 23040 tot_metric 23040, phase_max 0
(phase,Nid1) (0,117), metric_phase 26112 tot_metric 26112, phase_max 0
(phase,Nid1) (0,124), metric_phase 37376 tot_metric 37376, phase_max 0
(phase,Nid1) (0,161), metric_phase 42496 tot_metric 42496, phase_max 0
(phase,Nid1) (0,170), metric_phase 43520 tot_metric 43520, phase_max 0
(phase,Nid1) (0,210), metric_phase 45568 tot_metric 45568, phase_max 0
(phase,Nid1) (1,111), metric_phase 62464 tot_metric 62464, phase_max 1
(phase,Nid1) (2,111), metric_phase 327680 tot_metric 327680, phase_max 2
(phase,Nid1) (3,111), metric_phase 511488 tot_metric 511488, phase_max 3
(phase,Nid1) (4,111), metric_phase 651264 tot_metric 651264, phase_max 4
(phase,Nid1) (5,111), metric_phase 770048 tot_metric 770048, phase_max 5
Nid2 2 Nid1 111 tot_metric 770048, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 493 Nid1 111 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 56788
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 56788, val = 231344100 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 56788, val = 231344100 (41 dB)
Test nr sss with Nid1 111
(phase,Nid1) (0,0), metric_phase 19968 tot_metric 19968, phase_max 0
(phase,Nid1) (0,13), metric_phase 22016 tot_metric 22016, phase_max 0
(phase,Nid1) (0,109), metric_phase 23040 tot_metric 23040, phase_max 0
(phase,Nid1) (0,117), metric_phase 26112 tot_metric 26112, phase_max 0
(phase,Nid1) (0,124), metric_phase 37376 tot_metric 37376, phase_max 0
(phase,Nid1) (0,161), metric_phase 42496 tot_metric 42496, phase_max 0
(phase,Nid1) (0,170), metric_phase 43520 tot_metric 43520, phase_max 0
(phase,Nid1) (0,210), metric_phase 45568 tot_metric 45568, phase_max 0
(phase,Nid1) (1,111), metric_phase 62464 tot_metric 62464, phase_max 1
(phase,Nid1) (2,111), metric_phase 327680 tot_metric 327680, phase_max 2
(phase,Nid1) (3,111), metric_phase 511488 tot_metric 511488, phase_max 3
(phase,Nid1) (4,111), metric_phase 651264 tot_metric 651264, phase_max 4
(phase,Nid1) (5,111), metric_phase 770048 tot_metric 770048, phase_max 5
Nid2 2 Nid1 111 tot_metric 770048, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 56788 Nid1 111 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 111111
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 111112, val = 229601794 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 111112, val = 229601794 (41 dB)
Test nr sss with Nid1 111
(phase,Nid1) (0,0), metric_phase 19968 tot_metric 19968, phase_max 0
(phase,Nid1) (0,13), metric_phase 22016 tot_metric 22016, phase_max 0
(phase,Nid1) (0,109), metric_phase 23040 tot_metric 23040, phase_max 0
(phase,Nid1) (0,117), metric_phase 26112 tot_metric 26112, phase_max 0
(phase,Nid1) (0,124), metric_phase 37376 tot_metric 37376, phase_max 0
(phase,Nid1) (0,161), metric_phase 42496 tot_metric 42496, phase_max 0
(phase,Nid1) (0,170), metric_phase 43520 tot_metric 43520, phase_max 0
(phase,Nid1) (0,210), metric_phase 45568 tot_metric 45568, phase_max 0
(phase,Nid1) (1,111), metric_phase 62464 tot_metric 62464, phase_max 1
(phase,Nid1) (2,111), metric_phase 327680 tot_metric 327680, phase_max 2
(phase,Nid1) (3,111), metric_phase 511488 tot_metric 511488, phase_max 3
(phase,Nid1) (4,111), metric_phase 651264 tot_metric 651264, phase_max 4
(phase,Nid1) (5,111), metric_phase 770048 tot_metric 770048, phase_max 5
Nid2 2 Nid1 111 tot_metric 770048, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 111111 Nid1 111 Nid2 2
------------------------------------------------
Test nr pss with Nid2 2 at position 222222
[PHY][I][pss_search_time_nr] [UE] nr_synchro_time: Sync source = 2, Peak found at pos 222224, val = 219559301 (41 dB)
[UE] nr_synchro_time: Sync source = 2, Peak found at pos 222224, val = 219559301 (41 dB)
Test nr sss with Nid1 111
(phase,Nid1) (0,0), metric_phase 19968 tot_metric 19968, phase_max 0
(phase,Nid1) (0,13), metric_phase 22016 tot_metric 22016, phase_max 0
(phase,Nid1) (0,109), metric_phase 23040 tot_metric 23040, phase_max 0
(phase,Nid1) (0,117), metric_phase 26112 tot_metric 26112, phase_max 0
(phase,Nid1) (0,124), metric_phase 37376 tot_metric 37376, phase_max 0
(phase,Nid1) (0,161), metric_phase 42496 tot_metric 42496, phase_max 0
(phase,Nid1) (0,170), metric_phase 43520 tot_metric 43520, phase_max 0
(phase,Nid1) (0,210), metric_phase 45568 tot_metric 45568, phase_max 0
(phase,Nid1) (1,111), metric_phase 62464 tot_metric 62464, phase_max 1
(phase,Nid1) (2,111), metric_phase 327680 tot_metric 327680, phase_max 2
(phase,Nid1) (3,111), metric_phase 511488 tot_metric 511488, phase_max 3
(phase,Nid1) (4,111), metric_phase 651264 tot_metric 651264, phase_max 4
(phase,Nid1) (5,111), metric_phase 770048 tot_metric 770048, phase_max 5
Nid2 2 Nid1 111 tot_metric 770048, phase_max 5
SSS NR Test is pass with warning due to phase difference 5 (instead of 3) offset 222222 Nid1 111 Nid2 2
SSS NR Number of tests : 36 Pass : 0 Pass with warning : 36 Fail : 0
SSS NR Synchronisaton test is terminated.
openair1/SIMULATION/NR_UE_PHY/unit_tests/build/run_tests.sh
Executable
+228
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@@ -0,0 +1,228 @@
#!/bin/bash
#
# Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership.
# The OpenAirInterface Software Alliance licenses this file to You under
# the OAI Public License, Version 1.1 (the "License"); you may not use this file
# except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.openairinterface.org/?page_id=698
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#-------------------------------------------------------------------------------
# For more information about the OpenAirInterface (OAI) Software Alliance:
# contact@openairinterface.org
#
#----------------------
# File: run_tests.sh
#----------------------
# Description: script batch for:
# - building tests
# - executing tests
# - checking output files with reference files.
# ./run_test to build/run and check all tests
# -b no build
# -r no run
# -c no check
# an alone specific test can be executed ./run_test test_name
#----------------------------------------------------------------------------
# CONFIGURATION
# files and directories
WORK_DIR="openair1/SIMULATION/NR_UE_PHY/unit_tests/build"
OAIENV_DIR="../../../../.."
EXECUTABLE_DIR="."
REFERENCE_DIR="./reflogs"
RESULT_TEST_FILE=""
RESULT_DIR="./testlogs"
BROWSER="firefox"
#----------------------------------------------------------------------------
# For building and executing test application
BUILD_TEST="yes"
CHECK_TEST="yes"
RUN_TEST="yes"
SINGLE_TEST="no"
# for removing files
REMOVE="rm -f"
COMPARE="cmp"
#----------------------------------------------------------------------------
# List of tests
tst_files="
pss_test
sss_test
pbch_test
srs_test
frame_config_test
harq_test
pucch_uci_test"
#---------------------------------------------------------------------------
# manage input parameters
while [ $# != "0" ]
do
case $1 in
-b)
echo "No build of unit test"
BUILD_TEST="no"
;;
-r)
echo "No run of unit test"
RUN_TEST="no"
;;
-c)
echo "No check of unit test"
CHECK_TEST="no"
;;
-h)
echo "Option of run_test script"
echo "-b : No Build of unit tests"
echo "-c : No check for unit test"
echo "-r : No run of unit tests"
exit
BUILD_TEST="no"
CHECK_TEST="no"
RUN_TEST="no"
;;
*)
for file in $tst_files
do
if [ $file == $1 ]
then
SINGLE_TEST="yes"
TEST=$1
echo "Single test $TEST"
fi
done
if [ $SINGLE_TEST == "no" ]
then
echo "Unknown parameter $1"
BUILD_TEST="no"
CHECK_TEST="no"
RUN_TEST="no"
exit
fi
;;
esac
# shift of input parameter (excluding $0 ) $1 <- $2 <- $3 ...
# $# is decrement by shift
shift
done
#--------------------------------------------------------------------------------------------
# RUN AND CHECK RESULTS
# compare reference log file to results file
# diff -s -d -a -q ./testlogs/*.txt ./reflog/*.txt
# compare $RESULTS_FILE to $REFERENCE_DIR/$RESULTS_FILE
numberDisplayFilesDifferencies=0
let MAX_NUMBER_DISPLAY_FILES_DIFFERENCES=8
num_diff=0
if [ $RUN_TEST == "yes" ]
then
mkdir $RESULT_DIR
fi
if [ $BUILD_TEST == "yes" ]
then
if [ $SINGLE_TEST == "no" ]
then
echo "cd $OAIENV_DIR"
cd $OAIENV_DIR
echo "source oaienv"
source oaienv
echo "cd $WORK_DIR"
cd $WORK_DIR
echo "cmake CMakeLists.txt"
cmake CMakeLists.txt
echo -e "make clean\n"
#make clean
fi
fi
if [ $CHECK_TEST == "yes" ]
then
echo "Display differencies for a maximum of "$MAX_NUMBER_DISPLAY_FILES_DIFFERENCES" files"
fi
for file in $tst_files
do
if [ $SINGLE_TEST == "yes" ]
then
file=$TEST
fi
echo "Test : $file"
RESULT_TEST_FILE="$file.txt"
# build executable
if [ $BUILD_TEST == "yes" ]
then
echo -e "make $file\n"
make $file
fi
if [ $RUN_TEST == "yes" ]
then
echo "rm $RESULT_DIR/$RESULT_TEST_FILE"
rm $RESULT_DIR/$RESULT_TEST_FILE
echo "$EXECUTABLE_DIR/$file > $RESULT_DIR/$RESULT_TEST_FILE"
$EXECUTABLE_DIR/$file > $RESULT_DIR/$RESULT_TEST_FILE
fi
if [ $CHECK_TEST == "yes" ]
then
# check if there is already a reference file
if [ -f "$REFERENCE_DIR/$RESULT_TEST_FILE" ]
then
echo File "$REFERENCE_DIR/$RESULT_TEST_FILE" exists
$COMPARE $RESULT_DIR/$RESULT_TEST_FILE $REFERENCE_DIR/$RESULT_TEST_FILE > /dev/null 2>&1
if [ $? == 0 ]
then
echo "Same file for $file"
else
echo "Difference for scenario $file"
let "num_diff=$num_diff + 1"
meld $RESULT_DIR/$RESULT_TEST_FILE $REFERENCE_DIR/$RESULT_TEST_FILE &
let "numberDisplayFilesDifferencies=$numberDisplayFilesDifferencies + 1"
echo "Meld number "$numberDisplayFilesDifferencies
if [ $numberDisplayFilesDifferencies = $MAX_NUMBER_DISPLAY_FILES_DIFFERENCES ]
then
echo "###### ERROR ###### ERROR ###### ERROR ###### ERROR ###### ERROR ###### ERROR ######"
echo "=> ERROR Test aborted because there are already $MAX_NUMBER_DISPLAY_FILES_DIFFERENCES detected files which are different"
break
fi
fi
else
echo "No reference file for test $file"
fi
fi
if [ $SINGLE_TEST == "yes" ]
then
exit
fi
done
if [ $CHECK_TEST == "yes" ]
then
echo "There are $num_diff result files which are different"
fi
# end of script
openair1/SIMULATION/NR_UE_PHY/unit_tests/readme.txt
+128
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@@ -0,0 +1,128 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
File: /home/jacques/workspace/oai_openairinterface/openairinterface5g/openair1/SIMULATION/NR_UE_PHY/unit_tests/README.txt
This directory contains testbenchs for 5G NR physical layers.
Before building unit tests, full UE build should be done before (maily for asn1 dependencies):
Initialise environment:
- under openairinterface5g enter >source oaienv
Install tools:
- under openairinterface5g/cmake_targets/build -I
Build NR UE:
- under openairinterface5g/cmake_targets/build --nrUE
Files
=====
pss_test.c: test for detection of primary synchronisation signal.
sss_test.c: test for detection of secundary synchronisation signal.
pbch_test.c: test for decoding of packet braodcast channel.
srs_test.c: test of sounding reference signal.
frame_config_test.c : test of frame configurations (FDD/TDD).
harq_test.c : test of HARQ downlink and uplink.
pucch_uci_test : test of packed Uplink Control Channel Uplink Control Information
pss_util_test.c: common functions for running synchronisation tests.
pss_util_test.h: common headers for synchronisation tests.
input_buffer_test.h: it allows providing samples for pss test.
How to build & run tests
========================
Before building, oai environment should be set by entering under openairinterface5g "source oaienv".
A script allows to build, to run and to check all tests:
>run_tests
build is based on cmake tool.
cmake file is "/openairinterface5g/openair1/SIMULATION/NR_UE_PHY/unit_tests/build/CMakeList.txt".
CMakeList.txt lists different build.
How to build: in directory "oai_openairinterface/openairinterface5g/openair1/SIMULATION/NR_UE_PHY/unit_tests/build/", below commands should be entered:
cmake CMakeList.txt -> it generates makefiles to build all projects.
make pss_test -> build pss_test: detection of NR (Primary Synchronisation Channel - synchronisation of UE).
make sss_test -> build sss_test: detection of NR SSS (Secundary Synchronisation Channel - second step for UE synchronisation).
make pbch_test -> build pbch_test: decoding of NR PBCH (Packet Broadcast Channel -> UE read MIB Master Information Block which gives network parameters).
make frame_config_test -> build frame_config_test: NR FDD/TDD configuration.
make srs_test -> build srs_test: Sounding Reference Signals are transmitted by UE to the network which can use them for channel estimations.
make harq_test -> build harq_test: Hybrid Repeat Request Acknowledgment: mecanism to acknowledge transmitted and received transport blocks.
make pucch_uci_test -> build pucch_uci_test : Packet Uplink Control Channel / Uplink Control information : create UCI payload and select PUCCH formats and its parameters.
make clean -> clean all projects.
./pss_test -> run NR PSS tests.
./sss_test -> run NR SSS tests.
./pbch_test -> run NR PBCH tests.
./srs_test -> run NR srs tests.
./frame_config_test -> run NR frame configuration tests.
./harq_test -> run NR HARQ downlink and uplink tests.
./pucch_uci_test -> run NR PUCCH UCI tests.
There is a script in build/run_test.sh which allows:
- building/running/checking all tests
Checking consists in a comparaison of generated logging file at execution with a reference logging file which is stored under git for each test.
By default, tool "meld" is open each time there is a difference between reference file and logging file.
Which processing can be tuned?
=============================
Decimation feature:
By default pss processing uses samples from received buffer at input sampling frequency fs.
For saving processing time, it is possible that pss uses a decimation of input signal.
To enable decimation file openairinterface5g_bis/openairinterface5g/openair1/PHY/NR_REFSIG/pss_nr.h should be modified.
//#define PSS_DECIMATOR should be enable to get decimation.
By default, decimation uses a FIR filter.
It is possible to use a CIC (Cascaded Integrated Comb filter) for decimation by enabling line //#define CIC_DECIMATOR.
Input received signal:
Different waveforms can be generated for testing pss and sss detection.
By default, it uses a sinusoidal signals at different frequencies with an amplitude at the same level than pss or sss signals.
For modifying these waveforms, function "set_random_rx_buffer" in file pss_util_test.c has to be modified.
For wavecom type, line data_format = SINUSOIDAL_DATA should be changed with new format.
For amplitude of waveform, declaration have to be modified in the function.
Status
======
NR synchronisation tests run successfully with default parameters.
Warning: Tests of PSS NR with decimation (based on FIR or CIC filter) does not run successfully at the moment.
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/dummy_functions.c
+205
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/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*********************************************************************
*
* FILENAME : dummy_functions.c
*
* MODULE : NR UE unit test
*
* DESCRIPTION : it allows to define unused functions for unit tests.
*
************************************************************************/
#include <stddef.h>
#include "../../unit_tests/src/pss_util_test.h"
#include "PHY/types.h"
#include "PHY/defs_gNB.h"
#include "../common/ran_context.h"
#include "../common/config/config_paramdesc.h"
/*****************variables****************************************/
RAN_CONTEXT_t RC;
uint32_t (*p_nr_ue_get_SR)(module_id_t module_idP,int CC_id,frame_t frameP,uint8_t eNB_id,uint16_t rnti, sub_frame_t subframe) = NULL;
/*****************functions****************************************/
lte_subframe_t subframe_select(LTE_DL_FRAME_PARMS *frame_parms,unsigned char subframe)
{
return(0);
}
PRACH_RESOURCES_t *ue_get_rach(module_id_t module_idP, int CC_id,
frame_t frameP, uint8_t new_Msg3,
sub_frame_t subframe){ return(NULL);}
void ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP,
sub_frame_t subframe, uint8_t eNB_index,
uint8_t * ulsch_buffer, uint16_t buflen,
uint8_t * access_mode){}
void Msg1_transmitted(module_id_t module_idP, uint8_t CC_id,
frame_t frameP, uint8_t eNB_id){}
void Msg3_transmitted(module_id_t module_idP, uint8_t CC_id,
frame_t frameP, uint8_t eNB_id){}
uint32_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
uint8_t eNB_id, rnti_t rnti, sub_frame_t subframe){
uint32_t value = 0;
if (p_nr_ue_get_SR != NULL)
{
value = (p_nr_ue_get_SR)(module_idP, CC_id, frameP, eNB_id, rnti, subframe);
}
return(value);}
void rrc_out_of_sync_ind(module_id_t Mod_idP, frame_t frameP, uint16_t eNB_index)
{}
UE_L2_STATE_t ue_scheduler(const module_id_t module_idP,
const frame_t rxFrameP,
const sub_frame_t rxSubframe,
const frame_t txFrameP,
const sub_frame_t txSubframe,
const lte_subframe_t direction,
const uint8_t eNB_index, const int CC_id){ return(0);}
void ue_decode_p(module_id_t module_idP, int CC_id, frame_t frame,
uint8_t CH_index, void *pdu, uint16_t len){}
void ue_decode_si(module_id_t module_idP, int CC_id, frame_t frame,
uint8_t CH_index, void *pdu, uint16_t len){}
void ue_send_sdu(module_id_t module_idP, uint8_t CC_id, frame_t frame,
sub_frame_t subframe, uint8_t * sdu, uint16_t sdu_len,
uint8_t CH_index){}
uint16_t
ue_process_rar(const module_id_t module_idP,
const int CC_id,
const frame_t frameP,
const rnti_t ra_rnti,
uint8_t * const dlsch_buffer,
rnti_t * const t_crnti,
const uint8_t preamble_index,
uint8_t * selected_rar_buffer){ return(0);}
void ue_send_mch_sdu(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
uint8_t * sdu, uint16_t sdu_len, uint8_t eNB_index,
uint8_t sync_area){}
int ue_query_mch(uint8_t Mod_id, uint8_t CC_id, uint32_t frame,
sub_frame_t subframe, uint8_t eNB_index,
uint8_t * sync_area, uint8_t * mcch_active){ return(0);}
void dl_phy_sync_success(module_id_t module_idP,
frame_t frameP,
unsigned char eNB_index, uint8_t first_sync){}
uint32_t from_earfcn(int eutra_bandP, uint32_t dl_earfcn) { return(0);}
int32_t get_uldl_offset(int eutra_bandP) { return(0);}
IF_Module_t *IF_Module_init(int Mod_id) { return(NULL);}
int8_t get_Po_NOMINAL_PUSCH(module_id_t module_idP, uint8_t CC_id) { return(0);}
int8_t get_deltaP_rampup(module_id_t module_idP, uint8_t CC_id) { return(0);}
void thread_top_init(char *thread_name,
int affinity,
uint64_t runtime,
uint64_t deadline,
uint64_t period) {}
int oai_nfapi_hi_dci0_req(nfapi_hi_dci0_request_t *hi_dci0_req) { return(0);}
int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req) { return(0); }
int oai_nfapi_dl_config_req(nfapi_dl_config_request_t *dl_config_req) { return(0); }
int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) { return(0); }
static int step_log = 0;
const char log_first[] = "debug";
const char log_second[] = "full";
const char log_default[] = " ";
int config_get(paramdef_t *params,int numparams, char *prefix)
{
#define MAX_STRING_SIZE (255)
char *p_log;
for (int i=0; i < numparams; i++)
{
switch(step_log)
{
case 1:
p_log = log_first;
params[i].strptr = calloc(1, MAX_STRING_SIZE);
*(params[i].strptr) = p_log;
break;
case 2:
p_log = log_first;
params[i].strptr = calloc(1, MAX_STRING_SIZE);
*(params[i].strptr) = p_log;
break;
case 3:
params[i].uptr = calloc(1, sizeof(int));
*(params[i].uptr) = 0;
break;
default:
p_log = log_default;
params[i].strptr = calloc(1, MAX_STRING_SIZE);
*(params[i].strptr) = p_log;
break;
}
}
step_log++;
return(0);
}
unsigned int taus(void) { return (0); }
typedef int loader_shlibfunc_t;
int load_module_shlib(char *modname,loader_shlibfunc_t *farray, int numf) { return(0); }
void * get_shlibmodule_fptr(char *modname, char *fname) { return(NULL) ; }
void exit_fun(const char* s)
{
VOID_PARAMETER s;
undefined_function(__FUNCTION__);
}
uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
uint8_t eNB_id, rnti_t rnti, sub_frame_t subframe){
uint32_t value = 0;
return(value);
}
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/frame_config_test.c
+313
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@@ -0,0 +1,313 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/**********************************************************************
*
* FILENAME : frame_config_test.c
*
* MODULE : UE test bench for tdd configuration
*
* DESCRIPTION : it allows unitary tests for tdd configuration
*
************************************************************************/
#include "../../unit_tests/src/pss_util_test.h"
#include "PHY/defs_nr_UE.h"
#include "PHY/INIT/init_extern.h"
#include "PHY/phy_extern_nr_ue.h"
#include "SCHED_NR_UE/phy_frame_config_nr.h"
/*******************************************************************
*
* NAME : display_frame_configuration
*
* PARAMETERS : none
*
* RETURN : none
*
* DESCRIPTION : display uplink & downlink configuration
*
*********************************************************************/
void display_frame_configuration(NR_DL_FRAME_PARMS *frame_parms) {
printf("\nTdd configuration tti %d downlink %d uplink %d period %d \n", frame_parms->ttis_per_subframe, frame_parms->p_tdd_UL_DL_Configuration->nrofDownlinkSlots,
frame_parms->p_tdd_UL_DL_Configuration->nrofUplinkSlots, frame_parms->p_tdd_UL_DL_Configuration->dl_UL_TransmissionPeriodicity);
int k = (TDD_CONFIG_NB_FRAMES * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) - 1; //19;
int tti = 0;
for (int j = 0; j < TDD_CONFIG_NB_FRAMES * frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME; j++) {
int frame = 0;
if (j != 0) {
frame = (frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME)/j;
tti = (j)%(frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME);
}
else {
frame = 0;
tti = 0;
}
if (slot_select_nr(frame_parms, frame, tti) & NR_DOWNLINK_SLOT) {
printf(" [%3d] D", j);
}
else {
if (slot_select_nr(frame_parms, frame, tti) & NR_UPLINK_SLOT) {
printf(" [%3d] U", j);
}
else {
printf("Error test_frame_configuration: unexpected value \n");
assert(0);
}
}
if (j == k) {
printf("\n");
k += (TDD_CONFIG_NB_FRAMES * NR_NUMBER_OF_SUBFRAMES_PER_FRAME); // 20
}
}
printf("\n");
}
/*******************************************************************
*
* NAME : set_tti_test
*
* PARAMETERS : none
*
* RETURN : none
*
* DESCRIPTION : set tti
*
*********************************************************************/
void set_tti_test(NR_DL_FRAME_PARMS *frame_parms, int ttis_per_subframe)
{
frame_parms->ttis_per_subframe = ttis_per_subframe;
}
/*******************************************************************
*
* NAME : test_frame_configuration
*
* PARAMETERS : none
*
* RETURN : none
*
* DESCRIPTION : test of frame configuration feature
*
*********************************************************************/
int test_frame_configuration(PHY_VARS_NR_UE *PHY_vars_UE)
{
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int v_return = 0;
#define NO_DOWNLINK_SYMBOL (0)
#define NO_UPLINK_SYMBOL (0)
#define TTI_DEFAULT (2)
#define DL_SLOT_DEFAULT (4)
#define UL_SLOT_DEFAULT (1)
#define TDD_PERIODICITY_DEFAULT (ms2p5)
#define TDD_WRONG_CONFIG_TEST (3)
#define TDD_GOOD_CONFIG_TEST (18)
#define TDD_CONFIG_TEST (TDD_WRONG_CONFIG_TEST + TDD_GOOD_CONFIG_TEST)
/* this array allows setting different tdd configurations */
/* it defines number of tti (slot) per subframe, number of downlink slots, number of uplink slots */
/* and a period of the configuration */
/* first configurations (wrong) shall be fired error because they are not correct */
/* other configurations (good) are correct and they do not generate any error */
/* there is a tdd configuration for each line */
uint16_t TDD_configuration[TDD_CONFIG_TEST][4] = {
/* tti per subframe SLOT_DL SLOT_UL period */
{ 2, 4+1, 1, ms2p5 },
{ 2, 4, 1+1, ms2p5 },
{ 2, 4, 1, ms0p5 },
{ 1, 1, 1, ms2 },
{ 1, 4, 1, ms5 },
{ 1, 9, 1, ms10 },
{ 2, 1, 1, ms1 },
{ 2, 3, 1, ms2 },
{ 2, 4, 1, ms2p5 },
{ 2, 9, 1, ms5 },
{ 2, 19, 1, ms10 },
{ 4, 1, 1, ms0p5 },
{ 4, 3, 1, ms1 },
{ 4, 4, 1, ms1p25 },
{ 4, 7, 1, ms2 },
{ 4, 9, 1, ms2p5 },
{ 4, 19, 1, ms5 },
{ 4, 38, 2, ms10 },
{ 8, 4, 1, ms0p625 },
{ 16, 7, 1, ms0p5 },
{ TTI_DEFAULT, DL_SLOT_DEFAULT, UL_SLOT_DEFAULT, TDD_PERIODICITY_DEFAULT },
};
#define TDD_WRONG_DEDICATED_CONFIG_TEST (7)
#define TDD_GOOD_DEDICATED_CONFIG_TEST (18)
#define TDD_DEDICATED_CONFIG_TEST (TDD_WRONG_DEDICATED_CONFIG_TEST + TDD_GOOD_DEDICATED_CONFIG_TEST)
/* this array allows setting different tdd dedicated configurations */
/* tdd dedicated configuration overwrite current tdd confirguration for specified slot number */
/* it defines slot number to modify, then with a bit map number of downlink symbol, number of uplink symbols */
/* if next slot is set to 0 means that there is no additional slot to modify with current dedicated configuration */
/* if next slot is set to 1 means that there is an additional slot to mdofy with current dedicated configuration */
/* so tdd dedicated configuration can be composed of only 1 lines (for 1 slot) or several lines for several slots */
/* first dedictaed configurations (wrong) shall be fired errors because they are not correct */
/* other dedicated configurations (good) are correct and they do not generate any error */
uint16_t TDD_dedicated_config[TDD_DEDICATED_CONFIG_TEST][4] = {
/* slot number SLOT_DL SLOT_UL next slot */
{ 0, 1, 1, 0 },
{ 0, 0, 1, 0 },
{ 40, 0, NR_TDD_SET_ALL_SYMBOLS, 0 },
{ 0, NR_TDD_SET_ALL_SYMBOLS, NR_TDD_SET_ALL_SYMBOLS, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, NR_TDD_SET_ALL_SYMBOLS, 1 },
{ 0, 0, 0, 0 },
{ 0, NR_TDD_SET_ALL_SYMBOLS, 0, 0 },
{ 0, 0, NR_TDD_SET_ALL_SYMBOLS, 1 },
{ 5, 0, NR_TDD_SET_ALL_SYMBOLS, 1 },
{ 10, 0, NR_TDD_SET_ALL_SYMBOLS, 1 },
{ 15, 0, NR_TDD_SET_ALL_SYMBOLS, 1 },
{ 20, 0, NR_TDD_SET_ALL_SYMBOLS, 1 },
{ 25, 0, NR_TDD_SET_ALL_SYMBOLS, 1 },
{ 30, 0, NR_TDD_SET_ALL_SYMBOLS, 1 },
{ 35, 0, NR_TDD_SET_ALL_SYMBOLS, 1 },
{ 4, NR_TDD_SET_ALL_SYMBOLS, 0, 1 },
{ 9, NR_TDD_SET_ALL_SYMBOLS, 0, 1 },
{ 14, NR_TDD_SET_ALL_SYMBOLS, 0, 1 },
{ 19, NR_TDD_SET_ALL_SYMBOLS, 0, 1 },
{ 19, NR_TDD_SET_ALL_SYMBOLS, 0, 1 },
{ 24, NR_TDD_SET_ALL_SYMBOLS, 0, 1 },
{ 29, NR_TDD_SET_ALL_SYMBOLS, 0, 1 },
{ 34, NR_TDD_SET_ALL_SYMBOLS, 0, 1 },
{ 39, NR_TDD_SET_ALL_SYMBOLS, 0, 0 },
};
/* TEST wrong and good tdd configurations starting by wrong ones */
int return_status = -1;
for (int i = 0; i < TDD_CONFIG_TEST; i++) {
if (i == TDD_WRONG_CONFIG_TEST) {
return_status = 0; /* status should be fine for fine configurations */
}
set_tti_test(frame_parms, TDD_configuration[i][0]);
if (set_tdd_config_nr(frame_parms, TDD_configuration[i][3], TDD_configuration[i][1], NO_DOWNLINK_SYMBOL,
TDD_configuration[i][2], NO_UPLINK_SYMBOL) != return_status) {
v_return = (-1);
}
display_frame_configuration(frame_parms);
free_tdd_configuration_nr(frame_parms);
}
/* set default configuration */
set_tti_test(frame_parms, TTI_DEFAULT);
if (set_tdd_config_nr(frame_parms, TDD_PERIODICITY_DEFAULT, DL_SLOT_DEFAULT, NO_DOWNLINK_SYMBOL, UL_SLOT_DEFAULT, NO_UPLINK_SYMBOL) != 0) {
v_return = (-1);
}
/* TEST wrong and good tdd dedicated configurations starting by wrong ones */
return_status = (-1);
for (int i = 0; i < TDD_DEDICATED_CONFIG_TEST; i++) {
bool next = false;
do {
if (i == TDD_WRONG_DEDICATED_CONFIG_TEST) {
return_status = 0; /* status should be fine for fine configurations */
}
add_tdd_dedicated_configuration_nr( frame_parms, TDD_dedicated_config[i][0], TDD_dedicated_config[i][1], TDD_dedicated_config[i][2]);
if (TDD_dedicated_config[i][3] == 1) {
next = true;
i = i + 1;
}
else {
next = false;
}
} while (next);
if (set_tdd_configuration_dedicated_nr(frame_parms) != return_status) {
v_return = (-1);
}
if (return_status == 0) {
display_frame_configuration(frame_parms);
}
free_tdd_configuration_dedicated_nr(frame_parms);
}
free_tdd_configuration_nr(frame_parms);
return (v_return);
}
/*******************************************************************
*
* NAME : main
*
* DESCRIPTION : test of tdd configuration
*
*********************************************************************/
int main(int argc, char *argv[])
{
uint8_t transmission_mode = 1;
uint8_t nb_antennas_tx = 1;
uint8_t nb_antennas_rx = 1;
uint8_t frame_type = FDD;
uint8_t N_RB_DL=100;
lte_prefix_type_t extended_prefix_flag = NORMAL;
int Nid_cell[] = {(3*0+0)};
VOID_PARAMETER argc;
VOID_PARAMETER argv;
printf(" FRAME CONFIGURATION TEST \n");
printf("--------------------------\n");
if (init_test(nb_antennas_tx, nb_antennas_rx, transmission_mode, extended_prefix_flag, frame_type, Nid_cell[0], N_RB_DL) != 0) {
printf("Initialisation problem for frame configuration test \n");
exit(-1);;
}
if (test_frame_configuration(PHY_vars_UE) != 0) {
printf("Test NR FRAME CONFIGURATION is fail \n");
}
else {
printf("Test NR FRAME CONFIGURATION is pass \n");
}
lte_sync_time_free();
free_context_synchro_nr();
return(0);
}
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/harq_test.c
+225
View File
@@ -0,0 +1,225 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/**********************************************************************
*
* FILENAME : harq_test.c
*
* MODULE : UE test bench for hard (hybrid repeat request acknowledgment)
*
* DESCRIPTION : it allows unitary tests for uplink and downlink harq
*
************************************************************************/
#include "../../unit_tests/src/pss_util_test.h"
#include "PHY/defs_nr_UE.h"
#include "PHY/INIT/init_extern.h"
#include "PHY/phy_extern_nr_ue.h"
#include "SCHED_NR_UE/harq_nr.h"
//#include "PHY/vars.h"
//#include "LAYER2/MAC/vars.h"
/*******************************************************************
*
* NAME : test_harq_uplink
*
* PARAMETERS : none
*
* RETURN : none
*
* DESCRIPTION : test of HARQ uplink feature
*
*********************************************************************/
int test_harq_uplink(PHY_VARS_NR_UE *phy_vars_ue)
{
int gNB_id = 0;
int harq_pid = 0;
int ndi = 1;
nr_rnti_type_t rnti_type = C_RNTI_NR;
int number_steps = 5;
printf("\nHARQ Uplink \n");
config_uplink_harq_process(phy_vars_ue , gNB_id, NR_DEFAULT_DLSCH_HARQ_PROCESSES);
NR_UE_ULSCH_t *ulsch_harq = phy_vars_ue->ulsch[gNB_id];
/* reach maximum number of retransmissions */
printf("First sequence ndi does not toggle \n");
for (int i = 0 ; i < number_steps; i++) {
uplink_harq_process(ulsch_harq, harq_pid, ndi, rnti_type);
}
harq_pid++; /* next harq */
/* new grant so new transmission each try */
printf("Second sequence ndi toggle each transmission \n");
for (int i = 0 ; i < number_steps; i++) {
uplink_harq_process(ulsch_harq, harq_pid, ndi, rnti_type);
ndi ^= 1; /* toogle ndi each try */
}
harq_pid++; /* next harq */
/* new grant so new transmission each try */
printf("Third sequence ndi toggle each two transmissions \n");
for (int i = 0 ; i < number_steps; i++) {
uplink_harq_process(ulsch_harq, harq_pid, ndi, rnti_type);
if (i & 0x1) {
ndi ^= 1; /* toogle ndi each try */
}
}
release_uplink_harq_process(phy_vars_ue , gNB_id);
return 0;
}
/*******************************************************************
*
* NAME : test_harq_downlink
*
* PARAMETERS : none
*
* RETURN : none
*
* DESCRIPTION : test of HARQ downlink feature
*
*********************************************************************/
int test_harq_downlink(PHY_VARS_NR_UE *phy_vars_ue)
{
int gNB_id = 0;
int harq_pid = 0;
int ndi = 1;
nr_rnti_type_t rnti_type = C_RNTI_NR;
int number_steps = 5;
int thread_number = 0;
int TB_identifier = 0;
printf("\nHARQ Downlink \n");
config_downlink_harq_process(phy_vars_ue , gNB_id, TB_identifier, thread_number, NR_DEFAULT_DLSCH_HARQ_PROCESSES);
NR_DL_UE_HARQ_t *dlsch_harq = phy_vars_ue->dlsch[thread_number][gNB_id][TB_identifier]->harq_processes[harq_pid];
/* reach maximum number of retransmissions */
printf("First sequence ndi does not toggle \n");
for (int i = 0 ; i < number_steps; i++) {
downlink_harq_process(dlsch_harq, harq_pid, ndi, rnti_type);
}
harq_pid++; /* next harq */
dlsch_harq = phy_vars_ue->dlsch[thread_number][gNB_id][TB_identifier]->harq_processes[harq_pid];
/* new grant so new transmission each try */
printf("Second sequence ndi toggle each transmission \n");
for (int i = 0 ; i < number_steps; i++) {
downlink_harq_process(dlsch_harq, harq_pid, ndi, rnti_type);
ndi ^= 1; /* toogle ndi each try */
}
harq_pid++; /* next harq */
dlsch_harq = phy_vars_ue->dlsch[thread_number][gNB_id][TB_identifier]->harq_processes[harq_pid];
/* new grant so new transmission each try */
printf("Third sequence ndi toggle each two transmissions \n");
for (int i = 0 ; i < number_steps; i++) {
downlink_harq_process(dlsch_harq, harq_pid, ndi, rnti_type);
if (i & 0x1) {
ndi ^= 1; /* toogle ndi each try */
}
}
release_downlink_harq_process(phy_vars_ue , gNB_id, TB_identifier, thread_number);
return 0;
}
/*******************************************************************
*
* NAME : test_harq
*
* PARAMETERS : none
*
* RETURN : none
*
* DESCRIPTION : test of HARQ feature
*
*********************************************************************/
int test_harq(PHY_VARS_NR_UE *phy_vars_ue)
{
int result = -1;
result = test_harq_uplink(phy_vars_ue);
if (result == 0) {
result = test_harq_downlink(phy_vars_ue);
}
return (result);
}
/*******************************************************************
*
* NAME : main
*
* DESCRIPTION : test of uplink and downlink harq entities
*
*********************************************************************/
int main(int argc, char *argv[])
{
VOID_PARAMETER argc;
VOID_PARAMETER argv;
uint8_t transmission_mode = 1;
uint8_t nb_antennas_tx = 1;
uint8_t nb_antennas_rx = 1;
uint8_t frame_type = FDD;
uint8_t N_RB_DL=100;
lte_prefix_type_t extended_prefix_flag = NORMAL;
int Nid_cell[] = {(3*0+0)};
VOID_PARAMETER argc;
VOID_PARAMETER argv;
printf(" HARQ TEST \n");
printf("----------\n");
if (init_test(nb_antennas_tx, nb_antennas_rx, transmission_mode, extended_prefix_flag, frame_type, Nid_cell[0], N_RB_DL) != 0) {
printf("Initialisation problem for harq test \n");
exit(-1);;
}
if (test_harq(PHY_vars_UE) != 0) {
printf("Test NR HARQ is fail \n");
}
else {
printf("Test NR HARQ is pass \n");
}
free_context_synchro_nr();
return(0);
}

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