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No dynamically alloced PUSCH, remove internal PDU

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This commit is contained in:
Robert Schmidt
2020-12-02 18:08:51 +01:00
parent a6a7c7a328
commit 0affd907b5
4 changed files with 27 additions and 31 deletions
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openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+6 -6
View File
@@ -407,9 +407,9 @@ void nr_ul_preprocessor_phytest(module_id_t module_id,
}
}
sched_ctrl->sched_pusch->time_domain_allocation = tda;
sched_ctrl->sched_pusch->slot = sched_slot;
sched_ctrl->sched_pusch->frame = sched_frame;
sched_ctrl->sched_pusch.time_domain_allocation = tda;
sched_ctrl->sched_pusch.slot = sched_slot;
sched_ctrl->sched_pusch.frame = sched_frame;
const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
sched_ctrl->search_space = get_searchspace(sched_ctrl->active_bwp, target_ss);
@@ -435,9 +435,9 @@ void nr_ul_preprocessor_phytest(module_id_t module_id,
}
UE_info->num_pdcch_cand[UE_id][cid]++;
sched_ctrl->sched_pusch->mcs = 9;
sched_ctrl->sched_pusch->rbStart = rbStart;
sched_ctrl->sched_pusch->rbSize = rbSize;
sched_ctrl->sched_pusch.mcs = 9;
sched_ctrl->sched_pusch.rbStart = rbStart;
sched_ctrl->sched_pusch.rbSize = rbSize;
/* mark the corresponding RBs as used */
for (int rb = rbStart; rb < rbStart + rbSize; rb++)
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
-2
View File
@@ -1799,7 +1799,6 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
UE_info->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch **)malloc(num_slots_ul*sizeof(NR_sched_pucch *));
for (int s=0; s<num_slots_ul;s++)
UE_info->UE_sched_ctrl[UE_id].sched_pucch[s] = (NR_sched_pucch *)malloc(2*sizeof(NR_sched_pucch));
UE_info->UE_sched_ctrl[UE_id].sched_pusch = calloc(num_slots_ul, sizeof(NR_sched_pusch_t));
for (int k=0; k<num_slots_ul; k++) {
for (int l=0; l<2; l++)
@@ -1847,7 +1846,6 @@ void mac_remove_nr_ue(module_id_t mod_id, rnti_t rnti)
UE_info->rnti[UE_id] = 0;
remove_nr_ue_list(&UE_info->list, UE_id);
free(UE_info->UE_sched_ctrl[UE_id].sched_pucch);
free(UE_info->UE_sched_ctrl[UE_id].sched_pusch);
memset((void *) &UE_info->UE_sched_ctrl[UE_id],
0,
sizeof(NR_UE_sched_ctrl_t));
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+20 -20
View File
@@ -506,9 +506,9 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
while (rbStart + rbSize < bwpSize && !vrb_map_UL[rbStart+rbSize])
rbSize++;
sched_ctrl->sched_pusch->time_domain_allocation = tda;
sched_ctrl->sched_pusch->slot = sched_slot;
sched_ctrl->sched_pusch->frame = sched_frame;
sched_ctrl->sched_pusch.time_domain_allocation = tda;
sched_ctrl->sched_pusch.slot = sched_slot;
sched_ctrl->sched_pusch.frame = sched_frame;
const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
sched_ctrl->search_space = get_searchspace(sched_ctrl->active_bwp, target_ss);
@@ -534,13 +534,13 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
}
UE_info->num_pdcch_cand[UE_id][cid]++;
sched_ctrl->sched_pusch->mcs = 9;
sched_ctrl->sched_pusch->rbStart = rbStart;
sched_ctrl->sched_pusch->rbSize = rbSize;
sched_ctrl->sched_pusch.mcs = 9;
sched_ctrl->sched_pusch.rbStart = rbStart;
sched_ctrl->sched_pusch.rbSize = rbSize;
/* mark the corresponding RBs as used */
for (int rb = 0; rb < sched_ctrl->sched_pusch->rbSize; rb++)
vrb_map_UL[rb + sched_ctrl->sched_pusch->rbStart] = 1;
for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++)
vrb_map_UL[rb + sched_ctrl->sched_pusch.rbStart] = 1;
}
void nr_schedule_ulsch(module_id_t module_id,
@@ -556,21 +556,21 @@ void nr_schedule_ulsch(module_id_t module_id,
const NR_UE_list_t *UE_list = &UE_info->list;
for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
if (sched_ctrl->sched_pusch->rbSize <= 0)
if (sched_ctrl->sched_pusch.rbSize <= 0)
continue;
uint16_t rnti = UE_info->rnti[UE_id];
/* PUSCH in a later slot, but corresponding DCI now! */
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_ctrl->sched_pusch->slot];
AssertFatal(future_ul_tti_req->SFN == sched_ctrl->sched_pusch->frame
&& future_ul_tti_req->Slot == sched_ctrl->sched_pusch->slot,
nfapi_nr_ul_tti_request_t *future_ul_tti_req = &RC.nrmac[module_id]->UL_tti_req_ahead[0][sched_ctrl->sched_pusch.slot];
AssertFatal(future_ul_tti_req->SFN == sched_ctrl->sched_pusch.frame
&& future_ul_tti_req->Slot == sched_ctrl->sched_pusch.slot,
"%d.%d future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n",
frame, slot,
future_ul_tti_req->SFN,
future_ul_tti_req->Slot,
sched_ctrl->sched_pusch->frame,
sched_ctrl->sched_pusch->slot);
sched_ctrl->sched_pusch.frame,
sched_ctrl->sched_pusch.slot);
future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu;
@@ -587,7 +587,7 @@ void nr_schedule_ulsch(module_id_t module_id,
int rnti_types[2] = { NR_RNTI_C, 0 };
//Resource Allocation in time domain
const int tda = sched_ctrl->sched_pusch->time_domain_allocation;
const int tda = sched_ctrl->sched_pusch.time_domain_allocation;
const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList =
sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
@@ -617,7 +617,7 @@ void nr_schedule_ulsch(module_id_t module_id,
else
pusch_pdu->data_scrambling_id = *scc->physCellId;
pusch_pdu->mcs_index = sched_ctrl->sched_pusch->mcs;
pusch_pdu->mcs_index = sched_ctrl->sched_pusch.mcs;
const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
if (pusch_pdu->transform_precoding)
pusch_pdu->mcs_table = get_pusch_mcs_table(pusch_Config->mcs_Table,
@@ -650,8 +650,8 @@ void nr_schedule_ulsch(module_id_t module_id,
AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1,
"Only frequency resource allocation type 1 is currently supported\n");
pusch_pdu->resource_alloc = 1; //type 1
pusch_pdu->rb_start = sched_ctrl->sched_pusch->rbStart;
pusch_pdu->rb_size = sched_ctrl->sched_pusch->rbSize;
pusch_pdu->rb_start = sched_ctrl->sched_pusch.rbStart;
pusch_pdu->rb_size = sched_ctrl->sched_pusch.rbSize;
pusch_pdu->vrb_to_prb_mapping = 0;
if (pusch_Config->frequencyHopping==NULL)
@@ -741,7 +741,7 @@ void nr_schedule_ulsch(module_id_t module_id,
pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round];
cur_harq->state = ACTIVE_SCHED;
cur_harq->last_tx_slot = sched_ctrl->sched_pusch->slot;
cur_harq->last_tx_slot = sched_ctrl->sched_pusch.slot;
uint8_t num_dmrs_symb = 0;
for(int i = pusch_pdu->start_symbol_index; i < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; i++)
@@ -813,6 +813,6 @@ void nr_schedule_ulsch(module_id_t module_id,
pusch_pdu->bwp_size,
sched_ctrl->active_bwp->bwp_Id);
sched_ctrl->sched_pusch->rbSize = 0;
memset(&sched_ctrl->sched_pusch, 0, sizeof(sched_ctrl->sched_pusch));
}
}
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+1 -3
View File
@@ -287,8 +287,6 @@ typedef struct NR_sched_pucch {
typedef struct NR_sched_pusch {
int frame;
int slot;
bool active;
nfapi_nr_pusch_pdu_t pusch_pdu;
/// RB allocation within active uBWP
uint16_t rbSize;
@@ -364,7 +362,7 @@ typedef struct {
/// selected PUCCH index, if scheduled
int pucch_sched_idx;
int pucch_occ_idx;
NR_sched_pusch_t *sched_pusch;
NR_sched_pusch_t sched_pusch;
/// CCE index and aggregation, should be coherent with cce_list
NR_SearchSpace_t *search_space;