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Merge branch 'integration_2023_w26' into 'develop'

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integration_2023_w26

See merge request oai/openairinterface5g!2202

* !2081 Nonlinear ML receiver
* !2188 Bugfix for FR2
* !2189 Bugfix for getting band and numerology from command line for OAI UE
* !2192 Fix bugs in F1 implementation found with UBSan
* !2194 moving handling of RA success for reconfigurationWithSync at RRC
* !2031 Adding new sidelink (SL) variables
* !2148 NR MAC UE further improvements for DCI configuration
* !2164 Enable T304
* !2197 chore(ci-cn): Transition to YAML configuration scheme
This commit is contained in:
Robert Schmidt
2023-07-03 08:35:10 +00:00
parent c1fbd777a9 735c960f6c
commit 10d2af11b8
40 changed files with 3905 additions and 259 deletions
Download Patch File Download Diff File Expand all files Collapse all files
CMakeLists.txt
+5 -1
View File
@@ -1071,6 +1071,7 @@ set(PHY_SRC_COMMON
${OPENAIR1_DIR}/PHY/TOOLS/dB_routines.c
${OPENAIR1_DIR}/PHY/TOOLS/sqrt.c
${OPENAIR1_DIR}/PHY/TOOLS/lut.c
${OPENAIR1_DIR}/PHY/TOOLS/simde_operations.c
)
set(PHY_SRC
@@ -1206,6 +1207,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/TOOLS/dB_routines.c
${OPENAIR1_DIR}/PHY/TOOLS/sqrt.c
${OPENAIR1_DIR}/PHY/TOOLS/lut.c
${OPENAIR1_DIR}/PHY/TOOLS/simde_operations.c
${PHY_POLARSRC}
${PHY_SMALLBLOCKSRC}
${PHY_NR_CODINGIF}
@@ -1258,6 +1260,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/TOOLS/dB_routines.c
${OPENAIR1_DIR}/PHY/TOOLS/sqrt.c
${OPENAIR1_DIR}/PHY/TOOLS/lut.c
${OPENAIR1_DIR}/PHY/TOOLS/simde_operations.c
${OPENAIR1_DIR}/PHY/INIT/nr_init_ue.c
# ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pucch_uci_test.c
${PHY_POLARSRC}
@@ -1306,8 +1309,9 @@ set(PHY_MEX_UE
${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c
${OPENAIR1_DIR}/PHY/TOOLS/cmult_sv.c
${OPENAIR1_DIR}/PHY/TOOLS/cmult_vv.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c
${OPENAIR1_DIR}/PHY/TOOLS/signal_energy.c
${OPENAIR1_DIR}/PHY/TOOLS/simde_operations.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_ue_measurements.c
${OPENAIR_DIR}/common/utils/LOG/log.c
${OPENAIR_DIR}/common/utils/T/T.c
doc/tutorial_resources/oai-cn5g/docker-compose.yml
+7 -7
View File
@@ -36,7 +36,7 @@ services:
ipv4_address: 192.168.70.139
oai-udr:
container_name: "oai-udr"
image: oaisoftwarealliance/oai-udr:develop
image: oaisoftwarealliance/oai-udr:v1.5.1
environment:
- TZ=Europe/Paris
- UDR_NAME=OAI_UDR
@@ -58,7 +58,7 @@ services:
ipv4_address: 192.168.70.136
oai-udm:
container_name: "oai-udm"
image: oaisoftwarealliance/oai-udm:develop
image: oaisoftwarealliance/oai-udm:v1.5.1
environment:
- TZ=Europe/Paris
- UDM_NAME=OAI_UDM
@@ -77,7 +77,7 @@ services:
ipv4_address: 192.168.70.137
oai-ausf:
container_name: "oai-ausf"
image: oaisoftwarealliance/oai-ausf:develop
image: oaisoftwarealliance/oai-ausf:v1.5.1
environment:
- TZ=Europe/Paris
- AUSF_NAME=OAI_AUSF
@@ -96,7 +96,7 @@ services:
ipv4_address: 192.168.70.138
oai-nrf:
container_name: "oai-nrf"
image: oaisoftwarealliance/oai-nrf:develop
image: oaisoftwarealliance/oai-nrf:v1.5.1
environment:
- TZ=Europe/Paris
- NRF_INTERFACE_NAME_FOR_SBI=eth0
@@ -105,7 +105,7 @@ services:
ipv4_address: 192.168.70.130
oai-amf:
container_name: "oai-amf"
image: oaisoftwarealliance/oai-amf:develop
image: oaisoftwarealliance/oai-amf:v1.5.1
environment:
- TZ=Europe/Paris
# PLMN informations
@@ -151,7 +151,7 @@ services:
ipv4_address: 192.168.70.132
oai-smf:
container_name: "oai-smf"
image: oaisoftwarealliance/oai-smf:develop
image: oaisoftwarealliance/oai-smf:v1.5.1
environment:
- TZ=Europe/Paris
- SMF_INTERFACE_NAME_FOR_N4=eth0
@@ -202,7 +202,7 @@ services:
ipv4_address: 192.168.70.133
oai-spgwu-tiny:
container_name: "oai-spgwu-tiny"
image: oaisoftwarealliance/oai-spgwu-tiny:develop
image: oaisoftwarealliance/oai-spgwu-tiny:v1.5.1
environment:
- TZ=Europe/Paris
- SGW_INTERFACE_NAME_FOR_S1U_S12_S4_UP=eth0
executables/nr-uesoftmodem.c
+1 -1
View File
@@ -513,7 +513,7 @@ int main( int argc, char **argv ) {
NR_UE_MAC_INST_t *mac = get_mac_inst(0);
if (get_softmodem_params()->sa) { // set frame config to initial values from command line and assume that the SSB is centered on the grid
uint16_t nr_band = get_band(downlink_frequency[CC_id][0],uplink_frequency_offset[CC_id][0]);
uint16_t nr_band = get_softmodem_params()->band;
mac->nr_band = nr_band;
nr_init_frame_parms_ue_sa(&UE[CC_id]->frame_parms,
downlink_frequency[CC_id][0],
executables/softmodem-common.h
+17 -3
View File
@@ -58,7 +58,7 @@ extern "C"
#define CONFIG_HLP_PHYTST "test UE phy layer, mac disabled\n"
#define CONFIG_HLP_DORA "test gNB and UE with RA procedures\n"
#define CONFIG_HLP_SA "run gNB in standalone mode\n"
#define CONFIG_HLP_SL_MODE "sets the NR sidelink mode (0: not in sidelink mode, 1: in-coverage/gNB, 2: out-of-coverage/no gNB)"
#define CONFIG_HLP_SL_MODE "sets the NR sidelink mode (0: not in sidelink mode, 1: in-coverage/gNB, 2: out-of-coverage/no gNB)\n"
#define CONFIG_HLP_EXTS "tells hardware to use an external timing reference\n"
#define CONFIG_HLP_DMRSSYNC "tells RU to insert DMRS in subframe 1 slot 0"
#define CONFIG_HLP_CLK "tells hardware to use a clock reference (0:internal, 1:external, 2:gpsdo)\n"
@@ -106,6 +106,9 @@ extern "C"
#define CONFIG_L1_EMULATOR "Run in L1 emulated mode (disable PHY layer)\n"
#define CONFIG_HLP_CONTINUOUS_TX "perform continuous transmission, even in TDD mode (to work around USRP issues)\n"
#define CONFIG_HLP_STATS_DISABLE "disable globally the stats generation and persistence"
#define CONFIG_HLP_SYNC_REF "Sync Reference in Sidelink\n"
#define CONFIG_HLP_NID1 "Set NID1 value in Sidelink\n"
#define CONFIG_HLP_NID2 "Set NID2 value in Sidelink\n"
/*-----------------------------------------------------------------------------------------------------------------------------------------------------*/
/* command line parameters common to eNodeB and UE */
@@ -137,6 +140,10 @@ extern "C"
#define NON_STOP softmodem_params.non_stop
#define EMULATE_L1 softmodem_params.emulate_l1
#define CONTINUOUS_TX softmodem_params.continuous_tx
#define SYNC_REF softmodem_params.sync_ref
#define NID1 softmodem_params.nid1
#define NID2 softmodem_params.nid2
#define REORDER_THREAD_DISABLE softmodem_params.reorder_thread_disable
#define DEFAULT_RFCONFIG_FILE "/usr/local/etc/syriq/ue.band7.tm1.PRB100.NR40.dat";
@@ -162,8 +169,8 @@ extern int usrp_tx_thread;
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, .uptr=&do_forms, .defintval=0, TYPE_UINT, 0}, \
{"dqt" , CONFIG_HLP_SOFTS_QT, PARAMFLAG_BOOL, .uptr=&do_forms_qt, .defintval=0, TYPE_UINT, 0}, \
{"q" , CONFIG_HLP_STMON, PARAMFLAG_BOOL, .iptr=&opp_enabled, .defintval=0, TYPE_INT, 0}, \
{"numerology" , CONFIG_HLP_NUMEROLOGY, PARAMFLAG_BOOL, .iptr=&NUMEROLOGY, .defintval=1, TYPE_INT, 0}, \
{"band" , CONFIG_HLP_BAND, PARAMFLAG_BOOL, .iptr=&BAND, .defintval=78, TYPE_INT, 0}, \
{"numerology" , CONFIG_HLP_NUMEROLOGY, 0, .iptr=&NUMEROLOGY, .defintval=1, TYPE_INT, 0}, \
{"band" , CONFIG_HLP_BAND, 0, .iptr=&BAND, .defintval=78, TYPE_INT, 0}, \
{"emulate-rf" , CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, .iptr=&EMULATE_RF, .defintval=0, TYPE_INT, 0}, \
{"parallel-config", CONFIG_HLP_PARALLEL_CMD, 0, .strptr=&parallel_config, .defstrval=NULL, TYPE_STRING, 0}, \
{"worker-config", CONFIG_HLP_WORKER_CMD, 0, .strptr=&worker_config, .defstrval=NULL, TYPE_STRING, 0}, \
@@ -181,6 +188,8 @@ extern int usrp_tx_thread;
{"emulate-l1", CONFIG_L1_EMULATOR, PARAMFLAG_BOOL, .iptr=&EMULATE_L1, .defintval=0, TYPE_INT, 0}, \
{"continuous-tx", CONFIG_HLP_CONTINUOUS_TX, PARAMFLAG_BOOL, .iptr=&CONTINUOUS_TX, .defintval=0, TYPE_INT, 0}, \
{"disable-stats", CONFIG_HLP_STATS_DISABLE, PARAMFLAG_BOOL, .iptr=&stats_disabled, .defintval=0, TYPE_INT, 0}, \
{"nid1", CONFIG_HLP_NID1, 0, .iptr=&NID1, .defintval=10, TYPE_INT, 0}, \
{"nid2", CONFIG_HLP_NID2, 0, .iptr=&NID2, .defintval=1, TYPE_INT, 0}, \
}
// clang-format on
@@ -227,6 +236,8 @@ extern int usrp_tx_thread;
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
}
// clang-format on
@@ -335,6 +346,9 @@ typedef struct {
int non_stop;
int emulate_l1;
int continuous_tx;
int sync_ref;
int nid1;
int nid2;
} softmodem_params_t;
extern uint64_t get_softmodem_optmask(void);
openair1/PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c
+11 -3
View File
@@ -351,9 +351,17 @@ void applyGtoright(const t_nrPolar_params *pp,decoder_node_t *node) {
((__m64 *)alpha_r)[0] = _mm_subs_pi16(((__m64 *)alpha_v)[1],_mm_sign_pi16(((__m64 *)alpha_v)[0],((__m64 *)betal)[0]));
}
else
{// equivalent scalar code to above, activated only on non x86/ARM architectures or Nv=1,2
for (int i=0;i<node->Nv/2;i++) {
alpha_r[i] = alpha_v[i+(node->Nv/2)] - (betal[i]*alpha_v[i]);
{
int temp_alpha_r;
for (int i = 0; i < node->Nv / 2; i++) {
temp_alpha_r = alpha_v[i + (node->Nv / 2)] - (betal[i] * alpha_v[i]);
if (temp_alpha_r > SHRT_MAX) {
alpha_r[i] = SHRT_MAX;
} else if (temp_alpha_r < -SHRT_MAX) {
alpha_r[i] = -SHRT_MAX;
} else {
alpha_r[i] = temp_alpha_r;
}
}
}
if (node->Nv == 2) { // apply hard decision on right node
openair1/PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h
+3
View File
@@ -35,6 +35,7 @@
#define NR_POLAR_PBCH_AGGREGATION_LEVEL 0 //uint8_t
#define NR_POLAR_PBCH_MESSAGE_TYPE 0 //int8_t
#define NR_POLAR_PSBCH_MESSAGE_TYPE 3 //int8_t
#define NR_POLAR_PBCH_PAYLOAD_BITS 32 //uint16_t
#define NR_POLAR_PBCH_CRC_PARITY_BITS 24
#define NR_POLAR_PBCH_CRC_ERROR_CORRECTION_BITS 3
@@ -52,6 +53,8 @@
#define NR_POLAR_PBCH_I_BIL 0 //uint8_t
#define NR_POLAR_PBCH_E 864 //uint16_t
#define NR_POLAR_PBCH_E_DWORD 27 // NR_POLAR_PBCH_E/32
#define NR_POLAR_PSBCH_E 1792 //uint16_t
#define NR_POLAR_PSBCH_E_DWORD 56 // NR_POLAR_PSBCH_E/32
/*
* TEST CODE
openair1/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c
+10 -38
View File
@@ -121,34 +121,6 @@
tmp_result2 = simde_mm256_slli_epi16(tmp_result2, 1); \
const simde__m256i a_sq = simde_mm256_adds_epi16(tmp_result, tmp_result2);
void seperate_real_imag_parts(__m256i *out_re, __m256i *out_im, __m256i in0, __m256i in1)
{
__m256i tmp0;
__m256i tmp1;
in0 = simde_mm256_shufflelo_epi16(in0, 0xd8); //_MM_SHUFFLE(0,2,1,3));
in0 = simde_mm256_shufflehi_epi16(in0, 0xd8); //_MM_SHUFFLE(0,2,1,3));
in0 = simde_mm256_shuffle_epi32(in0, 0xd8); //_MM_SHUFFLE(0,2,1,3));
in1 = simde_mm256_shufflelo_epi16(in1, 0xd8); //_MM_SHUFFLE(0,2,1,3));
in1 = simde_mm256_shufflehi_epi16(in1, 0xd8); //_MM_SHUFFLE(0,2,1,3));
in1 = simde_mm256_shuffle_epi32(in1, 0xd8); //_MM_SHUFFLE(0,2,1,3));
// in0 = [Re(0,1,2,3) Im(0,1,2,3) Re(4,5,6,7) Im(4,5,6,7)]
// in0 = [Re(8,9,10,11) Im(8,9,10,11) Re(12,13,14,15) Im(12,13,14,15)]
tmp0 = simde_mm256_unpacklo_epi64(in0, in1);
// axmm2 = [Re(0,1,2,3) Re(8,9,10,11) Re(4,5,6,7) Re(12,13,14,15)]
tmp0 = simde_mm256_permute4x64_epi64(tmp0, 0xd8); // Re(rho)
tmp1 = simde_mm256_unpackhi_epi64(in0, in1);
// axmm3 = [Im(0,1,2,3) Im(8,9,10,11) Im(4,5,6,7) Im(12,13,14,15)]
tmp1 = simde_mm256_permute4x64_epi64(tmp1, 0xd8); // Im(rho)
*out_re = tmp0;
*out_im = tmp1;
}
void qam64_qam16_avx2(short *stream0_in,
short *stream1_in,
short *ch_mag,
@@ -245,7 +217,7 @@ void qam64_qam16_avx2(short *stream0_in,
xmm3 = _mm_unpackhi_epi64(xmm0,xmm1); // Im(rho)
*/
simde__m256i xmm0, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8;
seperate_real_imag_parts(&xmm2, &xmm3, rho01_256i[i], rho01_256i[i+1]);
simde_mm256_separate_real_imag_parts(&xmm2, &xmm3, rho01_256i[i], rho01_256i[i+1]);
const simde__m256i rho_rpi = simde_mm256_adds_epi16(xmm2, xmm3); // rho = Re(rho) + Im(rho)
const simde__m256i rho_rmi = simde_mm256_subs_epi16(xmm2, xmm3); // rho* = Re(rho) - Im(rho)
@@ -323,7 +295,7 @@ void qam64_qam16_avx2(short *stream0_in,
*/
simde__m256i y1r, y1i;
seperate_real_imag_parts(&y1r, &y1i, stream1_256i_in[i], stream1_256i_in[i+1]);
simde_mm256_separate_real_imag_parts(&y1r, &y1i, stream1_256i_in[i], stream1_256i_in[i+1]);
// Psi_r calculation from rho_rpi or rho_rmi
xmm0 = simde_mm256_broadcastw_epi16(_mm_set1_epi16(0));// ZERO for abs_pi16
@@ -604,7 +576,7 @@ void qam64_qam16_avx2(short *stream0_in,
y0i = simde_mm256_unpackhi_epi64(xmm0,xmm1);
*/
simde__m256i y0r, y0i;
seperate_real_imag_parts(&y0r, &y0i, stream0_256i_in[i], stream0_256i_in[i+1]);
simde_mm256_separate_real_imag_parts(&y0r, &y0i, stream0_256i_in[i], stream0_256i_in[i+1]);
/*
// Rearrange desired channel magnitudes
@@ -619,7 +591,7 @@ void qam64_qam16_avx2(short *stream0_in,
ch_mag_des = simde_mm256_unpacklo_epi64(xmm2,xmm3);
*/
seperate_real_imag_parts(&ch_mag_des, &xmm2, ch_mag_256i[i], ch_mag_256i[i+1]);
simde_mm256_separate_real_imag_parts(&ch_mag_des, &xmm2, ch_mag_256i[i], ch_mag_256i[i+1]);
// Rearrange interfering channel magnitudes
/*
@@ -634,7 +606,7 @@ void qam64_qam16_avx2(short *stream0_in,
ch_mag_int = simde_mm256_unpacklo_epi64(xmm2,xmm3);
*/
seperate_real_imag_parts(&ch_mag_int, &xmm2, ch_mag_256i_i[i], ch_mag_256i_i[i+1]);
simde_mm256_separate_real_imag_parts(&ch_mag_int, &xmm2, ch_mag_256i_i[i], ch_mag_256i_i[i+1]);
y0r_one_over_sqrt_21 = simde_mm256_mulhi_epi16(y0r, ONE_OVER_SQRT_42);
y0r_three_over_sqrt_21 = simde_mm256_mulhi_epi16(y0r, THREE_OVER_SQRT_42);
@@ -1819,7 +1791,7 @@ void qam64_qam64_avx2(int32_t *stream0_in,
xmm3 = simde_mm256_permute4x64_epi64(xmm3,0xd8); // Im(rho)
*/
simde__m256i xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8;
seperate_real_imag_parts(&xmm2, &xmm3, rho01_256i[i], rho01_256i[i+1]);
simde_mm256_separate_real_imag_parts(&xmm2, &xmm3, rho01_256i[i], rho01_256i[i+1]);
simde__m256i rho_rpi = simde_mm256_adds_epi16(xmm2, xmm3); // rho = Re(rho) + Im(rho)
simde__m256i rho_rmi = simde_mm256_subs_epi16(xmm2, xmm3); // rho* = Re(rho) - Im(rho)
@@ -1899,7 +1871,7 @@ void qam64_qam64_avx2(int32_t *stream0_in,
y1i = simde_mm256_permute4x64_epi64(y1i,0xd8); // Im(y1)
*/
simde__m256i y1r, y1i, xmm0;
seperate_real_imag_parts(&y1r, &y1i, stream1_256i_in[i], stream1_256i_in[i+1]);
simde_mm256_separate_real_imag_parts(&y1r, &y1i, stream1_256i_in[i], stream1_256i_in[i+1]);
// Psi_r calculation from rho_rpi or rho_rmi
xmm0 = simde_mm256_broadcastw_epi16(_mm_set1_epi16(0));// ZERO for abs_pi16
@@ -2181,7 +2153,7 @@ void qam64_qam64_avx2(int32_t *stream0_in,
y0i = _mm_unpackhi_epi64(xmm0,xmm1);
*/
simde__m256i y0r, y0i;
seperate_real_imag_parts(&y0r, &y0i, stream0_256i_in[i], stream0_256i_in[i+1]);
simde_mm256_separate_real_imag_parts(&y0r, &y0i, stream0_256i_in[i], stream0_256i_in[i+1]);
// Rearrange desired channel magnitudes
// [|h|^2(1),|h|^2(1),|h|^2(2),|h|^2(2),...,,|h|^2(7),|h|^2(7)]*(2/sqrt(10))
@@ -2197,7 +2169,7 @@ void qam64_qam64_avx2(int32_t *stream0_in,
ch_mag_des = _mm_unpacklo_epi64(xmm2,xmm3);
*/
// xmm2 is dummy variable that contains the same values as ch_mag_des
seperate_real_imag_parts(&ch_mag_des, &xmm2, ch_mag_256i[i], ch_mag_256i[i+1]);
simde_mm256_separate_real_imag_parts(&ch_mag_des, &xmm2, ch_mag_256i[i], ch_mag_256i[i+1]);
// Rearrange interfering channel magnitudes
@@ -2212,7 +2184,7 @@ void qam64_qam64_avx2(int32_t *stream0_in,
xmm3 = _mm_shuffle_epi32(xmm3,0xd8); //_MM_SHUFFLE(0,2,1,3));
ch_mag_int = _mm_unpacklo_epi64(xmm2,xmm3);
*/
seperate_real_imag_parts(&ch_mag_int, &xmm2, ch_mag_256i_i[i], ch_mag_256i_i[i+1]);
simde_mm256_separate_real_imag_parts(&ch_mag_int, &xmm2, ch_mag_256i_i[i], ch_mag_256i_i[i+1]);
y0r_one_over_sqrt_21 = simde_mm256_mulhi_epi16(y0r, ONE_OVER_SQRT_42);
y0r_three_over_sqrt_21 = simde_mm256_mulhi_epi16(y0r, THREE_OVER_SQRT_42);
openair1/PHY/NR_REFSIG/ss_pbch_nr.h
+10
View File
@@ -41,6 +41,9 @@
/* PSS parameters */
#define NUMBER_PSS_SEQUENCE (3)
#define NUMBER_PSS_SEQUENCE_SL (2)
#define PSS_SSS_SUB_CARRIER_START (56)
#define PSS_SSS_SUB_CARRIER_START_SL (2)
#define INVALID_PSS_SEQUENCE (NUMBER_PSS_SEQUENCE)
#define LENGTH_PSS_NR (127)
#define N_SC_RB (12) /* Resource block size in frequency domain expressed as a number if subcarriers */
@@ -62,6 +65,13 @@
#define SSS_SYMBOL_NB ((2) + OFFSET_SS_PBCH)
#define PBCH_LAST_SYMBOL_NB ((3) + OFFSET_SS_PBCH)
#define OFFSET_SS_PSBCH -1
#define PSS0_SL_SYMBOL_NB ((1) + OFFSET_SS_PSBCH)
#define PSS1_SL_SYMBOL_NB ((2) + OFFSET_SS_PSBCH)
#define SSS0_SL_SYMBOL_NB ((3) + OFFSET_SS_PSBCH)
#define SSS1_SL_SYMBOL_NB ((4) + OFFSET_SS_PSBCH)
/* SS/PBCH parameters */
#define N_RB_SS_PBCH_BLOCK (20)
#define NB_SYMBOLS_PBCH (3)
openair1/PHY/NR_REFSIG/sss_nr.h
+9
View File
@@ -47,13 +47,22 @@
#define SCALING_METRIC_SSS_NR (15)//(19)
#define N_ID_2_NUMBER (NUMBER_PSS_SEQUENCE)
#define N_ID_2_NUMBER_SL (NUMBER_PSS_SEQUENCE_SL)
#define N_ID_1_NUMBER (NUMBER_SSS_SEQUENCE)
#define GET_NID2(Nid_cell) (Nid_cell%3)
#define GET_NID1(Nid_cell) (Nid_cell/3)
#define GET_NID2_SL(Nid_SL) (Nid_SL/NUMBER_SSS_SEQUENCE)
#define GET_NID1_SL(Nid_SL) (Nid_SL%NUMBER_SSS_SEQUENCE)
#define PSS_SC_START_NR (52) /* see from TS 38.211 table 7.4.3.1-1: Resources within an SS/PBCH block for PSS... */
#define SSS_START_IDX (3) /* [0:PSBCH 1:PSS0 2:PSS1 3:SSS0 4:SSS1] */
#define NUM_SSS_SYMBOLS (2)
#define SSS_METRIC_FLOOR_NR (30000)
/************** VARIABLES *****************************************/
#define PHASE_HYPOTHESIS_NUMBER (16)
openair1/PHY/NR_TRANSPORT/nr_transport_proto.h
+13
View File
@@ -292,6 +292,19 @@ void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
void reset_active_stats(PHY_VARS_gNB *gNB, int frame);
void reset_active_ulsch(PHY_VARS_gNB *gNB, int frame);
void nr_ulsch_compute_ML_llr(int32_t **rxdataF_comp,
int32_t **ul_ch_mag,
int32_t ***rho,
int16_t **llr_layers,
uint8_t nb_antennas_rx,
uint32_t rb_size,
uint32_t nb_re,
uint8_t symbol,
uint32_t rxdataF_ext_offset,
uint8_t mod_order);
void nr_ulsch_shift_llr(int16_t **llr_layers, uint32_t nb_re, uint32_t rxdataF_ext_offset, uint8_t mod_order, int shift);
void nr_fill_ulsch(PHY_VARS_gNB *gNB,
int frame,
int slot,
openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
+74 -18
View File
@@ -12,6 +12,7 @@
//#define DEBUG_CH_COMP
//#define DEBUG_RB_EXT
//#define DEBUG_CH_MAG
//#define ML_DEBUG
#define INVALID_VALUE 255
@@ -636,7 +637,7 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
QAM_amp128 = _mm_set1_epi16(QAM16_n1); // 2/sqrt(10)
QAM_amp128b = _mm_setzero_si128();
QAM_amp128c = _mm_setzero_si128();
}
}
else if (mod_order == 6) {
QAM_amp128 = _mm_set1_epi16(QAM64_n1); //
QAM_amp128b = _mm_set1_epi16(QAM64_n2);
@@ -1081,7 +1082,7 @@ void nr_ulsch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
int32_t **ul_ch_mag,
int32_t **ul_ch_magb,
int32_t **ul_ch_magc,
int32_t ***rho,
int32_t ***rho,
uint8_t nrOfLayers,
uint8_t symbol,
uint16_t nb_rb,
@@ -1100,8 +1101,10 @@ void nr_ulsch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
if (n_rx > 1) {
#if defined(__x86_64__) || defined(__i386__)
for (int aatx=0; aatx<nrOfLayers; aatx++) {
int nb_re = nb_rb*12;
int nb_re = nb_rb * 12;
for (int aatx = 0; aatx < nrOfLayers; aatx++) {
rxdataF_comp128[0] = (__m128i *)&rxdataF_comp[aatx*frame_parms->nb_antennas_rx][(symbol*(nb_re + off))];
ul_ch_mag128[0] = (__m128i *)&ul_ch_mag[aatx*frame_parms->nb_antennas_rx][(symbol*(nb_re + off))];
@@ -1113,7 +1116,7 @@ void nr_ulsch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
ul_ch_mag128[1] = (__m128i *)&ul_ch_mag[aatx*frame_parms->nb_antennas_rx+aa][(symbol*(nb_re + off))];
ul_ch_mag128b[1] = (__m128i *)&ul_ch_magb[aatx*frame_parms->nb_antennas_rx+aa][(symbol*(nb_re + off))];
ul_ch_mag128c[1] = (__m128i *)&ul_ch_magc[aatx*frame_parms->nb_antennas_rx+aa][(symbol*(nb_re + off))];
// MRC on each re of rb, both on MF output and magnitude (for 16QAM/64QAM llr computation)
for (i=0; i<nb_rb_0*3; i++) {
rxdataF_comp128[0][i] = _mm_adds_epi16(rxdataF_comp128[0][i],rxdataF_comp128[1][i]);
@@ -1123,6 +1126,20 @@ void nr_ulsch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
//rxdataF_comp128[0][i] = _mm_add_epi16(rxdataF_comp128_0[i],(*(__m128i *)&jitterc[0]));
}
}
if (rho) {
__m128i *rho128[2];
for (int aatx2 = 0; aatx2 < nrOfLayers; aatx2++) {
rho128[0] = (__m128i *) &rho[0][aatx * nrOfLayers + aatx2][(symbol * (nb_re + off))];
for (int aa = 1; aa < n_rx; aa++) {
rho128[1] = (__m128i *) &rho[aa][aatx * nrOfLayers + aatx2][(symbol * (nb_re + off))];
for (i = 0; i < nb_rb_0 * 3; i++) {
rho128[0][i] = _mm_adds_epi16(rho128[0][i], rho128[1][i]);
}
}
}
}
}
#elif defined(__arm__) || defined(__aarch64__)
rxdataF_comp128_0 = (int16x8_t *)&rxdataF_comp[0][symbol*frame_parms->N_RB_DL*12];
@@ -1982,11 +1999,20 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
uint32_t rxdataF_ext_offset = 0;
uint8_t shift_ch_ext = rel15_ul->nrOfLayers > 1 ? log2_approx(max_ch >> 11) : 0;
// Flag to select the receiver: (true) Nonlinear ML receiver, (false) Linear MMSE receiver
// By default, we are using the Nonlinear ML receiver, except
// - for 256QAM as Nonlinear ML receiver is not implemented for 256QAM
// - for 64QAM as Nonlinear ML receiver requires more processing time than MMSE, and many machines are not powerful enough
bool ml_rx = true;
if (rel15_ul->nrOfLayers != 2 || rel15_ul->qam_mod_order >= 6) {
ml_rx = false;
}
int ad_shift = 0;
if (rel15_ul->nrOfLayers == 1) {
ad_shift = 1 + log2_approx(frame_parms->nb_antennas_rx >> 2);
} else {
ad_shift = -3; // For 2-layers, we are already doing a bit shift in the nr_ulsch_zero_forcing_rx_2layers() function, so we can use more bits
} else if (ml_rx == false) {
ad_shift = -3; // For 2-layers, we are already doing a bit shift in the nr_ulsch_mmse_2layers() function, so we can use more bits
}
for(uint8_t symbol = rel15_ul->start_symbol_index; symbol < (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols); symbol++) {
@@ -2092,7 +2118,7 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
nb_re_pusch);
// Apply MMSE for 2 Tx layers
if (rel15_ul->nrOfLayers == 2) {
if (ml_rx == false && rel15_ul->nrOfLayers == 2) {
nr_ulsch_mmse_2layers(frame_parms,
pusch_vars->rxdataF_comp,
pusch_vars->ul_ch_mag0,
@@ -2143,16 +2169,46 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
/*-------------------- LLRs computation -------------------------------------------------------------*/
/*-----------------------------------------------------------------------------------------------------*/
start_meas(&gNB->ulsch_llr_stats);
for (aatx=0; aatx < rel15_ul->nrOfLayers; aatx++) {
nr_ulsch_compute_llr(&pusch_vars->rxdataF_comp[aatx*frame_parms->nb_antennas_rx][symbol * (off + rel15_ul->rb_size * NR_NB_SC_PER_RB)],
pusch_vars->ul_ch_mag0[aatx*frame_parms->nb_antennas_rx],
pusch_vars->ul_ch_magb0[aatx*frame_parms->nb_antennas_rx],
pusch_vars->ul_ch_magc0[aatx*frame_parms->nb_antennas_rx],
&pusch_vars->llr_layers[aatx][rxdataF_ext_offset * rel15_ul->qam_mod_order],
rel15_ul->rb_size,
pusch_vars->ul_valid_re_per_slot[symbol],
symbol,
rel15_ul->qam_mod_order);
if (ml_rx == false || rel15_ul->nrOfLayers == 1) {
for (aatx=0; aatx < rel15_ul->nrOfLayers; aatx++) {
nr_ulsch_compute_llr(&pusch_vars->rxdataF_comp[aatx * frame_parms->nb_antennas_rx][symbol * (off + rel15_ul->rb_size * NR_NB_SC_PER_RB)],
pusch_vars->ul_ch_mag0[aatx * frame_parms->nb_antennas_rx],
pusch_vars->ul_ch_magb0[aatx * frame_parms->nb_antennas_rx],
pusch_vars->ul_ch_magc0[aatx * frame_parms->nb_antennas_rx],
&pusch_vars->llr_layers[aatx][rxdataF_ext_offset * rel15_ul->qam_mod_order],
rel15_ul->rb_size,
pusch_vars->ul_valid_re_per_slot[symbol],
symbol,
rel15_ul->qam_mod_order);
}
} else {
nr_ulsch_compute_ML_llr(pusch_vars->rxdataF_comp,
pusch_vars->ul_ch_mag0,
pusch_vars->rho,
pusch_vars->llr_layers,
frame_parms->nb_antennas_rx,
rel15_ul->rb_size,
nb_re_pusch,
symbol,
rxdataF_ext_offset,
rel15_ul->qam_mod_order);
if (rel15_ul->qam_mod_order == 2) {
nr_ulsch_shift_llr(pusch_vars->llr_layers, nb_re_pusch, rxdataF_ext_offset, rel15_ul->qam_mod_order, 4);
}
#ifdef ML_DEBUG
c16_t *llr_layers0 = (c16_t *)&pusch_vars->llr_layers[0][rxdataF_ext_offset * rel15_ul->qam_mod_order];
c16_t *llr_layers1 = (c16_t *)&pusch_vars->llr_layers[1][rxdataF_ext_offset * rel15_ul->qam_mod_order];
printf("===============================\n");
printf("AFTER nr_ulsch_compute_ML_llr()\n");
printf("===============================\n");
for (int k = 0; k < nb_re_pusch; k++) {
printf("[%3i] llr_layers0 = (%6i, %6i), llr_layers1 = (%6i, %6i)\n",
k, llr_layers0[k].r, llr_layers0[k].i, llr_layers1[k].r, llr_layers1[k].i);
}
printf("\n");
#endif
}
stop_meas(&gNB->ulsch_llr_stats);
rxdataF_ext_offset += pusch_vars->ul_valid_re_per_slot[symbol];
openair1/PHY/NR_TRANSPORT/nr_ulsch_llr_computation.c
+3437
View File
File diff suppressed because it is too large Load Diff
openair1/PHY/NR_UE_TRANSPORT/pss_nr.c
+10 -8
View File
@@ -73,7 +73,7 @@ int16_t *get_primary_synchro_nr2(const int nid2)
*
*********************************************************************/
void generate_pss_nr(NR_DL_FRAME_PARMS *fp,int N_ID_2)
void generate_pss_nr(NR_DL_FRAME_PARMS *fp, int N_ID_2)
{
AssertFatal(fp->ofdm_symbol_size > 127,"Illegal ofdm_symbol_size %d\n",fp->ofdm_symbol_size);
AssertFatal(N_ID_2>=0 && N_ID_2 <=2,"Illegal N_ID_2 %d\n",N_ID_2);
@@ -88,9 +88,8 @@ void generate_pss_nr(NR_DL_FRAME_PARMS *fp,int N_ID_2)
assert(N_ID_2 < NUMBER_PSS_SEQUENCE);
memcpy(x, x_initial, sizeof(x_initial));
for (int i=0; i < (LENGTH_PSS_NR - INITIAL_PSS_NR); i++) {
x[i+INITIAL_PSS_NR] = (x[i + 4] + x[i])%(2);
}
for (int i = 0; i < (LENGTH_PSS_NR - INITIAL_PSS_NR); i++)
x[i + INITIAL_PSS_NR] = (x[i + 4] + x[i]) % (2);
for (int n=0; n < LENGTH_PSS_NR; n++) {
const int m = (n + 43 * N_ID_2) % (LENGTH_PSS_NR);
@@ -139,7 +138,8 @@ void generate_pss_nr(NR_DL_FRAME_PARMS *fp,int N_ID_2)
* sample 0 is for continuous frequency which is used here
*/
unsigned int k = fp->first_carrier_offset + fp->ssb_start_subcarrier + 56; //and
unsigned int subcarrier_start = get_softmodem_params()->sl_mode == 0 ? PSS_SSS_SUB_CARRIER_START : PSS_SSS_SUB_CARRIER_START_SL;
unsigned int k = fp->first_carrier_offset + fp->ssb_start_subcarrier + subcarrier_start;
if (k>= fp->ofdm_symbol_size) k-=fp->ofdm_symbol_size;
c16_t synchroF_tmp[fp->ofdm_symbol_size] __attribute__((aligned(32)));
memset(synchroF_tmp, 0, sizeof(synchroF_tmp));
@@ -237,7 +237,8 @@ void generate_pss_nr(NR_DL_FRAME_PARMS *fp,int N_ID_2)
static void init_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue)
{
AssertFatal(frame_parms_ue->ofdm_symbol_size > 127, "illegal ofdm_symbol_size %d\n", frame_parms_ue->ofdm_symbol_size);
for (int i = 0; i < NUMBER_PSS_SEQUENCE; i++) {
int pss_sequence = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
for (int i = 0; i < pss_sequence; i++) {
primary_synchro_nr2[i] = malloc16_clear(LENGTH_PSS_NR * sizeof(int16_t));
AssertFatal(primary_synchro_nr2[i], "Fatal memory allocation problem \n");
primary_synchro_time_nr[i] = malloc16_clear(frame_parms_ue->ofdm_symbol_size * sizeof(c16_t));
@@ -583,7 +584,8 @@ static int pss_search_time_nr(c16_t **rxdata, PHY_VARS_NR_UE *ue, int fo_flag, i
pss_source = 0;
int maxval=0;
for (int j = 0; j < NUMBER_PSS_SEQUENCE; j++)
int max_size = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
for (int j = 0; j < max_size; j++)
for (int i = 0; i < frame_parms->ofdm_symbol_size; i++) {
maxval = max(maxval, abs(primary_synchro_time_nr[j][i].r));
maxval = max(maxval, abs(primary_synchro_time_nr[j][i].i));
@@ -595,7 +597,7 @@ static int pss_search_time_nr(c16_t **rxdata, PHY_VARS_NR_UE *ue, int fo_flag, i
/* Correlation computation is based on a a dot product which is realized thank to SIMS extensions */
uint16_t pss_index_start = 0;
uint16_t pss_index_end = NUMBER_PSS_SEQUENCE;
uint16_t pss_index_end = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
if (ue->target_Nid_cell != -1) {
pss_index_start = GET_NID2(ue->target_Nid_cell);
pss_index_end = pss_index_start + 1;
openair1/PHY/NR_UE_TRANSPORT/sss_nr.c
+26 -24
View File
@@ -36,7 +36,7 @@
#include "PHY/defs_nr_UE.h"
#include "PHY/MODULATION/modulation_UE.h"
#include "executables/softmodem-common.h"
#include "PHY/NR_REFSIG/ss_pbch_nr.h"
#define DEFINE_VARIABLES_SSS_NR_H
@@ -78,31 +78,25 @@ void init_context_sss_nr(int amp)
int16_t x1[LENGTH_SSS_NR];
int16_t dss_current;
int m0, m1;
int nid_2_num = get_softmodem_params()->sl_mode == 0 ? N_ID_2_NUMBER : N_ID_2_NUMBER_SL;
const int x0_initial[INITIAL_SSS_NR] = { 1, 0, 0, 0, 0, 0, 0 };
const int x1_initial[INITIAL_SSS_NR] = { 1, 0, 0, 0, 0, 0, 0 };
for (int i=0; i < INITIAL_SSS_NR; i++) {
for (int i = 0; i < INITIAL_SSS_NR; i++) {
x0[i] = x0_initial[i];
x1[i] = x1_initial[i];
}
for (int i=0; i < (LENGTH_SSS_NR - INITIAL_SSS_NR); i++) {
x0[i+7] = (x0[i + 4] + x0[i])%(2);
x1[i+7] = (x1[i + 1] + x1[i])%(2);
for (int i = 0; i < (LENGTH_SSS_NR - INITIAL_SSS_NR); i++) {
x0[i + 7] = (x0[i + 4] + x0[i]) % (2);
x1[i + 7] = (x1[i + 1] + x1[i]) % (2);
}
for (int N_ID_2 = 0; N_ID_2 < N_ID_2_NUMBER; N_ID_2++) {
for (int N_ID_2 = 0; N_ID_2 < nid_2_num; N_ID_2++) {
for (int N_ID_1 = 0; N_ID_1 < N_ID_1_NUMBER; N_ID_1++) {
m0 = 15*(N_ID_1/112) + (5*N_ID_2);
m1 = N_ID_1%112;
m0 = 15 * (N_ID_1 / 112) + (5 * N_ID_2);
m1 = N_ID_1 % 112;
for (int n = 0; n < LENGTH_SSS_NR; n++) {
dss_current = (1 - 2*x0[(n + m0)%(LENGTH_SSS_NR)])*(1 - 2*x1[(n + m1)%(LENGTH_SSS_NR)]);
dss_current = (1 - 2 * x0 [(n + m0) % (LENGTH_SSS_NR)]) * (1 - 2 * x1[(n + m1) % (LENGTH_SSS_NR)]);
/* Modulation of SSS is a BPSK TS 36.211 chapter 5.1.2 BPSK */
#if 1
d_sss[N_ID_2][N_ID_1][n] = dss_current;// * amp;
@@ -276,8 +270,9 @@ static int do_pss_sss_extract_nr(
for (int aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
int pss_symbol = 0;
int sss_symbol = SSS_SYMBOL_NB - PSS_SYMBOL_NB;
int sss_symbol = get_softmodem_params()->sl_mode == 0 ?
(SSS_SYMBOL_NB - PSS_SYMBOL_NB) :
(SSS0_SL_SYMBOL_NB - PSS0_SL_SYMBOL_NB) ;
unsigned int ofdm_symbol_size = frame_parms->ofdm_symbol_size;
c16_t *pss_rxF = rxdataF[aarx] + pss_symbol * ofdm_symbol_size;
@@ -286,12 +281,16 @@ static int do_pss_sss_extract_nr(
c16_t *pss_rxF_ext = pss_ext[aarx];
c16_t *sss_rxF_ext = sss_ext[aarx];
unsigned int k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56;
unsigned int k = frame_parms->first_carrier_offset +
frame_parms->ssb_start_subcarrier +
((get_softmodem_params()->sl_mode == 0) ?
PSS_SSS_SUB_CARRIER_START :
PSS_SSS_SUB_CARRIER_START_SL);
if (k>= frame_parms->ofdm_symbol_size) k-=frame_parms->ofdm_symbol_size;
for (int i=0; i < LENGTH_PSS_NR; i++) {
if (doPss) {
if (doPss) {
pss_rxF_ext[i] = pss_rxF[k];
}
@@ -300,9 +299,7 @@ static int do_pss_sss_extract_nr(
}
k++;
if (k == ofdm_symbol_size) k=0;
if (k == frame_parms->ofdm_symbol_size) k = 0;
}
}
@@ -365,7 +362,12 @@ static int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue,
*
*********************************************************************/
int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, uint8_t *phase_max, int *freq_offset_sss, c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
int rx_sss_nr(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t *tot_metric,
uint8_t *phase_max,
int *freq_offset_sss,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
uint8_t i;
c16_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR];
openair1/PHY/TOOLS/simde_operations.c
+60
View File
@@ -0,0 +1,60 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include <simde/x86/avx2.h>
void simde_mm128_separate_real_imag_parts(__m128i *out_re, __m128i *out_im, __m128i in0, __m128i in1)
{
// Put in0 = [Re(0,1) Re(2,3) Im(0,1) Im(2,3)]
in0 = simde_mm_shufflelo_epi16(in0, 0xd8); //_MM_SHUFFLE(0,2,1,3));
in0 = simde_mm_shufflehi_epi16(in0, 0xd8); //_MM_SHUFFLE(0,2,1,3));
in0 = simde_mm_shuffle_epi32(in0, 0xd8); //_MM_SHUFFLE(0,2,1,3));
// Put xmm1 = [Re(4,5) Re(6,7) Im(4,5) Im(6,7)]
in1 = simde_mm_shufflelo_epi16(in1, 0xd8); //_MM_SHUFFLE(0,2,1,3));
in1 = simde_mm_shufflehi_epi16(in1, 0xd8); //_MM_SHUFFLE(0,2,1,3));
in1 = simde_mm_shuffle_epi32(in1, 0xd8); //_MM_SHUFFLE(0,2,1,3));
*out_re = simde_mm_unpacklo_epi64(in0, in1);
*out_im = simde_mm_unpackhi_epi64(in0, in1);
}
void simde_mm256_separate_real_imag_parts(__m256i *out_re, __m256i *out_im, __m256i in0, __m256i in1)
{
// Put in0 = [Re(0,1,2,3) Im(0,1,2,3) Re(4,5,6,7) Im(4,5,6,7)]
in0 = simde_mm256_shufflelo_epi16(in0, 0xd8); //_MM_SHUFFLE(0,2,1,3));
in0 = simde_mm256_shufflehi_epi16(in0, 0xd8); //_MM_SHUFFLE(0,2,1,3));
in0 = simde_mm256_shuffle_epi32(in0, 0xd8); //_MM_SHUFFLE(0,2,1,3));
// Put in1 = [Re(8,9,10,11) Im(8,9,10,11) Re(12,13,14,15) Im(12,13,14,15)]
in1 = simde_mm256_shufflelo_epi16(in1, 0xd8); //_MM_SHUFFLE(0,2,1,3));
in1 = simde_mm256_shufflehi_epi16(in1, 0xd8); //_MM_SHUFFLE(0,2,1,3));
in1 = simde_mm256_shuffle_epi32(in1, 0xd8); //_MM_SHUFFLE(0,2,1,3));
// Put tmp0 =[Re(0,1,2,3) Re(8,9,10,11) Re(4,5,6,7) Re(12,13,14,15)]
__m256i tmp0 = simde_mm256_unpacklo_epi64(in0, in1);
// Put tmp1 = [Im(0,1,2,3) Im(8,9,10,11) Im(4,5,6,7) Im(12,13,14,15)]
__m256i tmp1 = simde_mm256_unpackhi_epi64(in0, in1);
*out_re = simde_mm256_permute4x64_epi64(tmp0, 0xd8);
*out_im = simde_mm256_permute4x64_epi64(tmp1, 0xd8);
}
openair1/PHY/TOOLS/tools_defs.h
+2
View File
@@ -851,6 +851,8 @@ c32_t dot_product(const c16_t *x,
double interp(double x, double *xs, double *ys, int count);
void simde_mm128_separate_real_imag_parts(__m128i *out_re, __m128i *out_im, __m128i in0, __m128i in1);
void simde_mm256_separate_real_imag_parts(__m256i *out_re, __m256i *out_im, __m256i in0, __m256i in1);
#ifdef __cplusplus
}
openair1/PHY/defs_nr_UE.h
+21
View File
@@ -318,6 +318,22 @@ typedef struct {
fapi_nr_dl_config_dci_dl_pdu_rel15_t pdcch_config[FAPI_NR_MAX_SS];
} NR_UE_PDCCH_CONFIG;
#define NR_PSBCH_MAX_NB_CARRIERS 132
#define NR_PSBCH_MAX_NB_MOD_SYMBOLS 99
#define NR_PSBCH_DMRS_LENGTH 297 // in mod symbols
#define NR_PSBCH_DMRS_LENGTH_DWORD 20 // ceil(2(QPSK)*NR_PBCH_DMRS_LENGTH/32)
/* NR Sidelink PSBCH payload fields
TODO: This will be removed in the future and
filled in by the upper layers once developed. */
typedef struct {
uint32_t coverageIndicator : 1;
uint32_t tddConfig : 12;
uint32_t DFN : 10;
uint32_t slotIndex : 7;
uint32_t reserved : 2;
} PSBCH_payload;
#define PBCH_A 24
typedef struct {
@@ -378,8 +394,12 @@ typedef struct {
int if_freq_off;
/// \brief Indicator that UE is synchronized to a gNB
int is_synchronized;
/// \brief Indicator that UE is synchronized to a SyncRef UE on Sidelink
int is_synchronized_sl;
/// \brief Target gNB Nid_cell when UE is resynchronizing
int target_Nid_cell;
/// \brief Indicator that UE is an SynchRef UE
int sync_ref;
/// Data structure for UE process scheduling
UE_nr_proc_t proc;
/// Flag to indicate the UE shouldn't do timing correction at all
@@ -660,6 +680,7 @@ typedef struct nr_rxtx_thread_data_s {
UE_nr_rxtx_proc_t proc;
PHY_VARS_NR_UE *UE;
int writeBlockSize;
notifiedFIFO_t txFifo;
nr_phy_data_t phy_data;
int tx_wait_for_dlsch;
} nr_rxtx_thread_data_t;
openair1/PHY/defs_nr_common.h
+4
View File
@@ -169,6 +169,8 @@ struct NR_DL_FRAME_PARMS {
/// Frame type (0 FDD, 1 TDD)
frame_type_t frame_type;
uint8_t tdd_config;
/// Sidelink Cell ID
uint16_t Nid_SL;
/// Cell ID
uint16_t Nid_cell;
/// subcarrier spacing (15,30,60,120)
@@ -260,6 +262,8 @@ struct NR_DL_FRAME_PARMS {
uint8_t ssb_index;
/// OFDM symbol offset divisor for UL
uint32_t ofdm_offset_divisor;
uint16_t tdd_slot_config;
uint8_t tdd_period;
};
// PRS config structures
openair1/SIMULATION/NR_PHY/nr_dummy_functions.c
+2
View File
@@ -32,6 +32,8 @@ void nr_mac_rrc_sync_ind(const module_id_t module_id,
const frame_t frame,
const bool in_sync) {}
void nr_mac_rrc_ra_ind(const module_id_t mod_id, int frame, bool success) {}
void rrc_data_ind(const protocol_ctxt_t *const ctxt_pP,
const rb_id_t Srb_id,
const sdu_size_t sdu_sizeP,
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/pss_test.c
+6 -4
View File
@@ -119,14 +119,15 @@ void test_synchro_pss_nr(PHY_VARS_NR_UE *PHY_VARS_NR_UE, int position_symbol, in
/* search pss */
synchro_position = pss_synchro_nr(PHY_VARS_NR_UE, rate_change);
int pss_sequence = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
if (pss_sequence_number < NUMBER_PSS_SEQUENCE) {
if (pss_sequence_number < pss_sequence) {
NID2_value = pss_sequence_number;
} else {
NID2_value = NUMBER_PSS_SEQUENCE;
NID2_value = pss_sequence;
}
if (NID2_value < NUMBER_PSS_SEQUENCE) {
if (NID2_value < pss_sequence) {
test->number_of_tests++;
/* position should be adjusted with i&q samples which are successively stored as int16 in the received buffer */
int test_margin = PSS_DETECTION_MARGIN_MAX; /* warning correlation results give an offset position between 0 and 12 */
@@ -213,9 +214,10 @@ int main(int argc, char *argv[])
test_synchro_pss_nr(PHY_vars_UE, 0, INVALID_PSS_SEQUENCE, &test);
#endif
int pss_sequence = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
for (int index_position = 0; index_position < size_test_position; index_position++) {
for (int number_pss_sequence = 0; number_pss_sequence < NUMBER_PSS_SEQUENCE; number_pss_sequence++) {
for (int number_pss_sequence = 0; number_pss_sequence < pss_sequence; number_pss_sequence++) {
p_test_synchro_pss(PHY_vars_UE, test_position[index_position], number_pss_sequence, &test);
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/pss_util_test.c
+13 -8
View File
@@ -111,12 +111,15 @@ void phase_shift_samples(int16_t *samples, int length, int16_t phase_shift_re, i
void display_data(int pss_sequence_number, int16_t *rxdata, int position) {
#ifdef DEBUG_TEST_PSS
int16_t *pss_sequence[NUMBER_PSS_SEQUENCE] = {primary_synch0_time, primary_synch1_time, primary_synch2_time};
int16_t *pss_sequence_time = pss_sequence[pss_sequence_number];
int pss_sequence = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
int16_t *pss_sequence[pss_sequence] = {primary_synch0_time, primary_synch1_time, primary_synch2_time};
int16_t *pss_sequence_sl[pss_sequence] = {primary_synch0_time, primary_synch1_time};
int16_t *pss_sequence_time = pss_sequence[pss_sequence_number];;
if (get_softmodem_params()->sl_mode != 0) {
pss_sequence_time = pss_sequence_sl[pss_sequence_number];
printf(" pss %6d data \n", pss_sequence_number);
for (int i = 0; i < 4; i++) {
if (pss_sequence_number < NUMBER_PSS_SEQUENCE) {
if (pss_sequence_number < pss_sequence) {
printf("[i %6d] : %4d [i %6d] : %8i at address : %p \n", i, pss_sequence_time[2*i], (i + position), rxdata[2*i + (position*2)], &(rxdata[2*i + (position*2)]));
printf("[q %6d] : %4d [q %6d] : %8i at address : %p \n", i, pss_sequence_time[2*i+1], (i + position), rxdata[2*i + 1 + (position*2)], &(rxdata[2*i + 1 + (position*2)]));
} else {
@@ -242,7 +245,8 @@ int init_test(unsigned char N_tx, unsigned char N_rx, unsigned char transmission
int n_ssb_crb = 0;
int ssb_subcarrier_offset = 0;
nr_init_frame_parms_ue(frame_parms, mu, extended_prefix_flag, N_RB_DL, n_ssb_crb, ssb_subcarrier_offset);
PHY_vars_UE->frame_parms.Nid_cell = (3 * N_ID_1_NUMBER) + N_ID_2_NUMBER; /* set to unvalid value */
int nid_2_num = get_softmodem_params()->sl_mode == 0 ? N_ID_2_NUMBER : N_ID_2_NUMBER_SL;
PHY_vars_UE->frame_parms.Nid_cell = (3 * N_ID_1_NUMBER) + nid_2_num; /* set to unvalid value */
//phy_init_nr_top(frame_parms);
@@ -447,8 +451,8 @@ int set_pss_in_rx_buffer(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int p
printf("This pss sequence can not be fully written in the received window \n");
return (-1);
}
if ((pss_sequence_number >= NUMBER_PSS_SEQUENCE) && (pss_sequence_number < 0)) {
int pss_sequence = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
if ((pss_sequence_number >= pss_sequence) && (pss_sequence_number < 0)) {
printf("Unknow pss sequence %d \n", pss_sequence_number);
return (-1);
}
@@ -504,8 +508,9 @@ void set_sequence_pss(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int pss_
if (position_symbol < 0) {
set_pss_in_rx_buffer_from_external_buffer(PHY_vars_UE, input_buffer);
}
int pss_sequence = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
/* write pss sequence in received ue buffer */
else if (pss_sequence_number < NUMBER_PSS_SEQUENCE) {
else if (pss_sequence_number < pss_sequence) {
if (position_symbol > (samples_for_frame - frame_parms->ofdm_symbol_size)) {
printf("This position for pss sequence %d is not supported because it exceeds the frame length %d!\n", position_symbol, samples_for_frame);
exit(0);
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/sss_test.c
+2 -2
View File
@@ -227,10 +227,10 @@ int main(int argc, char *argv[])
Nid2 = GET_NID2(Nid_cell[index]);
Nid1 = GET_NID1(Nid_cell[index]);
int nid_2_num = get_softmodem_params()->sl_mode == 0 ? N_ID_2_NUMBER : N_ID_2_NUMBER_SL;
for (int position = 0; position < size_test_position; position++) {
PHY_vars_UE->frame_parms.Nid_cell = (3 * N_ID_1_NUMBER) + N_ID_2_NUMBER; /* set to invalid value */
PHY_vars_UE->frame_parms.Nid_cell = (3 * N_ID_1_NUMBER) + nid_2_num; /* set to invalid value */
phase = (*p_test_synchro_pss_sss)(PHY_vars_UE, test_position[position], &frame_parms_gNB, &test); /* return phase index which gives phase error from an array */
openair2/COMMON/mac_messages_def.h
+2
View File
@@ -48,6 +48,8 @@ MESSAGE_DEF(RRC_MAC_MCCH_DATA_IND, MESSAGE_PRIORITY_MED_PLUS, RrcMacMcchDat
MESSAGE_DEF(RRC_MAC_PCCH_DATA_REQ, MESSAGE_PRIORITY_MED_PLUS, RrcMacPcchDataReq, rrc_mac_pcch_data_req)
MESSAGE_DEF(NR_RRC_MAC_RA_IND, MESSAGE_PRIORITY_MED_PLUS, NRRrcMacRaInd, nr_rrc_mac_ra_ind)
/* RRC configures DRX context (MAC timers) of a UE */
MESSAGE_DEF(RRC_MAC_DRX_CONFIG_REQ, MESSAGE_PRIORITY_MED, rrc_mac_drx_config_req_t, rrc_mac_drx_config_req)
openair2/COMMON/mac_messages_types.h
+9 -1
View File
@@ -54,7 +54,9 @@
#define RRC_MAC_MCCH_DATA_IND(mSGpTR) (mSGpTR)->ittiMsg.rrc_mac_mcch_data_ind
#define RRC_MAC_PCCH_DATA_REQ(mSGpTR) (mSGpTR)->ittiMsg.rrc_mac_pcch_data_req
#define RRC_MAC_DRX_CONFIG_REQ(mSGpTR) (mSGpTR)->ittiMsg.rrc_mac_drx_config_req
#define NR_RRC_MAC_RA_IND(mSGpTR) (mSGpTR)->ittiMsg.nr_rrc_mac_ra_ind
#define RRC_MAC_DRX_CONFIG_REQ(mSGpTR) (mSGpTR)->ittiMsg.rrc_mac_drx_config_req
// Some constants from "LAYER2/MAC/defs.h"
#define BCCH_SDU_SIZE (512)
@@ -65,6 +67,12 @@
//-------------------------------------------------------------------------------------------//
// Messages between RRC and MAC layers
typedef struct NRRrcMacRaInd_s {
uint32_t frame;
bool RA_succeeded;
} NRRrcMacRaInd;
typedef struct RrcMacInSyncInd_s {
uint32_t frame;
uint8_t sub_frame;
openair2/F1AP/f1ap_common.c
+1 -1
View File
@@ -36,7 +36,7 @@ static f1ap_cudu_inst_t *f1_du_inst[NUMBER_OF_gNB_MAX]= {0};
static f1ap_cudu_inst_t *f1_cu_inst[NUMBER_OF_gNB_MAX]= {0};
uint8_t F1AP_get_next_transaction_identifier(instance_t mod_idP, instance_t cu_mod_idP) {
static uint8_t transaction_identifier[NUMBER_OF_gNB_MAX];
static uint8_t transaction_identifier[NUMBER_OF_gNB_MAX] = {0};
transaction_identifier[mod_idP+cu_mod_idP] =
(transaction_identifier[mod_idP+cu_mod_idP] + 1) % F1AP_TRANSACTION_IDENTIFIER_NUMBER;
return transaction_identifier[mod_idP+cu_mod_idP];
openair2/F1AP/f1ap_cu_ue_context_management.c
+2 -2
View File
@@ -693,7 +693,7 @@ int CU_handle_UE_CONTEXT_SETUP_RESPONSE(instance_t instance,
F1AP_DLUPTNLInformation_ToBeSetup_Item_t *dl_up_tnl_info_p = (F1AP_DLUPTNLInformation_ToBeSetup_Item_t *)drbs_setup_item_p->dLUPTNLInformation_ToBeSetup_List.list.array[0];
F1AP_GTPTunnel_t *dl_up_tnl0 = dl_up_tnl_info_p->dLUPTNLInformation.choice.gTPTunnel;
BIT_STRING_TO_TRANSPORT_LAYER_ADDRESS_IPv4(&dl_up_tnl0->transportLayerAddress, drb_p->up_dl_tnl[0].tl_address);
OCTET_STRING_TO_INT32(&dl_up_tnl0->gTP_TEID, drb_p->up_dl_tnl[0].teid);
OCTET_STRING_TO_UINT32(&dl_up_tnl0->gTP_TEID, drb_p->up_dl_tnl[0].teid);
GtpuUpdateTunnelOutgoingAddressAndTeid(getCxt(CUtype, instance)->gtpInst,
f1ap_ue_context_setup_resp->rnti,
(ebi_t)drbs_setup_item_p->dRBID,
@@ -1654,7 +1654,7 @@ int CU_handle_UE_CONTEXT_MODIFICATION_RESPONSE(instance_t instance,
F1AP_DLUPTNLInformation_ToBeSetup_Item_t *dl_up_tnl_info_p = (F1AP_DLUPTNLInformation_ToBeSetup_Item_t *)drbs_setupmod_item_p->dLUPTNLInformation_ToBeSetup_List.list.array[0];
F1AP_GTPTunnel_t *dl_up_tnl0 = dl_up_tnl_info_p->dLUPTNLInformation.choice.gTPTunnel;
BIT_STRING_TO_TRANSPORT_LAYER_ADDRESS_IPv4(&dl_up_tnl0->transportLayerAddress, drb_p->up_dl_tnl[0].tl_address);
OCTET_STRING_TO_INT32(&dl_up_tnl0->gTP_TEID, drb_p->up_dl_tnl[0].teid);
OCTET_STRING_TO_UINT32(&dl_up_tnl0->gTP_TEID, drb_p->up_dl_tnl[0].teid);
GtpuUpdateTunnelOutgoingAddressAndTeid(getCxt(CUtype, instance)->gtpInst,
f1ap_ue_context_modification_resp->rnti,
(ebi_t)drbs_setupmod_item_p->dRBID,
openair2/F1AP/f1ap_du_rrc_message_transfer.c
+1 -1
View File
@@ -219,7 +219,7 @@ int DU_send_INITIAL_UL_RRC_MESSAGE_TRANSFER(instance_t instanceP,
ie6->id = F1AP_ProtocolIE_ID_id_TransactionID;
ie6->criticality = F1AP_Criticality_ignore;
ie6->value.present = F1AP_InitialULRRCMessageTransferIEs__value_PR_TransactionID;
ie6->value.choice.TransactionID = F1AP_get_next_transaction_identifier(f1ap_req(false, instanceP)->gNB_DU_id, f1ap_req(false, instanceP)->gNB_DU_id);
ie6->value.choice.TransactionID = F1AP_get_next_transaction_identifier(0, 0);
/* encode */
if (f1ap_encode_pdu(&pdu, &buffer, &len) < 0) {
openair2/F1AP/f1ap_du_ue_context_management.c
+2 -2
View File
@@ -161,7 +161,7 @@ int DU_handle_UE_CONTEXT_SETUP_REQUEST(instance_t instance,
F1AP_ULUPTNLInformation_ToBeSetup_Item_t *ul_up_tnl_info_p = (F1AP_ULUPTNLInformation_ToBeSetup_Item_t *)drbs_tobesetup_item_p->uLUPTNLInformation_ToBeSetup_List.list.array[0];
F1AP_GTPTunnel_t *ul_up_tnl0 = ul_up_tnl_info_p->uLUPTNLInformation.choice.gTPTunnel;
BIT_STRING_TO_TRANSPORT_LAYER_ADDRESS_IPv4(&ul_up_tnl0->transportLayerAddress, drb_p->up_ul_tnl[0].tl_address);
OCTET_STRING_TO_INT32(&ul_up_tnl0->gTP_TEID, drb_p->up_ul_tnl[0].teid);
OCTET_STRING_TO_UINT32(&ul_up_tnl0->gTP_TEID, drb_p->up_ul_tnl[0].teid);
// 3GPP assumes GTP-U is on port 2152, but OAI is configurable
drb_p->up_ul_tnl[0].port=getCxt(false,instance)->setupReq.CUport;
@@ -877,7 +877,7 @@ int DU_handle_UE_CONTEXT_MODIFICATION_REQUEST(instance_t instance, uint32_t asso
F1AP_ULUPTNLInformation_ToBeSetup_Item_t *ul_up_tnl_info_p = (F1AP_ULUPTNLInformation_ToBeSetup_Item_t *)drbs_tobesetupmod_item_p->uLUPTNLInformation_ToBeSetup_List.list.array[0];
F1AP_GTPTunnel_t *ul_up_tnl0 = ul_up_tnl_info_p->uLUPTNLInformation.choice.gTPTunnel;
BIT_STRING_TO_TRANSPORT_LAYER_ADDRESS_IPv4(&ul_up_tnl0->transportLayerAddress, drb_p->up_ul_tnl[0].tl_address);
OCTET_STRING_TO_INT32(&ul_up_tnl0->gTP_TEID, drb_p->up_ul_tnl[0].teid);
OCTET_STRING_TO_UINT32(&ul_up_tnl0->gTP_TEID, drb_p->up_ul_tnl[0].teid);
// 3GPP assumes GTP-U is on port 2152, but OAI is configurable
drb_p->up_ul_tnl[0].port=getCxt(false,instance)->setupReq.CUport;
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
+1 -7
View File
@@ -483,19 +483,13 @@ typedef enum nr_ssb_and_cset_mux_pattern_type_e {
NR_SSB_AND_CSET_MUX_PATTERN_TYPE3
} nr_ssb_and_cset_mux_pattern_type_t;
typedef enum {
SFN_C_MOD_2_EQ_0,
SFN_C_MOD_2_EQ_1,
SFN_C_IMPOSSIBLE
} SFN_C_TYPE;
typedef struct Type0_PDCCH_CSS_config_s {
int32_t num_rbs;
int32_t num_symbols;
int32_t rb_offset; // Offset from SSB RB0
uint32_t type0_pdcch_ss_mux_pattern;
uint16_t frame;
SFN_C_TYPE sfn_c;
int sfn_c;
uint32_t n_c;
uint32_t n_0;
uint32_t number_of_search_space_per_slot;
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+11 -11
View File
@@ -164,12 +164,12 @@ const int32_t table_38213_13_10_c4[16] = { 0, 8, 0, 8,-41, 25,-41, 49, reserv
const float table_38213_13_11_c1[16] = { 0, 0, 2, 2, 5, 5, 7, 7, 0, 5, 0, 0, 2, 2, 5, 5}; // O
const int32_t table_38213_13_11_c2[16] = { 1, 2, 1, 2, 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1};
const float table_38213_13_11_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 1, 1, 1, 1, 1, 1, 1}; // M
const float table_38213_13_11_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 0.5f, 2, 2, 1, 1, 1, 1, 1, 1}; // M
const int32_t table_38213_13_11_c4[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 1, 2, 1, 2}; // i is even as default
const float table_38213_13_12_c1[16] = { 0, 0, 2.5f, 2.5f, 5, 5, 0, 2.5f, 5, 7.5f, 7.5f, 7.5f, 0, 5, reserved, reserved}; // O, index 14-15 reserved
const int32_t table_38213_13_12_c2[16] = { 1, 2, 1, 2, 1, 2, 2, 2, 2, 1, 2, 2, 1, 1, reserved, reserved}; // index 14-15 reserved
const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f, 0.5f, 1, 0.5f, 0.5f, 1, 1, reserved, reserved}; // M, index 14-15 reserved
const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f, 0.5f, 1, 0.5f, 0.5f, 2, 2, reserved, reserved}; // M, index 14-15 reserved
const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 };
@@ -4301,7 +4301,7 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
// type0-pdcch search space
float big_o = 0.0f;
float big_m = 0.0f;
type0_PDCCH_CSS_config->sfn_c = SFN_C_IMPOSSIBLE; // only valid for mux=1
type0_PDCCH_CSS_config->sfn_c = -1; // only valid for mux=1
type0_PDCCH_CSS_config->n_c = UINT_MAX;
type0_PDCCH_CSS_config->number_of_search_space_per_slot = UINT_MAX;
type0_PDCCH_CSS_config->first_symbol_index = UINT_MAX;
@@ -4316,11 +4316,7 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
uint32_t temp = (uint32_t)(big_o*(1<<scs_pdcch)) + (uint32_t)(type0_PDCCH_CSS_config->ssb_index*big_m);
type0_PDCCH_CSS_config->n_c = temp / num_slot_per_frame;
if((temp/num_slot_per_frame) & 0x1){
type0_PDCCH_CSS_config->sfn_c = SFN_C_MOD_2_EQ_1;
}else{
type0_PDCCH_CSS_config->sfn_c = SFN_C_MOD_2_EQ_0;
}
type0_PDCCH_CSS_config->sfn_c = type0_PDCCH_CSS_config->n_c % 2;
if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 7) && (type0_PDCCH_CSS_config->ssb_index&1)){
type0_PDCCH_CSS_config->first_symbol_index = type0_PDCCH_CSS_config->num_symbols;
@@ -4335,9 +4331,13 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR2){
big_o = table_38213_13_12_c1[index_4lsb];
type0_PDCCH_CSS_config->number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb];
type0_PDCCH_CSS_config->number_of_search_space_per_slot = table_38213_13_12_c2[index_4lsb];
big_m = table_38213_13_12_c3[index_4lsb];
uint32_t temp = (uint32_t)(big_o*(1<<scs_pdcch)) + (uint32_t)(type0_PDCCH_CSS_config->ssb_index*big_m);
type0_PDCCH_CSS_config->n_c = temp / num_slot_per_frame;
type0_PDCCH_CSS_config->sfn_c = type0_PDCCH_CSS_config->n_c % 2;
if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 10) && (type0_PDCCH_CSS_config->ssb_index&1)){
type0_PDCCH_CSS_config->first_symbol_index = 7;
}else if((index_4lsb == 6 || index_4lsb == 7 || index_4lsb == 8 || index_4lsb == 11) && (type0_PDCCH_CSS_config->ssb_index&1)){
@@ -4461,8 +4461,8 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
// AssertFatal(first_symbol_index!=UINT_MAX,"");
// mac->type0_pdcch_dci_config.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
AssertFatal(type0_PDCCH_CSS_config->sfn_c!=SFN_C_IMPOSSIBLE,"");
AssertFatal(type0_PDCCH_CSS_config->n_c!=UINT_MAX,"");
AssertFatal(type0_PDCCH_CSS_config->sfn_c >= 0, "");
AssertFatal(type0_PDCCH_CSS_config->n_c != UINT_MAX, "");
type0_PDCCH_CSS_config->n_0 = ((uint32_t)(big_o*(1<<scs_pdcch)) + (uint32_t)(type0_PDCCH_CSS_config->ssb_index*big_m))%num_slot_per_frame;
type0_PDCCH_CSS_config->cset_start_rb = ssb_offset_point_a - type0_PDCCH_CSS_config->rb_offset;
openair2/LAYER2/NR_MAC_UE/mac_defs.h
+1 -1
View File
@@ -420,7 +420,7 @@ typedef struct {
/// Type0-PDCCH seach space
fapi_nr_dl_config_dci_dl_pdu_rel15_t type0_pdcch_dci_config;
uint32_t type0_pdcch_ss_mux_pattern;
SFN_C_TYPE type0_pdcch_ss_sfn_c;
int type0_pdcch_ss_sfn_c;
uint32_t type0_pdcch_ss_n_c;
uint32_t type0_pdcch_consecutive_slots;
openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c
+1 -1
View File
@@ -896,7 +896,6 @@ void nr_ra_succeeded(const module_id_t mod_id, const uint8_t gNB_index, const fr
if (ra->cfra) {
LOG_I(MAC, "[UE %d][%d.%d][RAPROC] RA procedure succeeded. CF-RA: RAR successfully received.\n", mod_id, frame, slot);
nr_rrc_RA_succeeded(mod_id, gNB_index);
mac->state = UE_CONNECTED;
ra->RA_window_cnt = -1;
} else {
@@ -911,6 +910,7 @@ void nr_ra_succeeded(const module_id_t mod_id, const uint8_t gNB_index, const fr
LOG_D(MAC, "In %s: [UE %d] clearing RA_active flag...\n", __FUNCTION__, mod_id);
ra->RA_active = 0;
ra->ra_state = RA_SUCCEEDED;
nr_mac_rrc_ra_ind(mod_id, frame, true);
}
// Handling failure of RA procedure @ MAC layer
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+71 -70
View File
@@ -96,9 +96,6 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
const NR_SearchSpace_t *ss)
{
uint16_t monitoringSymbolsWithinSlot = 0;
int sps = 0;
const NR_UE_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP;
const NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_BWP_Id_t dl_bwp_id = current_DL_BWP ? current_DL_BWP->bwp_id : 0;
@@ -187,70 +184,72 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
mac->cg,
&mac->def_dci_pdu_rel15[dl_config->slot][dci_format],
dci_format,
NR_RNTI_TC,
rnti_type,
coreset,
dl_bwp_id,
ss->searchSpaceType->present,
mac->type0_PDCCH_CSS_config.num_rbs,
alt_size);
rel15->BWPStart = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.cset_start_rb : current_DL_BWP->BWPStart;
rel15->BWPSize = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.num_rbs : current_DL_BWP->BWPSize;
switch(rnti_type) {
case NR_RNTI_C:
// we use DL BWP dedicated
sps = current_DL_BWP->cyclicprefix ? 12 : 14;
// for SPS=14 8 MSBs in positions 13 down to 6
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = mac->crnti;
rel15->SubcarrierSpacing = current_DL_BWP->scs;
break;
case NR_RNTI_RA:
// we use the initial DL BWP
sps = current_DL_BWP->cyclicprefix == NULL ? 14 : 12;
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = mac->ra.ra_rnti;
rel15->SubcarrierSpacing = current_DL_BWP->scs;
break;
case NR_RNTI_P:
break;
case NR_RNTI_CS:
break;
case NR_RNTI_TC:
// we use the initial DL BWP
sps = current_DL_BWP->cyclicprefix == NULL ? 14 : 12;
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = mac->ra.t_crnti;
rel15->SubcarrierSpacing = current_DL_BWP->scs;
break;
case NR_RNTI_SP_CSI:
break;
case NR_RNTI_SI:
sps=14;
// for SPS=14 8 MSBs in positions 13 down to 6
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = SI_RNTI; // SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
if(mac->frequency_range == FR2)
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon + 2;
break;
case NR_RNTI_SFI:
break;
case NR_RNTI_INT:
break;
case NR_RNTI_TPC_PUSCH:
break;
case NR_RNTI_TPC_PUCCH:
break;
case NR_RNTI_TPC_SRS:
break;
default:
break;
}
}
rel15->BWPStart = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.cset_start_rb : current_DL_BWP->BWPStart;
rel15->BWPSize = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.num_rbs : current_DL_BWP->BWPSize;
uint16_t monitoringSymbolsWithinSlot = 0;
int sps = 0;
switch(rnti_type) {
case NR_RNTI_C:
// we use DL BWP dedicated
sps = current_DL_BWP->cyclicprefix ? 12 : 14;
// for SPS=14 8 MSBs in positions 13 down to 6
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = mac->crnti;
rel15->SubcarrierSpacing = current_DL_BWP->scs;
break;
case NR_RNTI_RA:
// we use the initial DL BWP
sps = current_DL_BWP->cyclicprefix == NULL ? 14 : 12;
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = mac->ra.ra_rnti;
rel15->SubcarrierSpacing = current_DL_BWP->scs;
break;
case NR_RNTI_P:
break;
case NR_RNTI_CS:
break;
case NR_RNTI_TC:
// we use the initial DL BWP
sps = current_DL_BWP->cyclicprefix == NULL ? 14 : 12;
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = mac->ra.t_crnti;
rel15->SubcarrierSpacing = current_DL_BWP->scs;
break;
case NR_RNTI_SP_CSI:
break;
case NR_RNTI_SI:
sps=14;
// for SPS=14 8 MSBs in positions 13 down to 6
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = SI_RNTI; // SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
if(mac->frequency_range == FR2)
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon + 2;
break;
case NR_RNTI_SFI:
break;
case NR_RNTI_INT:
break;
case NR_RNTI_TPC_PUSCH:
break;
case NR_RNTI_TPC_PUCCH:
break;
case NR_RNTI_TPC_SRS:
break;
default:
break;
}
for (int i = 0; i < sps; i++) {
if ((monitoringSymbolsWithinSlot >> (sps - 1 - i)) & 1) {
rel15->coreset.StartSymbolIndex = i;
@@ -263,15 +262,17 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
fill_dci_search_candidates(ss, rel15, Y);
#ifdef DEBUG_DCI
LOG_D(MAC, "[DCI_CONFIG] Configure DCI PDU: rnti_type %d BWPSize %d BWPStart %d rel15->SubcarrierSpacing %d rel15->dci_format %d rel15->dci_length %d sps %d monitoringSymbolsWithinSlot %d \n",
rnti_type,
rel15->BWPSize,
rel15->BWPStart,
rel15->SubcarrierSpacing,
rel15->dci_format_options[0],
rel15->dci_length_options[0],
sps,
monitoringSymbolsWithinSlot);
for (int i = 0; i < rel15->num_dci_options; i++) {
LOG_D(MAC, "[DCI_CONFIG] Configure DCI PDU: rnti_type %d BWPSize %d BWPStart %d rel15->SubcarrierSpacing %d rel15->dci_format %d rel15->dci_length %d sps %d monitoringSymbolsWithinSlot %d \n",
rnti_type,
rel15->BWPSize,
rel15->BWPStart,
rel15->SubcarrierSpacing,
rel15->dci_format_options[i],
rel15->dci_length_options[i],
sps,
monitoringSymbolsWithinSlot);
}
#endif
// add DCI
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+18 -11
View File
@@ -443,14 +443,14 @@ int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_in
LOG_D(MAC,"Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n",
dci->rnti,dci->dci_format,dci->n_CCE,dci->payloadSize,*(unsigned long long*)dci->payloadBits);
int8_t ret = nr_extract_dci_info(mac, dci->dci_format, dci->payloadSize, dci->rnti, dci->ss_type, (uint64_t *)dci->payloadBits, def_dci_pdu_rel15, slot);
if ((ret&1) == 1) return -1;
const int ret = nr_extract_dci_info(mac, dci->dci_format, dci->payloadSize, dci->rnti, dci->ss_type, (uint64_t *)dci->payloadBits, def_dci_pdu_rel15, slot);
if ((ret & 1) == 1)
return -1;
else if (ret == 2) {
dci->dci_format = NR_UL_DCI_FORMAT_0_0;
dci->dci_format = (dci->dci_format == NR_UL_DCI_FORMAT_0_0) ? NR_DL_DCI_FORMAT_1_0 : NR_UL_DCI_FORMAT_0_0;
def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[slot][dci->dci_format];
}
int8_t ret_proc = nr_ue_process_dci(module_id, cc_id, gNB_index, frame, slot, def_dci_pdu_rel15, dci);
return ret_proc;
return nr_ue_process_dci(module_id, cc_id, gNB_index, frame, slot, def_dci_pdu_rel15, dci);
}
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, frame_t frame, int slot, dci_pdu_rel15_t *dci, fapi_nr_dci_indication_pdu_t *dci_ind) {
@@ -653,6 +653,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti;
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
dlsch_config_pdu_1_0->pduBitmap = 0;
NR_PDSCH_Config_t *pdsch_config = current_DL_BWP ? current_DL_BWP->pdsch_Config : NULL;
if (dci_ind->ss_type == NR_SearchSpace__searchSpaceType_PR_common) {
dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs ? mac->type0_PDCCH_CSS_config.num_rbs : current_DL_BWP->initial_BWPSize;
@@ -2847,7 +2849,7 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
dci_pdu_rel15_t *dci_pdu_rel15,
int slot)
{
LOG_D(MAC,"nr_extract_dci_info : dci_pdu %lx, size %d, format %d\n", *dci_pdu, dci_size, dci_format);
int pos = 0;
int fsize = 0;
int rnti_type = get_rnti_type(mac, rnti);
@@ -2864,7 +2866,7 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
current_DL_BWP->initial_BWPSize);
else
N_RB = mac->type0_PDCCH_CSS_config.num_rbs;
LOG_D(MAC,"nr_extract_dci_info : dci_pdu %lx, size %d\n",*dci_pdu,dci_size);
switch(dci_format) {
case NR_DL_DCI_FORMAT_1_0:
@@ -2914,7 +2916,7 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
//switch to DCI_0_0
if (dci_pdu_rel15->format_indicator == 0) {
dci_pdu_rel15 = &mac->def_dci_pdu_rel15[slot][NR_UL_DCI_FORMAT_0_0];
return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15, slot);
return 2 + nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15, slot);
}
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu);
@@ -3105,7 +3107,7 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
//switch to DCI_0_0
if (dci_pdu_rel15->format_indicator == 0) {
dci_pdu_rel15 = &mac->def_dci_pdu_rel15[slot][NR_UL_DCI_FORMAT_0_0];
return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15, slot);
return 2 + nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15, slot);
}
// Freq domain assignment 0-16 bit
@@ -3246,8 +3248,13 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
#ifdef DEBUG_EXTRACT_DCI
LOG_I(MAC,"Format indicator %d (%d bits)=> %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,dci_size-pos,*dci_pdu);
#endif
if (dci_pdu_rel15->format_indicator == 1)
return 1; // discard dci, format indicator not corresponding to dci_format
//switch to DCI_1_0
if (dci_pdu_rel15->format_indicator == 1) {
dci_pdu_rel15 = &mac->def_dci_pdu_rel15[slot][NR_DL_DCI_FORMAT_1_0];
return 2 + nr_extract_dci_info(mac, NR_DL_DCI_FORMAT_1_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15, slot);
}
fsize = dci_pdu_rel15->frequency_domain_assignment.nbits;
pos+=fsize;
dci_pdu_rel15->frequency_domain_assignment.val = (*dci_pdu>>(dci_size-pos))&((1<<fsize)-1);
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+5 -16
View File
@@ -951,7 +951,7 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info)
nr_scheduled_response_t scheduled_response;
nr_dcireq_t dcireq;
if(mac->state == UE_CONNECTED) {
if(mac->state > UE_NOT_SYNC) {
dcireq.module_id = mod_id;
dcireq.gNB_index = gNB_index;
@@ -964,8 +964,10 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info)
if(mac->ul_time_alignment.ta_apply)
schedule_ta_command(dl_config, &mac->ul_time_alignment);
nr_schedule_csirs_reception(mac, rx_frame, rx_slot);
nr_schedule_csi_for_im(mac, rx_frame, rx_slot);
if(mac->state == UE_CONNECTED) {
nr_schedule_csirs_reception(mac, rx_frame, rx_slot);
nr_schedule_csi_for_im(mac, rx_frame, rx_slot);
}
dcireq.dl_config_req = *dl_config;
fill_scheduled_response(&scheduled_response, &dcireq.dl_config_req, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->phy_data);
@@ -974,19 +976,6 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info)
mac->if_module->scheduled_response(&scheduled_response);
}
}
else if (mac->state == UE_PERFORMING_RA) {
// this is for Msg2/Msg4
if (mac->ra.ra_state >= WAIT_RAR) {
if(mac->ul_time_alignment.ta_apply)
schedule_ta_command(dl_config, &mac->ul_time_alignment);
config_dci_pdu(mac, dl_config, mac->ra.ra_state == WAIT_RAR ? NR_RNTI_RA : NR_RNTI_TC , rx_slot, mac->ra_SS);
dl_config->number_pdus = 1;
LOG_D(MAC,"mac->cg %p: Calling fill_scheduled_response for type0_pdcch, num_pdus %d\n", mac->cg, dl_config->number_pdus);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->phy_data);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response);
}
}
else
dl_config->number_pdus = 0;
}
openair2/RRC/NR/cucp_cuup_direct.c
+3 -6
View File
@@ -85,16 +85,13 @@ void CU_update_UP_DL_tunnel(e1ap_bearer_setup_req_t *const req, instance_t insta
for (int j=0; j < req->pduSessionMod[i].numDRB2Modify; j++) {
DRB_nGRAN_to_setup_t *drb_p = req->pduSessionMod[i].DRBnGRanModList + j;
transport_layer_addr_t newRemoteAddr;
newRemoteAddr.length = 32; // IPv4
memcpy(newRemoteAddr.buffer,
&drb_p->DlUpParamList[0].tlAddress,
sizeof(in_addr_t));
in_addr_t addr = {0};
memcpy(&addr, &drb_p->DlUpParamList[0].tlAddress, sizeof(in_addr_t));
GtpuUpdateTunnelOutgoingAddressAndTeid(instance,
(ue_id & 0xFFFF),
(ebi_t)drb_p->id,
*(in_addr_t*)&newRemoteAddr.buffer,
addr,
drb_p->DlUpParamList[0].teId);
}
}
openair2/RRC/NR_UE/L2_interface_ue.c
+5 -7
View File
@@ -155,12 +155,10 @@ int8_t nr_mac_rrc_data_req_ue(const module_id_t Mod_idP,
return 0;
}
int8_t nr_rrc_RA_succeeded(const module_id_t mod_id, const uint8_t gNB_index)
void nr_mac_rrc_ra_ind(const module_id_t mod_id, int frame, bool success)
{
if (NR_UE_rrc_inst[mod_id].timers_and_constants.T304_active == true) {
LOG_W(NR_RRC, "T304 was stoped with value %i\n", NR_UE_rrc_inst[mod_id].timers_and_constants.T304_cnt);
NR_UE_rrc_inst[mod_id].timers_and_constants.T304_active = false;
NR_UE_rrc_inst[mod_id].timers_and_constants.T304_cnt = 0;
}
return 0;
MessageDef *message_p = itti_alloc_new_message(TASK_MAC_UE, 0, NR_RRC_MAC_RA_IND);
NR_RRC_MAC_RA_IND (message_p).frame = frame;
NR_RRC_MAC_RA_IND (message_p).RA_succeeded = success;
itti_send_msg_to_task(TASK_RRC_NRUE, GNB_MODULE_ID_TO_INSTANCE(mod_id), message_p);
}
openair2/RRC/NR_UE/rrc_UE.c
+24 -1
View File
@@ -1208,7 +1208,9 @@ void nr_rrc_ue_process_masterCellGroup(const protocol_ctxt_t *const ctxt_pP,
set_default_timers_and_constants(&rrc->timers_and_constants);
LOG_A(NR_RRC, "Received the reconfigurationWithSync in %s\n", __FUNCTION__);
NR_ReconfigurationWithSync_t *reconfigurationWithSync = cellGroupConfig->spCellConfig->reconfigurationWithSync;
rrc->timers_and_constants.T304_active = true;
nr_rrc_set_T304(&rrc->timers_and_constants, reconfigurationWithSync);
// TODO: Implementation of the remaining procedures regarding the reception of the reconfigurationWithSync, TS 38.331 - Section 5.3.5.5.2
}
if (rrc->cell_group_config &&
@@ -2249,6 +2251,18 @@ int32_t nr_rrc_ue_establish_drb(module_id_t ue_mod_idP,
return 0;
}
void nr_rrc_handle_ra_indication(unsigned int mod_id, bool ra_succeeded)
{
NR_UE_Timers_Constants_t *timers = &NR_UE_rrc_inst[mod_id].timers_and_constants;
if (ra_succeeded && timers->T304_active == true) {
// successful Random Access procedure triggered by reconfigurationWithSync
timers->T304_active = false;
timers->T304_cnt = 0;
// TODO handle the rest of procedures as described in 5.3.5.3 for when
// reconfigurationWithSync is included in spCellConfig
}
}
void *rrc_nrue_task(void *args_p)
{
MessageDef *msg_p;
@@ -2287,12 +2301,21 @@ void *rrc_nrue_task(void *args_p)
break;
case NRRRC_SLOT_PROCESS:
LOG_D(NR_RRC, "[UE %d] Receided %s: frame %d slot %d\n",
LOG_D(NR_RRC, "[UE %d] Received %s: frame %d slot %d\n",
ue_mod_id, ITTI_MSG_NAME (msg_p), NRRRC_SLOT_PROCESS (msg_p).frame, NRRRC_SLOT_PROCESS (msg_p).slot);
NR_UE_Timers_Constants_t *timers = &NR_UE_rrc_inst[ue_mod_id].timers_and_constants;
nr_rrc_handle_timers(timers);
break;
case NR_RRC_MAC_RA_IND:
LOG_D(NR_RRC, "[UE %d] Received %s: frame %d\n RA %s",
ue_mod_id,
ITTI_MSG_NAME (msg_p),
NR_RRC_MAC_RA_IND (msg_p).frame,
NR_RRC_MAC_RA_IND (msg_p).RA_succeeded ? "successful" : "failed");
nr_rrc_handle_ra_indication(ue_mod_id, NR_RRC_MAC_RA_IND (msg_p).RA_succeeded);
break;
case NR_RRC_MAC_BCCH_DATA_IND:
LOG_D(NR_RRC, "[UE %d] Received %s: frameP %d, gNB %d\n", ue_mod_id, ITTI_MSG_NAME (msg_p),
NR_RRC_MAC_BCCH_DATA_IND (msg_p).frame, NR_RRC_MAC_BCCH_DATA_IND (msg_p).gnb_index);
openair2/RRC/NR_UE/rrc_proto.h
+1
View File
@@ -116,6 +116,7 @@ int8_t nr_mac_rrc_data_ind_ue(const module_id_t module_id,
void nr_mac_rrc_sync_ind(const module_id_t module_id,
const frame_t frame,
const bool in_sync);
void nr_mac_rrc_ra_ind(const module_id_t mod_id, int frame, bool success);
/**\brief
\param module_id module id
openair3/UTILS/conversions.h
+4 -4
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@@ -119,10 +119,10 @@ do { \
/* Convert an array of char containing vALUE to x */
#define BUFFER_TO_UINT32(buf, x) \
do { \
x = (((uint32_t)(buf)[0] << 24) | \
(uint32_t)((buf)[1] << 16) | \
(uint32_t)((buf)[2] << 8) | \
(uint32_t)((buf)[3]); \
x = (((uint32_t)((buf)[0])) << 24) | \
(((uint32_t)((buf)[1])) << 16) | \
(((uint32_t)((buf)[2])) << 8) | \
(((uint32_t)((buf)[3]))); \
} while (0)
/* Convert an integer on 32 bits to an octet string from aSN1c tool */