Merge branch 'integration_2025_w03' into 'develop'

Integration: `2025.w03`

See merge request oai/openairinterface5g!3206

* !3167 remove calls to clear SIMD registers, that was a historical issue
* !3179 UE statistics improvements
* !3193 Remove spinlock from threadpool task return
* !3195 UE MAC: in phy-test/do-ra, fill TB randomly
* !3201 T tracer: minor fixes for compilation
* !3204 CI: Increase number of test trials for timing tests
* !3034 Delay compensation for PUCCH2
* !3205 Fix calculation of RSSI in pucch_rx.c
This commit is contained in:
Robert Schmidt
2025-01-16 07:47:02 +00:00
64 changed files with 706 additions and 1352 deletions
+1 -1
View File
@@ -10,7 +10,7 @@ Ref :
feprx : 46.0
feptx_prec : 15.0
feptx_ofdm : 35.0
feptx_total : 57.0
feptx_total : 50.0
L1 Tx processing : 260.0
DLSCH encoding : 160.0
L1 Rx processing : 420.0
+1 -1
View File
@@ -10,7 +10,7 @@ Ref :
feprx : 43.0
feptx_prec : 13.0
feptx_ofdm : 33.0
feptx_total : 55.0
feptx_total : 50.0
L1 Tx processing : 200.0
DLSCH encoding : 100.0
L1 Rx processing : 330.0
@@ -24,19 +24,36 @@
<htmlTabName>Test T2 Offload Decoder</htmlTabName>
<htmlTabIcon>tasks</htmlTabIcon>
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<testCase id="010204">
<class>Custom_Command</class>
<desc>Disable Sleep States</desc>
<node>caracal</node>
<command>sudo cpupower idle-set -D 0</command>
</testCase>
<testCase id="402010">
<class>Custom_Command</class>
<always_exec>true</always_exec>
<desc>Enable Sleep States</desc>
<node>caracal</node>
<command>sudo cpupower idle-set -E</command>
</testCase>
<testCase id="010111">
<class>Run_Physim</class>
<desc>Run nr_ulsim with CPU: SNR = 30, MCS = 5, 106 PRBs, 1 layer</desc>
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>300</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m5 -r106 -R106 -C10 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m5 -r106 -R106 -C10 -P</physim_run_args>
</testCase>
<testCase id="010112">
@@ -45,7 +62,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>100</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m5 -r106 -R106 -C10 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m5 -r106 -R106 -C10 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
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<testCase id="010121">
@@ -54,7 +71,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>300</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m15 -r106 -R106 -C10 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m15 -r106 -R106 -C10 -P</physim_run_args>
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<testCase id="010122">
@@ -63,7 +80,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>150</physim_time_threshold>
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<physim_run_args>-n1000 -s30 -S30.2 -m15 -r106 -R106 -C10 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
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@@ -72,7 +89,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>250</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m25 -r106 -R106 -C10 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m25 -r106 -R106 -C10 -P</physim_run_args>
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<testCase id="010132">
@@ -81,7 +98,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
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<physim_run_args>-n100 -s30 -S30.2 -m25 -r106 -R106 -C10 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m25 -r106 -R106 -C10 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
<testCase id="010211">
@@ -90,7 +107,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>300</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m5 -r273 -R273 -C10 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m5 -r273 -R273 -C10 -P</physim_run_args>
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<testCase id="010212">
@@ -99,7 +116,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>150</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m5 -r273 -R273 -C10 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m5 -r273 -R273 -C10 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
<testCase id="010221">
@@ -108,7 +125,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>400</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m15 -r273 -R273 -C10 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m15 -r273 -R273 -C10 -P</physim_run_args>
</testCase>
<testCase id="010222">
@@ -117,7 +134,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>350</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m15 -r273 -R273 -C10 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m15 -r273 -R273 -C10 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
<testCase id="010231">
@@ -126,7 +143,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>400</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m25 -r273 -R273 -C10 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m25 -r273 -R273 -C10 -P</physim_run_args>
</testCase>
<testCase id="010232">
@@ -135,7 +152,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>550</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m25 -r273 -R273 -C10 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m25 -r273 -R273 -C10 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
<testCase id="010311">
@@ -144,7 +161,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>300</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m5 -r273 -R273 -C10 -W2 -z2 -y2 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m5 -r273 -R273 -C10 -W2 -z2 -y2 -P</physim_run_args>
</testCase>
<testCase id="010312">
@@ -153,7 +170,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>250</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m5 -r273 -R273 -C10 -W2 -z2 -y2 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m5 -r273 -R273 -C10 -W2 -z2 -y2 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
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@@ -162,7 +179,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>600</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m15 -r273 -R273 -C10 -W2 -z2 -y2 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m15 -r273 -R273 -C10 -W2 -z2 -y2 -P</physim_run_args>
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<testCase id="010322">
@@ -171,7 +188,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>650</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m15 -r273 -R273 -C10 -W2 -z2 -y2 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -m15 -r273 -R273 -C10 -W2 -z2 -y2 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
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<testCase id="010331">
@@ -180,7 +197,7 @@
<always_exec>true</always_exec>
<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>650</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -m25 -r273 -R273 -C10 -W2 -z2 -y2 -P</physim_run_args>
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<testCase id="010332">
@@ -189,7 +206,7 @@
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<physim_test>nr_ulsim</physim_test>
<physim_time_threshold>1100</physim_time_threshold>
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@@ -24,20 +24,37 @@
<htmlTabName>Test T2 Offload Encoder</htmlTabName>
<htmlTabIcon>tasks</htmlTabIcon>
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040201
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<class>Custom_Command</class>
<desc>Disable Sleep States</desc>
<node>caracal</node>
<command>sudo cpupower idle-set -D 0</command>
</testCase>
<testCase id="040201">
<class>Custom_Command</class>
<always_exec>true</always_exec>
<desc>Enable Sleep States</desc>
<node>caracal</node>
<command>sudo cpupower idle-set -E</command>
</testCase>
<testCase id="000111">
<class>Run_Physim</class>
<desc>Run nr_dlsim with CPU: SNR = 30, MCS = 5, 106 PRBs, 1 layer</desc>
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>230</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e5 -b106 -R106 -X 8,9,10,11,12 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e5 -b106 -R106 -X 8,9,10,11,12 -P</physim_run_args>
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<testCase id="000112">
@@ -46,7 +63,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>100</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e5 -b106 -R106 -X4,5,6,7,8,9 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e5 -b106 -R106 -X4,5,6,7,8,9 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
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@@ -55,7 +72,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>300</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e15 -b106 -R106 -X 8,9,10,11,12 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e15 -b106 -R106 -X 8,9,10,11,12 -P</physim_run_args>
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@@ -64,7 +81,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>100</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e15 -b106 -R106 -X4,5,6,7,8,9 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e15 -b106 -R106 -X4,5,6,7,8,9 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
<testCase id="000131">
@@ -73,7 +90,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>350</physim_time_threshold>
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<physim_run_args>-n1000 -s30 -S30.2 -e25 -b106 -R106 -X 8,9,10,11,12 -P</physim_run_args>
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@@ -82,7 +99,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>200</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e25 -b106 -R106 -X4,5,6,7,8,9 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e25 -b106 -R106 -X4,5,6,7,8,9 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
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@@ -91,7 +108,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>300</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e5 -b273 -R273 -X 8,9,10,11,12 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e5 -b273 -R273 -X 8,9,10,11,12 -P</physim_run_args>
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@@ -100,7 +117,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>150</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e5 -b273 -R273 -X4,5,6,7,8,9 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e5 -b273 -R273 -X4,5,6,7,8,9 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
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@@ -109,7 +126,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>350</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e15 -b273 -R273 -X 8,9,10,11,12 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e15 -b273 -R273 -X 8,9,10,11,12 -P</physim_run_args>
</testCase>
<testCase id="000222">
@@ -118,7 +135,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>250</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e15 -b273 -R273 -X4,5,6,7,8,9 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e15 -b273 -R273 -X4,5,6,7,8,9 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
<testCase id="000231">
@@ -127,7 +144,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>400</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e25 -b273 -R273 -X 8,9,10,11,12 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e25 -b273 -R273 -X 8,9,10,11,12 -P</physim_run_args>
</testCase>
<testCase id="000232">
@@ -136,7 +153,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>400</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e25 -b273 -R273 -X4,5,6,7,8,9 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e25 -b273 -R273 -X4,5,6,7,8,9 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
<testCase id="000311">
@@ -145,7 +162,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>400</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e5 -b273 -R273 -X 8,9,10,11,12 -x2 -z2 -y2 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e5 -b273 -R273 -X 8,9,10,11,12 -x2 -z2 -y2 -P</physim_run_args>
</testCase>
<testCase id="000312">
@@ -154,7 +171,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>200</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e5 -b273 -R273 -X4,5,6,7,8,9 -x2 -z2 -y2 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e5 -b273 -R273 -X4,5,6,7,8,9 -x2 -z2 -y2 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
<testCase id="000321">
@@ -163,7 +180,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>450</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e15 -b273 -R273 -X 8,9,10,11,12 -x2 -z2 -y2 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e15 -b273 -R273 -X 8,9,10,11,12 -x2 -z2 -y2 -P</physim_run_args>
</testCase>
<testCase id="000322">
@@ -172,7 +189,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>500</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e15 -b273 -R273 -X4,5,6,7,8,9 -x2 -z2 -y2 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e15 -b273 -R273 -X4,5,6,7,8,9 -x2 -z2 -y2 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
<testCase id="000331">
@@ -181,7 +198,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>500</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e25 -b273 -R273 -X 8,9,10,11,12 -x2 -z2 -y2 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e25 -b273 -R273 -X 8,9,10,11,12 -x2 -z2 -y2 -P</physim_run_args>
</testCase>
<testCase id="000332">
@@ -190,7 +207,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>500</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e25 -b273 -R273 -X4,5,6,7,8,9 -x2 -z2 -y2 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e25 -b273 -R273 -X4,5,6,7,8,9 -x2 -z2 -y2 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
<testCase id="000411">
@@ -199,7 +216,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>400</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e5 -b273 -R273 -X8,9,10,11,12 -x2 -z4 -y4 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e5 -b273 -R273 -X8,9,10,11,12 -x2 -z4 -y4 -P</physim_run_args>
</testCase>
<testCase id="000412">
@@ -208,7 +225,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>200</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e5 -b273 -R273 -X4,5,6,7,8,9 -x2 -z4 -y4 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e5 -b273 -R273 -X4,5,6,7,8,9 -x2 -z4 -y4 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
<testCase id="000421">
@@ -217,7 +234,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>400</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e15 -b273 -R273 -X8,9,10,11,12 -x2 -z4 -y4 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e15 -b273 -R273 -X8,9,10,11,12 -x2 -z4 -y4 -P</physim_run_args>
</testCase>
<testCase id="000422">
@@ -226,7 +243,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>300</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e15 -b273 -R273 -X4,5,6,7,8,9 -x2 -z4 -y4 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e15 -b273 -R273 -X4,5,6,7,8,9 -x2 -z4 -y4 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
<testCase id="000431">
@@ -235,7 +252,7 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>450</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e25 -b273 -R273 -X8,9,10,11,12 -x2 -z4 -y4 -P</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e25 -b273 -R273 -X8,9,10,11,12 -x2 -z4 -y4 -P</physim_run_args>
</testCase>
<testCase id="000432">
@@ -244,6 +261,6 @@
<always_exec>true</always_exec>
<physim_test>nr_dlsim</physim_test>
<physim_time_threshold>450</physim_time_threshold>
<physim_run_args>-n100 -s30 -S30.2 -e25 -b273 -R273 -X4,5,6,7,8,9 -x2 -z4 -y4 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
<physim_run_args>-n1000 -s30 -S30.2 -e25 -b273 -R273 -X4,5,6,7,8,9 -x2 -z4 -y4 -P --loader.ldpc.shlibversion _t2 --nrLDPC_coding_t2.dpdk_dev d8:00.0 --nrLDPC_coding_t2.dpdk_core_list 11-12</physim_run_args>
</testCase>
</testCaseList>
+5 -3
View File
@@ -318,7 +318,8 @@
(Test25: Format 2 11-bit 2/273 PRB),
(Test26: Format 2 12-bit 8/273 PRB),
(Test27: Format 2 19-bit 8/273 PRB),
(Test28: Format 2 64-bit 16/273 PRB)</desc>
(Test28: Format 2 64-bit 16/273 PRB),
(Test29: Format 2 64-bit 16/273 PRB Delay 2us)</desc>
<main_exec>nr_pucchsim</main_exec>
<main_exec_args>-R 106 -i 1 -P 0 -b 1 -s-2 -n1000
-R 106 -i 1 -P 0 -b 2 -s-2 -n1000
@@ -347,8 +348,9 @@
-R 273 -z8 -i 1 -P 2 -b 11 -s6 -n1000
-R 273 -z8 -i 1 -P 2 -q8 -b 12 -s-3 -n1000
-R 273 -z8 -i 1 -P 2 -q8 -b 19 -s-3 -n1000
-R 273 -z8 -i 1 -P 2 -q16 -b 64 -s-3 -n1000</main_exec_args>
<tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12 test13 test14 test15 test16 test17 test18 test19 test20 test21 test22 test23 test24 test25 test26 test27 test28</tags>
-R 273 -z8 -i 1 -P 2 -q16 -b 64 -s-3 -n1000
-R 273 -z8 -i 1 -P 2 -q16 -b 64 -s-3 -d 2 -n1000</main_exec_args>
<tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12 test13 test14 test15 test16 test17 test18 test19 test20 test21 test22 test23 test24 test25 test26 test27 test28 test29</tags>
<search_expr_true>PUCCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
+19
View File
@@ -651,6 +651,10 @@ void log_dump(int component,
wbuf=malloc((buffsize * 10) + 64 + MAX_LOG_TOTAL);
break;
case LOG_DUMP_C16:
wbuf = malloc((buffsize * 10) + 64 + MAX_LOG_TOTAL);
break;
case LOG_DUMP_CHAR:
default:
wbuf=malloc((buffsize * 3 ) + 64 + MAX_LOG_TOTAL);
@@ -669,6 +673,21 @@ void log_dump(int component,
pos = pos + sprintf(wbuf+pos,"%04.4lf ", (double)((double *)buffer)[i]);
break;
case LOG_DUMP_I16: {
int16_t *tmp = ((int16_t *)buffer) + i;
pos = pos + sprintf(wbuf + pos, "%d, ", *tmp);
} break;
case LOG_DUMP_C16: {
int16_t *tmp = ((int16_t *)buffer) + i * 2;
pos = pos + sprintf(wbuf + pos, "(%d,%d), ", *tmp, *(tmp + 1));
} break;
case LOG_DUMP_C32: {
int32_t *tmp = ((int32_t *)buffer) + i * 2;
pos = pos + sprintf(wbuf + pos, "(%d,%d), ", *tmp, *(tmp + 1));
} break;
case LOG_DUMP_CHAR:
default:
pos = pos + sprintf(wbuf+pos,"%02x ", (unsigned char)((unsigned char *)buffer)[i]);
+3
View File
@@ -335,6 +335,9 @@ int32_t write_file_matlab(const char *fname, const char *vname, void *data, int
* @{*/
#define LOG_DUMP_CHAR 0
#define LOG_DUMP_DOUBLE 1
#define LOG_DUMP_I16 2
#define LOG_DUMP_C16 3
#define LOG_DUMP_C32 4
// debugging macros
#define LOG_F LOG_I /* because LOG_F was originaly to dump a message or buffer but is also used as a regular level...., to dump use LOG_DUMPMSG */
@@ -4,7 +4,7 @@
#include "utils.h"
#include "event.h"
#include "database.h"
#include "config.h"
#include "configuration.h"
#include "../T_defs.h"
void usage(void) {
+1 -1
View File
@@ -4,7 +4,7 @@
#include "utils.h"
#include "event.h"
#include "database.h"
#include "config.h"
#include "configuration.h"
#include "../T_defs.h"
void usage(void)
+40 -27
View File
@@ -26,37 +26,50 @@
#include <stdint.h>
#include <stdlib.h>
#include <time.h>
#include "pthread_utils.h"
#include "errno.h"
#include <string.h>
void completed_task_ans(task_ans_t* task)
#define seminit(sem) \
{ \
int ret = sem_init(&sem, 0, 0); \
AssertFatal(ret == 0, "sem_init(): ret=%d, errno=%d (%s)\n", ret, errno, strerror(errno)); \
}
#define sempost(sem) \
{ \
int ret = sem_post(&sem); \
AssertFatal(ret == 0, "sem_post(): ret=%d, errno=%d (%s)\n", ret, errno, strerror(errno)); \
}
#define semwait(sem) \
{ \
int ret = sem_wait(&sem); \
AssertFatal(ret == 0, "sem_wait(): ret=%d, errno=%d (%s)\n", ret, errno, strerror(errno)); \
}
#define semdestroy(sem) \
{ \
int ret = sem_destroy(&sem); \
AssertFatal(ret == 0, "sem_destroy(): ret=%d, errno=%d (%s)\n", ret, errno, strerror(errno)); \
}
void init_task_ans(task_ans_t* ans, uint num_jobs)
{
DevAssert(task != NULL);
int status = atomic_load_explicit(&task->status, memory_order_acquire);
AssertFatal(status == 0, "Task not expected to be finished here. Status = %d\n", status);
atomic_store_explicit(&task->status, 1, memory_order_release);
ans->counter = num_jobs;
seminit(ans->sem);
}
void join_task_ans(task_ans_t* arr, size_t len)
void completed_many_task_ans(task_ans_t* ans, uint num_completed_jobs)
{
DevAssert(len < INT_MAX);
DevAssert(arr != NULL);
// Spin lock inspired by:
// The Art of Writing Efficient Programs:
// An advanced programmer's guide to efficient hardware utilization
// and compiler optimizations using C++ examples
const struct timespec ns = {0, 1};
uint64_t i = 0;
int j = len - 1;
for (; j != -1; i++) {
for (; j != -1; --j) {
int const task_completed = 1;
if (atomic_load_explicit(&arr[j].status, memory_order_acquire) != task_completed)
break;
}
if (i % 8 == 0) {
nanosleep(&ns, NULL);
}
DevAssert(ans != NULL);
// Using atomic counter in contention scenario to avoid locking in producers
int num_jobs = atomic_fetch_sub_explicit(&ans->counter, num_completed_jobs, memory_order_relaxed);
if (num_jobs == num_completed_jobs) {
// Using semaphore to enable blocking call in join_task_ans
sempost(ans->sem);
}
}
void join_task_ans(task_ans_t* ans)
{
semwait(ans->sem);
semdestroy(ans->sem);
}
+35 -5
View File
@@ -21,7 +21,7 @@
#ifndef TASK_ANSWER_THREAD_POOL_H
#define TASK_ANSWER_THREAD_POOL_H
#include "pthread_utils.h"
#ifdef __cplusplus
extern "C" {
#endif
@@ -31,12 +31,15 @@ extern "C" {
#include <stdatomic.h>
#else
#include <atomic>
#ifndef _Atomic
#define _Atomic(X) std::atomic<X>
#endif
#define _Alignas(X) alignas(X)
#endif
#include <stddef.h>
#include <stdint.h>
#include <semaphore.h>
#if defined(__i386__) || defined(__x86_64__)
#define LEVEL1_DCACHE_LINESIZE 64
@@ -50,9 +53,17 @@ extern "C" {
#error Unknown CPU architecture
#endif
/** @brief
* A multi-producer - single-consumer synchronization mechanism built for efficiency under
* contention.
*
* @param sem semaphore to wait on
* @param counter atomic counter to keep track of the number of tasks completed. Atomic counter
* is used for efficiency under contention.
*/
typedef struct {
// Avoid false sharing
_Alignas(LEVEL1_DCACHE_LINESIZE) _Atomic(int) status;
sem_t sem;
_Alignas(LEVEL1_DCACHE_LINESIZE) _Atomic(int) counter;
} task_ans_t;
typedef struct {
@@ -62,10 +73,29 @@ typedef struct {
task_ans_t* ans;
} thread_info_tm_t;
/// @brief Initialize a task_ans_t struct
///
/// @param ans task_ans_t struct
/// @param num_jobs number of tasks to wait for
void init_task_ans(task_ans_t* ans, unsigned int num_jobs);
void join_task_ans(task_ans_t* arr, size_t len);
/// @brief Wait for all tasks to complete
/// @param ans task_ans_t struct
void join_task_ans(task_ans_t* arr);
void completed_task_ans(task_ans_t* task);
/// @brief Mark a number of tasks as completed.
///
/// @param ans task_ans_t struct
/// @param num_completed_jobs number of tasks to mark as completed
void completed_many_task_ans(task_ans_t* ans, uint num_completed_jobs);
/// @brief Mark 1 tasks as completed.
///
/// @param ans task_ans_t struct
static inline void completed_task_ans(task_ans_t* ans)
{
completed_many_task_ans(ans, 1);
}
#ifdef __cplusplus
}
@@ -114,18 +114,18 @@ int main()
int nb_jobs = 4;
for (int i = 0; i < 1000; i++) {
int parall = nb_jobs;
task_ans_t task_ans[parall];
memset(task_ans, 0, sizeof(task_ans));
task_ans_t task_ans;
init_task_ans(&task_ans, parall);
struct testData test_data[parall];
memset(test_data, 0, sizeof(test_data));
for (int j = 0; j < parall; j++) {
task_t task = {.args = &test_data[j], .func = processing};
struct testData *x = (struct testData *)task.args;
x->id = i;
x->task_ans = &task_ans[j];
x->task_ans = &task_ans;
pushTpool(&pool, task);
}
join_task_ans(task_ans, parall);
join_task_ans(&task_ans);
int sleepmax = 0;
for (int j = 0; j < parall; j++) {
if (test_data[j].sleepTime > sleepmax) {
+4 -2
View File
@@ -642,8 +642,9 @@ static int UE_dl_preprocessing(PHY_VARS_NR_UE *UE,
}
}
bool dl_slot = false;
if (proc->rx_slot_type == NR_DOWNLINK_SLOT || proc->rx_slot_type == NR_MIXED_SLOT) {
dl_slot = true;
if(UE->if_inst != NULL && UE->if_inst->dl_indication != NULL) {
nr_downlink_indication_t dl_indication;
nr_fill_dl_indication(&dl_indication, NULL, NULL, proc, UE, phy_data);
@@ -656,7 +657,8 @@ static int UE_dl_preprocessing(PHY_VARS_NR_UE *UE,
const int ack_nack_slot = (proc->nr_slot_rx + phy_data->dlsch[0].dlsch_config.k1_feedback) % UE->frame_parms.slots_per_frame;
tx_wait_for_dlsch[ack_nack_slot]++;
}
} else {
}
if (fp->frame_type == FDD || !dl_slot) {
// good time to print statistics, we don't have to spend time to decode DCI
if (proc->frame_rx % 128 == 0) {
if (*stats_printed == false) {
-2
View File
@@ -349,8 +349,6 @@ void threegpplte_turbo_encoder_sse(unsigned char *input,
#ifdef DEBUG_TURBO_ENCODER
printf("term: x0 %u, x1 %u, state1 %d\n",x[10],x[11],state1);
#endif // DEBUG_TURBO_ENCODER
simde_mm_empty();
simde_m_empty();
}
void init_encoder_sse (void) {
@@ -1258,8 +1258,6 @@ unsigned char phy_threegpplte_turbo_decoder16avx2(int16_t *y,
// fprintf(fdavx2,"crc %x, oldcrc %x\n",crc,oldcrc);
simde_mm_empty();
simde_m_empty();
#ifdef DEBUG_LOGMAP
fclose(fdavx2);
@@ -364,8 +364,6 @@ void compute_gamma(llr_t *m11,llr_t *m10,llr_t *systematic,channel_t *y_parity,
simde_mm_extract_epi8(m11_128[k],15));
*/
#endif
simde_mm_empty();
simde_m_empty();
}
#define L 40
@@ -1183,8 +1181,6 @@ void compute_alpha(llr_t *alpha,llr_t *beta,llr_t *m_11,llr_t *m_10,unsigned sho
break;
}
simde_mm_empty();
simde_m_empty();
}
@@ -1747,8 +1743,6 @@ void compute_beta(llr_t *alpha,llr_t *beta,llr_t *m_11,llr_t *m_10,unsigned shor
break;
}
simde_mm_empty();
simde_m_empty();
}
void compute_ext(llr_t *alpha,llr_t *beta,llr_t *m_11,llr_t *m_10,llr_t *ext, llr_t *systematic,unsigned short frame_length) {
@@ -1910,8 +1904,6 @@ void compute_ext(llr_t *alpha,llr_t *beta,llr_t *m_11,llr_t *m_10,llr_t *ext, ll
}
#endif
simde_mm_empty();
simde_m_empty();
}
@@ -1391,8 +1391,6 @@ uint8_t phy_threegpplte_turbo_decoder16(int16_t *y,
fclose(fdsse4);
#endif
#if defined(__x86_64__) || defined(__i386__)
simde_mm_empty();
simde_m_empty();
#endif
if (iteration_cnt > max_iterations)
set_abort(ab, true);
@@ -246,7 +246,6 @@ int main(int argc, char *argv[])
set_taus_seed(0);
ccodelte_init();
ccodelte_init_inv();
phy_generate_viterbi_tables_lte();
lte_frame_parms = &(PHY_config->lte_frame_parms);
+5 -8
View File
@@ -32,9 +32,7 @@ static const unsigned short glte[] = {0133, 0171, 0165}; // {A,B}
static const unsigned short glte_rev[] = {0155, 0117, 0127}; // {A,B}
static const unsigned short gdab[] = {0133, 0171, 0145}; // {A,B}
static const unsigned short gdab_rev[] = {0155, 0117, 0123}; // {A,B}
unsigned char ccodelte_table[128]; // for transmitter
unsigned char ccodelte_table_rev[128]; // for receiver
static unsigned char ccodelte_table[128]; // for transmitter
/*************************************************************************
@@ -45,8 +43,6 @@ unsigned char ccodelte_table_rev[128]; // for receiver
Trellis tail-biting is included here
*************************************************************************/
void
ccodelte_encode (int32_t numbits,
uint8_t add_crc,
@@ -238,7 +234,8 @@ void ccodelte_init(void) {
}
/* Input in LSB, followed by state in 6 MSBs */
void ccodelte_init_inv(void) {
void ccodelte_init_inv(unsigned char ccodelte_table_rev[128])
{
unsigned int i, j, k, sum;
for (i = 0; i < 128; i++) {
@@ -279,7 +276,8 @@ void ccodedab_init(void) {
}
/* Input in LSB, followed by state in 6 MSBs */
void ccodedab_init_inv(void) {
void ccodedab_init_inv(unsigned char ccodelte_table_rev[128])
{
unsigned int i, j, k, sum;
for (i = 0; i < 128; i++) {
@@ -299,7 +297,6 @@ void ccodedab_init_inv(void) {
}
}
/*****************************************************************/
/**
Test program
+4 -4
View File
@@ -304,17 +304,17 @@ void ccodelte_encode(int32_t numbits, uint8_t add_crc, uint8_t *inPtr, uint8_t *
\brief This function initializes the generator polynomials for an LTE convolutional code.*/
void ccodelte_init(void);
/*!\fn void ccodelte_init_inv(void)
/*!\fn void ccodelte_init_inv(unsigned char ccodelte_table_rev[128])
\brief This function initializes the trellis structure for decoding an LTE convolutional code.*/
void ccodelte_init_inv(void);
void ccodelte_init_inv(unsigned char ccodelte_table_rev[128]);
/*!\fn void ccodelte_init(void)
\brief This function initializes the generator polynomials for an DAB convolutional code (first 3 bits).*/
void ccodedab_init(void);
/*!\fn void ccodelte_init_inv(void)
/*!\fn void ccodelte_init_inv(unsigned char ccodelte_table_rev[128])
\brief This function initializes the trellis structure for decoding an DAB convolutional code (first 3 bits).*/
void ccodedab_init_inv(void);
void ccodedab_init_inv(unsigned char ccodelte_table_rev[128]);
/*!\fn void crcTableInit(void)
\brief This function initializes the different crc tables.*/
@@ -250,7 +250,7 @@ int nrLDPC_prepare_TB_decoding(nrLDPC_slot_decoding_parameters_t *nrLDPC_slot_de
for (int r = 0; r < nrLDPC_TB_decoding_parameters->C; r++) {
nrLDPC_decoding_parameters_t *rdata = &((nrLDPC_decoding_parameters_t *)t_info->buf)[t_info->len];
DevAssert(t_info->len < t_info->cap);
rdata->ans = &t_info->ans[t_info->len];
rdata->ans = t_info->ans;
t_info->len += 1;
decParams.R = nrLDPC_TB_decoding_parameters->segments[r].R;
@@ -309,19 +309,16 @@ int32_t nrLDPC_coding_decoder(nrLDPC_slot_decoding_parameters_t *nrLDPC_slot_dec
nbSegments += nrLDPC_TB_decoding_parameters->C;
}
nrLDPC_decoding_parameters_t arr[nbSegments];
task_ans_t ans[nbSegments];
memset(ans, 0, nbSegments * sizeof(task_ans_t));
thread_info_tm_t t_info = {.buf = (uint8_t *)arr, .len = 0, .cap = nbSegments, .ans = ans};
task_ans_t ans;
init_task_ans(&ans, nbSegments);
thread_info_tm_t t_info = {.buf = (uint8_t *)arr, .len = 0, .cap = nbSegments, .ans = &ans};
int nbDecode = 0;
for (int pusch_id = 0; pusch_id < nrLDPC_slot_decoding_parameters->nb_TBs; pusch_id++) {
nbDecode += nrLDPC_prepare_TB_decoding(nrLDPC_slot_decoding_parameters, pusch_id, &t_info);
(void)nrLDPC_prepare_TB_decoding(nrLDPC_slot_decoding_parameters, pusch_id, &t_info);
}
DevAssert(nbDecode == t_info.len);
// Execute thread poool tasks
join_task_ans(t_info.ans, t_info.len);
// Execute thread pool tasks
join_task_ans(t_info.ans);
for (int pusch_id = 0; pusch_id < nrLDPC_slot_decoding_parameters->nb_TBs; pusch_id++) {
nrLDPC_TB_decoding_parameters_t *nrLDPC_TB_decoding_parameters = &nrLDPC_slot_decoding_parameters->TBs[pusch_id];
@@ -189,7 +189,7 @@ static int nrLDPC_prepare_TB_encoding(nrLDPC_slot_encoding_parameters_t *nrLDPC_
for (int j = 0; j < n_seg; j++) {
ldpc8blocks_args_t *perJobImpp = &((ldpc8blocks_args_t *)t_info->buf)[t_info->len];
DevAssert(t_info->len < t_info->cap);
impp.ans = &t_info->ans[t_info->len];
impp.ans = t_info->ans;
t_info->len += 1;
impp.macro_num = j;
@@ -211,19 +211,19 @@ int nrLDPC_coding_encoder(nrLDPC_slot_encoding_parameters_t *nrLDPC_slot_encodin
nbTasks += n_seg;
}
ldpc8blocks_args_t arr[nbTasks];
task_ans_t ans[nbTasks];
memset(ans, 0, nbTasks * sizeof(task_ans_t));
thread_info_tm_t t_info = {.buf = (uint8_t *)arr, .len = 0, .cap = nbTasks, .ans = ans};
task_ans_t ans;
init_task_ans(&ans, nbTasks);
thread_info_tm_t t_info = {.buf = (uint8_t *)arr, .len = 0, .cap = nbTasks, .ans = &ans};
int nbEncode = 0;
for (int dlsch_id = 0; dlsch_id < nrLDPC_slot_encoding_parameters->nb_TBs; dlsch_id++) {
nbEncode += nrLDPC_prepare_TB_encoding(nrLDPC_slot_encoding_parameters, dlsch_id, &t_info);
}
DevAssert(nbEncode == t_info.len);
// Execute thread poool tasks
join_task_ans(ans, nbEncode);
if (nbEncode < nbTasks) {
completed_many_task_ans(&ans, nbTasks - nbEncode);
}
// Execute thread pool tasks
join_task_ans(&ans);
return 0;
}
@@ -278,7 +278,7 @@ int decoder_xdma(nrLDPC_TB_decoding_parameters_t *TB_params, int frame_rx, int s
DevAssert(num_threads_prepare == t_info.len);
// wait for the prepare jobs to complete
join_task_ans(t_info.ans, t_info.len);
join_task_ans(t_info.ans);
for (uint32_t job = 0; job < num_threads_prepare; job++) {
args_fpga_decode_prepare_t *args = &arr[job];
-1
View File
@@ -314,7 +314,6 @@ void phy_viterbi_dot11_sse2(char *y,unsigned char *decoded_bytes,unsigned short
}
}
simde_mm_empty();
}
#ifdef TEST_DEBUG
+52 -84
View File
@@ -40,8 +40,7 @@
#include "PHY/sse_intrin.h"
extern uint8_t ccodelte_table[128],ccodelte_table_rev[128];
#include "coding_defs.h"
static int8_t m0_table[64*16*16*16] __attribute__ ((aligned(16)));
static int8_t m1_table[64*16*16*16] __attribute__ ((aligned(16)));
@@ -50,6 +49,8 @@ static int8_t m1_table[64*16*16*16] __attribute__ ((aligned(16)));
// Set up Viterbi tables for SSE2 implementation
void phy_generate_viterbi_tables_lte( void )
{
uint8_t ccodelte_table_rev[128];
ccodelte_init_inv(ccodelte_table_rev);
int8_t w[8],in0,in1,in2;
uint8_t state,index0,index1;
@@ -126,52 +127,29 @@ void print_shorts(simde__m128i x,char *s) {
void phy_viterbi_lte_sse2(int8_t *y,uint8_t *decoded_bytes,uint16_t n)
{
simde__m128i TB[4 * 8192];
simde__m128i *m0_ptr, *m1_ptr, *TB_ptr = &TB[0];
simde__m128i metrics0_15, metrics16_31, metrics32_47, metrics48_63, even0_30a, even0_30b, even32_62a, even32_62b, odd1_31a,
odd1_31b, odd33_63a, odd33_63b, TBeven0_30, TBeven32_62, TBodd1_31, TBodd33_63;
simde__m128i min_state, min_state2;
int8_t *in = y;
uint8_t prev_state0,maxm,s;
static uint8_t *TB_ptr2;
uint32_t table_offset;
uint8_t iter;
int16_t position;
// set initial metrics
//debug_msg("Doing viterbi\n");
metrics0_15 = simde_mm_setzero_si128();
metrics16_31 = simde_mm_setzero_si128();
metrics32_47 = simde_mm_setzero_si128();
metrics48_63 = simde_mm_setzero_si128();
for (iter=0; iter<2; iter++) {
in = y;
TB_ptr=&TB[0];
for (position=0; position<n; position++) {
simde__m128i metrics0_15 = {0}, metrics16_31 = {0}, metrics32_47 = {0}, metrics48_63 = {0};
for (int iter = 0; iter < 2; iter++) {
int8_t *in = y;
simde__m128i *TB_ptr = TB;
for (int position = 0; position < n; position++) {
// get branch metric offsets for the 64 states
table_offset = (in[0]+8 + ((in[1]+8)<<4) + ((in[2]+8)<<8))<<6;
uint table_offset = (in[0] + 8 + ((in[1] + 8) << 4) + ((in[2] + 8) << 8)) << 6;
m0_ptr = (simde__m128i *)&m0_table[table_offset];
m1_ptr = (simde__m128i *)&m1_table[table_offset];
simde__m128i *m0_ptr = (simde__m128i *)&m0_table[table_offset];
simde__m128i *m1_ptr = (simde__m128i *)&m1_table[table_offset];
// even states
even0_30a = simde_mm_adds_epu8(metrics0_15, m0_ptr[0]);
even32_62a = simde_mm_adds_epu8(metrics16_31, m0_ptr[1]);
even0_30b = simde_mm_adds_epu8(metrics32_47, m0_ptr[2]);
even32_62b = simde_mm_adds_epu8(metrics48_63, m0_ptr[3]);
simde__m128i even0_30a = simde_mm_adds_epu8(metrics0_15, m0_ptr[0]);
simde__m128i even32_62a = simde_mm_adds_epu8(metrics16_31, m0_ptr[1]);
simde__m128i even0_30b = simde_mm_adds_epu8(metrics32_47, m0_ptr[2]);
simde__m128i even32_62b = simde_mm_adds_epu8(metrics48_63, m0_ptr[3]);
// odd states
odd1_31a = simde_mm_adds_epu8(metrics0_15, m1_ptr[0]);
odd33_63a = simde_mm_adds_epu8(metrics16_31, m1_ptr[1]);
odd1_31b = simde_mm_adds_epu8(metrics32_47, m1_ptr[2]);
odd33_63b = simde_mm_adds_epu8(metrics48_63, m1_ptr[3]);
simde__m128i odd1_31a = simde_mm_adds_epu8(metrics0_15, m1_ptr[0]);
simde__m128i odd33_63a = simde_mm_adds_epu8(metrics16_31, m1_ptr[1]);
simde__m128i odd1_31b = simde_mm_adds_epu8(metrics32_47, m1_ptr[2]);
simde__m128i odd33_63b = simde_mm_adds_epu8(metrics48_63, m1_ptr[3]);
// select maxima
@@ -182,33 +160,31 @@ void phy_viterbi_lte_sse2(int8_t *y,uint8_t *decoded_bytes,uint16_t n)
// Traceback information
TBeven0_30 = simde_mm_cmpeq_epi8(even0_30a, even0_30b);
TBeven32_62 = simde_mm_cmpeq_epi8(even32_62a, even32_62b);
TBodd1_31 = simde_mm_cmpeq_epi8(odd1_31a, odd1_31b);
TBodd33_63 = simde_mm_cmpeq_epi8(odd33_63a, odd33_63b);
simde__m128i TBeven0_30 = simde_mm_cmpeq_epi8(even0_30a, even0_30b);
simde__m128i TBeven32_62 = simde_mm_cmpeq_epi8(even32_62a, even32_62b);
simde__m128i TBodd1_31 = simde_mm_cmpeq_epi8(odd1_31a, odd1_31b);
simde__m128i TBodd33_63 = simde_mm_cmpeq_epi8(odd33_63a, odd33_63b);
metrics0_15 = simde_mm_unpacklo_epi8(even0_30a, odd1_31a);
metrics16_31 = simde_mm_unpackhi_epi8(even0_30a, odd1_31a);
metrics32_47 = simde_mm_unpacklo_epi8(even32_62a, odd33_63a);
metrics48_63 = simde_mm_unpackhi_epi8(even32_62a, odd33_63a);
TB_ptr[0] = simde_mm_unpacklo_epi8(TBeven0_30, TBodd1_31);
TB_ptr[1] = simde_mm_unpackhi_epi8(TBeven0_30, TBodd1_31);
TB_ptr[2] = simde_mm_unpacklo_epi8(TBeven32_62, TBodd33_63);
TB_ptr[3] = simde_mm_unpackhi_epi8(TBeven32_62, TBodd33_63);
in+=3;
TB_ptr += 4;
*TB_ptr++ = simde_mm_unpacklo_epi8(TBeven0_30, TBodd1_31);
*TB_ptr++ = simde_mm_unpackhi_epi8(TBeven0_30, TBodd1_31);
*TB_ptr++ = simde_mm_unpacklo_epi8(TBeven32_62, TBodd33_63);
*TB_ptr++ = simde_mm_unpackhi_epi8(TBeven32_62, TBodd33_63);
in += 3;
// rescale by subtracting minimum
/****************************************************
USE SSSE instruction phminpos!!!!!!!
****************************************************/
min_state = simde_mm_min_epu8(metrics0_15, metrics16_31);
simde__m128i min_state = simde_mm_min_epu8(metrics0_15, metrics16_31);
min_state = simde_mm_min_epu8(min_state, metrics32_47);
min_state = simde_mm_min_epu8(min_state, metrics48_63);
min_state2 = min_state;
simde__m128i min_state2 = min_state;
min_state = simde_mm_unpacklo_epi8(min_state, min_state);
min_state2 = simde_mm_unpackhi_epi8(min_state2, min_state2);
min_state = simde_mm_min_epu8(min_state, min_state2);
@@ -237,37 +213,34 @@ void phy_viterbi_lte_sse2(int8_t *y,uint8_t *decoded_bytes,uint16_t n)
} // iteration
// Traceback
prev_state0 = 0;
maxm = 0;
for (s=0; s<16; s++)
if (((uint8_t *)&metrics0_15)[s] > maxm) {
maxm = ((uint8_t *)&metrics0_15)[s];
uint prev_state0 = 0;
uint maxm = 0;
uint s = 0;
for (uint8_t *ptr = (uint8_t *)&metrics0_15; s < 16; s++, ptr++)
if (*ptr > maxm) {
maxm = *ptr;
prev_state0 = s;
}
for (s=0; s<16; s++)
if (((uint8_t *)&metrics16_31)[s] > maxm) {
maxm = ((uint8_t *)&metrics16_31)[s];
prev_state0 = s+16;
for (uint8_t *ptr = (uint8_t *)&metrics16_31; s < 32; s++, ptr++)
if (*ptr > maxm) {
maxm = *ptr;
prev_state0 = s;
}
for (uint8_t *ptr = (uint8_t *)&metrics32_47; s < 48; s++, ptr++)
if (*ptr > maxm) {
maxm = *ptr;
prev_state0 = s;
}
for (uint8_t *ptr = (uint8_t *)&metrics48_63; s < 64; s++, ptr++)
if (*ptr > maxm) {
maxm = *ptr;
prev_state0 = s;
}
for (s=0; s<16; s++)
if (((uint8_t *)&metrics32_47)[s] > maxm) {
maxm = ((uint8_t *)&metrics32_47)[s];
prev_state0 = s+32;
}
for (s=0; s<16; s++)
if (((uint8_t *)&metrics48_63)[s] > maxm) {
maxm = ((uint8_t *)&metrics48_63)[s];
prev_state0 = s+48;
}
TB_ptr2 = (uint8_t *)&TB[(n-1)*4];
for (position = n-1 ; position>-1; position--) {
uint8_t *TB_ptr2 = (uint8_t *)&TB[(n - 1) * 4];
for (int position = n - 1; position > -1; position--) {
decoded_bytes[(position)>>3] += (prev_state0 & 0x1)<<(7-(position & 0x7));
@@ -278,9 +251,6 @@ void phy_viterbi_lte_sse2(int8_t *y,uint8_t *decoded_bytes,uint16_t n)
TB_ptr2-=64;
}
simde_mm_empty();
simde_m_empty();
}
#ifdef TEST_DEBUG
@@ -306,10 +276,8 @@ int test_viterbi(uint8_t dabflag)
if (dabflag==0) {
ccodelte_init();
ccodelte_init_inv();
} else {
ccodedab_init();
ccodedab_init_inv();
printf("Running with DAB polynomials\n");
}
-1
View File
@@ -63,7 +63,6 @@ void generate_qpsk_table(void) {
void init_lte_top(LTE_DL_FRAME_PARMS *frame_parms) {
ccodelte_init();
ccodelte_init_inv();
phy_generate_viterbi_tables_lte();
load_codinglib();
generate_ul_ref_sigs();
+1
View File
@@ -138,6 +138,7 @@ void phy_init_nr_gNB(PHY_VARS_gNB *gNB)
gNB->max_nb_pdsch = MAX_MOBILES_PER_GNB;
init_delay_table(fp->ofdm_symbol_size, MAX_DELAY_COMP, NR_MAX_OFDM_SYMBOL_SIZE, fp->delay_table);
init_delay_table(128, MAX_DELAY_COMP, 128, fp->delay_table128);
gNB->bad_pucch = 0;
if (gNB->TX_AMP == 0)
@@ -493,8 +493,6 @@ void conjch0_mult_ch1(int *ch0,
dl_ch1_128+=1;
ch0conj_ch1_128+=1;
}
simde_mm_empty();
simde_m_empty();
}
void construct_HhH_elements(int *ch0conj_ch0, //00_00
@@ -567,8 +565,6 @@ void construct_HhH_elements(int *ch0conj_ch0, //00_00
after_mf_10_128+=1;
after_mf_11_128+=1;
}
simde_mm_empty();
simde_m_empty();
}
@@ -595,8 +591,6 @@ void squared_matrix_element(int32_t *Hh_h_00,
Hh_h_00_sq_128+=1;
Hh_h_00_128+=1;
}
simde_mm_empty();
simde_m_empty();
}
@@ -645,8 +639,6 @@ void det_HhH(int32_t *after_mf_00,
//after_mf_10_128+=1;
after_mf_11_128+=1;
}
simde_mm_empty();
simde_m_empty();
}
void numer(int32_t *Hh_h_00_sq,
@@ -691,8 +683,6 @@ void numer(int32_t *Hh_h_00_sq,
h_h_10_sq_128+=1;
h_h_11_sq_128+=1;
}
simde_mm_empty();
simde_m_empty();
}
void dlsch_channel_level_TM34_meas(int *ch00,
@@ -768,8 +758,6 @@ void dlsch_channel_level_TM34_meas(int *ch00,
avg_0[0] = min (avg_0[0], avg_1[0]);
avg_1[0] = avg_0[0];
simde_mm_empty();
simde_m_empty();
}
@@ -1339,8 +1327,6 @@ void lte_ue_measurements(PHY_VARS_UE *ue,
// printf("in lte_ue_measurements: selected rx_antenna[eNB_id==0]:%u\n", ue->measurements.selected_rx_antennas[eNB_id][i]);
} // eNB_id loop
simde_mm_empty();
simde_m_empty();
}
+8 -8
View File
@@ -348,12 +348,12 @@ int dlsch_encoding(PHY_VARS_eNB *eNB,
}
turboEncode_t arr[hadlsch->C];
task_ans_t ans[hadlsch->C];
memset(ans, 0, hadlsch->C * sizeof(task_ans_t));
task_ans_t ans;
init_task_ans(&ans, hadlsch->C);
for (int r = 0, r_offset = 0; r < hadlsch->C; r++) {
turboEncode_t *rdata = &arr[r];
rdata->ans = &ans[r];
rdata->ans = &ans;
rdata->input=hadlsch->c[r];
rdata->Kr_bytes= ( r<hadlsch->Cminus ? hadlsch->Kminus : hadlsch->Kplus) >>3;
@@ -382,7 +382,7 @@ int dlsch_encoding(PHY_VARS_eNB *eNB,
r_offset += Nl*Qm * ((GpmodC==0?0:1) + (Gp/C));
}
join_task_ans(ans, hadlsch->C);
join_task_ans(&ans);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_OUT);
return(0);
@@ -449,12 +449,12 @@ int dlsch_encoding_fembms_pmch(PHY_VARS_eNB *eNB,
return(-1);
}
turboEncode_t arr[hadlsch->C];
task_ans_t ans[hadlsch->C];
memset(ans, 0, hadlsch->C * sizeof(task_ans_t));
task_ans_t ans;
init_task_ans(&ans, hadlsch->C);
for (int r = 0, r_offset = 0; r < hadlsch->C; r++) {
turboEncode_t *rdata = &arr[r];
rdata->ans = &ans[r];
rdata->ans = &ans;
rdata->input=hadlsch->c[r];
rdata->Kr_bytes= ( r<hadlsch->Cminus ? hadlsch->Kminus : hadlsch->Kplus) >>3;
@@ -483,7 +483,7 @@ int dlsch_encoding_fembms_pmch(PHY_VARS_eNB *eNB,
r_offset += Nl*Qm * ((GpmodC==0?0:1) + (Gp/C));
}
join_task_ans(ans, hadlsch->C);
join_task_ans(&ans);
return(0);
}
+1 -1
View File
@@ -341,7 +341,7 @@ static int ulsch_decoding_data(PHY_VARS_eNB *eNB,
turboDecode_t *rdata = &((turboDecode_t *)t_info->buf)[t_info->len];
DevAssert(t_info->len < t_info->cap);
rdata->ans = &t_info->ans[t_info->len];
rdata->ans = t_info->ans;
t_info->len += 1;
rdata->eNB=eNB;
@@ -216,8 +216,6 @@ int32_t ulsch_qpsk_llr(LTE_DL_FRAME_PARMS *frame_parms,
(*llrp128)++;
}
simde_mm_empty();
simde_m_empty();
return(0);
}
@@ -245,8 +243,6 @@ void ulsch_16qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
// print_bytes("rxF[i+1]",&rxF[i+1]);
}
simde_mm_empty();
simde_m_empty();
}
void ulsch_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
@@ -289,8 +285,6 @@ void ulsch_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
(*llrp32)+=12;
}
simde_mm_empty();
simde_m_empty();
}
void ulsch_detection_mrc(LTE_DL_FRAME_PARMS *frame_parms,
@@ -347,8 +341,6 @@ void ulsch_detection_mrc(LTE_DL_FRAME_PARMS *frame_parms,
}
}
simde_mm_empty();
simde_m_empty();
}
void ulsch_extract_rbs_single(int32_t **rxdataF,
@@ -524,8 +516,6 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext,
}
}
simde_mm_empty();
simde_m_empty();
}
void ulsch_channel_level(int32_t **drs_ch_estimates_ext,
@@ -556,8 +546,6 @@ void ulsch_channel_level(int32_t **drs_ch_estimates_ext,
((float *)&avg128U)[3])/(float)(nb_rb*12));
}
simde_mm_empty();
simde_m_empty();
}
static int ulsch_power_LUT[750];
-8
View File
@@ -384,8 +384,6 @@ void pdcch_channel_level(int32_t **dl_ch_estimates_ext,
// printf("Channel level : %d\n",avg[(aatx<<1)+aarx]);
}
simde_mm_empty();
simde_m_empty();
}
@@ -433,8 +431,6 @@ void pdcch_detection_mrc_i(LTE_DL_FRAME_PARMS *frame_parms,
}
}
simde_mm_empty();
simde_m_empty();
}
@@ -1078,8 +1074,6 @@ void pdcch_channel_compensation(int32_t **rxdataF_ext,
}
simde_mm_empty();
simde_m_empty();
}
void pdcch_detection_mrc(LTE_DL_FRAME_PARMS *frame_parms,
@@ -1103,8 +1097,6 @@ void pdcch_detection_mrc(LTE_DL_FRAME_PARMS *frame_parms,
}
}
simde_mm_empty();
simde_m_empty();
}
@@ -1481,8 +1481,6 @@ void dlsch_channel_compensation(int **rxdataF_ext,
}
}
simde_mm_empty();
simde_m_empty();
}
void dlsch_channel_compensation_core(int **rxdataF_ext,
@@ -1666,8 +1664,6 @@ void dlsch_channel_compensation_core(int **rxdataF_ext,
}
}
simde_mm_empty();
simde_m_empty();
}
@@ -1706,8 +1702,6 @@ void prec2A_TM56_128(unsigned char pmi,simde__m128i *ch0,simde__m128i *ch1) {
ch0[0] = simde_mm_mulhi_epi16(ch0[0],amp);
ch0[0] = simde_mm_slli_epi16(ch0[0],1);
simde_mm_empty();
simde_m_empty();
}
// precoding is stream 0 .5(1,1) .5(1,-1) .5(1,1) .5(1,-1)
// stream 1 .5(1,-1) .5(1,1) .5(1,-1) .5(1,1)
@@ -1740,8 +1734,6 @@ void prec2A_TM3_128(simde__m128i *ch0,simde__m128i *ch1) {
//ch1[0] = simde_mm_srai_epi16(ch1[0],1);
// print_shorts("prec2A_TM3 ch0 (after):",ch0);
// print_shorts("prec2A_TM3 ch1 (after):",ch1);
simde_mm_empty();
simde_m_empty();
}
// pmi = 0 => stream 0 (1,1), stream 1 (1,-1)
@@ -1782,8 +1774,6 @@ void prec2A_TM4_128(int pmi,simde__m128i *ch0,simde__m128i *ch1) {
// ch1[0] = simde_mm_srai_epi16(ch1[0],1); //divide by 2
//print_shorts("prec2A_TM4 ch0 (end):",ch0);
//print_shorts("prec2A_TM4 ch1 (end):",ch1);
simde_mm_empty();
simde_m_empty();
// print_shorts("prec2A_TM4 ch0 (end):",ch0);
//print_shorts("prec2A_TM4 ch1 (end):",ch1);
}
@@ -2359,8 +2349,6 @@ void dlsch_channel_compensation_TM34(LTE_DL_FRAME_PARMS *frame_parms,
measurements->precoded_cqi_dB[eNB_id][1] = dB_fixed2(precoded_signal_strength1,measurements->n0_power_tot);
// printf("eNB_id %d, symbol %d: precoded CQI %d dB\n",eNB_id,symbol,
// measurements->precoded_cqi_dB[eNB_id][0]);
simde_mm_empty();
simde_m_empty();
}
@@ -2453,8 +2441,6 @@ void dlsch_dual_stream_correlation(LTE_DL_FRAME_PARMS *frame_parms,
}
}
simde_mm_empty();
simde_m_empty();
}
@@ -2526,8 +2512,6 @@ void dlsch_detection_mrc(LTE_DL_FRAME_PARMS *frame_parms,
}
}
simde_mm_empty();
simde_m_empty();
}
void dlsch_detection_mrc_TM34(LTE_DL_FRAME_PARMS *frame_parms,
@@ -2651,8 +2635,6 @@ void dlsch_detection_mrc_TM34(LTE_DL_FRAME_PARMS *frame_parms,
}
}
simde_mm_empty();
simde_m_empty();
}
void dlsch_scale_channel(int **dl_ch_estimates_ext,
@@ -2765,8 +2747,6 @@ void dlsch_channel_level(int **dl_ch_estimates_ext,
((int32_t *)&avg128D)[3])/y;
}
simde_mm_empty();
simde_m_empty();
}
void dlsch_channel_level_core(int **dl_ch_estimates_ext,
@@ -2809,8 +2789,6 @@ void dlsch_channel_level_core(int **dl_ch_estimates_ext,
//printf("Channel level [%d]: %d\n",aatx*n_rx + aarx, avg[aatx*n_rx + aarx]);
}
simde_mm_empty();
simde_m_empty();
/* FIXME This part needs to be adapted like the one above */
}
@@ -2857,8 +2835,6 @@ void dlsch_channel_level_median(int **dl_ch_estimates_ext,
}
}
simde_mm_empty();
simde_m_empty();
}
void mmse_processing_oai(LTE_UE_PDSCH *pdsch_vars,
@@ -3189,8 +3165,6 @@ void dlsch_channel_aver_band(int **dl_ch_estimates_ext,
}
}
simde_mm_empty();
simde_m_empty();
}
void rxdataF_to_float(int32_t **rxdataF_ext,
@@ -3558,8 +3532,6 @@ void dlsch_channel_level_TM34(int **dl_ch_estimates_ext,
// printf("From Chan_level aver stream 1 final =%d\n", avg_1[0]);
avg_0[0] = min (avg_0[0], avg_1[0]);
avg_1[0] = avg_0[0];
simde_mm_empty();
simde_m_empty();
}
//compute average channel_level of effective (precoded) channel
@@ -3624,8 +3596,6 @@ void dlsch_channel_level_TM56(int **dl_ch_estimates_ext,
// choose maximum of the 2 effective channels
avg[0] = cmax(avg[0],avg[1]);
simde_mm_empty();
simde_m_empty();
}
//compute average channel_level for TM7
@@ -3684,8 +3654,6 @@ void dlsch_channel_level_TM7(int **dl_bf_ch_estimates_ext,
// printf("Channel level : %d\n",avg[(aatx<<1)+aarx]);
}
simde_mm_empty();
simde_m_empty();
}
//#define ONE_OVER_2_Q15 16384
void dlsch_alamouti(LTE_DL_FRAME_PARMS *frame_parms,
@@ -3753,8 +3721,6 @@ void dlsch_alamouti(LTE_DL_FRAME_PARMS *frame_parms,
}
}
simde_mm_empty();
simde_m_empty();
}
//==============================================================================================
@@ -5587,8 +5553,6 @@ unsigned short dlsch_extract_rbs_TM7(int **rxdataF,
}
}
simde_mm_empty();
simde_m_empty();
return(nb_rb/frame_parms->nb_antennas_rx);
}
@@ -1668,8 +1668,6 @@ void qam64_qam16_avx2(short *stream0_in,
}
simde_mm_empty();
simde_m_empty();
}
@@ -3499,8 +3497,6 @@ void qam64_qam64_avx2(int32_t *stream0_in,
}
simde_mm_empty();
simde_m_empty();
}
#endif
#endif
-6
View File
@@ -185,8 +185,6 @@ int pbch_channel_level(int **dl_ch_estimates_ext,
//msg("Channel level : %d, %d\n",avg1, avg2);
}
simde_mm_empty();
simde_m_empty();
return(avg2);
}
@@ -277,8 +275,6 @@ void pbch_channel_compensation(int **rxdataF_ext,
}
}
simde_mm_empty();
simde_m_empty();
}
void pbch_detection_mrc(LTE_DL_FRAME_PARMS *frame_parms,
@@ -302,8 +298,6 @@ void pbch_detection_mrc(LTE_DL_FRAME_PARMS *frame_parms,
}
}
simde_mm_empty();
simde_m_empty();
}
void pbch_unscrambling(LTE_DL_FRAME_PARMS *frame_parms,
-24
View File
@@ -244,8 +244,6 @@ void mch_channel_level(int **dl_ch_estimates_ext,
// printf("Channel level : %d\n",avg[(aatx<<1)+aarx]);
}
simde_mm_empty();
simde_m_empty();
}
void mch_channel_level_khz_1dot25(int **dl_ch_estimates_ext,
@@ -285,8 +283,6 @@ void mch_channel_level_khz_1dot25(int **dl_ch_estimates_ext,
//printf("Channel level : %d\n",avg[(aatx<<1)+aarx]);
}
simde_mm_empty();
simde_m_empty();
}
@@ -393,8 +389,6 @@ void mch_channel_compensation(int **rxdataF_ext,
}
}
simde_mm_empty();
simde_m_empty();
}
@@ -501,8 +495,6 @@ void mch_channel_compensation_khz_1dot25(int **rxdataF_ext,
}
}
simde_mm_empty();
simde_m_empty();
}
@@ -533,8 +525,6 @@ void mch_detection_mrc(LTE_DL_FRAME_PARMS *frame_parms,
}
}
simde_mm_empty();
simde_m_empty();
}
@@ -564,8 +554,6 @@ void mch_detection_mrc_khz_1dot25(LTE_DL_FRAME_PARMS *frame_parms,
}
}
simde_mm_empty();
simde_m_empty();
}
@@ -603,8 +591,6 @@ int mch_qpsk_llr(LTE_DL_FRAME_PARMS *frame_parms,
}
*llr32p = (short *)llr32;
simde_mm_empty();
simde_m_empty();
return(0);
}
@@ -634,8 +620,6 @@ int mch_qpsk_llr_khz_1dot25(LTE_DL_FRAME_PARMS *frame_parms,
}
*llr32p = (short *)llr32;
simde_mm_empty();
simde_m_empty();
return(0);
}
@@ -700,8 +684,6 @@ void mch_16qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
llr32 += 8;
}
simde_mm_empty();
simde_m_empty();
}
void mch_16qam_llr_khz_1dot25(LTE_DL_FRAME_PARMS *frame_parms,
@@ -750,8 +732,6 @@ void mch_16qam_llr_khz_1dot25(LTE_DL_FRAME_PARMS *frame_parms,
llr32 += 8;
}
simde_mm_empty();
simde_m_empty();
}
//----------------------------------------------------------------------------------------------
@@ -843,8 +823,6 @@ void mch_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
}
*llr_save = llr;
simde_mm_empty();
simde_m_empty();
}
void mch_64qam_llr_khz_1dot25(LTE_DL_FRAME_PARMS *frame_parms,
@@ -924,8 +902,6 @@ void mch_64qam_llr_khz_1dot25(LTE_DL_FRAME_PARMS *frame_parms,
}
*llr_save = llr;
simde_mm_empty();
simde_m_empty();
}
int avg_pmch[4];
+1 -1
View File
@@ -39,7 +39,7 @@
#include "PHY/LTE_TRANSPORT/transport_vars.h"
#include "assertions.h"
static int8_t delta_PUSCH_msg2[8] = {-6, -4, -2, 0, 2, 4, 6, 8};
static const int8_t delta_PUSCH_msg2[8] = {-6, -4, -2, 0, 2, 4, 6, 8};
int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
+2 -19
View File
@@ -225,26 +225,9 @@ int pss_sss_extract(PHY_VARS_UE *phy_vars_ue,
return _do_pss_sss_extract(phy_vars_ue, pss_ext, sss_ext, 1 /* doPss */, 1 /* doSss */, subframe);
}
int pss_only_extract(PHY_VARS_UE *phy_vars_ue,
int32_t pss_ext[4][72],
uint8_t subframe)
{
static int32_t dummy[4][72];
return _do_pss_sss_extract(phy_vars_ue, pss_ext, dummy, 1 /* doPss */, 0 /* doSss */, subframe);
}
int sss_only_extract(PHY_VARS_UE *phy_vars_ue,
int32_t sss_ext[4][72],
uint8_t subframe)
{
static int32_t dummy[4][72];
return _do_pss_sss_extract(phy_vars_ue, dummy, sss_ext, 0 /* doPss */, 1 /* doSss */, subframe);
}
int16_t phase_re[7] = {16383, 25101, 30791, 32767, 30791, 25101, 16383};
int16_t phase_im[7] = {-28378, -21063, -11208, 0, 11207, 21062, 28377};
static const int16_t phase_re[7] = {16383, 25101, 30791, 32767, 30791, 25101, 16383};
static const int16_t phase_im[7] = {-28378, -21063, -11208, 0, 11207, 21062, 28377};
int rx_sss(PHY_VARS_UE *ue,int32_t *tot_metric,uint8_t *flip_max,uint8_t *phase_max)
@@ -1082,16 +1082,6 @@ int pss_sss_extract(PHY_VARS_UE *phy_vars_ue,
int32_t sss_ext[4][72],
uint8_t subframe);
/*! \brief Extract only PSS resource elements
@param phy_vars_ue Pointer to UE variables
@param[out] pss_ext contain the PSS signals after the extraction
@param subframe
@returns 0 on success
*/
int pss_only_extract(PHY_VARS_UE *phy_vars_ue,
int32_t pss_ext[4][72],
uint8_t subframe);
/*! \brief Extract only SSS resource elements
@param phy_vars_ue Pointer to UE variables
@param[out] sss_ext contain the SSS signals after the extraction
@@ -506,8 +506,8 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
int num_jobs = CEILIDIV(gNB->frame_parms.nb_antennas_rx, numAntennas);
puschAntennaProc_t rdatas[num_jobs];
memset(rdatas, 0, sizeof(rdatas));
task_ans_t ans[num_jobs];
memset(ans, 0, sizeof(ans));
task_ans_t ans;
init_task_ans(&ans, num_jobs);
for (int job_id = 0; job_id < num_jobs; job_id++) {
puschAntennaProc_t *rdata = &rdatas[job_id];
task_t task = {.func = nr_pusch_antenna_processing, .args = rdata};
@@ -531,7 +531,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
rdata->pusch_vars = &gNB->pusch_vars[ul_id];
rdata->chest_freq = gNB->chest_freq;
rdata->rxdataF = gNB->common_vars.rxdataF;
rdata->ans = &ans[job_id];
rdata->ans = &ans;
// Call the nr_pusch_antenna_processing function
if (job_id == num_jobs - 1) {
// Run the last job inline
@@ -539,10 +539,9 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
} else {
pushTpool(&gNB->threadPool, task);
}
LOG_D(PHY, "Added Antenna (count %d/%d) to process, in pipe\n", job_id, num_jobs);
} // Antenna Loop
join_task_ans(ans, num_jobs - 1);
join_task_ans(&ans);
stop_meas(&gNB->pusch_channel_estimation_antenna_processing_stats);
for (int aarx = 0; aarx < gNB->frame_parms.nb_antennas_rx; aarx++) {
@@ -223,8 +223,6 @@ static void nr_ulsch_channel_level(int size_est,
}
}
simde_mm_empty();
simde_m_empty();
}
static void nr_ulsch_channel_compensation(c16_t *rxFext,
@@ -334,8 +332,6 @@ static void nr_ulsch_channel_compensation(c16_t *rxFext,
}
}
simde_mm_empty();
simde_m_empty();
}
// Zero Forcing Rx function: nr_det_HhH()
@@ -397,8 +393,6 @@ static void nr_ulsch_det_HhH (int32_t *after_mf_00,//a
after_mf_10_128+=1;
after_mf_11_128+=1;
}
simde_mm_empty();
simde_m_empty();
}
/* Zero Forcing Rx function: nr_conjch0_mult_ch1()
@@ -444,8 +438,6 @@ static void nr_ulsch_conjch0_mult_ch1(int *ch0,
dl_ch1_128+=1;
ch0conj_ch1_128+=1;
}
simde_mm_empty();
simde_m_empty();
}
static simde__m128i nr_ulsch_comp_muli_sum(simde__m128i input_x,
@@ -507,8 +499,6 @@ static simde__m128i nr_ulsch_comp_muli_sum(simde__m128i input_x,
//print_ints("unpack hi:",&tmp_z1[0]);
output = simde_mm_packs_epi32(tmp_z0,tmp_z1);
simde_mm_empty();
simde_m_empty();
return(output);
}
@@ -625,8 +615,6 @@ static void nr_ulsch_construct_HhH_elements(int *conjch00_ch00,
after_mf_10_128 += 1;
after_mf_11_128 += 1;
}
simde_mm_empty();
simde_m_empty();
}
// MMSE Rx function: nr_ulsch_mmse_2layers()
@@ -1017,8 +1005,6 @@ static uint8_t nr_ulsch_mmse_2layers(NR_DL_FRAME_PARMS *frame_parms,
after_mf_c_128 += 1;
after_mf_d_128 += 1;
}
simde_mm_empty();
simde_m_empty();
return(0);
}
@@ -1260,7 +1246,6 @@ int nr_rx_pusch_tp(PHY_VARS_gNB *gNB,
nfapi_nr_pusch_pdu_t *rel15_ul = &gNB->ulsch[ulsch_id].harq_process->ulsch_pdu;
NR_gNB_PUSCH *pusch_vars = &gNB->pusch_vars[ulsch_id];
int nbSymb = 0;
uint32_t bwp_start_subcarrier = ((rel15_ul->rb_start + rel15_ul->bwp_start) * NR_NB_SC_PER_RB + frame_parms->first_carrier_offset) % frame_parms->ofdm_symbol_size;
LOG_D(PHY,"pusch %d.%d : bwp_start_subcarrier %d, rb_start %d, first_carrier_offset %d\n", frame,slot,bwp_start_subcarrier, rel15_ul->rb_start, frame_parms->first_carrier_offset);
LOG_D(PHY,"pusch %d.%d : ul_dmrs_symb_pos %x\n",frame,slot,rel15_ul->ul_dmrs_symb_pos);
@@ -1483,9 +1468,9 @@ int nr_rx_pusch_tp(PHY_VARS_gNB *gNB,
int total_res = 0;
int const loop_iter = CEILIDIV(rel15_ul->nr_of_symbols, numSymbols);
puschSymbolProc_t arr[loop_iter];
task_ans_t arr_ans[loop_iter];
task_ans_t ans;
init_task_ans(&ans, loop_iter);
memset(arr_ans, 0, sizeof(arr_ans));
int sz_arr = 0;
for(uint8_t task_index = 0; task_index < loop_iter; task_index++) {
int symbol = task_index * numSymbols + rel15_ul->start_symbol_index;
@@ -1500,7 +1485,7 @@ int nr_rx_pusch_tp(PHY_VARS_gNB *gNB,
total_res += res_per_task;
if (res_per_task > 0) {
puschSymbolProc_t *rdata = &arr[sz_arr];
rdata->ans = &arr_ans[sz_arr];
rdata->ans = &ans;
++sz_arr;
rdata->gNB = gNB;
@@ -1522,16 +1507,15 @@ int nr_rx_pusch_tp(PHY_VARS_gNB *gNB,
} else {
task_t t = {.func = &nr_pusch_symbol_processing, .args = rdata};
pushTpool(&gNB->threadPool, t);
nbSymb++;
}
LOG_D(PHY, "%d.%d Added symbol %d (count %d) to process, in pipe\n", frame, slot, symbol, nbSymb);
LOG_D(PHY, "%d.%d Added symbol %d to process, in pipe\n", frame, slot, symbol);
} else {
completed_task_ans(&ans);
}
} // symbol loop
if (nbSymb > 0) {
join_task_ans(arr_ans, sz_arr);
}
join_task_ans(&ans);
stop_meas(&gNB->rx_pusch_symbol_processing_stats);
// Copy the data to the scope. This cannot be performed in one call to gNBscopeCopy because the data is not contiguous in the
@@ -388,7 +388,6 @@ void nr_ulsch_qpsk_qpsk(c16_t *stream0_in, c16_t *stream1_in, c16_t *stream0_out
}
}
#endif
simde_mm_empty();
}
@@ -1056,7 +1055,6 @@ void nr_ulsch_qam16_qam16(c16_t *stream0_in,
stream0_128i_out[3] = simde_mm_unpackhi_epi32(xmm1_128, xmm3_128); // 8 LLRs, 2 REs
}
#endif
simde_mm_empty();
}
/*
@@ -1777,7 +1775,6 @@ void nr_ulsch_qam64_qam64(c16_t *stream0_in,
}
}
#endif
simde_mm_empty();
}
static void nr_ulsch_shift_llr(int16_t **llr_layers, uint32_t nb_re, uint32_t rxdataF_ext_offset, uint8_t mod_order, int shift)
File diff suppressed because it is too large Load Diff
-6
View File
@@ -86,8 +86,6 @@ void nr_det_A_MF_2x2(int32_t *a_mf_00,
a_mf_10_128+=1;
a_mf_11_128+=1;
}
simde_mm_empty();
simde_m_empty();
}
void nr_squared_matrix_element(int32_t *a,
@@ -100,8 +98,6 @@ void nr_squared_matrix_element(int32_t *a,
a_sq_128+=1;
a_128+=1;
}
simde_mm_empty();
simde_m_empty();
}
void nr_numer_2x2(int32_t *a_00_sq,
@@ -125,8 +121,6 @@ void nr_numer_2x2(int32_t *a_00_sq,
a_10_sq_128+=1;
a_11_sq_128+=1;
}
simde_mm_empty();
simde_m_empty();
}
bool is_csi_rs_in_symbol(const fapi_nr_dl_config_csirs_pdu_rel15_t csirs_config_pdu, const int symbol) {
@@ -1304,8 +1304,6 @@ static void nr_dlsch_detection_mrc(uint32_t rx_size_symbol,
rho128_0[i] = simde_mm_adds_epi16(simde_mm_srai_epi16(rho128_0[i],1),simde_mm_srai_epi16(rho128_1[i],1));
}*/
}
simde_mm_empty();
simde_m_empty();
}
}
@@ -1617,8 +1615,6 @@ void nr_conjch0_mult_ch1(int *ch0,
dl_ch1_128+=1;
ch0conj_ch1_128+=1;
}
simde_mm_empty();
simde_m_empty();
}
/*
@@ -308,8 +308,8 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc,
fp->N_RB_DL,
numGscn);
task_ans_t ans[numGscn];
memset(ans, 0, sizeof(ans));
task_ans_t ans;
init_task_ans(&ans, numGscn);
nr_ue_ssb_scan_t ssb_info[numGscn];
for (int s = 0; s < numGscn; s++) {
nr_ue_ssb_scan_t *ssbInfo = &ssb_info[s];
@@ -331,7 +331,7 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc,
ssbInfo->gscnInfo.gscn,
ssbInfo->gscnInfo.ssbFirstSC,
ssbInfo->gscnInfo.ssRef);
ssbInfo->ans = &ans[s];
ssbInfo->ans = &ans;
task_t t = {.func = nr_scan_ssb, .args = ssbInfo};
pushTpool(&get_nrUE_params()->Tpool, t);
}
@@ -339,7 +339,7 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc,
// Collect the scan results
nr_ue_ssb_scan_t res = {0};
if (numGscn > 0) {
join_task_ans(ans, numGscn);
join_task_ans(&ans);
for (int i = 0; i < numGscn; i++) {
nr_ue_ssb_scan_t *ssbInfo = &ssb_info[i];
if (ssbInfo->syncRes.cell_detected) {
-2
View File
@@ -263,8 +263,6 @@ void nr_pbch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
}
}
simde_mm_empty();
simde_m_empty();
}
void nr_pbch_unscrambling(int16_t *demod_pbch_e,
-2
View File
@@ -47,8 +47,6 @@ int32_t sub_cpx_vector16(int16_t *x,
}
simde_mm_empty();
simde_m_empty();
return(0);
}
-7
View File
@@ -27,7 +27,6 @@ static const int16_t conjug[8]__attribute__((aligned(16))) = {-1,1,-1,1,-1,1,-1,
static const int16_t conjug2[8]__attribute__((aligned(16))) = {1,-1,1,-1,1,-1,1,-1} ;
#define simd_q15_t simde__m128i
#define simdshort_q15_t simde__m64
#define set1_int16(a) simde_mm_set1_epi16(a)
#define setr_int16(a0, a1, a2, a3, a4, a5, a6, a7) simde_mm_setr_epi16(a0, a1, a2, a3, a4, a5, a6, a7 )
@@ -87,8 +86,6 @@ int mult_cpx_conj_vector(int16_t *x1,
}
simde_mm_empty();
simde_m_empty();
return(0);
}
@@ -150,8 +147,6 @@ int mult_cpx_vector(int16_t *x1, //Q15
x2_128++;
y_128++;
}
simde_mm_empty();
simde_m_empty();
return(0);
}
@@ -207,7 +202,5 @@ int multadd_cpx_vector(int16_t *x1,
x2_128++;
y_128++;
}
simde_mm_empty();
simde_m_empty();
return(0);
}
File diff suppressed because one or more lines are too long
-181
View File
@@ -1513,7 +1513,6 @@ const static int16_t tw64c[96] __attribute__((aligned(32))) = {
-12539,-30273,-20787,-25330,-27244,-18205,-31356,-9512
};
#define simd_q15_t simde__m128i
#define simdshort_q15_t simde__m64
#define shiftright_int16(a,shift) simde_mm_srai_epi16(a,shift)
#define mulhi_int16(a,b) simde_mm_mulhrs_epi16 (a,b)
#define simd256_q15_t simde__m256i
@@ -1661,8 +1660,6 @@ void dft64(int16_t *x,int16_t *y,unsigned char scale)
y256[7] = shiftright_int16_simd256(y256[7], 1);
}
simde_mm_empty();
simde_m_empty();
}
void idft64(int16_t *x,int16_t *y,unsigned char scale)
@@ -1760,8 +1757,6 @@ void idft64(int16_t *x,int16_t *y,unsigned char scale)
y256[7] = shiftright_int16_simd256(y256[7],3);
}
simde_mm_empty();
simde_m_empty();
}
static const int16_t tw128[128] __attribute__((aligned(32))) = { 32767,0,32727,-1608,32609,-3212,32412,-4808,32137,-6393,31785,-7962,31356,-9512,30851,-11039,30272,-12540,29621,-14010,28897,-15447,28105,-16846,27244,-18205,26318,-19520,25329,-20788,24278,-22005,23169,-23170,22004,-24279,20787,-25330,19519,-26319,18204,-27245,16845,-28106,15446,-28898,14009,-29622,12539,-30273,11038,-30852,9511,-31357,7961,-31786,6392,-32138,4807,-32413,3211,-32610,1607,-32728,0,-32767,-1608,-32728,-3212,-32610,-4808,-32413,-6393,-32138,-7962,-31786,-9512,-31357,-11039,-30852,-12540,-30273,-14010,-29622,-15447,-28898,-16846,-28106,-18205,-27245,-19520,-26319,-20788,-25330,-22005,-24279,-23170,-23170,-24279,-22005,-25330,-20788,-26319,-19520,-27245,-18205,-28106,-16846,-28898,-15447,-29622,-14010,-30273,-12540,-30852,-11039,-31357,-9512,-31786,-7962,-32138,-6393,-32413,-4808,-32610,-3212,-32728,-1608};
@@ -1998,8 +1993,6 @@ void dft256(int16_t *x,int16_t *y,unsigned char scale)
}
simde_mm_empty();
simde_m_empty();
}
void idft256(int16_t *x,int16_t *y,unsigned char scale)
@@ -2082,8 +2075,6 @@ void idft256(int16_t *x,int16_t *y,unsigned char scale)
}
simde_mm_empty();
simde_m_empty();
}
static const int16_t tw512[512] __attribute__((aligned(32))) = {
@@ -2307,8 +2298,6 @@ void dft1024(int16_t *x,int16_t *y,unsigned char scale)
}
simde_mm_empty();
simde_m_empty();
}
void idft1024(int16_t *x,int16_t *y,unsigned char scale)
@@ -2362,8 +2351,6 @@ void idft1024(int16_t *x,int16_t *y,unsigned char scale)
}
simde_mm_empty();
simde_m_empty();
}
int16_t tw2048[2048] __attribute__((aligned(32)));
@@ -2454,8 +2441,6 @@ void dft2048(int16_t *x,int16_t *y,unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
void idft2048(int16_t *x,int16_t *y,unsigned char scale)
@@ -2543,8 +2528,6 @@ void idft2048(int16_t *x,int16_t *y,unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
int16_t tw4096[3*2*1024];
@@ -2600,8 +2583,6 @@ void dft4096(int16_t *x,int16_t *y,unsigned char scale)
}
simde_mm_empty();
simde_m_empty();
}
void idft4096(int16_t *x,int16_t *y,unsigned char scale)
@@ -2655,8 +2636,6 @@ void idft4096(int16_t *x,int16_t *y,unsigned char scale)
}
simde_mm_empty();
simde_m_empty();
}
int16_t tw8192[2*4096] __attribute__((aligned(32)));
@@ -2747,8 +2726,6 @@ void dft8192(int16_t *x,int16_t *y,unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
void idft8192(int16_t *x,int16_t *y,unsigned char scale)
@@ -2836,8 +2813,6 @@ void idft8192(int16_t *x,int16_t *y,unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
int16_t tw16384[3*2*4096] __attribute__((aligned(32)));
@@ -2893,8 +2868,6 @@ void dft16384(int16_t *x,int16_t *y,unsigned char scale)
}
simde_mm_empty();
simde_m_empty();
}
void idft16384(int16_t *x,int16_t *y,unsigned char scale)
@@ -2948,8 +2921,6 @@ void idft16384(int16_t *x,int16_t *y,unsigned char scale)
}
simde_mm_empty();
simde_m_empty();
}
int16_t tw32768[2*16384] __attribute__((aligned(32)));
@@ -3040,8 +3011,6 @@ void dft32768(int16_t *x,int16_t *y,unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
void idft32768(int16_t *x,int16_t *y,unsigned char scale)
@@ -3129,8 +3098,6 @@ void idft32768(int16_t *x,int16_t *y,unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
int16_t twa768[512],twb768[512];
@@ -3183,8 +3150,6 @@ void idft768(int16_t *input, int16_t *output, unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
void dft768(int16_t *input, int16_t *output, unsigned char scale)
@@ -3246,8 +3211,6 @@ void dft768(int16_t *input, int16_t *output, unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
int16_t twa1536[1024],twb1536[1024];
@@ -3299,8 +3262,6 @@ void idft1536(int16_t *input, int16_t *output, unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
void dft1536(int16_t *input, int16_t *output, unsigned char scale)
@@ -3362,8 +3323,6 @@ void dft1536(int16_t *input, int16_t *output, unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
int16_t twa3072[2048] __attribute__((aligned(32)));
@@ -3415,8 +3374,6 @@ void dft3072(int16_t *input, int16_t *output,unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
void idft3072(int16_t *input, int16_t *output,unsigned char scale)
@@ -3465,8 +3422,6 @@ void idft3072(int16_t *input, int16_t *output,unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
@@ -3527,8 +3482,6 @@ void idft6144(int16_t *input, int16_t *output,unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
@@ -3590,8 +3543,6 @@ void dft6144(int16_t *input, int16_t *output,unsigned char scale)
y128p+=16;
}
}
simde_mm_empty();
simde_m_empty();
}
int16_t twa12288[8192] __attribute__((aligned(32)));
@@ -3654,8 +3605,6 @@ void dft12288(int16_t *input, int16_t *output,unsigned char scale)
y128p+=16;
}
}
simde_mm_empty();
simde_m_empty();
}
void idft12288(int16_t *input, int16_t *output,unsigned char scale)
@@ -3712,8 +3661,6 @@ void idft12288(int16_t *input, int16_t *output,unsigned char scale)
y128p+=16;
}
}
simde_mm_empty();
simde_m_empty();
#ifndef MR_MAIN
if (LOG_DUMPFLAG(DEBUG_DFT)) {
LOG_M("idft12288out.m","out",output,6144,1,1);
@@ -3768,8 +3715,6 @@ void dft18432(int16_t *input, int16_t *output,unsigned char scale) {
y128p+=16;
}
}
simde_mm_empty();
simde_m_empty();
}
void idft18432(int16_t *input, int16_t *output,unsigned char scale) {
@@ -3816,8 +3761,6 @@ void idft18432(int16_t *input, int16_t *output,unsigned char scale) {
y128p+=16;
}
}
simde_mm_empty();
simde_m_empty();
}
@@ -3882,8 +3825,6 @@ void dft24576(int16_t *input, int16_t *output,unsigned char scale)
y128p+=16;
}
}
simde_mm_empty();
simde_m_empty();
#ifndef MR_MAIN
if (LOG_DUMPFLAG(DEBUG_DFT)) {
LOG_M("out.m","out",output,24576,1,1);
@@ -3942,8 +3883,6 @@ void idft24576(int16_t *input, int16_t *output,unsigned char scale)
y128p+=16;
}
}
simde_mm_empty();
simde_m_empty();
#ifndef MR_MAIN
if (LOG_DUMPFLAG(DEBUG_DFT)) {
LOG_M("idft24576out.m","out",output,24576,1,1);
@@ -4006,8 +3945,6 @@ void dft36864(int16_t *input, int16_t *output,uint8_t scale) {
y128p+=16;
}
}
simde_mm_empty();
simde_m_empty();
#ifndef MR_MAIN
if (LOG_DUMPFLAG(DEBUG_DFT)) {
LOG_M("out.m","out",output,36864,1,1);
@@ -4059,8 +3996,6 @@ void idft36864(int16_t *input, int16_t *output,uint8_t scale) {
y128p+=16;
}
}
simde_mm_empty();
simde_m_empty();
}
int16_t twa49152[32768] __attribute__((aligned(32)));
@@ -4111,8 +4046,6 @@ void dft49152(int16_t *input, int16_t *output,uint8_t scale) {
y128p+=16;
}
}
simde_mm_empty();
simde_m_empty();
}
void idft49152(int16_t *input, int16_t *output,uint8_t scale) {
@@ -4159,8 +4092,6 @@ void idft49152(int16_t *input, int16_t *output,uint8_t scale) {
y128p+=16;
}
}
simde_mm_empty();
simde_m_empty();
}
int16_t tw65536[3*2*16384] __attribute__((aligned(32)));
@@ -4216,8 +4147,6 @@ void idft65536(int16_t *x,int16_t *y,unsigned char scale)
}
simde_mm_empty();
simde_m_empty();
}
int16_t twa98304[65536] __attribute__((aligned(32)));
@@ -4267,8 +4196,6 @@ void dft98304(int16_t *input, int16_t *output,uint8_t scale) {
y128p+=16;
}
}
simde_mm_empty();
simde_m_empty();
}
void idft98304(int16_t *input, int16_t *output,uint8_t scale) {
@@ -4315,8 +4242,6 @@ void idft98304(int16_t *input, int16_t *output,uint8_t scale) {
y128p+=16;
}
}
simde_mm_empty();
simde_m_empty();
}
@@ -4470,8 +4395,6 @@ void dft12(int16_t *x,int16_t *y ,unsigned char scale_flag)
&y128[10],
&y128[11]);
simde_mm_empty();
simde_m_empty();
}
static const int16_t W1_12s_256[16] __attribute__((aligned(32))) =
@@ -4641,8 +4564,6 @@ void dft12_simd256(int16_t *x,int16_t *y)
&y256[10],
&y256[11]);
simde_mm_empty();
simde_m_empty();
}
static int16_t tw24[88]__attribute__((aligned(32)));
@@ -4735,8 +4656,6 @@ void dft24(int16_t *x,int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa36[88]__attribute__((aligned(32)));
@@ -4857,8 +4776,6 @@ void dft36(int16_t *x,int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa48[88]__attribute__((aligned(32)));
@@ -5017,8 +4934,6 @@ void dft48(int16_t *x, int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa60[88]__attribute__((aligned(32)));
@@ -5201,8 +5116,6 @@ void dft60(int16_t *x,int16_t *y,unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t tw72[280]__attribute__((aligned(32)));
@@ -5244,8 +5157,6 @@ void dft72(int16_t *x,int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t tw96[376]__attribute__((aligned(32)));
@@ -5289,8 +5200,6 @@ void dft96(int16_t *x,int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa108[280]__attribute__((aligned(32)));
@@ -5339,8 +5248,6 @@ void dft108(int16_t *x,int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t tw120[472]__attribute__((aligned(32)));
@@ -5380,8 +5287,6 @@ void dft120(int16_t *x,int16_t *y, unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa144[376]__attribute__((aligned(32)));
@@ -5430,8 +5335,6 @@ void dft144(int16_t *x,int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa180[472]__attribute__((aligned(32)));
@@ -5481,8 +5384,6 @@ void dft180(int16_t *x,int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa192[376]__attribute__((aligned(32)));
@@ -5539,8 +5440,6 @@ void dft192(int16_t *x,int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa216[568]__attribute__((aligned(32)));
@@ -5590,8 +5489,6 @@ void dft216(int16_t *x,int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa240[472]__attribute__((aligned(32)));
@@ -5648,8 +5545,6 @@ void dft240(int16_t *x,int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa288[760]__attribute__((aligned(32)));
@@ -5699,8 +5594,6 @@ void dft288(int16_t *x,int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa300[472]__attribute__((aligned(32)));
@@ -5764,8 +5657,6 @@ void dft300(int16_t *x,int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa324[107*2*4];
@@ -5814,8 +5705,6 @@ void dft324(int16_t *x,int16_t *y,unsigned char scale_flag) // 108 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa360[119*2*4];
@@ -5864,8 +5753,6 @@ void dft360(int16_t *x,int16_t *y,unsigned char scale_flag) // 120 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa384[95*2*4];
@@ -5921,8 +5808,6 @@ void dft384(int16_t *x,int16_t *y,unsigned char scale_flag) // 96 x 4
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa432[107*2*4];
@@ -5977,8 +5862,6 @@ void dft432(int16_t *x,int16_t *y,unsigned char scale_flag) // 108 x 4
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa480[119*2*4];
static int16_t twb480[119*2*4];
@@ -6033,8 +5916,6 @@ void dft480(int16_t *x,int16_t *y,unsigned char scale_flag) // 120 x 4
}
}
simde_mm_empty();
simde_m_empty();
};
@@ -6084,8 +5965,6 @@ void dft540(int16_t *x,int16_t *y,unsigned char scale_flag) // 180 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa576[191*2*4];
@@ -6135,8 +6014,6 @@ void dft576(int16_t *x,int16_t *y,unsigned char scale_flag) // 192 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
@@ -6179,8 +6056,6 @@ void dft600(int16_t *x,int16_t *y,unsigned char scale_flag) // 300 x 2
}
}
simde_mm_empty();
simde_m_empty();
};
@@ -6230,8 +6105,6 @@ void dft648(int16_t *x,int16_t *y,unsigned char scale_flag) // 216 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
@@ -6289,8 +6162,6 @@ void dft720(int16_t *x,int16_t *y,unsigned char scale_flag) // 180 x 4
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa768p[191*2*4];
@@ -6346,8 +6217,6 @@ void dft768p(int16_t *x,int16_t *y,unsigned char scale_flag) { // 192x 4;
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa384i[256];
@@ -6400,8 +6269,6 @@ void idft384(int16_t *input, int16_t *output, unsigned char scale)
}
}
simde_mm_empty();
simde_m_empty();
}
@@ -6451,8 +6318,6 @@ void dft864(int16_t *x,int16_t *y,unsigned char scale_flag) // 288 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa900[299*2*4];
@@ -6501,8 +6366,6 @@ void dft900(int16_t *x,int16_t *y,unsigned char scale_flag) // 300 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
@@ -6560,8 +6423,6 @@ void dft960(int16_t *x,int16_t *y,unsigned char scale_flag) // 240 x 4
}
}
simde_mm_empty();
simde_m_empty();
};
@@ -6611,8 +6472,6 @@ void dft972(int16_t *x,int16_t *y,unsigned char scale_flag) // 324 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa1080[359*2*4];
@@ -6661,8 +6520,6 @@ void dft1080(int16_t *x,int16_t *y,unsigned char scale_flag) // 360 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa1152[287*2*4];
@@ -6719,8 +6576,6 @@ void dft1152(int16_t *x,int16_t *y,unsigned char scale_flag) // 288 x 4
}
}
simde_mm_empty();
simde_m_empty();
};
int16_t twa1200[4784];
@@ -6776,8 +6631,6 @@ void dft1200(int16_t *x,int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
@@ -6828,8 +6681,6 @@ void dft1296(int16_t *x,int16_t *y,unsigned char scale_flag) //432 * 3
}
}
simde_mm_empty();
simde_m_empty();
};
@@ -6879,8 +6730,6 @@ void dft1440(int16_t *x,int16_t *y,unsigned char scale_flag) // 480 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa1500[2392]__attribute__((aligned(32)));
@@ -6944,8 +6793,6 @@ void dft1500(int16_t *x,int16_t *y,unsigned char scale_flag)
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa1620[539*2*4];
@@ -6994,8 +6841,6 @@ void dft1620(int16_t *x,int16_t *y,unsigned char scale_flag) // 540 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa1728[575*2*4];
@@ -7044,8 +6889,6 @@ void dft1728(int16_t *x,int16_t *y,unsigned char scale_flag) // 576 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa1800[599*2*4];
@@ -7094,8 +6937,6 @@ void dft1800(int16_t *x,int16_t *y,unsigned char scale_flag) // 600 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa1920[479*2*4];
@@ -7150,8 +6991,6 @@ void dft1920(int16_t *x,int16_t *y,unsigned char scale_flag) // 480 x 4
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa1944[647*2*4];
@@ -7200,8 +7039,6 @@ void dft1944(int16_t *x,int16_t *y,unsigned char scale_flag) // 648 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa2160[719*2*4];
@@ -7250,8 +7087,6 @@ void dft2160(int16_t *x,int16_t *y,unsigned char scale_flag) // 720 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa2304[767*2*4];
@@ -7300,8 +7135,6 @@ void dft2304(int16_t *x,int16_t *y,unsigned char scale_flag) // 768 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa2400[599*2*4];
@@ -7357,8 +7190,6 @@ void dft2400(int16_t *x,int16_t *y,unsigned char scale_flag) // 600 x 4
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa2592[863*2*4];
@@ -7407,8 +7238,6 @@ void dft2592(int16_t *x,int16_t *y,unsigned char scale_flag) // 864 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa2700[899*2*4];
@@ -7457,8 +7286,6 @@ void dft2700(int16_t *x,int16_t *y,unsigned char scale_flag) // 900 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa2880[959*2*4];
@@ -7507,8 +7334,6 @@ void dft2880(int16_t *x,int16_t *y,unsigned char scale_flag) // 960 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa2916[971*2*4];
@@ -7557,8 +7382,6 @@ void dft2916(int16_t *x,int16_t *y,unsigned char scale_flag) // 972 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
static int16_t twa3000[599*8]__attribute__((aligned(32)));
@@ -7622,8 +7445,6 @@ void dft3000(int16_t *x,int16_t *y,unsigned char scale_flag) // 600 * 5
}
}
simde_mm_empty();
simde_m_empty();
}
static int16_t twa3240[1079*2*4];
@@ -7672,8 +7493,6 @@ void dft3240(int16_t *x,int16_t *y,unsigned char scale_flag) // 1080 x 3
}
}
simde_mm_empty();
simde_m_empty();
};
void init_rad4(int N,int16_t *tw) {
-5
View File
@@ -909,9 +909,6 @@ const static int16_t tw64c[96] __attribute__((aligned(32))) = {
#ifdef simd_q15_t
#undef simd_q15_t
#endif
#ifdef simdshort_q15_t
#undef simdshort_q15_t
#endif
#ifdef shiftright_int16
#undef shiftright_int16
#endif
@@ -3633,8 +3630,6 @@ void idft65536(int16_t *x,int16_t *y,unsigned char scale)
}
simde_mm_empty();
simde_m_empty();
}
int16_t twa98304[65536] __attribute__((aligned(32)));
-46
View File
@@ -65,52 +65,6 @@ int32_t signal_energy(int32_t *input,uint32_t length)
return temp;
}
int32_t signal_energy_amp_shift(int32_t *input,uint32_t length)
{
int32_t i;
int32_t temp,temp2;
register simde__m64 mm0,mm1,mm2,mm3;
simde__m64 *in = (simde__m64 *)input;
mm0 = simde_mm_setzero_si64();
mm3 = simde_mm_setzero_si64();
for (i=0; i<length>>1; i++) {
mm1 = in[i];
mm2 = mm1;
mm1 = simde_m_pmaddwd(mm1,mm1);
mm1 = simde_m_psradi(mm1,AMP_SHIFT);// shift any 32 bits blocs of the word by the value shift_p9
mm0 = simde_m_paddd(mm0,mm1);// add the two 64 bits words 4 bytes by 4 bytes
mm3 = simde_m_paddw(mm3,mm2);// add the two 64 bits words 2 bytes by 2 bytes
}
mm1 = mm0;
mm0 = simde_m_psrlqi(mm0,32);
mm0 = simde_m_paddd(mm0,mm1);
temp = simde_m_to_int(mm0);
temp/=length; // this is the average of x^2
// now remove the DC component
mm2 = simde_m_psrlqi(mm3,32);
mm2 = simde_m_paddw(mm2,mm3);
mm2 = simde_m_pmaddwd(mm2,mm2);
mm2 = simde_m_psradi(mm2,AMP_SHIFT); // fixed point representation of elements
temp2 = simde_m_to_int(mm2);
temp2/=(length*length);
temp -= temp2;
simde_mm_empty();
simde_m_empty();
return((temp>0)?temp:1);
}
uint32_t signal_energy_nodc(const c16_t *input, uint32_t length)
{
// init
+1 -1
View File
@@ -57,4 +57,4 @@ void simde_mm256_separate_real_imag_parts(simde__m256i *out_re, simde__m256i *ou
*out_re = simde_mm256_permute4x64_epi64(tmp0, 0xd8);
*out_im = simde_mm256_permute4x64_epi64(tmp1, 0xd8);
}
}
-3
View File
@@ -41,7 +41,6 @@
#include "common/utils/LOG/log.h"
#define simd_q15_t simde__m128i
#define simdshort_q15_t simde__m64
#define shiftright_int16(a,shift) simde_mm_srai_epi16(a,shift)
#define set1_int16(a) simde_mm_set1_epi16(a)
#define mulhi_int16(a,b) simde_mm_mulhrs_epi16 (a,b)
@@ -727,8 +726,6 @@ int32_t sub_cpx_vector16(int16_t *x,
*/
int32_t signal_energy(int32_t *,uint32_t);
int32_t signal_energy_amp_shift(int32_t *input, uint32_t length);
#ifdef LOCALIZATION
/*!\fn int32_t signal_energy(int *,uint32_t);
\brief Computes the signal energy per subcarrier
+2
View File
@@ -34,8 +34,10 @@
#ifdef __cplusplus
#include <atomic>
#ifndef _Atomic
#define _Atomic(X) std::atomic< X >
#endif
#endif
#include "defs_nr_common.h"
#include "CODING/nrPolar_tools/nr_polar_pbch_defs.h"
+2
View File
@@ -217,6 +217,8 @@ struct NR_DL_FRAME_PARMS {
c16_t timeshift_symbol_rotation[4096*2] __attribute__ ((aligned (16)));
/// Table used to apply the delay compensation in DL/UL
c16_t delay_table[2 * MAX_DELAY_COMP + 1][NR_MAX_OFDM_SYMBOL_SIZE];
/// Table used to apply the delay compensation in PUCCH2
c16_t delay_table128[2 * MAX_DELAY_COMP + 1][128];
/// SRS configuration from TS 38.331 RRC
SRS_NR srs_nr;
/// Power used by SSB in order to estimate signal strength and path loss
+24 -14
View File
@@ -25,6 +25,8 @@
#define USE_128BIT
#endif
#define PEAK_DETECT_THRESHOLD 15
int16_t saturating_sub(int16_t a, int16_t b)
{
int32_t result = (int32_t)a - (int32_t)b;
@@ -109,7 +111,6 @@ void nr_16qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag_in, int16_t *llr, uint3
ch_mag_128++;
}
simde_mm_empty();
nb_re &= 0x3;
int16_t *rxDataF_i16 = (int16_t *)rxF_128;
@@ -195,9 +196,6 @@ void nr_64qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int1
simde__m128i *rxF_128 = (simde__m128i *)rxF;
simde__m128i *ch_mag_128 = (simde__m128i *)ch_maga;
simde__m128i *ch_magb_128 = (simde__m128i *)ch_magb;
simde__m64 *llr64 = (simde__m64 *)llr_32;
// Each iteration does 4 RE (gives 24 16bit-llrs)
for (int i = 0; i < (nb_re >> 2); i++) {
simde__m128i xmm0, xmm1, xmm2;
@@ -207,12 +205,18 @@ void nr_64qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int1
xmm2 = simde_mm_abs_epi16(xmm1);
xmm2 = simde_mm_subs_epi16(*ch_magb_128, xmm2);
*llr64++ = simde_mm_set_pi32(simde_mm_extract_epi32(xmm1, 0), simde_mm_extract_epi32(xmm0, 0));
*llr64++ = simde_mm_set_pi32(simde_mm_extract_epi32(xmm0, 1), simde_mm_extract_epi32(xmm2, 0));
*llr64++ = simde_mm_set_pi32(simde_mm_extract_epi32(xmm2, 1), simde_mm_extract_epi32(xmm1, 1));
*llr64++ = simde_mm_set_pi32(simde_mm_extract_epi32(xmm1, 2), simde_mm_extract_epi32(xmm0, 2));
*llr64++ = simde_mm_set_pi32(simde_mm_extract_epi32(xmm0, 3), simde_mm_extract_epi32(xmm2, 2));
*llr64++ = simde_mm_set_pi32(simde_mm_extract_epi32(xmm2, 3), simde_mm_extract_epi32(xmm1, 3));
*llr_32++ = simde_mm_extract_epi32(xmm0, 0);
*llr_32++ = simde_mm_extract_epi32(xmm1, 0);
*llr_32++ = simde_mm_extract_epi32(xmm2, 0);
*llr_32++ = simde_mm_extract_epi32(xmm0, 1);
*llr_32++ = simde_mm_extract_epi32(xmm1, 1);
*llr_32++ = simde_mm_extract_epi32(xmm2, 1);
*llr_32++ = simde_mm_extract_epi32(xmm0, 2);
*llr_32++ = simde_mm_extract_epi32(xmm1, 2);
*llr_32++ = simde_mm_extract_epi32(xmm2, 2);
*llr_32++ = simde_mm_extract_epi32(xmm0, 3);
*llr_32++ = simde_mm_extract_epi32(xmm1, 3);
*llr_32++ = simde_mm_extract_epi32(xmm2, 3);
rxF_128++;
ch_mag_128++;
ch_magb_128++;
@@ -223,7 +227,7 @@ void nr_64qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int1
int16_t *rxDataF_i16 = (int16_t *)rxF_128;
int16_t *ch_mag_i16 = (int16_t *)ch_mag_128;
int16_t *ch_magb_i16 = (int16_t *)ch_magb_128;
int16_t *llr_i16 = (int16_t *)llr64;
int16_t *llr_i16 = (int16_t *)llr_32;
for (int i = 0; i < nb_re; i++) {
int16_t real = rxDataF_i16[2 * i];
int16_t imag = rxDataF_i16[2 * i + 1];
@@ -238,7 +242,6 @@ void nr_64qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int1
llr_i16[6 * i + 4] = saturating_sub(mag_realb, abs(llr_i16[6 * i + 2]));
llr_i16[6 * i + 5] = saturating_sub(mag_imagb, abs(llr_i16[6 * i + 3]));
}
simde_mm_empty();
}
void nr_256qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int32_t *ch_mag3, int16_t *llr, uint32_t nb_re)
@@ -350,7 +353,6 @@ void nr_256qam_llr(int32_t *rxdataF_comp, int32_t *ch_mag, int32_t *ch_mag2, int
llr_i16[8 * i + 7] = saturating_sub(magc_imag, abs(llr_i16[8 * i + 5]));
}
}
simde_mm_empty();
}
void freq2time(uint16_t ofdm_symbol_size, int16_t *freq_signal, int16_t *time_signal)
@@ -367,20 +369,28 @@ void nr_est_delay(int ofdm_symbol_size, const c16_t *ls_est, c16_t *ch_estimates
int max_val = delay->delay_max_val;
const int sync_pos = 0;
uint64_t mean_val = 0;
for (int i = 0; i < ofdm_symbol_size; i++) {
int temp = c16amp2(ch_estimates_time[i]) >> 1;
mean_val += temp;
if (temp > max_val) {
max_pos = i;
max_val = temp;
}
}
mean_val /= ofdm_symbol_size;
if (max_pos > ofdm_symbol_size / 2)
max_pos = max_pos - ofdm_symbol_size;
delay->delay_max_pos = max_pos;
delay->delay_max_val = max_val;
delay->est_delay = max_pos - sync_pos;
// The peak in general is quite clear. It only gives a small peak when the noise is high, generally obtaining an incorrect
// estimated delay, and causing the delay compensation to worsen the result instead of improving it. After analyzing several
// peaks, and doing many tests, a PEAK_DETECT_THRESHOLD = 15 is an adequate value, to apply delay compensation only when there is
// clearly a peak
delay->est_delay = mean_val > 0 && max_val / mean_val > PEAK_DETECT_THRESHOLD ? max_pos - sync_pos : 0;
}
unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int total_nb_rb, int nb_rb)
+7 -3
View File
@@ -1329,8 +1329,9 @@ void pusch_procedures(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc) {
uint32_t harq_pid0 = subframe2harq_pid(&eNB->frame_parms,frame,subframe);
turboDecode_t arr[64] = {0};
task_ans_t ans[64] = {0};
thread_info_tm_t t_info = {.ans = ans, .cap = 64, .len = 0, .buf = (uint8_t *)arr};
task_ans_t ans;
init_task_ans(&ans, 64);
thread_info_tm_t t_info = {.ans = &ans, .cap = 64, .len = 0, .buf = (uint8_t *)arr};
for (i = 0; i < NUMBER_OF_ULSCH_MAX; i++) {
ulsch = eNB->ulsch[i];
@@ -1420,7 +1421,10 @@ void pusch_procedures(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc) {
const bool decode = proc->nbDecode;
DevAssert(t_info.len == proc->nbDecode);
if (proc->nbDecode > 0) {
join_task_ans(t_info.ans, t_info.len);
if (t_info.len != t_info.cap) {
completed_many_task_ans(t_info.ans, t_info.cap - t_info.len);
}
join_task_ans(t_info.ans);
for (size_t i = 0; i < t_info.len; ++i) {
postDecode(proc, &arr[i]);
}
+12 -14
View File
@@ -300,14 +300,14 @@ void nr_feptx_tp(RU_t *ru, int frame_tx, int slot)
start_meas(&ru->ofdm_total_stats);
size_t const sz = ru->nb_tx + (ru->half_slot_parallelization > 0) * ru->nb_tx;
AssertFatal(sz < 64, "Please, increase the buffer size");
feptx_cmd_t arr[64] = {0};
task_ans_t ans[64] = {0};
feptx_cmd_t arr[sz];
task_ans_t ans;
init_task_ans(&ans, sz);
int nbfeptx = 0;
for (int aid = 0; aid < ru->nb_tx; aid++) {
feptx_cmd_t *feptx_cmd = &arr[nbfeptx];
feptx_cmd->ans = &ans[nbfeptx];
feptx_cmd->ans = &ans;
feptx_cmd->aid = aid;
feptx_cmd->ru = ru;
@@ -321,7 +321,7 @@ void nr_feptx_tp(RU_t *ru, int frame_tx, int slot)
nbfeptx++;
if (ru->half_slot_parallelization > 0) {
feptx_cmd_t *feptx_cmd = &arr[nbfeptx];
feptx_cmd->ans = &ans[nbfeptx];
feptx_cmd->ans = &ans;
feptx_cmd->aid = aid;
feptx_cmd->ru = ru;
@@ -334,8 +334,7 @@ void nr_feptx_tp(RU_t *ru, int frame_tx, int slot)
nbfeptx++;
}
}
join_task_ans(ans, nbfeptx);
join_task_ans(&ans);
stop_meas(&ru->ofdm_total_stats);
if (ru->idx == 0)
@@ -379,13 +378,13 @@ void nr_fep_tp(RU_t *ru, int slot) {
start_meas(&ru->ofdm_demod_stats);
size_t const sz = ru->nb_rx + (ru->half_slot_parallelization > 0) * ru->nb_rx;
AssertFatal(sz < 64, "Please, increase buffer size");
feprx_cmd_t arr[64] = {0};
task_ans_t ans[64] = {0};
feprx_cmd_t arr[sz];
task_ans_t ans;
init_task_ans(&ans, sz);
for (int aid=0;aid<ru->nb_rx;aid++) {
feprx_cmd_t *feprx_cmd = &arr[nbfeprx];
feprx_cmd->ans = &ans[nbfeprx];
feprx_cmd->ans = &ans;
feprx_cmd->aid = aid;
feprx_cmd->ru = ru;
@@ -399,7 +398,7 @@ void nr_fep_tp(RU_t *ru, int slot) {
nbfeprx++;
if (ru->half_slot_parallelization > 0) {
feprx_cmd_t *feprx_cmd = &arr[nbfeprx];
feprx_cmd->ans = &ans[nbfeprx];
feprx_cmd->ans = &ans;
feprx_cmd->aid = aid;
feprx_cmd->ru = ru;
@@ -413,8 +412,7 @@ void nr_fep_tp(RU_t *ru, int slot) {
nbfeprx++;
}
}
join_task_ans(ans, nbfeprx);
join_task_ans(&ans);
stop_meas(&ru->ofdm_demod_stats);
if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX, 0 );
@@ -139,4 +139,4 @@ int sl_nr_ue_slot_select(const sl_nr_phy_config_request_t *cfg, int slot, uint8_
}
return slot_type;
}
}
+21 -4
View File
@@ -144,6 +144,7 @@ int main(int argc, char **argv)
int sr_flag = 0;
int pucch_DTX_thres = 0;
cpuf = get_cpu_freq_GHz();
bool print_perf = false;
if ((uniqCfg = load_configmodule(argc, argv, CONFIG_ENABLECMDLINEONLY)) == 0) {
exit_fun("[NR_PUCCHSIM] Error, configuration module init failed\n");
@@ -153,8 +154,7 @@ int main(int argc, char **argv)
logInit();
int c;
while ((c = getopt (argc, argv, "--:O:f:hA:f:g:i:I:P:B:b:t:T:m:n:r:o:s:S:x:y:z:N:F:GR:IL:q:cd:")) != -1) {
while ((c = getopt(argc, argv, "--:O:f:hA:f:g:i:I:P:B:b:t:T:m:n:r:o:s:S:x:y:z:N:F:GR:IL:q:cd:C")) != -1) {
/* ignore long options starting with '--', option '-O' and their arguments that are handled by configmodule */
/* with this opstring getopt returns 1 for non-option arguments, refer to 'man 3 getopt' */
if (c == 1 || c == '-' || c == 'O')
@@ -349,6 +349,10 @@ int main(int argc, char **argv)
//nacktoack_flag=(uint8_t)atoi(optarg);
target_error_rate=0.001;
break;
case 'C':
print_perf = 1;
cpu_meas_enabled = 1;
break;
default:
case 'h':
printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n", argv[0]);
@@ -381,6 +385,7 @@ int main(int argc, char **argv)
printf("-x Transmission mode (1,2,6 for the moment)\n");
printf("-y Number of TX antennas used in eNB\n");
printf("-z Number of RX antennas used in UE\n");
printf("-C print CPU cost\n");
exit (-1);
break;
}
@@ -406,8 +411,8 @@ int main(int argc, char **argv)
if ((format < 2) && (actual_payload == 4)) do_DTX=1;
if (random_payload) {
srand(time(NULL)); // Initialization, should only be called once.
actual_payload = rand(); // Returns a pseudo-random integer between 0 and RAND_MAX.
double tmp = uniformrandom();
memcpy(&actual_payload, &tmp, sizeof(actual_payload));
}
actual_payload &= nr_bit < 64 ? (1UL << nr_bit) - 1: 0xffffffffffffffff;
@@ -638,6 +643,7 @@ int main(int argc, char **argv)
// noise measurement (all PRBs)
gNB_I0_measurements(gNB, nr_slot_tx, 0, gNB->frame_parms.symbols_per_slot, rb_mask_ul);
start_meas(&gNB->phy_proc_rx);
if (n_trials==1) printf("noise rxlev %d (%d dB), rxlev pucch %d dB sigma2 %f dB, SNR %f, TX %f, I0 (pucch) %d, I0 (avg) %d\n",rxlev,dB_fixed(rxlev),dB_fixed(rxlev_pucch),sigma2_dB,SNR,10*log10((double)txlev*UE->frame_parms.ofdm_symbol_size/12),gNB->measurements.n0_subband_power_tot_dB[startingPRB],gNB->measurements.n0_subband_power_avg_dB);
if(format==0){
@@ -731,10 +737,21 @@ int main(int argc, char **argv)
free(uci_pdu.csi_part1.csi_part1_payload);
}
stop_meas(&gNB->phy_proc_rx);
n_errors=((actual_payload^payload_received)&1)+(((actual_payload^payload_received)&2)>>1)+(((actual_payload^payload_received)&4)>>2)+n_errors;
}
if (sr_flag == 1)
printf("SR: SNR=%f, n_trials=%d, n_bit_errors=%d\n",SNR,n_trials,sr_errors);
if (print_perf) {
time_stats_t *ts = &gNB->phy_proc_rx;
printf("cpu time for pucch format %d: per block %.2f us; nb blocks %d, max time %.2f;\n",
format,
ts->diff / ts->trials / cpuf / 1000.0,
ts->trials,
ts->max / cpuf / 1000.0);
reset_meas(ts);
}
if(nr_bit > 0)
printf("ACK/NACK: SNR=%f, n_trials=%d, n_bit_errors=%d\n",SNR,n_trials,ack_nack_errors);
if((float)(ack_nack_errors+sr_errors)/(float)(n_trials)<=target_error_rate){
+17 -4
View File
@@ -3416,8 +3416,8 @@ static bool fill_mac_sdu(NR_UE_MAC_INST_t *mac,
} else {
*header = (NR_MAC_SUBHEADER_LONG){.R = 0, .F = 1, .LCID = lcid, .L = htons(sdu_length)};
#ifdef ENABLE_MAC_PAYLOAD_DEBUG
LOG_I(NR_MAC, "dumping MAC SDU with length %d: \n", sduL);
log_dump(NR_MAC, header, sduL, LOG_DUMP_CHAR, "\n");
LOG_I(NR_MAC, "dumping MAC SDU with length %d: \n", sdu_length);
log_dump(NR_MAC, header, sdu_length, LOG_DUMP_CHAR, "\n");
#endif
}
mac_ce_p->cur_ptr += header_sz + sdu_length;
@@ -3588,10 +3588,23 @@ static uint8_t nr_ue_get_sdu(NR_UE_MAC_INST_t *mac,
LOG_D(NR_MAC, "Filling remainder %d bytes to the UL PDU \n", remain);
*(NR_MAC_SUBHEADER_FIXED *)mac_ce_info.cur_ptr = (NR_MAC_SUBHEADER_FIXED){.R = 0, .LCID = UL_SCH_LCID_PADDING};
mac_ce_info.cur_ptr++;
memset(mac_ce_info.cur_ptr, 0, mac_ce_info.pdu_end - mac_ce_info.cur_ptr);
if (get_softmodem_params()->phy_test || get_softmodem_params()->do_ra) {
uint8_t *buf = mac_ce_info.cur_ptr;
uint8_t *end = mac_ce_info.pdu_end;
for (; buf < end && ((intptr_t)buf) % 4; buf++)
*buf = lrand48() & 0xff;
for (; buf < end - 3; buf += 4) {
uint32_t *buf32 = (uint32_t *)buf;
*buf32 = lrand48();
}
for (; buf < end; buf++)
*buf = lrand48() & 0xff;
} else {
memset(mac_ce_info.cur_ptr, 0, mac_ce_info.pdu_end - mac_ce_info.cur_ptr);
}
}
#ifdef ENABLE_MAC_PAYLOAD_DEBUG
LOG_I(NR_MAC, "MAC PDU %d bytes \n", mac_ce_p->cur_ptr - ulsch_buffer);
LOG_I(NR_MAC, "MAC PDU %ld bytes\n", mac_ce_info.cur_ptr - ulsch_buffer);
log_dump(NR_MAC, ulsch_buffer, buflen, LOG_DUMP_CHAR, "\n");
#endif
@@ -70,6 +70,8 @@ static void save_pdsch_pdu_for_crnti(nfapi_nr_dl_tti_request_t *dl_tti_request);
void print_ue_mac_stats(const module_id_t mod, const int frame_rx, const int slot_rx)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(mod);
if (mac->state != UE_CONNECTED)
return;
int ret = pthread_mutex_lock(&mac->if_mutex);
AssertFatal(!ret, "mutex failed %d\n", ret);