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common function to generate FAPI DL DCI payload

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This commit is contained in:
francescomani
2025-06-30 15:10:17 +02:00
parent dd281eba0f
commit 11711c4b7b
7 changed files with 109 additions and 99 deletions
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openair1/SIMULATION/NR_PHY/dlsim.c
+1
View File
@@ -216,6 +216,7 @@ void nr_dlsim_preprocessor(module_id_t module_id, frame_t frame, slot_t slot)
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
sched_pdsch->rbStart = g_rbStart;
sched_pdsch->rbSize = g_rbSize;
sched_pdsch->bwp_info = get_pdsch_bwp_start_size(RC.nrmac[module_id], UE_info);
sched_pdsch->mcs = g_mcsIndex;
sched_pdsch->nrOfLayers = g_nrOfLayers;
sched_pdsch->pm_index = g_pmi;
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+13 -30
View File
@@ -1310,10 +1310,7 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
int aggregation_level,
int CCEIndex,
int ndi,
int tpc,
int delta_PRI,
int current_harq_pid,
int time_domain_assignment,
int CC_id,
int rnti,
int round,
@@ -1375,25 +1372,16 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
dci_pdu_rel15_t dci_payload;
dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize,
pdsch_pdu_rel15->rbStart,
pdsch_pdu_rel15->BWPSize);
dci_payload.time_domain_assignment.val = time_domain_assignment;
dci_payload.vrb_to_prb_mapping.val = 0;
dci_payload.mcs = pdsch_pdu_rel15->mcsIndex[0];
dci_payload.tb_scaling = tb_scaling;
if (rnti_type == TYPE_TC_RNTI_) {
dci_payload.format_indicator = 1;
dci_payload.rv = pdsch_pdu_rel15->rvIndex[0];
dci_payload.harq_pid.val = current_harq_pid;
dci_payload.ndi = ndi;
dci_payload.dai[0].val = pucch ? (pucch->dai_c-1) & 3 : 0;
dci_payload.tpc = tpc; // TPC for PUCCH: table 7.2.1-1 in 38.213
dci_payload.pucch_resource_indicator = delta_PRI; // This is delta_PRI from 9.2.1 in 38.213
dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch ? pucch->timing_indicator : 0;
}
dci_pdu_rel15_t dci_payload = prepare_dci_dl_payload(nr_mac,
UE,
rnti_type,
sched_ctrl->search_space->searchSpaceType->present,
pdsch_pdu_rel15,
sched_pdsch,
pucch,
current_harq_pid,
tb_scaling,
false);
LOG_D(NR_MAC,
"DCI 1_0 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d pucchres %d harqtiming %d\n",
@@ -1617,6 +1605,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
.R = R,
.Qm = Qm,
.mcs = mcsIndex,
.time_domain_allocation = time_domain_assignment,
.nrOfLayers = 1,
.dmrs_parms = dmrs_parms,
.tda_info = tda_info,
@@ -1636,9 +1625,6 @@ static void nr_generate_Msg2(module_id_t module_idP,
CCEIndex,
0,
0,
0,
0,
time_domain_assignment,
CC_id,
ra->RA_rnti,
0,
@@ -1838,9 +1824,8 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
return;
}
const int delta_PRI = 0;
int r_pucch = nr_get_pucch_resource(coreset, UE->current_UL_BWP.pucch_Config, CCEIndex);
LOG_D(NR_MAC, "Msg4 r_pucch %d (CCEIndex %d, delta_PRI %d)\n", r_pucch, CCEIndex, delta_PRI);
LOG_D(NR_MAC, "Msg4 r_pucch %d CCEIndex %d\n", r_pucch, CCEIndex);
int alloc = nr_acknack_scheduling(nr_mac, UE, frameP, slotP, UE->UE_beam_index, r_pucch, 1);
if (alloc < 0) {
LOG_D(NR_MAC,"Couldn't find a pucch allocation for ack nack (msg4) in frame %d slot %d\n", frameP, slotP);
@@ -1912,6 +1897,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
.R = nr_get_code_rate_dl(mcsIndex, mcsTableIdx),
.Qm = nr_get_Qm_dl(mcsIndex, mcsTableIdx),
.mcs = mcsIndex,
.time_domain_allocation = time_domain_assignment,
.nrOfLayers = 1,
.dmrs_parms = dmrs_info,
.tda_info = msg4_tda,
@@ -1931,10 +1917,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
aggregation_level,
CCEIndex,
harq->ndi,
sched_ctrl->tpc1,
delta_PRI,
current_harq_pid,
time_domain_assignment,
CC_id,
rnti,
harq->round,
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+10 -22
View File
@@ -470,30 +470,18 @@ static void nr_fill_nfapi_dl_SIB_pdu(gNB_MAC_INST *gNB_mac,
dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = beam_index;
/* DCI payload */
dci_pdu_rel15_t dci_payload;
memset(&dci_payload, 0, sizeof(dci_pdu_rel15_t));
dci_payload.bwp_indicator.val = 0;
// frequency domain assignment
dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(
pdsch_pdu_rel15->rbSize, pdsch_pdu_rel15->rbStart, type0_PDCCH_CSS_config->num_rbs);
dci_payload.time_domain_assignment.val = pdsch->time_domain_allocation;
dci_payload.mcs = pdsch->mcs;
dci_payload.rv = pdsch_pdu_rel15->rvIndex[0];
dci_payload.harq_pid.val = 0;
dci_payload.ndi = 0;
dci_payload.dai[0].val = 0;
dci_payload.tpc = 0; // table 7.2.1-1 in 38.213
dci_payload.pucch_resource_indicator = 0;
dci_payload.pdsch_to_harq_feedback_timing_indicator.val = 0;
dci_payload.antenna_ports.val = 0;
dci_payload.dmrs_sequence_initialization.val = pdsch_pdu_rel15->SCID;
dci_payload.system_info_indicator = is_sib1 ? 0 : 1;
int dci_format = NR_DL_DCI_FORMAT_1_0;
int rnti_type = TYPE_SI_RNTI_;
dci_pdu_rel15_t dci_payload = prepare_dci_dl_payload(gNB_mac,
NULL,
rnti_type,
NR_SearchSpace__searchSpaceType_PR_common,
pdsch_pdu_rel15,
pdsch,
NULL,
0,
0,
is_sib1);
fill_dci_pdu_rel15(NULL,
NULL,
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+13 -33
View File
@@ -1189,44 +1189,25 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
/* DCI payload */
dci_pdu_rel15_t dci_payload;
memset(&dci_payload, 0, sizeof(dci_pdu_rel15_t));
// bwp indicator
// as per table 7.3.1.1.2-1 in 38.212
dci_payload.bwp_indicator.val = UE->sc_info.n_dl_bwp < 4 ? bwp_id : bwp_id - 1;
const int rnti_type = TYPE_C_RNTI_;
dci_pdu_rel15_t dci_payload = prepare_dci_dl_payload(gNB_mac,
UE,
rnti_type,
sched_ctrl->search_space->searchSpaceType->present,
pdsch_pdu,
sched_pdsch,
pucch,
current_harq_pid,
0,
false);
// Reset TPC to 0 dB to not request new gain multiple times before computing new value for SNR
sched_ctrl->tpc1 = 1;
NR_PDSCH_Config_t *pdsch_Config = current_BWP->pdsch_Config;
AssertFatal(pdsch_Config == NULL
|| pdsch_Config->resourceAllocation == NR_PDSCH_Config__resourceAllocation_resourceAllocationType1,
"Only frequency resource allocation type 1 is currently supported\n");
// 3GPP TS 38.214 Section 5.1.2.2.2 Downlink resource allocation type 1
uint16_t riv_bwp_size = pdsch_pdu->BWPSize;
if (current_BWP->dci_format == NR_DL_DCI_FORMAT_1_0
&& sched_ctrl->search_space->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_common) {
if (gNB_mac->cset0_bwp_size > 0) {
riv_bwp_size = gNB_mac->cset0_bwp_size;
} else {
riv_bwp_size = UE->sc_info.initial_dl_BWPSize;
}
}
dci_payload.frequency_domain_assignment.val =
PRBalloc_to_locationandbandwidth0(pdsch_pdu->rbSize, pdsch_pdu->rbStart, riv_bwp_size);
dci_payload.format_indicator = 1;
dci_payload.time_domain_assignment.val = sched_pdsch->time_domain_allocation;
dci_payload.mcs = sched_pdsch->mcs;
dci_payload.rv = pdsch_pdu->rvIndex[0];
dci_payload.harq_pid.val = current_harq_pid;
dci_payload.ndi = harq->ndi;
dci_payload.dai[0].val = pucch ? (pucch->dai_c-1)&3 : 0;
dci_payload.tpc = sched_ctrl->tpc1; // TPC for PUCCH: table 7.2.1-1 in 38.213
// Reset TPC to 0 dB to not request new gain multiple times before computing new value for SNR
sched_ctrl->tpc1 = 1;
dci_payload.pucch_resource_indicator = pucch ? pucch->resource_indicator : 0;
dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch ? pucch->timing_indicator : 0; // PDSCH to HARQ TI
dci_payload.antenna_ports.val = dmrs_parms->dmrs_ports_id;
dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID;
LOG_D(NR_MAC,
"%4d.%2d DCI type 1 payload: freq_alloc %d (%d,%d,%d), "
"nrOfLayers %d, time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d tpc %d ti %d\n",
@@ -1246,7 +1227,6 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_payload.tpc,
pucch ? pucch->timing_indicator : 0);
const int rnti_type = TYPE_C_RNTI_;
fill_dci_pdu_rel15(&UE->sc_info,
current_BWP,
&UE->current_UL_BWP,
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+1 -1
View File
@@ -173,7 +173,7 @@ void nr_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slot)
sched_pdsch->pucch_allocation = alloc;
sched_pdsch->rbStart = rbStart;
sched_pdsch->rbSize = rbSize;
sched_pdsch->bwp_info = get_pdsch_bwp_start_size(mac, UE);
sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc,
dl_bwp,
&tda_info,
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+61 -6
View File
@@ -809,6 +809,61 @@ int get_mcs_from_bler(const NR_bler_options_t *bler_options,
return new_mcs;
}
dci_pdu_rel15_t prepare_dci_dl_payload(const gNB_MAC_INST *gNB_mac,
const NR_UE_info_t *UE,
nr_rnti_type_t rnti_type,
NR_SearchSpace__searchSpaceType_PR ss_type,
const nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu,
const NR_sched_pdsch_t *sched_pdsch,
const NR_sched_pucch_t *pucch,
int harq_pid,
int tb_scaling,
bool is_sib1)
{
const NR_UE_DL_BWP_t *dl_BWP = UE ? &UE->current_DL_BWP : NULL;
dci_pdu_rel15_t dci_payload = {0};
dci_payload.format_indicator = 1;
dci_payload.time_domain_assignment.val = sched_pdsch->time_domain_allocation;
dci_payload.mcs = sched_pdsch->mcs;
dci_payload.rv = pdsch_pdu->rvIndex[0];
dci_payload.vrb_to_prb_mapping.val = 0;
int riv_bwp = pdsch_pdu->BWPSize;
if (!UE)
riv_bwp = gNB_mac->cset0_bwp_size;
else if (dl_BWP->dci_format == NR_DL_DCI_FORMAT_1_0 && ss_type == NR_SearchSpace__searchSpaceType_PR_common) {
if (gNB_mac->cset0_bwp_size > 0)
riv_bwp = gNB_mac->cset0_bwp_size;
else
riv_bwp = UE->sc_info.initial_dl_BWPSize;
}
dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu->rbSize, pdsch_pdu->rbStart, riv_bwp);
if (rnti_type == TYPE_SI_RNTI_) {
dci_payload.system_info_indicator = !is_sib1;
return dci_payload;
}
if (rnti_type == TYPE_RA_RNTI_) {
dci_payload.tb_scaling = tb_scaling;
return dci_payload;
}
const NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID;
dci_payload.antenna_ports.val = sched_pdsch->dmrs_parms.dmrs_ports_id;
dci_payload.tpc = sched_ctrl->tpc1;
const NR_UE_harq_t *harq = &sched_ctrl->harq_processes[harq_pid];
AssertFatal(harq, "HARQ process should be available for DCI with RNTI %s\n", rnti_types(rnti_type));
dci_payload.harq_pid.val = harq_pid;
dci_payload.ndi = harq->ndi;
dci_payload.pucch_resource_indicator = pucch ? pucch->resource_indicator : 0;
dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch ? pucch->timing_indicator : 0; // PDSCH to HARQ TI
dci_payload.dai[0].val = pucch ? (pucch->dai_c - 1) & 3 : 0;
// bwp indicator
// as per table 7.3.1.1.2-1 in 38.212
if (dl_BWP)
dci_payload.bwp_indicator.val = UE->sc_info.n_dl_bwp < 4 ? dl_BWP->bwp_id : dl_BWP->bwp_id - 1;
return dci_payload;
}
void config_uldci(const NR_UE_ServingCell_Info_t *sc_info,
const nfapi_nr_pusch_pdu_t *pusch_pdu,
dci_pdu_rel15_t *dci_pdu_rel15,
@@ -1202,11 +1257,11 @@ void set_r_pucch_parms(int rsetindex,
*start_symbol_index = default_pucch_firstsymb[rsetindex];
}
void prepare_dci(const NR_UE_ServingCell_Info_t *servingCellInfo,
const NR_UE_DL_BWP_t *current_BWP,
const NR_ControlResourceSet_t *coreset,
dci_pdu_rel15_t *dci_pdu_rel15,
nr_dci_format_t format)
static void prepare_dci_X1(const NR_UE_ServingCell_Info_t *servingCellInfo,
const NR_UE_DL_BWP_t *current_BWP,
const NR_ControlResourceSet_t *coreset,
dci_pdu_rel15_t *dci_pdu_rel15,
nr_dci_format_t format)
{
const NR_PDSCH_Config_t *pdsch_Config = current_BWP ? current_BWP->pdsch_Config : NULL;
@@ -1353,7 +1408,7 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo,
pdcch_dci_pdu->PayloadSizeBits = dci_size;
AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported");
if (dci_format == NR_DL_DCI_FORMAT_1_1 || dci_format == NR_UL_DCI_FORMAT_0_1)
prepare_dci(servingCellInfo, current_DL_BWP, coreset, dci_pdu_rel15, dci_format);
prepare_dci_X1(servingCellInfo, current_DL_BWP, coreset, dci_pdu_rel15, dci_format);
/// Payload generation
switch (dci_format) {
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+10 -7
View File
@@ -170,7 +170,16 @@ void config_uldci(const NR_UE_ServingCell_Info_t *sc_info,
uint8_t ndi,
NR_UE_UL_BWP_t *ul_bwp,
NR_SearchSpace__searchSpaceType_PR ss_type);
dci_pdu_rel15_t prepare_dci_dl_payload(const gNB_MAC_INST *gNB_mac,
const NR_UE_info_t *UE,
nr_rnti_type_t rnti_type,
NR_SearchSpace__searchSpaceType_PR ss_type,
const nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu,
const NR_sched_pdsch_t *sched_pdsch,
const NR_sched_pucch_t *pucch,
int harq_pid,
int tb_scaling,
bool is_sib1);
void nr_schedule_pucch(gNB_MAC_INST *nrmac, frame_t frameP, slot_t slotP);
void nr_srs_ri_computation(const nfapi_nr_srs_normalized_channel_iq_matrix_t *nr_srs_normalized_channel_iq_matrix,
@@ -252,12 +261,6 @@ void fill_dci_pdu_rel15(const NR_UE_ServingCell_Info_t *servingCellInfo,
long pdsch_HARQ_ACK_Codebook,
uint16_t cset0_bwp_size);
void prepare_dci(const NR_UE_ServingCell_Info_t *servingCellInfo,
const NR_UE_DL_BWP_t *current_BWP,
const NR_ControlResourceSet_t *coreset,
dci_pdu_rel15_t *dci_pdu_rel15,
nr_dci_format_t format);
void set_r_pucch_parms(int rsetindex,
int r_pucch,
int bwp_size,