maki/openairinterface5g
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

pre_processor improvements

Browse Source
This commit is contained in:
Stefan
2019-01-18 17:04:57 +01:00
parent bf25aba227
commit 151873e987
5 changed files with 3087 additions and 2858 deletions
Download Patch File Download Diff File Expand all files Collapse all files
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+160 -106
View File
@@ -70,12 +70,14 @@ extern uint8_t nfapi_mode;
void
add_ue_dlsch_info(module_id_t module_idP,
int CC_id,
int UE_id, sub_frame_t subframeP, UE_DLSCH_STATUS status)
int UE_id,
sub_frame_t subframeP,
UE_DLSCH_STATUS status,
rnti_t rnti)
//------------------------------------------------------------------------------
{
//LOG_D(MAC, "%s(module_idP:%d, CC_id:%d, UE_id:%d, subframeP:%d, status:%d) serving_num:%d rnti:%x\n", __FUNCTION__, module_idP, CC_id, UE_id, subframeP, status, eNB_dlsch_info[module_idP][CC_id][UE_id].serving_num, UE_RNTI(module_idP,UE_id));
eNB_dlsch_info[module_idP][CC_id][UE_id].rnti =
UE_RNTI(module_idP, UE_id);
eNB_dlsch_info[module_idP][CC_id][UE_id].rnti = rnti;
// eNB_dlsch_info[module_idP][CC_id][ue_mod_idP].weight = weight;
eNB_dlsch_info[module_idP][CC_id][UE_id].subframe = subframeP;
eNB_dlsch_info[module_idP][CC_id][UE_id].status = status;
@@ -301,7 +303,10 @@ generate_dlsch_header(unsigned char *mac_header,
//------------------------------------------------------------------------------
void
set_ul_DAI(int module_idP, int UE_idP, int CC_idP, int frameP,
set_ul_DAI(int module_idP,
int UE_idP,
int CC_idP,
int frameP,
int subframeP)
//------------------------------------------------------------------------------
{
@@ -312,9 +317,13 @@ set_ul_DAI(int module_idP, int UE_idP, int CC_idP, int frameP,
if (cc->tdd_Config != NULL) { //TDD
DAI = (UE_list->UE_template[CC_idP][UE_idP].DAI - 1) & 3;
LOG_D(MAC,
"[eNB %d] CC_id %d Frame %d, subframe %d: DAI %d for UE %d\n",
module_idP, CC_idP, frameP, subframeP, DAI, UE_idP);
LOG_D(MAC, "[eNB %d] CC_id %d Frame %d, subframe %d: DAI %d for UE %d\n",
module_idP,
CC_idP,
frameP,
subframeP,
DAI,
UE_idP);
// Save DAI for Format 0 DCI
switch (cc->tdd_Config->subframeAssignment) {
@@ -398,6 +407,8 @@ set_ul_DAI(int module_idP, int UE_idP, int CC_idP, int frameP,
break;
}
}
return;
}
//------------------------------------------------------------------------------
@@ -417,8 +428,11 @@ schedule_dlsch(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP, in
//------------------------------------------------------------------------------
void
schedule_ue_spec(module_id_t module_idP, int slice_idxP,
frame_t frameP, sub_frame_t subframeP, int *mbsfn_flag)
schedule_ue_spec(module_id_t module_idP,
int slice_idxP,
frame_t frameP,
sub_frame_t subframeP,
int *mbsfn_flag)
//------------------------------------------------------------------------------
{
int CC_id;
@@ -430,7 +444,8 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
int lcid, offset, num_sdus = 0;
int nb_rb, nb_rb_temp, nb_available_rb;
uint16_t sdu_lengths[NB_RB_MAX];
int TBS, j, rnti, padding = 0, post_padding = 0;
int TBS, j, padding = 0, post_padding = 0;
rnti_t rnti;
unsigned char dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES];
int round = 0;
int harq_pid = 0;
@@ -469,22 +484,17 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
break;
case 1:
return;
break;
case 2:
return;
break;
case 3:
if ((tdd_sfa != 2) && (tdd_sfa != 5))
if (tdd_sfa != 2 && tdd_sfa != 5)
return;
break;
case 4:
if ((tdd_sfa != 1) && (tdd_sfa != 2) && (tdd_sfa != 4)
&& (tdd_sfa != 5))
if (tdd_sfa != 1 && tdd_sfa != 2 && tdd_sfa != 4 && tdd_sfa != 5)
return;
break;
@@ -494,14 +504,13 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
case 6:
case 7:
if ((tdd_sfa != 3) && (tdd_sfa != 4) && (tdd_sfa != 5))
if (tdd_sfa != 3 && tdd_sfa != 4 && tdd_sfa != 5)
return;
break;
case 8:
if ((tdd_sfa != 2) && (tdd_sfa != 3) && (tdd_sfa != 4)
&& (tdd_sfa != 5))
if (tdd_sfa != 2 && tdd_sfa != 3 && tdd_sfa != 4 && tdd_sfa != 5)
return;
break;
@@ -558,43 +567,55 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
//}
if (RC.mac[module_idP]->slice_info.interslice_share_active) {
dlsch_scheduler_interslice_multiplexing(module_idP, frameP, subframeP, eNB->slice_info.rballoc_sub);
dlsch_scheduler_interslice_multiplexing(module_idP,
frameP,
subframeP,
eNB->slice_info.rballoc_sub);
/* the interslice multiplexing re-sorts the UE_list for the slices it tries
* to multiplex, so we need to sort it for the current slice again */
sort_UEs(module_idP, slice_idxP, frameP, subframeP);
sort_UEs(module_idP,
slice_idxP,
frameP,
subframeP);
}
for (CC_id = 0; CC_id < RC.nb_mac_CC[module_idP]; CC_id++) {
LOG_D(MAC, "doing schedule_ue_spec for CC_id %d\n", CC_id);
LOG_D(MAC, "doing schedule_ue_spec for CC_id %d\n",
CC_id);
dl_req = &eNB->DL_req[CC_id].dl_config_request_body;
if (mbsfn_flag[CC_id] > 0)
continue;
for (UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
LOG_D(MAC, "doing schedule_ue_spec for CC_id %d UE %d\n", CC_id, UE_id);
LOG_D(MAC, "doing schedule_ue_spec for CC_id %d UE %d\n",
CC_id,
UE_id);
continue_flag = 0; // reset the flag to allow allocation for the remaining UEs
rnti = UE_RNTI(module_idP, UE_id);
eNB_UE_stats = &UE_list->eNB_UE_stats[CC_id][UE_id];
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
/*
if (rnti == NOT_A_RNTI) {
LOG_D(MAC, "Cannot find rnti for UE_id %d (num_UEs %d)\n", UE_id, UE_list->num_UEs);
continue_flag = 1;
}
*/
if (eNB_UE_stats == NULL) {
LOG_D(MAC, "[eNB] Cannot find eNB_UE_stats\n");
continue_flag = 1;
}
if (!ue_dl_slice_membership(module_idP, UE_id, slice_idxP)) {
LOG_D(MAC, "UE%d is not part of slice %d ID %d\n",
UE_id, slice_idxP, RC.mac[module_idP]->slice_info.dl[slice_idxP].id);
/* prevent execution of add_ue_dlsch_info(), it is done by the other
* slice */
continue;
}
// if (!ue_dl_slice_membership(module_idP, UE_id, slice_idxP)) {
// LOG_D(MAC, "UE%d is not part of slice %d ID %d\n",
// UE_id,
// slice_idxP,
// RC.mac[module_idP]->slice_info.dl[slice_idxP].id);
// /* prevent execution of add_ue_dlsch_info(), it is done by the other
// * slice */
// continue;
// }
if (continue_flag != 1) {
switch (get_tmode(module_idP, CC_id, UE_id)) {
@@ -613,18 +634,21 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
break;
default:
LOG_W(MAC, "Unsupported transmission mode %d\n", get_tmode(module_idP, CC_id, UE_id));
LOG_W(MAC, "Unsupported transmission mode %d\n",
get_tmode(module_idP, CC_id, UE_id));
aggregation = 2;
break;
}
}
/* if (continue_flag != 1 */
if ((ue_sched_ctl->pre_nb_available_rbs[CC_id] == 0) || // no RBs allocated
CCE_allocation_infeasible(module_idP, CC_id, 1, subframeP,
aggregation, rnti)) {
LOG_D(MAC,
"[eNB %d] Frame %d : no RB allocated for UE %d on CC_id %d: continue \n",
module_idP, frameP, UE_id, CC_id);
if (ue_sched_ctl->pre_nb_available_rbs[CC_id] == 0 || // no RBs allocated
CCE_allocation_infeasible(module_idP, CC_id, 1, subframeP, aggregation, rnti)) {
LOG_D(MAC, "[eNB %d] Frame %d : no RB allocated for UE %d on CC_id %d: continue \n",
module_idP,
frameP,
UE_id,
CC_id);
continue_flag = 1; //to next user (there might be rbs availiable for other UEs in TM5
}
@@ -636,11 +660,20 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
cc[CC_id].tdd_Config->subframeAssignment,
UE_list);
// update UL DAI after DLSCH scheduling
set_ul_DAI(module_idP, UE_id, CC_id, frameP, subframeP);
set_ul_DAI(module_idP,
UE_id,
CC_id,
frameP,
subframeP);
}
if (continue_flag == 1) {
add_ue_dlsch_info(module_idP, CC_id, UE_id, subframeP, S_DL_NONE);
add_ue_dlsch_info(module_idP,
CC_id,
UE_id,
subframeP,
S_DL_NONE,
rnti);
continue;
}
@@ -653,7 +686,8 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
UE_list->eNB_UE_stats[CC_id][UE_id].harq_round = round;
if (UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status < RRC_CONNECTED) {
LOG_D(MAC, "UE %d is not in RRC_CONNECTED\n", UE_id);
LOG_D(MAC, "UE %d is not in RRC_CONNECTED\n",
UE_id);
continue;
}
@@ -681,10 +715,15 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = 0;
}
LOG_D(MAC,
"[eNB %d] Frame %d: Scheduling UE %d on CC_id %d (rnti %x, harq_pid %d, round %d, rb %d, cqi %d, mcs %d, rrc %d)\n",
module_idP, frameP, UE_id, CC_id, rnti, harq_pid, round,
nb_available_rb, ue_sched_ctl->dl_cqi[CC_id],
LOG_D(MAC, "[eNB %d] Frame %d: Scheduling UE %d on CC_id %d (rnti %x, harq_pid %d, round %d, rb %d, cqi %d, mcs %d, rrc %d)\n",
module_idP,
frameP, UE_id,
CC_id,
rnti,
harq_pid,
round,
nb_available_rb,
ue_sched_ctl->dl_cqi[CC_id],
eNB_UE_stats->dlsch_mcs1,
UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status);
@@ -697,11 +736,15 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
if (nb_rb <= nb_available_rb) {
if (cc[CC_id].tdd_Config != NULL) {
UE_list->UE_template[CC_id][UE_id].DAI++;
update_ul_dci(module_idP, CC_id, rnti,
UE_list->UE_template[CC_id][UE_id].DAI, subframeP);
LOG_D(MAC,
"DAI update: CC_id %d subframeP %d: UE %d, DAI %d\n",
CC_id, subframeP, UE_id,
update_ul_dci(module_idP,
CC_id,
rnti,
UE_list->UE_template[CC_id][UE_id].DAI,
subframeP);
LOG_D(MAC, "DAI update: CC_id %d subframeP %d: UE %d, DAI %d\n",
CC_id,
subframeP,
UE_id,
UE_list->UE_template[CC_id][UE_id].DAI);
}
@@ -716,18 +759,15 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
while ((nb_rb_temp > 0) && (j < N_RBG[CC_id])) {
if (ue_sched_ctl->rballoc_sub_UE[CC_id][j] == 1) {
if (UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j])
printf("WARN: rballoc_subband not free for retrans?\n");
LOG_W(MAC, "WARN: rballoc_subband not free for retrans?\n");
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = ue_sched_ctl->rballoc_sub_UE[CC_id][j];
if ((j == N_RBG[CC_id] - 1) && ((N_RB_DL[CC_id] == 25) || (N_RB_DL[CC_id] == 50))) {
nb_rb_temp = nb_rb_temp - min_rb_unit[CC_id] + 1;
} else {
nb_rb_temp = nb_rb_temp - min_rb_unit[CC_id];
}
nb_rb_temp -= min_rb_unit[CC_id];
if ((j == N_RBG[CC_id] - 1) && (N_RB_DL[CC_id] == 25 || N_RB_DL[CC_id] == 50))
nb_rb_temp++;
}
j = j + 1;
j++;
}
}
@@ -746,7 +786,8 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
case 2:
case 7:
default:
LOG_D(MAC, "retransmission DL_REQ: rnti:%x\n", rnti);
LOG_D(MAC, "retransmission DL_REQ: rnti:%x\n",
rnti);
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void *) dl_config_pdu, 0, sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
@@ -768,30 +809,40 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
// TDD
if (cc[CC_id].tdd_Config != NULL) {
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.downlink_assignment_index =
(UE_list->UE_template[CC_id][UE_id].DAI - 1) & 3;
LOG_D(MAC,
"[eNB %d] Retransmission CC_id %d : harq_pid %d, round %d, dai %d, mcs %d\n",
module_idP, CC_id, harq_pid, round,
(UE_list->UE_template[CC_id][UE_id].DAI - 1),
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.downlink_assignment_index = (UE_list->UE_template[CC_id][UE_id].DAI - 1) & 3;
LOG_D(MAC, "[eNB %d] Retransmission CC_id %d : harq_pid %d, round %d, dai %d, mcs %d\n",
module_idP,
CC_id,
harq_pid,
round,
UE_list->UE_template[CC_id][UE_id].DAI - 1,
UE_list->UE_template[CC_id][UE_id].oldmcs1[harq_pid]);
} else {
LOG_D(MAC,
"[eNB %d] Retransmission CC_id %d : harq_pid %d, round %d, mcs %d\n",
module_idP, CC_id, harq_pid, round,
LOG_D(MAC, "[eNB %d] Retransmission CC_id %d : harq_pid %d, round %d, mcs %d\n",
module_idP,
CC_id,
harq_pid,
round,
UE_list->UE_template[CC_id][UE_id].oldmcs1[harq_pid]);
}
if (!CCE_allocation_infeasible(module_idP, CC_id, 1, subframeP,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level, rnti)) {
if (!CCE_allocation_infeasible(module_idP,
CC_id,
1,
subframeP,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
rnti)) {
dl_req->number_dci++;
dl_req->number_pdu++;
dl_req->tl.tag = NFAPI_DL_CONFIG_REQUEST_BODY_TAG;
eNB->DL_req[CC_id].sfn_sf = frameP<<4 | subframeP;
eNB->DL_req[CC_id].header.message_id = NFAPI_DL_CONFIG_REQUEST;
fill_nfapi_dlsch_config(eNB, dl_req, TBS, -1,
/* retransmission, no pdu_index */
rnti, 0, // type 0 allocation from 7.1.6 in 36.213
fill_nfapi_dlsch_config(eNB,
dl_req,
TBS,
-1, // retransmission, no pdu_index
rnti,
0, // type 0 allocation from 7.1.6 in 36.213
0, // virtual_resource_block_assignment_flag, unused here
0, // resource_block_coding, to be filled in later
getQm(UE_list->UE_template[CC_id][UE_id].oldmcs1[harq_pid]),
@@ -809,11 +860,11 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
0, // nprb
cc[CC_id].p_eNB == 1 ? 1 : 2, // transmission mode
0, //number of PRBs treated as one subband, not used here
0 // number of beamforming vectors, not used here
);
LOG_D(MAC,
"Filled NFAPI configuration for DCI/DLSCH %d, retransmission round %d\n",
eNB->pdu_index[CC_id], round);
0); // number of beamforming vectors, not used here
LOG_D(MAC, "Filled NFAPI configuration for DCI/DLSCH %d, retransmission round %d\n",
eNB->pdu_index[CC_id],
round);
program_dlsch_acknak(module_idP, CC_id, UE_id, frameP, subframeP,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx);
// No TX request for retransmission (check if null request for FAPI)
@@ -824,7 +875,7 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
}
}
add_ue_dlsch_info(module_idP, CC_id, UE_id, subframeP, S_DL_SCHEDULED);
add_ue_dlsch_info(module_idP, CC_id, UE_id, subframeP, S_DL_SCHEDULED, rnti);
//eNB_UE_stats->dlsch_trials[round]++;
UE_list->eNB_UE_stats[CC_id][UE_id].num_retransmission += 1;
UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used_retx = nb_rb;
@@ -1084,6 +1135,7 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
UE_list->UE_sched_ctrl[UE_id].uplane_inactivity_timer = 0;
// reset RRC inactivity timer after uplane activity
ue_contextP = rrc_eNB_get_ue_context(RC.rrc[module_idP], rnti);
if (ue_contextP != NULL) {
ue_contextP->ue_context.ue_rrc_inactivity_timer = 1;
} else {
@@ -1245,7 +1297,7 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
T_INT(subframeP), T_INT(harq_pid),
T_BUFFER(UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0], TBS));
UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid] = nb_rb;
add_ue_dlsch_info(module_idP, CC_id, UE_id, subframeP, S_DL_SCHEDULED);
add_ue_dlsch_info(module_idP, CC_id, UE_id, subframeP, S_DL_SCHEDULED, rnti);
// store stats
eNB->eNB_stats[CC_id].dlsch_bytes_tx += sdu_length_total;
eNB->eNB_stats[CC_id].dlsch_pdus_tx += 1;
@@ -1717,68 +1769,68 @@ unsigned char *get_dlsch_sdu(module_id_t module_idP,
//------------------------------------------------------------------------------
void
update_ul_dci(module_id_t module_idP,
uint8_t CC_idP, rnti_t rntiP, uint8_t daiP, sub_frame_t subframe)
uint8_t CC_idP,
rnti_t rntiP,
uint8_t daiP,
sub_frame_t subframe)
//------------------------------------------------------------------------------
{
nfapi_hi_dci0_request_t *HI_DCI0_req =
&RC.mac[module_idP]->HI_DCI0_req[CC_idP][subframe];
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu =
&HI_DCI0_req->hi_dci0_request_body.hi_dci0_pdu_list[0];
COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_idP];
int i;
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc = &eNB->common_channels[CC_idP];
if (cc->tdd_Config != NULL) { // TDD
for (i = 0;
i <HI_DCI0_req->hi_dci0_request_body.number_of_dci + HI_DCI0_req->hi_dci0_request_body.number_of_hi;
i++) {
if ((hi_dci0_pdu[i].pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE) &&
(hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.rnti == rntiP))
hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.dl_assignment_index = (daiP - 1) & 3;
nfapi_hi_dci0_request_t *HI_DCI0_req = &eNB->HI_DCI0_req[CC_idP][subframe];
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_request_body.hi_dci0_pdu_list[0];
int limit = HI_DCI0_req->hi_dci0_request_body.number_of_dci + HI_DCI0_req->hi_dci0_request_body.number_of_hi;
for (int i = 0; i < limit; i++, hi_dci0_pdu++) {
if (hi_dci0_pdu->pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE && hi_dci0_pdu->dci_pdu.dci_pdu_rel8.rnti == rntiP)
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dl_assignment_index = (daiP - 1) & 3;
}
}
return;
}
//------------------------------------------------------------------------------
void
set_ue_dai(sub_frame_t subframeP,
int UE_id, uint8_t CC_id, uint8_t tdd_config,
int UE_id,
uint8_t CC_id,
uint8_t tdd_config,
UE_list_t *UE_list)
//------------------------------------------------------------------------------
{
switch (tdd_config) {
case 0:
if ((subframeP == 0) || (subframeP == 1) || (subframeP == 3)
|| (subframeP == 5) || (subframeP == 6) || (subframeP == 8)) {
if (subframeP == 0 || subframeP == 1 || subframeP == 3 || subframeP == 5 || subframeP == 6 || subframeP == 8) {
UE_list->UE_template[CC_id][UE_id].DAI = 0;
}
break;
case 1:
if ((subframeP == 0) || (subframeP == 4) || (subframeP == 5)
|| (subframeP == 9)) {
if (subframeP == 0 || subframeP == 4 || subframeP == 5 || subframeP == 9) {
UE_list->UE_template[CC_id][UE_id].DAI = 0;
}
break;
case 2:
if ((subframeP == 4) || (subframeP == 5)) {
if (subframeP == 4 || subframeP == 5) {
UE_list->UE_template[CC_id][UE_id].DAI = 0;
}
break;
case 3:
if ((subframeP == 5) || (subframeP == 7) || (subframeP == 9)) {
if (subframeP == 5 || subframeP == 7 || subframeP == 9) {
UE_list->UE_template[CC_id][UE_id].DAI = 0;
}
break;
case 4:
if ((subframeP == 0) || (subframeP == 6)) {
if (subframeP == 0 || subframeP == 6) {
UE_list->UE_template[CC_id][UE_id].DAI = 0;
}
@@ -1792,8 +1844,7 @@ set_ue_dai(sub_frame_t subframeP,
break;
case 6:
if ((subframeP == 0) || (subframeP == 1) || (subframeP == 5)
|| (subframeP == 6) || (subframeP == 9)) {
if (subframeP == 0 || subframeP == 1 || subframeP == 5 || subframeP == 6 || subframeP == 9) {
UE_list->UE_template[CC_id][UE_id].DAI = 0;
}
@@ -1801,9 +1852,12 @@ set_ue_dai(sub_frame_t subframeP,
default:
UE_list->UE_template[CC_id][UE_id].DAI = 0;
LOG_I(MAC, "unknown TDD config %d\n", tdd_config);
LOG_I(MAC, "unknown TDD config %d\n",
tdd_config);
break;
}
return;
}
void schedule_PCH(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP) {
openair2/LAYER2/MAC/eNB_scheduler_fairRR.c
+17 -9
View File
@@ -295,7 +295,8 @@ void dlsch_scheduler_pre_ue_select_fairRR(
CC_id,
UE_id,
subframeP,
S_DL_NONE);
S_DL_NONE,
rnti);
end_flag[CC_id] = 1;
break;
}
@@ -418,7 +419,8 @@ void dlsch_scheduler_pre_ue_select_fairRR(
CC_id,
UE_id,
subframeP,
S_DL_NONE);
S_DL_NONE,
rnti);
end_flag[CC_id] = 1;
break;
}
@@ -541,7 +543,8 @@ void dlsch_scheduler_pre_ue_select_fairRR(
CC_id,
UE_id,
subframeP,
S_DL_NONE);
S_DL_NONE,
rnti);
end_flag[CC_id] = 1;
break;
}
@@ -809,7 +812,8 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
unsigned char ta_len = 0;
unsigned char sdu_lcids[NB_RB_MAX], lcid, offset, num_sdus = 0;
uint16_t nb_rb, nb_rb_temp, nb_available_rb;
uint16_t TBS, j, sdu_lengths[NB_RB_MAX], rnti, padding = 0, post_padding = 0;
uint16_t TBS, j, sdu_lengths[NB_RB_MAX], padding = 0, post_padding = 0;
rnti_t rnti = 0;
unsigned char dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES];
unsigned char round = 0;
unsigned char harq_pid = 0;
@@ -1214,8 +1218,11 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
}
add_ue_dlsch_info(module_idP,
CC_id, UE_id, subframeP,
S_DL_SCHEDULED);
CC_id,
UE_id,
subframeP,
S_DL_SCHEDULED,
rnti);
//eNB_UE_stats->dlsch_trials[round]++;
UE_list->eNB_UE_stats[CC_id][UE_id].
num_retransmission += 1;
@@ -1677,10 +1684,10 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
if (opt_enabled == 1) {
trace_pdu(DIRECTION_DOWNLINK, (uint8_t *)UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
TBS, module_idP, WS_RA_RNTI, UE_RNTI(module_idP,UE_id),
TBS, module_idP, WS_RA_RNTI, UE_RNTI(module_idP, UE_id),
eNB->frame, eNB->subframe,0,0);
LOG_D(OPT,"[eNB %d][DLSCH] CC_id %d Frame %d rnti %x with size %d\n",
module_idP, CC_id, frameP, UE_RNTI(module_idP,UE_id), TBS);
module_idP, CC_id, frameP, UE_RNTI(module_idP, UE_id), TBS);
}
T(T_ENB_MAC_UE_DL_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP), T_INT(subframeP),
@@ -1690,7 +1697,8 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
CC_id,
UE_id,
subframeP,
S_DL_SCHEDULED);
S_DL_SCHEDULED,
rnti);
// store stats
eNB->eNB_stats[CC_id].dlsch_bytes_tx+=sdu_length_total;
eNB->eNB_stats[CC_id].dlsch_pdus_tx+=1;
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+2838 -2691
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/mac_proto.h
+4 -4
View File
@@ -433,7 +433,7 @@ void init_ue_sched_info(void);
void add_ue_ulsch_info(module_id_t module_idP, int CC_id, int UE_id,
sub_frame_t subframe, UE_ULSCH_STATUS status);
void add_ue_dlsch_info(module_id_t module_idP, int CC_id, int UE_id,
sub_frame_t subframe, UE_DLSCH_STATUS status);
sub_frame_t subframe, UE_DLSCH_STATUS status, rnti_t rnti);
int find_UE_id(module_id_t module_idP, rnti_t rnti);
int find_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP);
rnti_t UE_RNTI(module_id_t module_idP, int UE_id);
@@ -1201,7 +1201,6 @@ void fill_nfapi_dlsch_config(eNB_MAC_INST * eNB,
void fill_nfapi_harq_information(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
uint16_t absSFP,
nfapi_ul_config_harq_information *
harq_information, uint8_t cce_idxP);
@@ -1212,10 +1211,11 @@ void fill_nfapi_ulsch_harq_information(module_id_t module_idP,
* harq_information,
sub_frame_t subframeP);
uint16_t fill_nfapi_uci_acknak(module_id_t module_idP,
void fill_nfapi_uci_acknak(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
uint16_t absSFP, uint8_t cce_idxP);
uint16_t absSFP,
uint8_t cce_idxP);
void fill_nfapi_dl_dci_1A(nfapi_dl_config_request_pdu_t * dl_config_pdu,
uint8_t aggregation_level,
openair2/LAYER2/MAC/pre_processor.c
+68 -48
View File
@@ -467,7 +467,11 @@ void decode_slice_positioning(module_id_t Mod_idP,
// This fuction sorts the UE in order their dlsch buffer and CQI
void sort_UEs(module_id_t Mod_idP, int slice_idx, int frameP, sub_frame_t subframeP)
void
sort_UEs(module_id_t Mod_idP,
int slice_idx,
int frameP,
sub_frame_t subframeP)
{
int i;
int list[MAX_MOBILES_PER_ENB];
@@ -478,13 +482,12 @@ void sort_UEs(module_id_t Mod_idP, int slice_idx, int frameP, sub_frame_t subfra
for (i = 0; i < MAX_MOBILES_PER_ENB; i++) {
if (UE_list->active[i] == FALSE) continue;
if (UE_RNTI(Mod_idP, i) == NOT_A_RNTI) continue;
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1) continue;
if (!ue_dl_slice_membership(Mod_idP, i, slice_idx)) continue;
list[list_size] = i;
list_size++;
if (UE_list->active[i] == TRUE &&
UE_RNTI(Mod_idP, i) != NOT_A_RNTI &&
UE_list->UE_sched_ctrl[i].ul_out_of_sync != 1 &&
ue_dl_slice_membership(Mod_idP, i, slice_idx)) {
list[list_size++] = i;
}
}
decode_sorting_policy(Mod_idP, slice_idx);
@@ -1178,13 +1181,14 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
int min_rb_unit[NFAPI_CC_MAX];
slice_info_t *sli = &RC.mac[Mod_id]->slice_info;
eNB_MAC_INST *eNB = RC.mac[Mod_id];
slice_info_t *sli = &eNB->slice_info;
uint16_t (*nb_rbs_required)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_required;
uint16_t (*nb_rbs_accounted)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_accounted;
uint16_t (*nb_rbs_remaining)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_remaining;
uint8_t (*MIMO_mode_indicator)[N_RBG_MAX] = sli->pre_processor_results[slice_idx].MIMO_mode_indicator;
UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
UE_list_t *UE_list = &eNB->UE_list;
UE_sched_ctrl *ue_sched_ctl;
// int rrc_status = RRC_IDLE;
@@ -1202,7 +1206,10 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
// Initialize scheduling information for all active UEs
memset(&sli->pre_processor_results[slice_idx], 0, sizeof(sli->pre_processor_results[slice_idx]));
// FIXME: After the memset above, some of the resets in reset() are redundant
dlsch_scheduler_pre_processor_reset(Mod_id, slice_idx, frameP, subframeP,
dlsch_scheduler_pre_processor_reset(Mod_id,
slice_idx,
frameP,
subframeP,
min_rb_unit,
nb_rbs_required,
rballoc_sub,
@@ -1211,23 +1218,38 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
// STATUS
// Store the DLSCH buffer for each logical channel
store_dlsch_buffer(Mod_id, slice_idx, frameP, subframeP);
store_dlsch_buffer(Mod_id,
slice_idx,
frameP,
subframeP);
// Calculate the number of RBs required by each UE on the basis of logical channel's buffer
assign_rbs_required(Mod_id, slice_idx, frameP, subframeP, nb_rbs_required, min_rb_unit);
assign_rbs_required(Mod_id,
slice_idx,
frameP,
subframeP,
nb_rbs_required,
min_rb_unit);
// Sorts the user on the basis of dlsch logical channel buffer and CQI
sort_UEs(Mod_id, slice_idx, frameP, subframeP);
sort_UEs(Mod_id,
slice_idx,
frameP,
subframeP);
// ACCOUNTING
// This procedure decides the number of RBs to allocate
dlsch_scheduler_pre_processor_accounting(Mod_id, slice_idx, frameP, subframeP,
dlsch_scheduler_pre_processor_accounting(Mod_id,
slice_idx,
frameP,
subframeP,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted);
// POSITIONING
// This procedure does the main allocation of the RBs
dlsch_scheduler_pre_processor_positioning(Mod_id, slice_idx,
dlsch_scheduler_pre_processor_positioning(Mod_id,
slice_idx,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted,
@@ -1237,8 +1259,9 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
// SHARING
// If there are available RBs left in the slice, allocate them to the highest priority UEs
if (RC.mac[Mod_id]->slice_info.intraslice_share_active) {
dlsch_scheduler_pre_processor_intraslice_sharing(Mod_id, slice_idx,
if (eNB->slice_info.intraslice_share_active) {
dlsch_scheduler_pre_processor_intraslice_sharing(Mod_id,
slice_idx,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted,
@@ -1250,7 +1273,7 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
#ifdef TM5
// This has to be revisited!!!!
for (CC_id = 0; CC_id < RC.nb_mac_CC[Mod_id]; CC_id++) {
COMMON_channels_t *cc = &RC.mac[Mod_id]->common_channels[CC_id];
COMMON_channels_t *cc = &eNB->common_channels[CC_id];
int N_RBG = to_rbg(cc->mib->message.dl_Bandwidth);
i1 = 0;
i2 = 0;
@@ -1258,35 +1281,24 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
for (j = 0; j < N_RBG; j++) {
if (MIMO_mode_indicator[CC_id][j] == 2) {
i1 = i1 + 1;
i1++;
} else if (MIMO_mode_indicator[CC_id][j] == 1) {
i2 = i2 + 1;
i2++;
} else if (MIMO_mode_indicator[CC_id][j] == 0) {
i3 = i3 + 1;
i3++;
}
}
if ((i1 < N_RBG) && (i2 > 0) && (i3 == 0)) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_SUMIMO_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->
check_for_SUMIMO_transmissions + 1;
if (i1 < N_RBG) {
if (i2 > 0 && i3 == 0) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_SUMIMO_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->check_for_SUMIMO_transmissions + 1;
} else if (i3 > 0) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_MUMIMO_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->check_for_MUMIMO_transmissions + 1;
}
} else if (i3 == N_RBG && i1 == 0 && i2 == 0) {
PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions + 1;
}
if (i3 == N_RBG && i1 == 0 && i2 == 0) {
PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions +
1;
}
if ((i1 < N_RBG) && (i3 > 0)) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_MUMIMO_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->
check_for_MUMIMO_transmissions + 1;
}
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions +
1;
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions + 1;
}
#endif
@@ -1297,22 +1309,30 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
CC_id = UE_list->ordered_CCids[i][UE_id];
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].dl_pow_off = dl_pow_off[UE_id];
COMMON_channels_t *cc = &RC.mac[Mod_id]->common_channels[CC_id];
COMMON_channels_t *cc = &eNB->common_channels[CC_id];
int N_RBG = to_rbg(cc->mib->message.dl_Bandwidth);
if (ue_sched_ctl->pre_nb_available_rbs[CC_id] > 0) {
LOG_D(MAC, "******************DL Scheduling Information for UE%d ************************\n", UE_id);
LOG_D(MAC, "dl power offset UE%d = %d \n", UE_id, ue_sched_ctl->dl_pow_off[CC_id]);
LOG_D(MAC, "***********RB Alloc for every subband for UE%d ***********\n", UE_id);
LOG_D(MAC, "******************DL Scheduling Information for UE%d ************************\n",
UE_id);
LOG_D(MAC, "dl power offset UE%d = %d \n",
UE_id,
ue_sched_ctl->dl_pow_off[CC_id]);
LOG_D(MAC, "***********RB Alloc for every subband for UE%d ***********\n",
UE_id);
for (j = 0; j < N_RBG; j++) {
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].rballoc_sub[UE_id] = rballoc_sub_UE[CC_id][UE_id][UE_id];
LOG_D(MAC, "RB Alloc for UE%d and Subband%d = %d\n", UE_id, j, ue_sched_ctl->rballoc_sub_UE[CC_id][j]);
LOG_D(MAC, "RB Alloc for UE%d and Subband%d = %d\n",
UE_id, j,
ue_sched_ctl->rballoc_sub_UE[CC_id][j]);
}
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = pre_nb_available_rbs[CC_id][UE_id];
LOG_D(MAC, "[eNB %d][SLICE %d]Total RBs allocated for UE%d = %d\n",
Mod_id, RC.mac[Mod_id]->slice_info.dl[slice_idx].id, UE_id,
Mod_id,
eNB->slice_info.dl[slice_idx].id,
UE_id,
ue_sched_ctl->pre_nb_available_rbs[CC_id]);
}
}