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Contains MAC changes to run || DLSCH

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DL config as array in MAC
Run RX slot processing in Tpool thread
Fixed race in phy config
Changed mac_IF_mutex
Proc Tx: Lets wait for Proc Rx to get ACK/NACK
-(only on slots that carry ACK/NACK)
Fix problem with rfsim
Separated PDCCH and PDSCH decoding functions. Run PDCCH decoding in main UE_thread.
Fixed race in MAC dci config struct
needed for parallel processing of slots
Moved DLSCH transport block buffer to stack
rx_ind as static allocation
L2sim: Fixed calling of MAC sched in wrong slot
Fix DCI extract bug for RA procedure
This commit is contained in:
Sakthivel Velumani
2023-04-03 10:24:24 -04:00
parent 1f97969675
commit 15c12caa37
22 changed files with 333 additions and 169 deletions
Download Patch File Download Diff File Expand all files Collapse all files
executables/nr-ue.c
+58 -20
View File
@@ -203,6 +203,7 @@ static void process_queued_nr_nfapi_msgs(NR_UE_MAC_INST_t *mac, int sfn_slot)
nfapi_nr_ul_tti_request_t *ul_tti_request_crc = unqueue_matching(&nr_ul_tti_req_queue, MAX_QUEUE_SIZE, sfn_slot_matcher, &mac->nr_ue_emul_l1.harq[i].active_ul_harq_sfn_slot);
if (ul_tti_request_crc && ul_tti_request_crc->n_pdus > 0) {
check_and_process_dci(NULL, NULL, NULL, ul_tti_request_crc);
free_and_zero(ul_tti_request_crc);
}
}
@@ -232,6 +233,8 @@ static void process_queued_nr_nfapi_msgs(NR_UE_MAC_INST_t *mac, int sfn_slot)
if (get_softmodem_params()->nsa)
save_nr_measurement_info(dl_tti_request);
check_and_process_dci(dl_tti_request, tx_data_request, NULL, NULL);
free_and_zero(dl_tti_request);
free_and_zero(tx_data_request);
}
else {
AssertFatal(false, "We dont have PDUs in either dl_tti %d or tx_req %d\n",
@@ -240,6 +243,7 @@ static void process_queued_nr_nfapi_msgs(NR_UE_MAC_INST_t *mac, int sfn_slot)
}
if (ul_dci_request && ul_dci_request->numPdus > 0) {
check_and_process_dci(NULL, NULL, ul_dci_request, NULL);
free_and_zero(ul_dci_request);
}
}
@@ -324,14 +328,6 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg)
if (pthread_mutex_lock(&mac->mutex_dl_info)) abort();
memset(&mac->dl_info, 0, sizeof(mac->dl_info));
mac->dl_info.cc_id = CC_id;
mac->dl_info.gNB_index = gNB_id;
mac->dl_info.module_id = mod_id;
mac->dl_info.frame = frame;
mac->dl_info.slot = slot;
mac->dl_info.dci_ind = NULL;
mac->dl_info.rx_ind = NULL;
if (ch_info) {
mac->nr_ue_emul_l1.pmi = ch_info->csi[0].pmi;
mac->nr_ue_emul_l1.ri = ch_info->csi[0].ri;
@@ -343,6 +339,14 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg)
mac->scc->tdd_UL_DL_ConfigurationCommon :
mac->scc_SIB->tdd_UL_DL_ConfigurationCommon,
ul_info.slot_rx)) {
memset(&mac->dl_info, 0, sizeof(mac->dl_info));
mac->dl_info.cc_id = CC_id;
mac->dl_info.gNB_index = gNB_id;
mac->dl_info.module_id = mod_id;
mac->dl_info.frame = frame;
mac->dl_info.slot = slot;
mac->dl_info.dci_ind = NULL;
mac->dl_info.rx_ind = NULL;
nr_ue_dl_indication(&mac->dl_info, &ul_time_alignment);
}
@@ -563,6 +567,13 @@ void processSlotTX(void *arg) {
LOG_D(PHY,"%d.%d => slot type %d\n", proc->frame_tx, proc->nr_slot_tx, proc->tx_slot_type);
if (proc->tx_slot_type == NR_UPLINK_SLOT || proc->tx_slot_type == NR_MIXED_SLOT){
// wait for rx slots to send indication
for(int i=0; i < UE->tx_wait_for_dlsch[proc->nr_slot_tx]; i++) {
notifiedFIFO_elt_t *res = pullNotifiedFIFO(UE->tx_resume_ind_fifo[proc->nr_slot_tx]);
delNotifiedFIFO_elt(res);
}
UE->tx_wait_for_dlsch[proc->nr_slot_tx] = 0;
// trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) {
@@ -589,10 +600,8 @@ void processSlotTX(void *arg) {
RU_write(rxtxD);
}
void UE_processing(nr_rxtx_thread_data_t *rxtxD) {
nr_phy_data_t UE_dl_preprocessing(PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
PHY_VARS_NR_UE *UE = rxtxD->UE;
nr_phy_data_t phy_data = {0};
if (IS_SOFTMODEM_NOS1 || get_softmodem_params()->sa) {
@@ -624,17 +633,28 @@ void UE_processing(nr_rxtx_thread_data_t *rxtxD) {
UE->if_inst->dl_indication(&dl_indication, NULL);
}
// Process Rx data for one sub-frame
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, no_relay, NULL );
#else
uint64_t a=rdtsc_oai();
phy_procedures_nrUE_RX(UE, proc, &phy_data);
pbch_pdcch_processing(UE, proc, &phy_data);
if (phy_data.dlsch[0].active) {
// indicate to tx thread to wait for DLSCH decoding
const int ack_nack_slot = (proc->nr_slot_rx + phy_data.dlsch[0].dlsch_config.k1_feedback) % UE->frame_parms.slots_per_frame;
UE->tx_wait_for_dlsch[ack_nack_slot]++;
}
LOG_D(PHY, "In %s: slot %d, time %llu\n", __FUNCTION__, proc->nr_slot_rx, (rdtsc_oai()-a)/3500);
#endif
}
ue_ta_procedures(UE, proc->nr_slot_tx, proc->frame_tx);
return phy_data;
}
void UE_dl_processing(void *arg) {
nr_rxtx_thread_data_t *rxtxD = (nr_rxtx_thread_data_t *) arg;
UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
PHY_VARS_NR_UE *UE = rxtxD->UE;
nr_phy_data_t *phy_data = &rxtxD->phy_data;
pdsch_processing(UE, proc, phy_data);
}
void dummyWrite(PHY_VARS_NR_UE *UE,openair0_timestamp timestamp, int writeBlockSize) {
@@ -774,6 +794,13 @@ void *UE_thread(void *arg) {
bool syncRunning=false;
const int nb_slot_frame = UE->frame_parms.slots_per_frame;
int absolute_slot=0, decoded_frame_rx=INT_MAX, trashed_frames=0;
initNotifiedFIFO(&UE->phy_config_ind);
int num_ind_fifo = nb_slot_frame;
for(int i=0; i < num_ind_fifo; i++) {
UE->tx_resume_ind_fifo[i] = malloc(sizeof(*UE->tx_resume_ind_fifo[i]));
initNotifiedFIFO(UE->tx_resume_ind_fifo[i]);
}
while (!oai_exit) {
if (UE->lost_sync) {
@@ -796,6 +823,11 @@ void *UE_thread(void *arg) {
decoded_frame_rx=(((mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused)<<4) | tmp->proc.decoded_frame_rx);
// shift the frame index with all the frames we trashed meanwhile we perform the synch search
decoded_frame_rx=(decoded_frame_rx + UE->init_sync_frame + trashed_frames) % MAX_FRAME_NUMBER;
// wait for RRC to configure PHY parameters from SIB
if (get_softmodem_params()->sa) {
notifiedFIFO_elt_t *phy_config_res = pullNotifiedFIFO(&UE->phy_config_ind);
delNotifiedFIFO_elt(phy_config_res);
}
}
delNotifiedFIFO_elt(res);
start_rx_stream=0;
@@ -935,13 +967,19 @@ void *UE_thread(void *arg) {
curMsgTx->UE = UE;
pushTpool(&(get_nrUE_params()->Tpool), newElt);
// RX slot processing
UE_processing(&curMsg);
// RX slot processing. We launch and forget.
nr_phy_data_t phy_data = UE_dl_preprocessing(UE, &curMsg.proc);
newElt = newNotifiedFIFO_elt(sizeof(nr_rxtx_thread_data_t), curMsg.proc.nr_slot_rx, NULL, UE_dl_processing);
nr_rxtx_thread_data_t *curMsgRx = (nr_rxtx_thread_data_t *) NotifiedFifoData(newElt);
curMsgRx->proc = curMsg.proc;
curMsgRx->UE = UE;
curMsgRx->phy_data = phy_data;
pushTpool(&(get_nrUE_params()->Tpool), newElt);
if (curMsg.proc.decoded_frame_rx != -1)
decoded_frame_rx=(((mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused)<<4) | curMsg.proc.decoded_frame_rx);
else
decoded_frame_rx=-1;
decoded_frame_rx=-1;
if (decoded_frame_rx>0 && decoded_frame_rx != curMsg.proc.frame_rx)
LOG_E(PHY,"Decoded frame index (%d) is not compatible with current context (%d), UE should go back to synch mode\n",
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+2 -2
View File
@@ -21,6 +21,7 @@
#include "stddef.h"
#include "platform_types.h"
#include "fapi_nr_ue_constants.h"
#include "PHY/impl_defs_top.h"
#include "PHY/impl_defs_nr.h"
#include "common/utils/nr/nr_common.h"
@@ -390,8 +391,6 @@ typedef struct {
} fapi_nr_ul_config_request_pdu_t;
typedef struct {
//uint16_t sfn;
//uint16_t slot;
uint16_t sfn;
uint16_t slot;
uint8_t number_pdus;
@@ -483,6 +482,7 @@ typedef struct {
uint8_t nscid;
uint16_t dlDmrsScramblingId;
uint16_t pduBitmap;
uint32_t k1_feedback;
} fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
openair1/PHY/INIT/nr_init_ue.c
-9
View File
@@ -523,7 +523,6 @@ void free_nr_ue_dl_harq(NR_DL_UE_HARQ_t harq_list[2][NR_MAX_DLSCH_HARQ_PROCESSES
for (int j=0; j < 2; j++) {
for (int i=0; i<number_of_processes; i++) {
free_and_zero(harq_list[j][i].b);
for (int r=0; r<a_segments; r++) {
free_and_zero(harq_list[j][i].c[r]);
@@ -575,18 +574,10 @@ void nr_init_dl_harq_processes(NR_DL_UE_HARQ_t harq_list[2][NR_MAX_DLSCH_HARQ_PR
a_segments = (a_segments/273)+1;
}
uint32_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
for (int j=0; j<2; j++) {
for (int i=0; i<number_of_processes; i++) {
memset(harq_list[j] + i, 0, sizeof(NR_DL_UE_HARQ_t));
init_downlink_harq_status(harq_list[j] + i);
harq_list[j][i].b = malloc16(dlsch_bytes);
if (harq_list[j][i].b)
memset(harq_list[j][i].b, 0, dlsch_bytes);
else
AssertFatal(true, "Unable to reset harq memory \"b\"\n");
harq_list[j][i].c = malloc16(a_segments*sizeof(uint8_t *));
harq_list[j][i].d = malloc16(a_segments*sizeof(int16_t *));
openair1/PHY/NR_UE_TRANSPORT/csi_rx.c
+3 -5
View File
@@ -977,13 +977,11 @@ int nr_ue_csi_rs_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, c16_t r
csirs_measurements.i2 = *i2;
csirs_measurements.cqi = cqi;
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t *rx_ind = calloc(sizeof(*rx_ind),1);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, NULL);
nr_fill_rx_indication(rx_ind, FAPI_NR_CSIRS_IND, ue, NULL, NULL, 1, proc, (void *)&csirs_measurements);
fapi_nr_rx_indication_t rx_ind = {0};
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, NULL);
nr_fill_rx_indication(&rx_ind, FAPI_NR_CSIRS_IND, ue, NULL, NULL, 1, proc, (void *)&csirs_measurements, NULL);
if (ue->if_inst && ue->if_inst->dl_indication) {
ue->if_inst->dl_indication(&dl_indication, NULL);
} else {
free(rx_ind);
}
return 0;
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
+6 -4
View File
@@ -77,7 +77,7 @@ void nr_dlsch_unscrambling(int16_t *llr, uint32_t size, uint8_t q, uint32_t Nid,
nr_codeword_unscrambling(llr, size, q, Nid, n_RNTI);
}
bool nr_ue_postDecode(PHY_VARS_NR_UE *phy_vars_ue, notifiedFIFO_elt_t *req, bool last, notifiedFIFO_t *nf_p) {
bool nr_ue_postDecode(PHY_VARS_NR_UE *phy_vars_ue, notifiedFIFO_elt_t *req, bool last, notifiedFIFO_t *nf_p, int b_size, uint8_t b[b_size]) {
ldpcDecode_ue_t *rdata = (ldpcDecode_ue_t*) NotifiedFifoData(req);
NR_DL_UE_HARQ_t *harq_process = rdata->harq_process;
NR_UE_DLSCH_t *dlsch = (NR_UE_DLSCH_t *) rdata->dlsch;
@@ -90,7 +90,7 @@ bool nr_ue_postDecode(PHY_VARS_NR_UE *phy_vars_ue, notifiedFIFO_elt_t *req, bool
bool decodeSuccess = (rdata->decodeIterations < (1+dlsch->max_ldpc_iterations));
if (decodeSuccess) {
memcpy(harq_process->b+rdata->offset,
memcpy(b+rdata->offset,
harq_process->c[r],
rdata->Kr_bytes - (harq_process->F>>3) -((harq_process->C>1)?3:0));
@@ -311,7 +311,9 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_slot_rx,
uint8_t harq_pid) {
uint8_t harq_pid,
int b_size,
uint8_t b[b_size]) {
uint32_t A,E;
uint32_t G;
uint32_t ret,offset;
@@ -493,7 +495,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
bool last = false;
if (r == nbDecode - 1)
last = true;
bool stop = nr_ue_postDecode(phy_vars_ue, req, last, &nf);
bool stop = nr_ue_postDecode(phy_vars_ue, req, last, &nf, b_size, b);
delNotifiedFIFO_elt(req);
if (stop)
break;
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
+3 -5
View File
@@ -578,16 +578,14 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
#endif
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t *rx_ind=calloc(sizeof(*rx_ind),1);
fapi_nr_rx_indication_t rx_ind = {0};
uint16_t number_pdus = 1;
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, phy_data);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, ue, NULL, NULL, number_pdus, proc,(void *)result);
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, phy_data);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, ue, NULL, NULL, number_pdus, proc,(void *)result, NULL);
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication, NULL);
else
free(rx_ind); // dl_indication would free(), so free() here if not called
return 0;
}
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+3 -1
View File
@@ -205,7 +205,9 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_slot_rx,
uint8_t harq_pid);
uint8_t harq_pid,
int b_size,
uint8_t b[b_size]);
int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
NR_UE_ULSCH_t *ulsch,
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
-2
View File
@@ -119,8 +119,6 @@ typedef struct {
uint32_t TBS;
/// The payload + CRC size in bits
uint32_t B;
/// Pointer to the payload
uint8_t *b;
/// Pointers to transport block segments
uint8_t **c;
/// soft bits for each received segment ("d"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
openair1/PHY/defs_nr_UE.h
+5
View File
@@ -664,6 +664,10 @@ typedef struct {
void *phy_sim_pdsch_rxdataF_comp;
void *phy_sim_pdsch_dl_ch_estimates;
void *phy_sim_pdsch_dl_ch_estimates_ext;
uint8_t *phy_sim_dlsch_b;
notifiedFIFO_t phy_config_ind;
notifiedFIFO_t *tx_resume_ind_fifo[NR_MAX_SLOTS_PER_FRAME];
int tx_wait_for_dlsch[NR_MAX_SLOTS_PER_FRAME];
} PHY_VARS_NR_UE;
typedef struct nr_phy_data_tx_s {
@@ -682,6 +686,7 @@ typedef struct nr_rxtx_thread_data_s {
UE_nr_rxtx_proc_t proc;
PHY_VARS_NR_UE *UE;
int writeBlockSize;
nr_phy_data_t phy_data;
} nr_rxtx_thread_data_t;
typedef struct LDPCDecode_ue_s {
openair1/SCHED_NR_UE/defs.h
+9 -9
View File
@@ -98,17 +98,16 @@ typedef struct {
*/
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, nr_phy_data_tx_t *phy_data);
/*! \brief Scheduling for UE RX procedures in normal subframes.
@param ue Pointer to UE variables on which to act
@param proc Pointer to proc information
@param dlsch_parallel use multithreaded dlsch processing
@param phy_pdcch_config PDCCH Config for this slot
@param txFifo Result fifo if PDSCH is run in parallel
*/
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
void send_slot_ind(notifiedFIFO_t *nf, int slot);
void pbch_pdcch_processing(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
nr_phy_data_t *phy_data);
void pdsch_processing(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
nr_phy_data_t *phy_data);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t abstraction_flag, uint8_t do_pdcch_flag, relaying_type_t r_type);
void processSlotTX(void *arg);
@@ -166,7 +165,8 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
NR_UE_DLSCH_t *dlsch1,
uint16_t n_pdus,
UE_nr_rxtx_proc_t *proc,
void *typeSpecific);
void *typeSpecific,
uint8_t *b);
bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+3 -1
View File
@@ -544,8 +544,10 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config)
{
fapi_nr_config_request_t *nrUE_config = &PHY_vars_UE_g[phy_config->Mod_id][phy_config->CC_id]->nrUE_config;
if(phy_config != NULL)
if(phy_config != NULL) {
memcpy(nrUE_config,&phy_config->config_req,sizeof(fapi_nr_config_request_t));
pushNotifiedFIFO(&PHY_vars_UE_g[phy_config->Mod_id][phy_config->CC_id]->phy_config_ind, newNotifiedFIFO_elt(1,0,NULL,NULL));
}
return 0;
}
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+76 -37
View File
@@ -118,7 +118,8 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
NR_UE_DLSCH_t *dlsch1,
uint16_t n_pdus,
UE_nr_rxtx_proc_t *proc,
void *typeSpecific){
void *typeSpecific,
uint8_t *b){
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
@@ -131,7 +132,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
if ((pdu_type != FAPI_NR_RX_PDU_TYPE_SSB) && dlsch0) {
dl_harq0 = &ue->dl_harq_processes[0][dlsch0->dlsch_config.harq_process_nbr];
trace_NRpdu(DIRECTION_DOWNLINK,
dl_harq0->b,
b,
dlsch0->dlsch_config.TBS / 8,
WS_C_RNTI,
dlsch0->rnti,
@@ -147,7 +148,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
dl_harq0 = &ue->dl_harq_processes[0][dlsch0->dlsch_config.harq_process_nbr];
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.harq_pid = dlsch0->dlsch_config.harq_process_nbr;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.ack_nack = dl_harq0->ack;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.pdu = dl_harq0->b;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.pdu = b;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.pdu_length = dlsch0->dlsch_config.TBS / 8;
}
if(dlsch1) {
@@ -696,6 +697,15 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
return 0;
}
void send_slot_ind(notifiedFIFO_t *nf, int slot) {
if (nf) {
notifiedFIFO_elt_t *newElt = newNotifiedFIFO_elt(sizeof(int), 0, NULL, NULL);
int *msgData = (int *) NotifiedFifoData(newElt);
*msgData = slot;
pushNotifiedFIFO(nf, newElt);
}
}
bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t dlsch[2],
@@ -716,7 +726,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
NR_DL_UE_HARQ_t *dl_harq1 = &ue->dl_harq_processes[1][harq_pid];
uint16_t dmrs_len = get_num_dmrs(dlsch[0].dlsch_config.dlDmrsSymbPos);
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t *rx_ind = calloc(1, sizeof(*rx_ind));
fapi_nr_rx_indication_t rx_ind = {0};
uint16_t number_pdus = 1;
// params for UL time alignment procedure
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &ue->ul_time_alignment[gNB_id];
@@ -739,8 +749,12 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
LOG_D(PHY,"AbsSubframe %d.%d Start LDPC Decoder for CW1 [harq_pid %d] ? %d \n", frame_rx%1024, nr_slot_rx, harq_pid, is_cw1_active);
// exit dlsch procedures as there are no active dlsch
if (is_cw0_active != ACTIVE && is_cw1_active != ACTIVE)
if (is_cw0_active != ACTIVE && is_cw1_active != ACTIVE) {
// don't wait anymore
const int ack_nack_slot = (proc->nr_slot_rx + dlsch[0].dlsch_config.k1_feedback) % ue->frame_parms.slots_per_frame;
send_slot_ind(ue->tx_resume_ind_fifo[ack_nack_slot], proc->nr_slot_rx);
return false;
}
// start ldpc decode for CW 0
dl_harq0->G = nr_get_G(dlsch[0].dlsch_config.number_rbs,
@@ -762,6 +776,16 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
start_meas(&ue->dlsch_decoding_stats);
// create memory to store decoder output
int a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS; //number of segments to be allocated
int num_rb = dlsch[0].dlsch_config.number_rbs;
if (num_rb != 273) {
a_segments = a_segments*num_rb;
a_segments = (a_segments/273)+1;
}
uint32_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
__attribute__ ((aligned(32))) uint8_t p_b[dlsch_bytes];
ret = nr_dlsch_decoding(ue,
proc,
gNB_id,
@@ -772,7 +796,9 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
frame_rx,
nb_symb_sch,
nr_slot_rx,
harq_pid);
harq_pid,
dlsch_bytes,
p_b);
LOG_T(PHY,"dlsch decoding, ret = %d\n", ret);
@@ -799,8 +825,8 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
break;
}
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, NULL);
nr_fill_rx_indication(rx_ind, ind_type, ue, &dlsch[0], NULL, number_pdus, proc, NULL);
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, NULL);
nr_fill_rx_indication(&rx_ind, ind_type, ue, &dlsch[0], NULL, number_pdus, proc, NULL, p_b);
LOG_D(PHY, "In %s DL PDU length in bits: %d, in bytes: %d \n", __FUNCTION__, dlsch[0].dlsch_config.TBS, dlsch[0].dlsch_config.TBS / 8);
@@ -840,7 +866,9 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
frame_rx,
nb_symb_sch,
nr_slot_rx,
harq_pid);
harq_pid,
dlsch_bytes,
p_b);
LOG_T(PHY,"CW dlsch decoding, ret1 = %d\n", ret1);
stop_meas(&ue->dlsch_decoding_stats);
@@ -857,6 +885,13 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
ue->if_inst->dl_indication(&dl_indication, ul_time_alignment);
}
// DLSCH decoding finished! don't wait anymore
const int ack_nack_slot = (proc->nr_slot_rx + dlsch[0].dlsch_config.k1_feedback) % ue->frame_parms.slots_per_frame;
send_slot_ind(ue->tx_resume_ind_fifo[ack_nack_slot], proc->nr_slot_rx);
if (ue->phy_sim_dlsch_b)
memcpy(ue->phy_sim_dlsch_b, p_b, dlsch_bytes);
if (ue->mac_enabled == 1) { // TODO: move this from PHY to MAC layer!
/* Time Alignment procedure
@@ -989,8 +1024,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
return dec;
}
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
void pbch_pdcch_processing(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
nr_phy_data_t *phy_data) {
@@ -1169,41 +1203,44 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
}
dci_cnt = dci_cnt + nr_ue_pdcch_procedures(ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, phy_data, n_ss, rxdataF);
}
LOG_D(PHY,"[UE %d] Frame %d, nr_slot_rx %d: found %d DCIs\n", ue->Mod_id, frame_rx, nr_slot_rx, dci_cnt);
phy_pdcch_config->nb_search_space = 0;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDCCH, VCD_FUNCTION_OUT);
}
void pdsch_processing(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
nr_phy_data_t *phy_data) {
int frame_rx = proc->frame_rx;
int nr_slot_rx = proc->nr_slot_rx;
int gNB_id = proc->gNB_id;
NR_UE_DLSCH_t *dlsch = &phy_data->dlsch[0];
if (dci_cnt > 0) {
LOG_D(PHY,"[UE %d] Frame %d, nr_slot_rx %d: found %d DCIs\n", ue->Mod_id, frame_rx, nr_slot_rx, dci_cnt);
if (dlsch->active) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDSCH, VCD_FUNCTION_IN);
uint16_t nb_symb_sch = dlsch[0].dlsch_config.number_symbols;
uint16_t start_symb_sch = dlsch[0].dlsch_config.start_symbol;
LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
//to update from pdsch config
for (uint16_t m=start_symb_sch;m<(nb_symb_sch+start_symb_sch) ; m++){
nr_slot_fep(ue,
proc,
m, //to be updated from higher layer
rxdataF);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDSCH, VCD_FUNCTION_OUT);
}
} else {
LOG_D(PHY,"[UE %d] Frame %d, nr_slot_rx %d: No DCIs found\n", ue->Mod_id, frame_rx, nr_slot_rx);
}
#endif //NR_PDCCH_SCHED
start_meas(&ue->generic_stat);
// do procedures for C-RNTI
int ret_pdsch = 0;
const uint32_t rxdataF_sz = ue->frame_parms.samples_per_slot_wCP;
__attribute__ ((aligned(32))) c16_t rxdataF[ue->frame_parms.nb_antennas_rx][rxdataF_sz];
if (dlsch[0].active) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDSCH, VCD_FUNCTION_IN);
uint16_t nb_symb_sch = dlsch[0].dlsch_config.number_symbols;
uint16_t start_symb_sch = dlsch[0].dlsch_config.start_symbol;
LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
//to update from pdsch config
for (uint16_t m=start_symb_sch;m<(nb_symb_sch+start_symb_sch) ; m++){
nr_slot_fep(ue,
proc,
m, //to be updated from higher layer
rxdataF);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDSCH, VCD_FUNCTION_OUT);
uint8_t nb_re_dmrs;
if (dlsch[0].dlsch_config.dmrsConfigType == NFAPI_NR_DMRS_TYPE1) {
nb_re_dmrs = 6*dlsch[0].dlsch_config.n_dmrs_cdm_groups;
@@ -1243,6 +1280,9 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
if (ret_pdsch >= 0)
nr_ue_dlsch_procedures(ue, proc, dlsch, llr);
else
// don't wait anymore
send_slot_ind(ue->tx_resume_ind_fifo[(proc->nr_slot_rx + dlsch[0].dlsch_config.k1_feedback) % ue->frame_parms.slots_per_frame], proc->nr_slot_rx);
stop_meas(&ue->dlsch_procedures_stat);
if (cpumeas(CPUMEAS_GETSTATE)) {
@@ -1333,7 +1373,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_slot_rx);
UEscopeCopy(ue, commonRxdataF, rxdataF, sizeof(int32_t), ue->frame_parms.nb_antennas_rx, rxdataF_sz);
return (0);
}
openair1/SIMULATION/NR_PHY/dlschsim.c
+10 -2
View File
@@ -542,9 +542,17 @@ int main(int argc, char **argv)
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_DECODING0, VCD_FUNCTION_IN);
int a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS; //number of segments to be allocated
int num_rb = dlsch0_ue->dlsch_config.number_rbs;
if (num_rb != 273) {
a_segments = a_segments*num_rb;
a_segments = (a_segments/273)+1;
}
uint32_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
__attribute__ ((aligned(32))) uint8_t b[dlsch_bytes];
ret = nr_dlsch_decoding(UE, &proc, 0, channel_output_fixed, &UE->frame_parms,
dlsch0_ue, harq_process, frame, nb_symb_sch,
slot,harq_pid);
slot,harq_pid,dlsch_bytes,b);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_DECODING0, VCD_FUNCTION_OUT);
@@ -555,7 +563,7 @@ int main(int argc, char **argv)
errors_bit = 0;
for (i = 0; i < TBS; i++) {
estimated_output_bit[i] = (harq_process->b[i / 8] & (1 << (i & 7))) >> (i & 7);
estimated_output_bit[i] = (b[i / 8] & (1 << (i & 7))) >> (i & 7);
test_input_bit[i] = (test_input[i / 8] & (1 << (i & 7))) >> (i & 7); // Further correct for multiple segments
if (estimated_output_bit[i] != test_input_bit[i]) {
openair1/SIMULATION/NR_PHY/dlsim.c
+15 -4
View File
@@ -940,6 +940,13 @@ int main(int argc, char **argv)
UE->phy_sim_pdsch_rxdataF_comp = calloc(sizeof(int32_t *) * frame_parms->nb_antennas_rx * g_nrOfLayers, rx_size);
UE->phy_sim_pdsch_dl_ch_estimates = calloc(sizeof(int32_t *) * frame_parms->nb_antennas_rx * g_nrOfLayers, rx_size);
UE->phy_sim_pdsch_dl_ch_estimates_ext = calloc(sizeof(int32_t *) * frame_parms->nb_antennas_rx * g_nrOfLayers, rx_size);
int a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS; //number of segments to be allocated
if (g_rbSize != 273) {
a_segments = a_segments*g_rbSize;
a_segments = (a_segments/273)+1;
}
uint32_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
UE->phy_sim_dlsch_b = calloc(1, dlsch_bytes);
for (SNR = snr0; SNR < snr1; SNR += .2) {
@@ -1153,9 +1160,12 @@ int main(int argc, char **argv)
nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
nr_ue_scheduled_response(&scheduled_response);
phy_procedures_nrUE_RX(UE,
&UE_proc,
&phy_data);
pbch_pdcch_processing(UE,
&UE_proc,
&phy_data);
pdsch_processing(UE,
&UE_proc,
&phy_data);
//----------------------------------------------------------
//---------------------- count errors ----------------------
@@ -1198,7 +1208,7 @@ int main(int argc, char **argv)
for (i = 0; i < TBS; i++) {
estimated_output_bit[i] = (UE_harq_process->b[i/8] & (1 << (i & 7))) >> (i & 7);
estimated_output_bit[i] = (UE->phy_sim_dlsch_b[i/8] & (1 << (i & 7))) >> (i & 7);
test_input_bit[i] = (gNB_dlsch->harq_process.b[i / 8] & (1 << (i & 7))) >> (i & 7); // Further correct for multiple segments
if (estimated_output_bit[i] != test_input_bit[i]) {
@@ -1347,6 +1357,7 @@ int main(int argc, char **argv)
free(UE->phy_sim_pdsch_rxdataF_comp);
free(UE->phy_sim_pdsch_dl_ch_estimates);
free(UE->phy_sim_pdsch_dl_ch_estimates_ext);
free(UE->phy_sim_dlsch_b);
if (output_fd)
fclose(output_fd);
openair1/SIMULATION/NR_PHY/pbchsim.c
+2 -1
View File
@@ -96,7 +96,8 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
NR_UE_DLSCH_t *dlsch1,
uint16_t n_pdus,
UE_nr_rxtx_proc_t *proc,
void *typeSpecific ) {}
void *typeSpecific,
uint8_t *b) {}
int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
openair2/LAYER2/NR_MAC_UE/config_ue.c
+16 -1
View File
@@ -701,6 +701,9 @@ int nr_rrc_mac_config_req_ue(module_id_t module_id,
RA_config_t *ra = &mac->ra;
fapi_nr_config_request_t *cfg = &mac->phy_config.config_req;
if (mac->dl_config_request == NULL) // for SIB1 reception
mac->dl_config_request = calloc(NR_MAX_SLOTS_PER_FRAME, sizeof(*mac->dl_config_request));
// TODO do something FAPI-like P5 L1/L2 config interface in config_si, config_mib, etc.
if(mibP != NULL){
@@ -726,9 +729,21 @@ int nr_rrc_mac_config_req_ue(module_id_t module_id,
}
}
LOG_I(NR_MAC, "Initializing ul_config_request. num_slots_ul = %d\n", num_slots_ul);
mac->ul_config_request = (fapi_nr_ul_config_request_t *)calloc(num_slots_ul, sizeof(fapi_nr_ul_config_request_t));
mac->ul_config_request = calloc(num_slots_ul, sizeof(*mac->ul_config_request));
for (int i=0; i<num_slots_ul; i++)
pthread_mutex_init(&(mac->ul_config_request[i].mutex_ul_config), NULL);
int num_slots_dl = nr_slots_per_frame[mac->mib->subCarrierSpacingCommon];
if (cfg->cell_config.frame_duplex_type == TDD) {
num_slots_dl = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots;
if (mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) {
num_slots_dl++;
}
}
LOG_I(NR_MAC, "Initializing dl_config_request. num_slots_dl = %d\n", num_slots_dl);
mac->dl_config_request = realloc(mac->dl_config_request, num_slots_dl*sizeof(*mac->dl_config_request));
memset(mac->dl_config_request, 0, num_slots_dl*sizeof(fapi_nr_dl_config_request_t));
// Setup the SSB to Rach Occasionsif (cell_group_config->spCellConfig) { mapping according to the config
build_ssb_to_ro_map(mac);//->scc, mac->phy_config.config_req.cell_config.frame_duplex_type);
if (!get_softmodem_params()->emulate_l1)
openair2/LAYER2/NR_MAC_UE/mac_defs.h
+2 -2
View File
@@ -441,7 +441,7 @@ typedef struct {
int first_ul_tx[NR_MAX_HARQ_PROCESSES];
//// FAPI-like interface message
fapi_nr_ul_config_request_t *ul_config_request;
fapi_nr_dl_config_request_t dl_config_request;
fapi_nr_dl_config_request_t *dl_config_request;
/// Interface module instances
nr_ue_if_module_t *if_module;
@@ -467,7 +467,7 @@ typedef struct {
NR_PHY_meas_t phy_measurements;
dci_pdu_rel15_t def_dci_pdu_rel15[8];
dci_pdu_rel15_t def_dci_pdu_rel15[NR_MAX_SLOTS_PER_FRAME][8];
// Defined for abstracted mode
nr_downlink_indication_t dl_info;
openair2/LAYER2/NR_MAC_UE/mac_proto.h
+3 -1
View File
@@ -441,9 +441,11 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
uint16_t rnti,
int ss_type,
uint64_t *dci_pdu,
dci_pdu_rel15_t *dci_pdu_rel15);
dci_pdu_rel15_t *dci_pdu_rel15,
int slot);
fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int slot);
fapi_nr_dl_config_request_t *get_dl_config_request(NR_UE_MAC_INST_t *mac, int slot);
void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, int slot_tx, uint8_t pdu_type);
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+1 -1
View File
@@ -172,7 +172,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15->dci_length_options[i] = nr_dci_size(current_DL_BWP,
current_UL_BWP,
mac->cg,
&mac->def_dci_pdu_rel15[dci_format],
&mac->def_dci_pdu_rel15[dl_config->slot][dci_format],
dci_format,
NR_RNTI_TC,
coreset,
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+30 -26
View File
@@ -316,9 +316,6 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
mac->first_sync_frame = frame;
}
mac->dl_config_request.sfn = frame;
mac->dl_config_request.slot = ssb_start_symbol/14;
if(get_softmodem_params()->phy_test)
mac->state = UE_CONNECTED;
else if(mac->state == UE_NOT_SYNC)
@@ -419,15 +416,15 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci) {
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
dci_pdu_rel15_t *def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[dci->dci_format];
dci_pdu_rel15_t *def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[slot][dci->dci_format];
LOG_D(MAC,"Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n",
dci->rnti,dci->dci_format,dci->n_CCE,dci->payloadSize,*(unsigned long long*)dci->payloadBits);
int8_t ret = nr_extract_dci_info(mac, dci->dci_format, dci->payloadSize, dci->rnti, dci->ss_type, (uint64_t *)dci->payloadBits, def_dci_pdu_rel15);
int8_t ret = nr_extract_dci_info(mac, dci->dci_format, dci->payloadSize, dci->rnti, dci->ss_type, (uint64_t *)dci->payloadBits, def_dci_pdu_rel15, slot);
if ((ret&1) == 1) return -1;
else if (ret == 2) {
dci->dci_format = NR_UL_DCI_FORMAT_0_0;
def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[dci->dci_format];
def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[slot][dci->dci_format];
}
int8_t ret_proc = nr_ue_process_dci(module_id, cc_id, gNB_index, frame, slot, def_dci_pdu_rel15, dci);
return ret_proc;
@@ -445,7 +442,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
bool valid_ptrs_setup = 0;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
RA_config_t *ra = &mac->ra;
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
fapi_nr_dl_config_request_t *dl_config = get_dl_config_request(mac, slot);
uint8_t is_Msg3 = 0;
NR_UE_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP;
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
@@ -809,6 +806,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_0->accumulated_delta_PUCCH,
dci->pucch_resource_indicator,
1+dci->pdsch_to_harq_feedback_timing_indicator.val);
dlsch_config_pdu_1_0->k1_feedback = 1+dci->pdsch_to_harq_feedback_timing_indicator.val;
LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type);
@@ -1071,7 +1070,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1->n_front_load_symb);
/* TCI */
if (mac->dl_config_request.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.tci_present_in_dci == 1){
if (dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.coreset.tci_present_in_dci == 1){
// 0 bit if higher layer parameter tci-PresentInDCI is not enabled
// otherwise 3 bits as defined in Subclause 5.1.5 of [6, TS38.214]
dlsch_config_pdu_1_1->tci_state = dci->transmission_configuration_indication.val;
@@ -1106,6 +1105,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type);
dl_config->number_pdus = dl_config->number_pdus + 1;
// send the ack/nack slot number to phy to indicate tx thread to wait for DLSCH decoding
dlsch_config_pdu_1_1->k1_feedback = feedback_ti;
/* TODO same calculation for MCS table as done in UL */
dlsch_config_pdu_1_1->mcs_table = (pdsch_Config->mcs_Table) ? (*pdsch_Config->mcs_Table + 1) : 0;
dlsch_config_pdu_1_1->qamModOrder = nr_get_Qm_dl(dlsch_config_pdu_1_1->mcs, dlsch_config_pdu_1_1->mcs_table);
@@ -1208,14 +1211,12 @@ void set_harq_status(NR_UE_MAC_INST_t *mac,
// FIXME k0 != 0 currently not taken into consideration
current_harq->dl_frame = frame;
current_harq->dl_slot = slot;
if (get_softmodem_params()->emulate_l1) {
int scs = get_softmodem_params()->numerology;
int slots_per_frame = nr_slots_per_frame[scs];
slot += data_toul_fb;
if (slot >= slots_per_frame) {
frame = (frame + 1) % 1024;
slot %= slots_per_frame;
}
int scs = get_softmodem_params()->numerology;
int slots_per_frame = nr_slots_per_frame[scs];
slot += data_toul_fb;
if (slot >= slots_per_frame) {
frame = (frame + 1) % 1024;
slot %= slots_per_frame;
}
LOG_D(NR_PHY,"Setting harq_status for harq_id %d, dl %d.%d, sched ul %d.%d\n",
@@ -1820,10 +1821,14 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
}
number_harq_feedback++;
if (current_harq->ack_received)
if (current_harq->ack_received) {
ack_data[code_word][dai_current - 1] = current_harq->ack;
else
current_harq->active = false;
current_harq->ack_received = false;
} else {
LOG_W(NR_MAC, "DLSCH ACK/NACK reporting initiated for harq pid %d before DLSCH decoding completed\n", dl_harq_pid);
ack_data[code_word][dai_current - 1] = 0;
}
dai[code_word][dai_current - 1] = dai_current;
pucch->resource_indicator = current_harq->pucch_resource_indicator;
@@ -1831,9 +1836,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
pucch->N_CCE = current_harq->N_CCE;
pucch->delta_pucch = current_harq->delta_pucch;
pucch->is_common = current_harq->is_common;
current_harq->active = false;
current_harq->ack_received = false;
LOG_D(PHY,"%4d.%2d Sent %d ack on harq pid %d\n", frame, slot, current_harq->ack, dl_harq_pid);
LOG_D(PHY,"%4d.%2d Sent %d ack on harq pid %d\n", frame, slot, current_harq->ack, dl_harq_pid);
}
}
}
@@ -2398,7 +2401,8 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
uint16_t rnti,
int ss_type,
uint64_t *dci_pdu,
dci_pdu_rel15_t *dci_pdu_rel15)
dci_pdu_rel15_t *dci_pdu_rel15,
int slot)
{
int pos = 0;
@@ -2466,8 +2470,8 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
//switch to DCI_0_0
if (dci_pdu_rel15->format_indicator == 0) {
dci_pdu_rel15 = &mac->def_dci_pdu_rel15[NR_UL_DCI_FORMAT_0_0];
return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15);
dci_pdu_rel15 = &mac->def_dci_pdu_rel15[slot][NR_UL_DCI_FORMAT_0_0];
return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15, slot);
}
#ifdef DEBUG_EXTRACT_DCI
LOG_D(MAC,"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",dci_pdu_rel15->format_indicator,1,N_RB,dci_size-pos,*dci_pdu);
@@ -2657,8 +2661,8 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
//switch to DCI_0_0
if (dci_pdu_rel15->format_indicator == 0) {
dci_pdu_rel15 = &mac->def_dci_pdu_rel15[NR_UL_DCI_FORMAT_0_0];
return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15);
dci_pdu_rel15 = &mac->def_dci_pdu_rel15[slot][NR_UL_DCI_FORMAT_0_0];
return 2+nr_extract_dci_info(mac, NR_UL_DCI_FORMAT_0_0, dci_size, rnti, ss_type, dci_pdu, dci_pdu_rel15, slot);
}
if (dci_pdu_rel15->format_indicator == 0)
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+68 -27
View File
@@ -112,11 +112,8 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl
NR_TDD_UL_DL_ConfigCommon_t *tdd_config = mac->scc==NULL ? mac->scc_SIB->tdd_UL_DL_ConfigurationCommon : mac->scc->tdd_UL_DL_ConfigurationCommon;
//Check if request to access ul_config is for a UL slot
if (is_nr_UL_slot(tdd_config, slot, mac->frame_type) == 0) {
LOG_W(NR_MAC, "Slot %d is not a UL slot. %s called for wrong slot!!!\n", slot, __FUNCTION__);
return NULL;
}
//Check if requested on the right slot
AssertFatal(is_nr_UL_slot(tdd_config, slot, mac->frame_type) != 0, "%s called at wrong slot %d\n", __func__, slot);
// Calculate the index of the UL slot in mac->ul_config_request list. This is
// based on the TDD pattern (slot configuration period) and number of UL+mixed
@@ -127,16 +124,57 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl
const int num_slots_ul = tdd_config ? (tdd_config->pattern1.nrofUplinkSlots + (tdd_config->pattern1.nrofUplinkSymbols != 0)) : n;
int index = slot % num_slots_ul;
LOG_D(NR_MAC, "In %s slots per %s: %d, num_slots_ul %d, index %d\n",
LOG_D(NR_MAC, "In %s slots per %s: %d, num_slots %d, index %d\n",
__FUNCTION__,
tdd_config ? "TDD" : "FDD",
num_slots_per_tdd,
num_slots_ul,
index);
if(!mac->ul_config_request)
if (mac->ul_config_request) return &mac->ul_config_request[index];
else {
LOG_E(NR_MAC, "mac->ul_config_request not set\n");
return NULL;
return &mac->ul_config_request[index];
}
}
/*
* This function returns the DL config corresponding to a given DL slot
* from MAC instance .
*/
fapi_nr_dl_config_request_t *get_dl_config_request(NR_UE_MAC_INST_t *mac, int slot)
{
int index;
if (!mac->scc && !mac->scc_SIB)
index = 0;
else {
NR_TDD_UL_DL_ConfigCommon_t *tdd_config = mac->scc==NULL ? mac->scc_SIB->tdd_UL_DL_ConfigurationCommon : mac->scc->tdd_UL_DL_ConfigurationCommon;
//Check if requested on the right slot
AssertFatal(is_nr_DL_slot(tdd_config, slot) != 0, "%s called at wrong slot %d\n", __func__, slot);
// Calculate the index of the DL slot in mac->ul_config_request list. This is
// based on the TDD pattern (slot configuration period) and number of DL+mixed
// slots in the period. TS 38.213 Sec 11.1
int mu = mac->current_UL_BWP.scs;
const int n = nr_slots_per_frame[mu];
const int num_slots_per_tdd = tdd_config ? (n >> (7 - tdd_config->pattern1.dl_UL_TransmissionPeriodicity)) : n;
const int num_slots_dl = tdd_config ? (tdd_config->pattern1.nrofDownlinkSlots + (tdd_config->pattern1.nrofDownlinkSymbols != 0)) : n;
index = slot % num_slots_dl;
LOG_D(NR_MAC, "In %s slots per %s: %d, num_slots %d, index %d\n",
__FUNCTION__,
tdd_config ? "TDD" : "FDD",
num_slots_per_tdd,
num_slots_dl,
index);
}
if (mac->dl_config_request) return &mac->dl_config_request[index];
else {
LOG_E(NR_MAC, "mac->dl_config_request not set\n");
return NULL;
}
}
void ul_layers_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci, nr_dci_format_t dci_format)
@@ -895,7 +933,9 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info)
slot_t rx_slot = dl_info->slot;
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
fapi_nr_dl_config_request_t *dl_config = get_dl_config_request(mac, rx_slot);
dl_config->sfn = rx_frame;
dl_config->slot = rx_slot;
nr_scheduled_response_t scheduled_response;
nr_dcireq_t dcireq;
@@ -909,11 +949,11 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info)
dcireq.slot = rx_slot;
dcireq.dl_config_req.number_pdus = 0;
nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
mac->dl_config_request = dcireq.dl_config_req;
*dl_config = dcireq.dl_config_req;
nr_schedule_csirs_reception(mac, rx_frame, rx_slot);
nr_schedule_csi_for_im(mac, rx_frame, rx_slot);
dcireq.dl_config_req = mac->dl_config_request;
dcireq.dl_config_req = *dl_config;
fill_scheduled_response(&scheduled_response, &dcireq.dl_config_req, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->phy_data);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) {
@@ -2177,7 +2217,7 @@ void nr_schedule_csi_for_im(NR_UE_MAC_INST_t *mac, int frame, int slot) {
if (csi_measconfig->csi_IM_ResourceToAddModList == NULL)
return;
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
fapi_nr_dl_config_request_t *dl_config = get_dl_config_request(mac, slot);
NR_CSI_IM_Resource_t *imcsi;
int period, offset;
@@ -2231,7 +2271,7 @@ void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot) {
if (csi_measconfig->nzp_CSI_RS_ResourceToAddModList == NULL)
return;
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
fapi_nr_dl_config_request_t *dl_config = get_dl_config_request(mac, slot);
NR_NZP_CSI_RS_Resource_t *nzpcsi;
int period, offset;
NR_UE_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP;
@@ -2553,9 +2593,6 @@ void nr_ue_sib1_scheduler(module_id_t module_idP,
NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP);
nr_scheduled_response_t scheduled_response;
int frame_s,slot_s;
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15;
uint8_t scs_ssb = get_softmodem_params()->numerology;
uint16_t ssb_offset_point_a = (ssb_start_subcarrier - ssb_subcarrier_offset)/12;
@@ -2573,17 +2610,7 @@ void nr_ue_sib1_scheduler(module_id_t module_idP,
1, // If the UE is not configured with a periodicity, the UE assumes a periodicity of a half frame
ssb_offset_point_a);
if(mac->search_space_zero == NULL) mac->search_space_zero=calloc(1,sizeof(*mac->search_space_zero));
if(mac->coreset0 == NULL) mac->coreset0 = calloc(1,sizeof(*mac->coreset0));
fill_coresetZero(mac->coreset0, &mac->type0_PDCCH_CSS_config);
fill_searchSpaceZero(mac->search_space_zero, &mac->type0_PDCCH_CSS_config);
rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
rel15->num_dci_options = 1;
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_SI, -1);
fill_dci_search_candidates(mac->search_space_zero, rel15, -1, -1);
int frame_s,slot_s;
if(mac->type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern == 1){
// same frame as ssb
if ((mac->type0_PDCCH_CSS_config.frame & 0x1) == mac->type0_PDCCH_CSS_config.sfn_c)
@@ -2596,6 +2623,20 @@ void nr_ue_sib1_scheduler(module_id_t module_idP,
frame_s = 0; // same frame as ssb
slot_s = mac->type0_PDCCH_CSS_config.n_c;
}
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request[0]; // Take the first dl_config_request for SIB1
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15;
if(mac->search_space_zero == NULL) mac->search_space_zero=calloc(1,sizeof(*mac->search_space_zero));
if(mac->coreset0 == NULL) mac->coreset0 = calloc(1,sizeof(*mac->coreset0));
fill_coresetZero(mac->coreset0, &mac->type0_PDCCH_CSS_config);
fill_searchSpaceZero(mac->search_space_zero, &mac->type0_PDCCH_CSS_config);
rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
rel15->num_dci_options = 1;
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_SI, -1);
fill_dci_search_candidates(mac->search_space_zero, rel15, -1, -1);
LOG_D(MAC,"Calling fill_scheduled_response, type0_pdcch, num_pdus %d\n",dl_config->number_pdus);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, module_idP, cc_id, frame_s, slot_s, phy_data);
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
+18 -9
View File
@@ -66,6 +66,7 @@ queue_t nr_dl_tti_req_queue;
queue_t nr_tx_req_queue;
queue_t nr_ul_dci_req_queue;
queue_t nr_ul_tti_req_queue;
pthread_mutex_t mac_IF_mutex;
void nrue_init_standalone_socket(int tx_port, int rx_port)
{
@@ -692,7 +693,6 @@ void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request,
slot = dl_tti_request->Slot;
LOG_D(NR_PHY, "[%d, %d] dl_tti_request\n", frame, slot);
copy_dl_tti_req_to_dl_info(&mac->dl_info, dl_tti_request);
free_and_zero(dl_tti_request);
}
/* This checks if the previously recevied DCI matches our current RNTI
value. The assumption is that if the DCI matches our RNTI, then the
@@ -711,14 +711,12 @@ void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request,
else {
LOG_D(NR_MAC, "Unexpected tx_data_req\n");
}
free_and_zero(tx_data_request);
}
else if (ul_dci_request) {
frame = ul_dci_request->SFN;
slot = ul_dci_request->Slot;
LOG_D(NR_PHY, "[%d, %d] ul_dci_request\n", frame, slot);
copy_ul_dci_data_req_to_dl_info(&mac->dl_info, ul_dci_request);
free_and_zero(ul_dci_request);
}
else if (ul_tti_request) {
frame = ul_tti_request->SFN;
@@ -735,7 +733,10 @@ void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request,
NR_UL_TIME_ALIGNMENT_t ul_time_alignment;
memset(&ul_time_alignment, 0, sizeof(ul_time_alignment));
fill_dci_from_dl_config(&mac->dl_info, &mac->dl_config_request);
if (dl_tti_request || tx_data_request || ul_dci_request) {
fapi_nr_dl_config_request_t *dl_config = get_dl_config_request(mac, slot);
fill_dci_from_dl_config(&mac->dl_info, dl_config);
}
nr_ue_dl_scheduler(&mac->dl_info);
nr_ue_dl_indication(&mac->dl_info, &ul_time_alignment);
@@ -1116,6 +1117,9 @@ void update_harq_status(module_id_t module_id, uint8_t harq_pid, uint8_t ack_nac
int nr_ue_ul_indication(nr_uplink_indication_t *ul_info)
{
pthread_mutex_lock(&mac_IF_mutex);
module_id_t module_id = ul_info->module_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
@@ -1125,15 +1129,19 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info)
NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon = mac->scc != NULL ? mac->scc->tdd_UL_DL_ConfigurationCommon : mac->scc_SIB->tdd_UL_DL_ConfigurationCommon;
if (mac->phy_config_request_sent && is_nr_UL_slot(tdd_UL_DL_ConfigurationCommon, ul_info->slot_tx, mac->frame_type))
nr_ue_ul_scheduler(ul_info);
pthread_mutex_unlock(&mac_IF_mutex);
return 0;
}
int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment){
pthread_mutex_lock(&mac_IF_mutex);
uint32_t ret_mask = 0x0;
module_id_t module_id = dl_info->module_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
fapi_nr_dl_config_request_t *dl_config = get_dl_config_request(mac, dl_info->slot);
if ((!dl_info->dci_ind && !dl_info->rx_ind)) {
// UL indication to schedule DCI reception
@@ -1160,7 +1168,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
LOG_D(NR_MAC, "We are filtering a UL_DCI to prevent it from being treated like a DL_DCI\n");
continue;
}
dci_pdu_rel15_t *def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[dci_index->dci_format];
dci_pdu_rel15_t *def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[dl_info->slot][dci_index->dci_format];
g_harq_pid = def_dci_pdu_rel15->harq_pid;
LOG_T(NR_MAC, "Setting harq_pid = %d and dci_index = %d (based on format)\n", g_harq_pid, dci_index->dci_format);
@@ -1222,10 +1230,10 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
break;
}
}
free(dl_info->rx_ind);
dl_info->rx_ind = NULL;
}
}
pthread_mutex_unlock(&mac_IF_mutex);
return 0;
}
@@ -1247,6 +1255,7 @@ nr_ue_if_module_t *nr_ue_if_module_init(uint32_t module_id){
nr_ue_if_module_inst[module_id]->dl_indication = nr_ue_dl_indication;
nr_ue_if_module_inst[module_id]->ul_indication = nr_ue_ul_indication;
}
pthread_mutex_init(&mac_IF_mutex, NULL);
return nr_ue_if_module_inst[module_id];
}
@@ -1263,8 +1272,8 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
fapi_nr_dl_config_request_t *dl_config = &dcireq->dl_config_req;
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
dl_config->sfn = UE_mac->dl_config_request.sfn;
dl_config->slot = UE_mac->dl_config_request.slot;
dl_config->sfn = dcireq->frame;
dl_config->slot = dcireq->slot;
LOG_T(PHY, "Entering UE DCI configuration frame %d slot %d \n", dcireq->frame, dcireq->slot);