fixing bugs in 1_1 dci
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@@ -667,8 +667,10 @@ uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup,
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dci_pdu->rate_matching_indicator.nbits = 1;
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size += dci_pdu->rate_matching_indicator.nbits;
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// ZP CSI-RS trigger
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uint8_t nZP = pdsch_config->aperiodic_ZP_CSI_RS_ResourceSetsToAddModList->list.count;
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dci_pdu->zp_csi_rs_trigger.nbits = (int)ceil(log2(nZP+1));
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if (pdsch_config->aperiodic_ZP_CSI_RS_ResourceSetsToAddModList != NULL) {
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uint8_t nZP = pdsch_config->aperiodic_ZP_CSI_RS_ResourceSetsToAddModList->list.count;
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dci_pdu->zp_csi_rs_trigger.nbits = (int)ceil(log2(nZP+1));
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}
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size += dci_pdu->zp_csi_rs_trigger.nbits;
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// TB1- MCS 5, NDI 1, RV 2
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size += 8;
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@@ -716,11 +718,11 @@ uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup,
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uint8_t maxCW = (maxCWperDCI_rrc == NULL) ? 1 : *maxCWperDCI_rrc;
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dci_pdu->cbgti.nbits = maxCBGperTB * maxCW;
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size += dci_pdu->cbgti.nbits;
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}
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// CBGFI
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if (secondaryCellGroup->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission->choice.setup->codeBlockGroupFlushIndicator) {
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dci_pdu->cbgfi.nbits = 1;
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size += dci_pdu->cbgfi.nbits;
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// CBGFI
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if (secondaryCellGroup->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission->choice.setup->codeBlockGroupFlushIndicator) {
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dci_pdu->cbgfi.nbits = 1;
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size += dci_pdu->cbgfi.nbits;
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}
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}
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// DMRS sequence init
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size += 1;
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@@ -403,7 +403,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
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int dci_formats[2];
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int rnti_types[2];
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dci_formats[0] = NR_DL_DCI_FORMAT_1_0;
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dci_formats[0] = NR_DL_DCI_FORMAT_1_1;
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rnti_types[0] = NR_RNTI_C;
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fill_dci_pdu_rel15(secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,bwp_id);
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