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commiting a patch on behalf of Raymond that fixes the some timing issues in the HARQ process

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git-svn-id: http://svn.eurecom.fr/openair4G/trunk@7800 818b1a75-f10b-46b9-bf7c-635c3b92a50f
This commit is contained in:
knopp
2015-09-04 10:28:52 +00:00
parent 539f8785ef
commit 1ad336faa8
25 changed files with 454 additions and 228 deletions
Download Patch File Download Diff File Expand all files Collapse all files
cmake_targets/CMakeLists.txt
+3
View File
@@ -153,6 +153,9 @@ set(CMAKE_C_FLAGS
set(CMAKE_C_FLAGS
"${CMAKE_C_FLAGS} -DSTDC_HEADERS=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_MEMORY_H=1 -DHAVE_STRINGS_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_UNISTD_H=1 -DHAVE_FCNTL_H=1 -DHAVE_ARPA_INET_H=1 -DHAVE_SYS_TIME_H=1 -DHAVE_SYS_SOCKET_H=1 -DHAVE_STRERROR=1 -DHAVE_SOCKET=1 -DHAVE_MEMSET=1 -DHAVE_GETTIMEOFDAY=1 -DHAVE_STDLIB_H=1 -DHAVE_MALLOC=1 -DHAVE_LIBSCTP"
)
set(CMAKE_CXX_FLAGS
"${CMAKE_CXX_FLAGS} ${C_FLAGS_PROCESSOR}"
)
# set a flag for changes in the source code
# these changes are related to hardcoded path to include .h files
add_definitions(-DCMAKER)
openair1/PHY/LTE_TRANSPORT/dci_tools.c
+14 -3
View File
@@ -861,7 +861,8 @@ uint8_t get_transmission_mode(module_id_t Mod_id, uint8_t CC_id, rnti_t rnti)
return(PHY_vars_eNB_g[Mod_id][CC_id]->transmission_mode[UE_id]);
}
int generate_eNB_dlsch_params_from_dci(uint8_t subframe,
int generate_eNB_dlsch_params_from_dci(int frame,
uint8_t subframe,
void *dci_pdu,
uint16_t rnti,
DCI_format_t dci_format,
@@ -886,7 +887,7 @@ int generate_eNB_dlsch_params_from_dci(uint8_t subframe,
uint8_t rv=0,rv1=0,rv2=0;
uint8_t rah=0;
uint8_t TPC=0;
LTE_DL_eNB_HARQ_t *dlsch0_harq,*dlsch1_harq;
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
// printf("Generate eNB DCI, format %d, rnti %x (pdu %p)\n",dci_format,rnti,dci_pdu);
@@ -2630,6 +2631,16 @@ int generate_eNB_dlsch_params_from_dci(uint8_t subframe,
break;
}
if (dlsch0_harq) {
dlsch0_harq->frame = frame;
dlsch0_harq->subframe = subframe;
}
if (dlsch1_harq) {
dlsch1_harq->frame = frame;
dlsch1_harq->subframe = subframe;
}
#ifdef DEBUG_DCI
if (dlsch0) {
@@ -3963,7 +3974,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0_harq->rb_alloc_even[1] = localRIV2alloc_LUT50_1[rballoc];
dlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT50_0[rballoc];
dlsch0_harq->rb_alloc_odd[1] = localRIV2alloc_LUT50_1[rballoc];
printf("rballoc: %08x.%08x\n",dlsch0_harq->rb_alloc_even[0],dlsch0_harq->rb_alloc_even[1]);
// printf("rballoc: %08x.%08x\n",dlsch0_harq->rb_alloc_even[0],dlsch0_harq->rb_alloc_even[1]);
} else { // DISTRIBUTED
if ((rballoc&(1<<10)) == 0) {
rballoc = rballoc&(~(1<<10));
openair1/PHY/LTE_TRANSPORT/defs.h
+4
View File
@@ -114,6 +114,10 @@ typedef struct {
uint8_t *c[MAX_NUM_DLSCH_SEGMENTS];
/// RTC values for each segment (for definition see 36-212 V8.6 2009-03, p.15)
uint32_t RTC[MAX_NUM_DLSCH_SEGMENTS];
/// Frame where current HARQ round was sent
uint32_t frame;
/// Subframe where current HARQ round was sent
uint32_t subframe;
/// Index of current HARQ round for this DLSCH
uint8_t round;
/// MCS format for this DLSCH
openair1/PHY/LTE_TRANSPORT/dlsch_demodulation.c
+1 -1
View File
@@ -231,7 +231,7 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue,
subframe,
phy_vars_ue->high_speed_flag,
frame_parms);
else
nb_rb = dlsch_extract_rbs_single(lte_ue_common_vars->rxdataF,
lte_ue_common_vars->dl_ch_estimates[eNB_id],
lte_ue_pdsch_vars[eNB_id_i]->rxdataF_ext,
openair1/PHY/LTE_TRANSPORT/proto.h
+2 -1
View File
@@ -1354,7 +1354,8 @@ int generate_ue_dlsch_params_from_dci(int frame,
uint16_t ra_rnti,
uint16_t p_rnti);
int32_t generate_eNB_dlsch_params_from_dci(uint8_t subframe,
int32_t generate_eNB_dlsch_params_from_dci(int frame,
uint8_t subframe,
void *dci_pdu,
rnti_t rnti,
DCI_format_t dci_format,
openair1/PHY/LTE_TRANSPORT/pucch.c
+54 -13
View File
@@ -442,10 +442,11 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
{
static int first_call=1;
LTE_eNB_COMMON *eNB_common_vars = &phy_vars_eNB->lte_eNB_common_vars;
LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_eNB->lte_frame_parms;
// PUCCH_CONFIG_DEDICATED *pucch_config_dedicated = &phy_vars_eNB->pucch_config_dedicated[UE_id];
int8_t sigma2_dB = phy_vars_eNB->PHY_measurements_eNB[0].n0_power_tot_dB;
int8_t sigma2_dB = phy_vars_eNB->PHY_measurements_eNB[0].n0_power_dB[0];
int32_t *Po_PUCCH = &(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH);
int32_t *Po_PUCCH_dBm = &(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH_dBm);
int32_t *Po_PUCCH1_below = &(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH1_below);
@@ -478,6 +479,15 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
uint32_t v0=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1];
uint32_t v1=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)];
if (first_call == 1) {
for (i=0;i<10;i++) {
for (j=0;j<NUMBER_OF_UE_MAX;j++) {
phy_vars_eNB->pucch1_stats_cnt[j][i]=0;
phy_vars_eNB->pucch1ab_stats_cnt[j][i]=0;
}
}
first_call=0;
}
switch (frame_parms->N_RB_UL) {
@@ -496,6 +506,7 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
default:
sigma2_dB -= 14;
}
if ((deltaPUCCH_Shift==0) || (deltaPUCCH_Shift>3)) {
LOG_E(PHY,"[eNB] rx_pucch: Illegal deltaPUCCH_shift %d (should be 1,2,3)\n",deltaPUCCH_Shift);
@@ -516,7 +527,7 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
LOG_D(PHY,"[eNB] PUCCH: cNcs1/deltaPUCCH_Shift %d, Nprime %d, n1_pucch %d\n",thres,Nprime,n1_pucch);
#endif
N_UL_symb = (frame_parms->Ncp==0) ? 7 : 6;
N_UL_symb = (frame_parms->Ncp==NORMAL) ? 7 : 6;
if (n1_pucch < thres)
nprime0=n1_pucch;
@@ -559,6 +570,12 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
S=0; // 1
else
S=1; // j
/*
if (fmt==pucch_format1)
LOG_I(PHY,"[eNB] subframe %d => PUCCH1: u%d %d, v%d %d : ", subframe,ns&1,u,ns&1,v);
else
LOG_I(PHY,"[eNB] subframe %d => PUCCH1a/b: u%d %d, v%d %d : ", subframe,ns&1,u,ns&1,v);
*/
//loop over symbols in slot
for (l=0; l<N_UL_symb; l++) {
@@ -572,6 +589,7 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
}
refs=0;
// Comput W_noc(m) (36.211 p. 19)
@@ -596,11 +614,11 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
if (l<2) { // data
W_re=W4[n_oc][l];
W_im=0;
} else if ((l<N_UL_symb-2)&&(frame_parms->Ncp==0)) { // reference and normal CP
} else if ((l<N_UL_symb-2)&&(frame_parms->Ncp==NORMAL)) { // reference and normal CP
W_re=W3_re[n_oc][l-2];
W_im=W3_im[n_oc][l-2];
refs=1;
} else if ((l<N_UL_symb-2)&&(frame_parms->Ncp==1)) { // reference and extended CP
} else if ((l<N_UL_symb-2)&&(frame_parms->Ncp==EXTENDED)) { // reference and extended CP
W_re=W4[n_oc][l-2];
W_im=0;
refs=1;
@@ -637,6 +655,7 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
LOG_D(PHY,"[eNB] PUCCH subframe %d z(%d,%d) => %d,%d, alpha(%d) => %d,%d\n",subframe,l,n,zptr[n<<1],zptr[(n<<1)+1],
alpha_ind,alpha_re[alpha_ind],alpha_im[alpha_ind]);
#endif
alpha_ind = (alpha_ind + n_cs)%12;
} // n
@@ -751,25 +770,41 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
phase_max = phase;
}
stat_max /= nsymb; // normalize to energy per symbol
#ifdef DEBUG_PUCCH_RX
LOG_D(PHY,"[eNB] PUCCH: stat %d, stat_max %d, phase_max %d\n", stat,stat_max,phase_max);
#endif
} //phase
stat_max /= nsymb; // normalize to energy per symbol
#ifdef DEBUG_PUCCH_RX
LOG_D(PHY,"[eNB] PUCCH fmt0: stat_max : %d, sigma2_dB %d, phase_max : %d\n",dB_fixed(stat_max),sigma2_dB,phase_max);
LOG_D(PHY,"[eNB] PUCCH: stat %d, stat_max %d, phase_max %d\n", stat,stat_max,phase_max);
#endif
#ifdef DEBUG_PUCCH_RX
LOG_D(PHY,"[eNB] PUCCH fmt0: stat_max : %d, sigma2_dB %d (%d, %d), phase_max : %d\n",dB_fixed(stat_max),sigma2_dB,phy_vars_eNB->PHY_measurements_eNB[0].n0_power_tot_dBm,pucch1_thres,phase_max);
#endif
phy_vars_eNB->pucch1_stats[UE_id][(subframe<<10)+phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe]] = stat_max;
phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe] = (phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe]+1)&1023;
/*
if (phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe] == 0) {
write_output("pucch_debug.m","pucch_energy",
&phy_vars_eNB->pucch1_stats[UE_id][(subframe<<10)],
1024,1,2);
AssertFatal(0,"Exiting for PUCCH 1 debug\n");
}
*/
// This is a moving average of the PUCCH1 statistics conditioned on being above or below the threshold
if (sigma2_dB<(dB_fixed(stat_max)-pucch1_thres)) {
*payload = 1;
*Po_PUCCH1_below = ((*Po_PUCCH1_below<<9) + (stat_max<<9)+1024)>>10;
*Po_PUCCH1_above = ((*Po_PUCCH1_above<<9) + (stat_max<<9)+1024)>>10;
}
else {
*payload = 0;
*Po_PUCCH1_above = ((*Po_PUCCH1_above<<9) + (stat_max<<9)+1024)>>10;
*Po_PUCCH1_below = ((*Po_PUCCH1_below<<9) + (stat_max<<9)+1024)>>10;
}
LOG_D(PHY,"[eNB] PUCCH fmt0: stat_max : %d, sigma2_dB %d (I0 %d dBm, thres %d), Po_PUCCH1_below/above : %d / %d\n",dB_fixed(stat_max),sigma2_dB,phy_vars_eNB->PHY_measurements_eNB[0].n0_power_tot_dBm,pucch1_thres,dB_fixed(*Po_PUCCH1_below),dB_fixed(*Po_PUCCH1_above));
*Po_PUCCH_update = 1;
} else if ((fmt == pucch_format1a)||(fmt == pucch_format1b)) {
@@ -854,7 +889,7 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
// Do detection now
stat_re=0;
stat_im=0;
LOG_D(PHY,"PUCCH1A : Po_PUCCH before %d (%d) dB",dB_fixed(*Po_PUCCH),*Po_PUCCH);
LOG_D(PHY,"PUCCH1A : Po_PUCCH before %d dB (%d)\n",dB_fixed(*Po_PUCCH),*Po_PUCCH);
*Po_PUCCH = ((*Po_PUCCH<<9) + (stat_max<<9)+1024)>>10;
*Po_PUCCH_dBm = dB_fixed(*Po_PUCCH) - phy_vars_eNB->rx_total_gain_eNB_dB;
*Po_PUCCH_update = 1;
@@ -973,8 +1008,14 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
} // aa
#ifdef DEBUG_PUCCH_RX
LOG_I(PHY,"stat %d,%d\n",stat_re,stat_im);
LOG_D(PHY,"PUCCH 1a/b: subframe %d : stat %d,%d (pos %d)\n",subframe,stat_re,stat_im,
(subframe<<10) + (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe]));
#endif
((int16_t*)&phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<10) + (phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe])])[0] = stat_re;
((int16_t*)&phy_vars_eNB->pucch1ab_stats[UE_id][(subframe<<10) + (phy_vars_eNB->pucch1_stats_cnt[UE_id][subframe])])[1] = stat_im;
phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe] = (phy_vars_eNB->pucch1ab_stats_cnt[UE_id][subframe]+1)&1023;
*payload = (stat_re<0) ? 1 : 0;
if (fmt==pucch_format1b)
openair1/PHY/TOOLS/lte_phy_scope.c
+28 -2
View File
@@ -77,10 +77,10 @@ FD_lte_phy_scope_enb *create_lte_phy_scope_enb( void )
FD_lte_phy_scope_enb *fdui = fl_malloc( sizeof *fdui );
// Define form
fdui->lte_phy_scope_enb = fl_bgn_form( FL_NO_BOX, 800, 600 );
fdui->lte_phy_scope_enb = fl_bgn_form( FL_NO_BOX, 800, 800 );
// This the whole UI box
obj = fl_add_box( FL_BORDER_BOX, 0, 0, 800, 600, "" );
obj = fl_add_box( FL_BORDER_BOX, 0, 0, 800, 800, "" );
fl_set_object_color( obj, FL_BLACK, FL_BLACK );
// Received signal
@@ -118,6 +118,14 @@ FD_lte_phy_scope_enb *create_lte_phy_scope_enb( void )
fl_set_xyplot_symbolsize( fdui->pusch_comp,2);
fl_set_xyplot_xgrid( fdui->pusch_llr,FL_GRID_MAJOR);
// I/Q PUCCH comp
fdui->pucch_comp = fl_add_xyplot( FL_POINTS_XYPLOT, 540, 540, 240, 200, "PUCCH I/Q of MF Output" );
fl_set_object_boxtype( fdui->pucch_comp, FL_EMBOSSED_BOX );
fl_set_object_color( fdui->pucch_comp, FL_BLACK, FL_YELLOW );
fl_set_object_lcolor( fdui->pucch_comp, FL_WHITE ); // Label color
fl_set_xyplot_symbolsize( fdui->pucch_comp,2);
// fl_set_xyplot_xgrid( fdui->pusch_llr,FL_GRID_MAJOR);
// Throughput on PUSCH
fdui->pusch_tput = fl_add_xyplot( FL_NORMAL_XYPLOT, 20, 480, 500, 100, "PUSCH Throughput [frame]/[kbit/s]" );
fl_set_object_boxtype( fdui->pusch_tput, FL_EMBOSSED_BOX );
@@ -154,9 +162,12 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
int16_t **chest_f;
int16_t *pusch_llr;
int16_t *pusch_comp;
int32_t *pucch1_comp;
int16_t *pucch1ab_comp;
float Re,Im,ymax;
float *llr, *bit;
float I[nsymb_ce*2], Q[nsymb_ce*2];
float I_pucch[10240],Q_pucch[10240];
float rxsig_t_dB[nb_antennas_rx][FRAME_LENGTH_COMPLEX_SAMPLES];
float chest_t_abs[nb_antennas_rx][frame_parms->ofdm_symbol_size];
float *chest_f_abs;
@@ -186,6 +197,8 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
chest_f = (int16_t**) phy_vars_enb->lte_eNB_pusch_vars[UE_id]->drs_ch_estimates[eNB_id];
pusch_llr = (int16_t*) phy_vars_enb->lte_eNB_pusch_vars[UE_id]->llr;
pusch_comp = (int16_t*) phy_vars_enb->lte_eNB_pusch_vars[UE_id]->rxdataF_comp[eNB_id][0];
pucch1_comp = (int32_t*) phy_vars_enb->pucch1_stats[UE_id];
pucch1ab_comp = (int16_t*) phy_vars_enb->pucch1ab_stats[UE_id];
// Received signal in time domain of receive antenna 0
if (rxsig_t != NULL) {
@@ -313,6 +326,19 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
fl_set_xyplot_data(form->pusch_comp,I,Q,ind,"","","");
}
// PUSCH I/Q of MF Output
if (pucch1ab_comp!=NULL) {
for (ind=0; ind<10240; ind++) {
I_pucch[ind] = pucch1ab_comp[2*ind];
Q_pucch[ind] = pucch1ab_comp[2*ind+1];
ind++;
}
fl_set_xyplot_data(form->pucch_comp,I_pucch,Q_pucch,ind,"","","");
fl_set_xyplot_xbounds(form->pucch_comp,-200,200);
fl_set_xyplot_ybounds(form->pucch_comp,-200,200);
}
// PUSCH Throughput
memmove( tput_time_enb[UE_id], &tput_time_enb[UE_id][1], (TPUT_WINDOW_LENGTH-1)*sizeof(float) );
memmove( tput_enb[UE_id], &tput_enb[UE_id][1], (TPUT_WINDOW_LENGTH-1)*sizeof(float) );
openair1/PHY/TOOLS/lte_phy_scope.h
+1
View File
@@ -46,6 +46,7 @@ typedef struct {
FL_OBJECT * chest_f;
FL_OBJECT * chest_t;
FL_OBJECT * pusch_comp;
FL_OBJECT * pucch_comp;
FL_OBJECT * pusch_llr;
FL_OBJECT * pusch_tput;
FL_OBJECT * button_0;
openair1/PHY/defs.h
+13
View File
@@ -65,7 +65,11 @@
//use msg in the real-time thread context
#define msg_nrt printf
//use msg_nrt in the non real-time context (for initialization, ...)
#ifdef __AVX2__
#define malloc16(x) memalign(32,x)
#else
#define malloc16(x) memalign(16,x)
#endif
#define free16(y,x) free(y)
#define bigmalloc malloc
#define bigmalloc16 malloc16
@@ -76,7 +80,11 @@
//! If no more memory is available, this function will terminate the program with an assertion error.
static inline void* malloc16_clear( size_t size )
{
#ifdef __AVX2__
void* ptr = memalign(32, size);
#else
void* ptr = memalign(16, size);
#endif
DevAssert(ptr);
memset( ptr, 0, size );
return ptr;
@@ -368,6 +376,11 @@ typedef struct PHY_VARS_eNB_s {
time_stats_t localization_stats;
#endif
int32_t pucch1_stats_cnt[NUMBER_OF_UE_MAX][10];
int32_t pucch1_stats[NUMBER_OF_UE_MAX][10*1024];
int32_t pucch1ab_stats_cnt[NUMBER_OF_UE_MAX][10];
int32_t pucch1ab_stats[NUMBER_OF_UE_MAX][10*1024];
#if ENABLE_RAL
hash_table_t *ral_thresholds_timed;
SLIST_HEAD(ral_thresholds_gen_poll_enb_s, ral_threshold_phy_t) ral_thresholds_gen_polled[RAL_LINK_PARAM_GEN_MAX];
openair1/PHY/impl_defs_top.h
+2 -2
View File
@@ -249,9 +249,9 @@
#define AMP_OVER_2 (AMP>>1)
/// Threshold for PUCCH Format 1 detection
#define PUCCH1_THRES 3
#define PUCCH1_THRES 10
/// Threshold for PUCCH Format 1a/1b detection
#define PUCCH1a_THRES 2
#define PUCCH1a_THRES 4
#ifndef OPENAIR_LTE
///
openair1/SCHED/phy_procedures_lte_eNb.c
+59 -44
View File
@@ -227,12 +227,11 @@ int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16
LTE_eNB_DLSCH_t *DLSCH_ptr;
LTE_eNB_ULSCH_t *ULSCH_ptr;
// uint8_t subframe_m4;
uint8_t ulsch_subframe,ulsch_frame;
uint8_t i;
int8_t UE_id = find_ue(rnti,PHY_vars_eNB_g[Mod_id][CC_id]);
// int frame = PHY_vars_eNB_g[Mod_id][CC_id]->proc[sched_subframe].frame_tx;
// int subframe = PHY_vars_eNB_g[Mod_id][CC_id]->proc[sched_subframe].subframe_tx;
int sf1=(10*frame)+subframe,sf2,sfdiff,sfdiff_max=7;
int first_proc_found=0;
if (UE_id==-1) {
LOG_D(PHY,"Cannot find UE with rnti %x (Mod_id %d, CC_id %d)\n",rnti, Mod_id, CC_id);
@@ -242,42 +241,45 @@ int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16
if (ul_flag == 0) {// this is a DL request
DLSCH_ptr = PHY_vars_eNB_g[Mod_id][CC_id]->dlsch_eNB[(uint32_t)UE_id][0];
/*
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[eNB %d] get_ue_active_harq_pid: Frame %d subframe %d, current harq_id %d\n",
Mod_id,frame,subframe,DLSCH_ptr->harq_ids[subframe]);
#endif
*/
// switch on TDD or FDD configuration here later
*harq_pid = DLSCH_ptr->harq_ids[subframe];
if ((*harq_pid<DLSCH_ptr->Mdlharq) &&
((DLSCH_ptr->harq_processes[*harq_pid]->round > 0))) {
// set to no available process first
*harq_pid = -1;
*round = DLSCH_ptr->harq_processes[*harq_pid]->round;
LOG_D(PHY,"round %d\n",*round);
for (i=0; i<DLSCH_ptr->Mdlharq; i++) {
if (DLSCH_ptr->harq_processes[i]!=NULL) {
if (DLSCH_ptr->harq_processes[i]->status != ACTIVE) {
// store first inactive process
if (first_proc_found == 0) {
first_proc_found = 1;
*harq_pid = i;
*round = 0;
LOG_D(PHY,"process %d is first free process\n",i);
}
else {
LOG_D(PHY,"process %d is free\n",i);
}
} else {
sf2 = (DLSCH_ptr->harq_processes[i]->frame*10) + DLSCH_ptr->harq_processes[i]->subframe;
if (sf2<=sf1)
sfdiff = sf1-sf2;
else // this happens when wrapping around 1024 frame barrier
sfdiff = 10240 + sf1-sf2;
LOG_D(PHY,"process %d is active, round %d (waiting %d)\n",i,DLSCH_ptr->harq_processes[i]->round,sfdiff);
// else if ((subframe_m4==5) || (subframe_m4==6)) {
// *harq_pid = 0;//DLSCH_ptr->harq_ids[subframe_m4];//Ankit
// *round = DLSCH_ptr->harq_processes[*harq_pid]->round;
// }
} else {
// get first free harq_pid (i.e. round 0)
for (i=0; i<DLSCH_ptr->Mdlharq; i++) {
if (DLSCH_ptr->harq_processes[i]!=NULL) {
if (DLSCH_ptr->harq_processes[i]->status != ACTIVE) {
*harq_pid = i;//0;//i; //(Ankit)
*round = 0;
return(0);
} else {
LOG_D(PHY,"process %d is active\n",i);
}
} else {
LOG_E(PHY,"[eNB %d] DLSCH process %d for rnti %x (UE_id %d) not allocated\n",Mod_id,i,rnti,UE_id);
return(-1);
}
if (sfdiff>sfdiff_max) { // this is an active process that is waiting longer than the others (and longer than 7 ms)
sfdiff_max = sfdiff;
*harq_pid = i;
*round = DLSCH_ptr->harq_processes[i]->round;
first_proc_found = 1;
}
}
} else { // a process is not defined
LOG_E(PHY,"[eNB %d] DLSCH process %d for rnti %x (UE_id %d) not allocated\n",Mod_id,i,rnti,UE_id);
return(-1);
}
}
LOG_D(PHY,"get_ue_active_harq_pid DL => Frame %d, Subframe %d : harq_pid %d\n",
frame,subframe,*harq_pid);
} else { // This is a UL request
ULSCH_ptr = PHY_vars_eNB_g[Mod_id][CC_id]->ulsch_eNB[(uint32_t)UE_id];
@@ -1388,7 +1390,7 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
#ifdef Rel10
MCH_PDU *mch_pduP;
MCH_PDU mch_pdu;
uint8_t sync_area=255;
// uint8_t sync_area=255;
#endif
#if defined(SMBV) && !defined(EXMIMO)
// counts number of allocations in subframe
@@ -1848,7 +1850,8 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[eNB %"PRIu8"] SI generate_eNB_dlsch_params_from_dci\n", phy_vars_eNB->Mod_id);
#endif
generate_eNB_dlsch_params_from_dci(subframe,
generate_eNB_dlsch_params_from_dci(frame,
subframe,
&DCI_pdu->dci_alloc[i].dci_pdu[0],
DCI_pdu->dci_alloc[i].rnti,
DCI_pdu->dci_alloc[i].format,
@@ -1888,7 +1891,8 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[eNB %"PRIu8"] RA generate_eNB_dlsch_params_from_dci\n", phy_vars_eNB->Mod_id);
#endif
generate_eNB_dlsch_params_from_dci(subframe,
generate_eNB_dlsch_params_from_dci(frame,
subframe,
&DCI_pdu->dci_alloc[i].dci_pdu[0],
DCI_pdu->dci_alloc[i].rnti,
DCI_pdu->dci_alloc[i].format,
@@ -1949,7 +1953,8 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
}
#endif
generate_eNB_dlsch_params_from_dci(subframe,
generate_eNB_dlsch_params_from_dci(frame,
subframe,
&DCI_pdu->dci_alloc[i].dci_pdu[0],
DCI_pdu->dci_alloc[i].rnti,
DCI_pdu->dci_alloc[i].format,
@@ -2673,13 +2678,20 @@ void process_HARQ_feedback(uint8_t UE_id,
dl_harq_pid[0] = dlsch->harq_ids[subframe_m4];
M=1;
if (pusch_flag == 1)
if (pusch_flag == 1) {
dlsch_ACK[0] = phy_vars_eNB->ulsch_eNB[(uint8_t)UE_id]->harq_processes[harq_pid]->o_ACK[0];
else
if (dlsch->subframe_tx[subframe_m4]==1)
LOG_D(PHY,"[eNB %d] Frame %d: Received ACK/NAK %d on PUSCH for subframe %d\n",phy_vars_eNB->Mod_id,
frame,dlsch_ACK[0],subframe_m4);
}
else {
dlsch_ACK[0] = pucch_payload[0];
LOG_I(PHY,"[eNB %d] Frame %d: Received ACK/NAK %d on PUCCH for subframe %d\n",phy_vars_eNB->Mod_id,
frame,dlsch_ACK[0],subframe_m4);
if (dlsch_ACK[0]==0)
AssertFatal(0,"Exiting on NAK on PUCCH\n");
}
LOG_D(PHY,"[eNB %d] Frame %d: Received ACK/NAK %d for subframe %d\n",phy_vars_eNB->Mod_id,
frame,dlsch_ACK[0],subframe_m4);
#if defined(MESSAGE_CHART_GENERATOR_PHY)
MSC_LOG_RX_MESSAGE(
@@ -3191,7 +3203,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
{
//RX processing
UNUSED(r_type);
uint32_t l, ret=0,i,j,k,aa;
uint32_t l, ret=0,i,j,k;
uint32_t sect_id=0;
uint32_t harq_pid, harq_idx, round;
uint8_t SR_payload = 0,*pucch_payload=NULL,pucch_payload0[2]= {0,0},pucch_payload1[2]= {0,0};
@@ -3220,12 +3232,13 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
LOG_D(PHY,"[eNB %d] Frame %d: Doing phy_procedures_eNB_RX(%d)\n",phy_vars_eNB->Mod_id,frame, subframe);
#endif
/*
#ifdef OAI_USRP
for (aa=0;aa<phy_vars_eNB->lte_frame_parms.nb_antennas_rx;aa++)
rescale(&phy_vars_eNB->lte_eNB_common_vars.rxdata[0][aa][subframe*phy_vars_eNB->lte_frame_parms.samples_per_tti],
phy_vars_eNB->lte_frame_parms.samples_per_tti);
#endif
*/
if (abstraction_flag == 0) {
remove_7_5_kHz(phy_vars_eNB,subframe<<1);
remove_7_5_kHz(phy_vars_eNB,(subframe<<1)+1);
@@ -3950,6 +3963,8 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
// if SR was detected, use the n1_pucch from SR, else use n1_pucch0
n1_pucch0 = (SR_payload==1) ? phy_vars_eNB->scheduling_request_config[i].sr_PUCCH_ResourceIndex:n1_pucch0;
LOG_D(PHY,"Demodulating PUCCH for ACK/NAK: n1_pucch0 %d (%d), SR_payload %d\n",n1_pucch0,phy_vars_eNB->scheduling_request_config[i].sr_PUCCH_ResourceIndex,SR_payload);
if (abstraction_flag == 0)
metric0 = rx_pucch(phy_vars_eNB,
pucch_format1a,
openair1/SCHED/phy_procedures_lte_ue.c
+3 -5
View File
@@ -676,9 +676,6 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
int frame_tx = phy_vars_ue->frame_tx;
int Mod_id = phy_vars_ue->Mod_id;
int CC_id = phy_vars_ue->CC_id;
#ifndef OPENAIR2
int i;
#endif
int tx_amp;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN);
@@ -798,6 +795,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[slot_tx],
phy_vars_ue->ulsch_ue[eNB_id]->o_ACK[0],phy_vars_ue->ulsch_ue[eNB_id]->o_ACK[1],
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->O_ACK);
#endif
if (ack_status > 0) {
LOG_D(PHY,"[UE %d][PDSCH %x] Frame %d subframe %d Generating ACK (%d,%d) for %d bits on PUSCH\n",
@@ -808,7 +806,8 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->O_ACK);
}
#endif
//#ifdef DEBUG_PHY_PROC
@@ -2411,7 +2410,6 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
int eNB_id_i = 1;
uint8_t dual_stream_UE = 0;
#endif
int i;
#ifndef OPENAIR2
uint8_t *rar;
#endif
openair2/LAYER2/MAC/defs.h
+7
View File
@@ -729,6 +729,13 @@ typedef struct {
uint16_t priority[MAX_NUM_LCID];
// resource scheduling information
uint8_t harq_pid[MAX_NUM_CCs];
uint8_t round[MAX_NUM_CCs];
uint8_t dl_pow_off[MAX_NUM_CCs];
uint16_t pre_nb_available_rbs[MAX_NUM_CCs];
unsigned char rballoc_sub_UE[MAX_NUM_CCs][N_RBG_MAX];
} UE_sched_ctrl;
/*! \brief eNB template for the Random access information */
typedef struct {
openair2/LAYER2/MAC/eNB_scheduler.c
+6 -6
View File
@@ -314,8 +314,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
break;
}
} else { //FDD
//schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
//fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
schedule_ue_spec(module_idP,frameP,subframeP,nprb,nCCE,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
schedule_ulsch(module_idP,frameP,cooperation_flag,3,7,nCCE);
}
@@ -350,9 +350,9 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
}
} else {
if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD
schedule_RA(module_idP,frameP, subframeP, 0, nprb, nCCE);
// schedule_RA(module_idP,frameP, subframeP, 0, nprb, nCCE);
// schedule_ulsch(module_idP, frameP, cooperation_flag, 4, 8, nCCE);
//schedule_ue_spec(module_idP, frameP, subframeP, nprb, nCCE, mbsfn_status);
schedule_ue_spec(module_idP, frameP, subframeP, nprb, nCCE, mbsfn_status);
fill_DLSCH_dci(module_idP, frameP, subframeP, RBalloc, 1, mbsfn_status);
}
@@ -369,9 +369,9 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
//schedule_RA(module_idP,frameP,subframeP,5,nprb,nCCE);
if (mac_xface->lte_frame_parms->frame_type == FDD) {
// schedule_RA(module_idP,frameP,subframeP,1,nprb,nCCE);
schedule_RA(module_idP,frameP,subframeP,1,nprb,nCCE);
// schedule_ulsch(module_idP,frameP,cooperation_flag,5,9,nCCE);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,0,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,1,mbsfn_status);
} else if ((mac_xface->lte_frame_parms->tdd_config == 0) || // TDD Config 0
(mac_xface->lte_frame_parms->tdd_config == 6)) { // TDD Config 6
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+31 -31
View File
@@ -445,9 +445,9 @@ schedule_ue_spec(
void *DLSCH_dci = NULL;
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
uint16_t sdu_length_total = 0;
uint8_t dl_pow_off[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX];
uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
// uint8_t dl_pow_off[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
// unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX];
// uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
int mcs;
uint16_t min_rb_unit[MAX_NUM_CCs];
short ta_update = 0;
@@ -458,7 +458,7 @@ schedule_ue_spec(
int32_t normalized_rx_power, target_rx_power;
int32_t tpc=1;
static int32_t tpc_accumulated=0;
UE_sched_ctrl *ue_sched_ctl;
if (UE_list->head==-1) {
return;
@@ -493,10 +493,7 @@ schedule_ue_spec(
dlsch_scheduler_pre_processor(module_idP,
frameP,
subframeP,
dl_pow_off,
pre_nb_available_rbs,
N_RBG,
rballoc_sub_UE,
mbsfn_flag);
stop_meas(&eNB->schedule_dlsch_preprocessor);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR,VCD_FUNCTION_OUT);
@@ -512,6 +509,7 @@ schedule_ue_spec(
continue_flag=0; // reset the flag to allow allocation for the remaining UEs
rnti = UE_RNTI(module_idP,UE_id);
eNB_UE_stats = mac_xface->get_eNB_UE_stats(module_idP,CC_id,rnti);
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
if (rnti==NOT_A_RNTI) {
LOG_D(MAC,"Cannot find rnti for UE_id %d (num_UEs %d)\n",UE_id,UE_list->num_UEs);
@@ -525,9 +523,9 @@ schedule_ue_spec(
continue_flag=1;
}
if ((pre_nb_available_rbs[CC_id][UE_id] == 0) || (nCCE[CC_id] < (1<<aggregation))) {
if ((ue_sched_ctl->pre_nb_available_rbs[CC_id] == 0) || (nCCE[CC_id] < (1<<aggregation))) {
LOG_D(MAC,"[eNB %d] Frame %d : no RB allocated for UE %d on CC_id %d: continue \n",
module_idP, frameP, UE_id, CC_id, nb_rb_used0[CC_id], pre_nb_available_rbs[CC_id][UE_id], nCCE[CC_id], aggregation);
module_idP, frameP, UE_id, CC_id, nb_rb_used0[CC_id], ue_sched_ctl->pre_nb_available_rbs[CC_id], nCCE[CC_id], aggregation);
//if(mac_xface->get_transmission_mode(module_idP,rnti)==5)
continue_flag=1; //to next user (there might be rbs availiable for other UEs in TM5
// else
@@ -554,11 +552,12 @@ schedule_ue_spec(
continue;
}
nb_available_rb = pre_nb_available_rbs[CC_id][UE_id];
nb_available_rb = ue_sched_ctl->pre_nb_available_rbs[CC_id];
harq_pid = ue_sched_ctl->harq_pid[CC_id];
round = ue_sched_ctl->round[CC_id];
UE_list->eNB_UE_stats[CC_id][UE_id].crnti= rnti;
UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status=mac_eNB_get_rrc_status(module_idP,rnti);
mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
UE_list->eNB_UE_stats[CC_id][UE_id].harq_pid = harq_pid;
UE_list->eNB_UE_stats[CC_id][UE_id].harq_pid = harq_pid;
UE_list->eNB_UE_stats[CC_id][UE_id].harq_round = round;
sdu_length_total=0;
@@ -615,17 +614,17 @@ schedule_ue_spec(
if (nb_rb <= nb_available_rb) {
if(nb_rb == pre_nb_available_rbs[CC_id][UE_id]) {
if(nb_rb == ue_sched_ctl->pre_nb_available_rbs[CC_id]) {
for(j=0; j<frame_parms[CC_id]->N_RBG; j++) { // for indicating the rballoc for each sub-band
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = rballoc_sub_UE[CC_id][UE_id][j];
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = ue_sched_ctl->rballoc_sub_UE[CC_id][j];
}
} else {
nb_rb_temp = nb_rb;
j = 0;
while((nb_rb_temp > 0) && (j<frame_parms[CC_id]->N_RBG)) {
if(rballoc_sub_UE[CC_id][UE_id][j] == 1) {
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = rballoc_sub_UE[CC_id][UE_id][j];
if(ue_sched_ctl->rballoc_sub_UE[CC_id][j] == 1) {
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = ue_sched_ctl->rballoc_sub_UE[CC_id][j];
if((j == frame_parms[CC_id]->N_RBG-1) &&
((frame_parms[CC_id]->N_RB_DL == 25)||
@@ -647,7 +646,7 @@ schedule_ue_spec(
PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = nb_rb;
PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].dl_pow_off = dl_pow_off[CC_id][UE_id];
PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].dl_pow_off = ue_sched_ctl->dl_pow_off[CC_id];
for(j=0; j<frame_parms[CC_id]->N_RBG; j++) {
PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].rballoc_sub[j] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j];
@@ -763,11 +762,11 @@ schedule_ue_spec(
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->rv = round&3;
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
if(dl_pow_off[CC_id][UE_id] == 2) {
dl_pow_off[CC_id][UE_id] = 1;
if(ue_sched_ctl->dl_pow_off[CC_id] == 2) {
ue_sched_ctl->dl_pow_off[CC_id] = 1;
}
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dl_power_off = dl_pow_off[CC_id][UE_id];
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dl_power_off = ue_sched_ctl->dl_pow_off[CC_id];
// }
break;
@@ -1006,17 +1005,17 @@ schedule_ue_spec(
TBS = mac_xface->get_TBS_DL(eNB_UE_stats->dlsch_mcs1,nb_rb);
}
if(nb_rb == pre_nb_available_rbs[CC_id][UE_id]) {
if(nb_rb == ue_sched_ctl->pre_nb_available_rbs[CC_id]) {
for(j=0; j<frame_parms[CC_id]->N_RBG; j++) { // for indicating the rballoc for each sub-band
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = rballoc_sub_UE[CC_id][UE_id][j];
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = ue_sched_ctl->rballoc_sub_UE[CC_id][j];
}
} else {
nb_rb_temp = nb_rb;
j = 0;
while((nb_rb_temp > 0) && (j<frame_parms[CC_id]->N_RBG)) {
if(rballoc_sub_UE[CC_id][UE_id][j] == 1) {
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = rballoc_sub_UE[CC_id][UE_id][j];
if(ue_sched_ctl->rballoc_sub_UE[CC_id][j] == 1) {
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = ue_sched_ctl->rballoc_sub_UE[CC_id][j];
if ((j == frame_parms[CC_id]->N_RBG-1) &&
((frame_parms[CC_id]->N_RB_DL == 25)||
@@ -1032,7 +1031,7 @@ schedule_ue_spec(
}
PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = nb_rb;
PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].dl_pow_off = dl_pow_off[CC_id][UE_id];
PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].dl_pow_off = ue_sched_ctl->dl_pow_off[CC_id];
for(j=0; j<frame_parms[CC_id]->N_RBG; j++) {
PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].rballoc_sub[j] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j];
@@ -1046,8 +1045,8 @@ schedule_ue_spec(
}
// if we have decreased too much or we don't have enough RBs, increase MCS
while ((TBS < (sdu_length_total + header_len_dcch + header_len_dtch + ta_len)) && ((( dl_pow_off[CC_id][UE_id]>0) && (mcs<28))
|| ( (dl_pow_off[CC_id][UE_id]==0) && (mcs<=15)))) {
while ((TBS < (sdu_length_total + header_len_dcch + header_len_dtch + ta_len)) && ((( ue_sched_ctl->dl_pow_off[CC_id]>0) && (mcs<28))
|| ( (ue_sched_ctl->dl_pow_off[CC_id]==0) && (mcs<=15)))) {
mcs++;
TBS = mac_xface->get_TBS_DL(mcs,nb_rb);
}
@@ -1462,11 +1461,11 @@ schedule_ue_spec(
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->TPC = tpc;
if(dl_pow_off[CC_id][UE_id] == 2) {
dl_pow_off[CC_id][UE_id] = 1;
if(ue_sched_ctl->dl_pow_off[CC_id] == 2) {
ue_sched_ctl->dl_pow_off[CC_id] = 1;
}
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dl_power_off = dl_pow_off[CC_id][UE_id];
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dl_power_off = ue_sched_ctl->dl_pow_off[CC_id];
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->tpmi = 5;
break;
@@ -2152,7 +2151,8 @@ fill_DLSCH_dci(
// clear scheduling flag
eNB_dlsch_info[module_idP][CC_id][UE_id].status = S_DL_WAITING;
rnti = UE_RNTI(module_idP,UE_id);
mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
// mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
harq_pid = UE_list->UE_sched_ctrl[UE_id].harq_pid[CC_id];
nb_rb = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
DLSCH_dci = (void *)UE_list->UE_template[CC_id][UE_id].DLSCH_DCI[harq_pid];
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+17 -10
View File
@@ -126,30 +126,37 @@ void rx_sdu(
break;
case CRNTI:
LOG_W(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d : Received CRNTI %2.2x%2.2x\n",
enb_mod_idP, CC_idP, rx_ces[i], payload_ptr[0], payload_ptr[1]);
LOG_D(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d (ce %d/%d): Received CRNTI %2.2x%2.2x\n",
enb_mod_idP, CC_idP, rx_ces[i], i,num_ce, payload_ptr[0], payload_ptr[1]);
UE_id = find_UE_id(enb_mod_idP,(((uint16_t)payload_ptr[0])<<8) + payload_ptr[1]);
LOG_I(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d : CRNTI %x (UE_id %d) in Msg3\n",enb_mod_idP, CC_idP, rx_ces[i], (((uint16_t)payload_ptr[0])<<8) + payload_ptr[1],UE_id);
payload_ptr+=2;
/* FIXME we don't process this CE yet */
/* we don't process this CE yet */
if (msg3_flagP != NULL) {
LOG_W(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d : CRNTI in Msg3 not handled\n");
*msg3_flagP = 0;
*msg3_flagP = 0;
}
break;
case TRUNCATED_BSR:
case SHORT_BSR: {
uint8_t lcgid;
lcgid = (payload_ptr[0] >> 6);
LOG_D(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d : Received short BSR LCGID = %u bsr = %d\n",
enb_mod_idP, CC_idP, rx_ces[i], lcgid, payload_ptr[0] & 0x3f);
if (UE_id != -1) {
uint8_t lcgid;
lcgid = (payload_ptr[0] >> 6);
LOG_D(MAC, "[eNB %d] CC_id %d MAC CE_LCID %d : Received short BSR LCGID = %u bsr = %d\n",
enb_mod_idP, CC_idP, rx_ces[i], lcgid, payload_ptr[0] & 0x3f);
UE_list->UE_template[CC_idP][UE_id].bsr_info[lcgid] = (payload_ptr[0] & 0x3f);
if (UE_list->UE_template[CC_idP][UE_id].ul_buffer_creation_time[lcgid] == 0 ) {
UE_list->UE_template[CC_idP][UE_id].ul_buffer_creation_time[lcgid]=frameP;
}
}
else {
}
payload_ptr += 1;//sizeof(SHORT_BSR); // fixme
}
break;
@@ -743,7 +750,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
LOG_T(MAC,"[eNB %d] Frame %d, subframeP %d, UE %d CC %d : got harq pid %d round %d (nCCE %d, rnti %x,mode %s)\n",
module_idP,frameP,subframeP,UE_id,CC_id, harq_pid, round,nCCE[CC_id],rnti,mode_string[eNB_UE_stats->mode]);
#undef EXMIMO_IOT
#ifndef EXMIMO_IOT
openair2/LAYER2/MAC/pre_processor.c
+100 -71
View File
@@ -157,7 +157,7 @@ void assign_rbs_required (module_id_t Mod_id,
LTE_eNB_UE_stats *eNB_UE_stats[MAX_NUM_CCs];
int UE_id,n,i,j,CC_id,pCCid,tmp;
UE_list_t *UE_list = &eNB_mac_inst[Mod_id].UE_list;
UE_TEMPLATE *UE_template;
// UE_TEMPLATE *UE_template;
LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
// clear rb allocations across all CC_ids
@@ -250,12 +250,14 @@ void assign_rbs_required (module_id_t Mod_id,
int maxround(module_id_t Mod_id,uint16_t rnti,int frame,sub_frame_t subframe,uint8_t ul_flag )
{
uint8_t round,round_max=0,harq_pid;
uint8_t round,round_max=0,UE_id;
int CC_id;
UE_list_t *UE_list = &eNB_mac_inst[Mod_id].UE_list;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti,frame,subframe,&harq_pid,&round,ul_flag);
UE_id = find_UE_id(Mod_id,rnti);
round = UE_list->UE_sched_ctrl[UE_id].round[CC_id];
if (round > round_max) {
round_max = round;
}
@@ -303,7 +305,7 @@ void sort_UEs (module_id_t Mod_idP,
int UE_id1,UE_id2;
int pCC_id1,pCC_id2;
int cqi1,cqi2,round1,round2;
int i=0,ii=0,j=0;
int i=0,ii=0;//,j=0;
rnti_t rnti1,rnti2;
UE_list_t *UE_list = &eNB_mac_inst[Mod_idP].UE_list;
@@ -362,32 +364,39 @@ void sort_UEs (module_id_t Mod_idP,
void dlsch_scheduler_pre_processor (module_id_t Mod_id,
frame_t frameP,
sub_frame_t subframeP,
uint8_t dl_pow_off[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
int N_RBG[MAX_NUM_CCs],
unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX],
int *mbsfn_flag)
{
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],harq_pid=0,harq_pid1=0,harq_pid2=0,round=0,round1=0,round2=0,total_ue_count;
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],harq_pid=0,round=0,total_ue_count;
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX];
int UE_id, UE_id2, i;
int UE_id, i;
uint16_t ii,j;
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
uint16_t nb_rbs_required_remaining_1[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
uint16_t i1,i2,i3,r1=0;
uint16_t average_rbs_per_user[MAX_NUM_CCs] = {0};
rnti_t rnti,rnti1,rnti2;
LTE_eNB_UE_stats *eNB_UE_stats1 = NULL;
LTE_eNB_UE_stats *eNB_UE_stats2 = NULL;
rnti_t rnti;
int min_rb_unit[MAX_NUM_CCs];
uint16_t r1=0;
uint8_t CC_id;
UE_list_t *UE_list = &eNB_mac_inst[Mod_id].UE_list;
LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs] = {0};
int rrc_status = RRC_IDLE;
int transmission_mode = 0;
UE_sched_ctrl *ue_sched_ctl;
// int rrc_status = RRC_IDLE;
#ifdef TM5
int harq_pid1=0,harq_pid2=0;
int round1=0,round2=0;
int UE_id2;
uint16_t i1,i2,i3;
rnti_t rnti1,rnti2;
LTE_eNB_UE_stats *eNB_UE_stats1 = NULL;
LTE_eNB_UE_stats *eNB_UE_stats2 = NULL;
UE_sched_ctrl *ue_sched_ctl1,*ue_sched_ctl2;
#endif
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
@@ -402,16 +411,17 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
for (i=UE_list->head; i>=0; i=UE_list->next[i]) {
UE_id = i;
// Initialize scheduling information for all active UEs
dlsch_scheduler_pre_processor_reset(
dlsch_scheduler_pre_processor_reset(Mod_id,
UE_id,
CC_id,
frameP,
subframeP,
N_RBG[CC_id],
dl_pow_off,
nb_rbs_required,
pre_nb_available_rbs,
nb_rbs_required_remaining,
rballoc_sub_UE,
rballoc_sub,
MIMO_mode_indicator);
@@ -419,7 +429,6 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
}
// Store the DLSCH buffer for each logical channel
store_dlsch_buffer (Mod_id,frameP,subframeP);
@@ -446,14 +455,21 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
UE_id = i;
// if there is no available harq_process, skip the UE
if (UE_list->UE_sched_ctrl[UE_id].harq_pid[CC_id]<0)
continue;
for (ii=0; ii<UE_num_active_CC(UE_list,UE_id); ii++) {
CC_id = UE_list->ordered_CCids[ii][UE_id];
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
harq_pid = ue_sched_ctl->harq_pid[CC_id];
round = ue_sched_ctl->round[CC_id];
average_rbs_per_user[CC_id]=0;
frame_parms[CC_id] = mac_xface->get_lte_frame_parms(Mod_id,CC_id);
mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
// mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
if(round>0) {
nb_rbs_required[CC_id][UE_id] = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
@@ -524,7 +540,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
nb_rbs_required_remaining[CC_id][i],
nb_rbs_required_remaining_1[CC_id][i],
nb_rbs_required[CC_id][i],
pre_nb_available_rbs[CC_id][i],
UE_list->UE_sched_ctrl[i].pre_nb_available_rbs[CC_id],
N_RBG[CC_id],
min_rb_unit[CC_id]);
@@ -537,6 +553,9 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
for (ii=0; ii<UE_num_active_CC(UE_list,UE_id); ii++) {
CC_id = UE_list->ordered_CCids[ii][UE_id];
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
harq_pid = ue_sched_ctl->harq_pid[CC_id];
round = ue_sched_ctl->round[CC_id];
rnti = UE_RNTI(Mod_id,UE_id);
@@ -545,8 +564,8 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
continue;
transmission_mode = mac_xface->get_transmission_mode(Mod_id,CC_id,rnti);
mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
rrc_status = mac_eNB_get_rrc_status(Mod_id,rnti);
// mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
//rrc_status = mac_eNB_get_rrc_status(Mod_id,rnti);
/* 1st allocate for the retx */
// retransmission in data channels
@@ -560,11 +579,8 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
transmission_mode,
min_rb_unit[CC_id],
frame_parms[CC_id]->N_RB_DL,
dl_pow_off,
nb_rbs_required,
pre_nb_available_rbs,
nb_rbs_required_remaining,
rballoc_sub_UE,
rballoc_sub,
MIMO_mode_indicator);
@@ -573,50 +589,52 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
// data chanel TM5: to be revisted
if ((round == 0 ) &&
(transmission_mode == 5) &&
(dl_pow_off[CC_id][UE_id] != 1)) {
(ue_sched_ctl->dl_pow_off[CC_id] != 1)) {
for(j=0; j<N_RBG[CC_id]; j+=2) {
if( (((j == (N_RBG[CC_id]-1))&& (rballoc_sub[CC_id][j] == 0) && (rballoc_sub_UE[CC_id][UE_id][j] == 0)) ||
((j < (N_RBG[CC_id]-1)) && (rballoc_sub[CC_id][j+1] == 0) && (rballoc_sub_UE[CC_id][UE_id][j+1] == 0)) ) &&
if( (((j == (N_RBG[CC_id]-1))&& (rballoc_sub[CC_id][j] == 0) && (ue_sched_ctl->rballoc_sub_UE[CC_id][j] == 0)) ||
((j < (N_RBG[CC_id]-1)) && (rballoc_sub[CC_id][j+1] == 0) && (ue_sched_ctl->rballoc_sub_UE[CC_id][j+1] == 0)) ) &&
(nb_rbs_required_remaining[CC_id][UE_id]>0)) {
for (ii = UE_list->next[i+1]; ii >=0; ii=UE_list->next[ii]) {
UE_id2 = ii;
rnti2 = UE_RNTI(Mod_id,UE_id2);
ue_sched_ctl2 = &UE_list->UE_sched_ctrl[UE_id2];
harq_pid2 = ue_sched_ctl2->harq_pid[CC_id];
round2 = ue_sched_ctl2->round[CC_id];
if(rnti2 == NOT_A_RNTI)
continue;
eNB_UE_stats2 = mac_xface->get_eNB_UE_stats(Mod_id,CC_id,rnti2);
mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti2,frameP,subframeP,&harq_pid2,&round2,0);
//mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti2,frameP,subframeP,&harq_pid2,&round2,0);
if ((mac_eNB_get_rrc_status(Mod_id,rnti2) >= RRC_RECONFIGURED) &&
(round2==0) &&
(mac_xface->get_transmission_mode(Mod_id,CC_id,rnti2)==5) &&
(dl_pow_off[CC_id][UE_id2] != 1)) {
(ue_sched_ctl->dl_pow_off[CC_id] != 1)) {
if( (((j == (N_RBG[CC_id]-1)) && (rballoc_sub_UE[CC_id][UE_id2][j] == 0)) ||
((j < (N_RBG[CC_id]-1)) && (rballoc_sub_UE[CC_id][UE_id2][j+1] == 0)) ) &&
if( (((j == (N_RBG[CC_id]-1)) && (ue_sched_ctl->rballoc_sub_UE[CC_id][j] == 0)) ||
((j < (N_RBG[CC_id]-1)) && (ue_sched_ctl->rballoc_sub_UE[CC_id][j+1] == 0)) ) &&
(nb_rbs_required_remaining[CC_id][UE_id2]>0)) {
if((((eNB_UE_stats2->DL_pmi_single^eNB_UE_stats1->DL_pmi_single)<<(14-j))&0xc000)== 0x4000) { //MU-MIMO only for 25 RBs configuration
rballoc_sub[CC_id][j] = 1;
rballoc_sub_UE[CC_id][UE_id][j] = 1;
rballoc_sub_UE[CC_id][UE_id2][j] = 1;
ue_sched_ctl->rballoc_sub_UE[CC_id][j] = 1;
ue_sched_ctl2->rballoc_sub_UE[CC_id][j] = 1;
MIMO_mode_indicator[CC_id][j] = 0;
if (j< N_RBG[CC_id]-1) {
rballoc_sub[CC_id][j+1] = 1;
rballoc_sub_UE[CC_id][UE_id][j+1] = 1;
rballoc_sub_UE[CC_id][UE_id2][j+1] = 1;
ue_sched_ctl->rballoc_sub_UE[CC_id][j+1] = 1;
ue_sched_ctl2->rballoc_sub_UE[CC_id][j+1] = 1;
MIMO_mode_indicator[CC_id][j+1] = 0;
}
dl_pow_off[CC_id][UE_id] = 0;
dl_pow_off[CC_id][UE_id2] = 0;
ue_sched_ctl->dl_pow_off[CC_id] = 0;
ue_sched_ctl2->dl_pow_off[CC_id] = 0;
if ((j == N_RBG[CC_id]-1) &&
@@ -624,15 +642,15 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
(PHY_vars_eNB_g[Mod_id][CC_id]->lte_frame_parms.N_RB_DL == 50))) {
nb_rbs_required_remaining[CC_id][UE_id] = nb_rbs_required_remaining[CC_id][UE_id] - min_rb_unit[CC_id]+1;
pre_nb_available_rbs[CC_id][UE_id] = pre_nb_available_rbs[CC_id][UE_id] + min_rb_unit[CC_id]-1;
ue_sched_ctl->pre_nb_available_rbs[CC_id] = ue_sched_ctl->pre_nb_available_rbs[CC_id] + min_rb_unit[CC_id]-1;
nb_rbs_required_remaining[CC_id][UE_id2] = nb_rbs_required_remaining[CC_id][UE_id2] - min_rb_unit[CC_id]+1;
pre_nb_available_rbs[CC_id][UE_id2] = pre_nb_available_rbs[CC_id][UE_id2] + min_rb_unit[CC_id]-1;
ue_sched_ctl2->pre_nb_available_rbs[CC_id] = ue_sched_ctl2->pre_nb_available_rbs[CC_id] + min_rb_unit[CC_id]-1;
} else {
nb_rbs_required_remaining[CC_id][UE_id] = nb_rbs_required_remaining[CC_id][UE_id] - 4;
pre_nb_available_rbs[CC_id][UE_id] = pre_nb_available_rbs[CC_id][UE_id] + 4;
ue_sched_ctl->pre_nb_available_rbs[CC_id] = ue_sched_ctl->pre_nb_available_rbs[CC_id] + 4;
nb_rbs_required_remaining[CC_id][UE_id2] = nb_rbs_required_remaining[CC_id][UE_id2] - 4;
pre_nb_available_rbs[CC_id][UE_id2] = pre_nb_available_rbs[CC_id][UE_id2] + 4;
ue_sched_ctl2->pre_nb_available_rbs[CC_id] = ue_sched_ctl2->pre_nb_available_rbs[CC_id] + 4;
}
break;
@@ -688,48 +706,60 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
for(i=UE_list->head; i>=0; i=UE_list->next[i]) {
UE_id = i;
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
for (ii=0; ii<UE_num_active_CC(UE_list,UE_id); ii++) {
CC_id = UE_list->ordered_CCids[ii][UE_id];
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].dl_pow_off = dl_pow_off[UE_id];
if (pre_nb_available_rbs[CC_id][UE_id] > 0 ) {
if (ue_sched_ctl->pre_nb_available_rbs[CC_id] > 0 ) {
LOG_D(MAC,"******************DL Scheduling Information for UE%d ************************\n",UE_id);
LOG_D(MAC,"dl power offset UE%d = %d \n",UE_id,dl_pow_off[CC_id][UE_id]);
LOG_D(MAC,"dl power offset UE%d = %d \n",UE_id,ue_sched_ctl->dl_pow_off[CC_id]);
LOG_D(MAC,"***********RB Alloc for every subband for UE%d ***********\n",UE_id);
for(j=0; j<N_RBG[CC_id]; j++) {
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].rballoc_sub[i] = rballoc_sub_UE[CC_id][UE_id][i];
LOG_D(MAC,"RB Alloc for UE%d and Subband%d = %d\n",UE_id,j,rballoc_sub_UE[CC_id][UE_id][j]);
LOG_D(MAC,"RB Alloc for UE%d and Subband%d = %d\n",UE_id,j,ue_sched_ctl->rballoc_sub_UE[CC_id][j]);
}
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = pre_nb_available_rbs[CC_id][UE_id];
LOG_D(MAC,"Total RBs allocated for UE%d = %d\n",UE_id,pre_nb_available_rbs[CC_id][UE_id]);
LOG_D(MAC,"Total RBs allocated for UE%d = %d\n",UE_id,ue_sched_ctl->pre_nb_available_rbs[CC_id]);
}
}
}
}
void dlsch_scheduler_pre_processor_reset (int UE_id,
void dlsch_scheduler_pre_processor_reset (int module_idP,
int UE_id,
uint8_t CC_id,
int frameP,
int subframeP,
int N_RBG,
uint8_t dl_pow_off[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX],
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX])
{
int i;
UE_list_t *UE_list=&eNB_mac_inst[module_idP].UE_list;
UE_sched_ctrl *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
rnti_t rnti = UE_RNTI(module_idP,UE_id);
// initialize harq_pid and round
mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,
frameP,subframeP,
&ue_sched_ctl->harq_pid[CC_id],
&ue_sched_ctl->round[CC_id],
0);
nb_rbs_required[CC_id][UE_id]=0;
pre_nb_available_rbs[CC_id][UE_id] = 0;
dl_pow_off[CC_id][UE_id] = 2;
ue_sched_ctl->pre_nb_available_rbs[CC_id] = 0;
ue_sched_ctl->dl_pow_off[CC_id] = 2;
nb_rbs_required_remaining[CC_id][UE_id] = 0;
for (i=0; i<N_RBG; i++) {
rballoc_sub_UE[CC_id][UE_id][i] = 0;
ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 0;
rballoc_sub[CC_id][i] = 0;
MIMO_mode_indicator[CC_id][i] = 2;
}
@@ -743,46 +773,45 @@ void dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id,
int transmission_mode,
int min_rb_unit,
uint8_t N_RB_DL,
uint8_t dl_pow_off[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX],
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX])
{
int i;
UE_list_t *UE_list=&eNB_mac_inst[Mod_id].UE_list;
UE_sched_ctrl *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
for(i=0; i<N_RBG; i++) {
if((rballoc_sub[CC_id][i] == 0) &&
(rballoc_sub_UE[CC_id][UE_id][i] == 0) &&
(ue_sched_ctl->rballoc_sub_UE[CC_id][i] == 0) &&
(nb_rbs_required_remaining[CC_id][UE_id]>0) &&
(pre_nb_available_rbs[CC_id][UE_id] < nb_rbs_required[CC_id][UE_id])) {
(ue_sched_ctl->pre_nb_available_rbs[CC_id] < nb_rbs_required[CC_id][UE_id])) {
// if this UE is not scheduled for TM5
if (dl_pow_off[CC_id][UE_id] != 0 ) {
if (ue_sched_ctl->dl_pow_off[CC_id] != 0 ) {
if ((i == N_RBG-1) && ((N_RB_DL == 25) || (N_RB_DL == 50))) {
rballoc_sub[CC_id][i] = 1;
rballoc_sub_UE[CC_id][UE_id][i] = 1;
ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 1;
MIMO_mode_indicator[CC_id][i] = 1;
if (transmission_mode == 5 ) {
dl_pow_off[CC_id][UE_id] = 1;
ue_sched_ctl->dl_pow_off[CC_id] = 1;
}
nb_rbs_required_remaining[CC_id][UE_id] = nb_rbs_required_remaining[CC_id][UE_id] - min_rb_unit+1;
pre_nb_available_rbs[CC_id][UE_id] = pre_nb_available_rbs[CC_id][UE_id] + min_rb_unit - 1;
ue_sched_ctl->pre_nb_available_rbs[CC_id] = ue_sched_ctl->pre_nb_available_rbs[CC_id] + min_rb_unit - 1;
} else {
if (nb_rbs_required_remaining[CC_id][UE_id] >= min_rb_unit){
rballoc_sub[CC_id][i] = 1;
rballoc_sub_UE[CC_id][UE_id][i] = 1;
ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 1;
MIMO_mode_indicator[CC_id][i] = 1;
if (transmission_mode == 5 ) {
dl_pow_off[CC_id][UE_id] = 1;
ue_sched_ctl->dl_pow_off[CC_id] = 1;
}
nb_rbs_required_remaining[CC_id][UE_id] = nb_rbs_required_remaining[CC_id][UE_id] - min_rb_unit;
pre_nb_available_rbs[CC_id][UE_id] = pre_nb_available_rbs[CC_id][UE_id] + min_rb_unit;
ue_sched_ctl->pre_nb_available_rbs[CC_id] = ue_sched_ctl->pre_nb_available_rbs[CC_id] + min_rb_unit;
}
}
} // dl_pow_off[CC_id][UE_id] ! = 0
@@ -887,9 +916,9 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
}
}
}
LOG_D(MAC,"[eNB %d] Frame %d subframe %d: total ue to be scheduled %d/%d\n",
module_idP, frameP, subframeP,total_ue_count, max_num_ue_to_be_scheduled);
if (total_ue_count > 0)
LOG_D(MAC,"[eNB %d] Frame %d subframe %d: total ue to be scheduled %d/%d\n",
module_idP, frameP, subframeP,total_ue_count, max_num_ue_to_be_scheduled);
//LOG_D(MAC,"step3\n");
openair2/LAYER2/MAC/proto.h
+3 -13
View File
@@ -178,14 +178,13 @@ void mac_top_cleanup(void);
void mac_UE_out_of_sync_ind(module_id_t module_idP,frame_t frameP, uint16_t eNB_index);
void dlsch_scheduler_pre_processor_reset (int UE_id,
void dlsch_scheduler_pre_processor_reset (int module_idP,int UE_id,
uint8_t CC_id,
int frameP,
int subframeP,
int N_RBG,
uint8_t dl_pow_off[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX],
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]);
@@ -194,20 +193,14 @@ void dlsch_scheduler_pre_processor_reset (int UE_id,
@param Mod_id Instance ID of eNB
@param frame Index of frame
@param subframe Index of current subframe
@param dl_pow_off Pointer to store resulting power offset for DCI
@param pre_nb_available_rbs Pointer to store number of remaining rbs after scheduling
@param N_RBS Number of resource block groups
@param rb_alloc_sub Table of resource block groups allocated to each UE
*/
void dlsch_scheduler_pre_processor (module_id_t module_idP,
frame_t frameP,
sub_frame_t subframe,
uint8_t dl_pow_off[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
int N_RBG[MAX_NUM_CCs],
unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX],
int *mbsfn_flag);
@@ -218,11 +211,8 @@ void dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id,
int transmission_mode,
int min_rb_unit,
uint8_t N_RB_DL,
uint8_t dl_pow_off[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX],
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]);
openair2/RRC/LITE/MESSAGES/asn1_msg.c
+1 -1
View File
@@ -1643,7 +1643,7 @@ do_RRCConnectionSetup(
// SchedulingRequestConfig
physicalConfigDedicated2->schedulingRequestConfig->present = SchedulingRequestConfig_PR_setup;
physicalConfigDedicated2->schedulingRequestConfig->choice.setup.sr_PUCCH_ResourceIndex = ue_context_pP->local_uid;
physicalConfigDedicated2->schedulingRequestConfig->choice.setup.sr_PUCCH_ResourceIndex = 3;//ue_context_pP->local_uid;
if (frame_parms->frame_type == 0) { // FDD
physicalConfigDedicated2->schedulingRequestConfig->choice.setup.sr_ConfigIndex = 5+(ue_context_pP->local_uid%10); // Isr = 5 (every 10 subframes, offset=2+UE_id mod3)
openair2/RRC/LITE/rrc_eNB.c
+31 -1
View File
@@ -539,6 +539,23 @@ rrc_eNB_get_next_transaction_identifier(
//}
//-----------------------------------------------------------------------------
// return 1 if there is already an UE with ue_identityP, 0 otherwise
static int
rrc_eNB_ue_context_random_exist(
const protocol_ctxt_t* const ctxt_pP,
const uint64_t ue_identityP
)
//-----------------------------------------------------------------------------
{
struct rrc_eNB_ue_context_s* ue_context_p = NULL;
RB_FOREACH(ue_context_p, rrc_ue_tree_s, &(eNB_rrc_inst[ctxt_pP->module_id].rrc_ue_head)) {
if (ue_context_p->ue_context.random_ue_identity == ue_identityP)
return 1;
}
return 0;
}
//-----------------------------------------------------------------------------
// return a new ue context structure if ue_identityP, ctxt_pP->rnti not found in collection
static struct rrc_eNB_ue_context_s*
@@ -3610,10 +3627,23 @@ rrc_eNB_decode_ccch(
} else {
rrcConnectionRequest = &ul_ccch_msg->message.choice.c1.choice.rrcConnectionRequest.criticalExtensions.choice.rrcConnectionRequest_r8;
{
AssertFatal(rrcConnectionRequest->ue_Identity.present == InitialUE_Identity_PR_randomValue,
"unsupported InitialUE-Identity in RRCConnectionRequest");
AssertFatal(rrcConnectionRequest->ue_Identity.choice.randomValue.size == 5,
"wrong InitialUE-Identity randomValue size, expected 5, provided %d",
rrcConnectionRequest->ue_Identity.choice.randomValue.size);
memcpy(((uint8_t*) & random_value) + 3,
rrcConnectionRequest->ue_Identity.choice.randomValue.buf,
rrcConnectionRequest->ue_Identity.choice.randomValue.size);
ue_context_p = rrc_eNB_get_next_free_ue_context(ctxt_pP, random_value);
/* if there is already a registered UE (with another RNTI) with this random_value,
* the current one must be removed from MAC/PHY (zombie UE)
*/
if (rrc_eNB_ue_context_random_exist(ctxt_pP, random_value)) {
AssertFatal(0 == 1, "TODO: remove UE fro MAC/PHY (how?)");
ue_context_p = NULL;
} else {
ue_context_p = rrc_eNB_get_next_free_ue_context(ctxt_pP, random_value);
}
}
LOG_D(RRC,
PROTOCOL_RRC_CTXT_UE_FMT" UE context: %X\n",
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
+45 -5
View File
@@ -46,7 +46,13 @@
#include <cmath>
#include "common_lib.h"
#ifdef __SSE4_1__
# include <smmintrin.h>
#endif
#ifdef __AVX2__
# include <immintrin.h>
#endif
typedef struct
{
@@ -149,18 +155,52 @@ static int trx_usrp_write(openair0_device *device, openair0_timestamp timestamp,
static int trx_usrp_read(openair0_device *device, openair0_timestamp *ptimestamp, void **buff, int nsamps, int cc)
{
usrp_state_t *s = (usrp_state_t*)device->priv;
usrp_state_t *s = (usrp_state_t*)device->priv;
int samples_received=0,i,j;
int nsamps2; // aligned to upper 32 or 16 byte boundary
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
__m256i buff_tmp[2][nsamps>>3];
nsamps2 = (nsamps+7)>>3;
#else
__m128i buff_tmp[2][nsamps>>2];
nsamps2 = (nsamps+3)>>2;
#endif
#elif defined(__arm__)
int16x8_t buff_tmp[2][nsamps>>2];
nsamps2 = (nsamps+3)>>2;
#endif
int samples_received=0,i;
if (cc>1) {
// receive multiple channels (e.g. RF A and RF B)
std::vector<void *> buff_ptrs;
for (int i=0;i<cc;i++) buff_ptrs.push_back(buff[i]);
for (int i=0;i<cc;i++) buff_ptrs.push_back(buff_tmp[i]);
samples_received = s->rx_stream->recv(buff_ptrs, nsamps, s->rx_md);
} else {
// receive a single channel (e.g. from connector RF A)
samples_received = s->rx_stream->recv(buff[0], nsamps, s->rx_md);
samples_received = s->rx_stream->recv(buff_tmp[0], nsamps, s->rx_md);
}
// bring RX data into 12 LSBs for softmodem RX
for (int i=0;i<cc;i++) {
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
((__m256i *)buff[i])[j] = _mm256_srai_epi16(buff_tmp[i][j],4);
#else
((__m128i *)buff[i])[j] = _mm_srai_epi16(buff_tmp[i][j],4);
#endif
#elif defined(__arm__)
((int16x8_t*)buff[i])[j] = vshrq_n_s16(buff_tmp[i][j],4);
#endif
}
}
if (samples_received < nsamps) {
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.50PRB.usrpb210.conf
+6 -6
View File
@@ -17,7 +17,7 @@ eNBs =
mobile_country_code = "208";
mobile_network_code = "92";
mobile_network_code = "93";
////////// Physical parameters:
@@ -36,7 +36,7 @@ eNBs =
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 90;
rx_gain = 120;
rx_gain = 118;
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
@@ -46,7 +46,7 @@ eNBs =
pucch_nRB_CQI = 1;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -26;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
pusch_enable64QAM = "DISABLE";
@@ -130,7 +130,7 @@ eNBs =
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.13.11";
mme_ip_address = ( { ipv4 = "192.168.12.11";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
@@ -140,10 +140,10 @@ eNBs =
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.13.10/24";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.213/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.13.10/24";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.213/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.conf
+5 -5
View File
@@ -46,7 +46,7 @@ eNBs =
pucch_nRB_CQI = 1;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -26;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
pusch_enable64QAM = "DISABLE";
@@ -66,7 +66,7 @@ eNBs =
pusch_p0_Nominal = -90;
pusch_alpha = "AL1";
pucch_p0_Nominal = -108;
pucch_p0_Nominal = -96;
msg3_delta_Preamble = 6;
pucch_deltaF_Format1 = "deltaF2";
pucch_deltaF_Format1b = "deltaF3";
@@ -133,7 +133,7 @@ eNBs =
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.171";
mme_ip_address = ( { ipv4 = "192.168.12.11";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
@@ -143,10 +143,10 @@ eNBs =
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.213/24";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.216/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.213/24";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.216/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
targets/RT/USER/lte-softmodem.c
+5 -5
View File
@@ -953,7 +953,7 @@ void do_OFDM_mod_rt(int subframe,PHY_VARS_eNB *phy_vars_eNB)
#elif OAI_BLADRF
((short*)dummy_tx_b)[2*i];
#else
((short*)dummy_tx_b)[2*i]<<5;
((short*)dummy_tx_b)[2*i]<<4;
#endif
((short*)&phy_vars_eNB->lte_eNB_common_vars.txdata[0][aa][tx_offset])[1]=
#ifdef EXMIMO
@@ -961,7 +961,7 @@ void do_OFDM_mod_rt(int subframe,PHY_VARS_eNB *phy_vars_eNB)
#elif OAI_BLADRF
((short*)dummy_tx_b)[2*i+1];
#else
((short*)dummy_tx_b)[2*i+1]<<5;
((short*)dummy_tx_b)[2*i+1]<<4;
#endif
}
// if S-subframe switch to RX in second subframe
@@ -2875,7 +2875,7 @@ int main( int argc, char **argv )
openair0_cfg[card].samples_per_packet = 1024;
#ifdef OAI_USRP
openair0_cfg[card].tx_forward_nsamps = 70;
openair0_cfg[card].tx_delay = 6;
openair0_cfg[card].tx_delay = 5;
#elif OAI_BLADERF
openair0_cfg[card].tx_forward_nsamps = 0;
openair0_cfg[card].tx_delay = 8;
@@ -3577,7 +3577,7 @@ int setup_eNB_buffers(PHY_VARS_eNB **phy_vars_eNB, openair0_config_t *openair0_c
for (i=0; i<frame_parms->nb_antennas_rx; i++) {
free(phy_vars_eNB[CC_id]->lte_eNB_common_vars.rxdata[0][i]);
rxdata[i] = (int32_t*)(16 + malloc16(16+openair0_cfg[rf_map[CC_id].card].samples_per_frame*sizeof(int32_t))); // FIXME broken memory allocation
rxdata[i] = (int32_t*)(32 + malloc16(32+openair0_cfg[rf_map[CC_id].card].samples_per_frame*sizeof(int32_t))); // FIXME broken memory allocation
phy_vars_eNB[CC_id]->lte_eNB_common_vars.rxdata[0][i] = rxdata[i]-N_TA_offset; // N_TA offset for TDD FIXME! N_TA_offset > 16 => access of unallocated memory
memset(rxdata[i], 0, openair0_cfg[rf_map[CC_id].card].samples_per_frame*sizeof(int32_t));
printf("rxdata[%d] @ %p (%p) (N_TA_OFFSET %d)\n", i, phy_vars_eNB[CC_id]->lte_eNB_common_vars.rxdata[0][i],rxdata[i],N_TA_offset);
@@ -3586,7 +3586,7 @@ int setup_eNB_buffers(PHY_VARS_eNB **phy_vars_eNB, openair0_config_t *openair0_c
for (i=0; i<frame_parms->nb_antennas_tx; i++) {
free(phy_vars_eNB[CC_id]->lte_eNB_common_vars.txdata[0][i]);
txdata[i] = (int32_t*)(16 + malloc16(16 + openair0_cfg[rf_map[CC_id].card].samples_per_frame*sizeof(int32_t))); // FIXME broken memory allocation
txdata[i] = (int32_t*)(32 + malloc16(32 + openair0_cfg[rf_map[CC_id].card].samples_per_frame*sizeof(int32_t))); // FIXME broken memory allocation
phy_vars_eNB[CC_id]->lte_eNB_common_vars.txdata[0][i] = txdata[i];
memset(txdata[i],0, openair0_cfg[rf_map[CC_id].card].samples_per_frame*sizeof(int32_t));
printf("txdata[%d] @ %p\n", i, phy_vars_eNB[CC_id]->lte_eNB_common_vars.txdata[0][i]);
targets/RT/USER/lte-ue.c
+13 -3
View File
@@ -734,6 +734,7 @@ static void *UE_thread_tx(void *arg)
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
*/
/*
#ifdef OAI_USRP
void rescale(int16_t *input,int length)
{
@@ -753,6 +754,7 @@ void rescale(int16_t *input,int length)
}
}
#endif
*/
static void *UE_thread_rx(void *arg)
{
@@ -840,6 +842,7 @@ static void *UE_thread_rx(void *arg)
for (i=0; i<2; i++) {
if ((subframe_select( &UE->lte_frame_parms, UE->slot_rx>>1 ) == SF_DL) ||
(UE->lte_frame_parms.frame_type == FDD)) {
/*
#ifdef OAI_USRP
// this does the adjustments of RX signal amplitude to bring into least 12 significant bits
int slot_length = UE->lte_frame_parms.samples_per_tti>>1;
@@ -874,11 +877,13 @@ static void *UE_thread_rx(void *arg)
}
}
#endif
*/
phy_procedures_UE_RX( UE, 0, 0, UE->mode, no_relay, NULL );
}
if ((subframe_select( &UE->lte_frame_parms, UE->slot_rx>>1 ) == SF_S) &&
((UE->slot_rx&1) == 0)) {
/*
#ifdef OAI_USRP
// this does the adjustments of RX signal amplitude to bring into least 12 significant bits
int slot_length = UE->lte_frame_parms.samples_per_tti>>1;
@@ -912,6 +917,7 @@ static void *UE_thread_rx(void *arg)
}
}
#endif
*/
phy_procedures_UE_RX( UE, 0, 0, UE->mode, no_relay, NULL );
}
@@ -997,7 +1003,11 @@ void *UE_thread(void *arg)
PHY_VARS_UE *UE = PHY_vars_UE_g[0][0];
int spp = openair0_cfg[0].samples_per_packet;
int slot=1, frame=0, hw_subframe=0, rxpos=0, txpos=spp*openair0_cfg[0].tx_delay;
int dummy[2][spp];
#ifdef __AVX2__
int dummy[2][spp] __attribute__((aligned(32)));
#else
int dummy[2][spp] __attribute__((aligned(16)));
#endif
int dummy_dump = 0;
int tx_enabled = 0;
int start_rx_stream = 0;
@@ -1084,8 +1094,8 @@ void *UE_thread(void *arg)
for (int i=0; i<UE->lte_frame_parms.nb_antennas_rx; i++)
rxp[i] = (dummy_dump==0) ? (void*)&rxdata[i][rxpos] : (void*)dummy[i];
/* if (dummy_dump == 0)
/*
if (dummy_dump == 0)
printf("writing %d samples to %d (first_rx %d)\n",spp - ((first_rx==1) ? rx_off_diff : 0),rxpos,first_rx);
*/
if (UE->mode != loop_through_memory) {