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limitation to 1 DL slot/TDD period for testing

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This commit is contained in:
Eurecom
2021-08-27 08:04:03 +02:00
parent bd955d4817
commit 1b028d7d89
7 changed files with 22 additions and 10 deletions
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openair1/PHY/NR_TRANSPORT/pucch_rx.c
+1 -1
View File
@@ -314,7 +314,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
}
}
LOG_D(PHY,"PUCCH IDFT[%d/%d] = (%d,%d)=>%f\n",mcs[i],seq_index,corr_re[0],corr_im[0],10*log10((double)corr_re[0]*corr_re[0] + (double)corr_im[0]*corr_im[0]));
LOG_I(PHY,"PUCCH IDFT[%d/%d] = (%d,%d)=>%f\n",mcs[i],seq_index,corr_re[0],corr_im[0],10*log10((double)corr_re[0]*corr_re[0] + (double)corr_im[0]*corr_im[0]));
if (l>1) LOG_D(PHY,"PUCCH 2nd symbol IDFT[%d/%d] = (%d,%d)=>%f\n",mcs[i],seq_index,corr_re[1],corr_im[1],10*log10((double)corr_re[1]*corr_re[1] + (double)corr_im[1]*corr_im[1]));
if (pucch_pdu->freq_hop_flag == 0 && l==1) // non-coherent correlation
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+3 -1
View File
@@ -261,6 +261,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
}
}
int dumpsig=0;
// if all segments are done
if (rdata->nbSegments == ulsch_harq->processedSegments) {
if (decodeSuccess) {
@@ -272,6 +273,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
LOG_D(PHY, "ULSCH received ok \n");
nr_fill_indication(gNB,ulsch_harq->frame, ulsch_harq->slot, rdata->ulsch_id, rdata->harq_pid, 0);
dumpsig=1;
} else {
LOG_I(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, TBS %d) r %d\n",
gNB->Mod_id, ulsch_harq->frame, ulsch_harq->slot,
@@ -288,7 +290,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
nr_fill_indication(gNB,ulsch_harq->frame, ulsch_harq->slot, rdata->ulsch_id, rdata->harq_pid, 1);
}
/*
if (ulsch_harq->ulsch_pdu.mcs_index == 9) {
if (ulsch_harq->ulsch_pdu.mcs_index == 9 && dumpsig==1) {
#ifdef __AVX2__
int off = ((ulsch_harq->ulsch_pdu.rb_size&1) == 1)? 4:0;
#else
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+6 -1
View File
@@ -1541,7 +1541,12 @@ void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_fram
}
else
{
ra->state = Msg4;
// ra->state = Msg4;
LOG_I(NR_MAC, "(ue %i, rnti 0x%04x) Received Nak of RA-Msg4. CBRA procedure failed!\n", UE_id, ra->rnti);
mac_remove_nr_ue(module_id,ra->rnti);
nr_clear_ra_proc(module_id, CC_id, frame, ra);
UE_info->active[UE_id] = false;
UE_info->Msg4_ACKed[UE_id] = false;
}
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+7 -3
View File
@@ -543,7 +543,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
slot);
int cid = sched_ctrl->coreset->controlResourceSetId;
UE_info->num_pdcch_cand[UE_id][cid]--;
int *cce_list = RC.nrmac[module_id]->cce_list[sched_ctrl->active_bwp->bwp_Id][cid];
int *cce_list = RC.nrmac[module_id]->cce_list[sched_ctrl->active_bwp?sched_ctrl->active_bwp->bwp_Id:0][cid];
for (int i = 0; i < sched_ctrl->aggregation_level; i++)
cce_list[sched_ctrl->cce_index + i] = 0;
return false;
@@ -743,6 +743,8 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
if (UE_info->num_UEs == 0)
return;
if (slot!=1 && slot!=11) return;
const int CC_id = 0;
@@ -813,6 +815,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
if (!is_xlsch_in_slot(gNB_mac->dlsch_slot_bitmap[slot / 64], slot))
return;
/* PREPROCESSOR */
gNB_mac->pre_processor_dl(module_id, frame, slot);
@@ -884,7 +887,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;
LOG_I(NR_MAC,
"%4d.%2d [DLSCH/PDSCH/PUCCH] RNTI %04x start %3d RBs %3d startSymbol %2d nb_symbol %2d dmrspos %x MCS %2d TBS %4d HARQ PID %2d round %d NDI %d dl_data_to_ULACK %d (%d.%d)\n",
"%4d.%2d [DLSCH/PDSCH/PUCCH] RNTI %04x start %3d RBs %3d startSymbol %2d nb_symbol %2d dmrspos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d dl_data_to_ULACK %d (%d.%d)\n",
frame,
slot,
rnti,
@@ -897,6 +900,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
TBS,
current_harq_pid,
harq->round,
nr_rv_round_map[harq->round],
harq->ndi,
pucch->timing_indicator,
pucch->frame,
@@ -1160,7 +1164,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
0,
0);
LOG_D(NR_MAC,
LOG_I(NR_MAC,
"%4d.%2d RNTI %04x: %d bytes from %s %d (ndata %d, remaining size %d)\n",
frame,
slot,
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+1 -1
View File
@@ -238,7 +238,7 @@ bool nr_find_nb_rb(uint16_t Qm,
return true;
/* is the minimum enough? */
*nb_rb = 1;
*nb_rb = 5;
*tbs = nr_compute_tbs(Qm, R, *nb_rb, nb_symb_sch, nb_dmrs_prb, 0, 0, 1) >> 3;
if (bytes <= *tbs)
return true;
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+3 -2
View File
@@ -1440,7 +1440,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
sched_ctrl->last_ul_slot = sched_pusch->slot;
LOG_I(NR_MAC,
"ULSCH/PUSCH: %4d.%2d RNTI %04x UL sched %4d.%2d start %2d RBS %3d startSymbol %2d nb_symbol %2d dmrs_pos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d est %6d sched %6d est BSR %6d\n",
"ULSCH/PUSCH: %4d.%2d RNTI %04x UL sched %4d.%2d start %2d RBS %3d startSymbol %2d nb_symbol %2d dmrs_pos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d est %6d sched %6d est BSR %6d TPC %d\n",
frame,
slot,
rnti,
@@ -1459,7 +1459,8 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
cur_harq->ndi,
sched_ctrl->estimated_ul_buffer,
sched_ctrl->sched_ul_bytes,
sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes);
sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes,
sched_ctrl->tpc0);
/* PUSCH in a later slot, but corresponding DCI now! */
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
+1 -1
View File
@@ -940,7 +940,7 @@ extern "C" {
LOG_I(HW, "openair0_cfg[0].sdr_addrs == '%s'\n", openair0_cfg[0].sdr_addrs);
LOG_I(HW, "openair0_cfg[0].clock_source == '%d' (internal = %d, external = %d)\n", openair0_cfg[0].clock_source,internal,external);
usrp_state_t *s ;
int choffset = 0;
int choffset = 1;
if ( device->priv == NULL) {
s=(usrp_state_t *)calloc(sizeof(usrp_state_t),1);