Coreset0 / SIB1 configured using the computed BWP considering the 3GPP.
This commit is contained in:
@@ -53,7 +53,7 @@ gNBs =
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#initialDownlinkBWP
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#initialDownlinkBWP
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#genericParameters
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#genericParameters
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# this is RBstart=41,L=24 (275*(L-1))+RBstart
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# this is RBstart=41,L=24 (275*(L-1))+RBstart
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initialDLBWPlocationAndBandwidth = 12956; #12925; 12956 28875 6366
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initialDLBWPlocationAndBandwidth = 28875; # 6366 12925 12956 28875
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# subcarrierSpacing
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# subcarrierSpacing
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# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
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# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
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initialDLBWPsubcarrierSpacing = 1;
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initialDLBWPsubcarrierSpacing = 1;
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@@ -66,17 +66,17 @@ gNBs =
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#initialULBWPmappingType
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#initialULBWPmappingType
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#0=typeA,1=typeB
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#0=typeA,1=typeB
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initialDLBWPmappingType_0 = 0;
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initialDLBWPmappingType_0 = 0;
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#this is SS=1,L=13
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#this is SS=2,L=12
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initialDLBWPstartSymbolAndLength_0 = 40;
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initialDLBWPstartSymbolAndLength_0 = 53;
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initialDLBWPk0_1 = 0;
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initialDLBWPk0_1 = 0;
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initialDLBWPmappingType_1 = 0;
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initialDLBWPmappingType_1 = 0;
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#this is SS=2,L=12
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#this is SS=1,L=13
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initialDLBWPstartSymbolAndLength_1 = 53;
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initialDLBWPstartSymbolAndLength_1 = 40;
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initialDLBWPk0_2 = 0;
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initialDLBWPk0_2 = 0;
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initialDLBWPmappingType_2 = 0;
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initialDLBWPmappingType_2 = 0;
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#this is SS=1,L=12
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#this is SS=1,L=12
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initialDLBWPstartSymbolAndLength_2 = 54;
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initialDLBWPstartSymbolAndLength_2 = 54;
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initialDLBWPk0_3 = 0;
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initialDLBWPk0_3 = 0;
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@@ -88,18 +88,9 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
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get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
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get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
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cset_start_sc = frame_parms.first_carrier_offset + rb_offset*NR_NB_SC_PER_RB;
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cset_start_sc = frame_parms.first_carrier_offset + rb_offset*NR_NB_SC_PER_RB;
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if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1) {
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if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1) {
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// cset_start_sc = cset_start_sc + RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb*NR_NB_SC_PER_RB;
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cset_start_sc = cset_start_sc + RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb*NR_NB_SC_PER_RB;
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gNB_MAC_INST *gNB_mac = RC.nrmac[gNB->Mod_id];
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int BWPStart = NRRIV2PRBOFFSET(gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
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cset_start_sc = cset_start_sc + BWPStart*NR_NB_SC_PER_RB;
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}
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}
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printf("==== cset_start_sc = %i\n", cset_start_sc);
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printf("==== frame_parms.first_carrier_offset = %i\n", frame_parms.first_carrier_offset);
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printf("==== rb_offset = %i\n", rb_offset);
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printf("==== RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb = %i\n", RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb);
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for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) {
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for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) {
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/*The coreset is initialised
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/*The coreset is initialised
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* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0
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* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0
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@@ -272,12 +272,6 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
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uint16_t start_sc = frame_parms->first_carrier_offset + (rel15->rbStart+rel15->BWPStart)*NR_NB_SC_PER_RB;
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uint16_t start_sc = frame_parms->first_carrier_offset + (rel15->rbStart+rel15->BWPStart)*NR_NB_SC_PER_RB;
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printf("nr_dlsch: rel15->BWPStart = %i\n", rel15->BWPStart);
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printf("nr_dlsch: rel15->rbStart = %i\n", rel15->rbStart);
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printf("nr_dlsch: frame_parms->first_carrier_offset = %i\n", frame_parms->first_carrier_offset);
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printf("nr_dlsch: start_sc = %i\n", start_sc);
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if (start_sc >= frame_parms->ofdm_symbol_size)
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if (start_sc >= frame_parms->ofdm_symbol_size)
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start_sc -= frame_parms->ofdm_symbol_size;
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start_sc -= frame_parms->ofdm_symbol_size;
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@@ -605,8 +605,6 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
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ret = 1 + dlsch->max_ldpc_iterations;
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ret = 1 + dlsch->max_ldpc_iterations;
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}
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}
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getchar();
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nb_total_decod++;
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nb_total_decod++;
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if (no_iteration_ldpc > dlsch->max_ldpc_iterations){
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if (no_iteration_ldpc > dlsch->max_ldpc_iterations){
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nb_error_decod++;
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nb_error_decod++;
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@@ -32,6 +32,7 @@
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#define _GNU_SOURCE
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#define _GNU_SOURCE
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#include <nr/nr_common.h>
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#include "assertions.h"
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#include "assertions.h"
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#include "defs.h"
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#include "defs.h"
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#include "PHY/defs_nr_UE.h"
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#include "PHY/defs_nr_UE.h"
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@@ -1643,76 +1644,80 @@ int is_pbch_in_slot(fapi_nr_config_request_t *config, int frame, int slot, NR_DL
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int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
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int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
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UE_nr_rxtx_proc_t *proc,
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UE_nr_rxtx_proc_t *proc,
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uint8_t gNB_id,
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uint8_t gNB_id,
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runmode_t mode)
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runmode_t mode) {
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{
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int frame_rx = proc->frame_rx;
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int frame_rx = proc->frame_rx;
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int nr_tti_rx = proc->nr_tti_rx;
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int nr_tti_rx = proc->nr_tti_rx;
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int slot_pbch;
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int slot_pbch;
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NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][0];
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NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][0];
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fapi_nr_config_request_t *cfg = &ue->nrUE_config;
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fapi_nr_config_request_t *cfg = &ue->nrUE_config;
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NR_UE_MAC_INST_t *mac = get_mac_inst(ue->Mod_id);
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fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
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uint8_t nb_symb_pdcch = pdcch_vars->nb_search_space > 0 ? pdcch_vars->pdcch_config[0].coreset.duration : 0;
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uint8_t nb_symb_pdcch = pdcch_vars->nb_search_space > 0 ? pdcch_vars->pdcch_config[0].coreset.duration : 0;
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uint8_t dci_cnt = 0;
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uint8_t dci_cnt = 0;
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NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
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NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
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LOG_D(PHY," ****** start RX-Chain for Frame.Slot %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
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LOG_D(PHY, " ****** start RX-Chain for Frame.Slot %d.%d ****** \n", frame_rx % 1024, nr_tti_rx);
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/*
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/*
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uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
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uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
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uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
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uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
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*/
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*/
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int coreset_nb_rb=0;
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int coreset_nb_rb = 0;
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int coreset_start_rb=0;
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int coreset_start_rb = 0;
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if (pdcch_vars->nb_search_space > 0)
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if (pdcch_vars->nb_search_space > 0)
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get_coreset_rballoc(pdcch_vars->pdcch_config[0].coreset.frequency_domain_resource,&coreset_nb_rb,&coreset_start_rb);
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get_coreset_rballoc(pdcch_vars->pdcch_config[0].coreset.frequency_domain_resource, &coreset_nb_rb,
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&coreset_start_rb);
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slot_pbch = is_pbch_in_slot(cfg, frame_rx, nr_tti_rx, fp);
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slot_pbch = is_pbch_in_slot(cfg, frame_rx, nr_tti_rx, fp);
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// looking for pbch only in slot where it is supposed to be
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// looking for pbch only in slot where it is supposed to be
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if ((ue->decode_MIB == 1) && slot_pbch)
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if ((ue->decode_MIB == 1) && slot_pbch) {
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{
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LOG_D(PHY, " ------ PBCH ChannelComp/LLR: frame.slot %d.%d ------ \n", frame_rx % 1024, nr_tti_rx);
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LOG_D(PHY," ------ PBCH ChannelComp/LLR: frame.slot %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
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for (int i = 1; i < 4; i++) {
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for (int i=1; i<4; i++) {
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nr_slot_fep(ue,
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nr_slot_fep(ue,
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(ue->symbol_offset+i)%(fp->symbols_per_slot),
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(ue->symbol_offset + i) % (fp->symbols_per_slot),
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nr_tti_rx,
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nr_tti_rx,
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0,
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0,
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0);
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0);
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#if UE_TIMING_TRACE
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#if UE_TIMING_TRACE
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start_meas(&ue->dlsch_channel_estimation_stats);
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start_meas(&ue->dlsch_channel_estimation_stats);
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#endif
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#endif
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nr_pbch_channel_estimation(ue,0,nr_tti_rx,(ue->symbol_offset+i)%(fp->symbols_per_slot),i-1,(fp->ssb_index)&7,fp->half_frame_bit);
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nr_pbch_channel_estimation(ue, 0, nr_tti_rx, (ue->symbol_offset + i) % (fp->symbols_per_slot), i - 1,
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(fp->ssb_index) & 7, fp->half_frame_bit);
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#if UE_TIMING_TRACE
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#if UE_TIMING_TRACE
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stop_meas(&ue->dlsch_channel_estimation_stats);
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stop_meas(&ue->dlsch_channel_estimation_stats);
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#endif
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#endif
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}
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nr_ue_pbch_procedures(gNB_id, ue, proc, 0);
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if (ue->no_timing_correction==0) {
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LOG_D(PHY,"start adjust sync slot = %d no timing %d\n", nr_tti_rx, ue->no_timing_correction);
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nr_adjust_synch_ue(fp,
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ue,
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gNB_id,
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frame_rx,
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nr_tti_rx,
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0,
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16384);
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}
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}
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}
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nr_ue_pbch_procedures(gNB_id, ue, proc, 0);
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if (ue->no_timing_correction == 0) {
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LOG_D(PHY, "start adjust sync slot = %d no timing %d\n", nr_tti_rx, ue->no_timing_correction);
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nr_adjust_synch_ue(fp,
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ue,
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gNB_id,
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frame_rx,
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nr_tti_rx,
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0,
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16384);
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}
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}
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#ifdef NR_PDCCH_SCHED
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#ifdef NR_PDCCH_SCHED
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nr_gold_pdcch(ue, 0, 2);
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nr_gold_pdcch(ue, 0, 2);
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LOG_D(PHY," ------ --> PDCCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
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LOG_D(PHY, " ------ --> PDCCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx % 1024, nr_tti_rx);
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for (uint16_t l=0; l<nb_symb_pdcch; l++) {
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for (uint16_t l = 0; l < nb_symb_pdcch; l++) {
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#if UE_TIMING_TRACE
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#if UE_TIMING_TRACE
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start_meas(&ue->ofdm_demod_stats);
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start_meas(&ue->ofdm_demod_stats);
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#endif
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#endif
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@@ -1725,28 +1730,30 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
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fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15;
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fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15;
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dci_cnt = 0;
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for(int n_ss = 0; n_ss<pdcch_vars->nb_search_space; n_ss++) {
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for(int n_ss = 0; n_ss<pdcch_vars->nb_search_space; n_ss++) {
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// note: this only works if RBs for PDCCH are contigous!
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// note: this only works if RBs for PDCCH are contigous!
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LOG_D(PHY,"pdcch_channel_estimation: first_carrier_offset %d, BWPStart %d, coreset_start_rb %d\n",
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LOG_D(PHY, "pdcch_channel_estimation: first_carrier_offset %d, BWPStart %d, coreset_start_rb %d\n",
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fp->first_carrier_offset,pdcch_vars->pdcch_config[n_ss].BWPStart,coreset_start_rb);
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fp->first_carrier_offset, pdcch_vars->pdcch_config[n_ss].BWPStart, coreset_start_rb);
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rel15 = &pdcch_vars->pdcch_config[n_ss];
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rel15 = &pdcch_vars->pdcch_config[n_ss];
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if (coreset_nb_rb > 0)
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if (coreset_nb_rb > 0)
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nr_pdcch_channel_estimation(ue,
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nr_pdcch_channel_estimation(ue,
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0,
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0,
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nr_tti_rx,
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nr_tti_rx,
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l,
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l,
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fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
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fp->first_carrier_offset +
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coreset_nb_rb);
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(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb) * 12,
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coreset_nb_rb);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
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#if UE_TIMING_TRACE
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#if UE_TIMING_TRACE
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stop_meas(&ue->ofdm_demod_stats);
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stop_meas(&ue->ofdm_demod_stats);
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#endif
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#endif
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dci_cnt = dci_cnt + nr_ue_pdcch_procedures(gNB_id, ue, proc);
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dci_cnt = dci_cnt + nr_ue_pdcch_procedures(gNB_id, ue, proc);
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}
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}
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}
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}
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@@ -1799,7 +1806,13 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
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// do procedures for C-RNTI
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// do procedures for C-RNTI
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int ret_pdsch = 0;
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int ret_pdsch = 0;
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if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0]->active == 1) {
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if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0]->active == 1) {
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//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
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fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
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dlsch_config_pdu->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
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dlsch_config_pdu->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
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dlsch_config_pdu->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
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ret_pdsch = nr_ue_pdsch_procedures(ue,
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ret_pdsch = nr_ue_pdsch_procedures(ue,
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proc,
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proc,
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gNB_id,
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gNB_id,
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@@ -1807,24 +1820,33 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
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ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0],
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ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0],
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NULL);
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NULL);
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||||||
//printf("phy procedure pdsch start measurement\n");
|
if (ret_pdsch >= 0)
|
||||||
|
nr_ue_dlsch_procedures(ue,
|
||||||
|
proc,
|
||||||
|
gNB_id,
|
||||||
|
PDSCH,
|
||||||
|
ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0],
|
||||||
|
ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][1],
|
||||||
|
&ue->dlsch_errors[gNB_id],
|
||||||
|
mode);
|
||||||
|
|
||||||
nr_ue_measurement_procedures(2,ue,proc,gNB_id,nr_tti_rx,mode);
|
nr_ue_measurement_procedures(2,ue,proc,gNB_id,nr_tti_rx,mode);
|
||||||
|
|
||||||
/*
|
// deactivate dlsch once dlsch proc is done
|
||||||
write_output("rxF.m","rxF",&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF[0][0],fp->ofdm_symbol_size*14,1,1);
|
ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0]->active = 0;
|
||||||
write_output("rxF_ch.m","rxFch",&ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][gNB_id]->dl_ch_estimates[0][0],fp->ofdm_symbol_size*14,1,1);
|
|
||||||
write_output("rxF_ch_ext.m","rxFche",&ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][gNB_id]->dl_ch_estimates_ext[0][2*50*12],50*12,1,1);
|
|
||||||
write_output("rxF_ext.m","rxFe",&ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][gNB_id]->rxdataF_ext[0][0],50*12*14,1,1);
|
|
||||||
write_output("rxF_comp.m","rxFc",&ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][gNB_id]->rxdataF_comp0[0][0],fp->N_RB_DL*12*14,1,1);
|
|
||||||
write_output("rxF_llr.m","rxFllr",ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][gNB_id]->llr[0],(nb_symb_sch-1)*50*12+50*6,1,0);
|
|
||||||
*/
|
|
||||||
|
|
||||||
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
|
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
|
||||||
}
|
}
|
||||||
|
|
||||||
// do procedures for SI-RNTI
|
// do procedures for SI-RNTI
|
||||||
if ((ue->dlsch_SI[gNB_id]) && (ue->dlsch_SI[gNB_id]->active == 1)) {
|
if ((ue->dlsch_SI[gNB_id]) && (ue->dlsch_SI[gNB_id]->active == 1)) {
|
||||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_IN);
|
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_IN);
|
||||||
|
|
||||||
|
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
|
||||||
|
dlsch_config_pdu->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
|
||||||
|
dlsch_config_pdu->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
|
||||||
|
dlsch_config_pdu->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
|
||||||
|
|
||||||
nr_ue_pdsch_procedures(ue,
|
nr_ue_pdsch_procedures(ue,
|
||||||
proc,
|
proc,
|
||||||
gNB_id,
|
gNB_id,
|
||||||
@@ -1859,6 +1881,12 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
|
|||||||
// do procedures for P-RNTI
|
// do procedures for P-RNTI
|
||||||
if ((ue->dlsch_p[gNB_id]) && (ue->dlsch_p[gNB_id]->active == 1)) {
|
if ((ue->dlsch_p[gNB_id]) && (ue->dlsch_p[gNB_id]->active == 1)) {
|
||||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_IN);
|
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_IN);
|
||||||
|
|
||||||
|
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
|
||||||
|
dlsch_config_pdu->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||||
|
dlsch_config_pdu->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||||
|
dlsch_config_pdu->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
|
||||||
|
|
||||||
nr_ue_pdsch_procedures(ue,
|
nr_ue_pdsch_procedures(ue,
|
||||||
proc,
|
proc,
|
||||||
gNB_id,
|
gNB_id,
|
||||||
@@ -1884,6 +1912,12 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
|
|||||||
// do procedures for RA-RNTI
|
// do procedures for RA-RNTI
|
||||||
if ((ue->dlsch_ra[gNB_id]) && (ue->dlsch_ra[gNB_id]->active == 1)) {
|
if ((ue->dlsch_ra[gNB_id]) && (ue->dlsch_ra[gNB_id]->active == 1)) {
|
||||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_IN);
|
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_IN);
|
||||||
|
|
||||||
|
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
|
||||||
|
dlsch_config_pdu->BWPSize = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
|
||||||
|
dlsch_config_pdu->BWPStart = NRRIV2PRBOFFSET(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
|
||||||
|
dlsch_config_pdu->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
|
||||||
|
|
||||||
nr_ue_pdsch_procedures(ue,
|
nr_ue_pdsch_procedures(ue,
|
||||||
proc,
|
proc,
|
||||||
gNB_id,
|
gNB_id,
|
||||||
@@ -1905,46 +1939,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
|
|||||||
|
|
||||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_OUT);
|
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_OUT);
|
||||||
}
|
}
|
||||||
|
|
||||||
// do procedures for C-RNTI
|
|
||||||
if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0]->active == 1) {
|
|
||||||
|
|
||||||
LOG_D(PHY, "DLSCH data reception at nr_tti_rx: %d \n \n", nr_tti_rx);
|
|
||||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
|
|
||||||
|
|
||||||
#if UE_TIMING_TRACE
|
|
||||||
start_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
if (ret_pdsch >= 0)
|
|
||||||
nr_ue_dlsch_procedures(ue,
|
|
||||||
proc,
|
|
||||||
gNB_id,
|
|
||||||
PDSCH,
|
|
||||||
ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0],
|
|
||||||
ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][1],
|
|
||||||
&ue->dlsch_errors[gNB_id],
|
|
||||||
mode);
|
|
||||||
|
|
||||||
|
|
||||||
#if UE_TIMING_TRACE
|
|
||||||
stop_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
|
|
||||||
#if DISABLE_LOG_X
|
|
||||||
printf("[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_tti_rx,ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
|
|
||||||
printf("[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_tti_rx,ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
|
|
||||||
#else
|
|
||||||
LOG_D(PHY, "[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_tti_rx,ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
|
|
||||||
LOG_D(PHY, "[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_tti_rx,ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// deactivate dlsch once dlsch proc is done
|
|
||||||
ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0]->active = 0;
|
|
||||||
|
|
||||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
|
|
||||||
|
|
||||||
}
|
|
||||||
#if UE_TIMING_TRACE
|
#if UE_TIMING_TRACE
|
||||||
start_meas(&ue->generic_stat);
|
start_meas(&ue->generic_stat);
|
||||||
#endif
|
#endif
|
||||||
@@ -1970,48 +1965,6 @@ start_meas(&ue->generic_stat);
|
|||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
// do procedures for P-RNTI
|
|
||||||
if ((ue->dlsch_p[gNB_id]) && (ue->dlsch_p[gNB_id]->active == 1)) {
|
|
||||||
nr_ue_pdsch_procedures(ue,
|
|
||||||
proc,
|
|
||||||
gNB_id,
|
|
||||||
P_PDSCH,
|
|
||||||
ue->dlsch_p[gNB_id],
|
|
||||||
NULL);
|
|
||||||
|
|
||||||
|
|
||||||
/*ue_dlsch_procedures(ue,
|
|
||||||
proc,
|
|
||||||
gNB_id,
|
|
||||||
P_PDSCH,
|
|
||||||
ue->dlsch_p[gNB_id],
|
|
||||||
NULL,
|
|
||||||
&ue->dlsch_p_errors[gNB_id],
|
|
||||||
mode,
|
|
||||||
abstraction_flag);*/
|
|
||||||
ue->dlsch_p[gNB_id]->active = 0;
|
|
||||||
}
|
|
||||||
// do procedures for RA-RNTI
|
|
||||||
if ((ue->dlsch_ra[gNB_id]) && (ue->dlsch_ra[gNB_id]->active == 1)) {
|
|
||||||
nr_ue_pdsch_procedures(ue,
|
|
||||||
proc,
|
|
||||||
gNB_id,
|
|
||||||
RA_PDSCH,
|
|
||||||
ue->dlsch_ra[gNB_id],
|
|
||||||
NULL);
|
|
||||||
|
|
||||||
/*ue_dlsch_procedures(ue,
|
|
||||||
proc,
|
|
||||||
gNB_id,
|
|
||||||
RA_PDSCH,
|
|
||||||
ue->dlsch_ra[gNB_id],
|
|
||||||
NULL,
|
|
||||||
&ue->dlsch_ra_errors[gNB_id],
|
|
||||||
mode,
|
|
||||||
abstraction_flag);*/
|
|
||||||
ue->dlsch_ra[gNB_id]->active = 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
// duplicate harq structure
|
// duplicate harq structure
|
||||||
/*
|
/*
|
||||||
uint8_t current_harq_pid = ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0]->current_harq_pid;
|
uint8_t current_harq_pid = ue->dlsch[ue->current_thread_id[nr_tti_rx]][gNB_id][0]->current_harq_pid;
|
||||||
@@ -2078,6 +2031,10 @@ LOG_D(PHY, "------FULL RX PROC [SFN %d]: %5.2f ------\n",nr_tti_rx,ue->phy_proc_
|
|||||||
//#endif //pdsch
|
//#endif //pdsch
|
||||||
|
|
||||||
LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
|
LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
|
||||||
|
|
||||||
|
// }
|
||||||
|
|
||||||
|
|
||||||
return (0);
|
return (0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -443,10 +443,9 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){
|
|||||||
mac->coreset0->frequencyDomainResources.size = 6;
|
mac->coreset0->frequencyDomainResources.size = 6;
|
||||||
mac->coreset0->frequencyDomainResources.bits_unused = 3;
|
mac->coreset0->frequencyDomainResources.bits_unused = 3;
|
||||||
mac->coreset0->duration = 1;
|
mac->coreset0->duration = 1;
|
||||||
//mac->coreset0->cce_REG_MappingType.present = NR_ControlResourceSet__cce_REG_MappingType_PR_nonInterleaved; // FIXME: Interleaved
|
|
||||||
mac->coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*mac->coreset0->cce_REG_MappingType.choice.interleaved));
|
mac->coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*mac->coreset0->cce_REG_MappingType.choice.interleaved));
|
||||||
mac->coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2;
|
mac->coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2;
|
||||||
mac->coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = 0; //scc->physCellId;
|
mac->coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = 0; // FIXME: mac->scc->physCellId;
|
||||||
mac->coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
|
mac->coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
|
||||||
if(mac->coreset0->tci_StatesPDCCH_ToAddList == NULL) mac->coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*mac->coreset0->tci_StatesPDCCH_ToAddList));
|
if(mac->coreset0->tci_StatesPDCCH_ToAddList == NULL) mac->coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*mac->coreset0->tci_StatesPDCCH_ToAddList));
|
||||||
NR_TCI_StateId_t *tci[8];
|
NR_TCI_StateId_t *tci[8];
|
||||||
|
|||||||
@@ -170,24 +170,10 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
|
|||||||
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
|
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
|
||||||
|
|
||||||
rel15->rnti = 0xFFFF; // SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values
|
rel15->rnti = 0xFFFF; // SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values
|
||||||
|
rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
|
||||||
rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
|
rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
|
||||||
rel15->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
|
|
||||||
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
|
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
|
||||||
|
|
||||||
//rel15->BWPSize = NRRIV2BW(bwp_Common->genericParameters.locationAndBandwidth, 275);
|
|
||||||
//rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275);
|
|
||||||
//rel15->SubcarrierSpacing = bwp_Common->genericParameters.subcarrierSpacing;
|
|
||||||
|
|
||||||
//rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
|
|
||||||
//rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
|
|
||||||
//rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
|
|
||||||
|
|
||||||
printf("nr_ue_dci_configuration: rnti = %i\n", rel15->rnti);
|
|
||||||
printf("nr_ue_dci_configuration: BWPSize = %i\n", rel15->BWPSize);
|
|
||||||
printf("nr_ue_dci_configuration: BWPStart = %i\n", rel15->BWPStart);
|
|
||||||
printf("nr_ue_dci_configuration: SubcarrierSpacing = %i\n", rel15->SubcarrierSpacing);
|
|
||||||
|
|
||||||
for (int i = 0; i < rel15->num_dci_options; i++) {
|
for (int i = 0; i < rel15->num_dci_options; i++) {
|
||||||
rel15->dci_length_options[i] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0);
|
rel15->dci_length_options[i] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -2712,9 +2712,9 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
|
|||||||
dlsch_config_pdu->start_symbol=S;
|
dlsch_config_pdu->start_symbol=S;
|
||||||
dlsch_config_pdu->number_symbols=L;
|
dlsch_config_pdu->number_symbols=L;
|
||||||
|
|
||||||
LOG_D(MAC,"SLIV = %i\n", startSymbolAndLength);
|
LOG_I(MAC,"SLIV = %i\n", startSymbolAndLength);
|
||||||
LOG_D(MAC,"start_symbol = %i\n", dlsch_config_pdu->start_symbol);
|
LOG_I(MAC,"start_symbol = %i\n", dlsch_config_pdu->start_symbol);
|
||||||
LOG_D(MAC,"number_symbols = %i\n", dlsch_config_pdu->number_symbols);
|
LOG_I(MAC,"number_symbols = %i\n", dlsch_config_pdu->number_symbols);
|
||||||
|
|
||||||
}
|
}
|
||||||
else {// Default configuration from tables
|
else {// Default configuration from tables
|
||||||
@@ -3247,28 +3247,28 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
|
|||||||
NR_ServingCellConfigCommon_t *scc = mac->scc;
|
NR_ServingCellConfigCommon_t *scc = mac->scc;
|
||||||
NR_BWP_DownlinkCommon_t *initialDownlinkBWP = scc->downlinkConfigCommon->initialDownlinkBWP;
|
NR_BWP_DownlinkCommon_t *initialDownlinkBWP = scc->downlinkConfigCommon->initialDownlinkBWP;
|
||||||
|
|
||||||
dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
|
if (mac->RA_window_cnt >= 0 && rnti == mac->ra_rnti){
|
||||||
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
|
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH;
|
||||||
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
|
dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
|
||||||
|
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
|
||||||
//dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
|
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
|
||||||
//dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
|
}
|
||||||
//dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
|
else if(rnti == SI_RNTI) {
|
||||||
|
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH;
|
||||||
//dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
|
dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
|
||||||
//dlsch_config_pdu_1_0->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
|
dlsch_config_pdu_1_0->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
|
||||||
//dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
|
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
|
||||||
|
}
|
||||||
printf("nr_ue_procedures: rnti = %i\n", rnti);
|
else {
|
||||||
printf("nr_ue_procedures: BWPSize = %i\n", dlsch_config_pdu_1_0->BWPSize);
|
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
|
||||||
printf("nr_ue_procedures: BWPStart = %i\n", dlsch_config_pdu_1_0->BWPStart);
|
dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||||
printf("nr_ue_procedures: SubcarrierSpacing = %i\n", dlsch_config_pdu_1_0->SubcarrierSpacing);
|
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||||
|
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
|
||||||
|
}
|
||||||
|
|
||||||
/* IDENTIFIER_DCI_FORMATS */
|
/* IDENTIFIER_DCI_FORMATS */
|
||||||
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
|
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
|
||||||
// TODO: Check if dlsch_config_pdu_1_0->BWPSize is correct
|
|
||||||
nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,dlsch_config_pdu_1_0->BWPSize,dci->frequency_domain_assignment.val);
|
nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,dlsch_config_pdu_1_0->BWPSize,dci->frequency_domain_assignment.val);
|
||||||
//nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,n_RB_DLBWP,dci->frequency_domain_assignment.val);
|
|
||||||
|
|
||||||
/* TIME_DOM_RESOURCE_ASSIGNMENT */
|
/* TIME_DOM_RESOURCE_ASSIGNMENT */
|
||||||
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val) < 0)
|
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val) < 0)
|
||||||
@@ -3349,16 +3349,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
|
|||||||
dlsch_config_pdu_1_0->pucch_resource_id,
|
dlsch_config_pdu_1_0->pucch_resource_id,
|
||||||
dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind);
|
dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind);
|
||||||
|
|
||||||
if (mac->RA_window_cnt >= 0 && rnti == mac->ra_rnti){
|
|
||||||
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH;
|
|
||||||
}
|
|
||||||
else if(rnti == SI_RNTI) {
|
|
||||||
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH;
|
|
||||||
}
|
|
||||||
else {
|
|
||||||
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
|
|
||||||
}
|
|
||||||
|
|
||||||
// dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP;
|
// dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP;
|
||||||
|
|
||||||
LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type);
|
LOG_D(MAC,"(nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type);
|
||||||
@@ -3640,9 +3630,6 @@ void nr_ue_send_sdu(module_id_t module_idP,
|
|||||||
// N_RB configuration according to 7.3.1.0 (DCI size alignment) of TS 38.212
|
// N_RB configuration according to 7.3.1.0 (DCI size alignment) of TS 38.212
|
||||||
int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){
|
int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){
|
||||||
|
|
||||||
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
|
|
||||||
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
|
|
||||||
|
|
||||||
int N_RB = 0, start_RB;
|
int N_RB = 0, start_RB;
|
||||||
switch(rnti_type) {
|
switch(rnti_type) {
|
||||||
case NR_RNTI_RA:
|
case NR_RNTI_RA:
|
||||||
@@ -3659,7 +3646,7 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){
|
|||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case NR_RNTI_SI:
|
case NR_RNTI_SI:
|
||||||
N_RB = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
|
N_RB = mac->type0_PDCCH_CSS_config.num_rbs;
|
||||||
break;
|
break;
|
||||||
case NR_RNTI_C:
|
case NR_RNTI_C:
|
||||||
N_RB = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, 275);
|
N_RB = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, 275);
|
||||||
|
|||||||
@@ -186,13 +186,10 @@ void schedule_control_sib1(module_id_t module_id,
|
|||||||
gNB_mac->sched_ctrlCommon->coreset = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->coreset));
|
gNB_mac->sched_ctrlCommon->coreset = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->coreset));
|
||||||
gNB_mac->sched_ctrlCommon->active_bwp = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->active_bwp));
|
gNB_mac->sched_ctrlCommon->active_bwp = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon->active_bwp));
|
||||||
fill_default_searchSpaceZero(gNB_mac->sched_ctrlCommon->search_space);
|
fill_default_searchSpaceZero(gNB_mac->sched_ctrlCommon->search_space);
|
||||||
fill_default_coresetZero(gNB_mac->sched_ctrlCommon->coreset);
|
fill_default_coresetZero(gNB_mac->sched_ctrlCommon->coreset,servingcellconfigcommon);
|
||||||
fill_default_initialDownlinkBWP(gNB_mac->sched_ctrlCommon->active_bwp,servingcellconfigcommon);
|
fill_default_initialDownlinkBWP(gNB_mac->sched_ctrlCommon->active_bwp,servingcellconfigcommon);
|
||||||
}
|
}
|
||||||
|
|
||||||
//gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->genericParameters.locationAndBandwidth =
|
|
||||||
// gNB_mac->secondaryCellGroupCommon->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.locationAndBandwidth;
|
|
||||||
|
|
||||||
gNB_mac->sched_ctrlCommon->time_domain_allocation = time_domain_allocation;
|
gNB_mac->sched_ctrlCommon->time_domain_allocation = time_domain_allocation;
|
||||||
gNB_mac->sched_ctrlCommon->mcsTableIdx = mcsTableIdx;
|
gNB_mac->sched_ctrlCommon->mcsTableIdx = mcsTableIdx;
|
||||||
gNB_mac->sched_ctrlCommon->mcs = mcs;
|
gNB_mac->sched_ctrlCommon->mcs = mcs;
|
||||||
@@ -215,27 +212,21 @@ void schedule_control_sib1(module_id_t module_id,
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
const uint16_t bwpSize = NRRIV2BW(gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
|
const uint16_t bwpSize = gNB_mac->type0_PDCCH_CSS_config.num_rbs;
|
||||||
int rbStart = NRRIV2PRBOFFSET(gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
|
int rbStart = gNB_mac->type0_PDCCH_CSS_config.cset_start_rb;
|
||||||
|
|
||||||
printf("====== rel15->BWPSize = %i\n", bwpSize);
|
|
||||||
printf("====== rel15->BWPStart = %i\n", rbStart);
|
|
||||||
|
|
||||||
// Freq-domain allocation
|
|
||||||
while (rbStart < bwpSize && vrb_map[rbStart]) rbStart++;
|
|
||||||
|
|
||||||
// Calculate number of PRB_DMRS
|
// Calculate number of PRB_DMRS
|
||||||
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6;
|
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6;
|
||||||
|
|
||||||
// Calculate number of symbols
|
// Calculate number of symbols
|
||||||
struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
|
struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
|
||||||
//tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength = 53;
|
|
||||||
const int startSymbolAndLength = tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength;
|
const int startSymbolAndLength = tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength;
|
||||||
int startSymbolIndex, nrOfSymbols;
|
int startSymbolIndex, nrOfSymbols;
|
||||||
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
|
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
|
||||||
|
|
||||||
//startSymbolIndex = 3;
|
LOG_I(MAC,"SLIV = %i\n", startSymbolAndLength);
|
||||||
//nrOfSymbols = 12;
|
LOG_I(MAC,"startSymbolIndex = %i\n", startSymbolIndex);
|
||||||
|
LOG_I(MAC,"nrOfSymbols = %i\n", nrOfSymbols);
|
||||||
|
|
||||||
int rbSize = 0;
|
int rbSize = 0;
|
||||||
uint32_t TBS = 0;
|
uint32_t TBS = 0;
|
||||||
@@ -246,16 +237,12 @@ void schedule_control_sib1(module_id_t module_id,
|
|||||||
rbSize, nrOfSymbols, N_PRB_DMRS,0, 0,1) >> 3;
|
rbSize, nrOfSymbols, N_PRB_DMRS,0, 0,1) >> 3;
|
||||||
} while (rbStart + rbSize < bwpSize && !vrb_map[rbStart + rbSize] && TBS < gNB_mac->sched_ctrlCommon->num_total_bytes);
|
} while (rbStart + rbSize < bwpSize && !vrb_map[rbStart + rbSize] && TBS < gNB_mac->sched_ctrlCommon->num_total_bytes);
|
||||||
gNB_mac->sched_ctrlCommon->rbSize = rbSize;
|
gNB_mac->sched_ctrlCommon->rbSize = rbSize;
|
||||||
|
gNB_mac->sched_ctrlCommon->rbStart = 0;
|
||||||
if(rbStart >= gNB_mac->type0_PDCCH_CSS_config.cset_start_rb) {
|
|
||||||
gNB_mac->sched_ctrlCommon->rbStart = rbStart - gNB_mac->type0_PDCCH_CSS_config.cset_start_rb;
|
|
||||||
}
|
|
||||||
|
|
||||||
// Mark the corresponding RBs as used
|
// Mark the corresponding RBs as used
|
||||||
for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->rbSize; rb++) {
|
for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->rbSize; rb++) {
|
||||||
vrb_map[rb + rbStart] = 1;
|
vrb_map[rb + rbStart] = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
|
void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
|
||||||
@@ -289,8 +276,9 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
|
|||||||
pdsch_pdu_rel15->rnti = SI_RNTI;
|
pdsch_pdu_rel15->rnti = SI_RNTI;
|
||||||
pdsch_pdu_rel15->pduIndex = gNB_mac->pdu_index[0]++;
|
pdsch_pdu_rel15->pduIndex = gNB_mac->pdu_index[0]++;
|
||||||
|
|
||||||
pdsch_pdu_rel15->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
|
pdsch_pdu_rel15->BWPSize = gNB_mac->type0_PDCCH_CSS_config.num_rbs;
|
||||||
pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
|
pdsch_pdu_rel15->BWPStart = gNB_mac->type0_PDCCH_CSS_config.cset_start_rb;
|
||||||
|
|
||||||
pdsch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
|
pdsch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
|
||||||
if (bwp->bwp_Common->genericParameters.cyclicPrefix) {
|
if (bwp->bwp_Common->genericParameters.cyclicPrefix) {
|
||||||
pdsch_pdu_rel15->CyclicPrefix = *bwp->bwp_Common->genericParameters.cyclicPrefix;
|
pdsch_pdu_rel15->CyclicPrefix = *bwp->bwp_Common->genericParameters.cyclicPrefix;
|
||||||
@@ -334,13 +322,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
|
|||||||
dci_pdu_rel15[0].frequency_domain_assignment.val =
|
dci_pdu_rel15[0].frequency_domain_assignment.val =
|
||||||
PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize,
|
PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize,
|
||||||
pdsch_pdu_rel15->rbStart,
|
pdsch_pdu_rel15->rbStart,
|
||||||
NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275));
|
gNB_mac->type0_PDCCH_CSS_config.num_rbs);
|
||||||
|
|
||||||
|
|
||||||
printf("==== pdsch_pdu_rel15->rbSize = %i\n", pdsch_pdu_rel15->rbSize);
|
|
||||||
printf("==== pdsch_pdu_rel15->rbStart = %i\n", pdsch_pdu_rel15->rbStart);
|
|
||||||
printf("==== BW = %i\n", NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275));
|
|
||||||
printf("==== RIV = %i\n", dci_pdu_rel15[0].frequency_domain_assignment.val);
|
|
||||||
|
|
||||||
dci_pdu_rel15[0].time_domain_assignment.val = gNB_mac->sched_ctrlCommon->time_domain_allocation;
|
dci_pdu_rel15[0].time_domain_assignment.val = gNB_mac->sched_ctrlCommon->time_domain_allocation;
|
||||||
dci_pdu_rel15[0].mcs = gNB_mac->sched_ctrlCommon->mcs;
|
dci_pdu_rel15[0].mcs = gNB_mac->sched_ctrlCommon->mcs;
|
||||||
@@ -380,7 +362,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
|
|||||||
LOG_D(MAC,"CyclicPrefix: %i\n", pdcch_pdu_rel15->CyclicPrefix);
|
LOG_D(MAC,"CyclicPrefix: %i\n", pdcch_pdu_rel15->CyclicPrefix);
|
||||||
LOG_D(MAC,"StartSymbolIndex: %i\n", pdcch_pdu_rel15->StartSymbolIndex);
|
LOG_D(MAC,"StartSymbolIndex: %i\n", pdcch_pdu_rel15->StartSymbolIndex);
|
||||||
LOG_D(MAC,"DurationSymbols: %i\n", pdcch_pdu_rel15->DurationSymbols);
|
LOG_D(MAC,"DurationSymbols: %i\n", pdcch_pdu_rel15->DurationSymbols);
|
||||||
for(int n=0;n<6;n++) LOG_I(MAC,"FreqDomainResource[%i]: %x\n",n, pdcch_pdu_rel15->FreqDomainResource[n]);
|
for(int n=0;n<6;n++) LOG_D(MAC,"FreqDomainResource[%i]: %x\n",n, pdcch_pdu_rel15->FreqDomainResource[n]);
|
||||||
LOG_D(MAC,"CceRegMappingType: %i\n", pdcch_pdu_rel15->CceRegMappingType);
|
LOG_D(MAC,"CceRegMappingType: %i\n", pdcch_pdu_rel15->CceRegMappingType);
|
||||||
LOG_D(MAC,"RegBundleSize: %i\n", pdcch_pdu_rel15->RegBundleSize);
|
LOG_D(MAC,"RegBundleSize: %i\n", pdcch_pdu_rel15->RegBundleSize);
|
||||||
LOG_D(MAC,"InterleaverSize: %i\n", pdcch_pdu_rel15->InterleaverSize);
|
LOG_D(MAC,"InterleaverSize: %i\n", pdcch_pdu_rel15->InterleaverSize);
|
||||||
@@ -397,14 +379,14 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
|
|||||||
|
|
||||||
// static values
|
// static values
|
||||||
const int CC_id = 0;
|
const int CC_id = 0;
|
||||||
int time_domain_allocation = 2;
|
int time_domain_allocation = 0;
|
||||||
uint8_t mcsTableIdx = 0;
|
uint8_t mcsTableIdx = 0;
|
||||||
uint8_t mcs = 0;
|
uint8_t mcs = 0;
|
||||||
uint8_t numDmrsCdmGrpsNoData = 1;
|
uint8_t numDmrsCdmGrpsNoData = 1;
|
||||||
|
|
||||||
gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP];
|
gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP];
|
||||||
|
|
||||||
if( (frameP%2 == gNB_mac->type0_PDCCH_CSS_config.sfn_c) && (slotP == gNB_mac->type0_PDCCH_CSS_config.n_0 ) ) {
|
if( (frameP%2 == gNB_mac->type0_PDCCH_CSS_config.sfn_c) && (slotP == gNB_mac->type0_PDCCH_CSS_config.n_0) && (gNB_mac->type0_PDCCH_CSS_config.num_rbs > 0) ) {
|
||||||
|
|
||||||
LOG_D(MAC,"> SIB1 transmission\n");
|
LOG_D(MAC,"> SIB1 transmission\n");
|
||||||
|
|
||||||
@@ -421,17 +403,9 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
|
|||||||
// Calculate number of symbols
|
// Calculate number of symbols
|
||||||
int startSymbolIndex, nrOfSymbols;
|
int startSymbolIndex, nrOfSymbols;
|
||||||
struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
|
struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
|
||||||
//tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength = 53;
|
|
||||||
const int startSymbolAndLength = tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength;
|
const int startSymbolAndLength = tdaList->list.array[gNB_mac->sched_ctrlCommon->time_domain_allocation]->startSymbolAndLength;
|
||||||
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
|
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
|
||||||
|
|
||||||
printf("oooo SLIV = %i\n", startSymbolAndLength);
|
|
||||||
printf("oooo startSymbolIndex = %i\n", startSymbolIndex);
|
|
||||||
printf("oooo nrOfSymbols = %i\n", nrOfSymbols);
|
|
||||||
|
|
||||||
//startSymbolIndex = 3;
|
|
||||||
//nrOfSymbols = 12;
|
|
||||||
|
|
||||||
// Calculate number of PRB_DMRS
|
// Calculate number of PRB_DMRS
|
||||||
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6;
|
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6;
|
||||||
|
|
||||||
@@ -439,10 +413,6 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
|
|||||||
nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx),
|
nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx),
|
||||||
gNB_mac->sched_ctrlCommon->rbSize, nrOfSymbols, N_PRB_DMRS,0 ,0 ,1 ) >> 3;
|
gNB_mac->sched_ctrlCommon->rbSize, nrOfSymbols, N_PRB_DMRS,0 ,0 ,1 ) >> 3;
|
||||||
|
|
||||||
|
|
||||||
printf("TBS = %i\n", TBS);
|
|
||||||
printf("gNB_mac->sched_ctrlCommon->rbSize = %i\n", gNB_mac->sched_ctrlCommon->rbSize);
|
|
||||||
|
|
||||||
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
|
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
|
||||||
nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, TBS, startSymbolIndex, nrOfSymbols);
|
nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, TBS, startSymbolIndex, nrOfSymbols);
|
||||||
|
|
||||||
@@ -460,9 +430,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
|
|||||||
gNB_mac->TX_req[CC_id].Number_of_PDUs++;
|
gNB_mac->TX_req[CC_id].Number_of_PDUs++;
|
||||||
gNB_mac->TX_req[CC_id].SFN = frameP;
|
gNB_mac->TX_req[CC_id].SFN = frameP;
|
||||||
gNB_mac->TX_req[CC_id].Slot = slotP;
|
gNB_mac->TX_req[CC_id].Slot = slotP;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@@ -73,7 +73,7 @@ void rrc_remove_nsa_user(gNB_RRC_INST *rrc, int rnti);
|
|||||||
|
|
||||||
void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfigCommon_t *servingcellconfigcommon);
|
void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfigCommon_t *servingcellconfigcommon);
|
||||||
|
|
||||||
void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0);
|
void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0, NR_ServingCellConfigCommon_t *servingcellconfigcommon);
|
||||||
|
|
||||||
void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0);
|
void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0);
|
||||||
|
|
||||||
|
|||||||
@@ -73,7 +73,7 @@ void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfi
|
|||||||
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0;
|
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0) {
|
void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0, NR_ServingCellConfigCommon_t *servingcellconfigcommon) {
|
||||||
|
|
||||||
coreset0->controlResourceSetId = 0;
|
coreset0->controlResourceSetId = 0;
|
||||||
|
|
||||||
@@ -88,10 +88,9 @@ void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0) {
|
|||||||
coreset0->frequencyDomainResources.size = 6;
|
coreset0->frequencyDomainResources.size = 6;
|
||||||
coreset0->frequencyDomainResources.bits_unused = 3;
|
coreset0->frequencyDomainResources.bits_unused = 3;
|
||||||
coreset0->duration = 1;
|
coreset0->duration = 1;
|
||||||
//coreset0->cce_REG_MappingType.present = NR_ControlResourceSet__cce_REG_MappingType_PR_nonInterleaved; // FIXME: Interleaved
|
|
||||||
coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*coreset0->cce_REG_MappingType.choice.interleaved));
|
coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*coreset0->cce_REG_MappingType.choice.interleaved));
|
||||||
coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2;
|
coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2;
|
||||||
coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = 0; //scc->physCellId;
|
coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = servingcellconfigcommon->physCellId;
|
||||||
coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
|
coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
|
||||||
|
|
||||||
if(coreset0->tci_StatesPDCCH_ToAddList == NULL) coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*coreset0->tci_StatesPDCCH_ToAddList));
|
if(coreset0->tci_StatesPDCCH_ToAddList == NULL) coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*coreset0->tci_StatesPDCCH_ToAddList));
|
||||||
|
|||||||
Reference in New Issue
Block a user