Coreset0 / SIB1 configured using the configuration file.
This commit is contained in:
@@ -211,7 +211,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
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(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
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frame_parms->ofdm_symbol_size,
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15);
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}
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@@ -269,11 +269,13 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
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/// Resource mapping
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// Non interleaved VRB to PRB mapping
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/*uint16_t start_sc = frame_parms->first_carrier_offset + (rel15->rbStart+rel15->BWPStart)*NR_NB_SC_PER_RB;*/
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uint16_t start_sc = frame_parms->first_carrier_offset + (rel15->rbStart+rel15->BWPStart)*NR_NB_SC_PER_RB;
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uint16_t start_sc = frame_parms->first_carrier_offset + rel15->rbStart*NR_NB_SC_PER_RB;
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printf(">>>> start_sc = %i\n", start_sc);
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printf("nr_dlsch: rel15->BWPStart = %i\n", rel15->BWPStart);
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printf("nr_dlsch: rel15->rbStart = %i\n", rel15->rbStart);
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printf("nr_dlsch: frame_parms->first_carrier_offset = %i\n", frame_parms->first_carrier_offset);
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printf("nr_dlsch: start_sc = %i\n", start_sc);
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if (start_sc >= frame_parms->ofdm_symbol_size)
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@@ -645,6 +645,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
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unsigned char Ns,
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unsigned short p,
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unsigned char symbol,
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unsigned short BWPStart,
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unsigned short bwp_start_subcarrier,
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unsigned short nb_rb_pdsch)
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{
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@@ -715,7 +716,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
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// generate pilot
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uint16_t rb_offset = (bwp_start_subcarrier - ue->frame_parms.first_carrier_offset) / 12;
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uint16_t rb_offset = (bwp_start_subcarrier - ue->frame_parms.first_carrier_offset) / 12 - BWPStart;
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int config_type = 0; // needs to be updated from higher layer
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nr_pdsch_dmrs_rx(ue,Ns,ue->nr_gold_pdsch[eNB_offset][Ns][0], &pilot[0],1000,0,nb_rb_pdsch+rb_offset);
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@@ -868,7 +869,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
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dl_ch,
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8);
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//}
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// check if PRB crosses DC and improve estimates around DC
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if ((bwp_start_subcarrier < ue->frame_parms.ofdm_symbol_size) && (bwp_start_subcarrier+nb_rb_pdsch*12 >= ue->frame_parms.ofdm_symbol_size)) {
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dl_ch = (int16_t *)&dl_ch_estimates[aarx][ch_offset];
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@@ -931,7 +932,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
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}
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printf("%d\n",idxP);
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}
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#endif
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#endif
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}
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return(0);
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@@ -69,6 +69,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
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unsigned char Ns,
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unsigned short p,
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unsigned char symbol,
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unsigned short BWPStart,
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unsigned short bwp_start_subcarrier,
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unsigned short nb_rb_pdsch);
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@@ -605,6 +605,8 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
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ret = 1 + dlsch->max_ldpc_iterations;
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}
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getchar();
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nb_total_decod++;
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if (no_iteration_ldpc > dlsch->max_ldpc_iterations){
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nb_error_decod++;
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@@ -373,7 +373,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
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pdsch_vars[eNB_id]->pmi_ext,
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symbol,
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pilots,
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start_rb,
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start_rb + dlsch0_harq->BWPStart,
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nb_rb_pdsch,
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nr_tti_rx,
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ue->high_speed_flag,
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@@ -1019,7 +1019,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
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return(-1);
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break;
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}
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}
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}
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//nr_dlsch_deinterleaving(symbol,bundle_L,(int16_t*)pllr_symbol_cw0,(int16_t*)pllr_symbol_cw0_deint, nb_rb_pdsch);
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@@ -2374,11 +2374,6 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
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k = frame_parms->first_carrier_offset + NR_NB_SC_PER_RB*start_rb;
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printf("k = %i\n", k);
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printf("frame_parms->first_carrier_offset = %i\n", frame_parms->first_carrier_offset);
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printf("nr_dlsch_extract_rbs_single: start_rb = %i\n", start_rb);
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//getchar();
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if (high_speed_flag == 1)
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dl_ch0 = &dl_ch_estimates[aarx][(2*(frame_parms->ofdm_symbol_size))];
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else
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@@ -728,25 +728,16 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
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// do channel estimation for first DMRS only
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for (m = s0; m < 3; m++) {
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if (((1<<m)&dlsch0->harq_processes[harq_pid]->dlDmrsSymbPos) > 0) {
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nr_pdsch_channel_estimation(ue,
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0 /*eNB_id*/,
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nr_tti_rx,
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0 /*p*/,
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m,
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ue->frame_parms.first_carrier_offset+pdsch_start_rb*12,
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pdsch_nb_rb);
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printf("===== Total = %i\n", ue->frame_parms.first_carrier_offset+(BWPStart + pdsch_start_rb)*12);
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printf("===== ue->frame_parms.first_carrier_offset = %i\n", ue->frame_parms.first_carrier_offset);
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printf("===== BWPStart = %i\n", BWPStart);
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printf("===== pdsch_start_rb = %i\n", pdsch_start_rb);
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printf("===== pdsch_nb_rb = %i\n", pdsch_nb_rb);
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//getchar();
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LOG_D(PHY,"Channel Estimation in symbol %d\n",m);
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break;
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nr_pdsch_channel_estimation(ue,
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0 /*eNB_id*/,
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nr_tti_rx,
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0 /*p*/,
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m,
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BWPStart,
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ue->frame_parms.first_carrier_offset+(BWPStart+pdsch_start_rb)*12,
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pdsch_nb_rb);
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LOG_D(PHY,"Channel Estimation in symbol %d\n",m);
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break;
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}
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}
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for (m = s0; m < (s1 + s0); m++) {
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@@ -1840,7 +1831,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
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SI_PDSCH,
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ue->dlsch_SI[gNB_id],
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NULL);
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nr_ue_dlsch_procedures(ue,
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proc,
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gNB_id,
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@@ -1126,24 +1126,6 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
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fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15 = dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
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/*printf("\n===================================================\n");
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LOG_I(MAC,"rnti: %i\n", dci_config_rel15.rnti);
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LOG_I(MAC,"pdcch_pdu_rel15->BWPSize: %i\n", dci_config_rel15.BWPSize);
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LOG_I(MAC,"pdcch_pdu_rel15->BWPStart: %i\n", dci_config_rel15.BWPStart);
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LOG_I(MAC,"pdcch_pdu_rel15->SubcarrierSpacing: %i\n", dci_config_rel15.SubcarrierSpacing);
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//LOG_I(MAC,"pdcch_pdu_rel15->CyclicPrefix: %i\n", dci_config_rel15.coreset.CyclicPrefix);
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LOG_I(MAC,"pdcch_pdu_rel15->StartSymbolIndex: %i\n", dci_config_rel15.coreset.StartSymbolIndex);
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LOG_I(MAC,"pdcch_pdu_rel15->DurationSymbols: %i\n", dci_config_rel15.coreset.duration);
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for(int n=0;n<6;n++) LOG_I(MAC,"pdcch_pdu_rel15->FreqDomainResource[%i]: %x\n",n, dci_config_rel15.coreset.frequency_domain_resource[n]);
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LOG_I(MAC,"pdcch_pdu_rel15->CceRegMappingType: %i\n", dci_config_rel15.coreset.CceRegMappingType);
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LOG_I(MAC,"pdcch_pdu_rel15->RegBundleSize: %i\n", dci_config_rel15.coreset.RegBundleSize);
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LOG_I(MAC,"pdcch_pdu_rel15->InterleaverSize: %i\n", dci_config_rel15.coreset.InterleaverSize);
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LOG_I(MAC,"pdcch_pdu_rel15->CoreSetType: %i\n", dci_config_rel15.coreset.CoreSetType);
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LOG_I(MAC,"pdcch_pdu_rel15->ShiftIndex: %i\n", dci_config_rel15.coreset.ShiftIndex);
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LOG_I(MAC,"pdcch_pdu_rel15->precoderGranularity: %i\n", dci_config_rel15.coreset.precoder_granularity);
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LOG_I(MAC,"pdcch_pdu_rel15->numDlDci: %i\n", dl_config->number_pdus);
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printf("\n===================================================\n");*/
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} else if (ul_info) {
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if (get_softmodem_params()->phy_test && ul_info->slot_tx == 8) { // ULSCH is handled only in phy-test mode (consistently with OAI gNB)
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@@ -2561,13 +2543,10 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
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dlsch_config_pdu->number_rbs = NRRIV2BW(riv,n_RB_DLBWP);
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dlsch_config_pdu->start_rb = NRRIV2PRBOFFSET(riv,n_RB_DLBWP);
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printf("nr_ue_process_dci_freq_dom_resource_assignment: riv = %i\n", riv);
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printf("nr_ue_process_dci_freq_dom_resource_assignment: n_RB_DLBWP = %i\n", n_RB_DLBWP);
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printf("nr_ue_process_dci_freq_dom_resource_assignment: dlsch_config_pdu->number_rbs = %i\n", dlsch_config_pdu->number_rbs);
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printf("nr_ue_process_dci_freq_dom_resource_assignment: dlsch_config_pdu->start_rb = %i\n", dlsch_config_pdu->start_rb);
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LOG_D(MAC,"riv = %i\n", riv);
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LOG_D(MAC,"n_RB_DLBWP = %i\n", n_RB_DLBWP);
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LOG_D(MAC,"number_rbs = %i\n", dlsch_config_pdu->number_rbs);
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LOG_D(MAC,"start_rb = %i\n", dlsch_config_pdu->start_rb);
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}
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if(pusch_config_pdu != NULL){
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@@ -2733,11 +2712,9 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
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dlsch_config_pdu->start_symbol=S;
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dlsch_config_pdu->number_symbols=L;
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printf("SLIV = %i\n", startSymbolAndLength);
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printf("dlsch_config_pdu->start_symbol = %i\n", dlsch_config_pdu->start_symbol);
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printf("dlsch_config_pdu->number_symbols = %i\n", dlsch_config_pdu->number_symbols);
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LOG_D(MAC,"SLIV = %i\n", startSymbolAndLength);
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LOG_D(MAC,"start_symbol = %i\n", dlsch_config_pdu->start_symbol);
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LOG_D(MAC,"number_symbols = %i\n", dlsch_config_pdu->number_symbols);
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}
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else {// Default configuration from tables
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@@ -307,7 +307,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
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pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
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pdsch_pdu_rel15->nrOfLayers = 1;
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pdsch_pdu_rel15->transmissionScheme = 0;
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pdsch_pdu_rel15->refPoint = 0; // Point A FIXME 1
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pdsch_pdu_rel15->refPoint = 1;
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pdsch_pdu_rel15->dmrsConfigType = gNB_mac->sched_ctrlCommon->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
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pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId;
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pdsch_pdu_rel15->SCID = 0;
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@@ -316,7 +316,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
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pdsch_pdu_rel15->resourceAlloc = 1;
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pdsch_pdu_rel15->rbStart = gNB_mac->sched_ctrlCommon->rbStart;
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pdsch_pdu_rel15->rbSize = gNB_mac->sched_ctrlCommon->rbSize;
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pdsch_pdu_rel15->VRBtoPRBMapping = 1; // FIXME 0
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pdsch_pdu_rel15->VRBtoPRBMapping = 0;
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pdsch_pdu_rel15->qamModOrder[0] = nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx);
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pdsch_pdu_rel15->TBSize[0] = TBS;
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pdsch_pdu_rel15->mcsTable[0] = gNB_mac->sched_ctrlCommon->mcsTableIdx;
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@@ -325,10 +325,6 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
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pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(bwp->bwp_Dedicated->pdsch_Config->choice.setup, scc->dmrs_TypeA_Position, pdsch_pdu_rel15->NrOfSymbols);
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printf("oooo scc->dmrs_TypeA_Position = %li\n", scc->dmrs_TypeA_Position);
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dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET];
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memset(dci_pdu_rel15, 0, sizeof(dci_pdu_rel15_t) * MAX_DCI_CORESET);
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@@ -346,7 +342,6 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
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printf("==== BW = %i\n", NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275));
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printf("==== RIV = %i\n", dci_pdu_rel15[0].frequency_domain_assignment.val);
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dci_pdu_rel15[0].time_domain_assignment.val = gNB_mac->sched_ctrlCommon->time_domain_allocation;
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dci_pdu_rel15[0].mcs = gNB_mac->sched_ctrlCommon->mcs;
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dci_pdu_rel15[0].rv = pdsch_pdu_rel15->rvIndex[0];
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@@ -379,22 +374,20 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
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dl_req->nPDUs += 2;
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printf("\n===================================================\n");
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LOG_I(MAC,"pdcch_pdu_rel15->BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
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LOG_I(MAC,"pdcch_pdu_rel15->BWPStart: %i\n", pdcch_pdu_rel15->BWPStart);
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LOG_I(MAC,"pdcch_pdu_rel15->SubcarrierSpacing: %i\n", pdcch_pdu_rel15->SubcarrierSpacing);
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LOG_I(MAC,"pdcch_pdu_rel15->CyclicPrefix: %i\n", pdcch_pdu_rel15->CyclicPrefix);
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LOG_I(MAC,"pdcch_pdu_rel15->StartSymbolIndex: %i\n", pdcch_pdu_rel15->StartSymbolIndex);
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LOG_I(MAC,"pdcch_pdu_rel15->DurationSymbols: %i\n", pdcch_pdu_rel15->DurationSymbols);
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for(int n=0;n<6;n++) LOG_I(MAC,"pdcch_pdu_rel15->FreqDomainResource[%i]: %x\n",n, pdcch_pdu_rel15->FreqDomainResource[n]);
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LOG_I(MAC,"pdcch_pdu_rel15->CceRegMappingType: %i\n", pdcch_pdu_rel15->CceRegMappingType);
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LOG_I(MAC,"pdcch_pdu_rel15->RegBundleSize: %i\n", pdcch_pdu_rel15->RegBundleSize);
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LOG_I(MAC,"pdcch_pdu_rel15->InterleaverSize: %i\n", pdcch_pdu_rel15->InterleaverSize);
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LOG_I(MAC,"pdcch_pdu_rel15->CoreSetType: %i\n", pdcch_pdu_rel15->CoreSetType);
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LOG_I(MAC,"pdcch_pdu_rel15->ShiftIndex: %i\n", pdcch_pdu_rel15->ShiftIndex);
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LOG_I(MAC,"pdcch_pdu_rel15->precoderGranularity: %i\n", pdcch_pdu_rel15->precoderGranularity);
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LOG_I(MAC,"pdcch_pdu_rel15->numDlDci: %i\n", pdcch_pdu_rel15->numDlDci);
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printf("\n===================================================\n");
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LOG_D(MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
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LOG_D(MAC,"BWPStart: %i\n", pdcch_pdu_rel15->BWPStart);
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LOG_D(MAC,"SubcarrierSpacing: %i\n", pdcch_pdu_rel15->SubcarrierSpacing);
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LOG_D(MAC,"CyclicPrefix: %i\n", pdcch_pdu_rel15->CyclicPrefix);
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LOG_D(MAC,"StartSymbolIndex: %i\n", pdcch_pdu_rel15->StartSymbolIndex);
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LOG_D(MAC,"DurationSymbols: %i\n", pdcch_pdu_rel15->DurationSymbols);
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for(int n=0;n<6;n++) LOG_I(MAC,"FreqDomainResource[%i]: %x\n",n, pdcch_pdu_rel15->FreqDomainResource[n]);
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LOG_D(MAC,"CceRegMappingType: %i\n", pdcch_pdu_rel15->CceRegMappingType);
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LOG_D(MAC,"RegBundleSize: %i\n", pdcch_pdu_rel15->RegBundleSize);
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LOG_D(MAC,"InterleaverSize: %i\n", pdcch_pdu_rel15->InterleaverSize);
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LOG_D(MAC,"CoreSetType: %i\n", pdcch_pdu_rel15->CoreSetType);
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LOG_D(MAC,"ShiftIndex: %i\n", pdcch_pdu_rel15->ShiftIndex);
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LOG_D(MAC,"precoderGranularity: %i\n", pdcch_pdu_rel15->precoderGranularity);
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LOG_D(MAC,"numDlDci: %i\n", pdcch_pdu_rel15->numDlDci);
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}
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