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Minor fixes on used BWP of coreset0.

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This commit is contained in:
rmagueta
2020-11-13 18:56:32 +00:00
parent 17312d685f
commit aa676235a3
8 changed files with 59 additions and 22 deletions
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ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf
+1 -1
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@@ -53,7 +53,7 @@ gNBs =
#initialDownlinkBWP
#genericParameters
# this is RBstart=41,L=24 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 12956; #12925; 12956 28875
initialDLBWPlocationAndBandwidth = 12956; #12925; 12956 28875 6366
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
openair1/PHY/NR_TRANSPORT/nr_dci.c
+6 -1
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@@ -31,6 +31,7 @@
*/
#include <LAYER2/NR_MAC_gNB/nr_mac_gNB.h>
#include <LAYER2/NR_MAC_gNB/mac_proto.h>
#include "nr_dci.h"
#include "nr_dlsch.h"
#include "nr_sch_dmrs.h"
@@ -87,7 +88,11 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
cset_start_sc = frame_parms.first_carrier_offset + rb_offset*NR_NB_SC_PER_RB;
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1) {
cset_start_sc = cset_start_sc + RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb*NR_NB_SC_PER_RB;
// cset_start_sc = cset_start_sc + RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb*NR_NB_SC_PER_RB;
gNB_MAC_INST *gNB_mac = RC.nrmac[gNB->Mod_id];
int BWPStart = NRRIV2PRBOFFSET(gNB_mac->sched_ctrlCommon->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
cset_start_sc = cset_start_sc + BWPStart*NR_NB_SC_PER_RB;
}
printf("==== cset_start_sc = %i\n", cset_start_sc);
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
+2 -1
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@@ -269,8 +269,9 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
/// Resource mapping
// Non interleaved VRB to PRB mapping
uint16_t start_sc = frame_parms->first_carrier_offset + (rel15->rbStart+rel15->BWPStart)*NR_NB_SC_PER_RB;
/*uint16_t start_sc = frame_parms->first_carrier_offset + (rel15->rbStart+rel15->BWPStart)*NR_NB_SC_PER_RB;*/
uint16_t start_sc = frame_parms->first_carrier_offset + rel15->rbStart*NR_NB_SC_PER_RB;
printf(">>>> start_sc = %i\n", start_sc);
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
-6
View File
@@ -303,9 +303,6 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pilots = ((1<<symbol)&dlsch0_harq->dlDmrsSymbPos)>0 ? 1 : 0;
if (frame_parms->nb_antenna_ports_gNB>1 && beamforming_mode==0) {
printf("=== 1\n");
#ifdef DEBUG_DLSCH_MOD
LOG_I(PHY,"dlsch: using pmi %x (%p)\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc),dlsch[0]);
#endif
@@ -335,9 +332,6 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#endif
if (rx_type >= rx_IC_single_stream) {
printf("=== 2\n");
if (eNB_id_i<ue->n_connected_eNB) // we are in TM5
nb_rb = nr_dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
pdsch_vars[eNB_id]->dl_ch_estimates,
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+1 -1
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@@ -733,7 +733,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
nr_tti_rx,
0 /*p*/,
m,
ue->frame_parms.first_carrier_offset+(BWPStart + pdsch_start_rb)*12,
ue->frame_parms.first_carrier_offset+pdsch_start_rb*12,
pdsch_nb_rb);
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+15 -6
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@@ -171,14 +171,23 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15->rnti = 0xFFFF; // SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values
//rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
//rel15->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
rel15->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
//rel15->BWPSize = NRRIV2BW(bwp_Common->genericParameters.locationAndBandwidth, 275);
//rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275);
//rel15->SubcarrierSpacing = bwp_Common->genericParameters.subcarrierSpacing;
//rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
//rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
//rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
printf("nr_ue_dci_configuration: rnti = %i\n", rel15->rnti);
printf("nr_ue_dci_configuration: BWPSize = %i\n", rel15->BWPSize);
printf("nr_ue_dci_configuration: BWPStart = %i\n", rel15->BWPStart);
printf("nr_ue_dci_configuration: SubcarrierSpacing = %i\n", rel15->SubcarrierSpacing);
for (int i = 0; i < rel15->num_dci_options; i++) {
rel15->dci_length_options[i] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0);
}
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+33 -5
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@@ -1126,7 +1126,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15 = dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
printf("\n===================================================\n");
/*printf("\n===================================================\n");
LOG_I(MAC,"rnti: %i\n", dci_config_rel15.rnti);
LOG_I(MAC,"pdcch_pdu_rel15->BWPSize: %i\n", dci_config_rel15.BWPSize);
LOG_I(MAC,"pdcch_pdu_rel15->BWPStart: %i\n", dci_config_rel15.BWPStart);
@@ -1142,7 +1142,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
LOG_I(MAC,"pdcch_pdu_rel15->ShiftIndex: %i\n", dci_config_rel15.coreset.ShiftIndex);
LOG_I(MAC,"pdcch_pdu_rel15->precoderGranularity: %i\n", dci_config_rel15.coreset.precoder_granularity);
LOG_I(MAC,"pdcch_pdu_rel15->numDlDci: %i\n", dl_config->number_pdus);
printf("\n===================================================\n");
printf("\n===================================================\n");*/
} else if (ul_info) {
@@ -2561,6 +2561,14 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
dlsch_config_pdu->number_rbs = NRRIV2BW(riv,n_RB_DLBWP);
dlsch_config_pdu->start_rb = NRRIV2PRBOFFSET(riv,n_RB_DLBWP);
printf("nr_ue_process_dci_freq_dom_resource_assignment: riv = %i\n", riv);
printf("nr_ue_process_dci_freq_dom_resource_assignment: n_RB_DLBWP = %i\n", n_RB_DLBWP);
printf("nr_ue_process_dci_freq_dom_resource_assignment: dlsch_config_pdu->number_rbs = %i\n", dlsch_config_pdu->number_rbs);
printf("nr_ue_process_dci_freq_dom_resource_assignment: dlsch_config_pdu->start_rb = %i\n", dlsch_config_pdu->start_rb);
}
if(pusch_config_pdu != NULL){
/*
@@ -3259,14 +3267,31 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
dlsch_config_pdu_1_0->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_BWP_DownlinkCommon_t *initialDownlinkBWP = scc->downlinkConfigCommon->initialDownlinkBWP;
dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
//dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
//dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
//dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
//dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
//dlsch_config_pdu_1_0->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
//dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
printf("nr_ue_procedures: rnti = %i\n", rnti);
printf("nr_ue_procedures: BWPSize = %i\n", dlsch_config_pdu_1_0->BWPSize);
printf("nr_ue_procedures: BWPStart = %i\n", dlsch_config_pdu_1_0->BWPStart);
printf("nr_ue_procedures: SubcarrierSpacing = %i\n", dlsch_config_pdu_1_0->SubcarrierSpacing);
/* IDENTIFIER_DCI_FORMATS */
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
// TODO: Check if dlsch_config_pdu_1_0->BWPSize is correct
nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,dlsch_config_pdu_1_0->BWPSize,dci->frequency_domain_assignment.val);
//nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,n_RB_DLBWP,dci->frequency_domain_assignment.val);
/* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val) < 0)
@@ -3638,6 +3663,9 @@ void nr_ue_send_sdu(module_id_t module_idP,
// N_RB configuration according to 7.3.1.0 (DCI size alignment) of TS 38.212
int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
int N_RB = 0, start_RB;
switch(rnti_type) {
case NR_RNTI_RA:
@@ -3654,7 +3682,7 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){
}
break;
case NR_RNTI_SI:
N_RB = mac->type0_PDCCH_CSS_config.num_rbs;
N_RB = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
break;
case NR_RNTI_C:
N_RB = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, 275);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+1 -1
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@@ -712,7 +712,7 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
} else{
pdcch_pdu->CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG;
}
//precoderGranularity
pdcch_pdu->precoderGranularity = coreset->precoderGranularity;