Patch fairRR scheduler to use slice iface of pre-processor
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@@ -542,6 +542,7 @@ void dlsch_scheduler_pre_processor_fairRR (module_id_t Mod_id,
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uint16_t temp_total_rbs_count;
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unsigned char temp_total_ue_count;
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unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX];
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uint8_t slice_allocation[MAX_NUM_CCs][N_RBG_MAX];
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int UE_id, i;
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uint16_t j;
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uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
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@@ -660,17 +661,22 @@ void dlsch_scheduler_pre_processor_fairRR (module_id_t Mod_id,
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transmission_mode = get_tmode(Mod_id,CC_id,UE_id);
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/* slicing support has been introduced into the scheduler. Provide dummy
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* data so that the preprocessor "simply works" */
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for (int i = 0; i < MAX_NUM_CCs; ++i)
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for (int j = 0; i < N_RBG_MAX; ++j)
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slice_allocation[i][j] = 1;
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LOG_T(MAC,"calling dlsch_scheduler_pre_processor_allocate .. \n ");
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dlsch_scheduler_pre_processor_allocate (Mod_id,
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UE_id,
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CC_id,
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N_RBG[CC_id],
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transmission_mode,
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min_rb_unit[CC_id],
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N_RB_DL,
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(uint16_t (*)[NUMBER_OF_UE_MAX])nb_rbs_required,
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(uint16_t (*)[NUMBER_OF_UE_MAX])nb_rbs_required_remaining,
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rballoc_sub,
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slice_allocation,
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MIMO_mode_indicator);
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temp_total_rbs_count -= ue_sched_ctl->pre_nb_available_rbs[CC_id];
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temp_total_ue_count--;
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