Changes to the logic in nr_ue_dl_indication and nr_ue_prach_scheduler
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+19
-21
@@ -408,8 +408,6 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = precod_nbr_layers;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = harq_pid;
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//nr_ue_prach_scheduler(mod_id, proc->frame_rx, proc->nr_tti_rx);
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nr_ue_scheduled_response(&scheduled_response);
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if (UE->mode != loop_through_memory) {
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@@ -474,23 +472,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
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pdcp_fifo_flush_sdus(&ctxt);
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}
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}
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// no UL for now
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/*
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if (UE->mac_enabled==1) {
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// trigger L2 to run ue_scheduler thru IF module
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// [TODO] mapping right after NR initial sync
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if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) {
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UE->ul_indication.module_id = 0;
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UE->ul_indication.gNB_index = 0;
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UE->ul_indication.cc_id = 0;
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UE->ul_indication.frame = proc->frame_rx;
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UE->ul_indication.slot = proc->nr_tti_rx;
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UE->if_inst->ul_indication(&UE->ul_indication);
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}
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}
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*/
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}
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/*!
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@@ -507,11 +488,15 @@ typedef struct processingData_s {
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} processingData_t;
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void UE_processing(void *arg) {
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processingData_t *rxtxD=(processingData_t *) arg;
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processingData_t *rxtxD = (processingData_t *) arg;
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UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
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PHY_VARS_NR_UE *UE = rxtxD->UE;
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uint8_t gNB_id = 0;
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uint8_t gNB_id = 0, CC_id = 0;
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module_id_t mod_id = 0;
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nr_uplink_indication_t ul_indication;
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memset((void*)&ul_indication, 0, sizeof(ul_indication));
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// params for UL time alignment procedure
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NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &UE->ul_time_alignment[gNB_id];
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@@ -538,6 +523,19 @@ void UE_processing(void *arg) {
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processSlotRX(UE, proc);
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if (UE->mac_enabled == 1) {
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// trigger L2 to run ue_scheduler thru IF module
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// [TODO] mapping right after NR initial sync
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if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) {
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ul_indication.module_id = mod_id;
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ul_indication.gNB_index = gNB_id;
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ul_indication.cc_id = CC_id;
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ul_indication.frame = proc->frame_rx;
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ul_indication.slot = proc->nr_tti_rx;
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UE->if_inst->ul_indication(&ul_indication);
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}
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}
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processSlotTX(UE, proc);
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}
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@@ -766,9 +766,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
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NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric;
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config_index = rach_ConfigGeneric->prach_ConfigurationIndex;
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////nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[module_idP]->UL_tti_req[0];
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if (is_nr_DL_slot(scc, slotP) == 1) {
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if (is_nr_UL_slot(scc, slotP)) {
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if (setup->msg1_SubcarrierSpacing)
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mu = *setup->msg1_SubcarrierSpacing;
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@@ -810,7 +808,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
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ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PRACH;
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prach_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].prach_config_pdu;
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memset(prach_config_pdu,0,sizeof(fapi_nr_ul_config_prach_pdu));
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memset(prach_config_pdu, 0, sizeof(fapi_nr_ul_config_prach_pdu));
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ul_config->number_pdus += 1;
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ncs = get_NCS(rach_ConfigGeneric->zeroCorrelationZoneConfig, format0, setup->restrictedSetConfig);
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@@ -886,6 +884,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
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}
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}
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}
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mac->scheduled_response.ul_config = ul_config;
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}
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}
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@@ -122,6 +122,9 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
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ul_info->ssb_index,
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0, 0); // TODO check tx/rx frame/slot is need for NR version
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/*if (is_nr_UL_slot(mac->scc, ul_info->slot))
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nr_ue_prach_scheduler(module_id, ul_info->frame, ul_info->slot);*/ // WIP TbD set tx frame/slot
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switch(ret){
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case UE_CONNECTION_OK:
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break;
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@@ -135,7 +138,6 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
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break;
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}
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mac->if_module->scheduled_response(&mac->scheduled_response);
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return 0;
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