merge from local dev branch
This commit is contained in:
@@ -2582,7 +2582,7 @@ schedule_ulsch_fairRR(module_id_t module_idP, frame_t frameP,
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frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
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frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
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frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset,
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frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset,
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0,//tdd_mapindex
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0,//tdd_mapindex
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frameP); //Nf
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frameP); //Nf --> shouldn't it be sched_frame ???
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ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].nb_rb = 6;
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ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].nb_rb = 6;
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ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].UE_id = -1;
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ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].UE_id = -1;
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ulsch_ue_select[CC_id].ue_num++;
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ulsch_ue_select[CC_id].ue_num++;
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@@ -305,24 +305,22 @@ subframe2harqpid(COMMON_channels_t *cc,
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} else {
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} else {
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switch (cc->tdd_Config->subframeAssignment) {
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switch (cc->tdd_Config->subframeAssignment) {
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case 1:
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case 1:
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if ((subframe == 2) || (subframe == 3) || (subframe == 7) || (subframe == 8))
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switch (subframe) {
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switch (subframe) {
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case 2:
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case 2:
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case 3:
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case 3:
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ret = (subframe - 2);
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ret = (subframe - 2);
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break;
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break;
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case 7:
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case 7:
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case 8:
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case 8:
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ret = (subframe - 5);
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ret = (subframe - 5);
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break;
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break;
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default:
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AssertFatal(1 == 0, "subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",
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subframe, (int) cc->tdd_Config->subframeAssignment);
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break;
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}
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default:
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AssertFatal(1 == 0, "subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",
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subframe, (int) cc->tdd_Config->subframeAssignment);
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break;
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}
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break;
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break;
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case 2:
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case 2:
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@@ -2622,11 +2620,19 @@ int get_nb_subband(int N_RB_DL) {
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return nb_sb;
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return nb_sb;
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}
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}
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/*
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void init_CCE_table(int module_idP, int CC_idP) {
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void
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init_CCE_table(int module_idP,
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int CC_idP)
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{
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memset(RC.mac[module_idP]->CCE_table[CC_idP], 0, 800 * sizeof(int));
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memset(RC.mac[module_idP]->CCE_table[CC_idP], 0, 800 * sizeof(int));
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}
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}
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*/
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void
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init_CCE_table(int *CCE_table)
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{
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memset(CCE_table, 0, 800 * sizeof(int));
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}
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int
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int
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get_nCCE_offset(int *CCE_table,
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get_nCCE_offset(int *CCE_table,
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@@ -2895,19 +2901,21 @@ allocate_CCEs(int module_idP,
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sub_frame_t subframeP,
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sub_frame_t subframeP,
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int test_onlyP)
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int test_onlyP)
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{
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{
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int *CCE_table = RC.mac[module_idP]->CCE_table[CC_idP];
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eNB_MAC_INST *eNB = RC.mac[module_idP];
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nfapi_dl_config_request_body_t *DL_req = &RC.mac[module_idP]->DL_req[CC_idP].dl_config_request_body;
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int *CCE_table = eNB->CCE_table[CC_idP];
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nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP][subframeP].hi_dci0_request_body;
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nfapi_dl_config_request_body_t *DL_req = &eNB->DL_req[CC_idP].dl_config_request_body;
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nfapi_hi_dci0_request_body_t *HI_DCI0_req = &eNB->HI_DCI0_req[CC_idP][subframeP].hi_dci0_request_body;
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nfapi_dl_config_request_pdu_t *dl_config_pdu = &DL_req->dl_config_pdu_list[0];
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nfapi_dl_config_request_pdu_t *dl_config_pdu = &DL_req->dl_config_pdu_list[0];
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nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[0];
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nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[0];
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int nCCE_max = get_nCCE_max(&RC.mac[module_idP]->common_channels[CC_idP], 1, subframeP);
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COMMON_channels_t *cc = &eNB->common_channels[CC_idP];
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int nCCE_max = get_nCCE_max(cc, 1, subframeP);
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int fCCE;
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int fCCE;
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int i, j, idci;
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int i, j, idci;
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int nCCE = 0;
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int nCCE = 0;
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int max_symbol;
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int max_symbol;
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eNB_MAC_INST *eNB = RC.mac[module_idP];
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COMMON_channels_t *cc = &eNB->common_channels[CC_idP];
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int ackNAK_absSF = get_pucch1_absSF(cc, (frameP*10+subframeP));
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int ackNAK_absSF = get_pucch1_absSF(cc, (frameP*10+subframeP));
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nfapi_dl_config_request_pdu_t *dl_config_pduLoop;
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nfapi_hi_dci0_request_pdu_t *hi_dci0_pduLoop;
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if (cc->tdd_Config!=NULL && is_S_sf(cc,subframeP) > 0)
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if (cc->tdd_Config!=NULL && is_S_sf(cc,subframeP) > 0)
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max_symbol = 2;
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max_symbol = 2;
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@@ -2916,135 +2924,70 @@ allocate_CCEs(int module_idP,
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nfapi_ul_config_request_body_t *ul_req = &eNB->UL_req_tmp[CC_idP][ackNAK_absSF % 10].ul_config_request_body;
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nfapi_ul_config_request_body_t *ul_req = &eNB->UL_req_tmp[CC_idP][ackNAK_absSF % 10].ul_config_request_body;
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LOG_D(MAC, "Allocate CCEs subframe %d, test %d : (DL PDU %d, DL DCI %d, UL %d)\n",
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LOG_D(MAC, "Allocate CCEs subframe %d, test %d : (DL PDU %d, DL DCI %d, UL %d)\n",
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subframeP, test_onlyP, DL_req->number_pdu, DL_req->number_dci,
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subframeP,
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test_onlyP,
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DL_req->number_pdu,
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DL_req->number_dci,
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HI_DCI0_req->number_of_dci);
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HI_DCI0_req->number_of_dci);
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DL_req->number_pdcch_ofdm_symbols = 1;
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DL_req->number_pdcch_ofdm_symbols = 1;
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try_again:
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try_again:
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init_CCE_table(module_idP, CC_idP);
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init_CCE_table(CCE_table);
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nCCE = 0;
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nCCE = 0;
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for (i = 0, idci = 0; i < DL_req->number_pdu; i++) {
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for (i = 0, idci = 0; i < DL_req->number_pdu; i++) {
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dl_config_pduLoop = &dl_config_pdu[i];
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// allocate DL common DCIs first
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// allocate DL common DCIs first
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if ((dl_config_pdu[i].pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE) &&
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if (dl_config_pduLoop->pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE &&
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(dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti_type == 2)) {
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dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type == 2) {
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LOG_D(MAC, "Trying to allocate COMMON DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
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LOG_D(MAC, "Trying to allocate COMMON DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
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idci, DL_req->number_dci + HI_DCI0_req->number_of_dci,
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idci,
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DL_req->number_dci, HI_DCI0_req->number_of_dci,
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DL_req->number_dci + HI_DCI0_req->number_of_dci,
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dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti,
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DL_req->number_dci,
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dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
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HI_DCI0_req->number_of_dci,
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nCCE, nCCE_max, DL_req->number_pdcch_ofdm_symbols);
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dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.rnti,
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dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
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nCCE,
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nCCE_max,
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DL_req->number_pdcch_ofdm_symbols);
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if (nCCE + (dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level) > nCCE_max) {
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if (nCCE + (dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level) > nCCE_max) {
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if (DL_req->number_pdcch_ofdm_symbols == max_symbol)
|
if (DL_req->number_pdcch_ofdm_symbols == max_symbol)
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return -1;
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return -1;
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LOG_D(MAC, "Can't fit DCI allocations with %d PDCCH symbols, increasing by 1\n",
|
LOG_D(MAC, "Can't fit DCI allocations with %d PDCCH symbols, increasing by 1\n",
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DL_req->number_pdcch_ofdm_symbols);
|
DL_req->number_pdcch_ofdm_symbols);
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||||||
DL_req->number_pdcch_ofdm_symbols++;
|
DL_req->number_pdcch_ofdm_symbols++;
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nCCE_max =
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nCCE_max = get_nCCE_max(cc, DL_req->number_pdcch_ofdm_symbols, subframeP);
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get_nCCE_max(&RC.mac[module_idP]->common_channels[CC_idP], DL_req->number_pdcch_ofdm_symbols, subframeP);
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||||||
goto try_again;
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goto try_again;
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}
|
}
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|
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// number of CCEs left can potentially hold this allocation
|
// number of CCEs left can potentially hold this allocation
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fCCE = get_nCCE_offset(CCE_table,
|
fCCE = get_nCCE_offset(CCE_table,
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dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
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aggregation_level, nCCE_max, 1,
|
nCCE_max,
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dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti,
|
1,
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||||||
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.rnti,
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||||||
subframeP);
|
subframeP);
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||||||
|
|
||||||
if (fCCE == -1) {
|
if (fCCE == -1) {
|
||||||
if (DL_req->number_pdcch_ofdm_symbols == max_symbol) {
|
if (DL_req->number_pdcch_ofdm_symbols == max_symbol) {
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||||||
LOG_D(MAC, "subframe %d: Dropping Allocation for RNTI %x\n",
|
LOG_D(MAC, "subframe %d: Dropping Allocation for RNTI %x\n",
|
||||||
subframeP, dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti);
|
subframeP,
|
||||||
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.rnti);
|
||||||
|
|
||||||
for (j = 0; j <= i; j++) {
|
for (j = 0; j <= i; j++) {
|
||||||
if (dl_config_pdu[j].pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)
|
dl_config_pduLoop = &dl_config_pdu[j];
|
||||||
|
if (dl_config_pduLoop->pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)
|
||||||
LOG_D(MAC, "DCI %d/%d (%d,%d) : rnti %x dci format %d, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
|
LOG_D(MAC, "DCI %d/%d (%d,%d) : rnti %x dci format %d, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
|
||||||
j,
|
j,
|
||||||
DL_req->number_dci + HI_DCI0_req->number_of_dci,
|
DL_req->number_dci + HI_DCI0_req->number_of_dci,
|
||||||
DL_req->number_dci,
|
DL_req->number_dci,
|
||||||
HI_DCI0_req->number_of_dci,
|
HI_DCI0_req->number_of_dci,
|
||||||
dl_config_pdu[j].dci_dl_pdu.dci_dl_pdu_rel8.rnti,
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.rnti,
|
||||||
dl_config_pdu[j].dci_dl_pdu.dci_dl_pdu_rel8.dci_format,
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.dci_format,
|
||||||
dl_config_pdu[j].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
|
||||||
nCCE, nCCE_max, DL_req->number_pdcch_ofdm_symbols);
|
|
||||||
}
|
|
||||||
//dump_CCE_table(CCE_table,nCCE_max,subframeP,dci_alloc->rnti,1<<dci_alloc->L);
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
LOG_D(MAC,
|
|
||||||
"Can't fit DCI allocations with %d PDCCH symbols (rnti condition), increasing by 1\n",
|
|
||||||
DL_req->number_pdcch_ofdm_symbols);
|
|
||||||
DL_req->number_pdcch_ofdm_symbols++;
|
|
||||||
nCCE_max =
|
|
||||||
get_nCCE_max(&RC.mac[module_idP]->common_channels[CC_idP], DL_req->number_pdcch_ofdm_symbols, subframeP);
|
|
||||||
goto try_again;
|
|
||||||
} // fCCE==-1
|
|
||||||
|
|
||||||
// the allocation is feasible, rnti rule passes
|
|
||||||
nCCE += dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level;
|
|
||||||
LOG_D(MAC, "Allocating at nCCE %d\n", fCCE);
|
|
||||||
|
|
||||||
if ((test_onlyP%2) == 0) {
|
|
||||||
dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.cce_idx = fCCE;
|
|
||||||
LOG_D(MAC, "Allocate COMMON DCI CCEs subframe %d, test %d => L %d fCCE %d\n",
|
|
||||||
subframeP, test_onlyP, dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level, fCCE);
|
|
||||||
}
|
|
||||||
|
|
||||||
idci++;
|
|
||||||
}
|
|
||||||
} // for i = 0 ... num_DL_DCIs
|
|
||||||
|
|
||||||
// no try to allocate UL DCIs
|
|
||||||
for (i = 0; i < HI_DCI0_req->number_of_dci + HI_DCI0_req->number_of_hi; i++) {
|
|
||||||
// allocate UL DCIs
|
|
||||||
if (hi_dci0_pdu[i].pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE) {
|
|
||||||
LOG_D(MAC, "Trying to allocate format 0 DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
|
|
||||||
idci, DL_req->number_dci + HI_DCI0_req->number_of_dci,
|
|
||||||
DL_req->number_dci, HI_DCI0_req->number_of_dci,
|
|
||||||
hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.rnti,
|
|
||||||
hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.aggregation_level,
|
|
||||||
nCCE, nCCE_max, DL_req->number_pdcch_ofdm_symbols);
|
|
||||||
|
|
||||||
if (nCCE + (hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.aggregation_level) > nCCE_max) {
|
|
||||||
if (DL_req->number_pdcch_ofdm_symbols == max_symbol)
|
|
||||||
return -1;
|
|
||||||
|
|
||||||
LOG_D(MAC, "Can't fit DCI allocations with %d PDCCH symbols, increasing by 1\n",
|
|
||||||
DL_req->number_pdcch_ofdm_symbols);
|
|
||||||
DL_req->number_pdcch_ofdm_symbols++;
|
|
||||||
nCCE_max =
|
|
||||||
get_nCCE_max(&RC.mac[module_idP]->common_channels[CC_idP], DL_req->number_pdcch_ofdm_symbols, subframeP);
|
|
||||||
goto try_again;
|
|
||||||
}
|
|
||||||
|
|
||||||
// number of CCEs left can potentially hold this allocation
|
|
||||||
fCCE = get_nCCE_offset(CCE_table,
|
|
||||||
hi_dci0_pdu[i].dci_pdu.
|
|
||||||
dci_pdu_rel8.aggregation_level,
|
|
||||||
nCCE_max, 0,
|
|
||||||
hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.
|
|
||||||
rnti, subframeP);
|
|
||||||
|
|
||||||
if (fCCE == -1) {
|
|
||||||
if (DL_req->number_pdcch_ofdm_symbols == max_symbol) {
|
|
||||||
LOG_D(MAC, "subframe %d: Dropping Allocation for RNTI %x\n",
|
|
||||||
subframeP, hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.rnti);
|
|
||||||
|
|
||||||
for (j = 0; j <= i; j++) {
|
|
||||||
if (hi_dci0_pdu[j].pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE)
|
|
||||||
LOG_D(MAC, "DCI %d/%d (%d,%d) : rnti %x dci format %d, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
|
|
||||||
j,
|
|
||||||
DL_req->number_dci + HI_DCI0_req->number_of_dci,
|
|
||||||
DL_req->number_dci,
|
|
||||||
HI_DCI0_req->number_of_dci,
|
|
||||||
hi_dci0_pdu[j].dci_pdu.dci_pdu_rel8.rnti,
|
|
||||||
hi_dci0_pdu[j].dci_pdu.dci_pdu_rel8.dci_format,
|
|
||||||
hi_dci0_pdu[j].dci_pdu.dci_pdu_rel8.aggregation_level,
|
|
||||||
nCCE, nCCE_max, DL_req->number_pdcch_ofdm_symbols);
|
nCCE, nCCE_max, DL_req->number_pdcch_ofdm_symbols);
|
||||||
}
|
}
|
||||||
//dump_CCE_table(CCE_table,nCCE_max,subframeP,dci_alloc->rnti,1<<dci_alloc->L);
|
//dump_CCE_table(CCE_table,nCCE_max,subframeP,dci_alloc->rnti,1<<dci_alloc->L);
|
||||||
@@ -3054,18 +2997,101 @@ try_again:
|
|||||||
LOG_D(MAC, "Can't fit DCI allocations with %d PDCCH symbols (rnti condition), increasing by 1\n",
|
LOG_D(MAC, "Can't fit DCI allocations with %d PDCCH symbols (rnti condition), increasing by 1\n",
|
||||||
DL_req->number_pdcch_ofdm_symbols);
|
DL_req->number_pdcch_ofdm_symbols);
|
||||||
DL_req->number_pdcch_ofdm_symbols++;
|
DL_req->number_pdcch_ofdm_symbols++;
|
||||||
nCCE_max =
|
nCCE_max = get_nCCE_max(cc, DL_req->number_pdcch_ofdm_symbols, subframeP);
|
||||||
get_nCCE_max(&RC.mac[module_idP]->common_channels[CC_idP], DL_req->number_pdcch_ofdm_symbols, subframeP);
|
|
||||||
goto try_again;
|
goto try_again;
|
||||||
} // fCCE==-1
|
} // fCCE==-1
|
||||||
|
|
||||||
// the allocation is feasible, rnti rule passes
|
// the allocation is feasible, rnti rule passes
|
||||||
nCCE += hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.aggregation_level;
|
nCCE += dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level;
|
||||||
LOG_D(MAC, "Allocating at nCCE %d\n", fCCE);
|
LOG_D(MAC, "Allocating at nCCE %d\n", fCCE);
|
||||||
|
|
||||||
if ((test_onlyP%2) == 0) {
|
if ((test_onlyP%2) == 0) {
|
||||||
hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.cce_index = fCCE;
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx = fCCE;
|
||||||
LOG_D(MAC, "Allocate CCEs subframe %d, test %d\n", subframeP, test_onlyP);
|
LOG_D(MAC, "Allocate COMMON DCI CCEs subframe %d, test %d => L %d fCCE %d\n",
|
||||||
|
subframeP,
|
||||||
|
test_onlyP,
|
||||||
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
|
||||||
|
fCCE);
|
||||||
|
}
|
||||||
|
|
||||||
|
idci++;
|
||||||
|
}
|
||||||
|
} // for i = 0 ... num_DL_DCIs
|
||||||
|
|
||||||
|
// no try to allocate UL DCIs
|
||||||
|
for (i = 0; i < HI_DCI0_req->number_of_dci + HI_DCI0_req->number_of_hi; i++) {
|
||||||
|
hi_dci0_pduLoop = &hi_dci0_pdu[i];
|
||||||
|
// allocate UL DCIs
|
||||||
|
if (hi_dci0_pdu[i].pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE) {
|
||||||
|
LOG_D(MAC, "Trying to allocate format 0 DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
|
||||||
|
idci,
|
||||||
|
DL_req->number_dci + HI_DCI0_req->number_of_dci,
|
||||||
|
DL_req->number_dci,
|
||||||
|
HI_DCI0_req->number_of_dci,
|
||||||
|
hi_dci0_pduLoop->dci_pdu.dci_pdu_rel8.rnti,
|
||||||
|
hi_dci0_pduLoop->dci_pdu.dci_pdu_rel8.aggregation_level,
|
||||||
|
nCCE, nCCE_max,
|
||||||
|
DL_req->number_pdcch_ofdm_symbols);
|
||||||
|
|
||||||
|
if (nCCE + hi_dci0_pduLoop->dci_pdu.dci_pdu_rel8.aggregation_level > nCCE_max) {
|
||||||
|
if (DL_req->number_pdcch_ofdm_symbols == max_symbol)
|
||||||
|
return -1;
|
||||||
|
|
||||||
|
LOG_D(MAC, "Can't fit DCI allocations with %d PDCCH symbols, increasing by 1\n",
|
||||||
|
DL_req->number_pdcch_ofdm_symbols);
|
||||||
|
DL_req->number_pdcch_ofdm_symbols++;
|
||||||
|
nCCE_max = get_nCCE_max(cc, DL_req->number_pdcch_ofdm_symbols, subframeP);
|
||||||
|
goto try_again;
|
||||||
|
}
|
||||||
|
|
||||||
|
// number of CCEs left can potentially hold this allocation
|
||||||
|
fCCE = get_nCCE_offset(CCE_table,
|
||||||
|
hi_dci0_pduLoop->dci_pdu.dci_pdu_rel8.aggregation_level,
|
||||||
|
nCCE_max,
|
||||||
|
0,
|
||||||
|
hi_dci0_pduLoop->dci_pdu.dci_pdu_rel8.rnti,
|
||||||
|
subframeP);
|
||||||
|
|
||||||
|
if (fCCE == -1) {
|
||||||
|
if (DL_req->number_pdcch_ofdm_symbols == max_symbol) {
|
||||||
|
LOG_D(MAC, "subframe %d: Dropping Allocation for RNTI %x\n",
|
||||||
|
subframeP,
|
||||||
|
hi_dci0_pduLoop->dci_pdu.dci_pdu_rel8.rnti);
|
||||||
|
|
||||||
|
for (j = 0; j <= i; j++) {
|
||||||
|
hi_dci0_pduLoop = &hi_dci0_pdu[j];
|
||||||
|
if (hi_dci0_pdu[j].pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE)
|
||||||
|
LOG_D(MAC, "DCI %d/%d (%d,%d) : rnti %x dci format %d, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
|
||||||
|
j,
|
||||||
|
DL_req->number_dci + HI_DCI0_req->number_of_dci,
|
||||||
|
DL_req->number_dci,
|
||||||
|
HI_DCI0_req->number_of_dci,
|
||||||
|
hi_dci0_pduLoop->dci_pdu.dci_pdu_rel8.rnti,
|
||||||
|
hi_dci0_pduLoop->dci_pdu.dci_pdu_rel8.dci_format,
|
||||||
|
hi_dci0_pduLoop->dci_pdu.dci_pdu_rel8.aggregation_level,
|
||||||
|
nCCE, nCCE_max, DL_req->number_pdcch_ofdm_symbols);
|
||||||
|
}
|
||||||
|
//dump_CCE_table(CCE_table,nCCE_max,subframeP,dci_alloc->rnti,1<<dci_alloc->L);
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
LOG_D(MAC, "Can't fit DCI allocations with %d PDCCH symbols (rnti condition), increasing by 1\n",
|
||||||
|
DL_req->number_pdcch_ofdm_symbols);
|
||||||
|
DL_req->number_pdcch_ofdm_symbols++;
|
||||||
|
nCCE_max = get_nCCE_max(cc, DL_req->number_pdcch_ofdm_symbols, subframeP);
|
||||||
|
goto try_again;
|
||||||
|
} // fCCE==-1
|
||||||
|
|
||||||
|
// the allocation is feasible, rnti rule passes
|
||||||
|
nCCE += hi_dci0_pduLoop->dci_pdu.dci_pdu_rel8.aggregation_level;
|
||||||
|
LOG_D(MAC, "Allocating at nCCE %d\n",
|
||||||
|
fCCE);
|
||||||
|
|
||||||
|
if ((test_onlyP%2) == 0) {
|
||||||
|
hi_dci0_pduLoop->dci_pdu.dci_pdu_rel8.cce_index = fCCE;
|
||||||
|
LOG_D(MAC, "Allocate CCEs subframe %d, test %d\n",
|
||||||
|
subframeP,
|
||||||
|
test_onlyP);
|
||||||
}
|
}
|
||||||
|
|
||||||
idci++;
|
idci++;
|
||||||
@@ -3073,51 +3099,56 @@ try_again:
|
|||||||
} // for i = 0 ... num_UL_DCIs
|
} // for i = 0 ... num_UL_DCIs
|
||||||
|
|
||||||
for (i = 0; i < DL_req->number_pdu; i++) {
|
for (i = 0; i < DL_req->number_pdu; i++) {
|
||||||
|
dl_config_pduLoop = &dl_config_pdu[i];
|
||||||
// allocate DL UE specific DCIs
|
// allocate DL UE specific DCIs
|
||||||
if ((dl_config_pdu[i].pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)
|
if ((dl_config_pdu[i].pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)
|
||||||
&& (dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti_type ==
|
&& (dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type == 1)) {
|
||||||
1)) {
|
|
||||||
LOG_D(MAC, "Trying to allocate DL UE-SPECIFIC DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
|
LOG_D(MAC, "Trying to allocate DL UE-SPECIFIC DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
|
||||||
idci, DL_req->number_dci + HI_DCI0_req->number_of_dci,
|
idci,
|
||||||
|
DL_req->number_dci + HI_DCI0_req->number_of_dci,
|
||||||
DL_req->number_dci, HI_DCI0_req->number_of_dci,
|
DL_req->number_dci, HI_DCI0_req->number_of_dci,
|
||||||
dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti,
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.rnti,
|
||||||
dl_config_pdu[i].dci_dl_pdu.
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
|
||||||
dci_dl_pdu_rel8.aggregation_level, nCCE, nCCE_max,
|
nCCE,
|
||||||
|
nCCE_max,
|
||||||
DL_req->number_pdcch_ofdm_symbols);
|
DL_req->number_pdcch_ofdm_symbols);
|
||||||
|
|
||||||
if (nCCE + (dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level) > nCCE_max) {
|
if (nCCE + (dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level) > nCCE_max) {
|
||||||
if (DL_req->number_pdcch_ofdm_symbols == max_symbol)
|
if (DL_req->number_pdcch_ofdm_symbols == max_symbol)
|
||||||
return -1;
|
return -1;
|
||||||
|
|
||||||
LOG_D(MAC, "Can't fit DCI allocations with %d PDCCH symbols, increasing by 1\n", DL_req->number_pdcch_ofdm_symbols);
|
LOG_D(MAC, "Can't fit DCI allocations with %d PDCCH symbols, increasing by 1\n",
|
||||||
|
DL_req->number_pdcch_ofdm_symbols);
|
||||||
DL_req->number_pdcch_ofdm_symbols++;
|
DL_req->number_pdcch_ofdm_symbols++;
|
||||||
nCCE_max =
|
nCCE_max = get_nCCE_max(cc, DL_req->number_pdcch_ofdm_symbols, subframeP);
|
||||||
get_nCCE_max(&RC.mac[module_idP]->common_channels[CC_idP], DL_req->number_pdcch_ofdm_symbols, subframeP);
|
|
||||||
goto try_again;
|
goto try_again;
|
||||||
}
|
}
|
||||||
|
|
||||||
// number of CCEs left can potentially hold this allocation
|
// number of CCEs left can potentially hold this allocation
|
||||||
fCCE = get_nCCE_offset(CCE_table,
|
fCCE = get_nCCE_offset(CCE_table,
|
||||||
dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level, nCCE_max, 0,
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
|
||||||
dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti,
|
nCCE_max,
|
||||||
|
0,
|
||||||
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.rnti,
|
||||||
subframeP);
|
subframeP);
|
||||||
|
|
||||||
if (fCCE == -1) {
|
if (fCCE == -1) {
|
||||||
if (DL_req->number_pdcch_ofdm_symbols == max_symbol) {
|
if (DL_req->number_pdcch_ofdm_symbols == max_symbol) {
|
||||||
LOG_I(MAC, "subframe %d: Dropping Allocation for RNTI %x\n",
|
LOG_I(MAC, "subframe %d: Dropping Allocation for RNTI %x\n",
|
||||||
subframeP, dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti);
|
subframeP,
|
||||||
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.rnti);
|
||||||
|
|
||||||
for (j = 0; j <= i; j++) {
|
for (j = 0; j <= i; j++) {
|
||||||
if (dl_config_pdu[j].pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)
|
dl_config_pduLoop = &dl_config_pdu[j];
|
||||||
|
if (dl_config_pduLoop->pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)
|
||||||
LOG_D(MAC, "DCI %d/%d (%d,%d) : rnti %x dci format %d, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
|
LOG_D(MAC, "DCI %d/%d (%d,%d) : rnti %x dci format %d, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
|
||||||
j,
|
j,
|
||||||
DL_req->number_dci + HI_DCI0_req->number_of_dci,
|
DL_req->number_dci + HI_DCI0_req->number_of_dci,
|
||||||
DL_req->number_dci,
|
DL_req->number_dci,
|
||||||
HI_DCI0_req->number_of_dci,
|
HI_DCI0_req->number_of_dci,
|
||||||
dl_config_pdu[j].dci_dl_pdu.dci_dl_pdu_rel8.rnti,
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.rnti,
|
||||||
dl_config_pdu[j].dci_dl_pdu.dci_dl_pdu_rel8.dci_format,
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.dci_format,
|
||||||
dl_config_pdu[j].dci_dl_pdu.dci_dl_pdu_rel8.
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
|
||||||
aggregation_level,
|
|
||||||
nCCE,
|
nCCE,
|
||||||
nCCE_max,
|
nCCE_max,
|
||||||
DL_req->number_pdcch_ofdm_symbols);
|
DL_req->number_pdcch_ofdm_symbols);
|
||||||
@@ -3129,18 +3160,20 @@ try_again:
|
|||||||
LOG_D(MAC, "Can't fit DCI allocations with %d PDCCH symbols (rnti condition), increasing by 1\n",
|
LOG_D(MAC, "Can't fit DCI allocations with %d PDCCH symbols (rnti condition), increasing by 1\n",
|
||||||
DL_req->number_pdcch_ofdm_symbols);
|
DL_req->number_pdcch_ofdm_symbols);
|
||||||
DL_req->number_pdcch_ofdm_symbols++;
|
DL_req->number_pdcch_ofdm_symbols++;
|
||||||
nCCE_max =
|
nCCE_max = get_nCCE_max(cc, DL_req->number_pdcch_ofdm_symbols, subframeP);
|
||||||
get_nCCE_max(&RC.mac[module_idP]->common_channels[CC_idP], DL_req->number_pdcch_ofdm_symbols, subframeP);
|
|
||||||
goto try_again;
|
goto try_again;
|
||||||
} // fCCE==-1
|
} // fCCE==-1
|
||||||
|
|
||||||
// the allocation is feasible, rnti rule passes
|
// the allocation is feasible, rnti rule passes
|
||||||
nCCE += dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level;
|
nCCE += dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level;
|
||||||
LOG_D(MAC, "Allocating at nCCE %d\n", fCCE);
|
LOG_D(MAC, "Allocating at nCCE %d\n",
|
||||||
|
fCCE);
|
||||||
|
|
||||||
if ((test_onlyP%2) == 0) {
|
if ((test_onlyP%2) == 0) {
|
||||||
dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.cce_idx = fCCE;
|
dl_config_pduLoop->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx = fCCE;
|
||||||
LOG_D(MAC, "Allocate CCEs subframe %d, test %d\n", subframeP, test_onlyP);
|
LOG_D(MAC, "Allocate CCEs subframe %d, test %d\n",
|
||||||
|
subframeP,
|
||||||
|
test_onlyP);
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((test_onlyP/2) == 1) {
|
if ((test_onlyP/2) == 1) {
|
||||||
|
|||||||
@@ -133,31 +133,6 @@ rx_sdu(const module_id_t enb_mod_idP,
|
|||||||
memset(rx_lcids, 0, NB_RB_MAX * sizeof(unsigned char));
|
memset(rx_lcids, 0, NB_RB_MAX * sizeof(unsigned char));
|
||||||
memset(rx_lengths, 0, NB_RB_MAX * sizeof(unsigned short));
|
memset(rx_lengths, 0, NB_RB_MAX * sizeof(unsigned short));
|
||||||
|
|
||||||
// LAD
|
|
||||||
/*
|
|
||||||
if (UE_id == -1) {
|
|
||||||
LOG_E(MAC, "Step 1\n");
|
|
||||||
LOG_W(MAC, "[MAC] UE_id = -1 ; RNTI = %x ; frame = %d ; subframe = %d ; sdu_length = %d ; sdu = %d\n",
|
|
||||||
rntiP,
|
|
||||||
frameP,
|
|
||||||
subframeP,
|
|
||||||
sdu_lenP,
|
|
||||||
*sduP);
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
|
|
||||||
// LAD
|
|
||||||
/*
|
|
||||||
first_rb = UE_list->UE_template[CC_idP][UE_id].first_rb_ul[harq_pid];
|
|
||||||
LOG_W(MAC, "[MAC] UE_id = %d : first_rb = %d ; scheduled_ul_bytes = %d ; TBS_UL = %d ; frame = %d ; subframe = %d\n",
|
|
||||||
UE_id,
|
|
||||||
first_rb,
|
|
||||||
UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes,
|
|
||||||
UE_list->UE_template[CC_idP][UE_id].TBS_UL[harq_pid],
|
|
||||||
frameP,
|
|
||||||
subframeP);
|
|
||||||
*/
|
|
||||||
|
|
||||||
start_meas(&mac->rx_ulsch_sdu);
|
start_meas(&mac->rx_ulsch_sdu);
|
||||||
|
|
||||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_SDU, 1);
|
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_SDU, 1);
|
||||||
@@ -206,17 +181,7 @@ rx_sdu(const module_id_t enb_mod_idP,
|
|||||||
mac_eNB_rrc_ul_in_sync(enb_mod_idP, CC_idP, frameP, subframeP, current_rnti);
|
mac_eNB_rrc_ul_in_sync(enb_mod_idP, CC_idP, frameP, subframeP, current_rnti);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* update bytes to schedule */
|
/* Update bytes to schedule */
|
||||||
|
|
||||||
// LAD
|
|
||||||
/*
|
|
||||||
LOG_E(MAC, "Step 2\n");
|
|
||||||
LOG_W(MAC, "[MAC] UE_id != -1 and sduP != NULL : first_rb = %d ; scheduled_ul_bytes = %d ; TBS_UL = %d\n",
|
|
||||||
first_rb,
|
|
||||||
UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes,
|
|
||||||
UE_list->UE_template[CC_idP][UE_id].TBS_UL[harq_pid]);
|
|
||||||
*/
|
|
||||||
|
|
||||||
UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes -= UE_list->UE_template[CC_idP][UE_id].TBS_UL[harq_pid];
|
UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes -= UE_list->UE_template[CC_idP][UE_id].TBS_UL[harq_pid];
|
||||||
|
|
||||||
if (UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes < 0) {
|
if (UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes < 0) {
|
||||||
@@ -310,15 +275,6 @@ rx_sdu(const module_id_t enb_mod_idP,
|
|||||||
|
|
||||||
first_rb = ra[RA_id].msg3_first_rb;
|
first_rb = ra[RA_id].msg3_first_rb;
|
||||||
|
|
||||||
// LAD
|
|
||||||
/*
|
|
||||||
LOG_E(MAC, "Step 3\n");
|
|
||||||
LOG_W(MAC, "[MAC] UE_id == -1 : first_rb = %d ; scheduled_ul_bytes = %d ; TBS_UL = %d\n",
|
|
||||||
first_rb,
|
|
||||||
UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes,
|
|
||||||
UE_list->UE_template[CC_idP][UE_id].TBS_UL[harq_pid]);
|
|
||||||
*/
|
|
||||||
|
|
||||||
if (sduP == NULL) { // we've got an error on Msg3
|
if (sduP == NULL) { // we've got an error on Msg3
|
||||||
LOG_W(MAC, "[eNB %d] CC_id %d, RA %d ULSCH in error in round %d/%d\n",
|
LOG_W(MAC, "[eNB %d] CC_id %d, RA %d ULSCH in error in round %d/%d\n",
|
||||||
enb_mod_idP,
|
enb_mod_idP,
|
||||||
@@ -333,26 +289,6 @@ rx_sdu(const module_id_t enb_mod_idP,
|
|||||||
// first_rb = UE_list->UE_template[CC_idP][UE_id].first_rb_ul[harq_pid]; // UE_id = -1 !!!!
|
// first_rb = UE_list->UE_template[CC_idP][UE_id].first_rb_ul[harq_pid]; // UE_id = -1 !!!!
|
||||||
ra[RA_id].msg3_round++;
|
ra[RA_id].msg3_round++;
|
||||||
|
|
||||||
// LAD
|
|
||||||
/*
|
|
||||||
LOG_E(MAC, "Step 4\n");
|
|
||||||
LOG_W(MAC, "[MAC] [UEINFO1] UE_id = %d ; RNTI_ue_template = %x ; RNTI_sdu = %x\n",
|
|
||||||
UE_id,
|
|
||||||
UE_list->UE_template[CC_idP][UE_id].rnti,
|
|
||||||
current_rnti);
|
|
||||||
|
|
||||||
// LAD
|
|
||||||
LOG_W(MAC, "[MAC] UE_id == -1 and sduP == NULL : first_rb = %d ; scheduled_ul_bytes = %d ; TBS_UL = %d\n",
|
|
||||||
first_rb,
|
|
||||||
UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes,
|
|
||||||
UE_list->UE_template[CC_idP][UE_id].TBS_UL[harq_pid]);
|
|
||||||
|
|
||||||
// LAD
|
|
||||||
LOG_W(MAC, "[MAC] [RAPROC] msg3_subframe = %d ; msg3_frame = %d\n",
|
|
||||||
ra[RA_id].Msg3_subframe,
|
|
||||||
ra[RA_id].Msg3_frame);
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Prepare handling of retransmission */
|
/* Prepare handling of retransmission */
|
||||||
get_Msg3allocret(&mac->common_channels[CC_idP],
|
get_Msg3allocret(&mac->common_channels[CC_idP],
|
||||||
ra[RA_id].Msg3_subframe,
|
ra[RA_id].Msg3_subframe,
|
||||||
@@ -360,13 +296,6 @@ rx_sdu(const module_id_t enb_mod_idP,
|
|||||||
&ra[RA_id].Msg3_frame,
|
&ra[RA_id].Msg3_frame,
|
||||||
&ra[RA_id].Msg3_subframe);
|
&ra[RA_id].Msg3_subframe);
|
||||||
|
|
||||||
// LAD
|
|
||||||
/*
|
|
||||||
LOG_W(MAC, "[MAC] [RAPROC] After update: msg3_subframe = %d ; msg3_frame = %d\n",
|
|
||||||
ra[RA_id].Msg3_subframe,
|
|
||||||
ra[RA_id].Msg3_frame);
|
|
||||||
*/
|
|
||||||
|
|
||||||
add_msg3(enb_mod_idP, CC_idP, &ra[RA_id], frameP, subframeP);
|
add_msg3(enb_mod_idP, CC_idP, &ra[RA_id], frameP, subframeP);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -421,17 +350,6 @@ rx_sdu(const module_id_t enb_mod_idP,
|
|||||||
if (UE_id != -1) {
|
if (UE_id != -1) {
|
||||||
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid] = 0;
|
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid] = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
// LAD
|
|
||||||
/*
|
|
||||||
LOG_E(MAC, "Step 5\n");
|
|
||||||
LOG_W(MAC, "[MAC] [UEINFO2] UE_id = %d ; RNTI_ue_template = %x ; RNTI_sdu = %x ; frame = %d ; subframe = %d\n",
|
|
||||||
UE_id,
|
|
||||||
UE_list->UE_template[CC_idP][UE_id].rnti,
|
|
||||||
current_rnti,
|
|
||||||
frameP,
|
|
||||||
subframeP);
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Control element */
|
/* Control element */
|
||||||
for (int i = 0; i < num_ce; i++) {
|
for (int i = 0; i < num_ce; i++) {
|
||||||
@@ -1278,44 +1196,27 @@ schedule_ulsch(module_id_t module_idP,
|
|||||||
LTE_DL_FRAME_PARMS *frame_parms = &(RC.eNB[module_idP][CC_id]->frame_parms);
|
LTE_DL_FRAME_PARMS *frame_parms = &(RC.eNB[module_idP][CC_id]->frame_parms);
|
||||||
RA_t *ra_ptr = cc->ra;
|
RA_t *ra_ptr = cc->ra;
|
||||||
|
|
||||||
/* Louis-Adrien: Only set for FDD (for the moment)
|
/* From Louis-Adrien to François:
|
||||||
* Hard coded for prach-ConfigIndex = 0 and prach-Freqoffset = 2
|
* The comment bloc below is to configure with a command line.
|
||||||
* ToDo: The PRACH resources should be added with modularity (here?)
|
* I took it from the equivalent part in the fairRR scheduler (around line 2578 in eNB_scheduler_fairRR.c).
|
||||||
|
* As said in the meeting, it seems to work only for small TBS.
|
||||||
|
* The cause of false RA still present with this fix is to investigate.
|
||||||
|
*
|
||||||
|
* Note: in the get_prach_prb_offset() function below, the last argument is frameP in eNB_scheduler_fairRR.c
|
||||||
|
* I think it should be sched_frame instead. This parameter has only impacts in case TDD and preamble format 4.
|
||||||
|
* To confirm.
|
||||||
*/
|
*/
|
||||||
/*
|
/*
|
||||||
if (cc->tdd_Config == NULL) { // FDD
|
|
||||||
if (((sched_frame %2) == 0) && sched_subframe == 1) { // RACH frame and subframe
|
|
||||||
if (first_rb[CC_id] < 8) {
|
|
||||||
n_rb_ul_tab = to_prb(cc->ul_Bandwidth); // return total number of PRB
|
|
||||||
|
|
||||||
if (n_rb_ul_tab >= 8) {
|
|
||||||
first_rb[CC_id] = 8;
|
|
||||||
} else {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
if (is_prach_subframe(frame_parms, sched_frame, sched_subframe) == 1) {
|
if (is_prach_subframe(frame_parms, sched_frame, sched_subframe) == 1) {
|
||||||
start_rb = get_prach_prb_offset(frame_parms,
|
start_rb = get_prach_prb_offset(frame_parms,
|
||||||
frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
|
frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
|
||||||
frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset,
|
frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset,
|
||||||
0, // tdd_mapindex
|
0, // tdd_mapindex
|
||||||
frameP); // Nf --> shouldn't it be sched_frame ???
|
sched_frame); // Nf
|
||||||
|
|
||||||
first_rb[CC_id] = start_rb + nb_rb;
|
first_rb[CC_id] = start_rb + nb_rb;
|
||||||
|
|
||||||
// LAD
|
|
||||||
/*
|
|
||||||
LOG_W(MAC, "[MAC] Config Index = %d ; Freq_offset = %d ; first_rb = %d ; subframe = %d ; sched_subframe = %d\n",
|
|
||||||
frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
|
|
||||||
frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset,
|
|
||||||
first_rb[CC_id],
|
|
||||||
subframeP,
|
|
||||||
sched_subframe);
|
|
||||||
*/
|
|
||||||
}
|
}
|
||||||
|
*/
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Check if RA (Msg3) is active in this subframeP, if so skip the PRB used for Msg3
|
* Check if RA (Msg3) is active in this subframeP, if so skip the PRB used for Msg3
|
||||||
@@ -1328,7 +1229,7 @@ schedule_ulsch(module_id_t module_idP,
|
|||||||
first_rb[CC_id] = ra_ptr->msg3_first_rb + ra_ptr->msg3_nb_rb;
|
first_rb[CC_id] = ra_ptr->msg3_first_rb + ra_ptr->msg3_nb_rb;
|
||||||
}
|
}
|
||||||
/* Louis-Adrien: I couldn't find an interdiction of multiple Msg3 scheduling
|
/* Louis-Adrien: I couldn't find an interdiction of multiple Msg3 scheduling
|
||||||
* on the same resources. Also the performance improvement of breaking is low,
|
* on the same time resources. Also the performance improvement of breaking is low,
|
||||||
* since we will loop until the end, most of the time.
|
* since we will loop until the end, most of the time.
|
||||||
* I'm letting the break as a reminder, in case of misunderstanding the spec.
|
* I'm letting the break as a reminder, in case of misunderstanding the spec.
|
||||||
*/
|
*/
|
||||||
|
|||||||
@@ -444,7 +444,7 @@ uint8_t get_aggregation(uint8_t bw_index, uint8_t cqi, uint8_t dci_fmt);
|
|||||||
|
|
||||||
int8_t find_active_UEs_with_traffic(module_id_t module_idP);
|
int8_t find_active_UEs_with_traffic(module_id_t module_idP);
|
||||||
|
|
||||||
void init_CCE_table(int module_idP, int CC_idP);
|
void init_CCE_table(int *CCE_table);
|
||||||
|
|
||||||
int get_nCCE_offset(int *CCE_table,
|
int get_nCCE_offset(int *CCE_table,
|
||||||
const unsigned char L,
|
const unsigned char L,
|
||||||
@@ -726,7 +726,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP, int slice_idx, int fr
|
|||||||
uint16_t * first_rb);
|
uint16_t * first_rb);
|
||||||
void store_ulsch_buffer(module_id_t module_idP, int frameP,
|
void store_ulsch_buffer(module_id_t module_idP, int frameP,
|
||||||
sub_frame_t subframeP);
|
sub_frame_t subframeP);
|
||||||
void sort_ue_ul(module_id_t module_idP, int frameP, sub_frame_t subframeP);
|
void sort_ue_ul(module_id_t module_idP, int slice_idx, int frameP, sub_frame_t subframeP, rnti_t *rntiTable);
|
||||||
void assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
|
void assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
|
||||||
sub_frame_t subframeP, uint16_t * first_rb);
|
sub_frame_t subframeP, uint16_t * first_rb);
|
||||||
void adjust_bsr_info(int buffer_occupancy, uint16_t TBS,
|
void adjust_bsr_info(int buffer_occupancy, uint16_t TBS,
|
||||||
|
|||||||
@@ -1618,14 +1618,13 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|||||||
int N_RB_UL = 0;
|
int N_RB_UL = 0;
|
||||||
uint16_t available_rbs, first_rb_offset;
|
uint16_t available_rbs, first_rb_offset;
|
||||||
rnti_t rntiTable[MAX_MOBILES_PER_ENB]; // Rnti array => Add SSR 12-2018
|
rnti_t rntiTable[MAX_MOBILES_PER_ENB]; // Rnti array => Add SSR 12-2018
|
||||||
bool continueTable[MAX_MOBILES_PER_ENB]; // Loop continue flag array => Add SSR 12-2018
|
|
||||||
bool sliceMember; // Slice membership flag => Add SSR 12-2018
|
|
||||||
LOG_D(MAC, "In ulsch_preprocessor: assign max mcs min rb\n");
|
|
||||||
// maximize MCS and then allocate required RB according to the buffer occupancy with the limit of max available UL RB
|
|
||||||
assign_max_mcs_min_rb(module_idP, slice_idx, frameP, subframeP, first_rb);
|
|
||||||
LOG_D(MAC, "In ulsch_preprocessor: sort ue \n");
|
|
||||||
// sort ues
|
// sort ues
|
||||||
sort_ue_ul(module_idP, frameP, subframeP);
|
LOG_D(MAC, "In ulsch_preprocessor: sort ue \n");
|
||||||
|
sort_ue_ul(module_idP, slice_idx, frameP, subframeP, rntiTable);
|
||||||
|
// maximize MCS and then allocate required RB according to the buffer occupancy with the limit of max available UL RB
|
||||||
|
LOG_D(MAC, "In ulsch_preprocessor: assign max mcs min rb\n");
|
||||||
|
assign_max_mcs_min_rb(module_idP, slice_idx, frameP, subframeP, first_rb);
|
||||||
// we need to distribute RBs among UEs
|
// we need to distribute RBs among UEs
|
||||||
// step1: reset the vars
|
// step1: reset the vars
|
||||||
uint8_t CC_nb = (uint8_t) RC.nb_mac_CC[module_idP];
|
uint8_t CC_nb = (uint8_t) RC.nb_mac_CC[module_idP];
|
||||||
@@ -1639,45 +1638,33 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|||||||
|
|
||||||
// Step 1.5: Calculate total_ue_count
|
// Step 1.5: Calculate total_ue_count
|
||||||
for (UE_id = UE_list->head_ul; UE_id >= 0; UE_id = UE_list->next_ul[UE_id]) {
|
for (UE_id = UE_list->head_ul; UE_id >= 0; UE_id = UE_list->next_ul[UE_id]) {
|
||||||
// Calculate continue condition
|
|
||||||
/*
|
|
||||||
if (UE_RNTI(module_idP, UE_id) == NOT_A_RNTI)
|
|
||||||
continue;
|
|
||||||
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
|
|
||||||
continue;
|
|
||||||
if (!ue_ul_slice_membership(module_idP, UE_id, slice_idx))
|
|
||||||
continue;
|
|
||||||
*/
|
|
||||||
rntiTable[UE_id] = UE_RNTI(module_idP, UE_id);
|
|
||||||
sliceMember = ue_ul_slice_membership(module_idP, UE_id, slice_idx);
|
|
||||||
continueTable[UE_id] = (rntiTable[UE_id] == NOT_A_RNTI || UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1 || !sliceMember);
|
|
||||||
|
|
||||||
// This is not the actual CC_id in the list
|
// This is not the actual CC_id in the list
|
||||||
if (sliceMember) {
|
for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
|
||||||
for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
|
CC_id = UE_list->ordered_ULCCids[n][UE_id];
|
||||||
CC_id = UE_list->ordered_ULCCids[n][UE_id];
|
UE_template = &UE_list->UE_template[CC_id][UE_id];
|
||||||
UE_template = &UE_list->UE_template[CC_id][UE_id];
|
|
||||||
|
|
||||||
if (UE_template->pre_allocated_nb_rb_ul[slice_idx] > 0) {
|
if (UE_template->pre_allocated_nb_rb_ul[slice_idx] > 0) {
|
||||||
total_ue_count[CC_id]++;
|
total_ue_count[CC_id]++;
|
||||||
}
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
LOG_D(MAC, "In ulsch_preprocessor: step2 \n");
|
|
||||||
|
|
||||||
// step 2: calculate the average rb per UE
|
// step 2: calculate the average rb per UE
|
||||||
|
LOG_D(MAC, "In ulsch_preprocessor: step2 \n");
|
||||||
for (UE_id = UE_list->head_ul; UE_id >= 0; UE_id = UE_list->next_ul[UE_id]) {
|
for (UE_id = UE_list->head_ul; UE_id >= 0; UE_id = UE_list->next_ul[UE_id]) {
|
||||||
if (continueTable[UE_id]) continue;
|
// if (continueTable[UE_id]) continue;
|
||||||
|
|
||||||
LOG_D(MAC, "In ulsch_preprocessor: handling UE %d/%x\n", UE_id,
|
LOG_D(MAC, "In ulsch_preprocessor: handling UE %d/%x\n",
|
||||||
|
UE_id,
|
||||||
rntiTable[UE_id]);
|
rntiTable[UE_id]);
|
||||||
|
|
||||||
for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
|
for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
|
||||||
// This is the actual CC_id in the list
|
// This is the actual CC_id in the list
|
||||||
CC_id = UE_list->ordered_ULCCids[n][UE_id];
|
CC_id = UE_list->ordered_ULCCids[n][UE_id];
|
||||||
LOG_D(MAC, "In ulsch_preprocessor: handling UE %d/%x CCid %d\n", UE_id, rntiTable[UE_id], CC_id);
|
LOG_D(MAC, "In ulsch_preprocessor: handling UE %d/%x CCid %d\n",
|
||||||
|
UE_id,
|
||||||
|
rntiTable[UE_id],
|
||||||
|
CC_id);
|
||||||
/*
|
/*
|
||||||
if((mac_xface->get_nCCE_max(module_idP,CC_id,3,subframeP) - nCCE_to_be_used[CC_id]) > (1<<aggregation)) {
|
if((mac_xface->get_nCCE_max(module_idP,CC_id,3,subframeP) - nCCE_to_be_used[CC_id]) > (1<<aggregation)) {
|
||||||
nCCE_to_be_used[CC_id] = nCCE_to_be_used[CC_id] + (1<<aggregation);
|
nCCE_to_be_used[CC_id] = nCCE_to_be_used[CC_id] + (1<<aggregation);
|
||||||
@@ -1688,8 +1675,8 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|||||||
ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx] =
|
ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx] =
|
||||||
nb_rbs_allowed_slice(sli->ul[slice_idx].pct, N_RB_UL);
|
nb_rbs_allowed_slice(sli->ul[slice_idx].pct, N_RB_UL);
|
||||||
first_rb_offset = UE_list->first_rb_offset[CC_id][slice_idx];
|
first_rb_offset = UE_list->first_rb_offset[CC_id][slice_idx];
|
||||||
available_rbs = cmin(ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx],
|
available_rbs =
|
||||||
N_RB_UL - first_rb[CC_id] - first_rb_offset);
|
cmin(ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx], N_RB_UL - first_rb[CC_id] - first_rb_offset);
|
||||||
|
|
||||||
if (available_rbs < 0)
|
if (available_rbs < 0)
|
||||||
available_rbs = 0;
|
available_rbs = 0;
|
||||||
@@ -1702,21 +1689,27 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|||||||
average_rbs_per_user[CC_id] = (uint16_t) floor(available_rbs / total_ue_count[CC_id]);
|
average_rbs_per_user[CC_id] = (uint16_t) floor(available_rbs / total_ue_count[CC_id]);
|
||||||
} else {
|
} else {
|
||||||
average_rbs_per_user[CC_id] = 1;
|
average_rbs_per_user[CC_id] = 1;
|
||||||
LOG_W(MAC,
|
LOG_W(MAC, "[eNB %d] frame %d subframe %d: UE %d CC %d: can't get average rb per user (should not be here)\n",
|
||||||
"[eNB %d] frame %d subframe %d: UE %d CC %d: can't get average rb per user (should not be here)\n",
|
module_idP,
|
||||||
module_idP, frameP, subframeP, UE_id, CC_id);
|
frameP,
|
||||||
|
subframeP,
|
||||||
|
UE_id,
|
||||||
|
CC_id);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (total_ue_count[CC_id] > 0) {
|
if (total_ue_count[CC_id] > 0) {
|
||||||
LOG_D(MAC, "[eNB %d] Frame %d subframe %d: total ue to be scheduled %d\n",
|
LOG_D(MAC, "[eNB %d] Frame %d subframe %d: total ue to be scheduled %d\n",
|
||||||
module_idP, frameP, subframeP, total_ue_count[CC_id]);
|
module_idP,
|
||||||
|
frameP,
|
||||||
|
subframeP,
|
||||||
|
total_ue_count[CC_id]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// step 3: assigne RBS
|
// step 3: assigne RBS
|
||||||
for (UE_id = UE_list->head_ul; UE_id >= 0; UE_id = UE_list->next_ul[UE_id]) {
|
for (UE_id = UE_list->head_ul; UE_id >= 0; UE_id = UE_list->next_ul[UE_id]) {
|
||||||
if (continueTable[UE_id]) continue;
|
// if (continueTable[UE_id]) continue;
|
||||||
|
|
||||||
for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
|
for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
|
||||||
// This is the actual CC_id in the list
|
// This is the actual CC_id in the list
|
||||||
@@ -1735,16 +1728,18 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|||||||
}
|
}
|
||||||
|
|
||||||
total_allocated_rbs[CC_id] += nb_allocated_rbs[CC_id][UE_id];
|
total_allocated_rbs[CC_id] += nb_allocated_rbs[CC_id][UE_id];
|
||||||
LOG_D(MAC,
|
LOG_D(MAC, "In ulsch_preprocessor: assigning %d RBs for UE %d/%x CCid %d, harq_pid %d\n",
|
||||||
"In ulsch_preprocessor: assigning %d RBs for UE %d/%x CCid %d, harq_pid %d\n",
|
nb_allocated_rbs[CC_id][UE_id],
|
||||||
nb_allocated_rbs[CC_id][UE_id], UE_id, rntiTable[UE_id], CC_id,
|
UE_id,
|
||||||
|
rntiTable[UE_id],
|
||||||
|
CC_id,
|
||||||
harq_pid);
|
harq_pid);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// step 4: assigne the remaining RBs and set the pre_allocated rbs accordingly
|
// step 4: assigne the remaining RBs and set the pre_allocated rbs accordingly
|
||||||
for (UE_id = UE_list->head_ul; UE_id >= 0; UE_id = UE_list->next_ul[UE_id]) {
|
for (UE_id = UE_list->head_ul; UE_id >= 0; UE_id = UE_list->next_ul[UE_id]) {
|
||||||
if (continueTable[UE_id]) continue;
|
// if (continueTable[UE_id]) continue;
|
||||||
|
|
||||||
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
|
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
|
||||||
|
|
||||||
@@ -1761,9 +1756,9 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|||||||
total_remaining_rbs[CC_id]++;
|
total_remaining_rbs[CC_id]++;
|
||||||
}
|
}
|
||||||
|
|
||||||
while ((UE_template->pre_allocated_nb_rb_ul[slice_idx] > 0)
|
while (UE_template->pre_allocated_nb_rb_ul[slice_idx] > 0 &&
|
||||||
&& (nb_allocated_rbs[CC_id][UE_id] < UE_template->pre_allocated_nb_rb_ul[slice_idx])
|
nb_allocated_rbs[CC_id][UE_id] < UE_template->pre_allocated_nb_rb_ul[slice_idx] &&
|
||||||
&& (total_remaining_rbs[CC_id] > 0)) {
|
total_remaining_rbs[CC_id] > 0) {
|
||||||
nb_allocated_rbs[CC_id][UE_id] = cmin(nb_allocated_rbs[CC_id][UE_id] + 1, UE_template->pre_allocated_nb_rb_ul[slice_idx]);
|
nb_allocated_rbs[CC_id][UE_id] = cmin(nb_allocated_rbs[CC_id][UE_id] + 1, UE_template->pre_allocated_nb_rb_ul[slice_idx]);
|
||||||
total_remaining_rbs[CC_id]--;
|
total_remaining_rbs[CC_id]--;
|
||||||
total_allocated_rbs[CC_id]++;
|
total_allocated_rbs[CC_id]++;
|
||||||
@@ -1771,9 +1766,13 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|||||||
|
|
||||||
UE_template->pre_allocated_nb_rb_ul[slice_idx] = nb_allocated_rbs[CC_id][UE_id];
|
UE_template->pre_allocated_nb_rb_ul[slice_idx] = nb_allocated_rbs[CC_id][UE_id];
|
||||||
LOG_D(MAC, "******************UL Scheduling Information for UE%d CC_id %d ************************\n",
|
LOG_D(MAC, "******************UL Scheduling Information for UE%d CC_id %d ************************\n",
|
||||||
UE_id, CC_id);
|
UE_id,
|
||||||
|
CC_id);
|
||||||
LOG_D(MAC, "[eNB %d] total RB allocated for UE%d CC_id %d = %d\n",
|
LOG_D(MAC, "[eNB %d] total RB allocated for UE%d CC_id %d = %d\n",
|
||||||
module_idP, UE_id, CC_id, UE_template->pre_allocated_nb_rb_ul[slice_idx]);
|
module_idP,
|
||||||
|
UE_id,
|
||||||
|
CC_id,
|
||||||
|
UE_template->pre_allocated_nb_rb_ul[slice_idx]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1781,38 +1780,26 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
|||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
|
assign_max_mcs_min_rb(module_id_t module_idP,
|
||||||
sub_frame_t subframeP, uint16_t *first_rb) {
|
int slice_idx,
|
||||||
|
int frameP,
|
||||||
|
sub_frame_t subframeP,
|
||||||
|
uint16_t *first_rb) {
|
||||||
int i;
|
int i;
|
||||||
uint16_t n, UE_id;
|
uint16_t n, UE_id;
|
||||||
uint8_t CC_id;
|
uint8_t CC_id;
|
||||||
rnti_t rnti = -1;
|
|
||||||
int mcs;
|
int mcs;
|
||||||
int rb_table_index = 0, tbs, tx_power;
|
int rb_table_index = 0, tbs, tx_power;
|
||||||
eNB_MAC_INST *eNB = RC.mac[module_idP];
|
eNB_MAC_INST *eNB = RC.mac[module_idP];
|
||||||
UE_list_t *UE_list = &eNB->UE_list;
|
UE_list_t *UE_list = &eNB->UE_list;
|
||||||
slice_info_t *sli = &RC.mac[module_idP]->slice_info;
|
slice_info_t *sli = &eNB->slice_info;
|
||||||
UE_TEMPLATE *UE_template;
|
UE_TEMPLATE *UE_template;
|
||||||
UE_sched_ctrl *ue_sched_ctl;
|
UE_sched_ctrl *ue_sched_ctl;
|
||||||
int Ncp;
|
int Ncp;
|
||||||
int N_RB_UL;
|
int N_RB_UL;
|
||||||
int first_rb_offset, available_rbs;
|
int first_rb_offset, available_rbs;
|
||||||
|
|
||||||
for (i = 0; i < MAX_MOBILES_PER_ENB; i++) {
|
for (i = UE_list->head_ul; i >= 0; i = UE_list->next_ul[i]) {
|
||||||
if (UE_list->active[i] != TRUE)
|
|
||||||
continue;
|
|
||||||
|
|
||||||
rnti = UE_RNTI(module_idP, i);
|
|
||||||
|
|
||||||
if (rnti == NOT_A_RNTI)
|
|
||||||
continue;
|
|
||||||
|
|
||||||
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
|
|
||||||
continue;
|
|
||||||
|
|
||||||
if (!ue_ul_slice_membership(module_idP, i, slice_idx))
|
|
||||||
continue;
|
|
||||||
|
|
||||||
if (UE_list->UE_sched_ctrl[i].phr_received == 1) {
|
if (UE_list->UE_sched_ctrl[i].phr_received == 1) {
|
||||||
/* if we've received the power headroom information the UE, we can go to
|
/* if we've received the power headroom information the UE, we can go to
|
||||||
* maximum mcs */
|
* maximum mcs */
|
||||||
@@ -1827,21 +1814,21 @@ assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
|
|||||||
for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
|
for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
|
||||||
// This is the actual CC_id in the list
|
// This is the actual CC_id in the list
|
||||||
CC_id = UE_list->ordered_ULCCids[n][UE_id];
|
CC_id = UE_list->ordered_ULCCids[n][UE_id];
|
||||||
AssertFatal(CC_id < RC.nb_mac_CC[module_idP],
|
AssertFatal(CC_id < RC.nb_mac_CC[module_idP], "CC_id %u should be < %u, loop n=%u < numactiveULCCs[%u]=%u",
|
||||||
"CC_id %u should be < %u, loop n=%u < numactiveULCCs[%u]=%u",
|
CC_id,
|
||||||
CC_id, NFAPI_CC_MAX, n, UE_id,
|
NFAPI_CC_MAX,
|
||||||
|
n,
|
||||||
|
UE_id,
|
||||||
UE_list->numactiveULCCs[UE_id]);
|
UE_list->numactiveULCCs[UE_id]);
|
||||||
UE_template = &UE_list->UE_template[CC_id][UE_id];
|
UE_template = &UE_list->UE_template[CC_id][UE_id];
|
||||||
UE_template->pre_assigned_mcs_ul = mcs;
|
UE_template->pre_assigned_mcs_ul = mcs;
|
||||||
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
|
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
|
||||||
Ncp = RC.mac[module_idP]->common_channels[CC_id].Ncp;
|
Ncp = eNB->common_channels[CC_id].Ncp;
|
||||||
N_RB_UL = to_prb(RC.mac[module_idP]->common_channels[CC_id].ul_Bandwidth);
|
N_RB_UL = to_prb(eNB->common_channels[CC_id].ul_Bandwidth);
|
||||||
ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx] =
|
ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx] = nb_rbs_allowed_slice(sli->ul[slice_idx].pct, N_RB_UL);
|
||||||
nb_rbs_allowed_slice(sli->ul[slice_idx].pct, N_RB_UL);
|
|
||||||
int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes;
|
int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes;
|
||||||
|
|
||||||
if (bytes_to_schedule < 0) bytes_to_schedule = 0;
|
if (bytes_to_schedule < 0) bytes_to_schedule = 0;
|
||||||
|
|
||||||
int bits_to_schedule = bytes_to_schedule * 8;
|
int bits_to_schedule = bytes_to_schedule * 8;
|
||||||
|
|
||||||
// if this UE has UL traffic
|
// if this UE has UL traffic
|
||||||
@@ -1851,9 +1838,7 @@ assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
|
|||||||
// fixme: set use_srs flag
|
// fixme: set use_srs flag
|
||||||
tx_power = estimate_ue_tx_power(tbs, rb_table[rb_table_index], 0, Ncp, 0);
|
tx_power = estimate_ue_tx_power(tbs, rb_table[rb_table_index], 0, Ncp, 0);
|
||||||
|
|
||||||
while ((((UE_template->phr_info - tx_power) < 0)
|
while ((UE_template->phr_info - tx_power < 0 || tbs > bits_to_schedule) && UE_template->pre_assigned_mcs_ul > 3) {
|
||||||
|| (tbs > bits_to_schedule))
|
|
||||||
&& (UE_template->pre_assigned_mcs_ul > 3)) {
|
|
||||||
// LOG_I(MAC,"UE_template->phr_info %d tx_power %d mcs %d\n", UE_template->phr_info,tx_power, mcs);
|
// LOG_I(MAC,"UE_template->phr_info %d tx_power %d mcs %d\n", UE_template->phr_info,tx_power, mcs);
|
||||||
UE_template->pre_assigned_mcs_ul--;
|
UE_template->pre_assigned_mcs_ul--;
|
||||||
tbs = get_TBS_UL(UE_template->pre_assigned_mcs_ul, rb_table[rb_table_index]) << 3;
|
tbs = get_TBS_UL(UE_template->pre_assigned_mcs_ul, rb_table[rb_table_index]) << 3;
|
||||||
@@ -1861,13 +1846,13 @@ assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
|
|||||||
}
|
}
|
||||||
|
|
||||||
first_rb_offset = UE_list->first_rb_offset[CC_id][slice_idx];
|
first_rb_offset = UE_list->first_rb_offset[CC_id][slice_idx];
|
||||||
available_rbs = cmin(ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx],
|
available_rbs =
|
||||||
N_RB_UL - first_rb[CC_id] - first_rb_offset);
|
cmin(ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx], N_RB_UL - first_rb[CC_id] - first_rb_offset);
|
||||||
|
|
||||||
while ((tbs < bits_to_schedule)
|
while (tbs < bits_to_schedule &&
|
||||||
&& (rb_table[rb_table_index] < available_rbs)
|
rb_table[rb_table_index] < available_rbs &&
|
||||||
&& ((UE_template->phr_info - tx_power) > 0)
|
UE_template->phr_info - tx_power > 0 &&
|
||||||
&& (rb_table_index < 32)) {
|
rb_table_index < 32) {
|
||||||
rb_table_index++;
|
rb_table_index++;
|
||||||
tbs = get_TBS_UL(UE_template->pre_assigned_mcs_ul, rb_table[rb_table_index]) << 3;
|
tbs = get_TBS_UL(UE_template->pre_assigned_mcs_ul, rb_table[rb_table_index]) << 3;
|
||||||
tx_power = estimate_ue_tx_power(tbs, rb_table[rb_table_index], 0, Ncp, 0);
|
tx_power = estimate_ue_tx_power(tbs, rb_table[rb_table_index], 0, Ncp, 0);
|
||||||
@@ -1884,9 +1869,12 @@ assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
|
|||||||
|
|
||||||
UE_template->pre_allocated_rb_table_index_ul = rb_table_index;
|
UE_template->pre_allocated_rb_table_index_ul = rb_table_index;
|
||||||
UE_template->pre_allocated_nb_rb_ul[slice_idx] = rb_table[rb_table_index];
|
UE_template->pre_allocated_nb_rb_ul[slice_idx] = rb_table[rb_table_index];
|
||||||
LOG_D(MAC,
|
LOG_D(MAC, "[eNB %d] frame %d subframe %d: for UE %d CC %d: pre-assigned mcs %d, pre-allocated rb_table[%d]=%d RBs (phr %d, tx power %d)\n",
|
||||||
"[eNB %d] frame %d subframe %d: for UE %d CC %d: pre-assigned mcs %d, pre-allocated rb_table[%d]=%d RBs (phr %d, tx power %d)\n",
|
module_idP,
|
||||||
module_idP, frameP, subframeP, UE_id, CC_id,
|
frameP,
|
||||||
|
subframeP,
|
||||||
|
UE_id,
|
||||||
|
CC_id,
|
||||||
UE_template->pre_assigned_mcs_ul,
|
UE_template->pre_assigned_mcs_ul,
|
||||||
UE_template->pre_allocated_rb_table_index_ul,
|
UE_template->pre_allocated_rb_table_index_ul,
|
||||||
UE_template->pre_allocated_nb_rb_ul[slice_idx],
|
UE_template->pre_allocated_nb_rb_ul[slice_idx],
|
||||||
@@ -1968,37 +1956,39 @@ static int ue_ul_compare(const void *_a, const void *_b, void *_params) {
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void sort_ue_ul(module_id_t module_idP, int frameP, sub_frame_t subframeP) {
|
void
|
||||||
|
sort_ue_ul(module_id_t module_idP,
|
||||||
|
int slice_idx,
|
||||||
|
int frameP,
|
||||||
|
sub_frame_t subframeP,
|
||||||
|
rnti_t *rntiTable)
|
||||||
|
{
|
||||||
int i;
|
int i;
|
||||||
int list[MAX_MOBILES_PER_ENB];
|
int list[MAX_MOBILES_PER_ENB];
|
||||||
int list_size = 0;
|
int list_size = 0;
|
||||||
int rnti;
|
|
||||||
struct sort_ue_ul_params params = { module_idP, frameP, subframeP };
|
struct sort_ue_ul_params params = { module_idP, frameP, subframeP };
|
||||||
UE_list_t *UE_list = &RC.mac[module_idP]->UE_list;
|
UE_list_t *UE_list = &RC.mac[module_idP]->UE_list;
|
||||||
|
|
||||||
for (i = 0; i < MAX_MOBILES_PER_ENB; i++) {
|
for (i = 0; i < MAX_MOBILES_PER_ENB; i++) {
|
||||||
if (UE_list->active[i] == FALSE)
|
rntiTable[i] = UE_RNTI(module_idP, i);
|
||||||
continue;
|
// Valid element and is not the actual CC_id in the list
|
||||||
|
if (UE_list->active[i] == TRUE &&
|
||||||
if ((rnti = UE_RNTI(module_idP, i)) == NOT_A_RNTI)
|
rntiTable[i] != NOT_A_RNTI &&
|
||||||
continue;
|
UE_list->UE_sched_ctrl[i].ul_out_of_sync != 1 &&
|
||||||
|
ue_ul_slice_membership(module_idP, i, slice_idx)) {
|
||||||
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
|
list[list_size++] = i; // Add to list
|
||||||
continue;
|
}
|
||||||
|
|
||||||
list[list_size] = i;
|
|
||||||
list_size++;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
qsort_r(list, list_size, sizeof(int), ue_ul_compare, ¶ms);
|
qsort_r(list, list_size, sizeof(int), ue_ul_compare, ¶ms);
|
||||||
|
|
||||||
if (list_size) {
|
if (list_size) { // At mimimum one list element
|
||||||
for (i = 0; i < list_size - 1; i++)
|
for (i = 0; i < list_size - 1; i++)
|
||||||
UE_list->next_ul[list[i]] = list[i + 1];
|
UE_list->next_ul[list[i]] = list[i + 1];
|
||||||
|
|
||||||
UE_list->next_ul[list[list_size - 1]] = -1;
|
UE_list->next_ul[list[list_size - 1]] = -1;
|
||||||
UE_list->head_ul = list[0];
|
UE_list->head_ul = list[0];
|
||||||
} else {
|
} else { // No element
|
||||||
UE_list->head_ul = -1;
|
UE_list->head_ul = -1;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
Reference in New Issue
Block a user