Debug removed and first fix added for false RA caused by UL scheduling on PRACH resources
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@@ -2582,7 +2582,7 @@ schedule_ulsch_fairRR(module_id_t module_idP, frame_t frameP,
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frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
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frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset,
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0,//tdd_mapindex
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frameP); //Nf
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frameP); //Nf --> shouldn't it be sched_frame ???
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ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].nb_rb = 6;
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ulsch_ue_select[CC_id].list[ulsch_ue_select[CC_id].ue_num].UE_id = -1;
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ulsch_ue_select[CC_id].ue_num++;
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@@ -133,31 +133,6 @@ rx_sdu(const module_id_t enb_mod_idP,
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memset(rx_lcids, 0, NB_RB_MAX * sizeof(unsigned char));
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memset(rx_lengths, 0, NB_RB_MAX * sizeof(unsigned short));
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// LAD
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/*
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if (UE_id == -1) {
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LOG_E(MAC, "Step 1\n");
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LOG_W(MAC, "[MAC] UE_id = -1 ; RNTI = %x ; frame = %d ; subframe = %d ; sdu_length = %d ; sdu = %d\n",
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rntiP,
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frameP,
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subframeP,
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sdu_lenP,
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*sduP);
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}
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*/
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// LAD
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/*
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first_rb = UE_list->UE_template[CC_idP][UE_id].first_rb_ul[harq_pid];
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LOG_W(MAC, "[MAC] UE_id = %d : first_rb = %d ; scheduled_ul_bytes = %d ; TBS_UL = %d ; frame = %d ; subframe = %d\n",
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UE_id,
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first_rb,
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UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes,
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UE_list->UE_template[CC_idP][UE_id].TBS_UL[harq_pid],
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frameP,
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subframeP);
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*/
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start_meas(&mac->rx_ulsch_sdu);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_SDU, 1);
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@@ -206,17 +181,7 @@ rx_sdu(const module_id_t enb_mod_idP,
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mac_eNB_rrc_ul_in_sync(enb_mod_idP, CC_idP, frameP, subframeP, current_rnti);
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}
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/* update bytes to schedule */
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// LAD
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/*
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LOG_E(MAC, "Step 2\n");
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LOG_W(MAC, "[MAC] UE_id != -1 and sduP != NULL : first_rb = %d ; scheduled_ul_bytes = %d ; TBS_UL = %d\n",
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first_rb,
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UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes,
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UE_list->UE_template[CC_idP][UE_id].TBS_UL[harq_pid]);
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*/
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/* Update bytes to schedule */
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UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes -= UE_list->UE_template[CC_idP][UE_id].TBS_UL[harq_pid];
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if (UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes < 0) {
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@@ -310,15 +275,6 @@ rx_sdu(const module_id_t enb_mod_idP,
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first_rb = ra[RA_id].msg3_first_rb;
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// LAD
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/*
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LOG_E(MAC, "Step 3\n");
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LOG_W(MAC, "[MAC] UE_id == -1 : first_rb = %d ; scheduled_ul_bytes = %d ; TBS_UL = %d\n",
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first_rb,
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UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes,
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UE_list->UE_template[CC_idP][UE_id].TBS_UL[harq_pid]);
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*/
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if (sduP == NULL) { // we've got an error on Msg3
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LOG_W(MAC, "[eNB %d] CC_id %d, RA %d ULSCH in error in round %d/%d\n",
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enb_mod_idP,
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@@ -333,26 +289,6 @@ rx_sdu(const module_id_t enb_mod_idP,
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// first_rb = UE_list->UE_template[CC_idP][UE_id].first_rb_ul[harq_pid]; // UE_id = -1 !!!!
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ra[RA_id].msg3_round++;
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// LAD
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/*
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LOG_E(MAC, "Step 4\n");
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LOG_W(MAC, "[MAC] [UEINFO1] UE_id = %d ; RNTI_ue_template = %x ; RNTI_sdu = %x\n",
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UE_id,
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UE_list->UE_template[CC_idP][UE_id].rnti,
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current_rnti);
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// LAD
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LOG_W(MAC, "[MAC] UE_id == -1 and sduP == NULL : first_rb = %d ; scheduled_ul_bytes = %d ; TBS_UL = %d\n",
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first_rb,
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UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes,
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UE_list->UE_template[CC_idP][UE_id].TBS_UL[harq_pid]);
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// LAD
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LOG_W(MAC, "[MAC] [RAPROC] msg3_subframe = %d ; msg3_frame = %d\n",
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ra[RA_id].Msg3_subframe,
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ra[RA_id].Msg3_frame);
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*/
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/* Prepare handling of retransmission */
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get_Msg3allocret(&mac->common_channels[CC_idP],
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ra[RA_id].Msg3_subframe,
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@@ -360,13 +296,6 @@ rx_sdu(const module_id_t enb_mod_idP,
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&ra[RA_id].Msg3_frame,
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&ra[RA_id].Msg3_subframe);
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// LAD
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/*
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LOG_W(MAC, "[MAC] [RAPROC] After update: msg3_subframe = %d ; msg3_frame = %d\n",
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ra[RA_id].Msg3_subframe,
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ra[RA_id].Msg3_frame);
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*/
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add_msg3(enb_mod_idP, CC_idP, &ra[RA_id], frameP, subframeP);
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}
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@@ -421,17 +350,6 @@ rx_sdu(const module_id_t enb_mod_idP,
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if (UE_id != -1) {
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UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid] = 0;
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}
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// LAD
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/*
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LOG_E(MAC, "Step 5\n");
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LOG_W(MAC, "[MAC] [UEINFO2] UE_id = %d ; RNTI_ue_template = %x ; RNTI_sdu = %x ; frame = %d ; subframe = %d\n",
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UE_id,
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UE_list->UE_template[CC_idP][UE_id].rnti,
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current_rnti,
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frameP,
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subframeP);
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*/
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/* Control element */
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for (int i = 0; i < num_ce; i++) {
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@@ -1278,42 +1196,27 @@ schedule_ulsch(module_id_t module_idP,
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LTE_DL_FRAME_PARMS *frame_parms = &(RC.eNB[module_idP][CC_id]->frame_parms);
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RA_t *ra_ptr = cc->ra;
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/* Louis-Adrien: Only set for FDD (for the moment)
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* Hard coded for prach-ConfigIndex = 0 and prach-Freqoffset = 2
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* ToDo: The PRACH resources should be added with modularity (here?)
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/* From Louis-Adrien to François:
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* The comment bloc below is to configure with a command line.
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* I took it from the equivalent part in the fairRR scheduler (around line 2578 in eNB_scheduler_fairRR.c).
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* As said in the meeting, it seems to work only for small TBS.
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* The cause of false RA still present with this fix is to investigate.
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*
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* Note: in the get_prach_prb_offset() function below, the last argument is frameP in eNB_scheduler_fairRR.c
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* I think it should be sched_frame instead. This parameter has only impacts in case TDD and preamble format 4.
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* To confirm.
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*/
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/*
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if (cc->tdd_Config == NULL) { // FDD
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if (((sched_frame %2) == 0) && sched_subframe == 1) { // RACH frame and subframe
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if (first_rb[CC_id] < 8) {
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n_rb_ul_tab = to_prb(cc->ul_Bandwidth); // return total number of PRB
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if (n_rb_ul_tab >= 8) {
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first_rb[CC_id] = 8;
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} else {
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return;
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}
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}
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}
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}
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*/
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if (is_prach_subframe(frame_parms, sched_frame, sched_subframe) == 1) {
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start_rb = get_prach_prb_offset(frame_parms,
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frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
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frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset,
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0, // tdd_mapindex
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frameP); // Nf --> shouldn't it be sched_frame ???
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sched_frame); // Nf
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first_rb[CC_id] = start_rb + nb_rb;
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// LAD
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LOG_W(MAC, "[MAC] Config Index = %d ; Freq_offset = %d ; first_rb = %d ; subframe = %d ; sched_subframe = %d\n",
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frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
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frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset,
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first_rb[CC_id],
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subframeP,
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sched_subframe);
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}
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*/
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/*
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* Check if RA (Msg3) is active in this subframeP, if so skip the PRB used for Msg3
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@@ -1326,7 +1229,7 @@ schedule_ulsch(module_id_t module_idP,
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first_rb[CC_id] = ra_ptr->msg3_first_rb + ra_ptr->msg3_nb_rb;
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}
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/* Louis-Adrien: I couldn't find an interdiction of multiple Msg3 scheduling
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* on the same resources. Also the performance improvement of breaking is low,
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* on the same time resources. Also the performance improvement of breaking is low,
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* since we will loop until the end, most of the time.
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* I'm letting the break as a reminder, in case of misunderstanding the spec.
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*/
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