pre_processor improvements
This commit is contained in:
@@ -726,7 +726,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP, int slice_idx, int fr
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uint16_t * first_rb);
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void store_ulsch_buffer(module_id_t module_idP, int frameP,
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sub_frame_t subframeP);
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void sort_ue_ul(module_id_t module_idP, int frameP, sub_frame_t subframeP);
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void sort_ue_ul(module_id_t module_idP, int slice_idx, int frameP, sub_frame_t subframeP, rnti_t *rntiTable);
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void assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
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sub_frame_t subframeP, uint16_t * first_rb);
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void adjust_bsr_info(int buffer_occupancy, uint16_t TBS,
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@@ -1618,14 +1618,13 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
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int N_RB_UL = 0;
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uint16_t available_rbs, first_rb_offset;
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rnti_t rntiTable[MAX_MOBILES_PER_ENB]; // Rnti array => Add SSR 12-2018
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bool continueTable[MAX_MOBILES_PER_ENB]; // Loop continue flag array => Add SSR 12-2018
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bool sliceMember; // Slice membership flag => Add SSR 12-2018
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LOG_D(MAC, "In ulsch_preprocessor: assign max mcs min rb\n");
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// maximize MCS and then allocate required RB according to the buffer occupancy with the limit of max available UL RB
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assign_max_mcs_min_rb(module_idP, slice_idx, frameP, subframeP, first_rb);
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LOG_D(MAC, "In ulsch_preprocessor: sort ue \n");
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// sort ues
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sort_ue_ul(module_idP, frameP, subframeP);
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LOG_D(MAC, "In ulsch_preprocessor: sort ue \n");
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sort_ue_ul(module_idP, slice_idx, frameP, subframeP, rntiTable);
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// maximize MCS and then allocate required RB according to the buffer occupancy with the limit of max available UL RB
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LOG_D(MAC, "In ulsch_preprocessor: assign max mcs min rb\n");
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assign_max_mcs_min_rb(module_idP, slice_idx, frameP, subframeP, first_rb);
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// we need to distribute RBs among UEs
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// step1: reset the vars
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uint8_t CC_nb = (uint8_t) RC.nb_mac_CC[module_idP];
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@@ -1639,45 +1638,33 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
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// Step 1.5: Calculate total_ue_count
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for (UE_id = UE_list->head_ul; UE_id >= 0; UE_id = UE_list->next_ul[UE_id]) {
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// Calculate continue condition
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/*
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if (UE_RNTI(module_idP, UE_id) == NOT_A_RNTI)
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continue;
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if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
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continue;
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if (!ue_ul_slice_membership(module_idP, UE_id, slice_idx))
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continue;
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*/
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rntiTable[UE_id] = UE_RNTI(module_idP, UE_id);
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sliceMember = ue_ul_slice_membership(module_idP, UE_id, slice_idx);
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continueTable[UE_id] = (rntiTable[UE_id] == NOT_A_RNTI || UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1 || !sliceMember);
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// This is not the actual CC_id in the list
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if (sliceMember) {
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for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
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CC_id = UE_list->ordered_ULCCids[n][UE_id];
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UE_template = &UE_list->UE_template[CC_id][UE_id];
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for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
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CC_id = UE_list->ordered_ULCCids[n][UE_id];
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UE_template = &UE_list->UE_template[CC_id][UE_id];
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if (UE_template->pre_allocated_nb_rb_ul[slice_idx] > 0) {
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total_ue_count[CC_id]++;
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}
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if (UE_template->pre_allocated_nb_rb_ul[slice_idx] > 0) {
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total_ue_count[CC_id]++;
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}
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}
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}
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LOG_D(MAC, "In ulsch_preprocessor: step2 \n");
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// step 2: calculate the average rb per UE
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LOG_D(MAC, "In ulsch_preprocessor: step2 \n");
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for (UE_id = UE_list->head_ul; UE_id >= 0; UE_id = UE_list->next_ul[UE_id]) {
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if (continueTable[UE_id]) continue;
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// if (continueTable[UE_id]) continue;
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LOG_D(MAC, "In ulsch_preprocessor: handling UE %d/%x\n", UE_id,
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LOG_D(MAC, "In ulsch_preprocessor: handling UE %d/%x\n",
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UE_id,
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rntiTable[UE_id]);
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for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
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// This is the actual CC_id in the list
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CC_id = UE_list->ordered_ULCCids[n][UE_id];
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LOG_D(MAC, "In ulsch_preprocessor: handling UE %d/%x CCid %d\n", UE_id, rntiTable[UE_id], CC_id);
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LOG_D(MAC, "In ulsch_preprocessor: handling UE %d/%x CCid %d\n",
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UE_id,
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rntiTable[UE_id],
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CC_id);
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/*
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if((mac_xface->get_nCCE_max(module_idP,CC_id,3,subframeP) - nCCE_to_be_used[CC_id]) > (1<<aggregation)) {
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nCCE_to_be_used[CC_id] = nCCE_to_be_used[CC_id] + (1<<aggregation);
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@@ -1688,8 +1675,8 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
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ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx] =
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nb_rbs_allowed_slice(sli->ul[slice_idx].pct, N_RB_UL);
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first_rb_offset = UE_list->first_rb_offset[CC_id][slice_idx];
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available_rbs = cmin(ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx],
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N_RB_UL - first_rb[CC_id] - first_rb_offset);
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available_rbs =
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cmin(ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx], N_RB_UL - first_rb[CC_id] - first_rb_offset);
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if (available_rbs < 0)
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available_rbs = 0;
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@@ -1702,21 +1689,27 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
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average_rbs_per_user[CC_id] = (uint16_t) floor(available_rbs / total_ue_count[CC_id]);
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} else {
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average_rbs_per_user[CC_id] = 1;
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LOG_W(MAC,
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"[eNB %d] frame %d subframe %d: UE %d CC %d: can't get average rb per user (should not be here)\n",
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module_idP, frameP, subframeP, UE_id, CC_id);
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LOG_W(MAC, "[eNB %d] frame %d subframe %d: UE %d CC %d: can't get average rb per user (should not be here)\n",
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module_idP,
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frameP,
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subframeP,
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UE_id,
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CC_id);
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}
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if (total_ue_count[CC_id] > 0) {
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LOG_D(MAC, "[eNB %d] Frame %d subframe %d: total ue to be scheduled %d\n",
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module_idP, frameP, subframeP, total_ue_count[CC_id]);
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module_idP,
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frameP,
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subframeP,
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total_ue_count[CC_id]);
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}
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}
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}
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// step 3: assigne RBS
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for (UE_id = UE_list->head_ul; UE_id >= 0; UE_id = UE_list->next_ul[UE_id]) {
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if (continueTable[UE_id]) continue;
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// if (continueTable[UE_id]) continue;
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for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
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// This is the actual CC_id in the list
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@@ -1735,16 +1728,18 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
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}
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total_allocated_rbs[CC_id] += nb_allocated_rbs[CC_id][UE_id];
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LOG_D(MAC,
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"In ulsch_preprocessor: assigning %d RBs for UE %d/%x CCid %d, harq_pid %d\n",
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nb_allocated_rbs[CC_id][UE_id], UE_id, rntiTable[UE_id], CC_id,
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LOG_D(MAC, "In ulsch_preprocessor: assigning %d RBs for UE %d/%x CCid %d, harq_pid %d\n",
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nb_allocated_rbs[CC_id][UE_id],
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UE_id,
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rntiTable[UE_id],
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CC_id,
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harq_pid);
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}
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}
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// step 4: assigne the remaining RBs and set the pre_allocated rbs accordingly
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for (UE_id = UE_list->head_ul; UE_id >= 0; UE_id = UE_list->next_ul[UE_id]) {
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if (continueTable[UE_id]) continue;
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// if (continueTable[UE_id]) continue;
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ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
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@@ -1761,9 +1756,9 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
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total_remaining_rbs[CC_id]++;
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}
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while ((UE_template->pre_allocated_nb_rb_ul[slice_idx] > 0)
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&& (nb_allocated_rbs[CC_id][UE_id] < UE_template->pre_allocated_nb_rb_ul[slice_idx])
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&& (total_remaining_rbs[CC_id] > 0)) {
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while (UE_template->pre_allocated_nb_rb_ul[slice_idx] > 0 &&
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nb_allocated_rbs[CC_id][UE_id] < UE_template->pre_allocated_nb_rb_ul[slice_idx] &&
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total_remaining_rbs[CC_id] > 0) {
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nb_allocated_rbs[CC_id][UE_id] = cmin(nb_allocated_rbs[CC_id][UE_id] + 1, UE_template->pre_allocated_nb_rb_ul[slice_idx]);
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total_remaining_rbs[CC_id]--;
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total_allocated_rbs[CC_id]++;
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@@ -1771,9 +1766,13 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
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UE_template->pre_allocated_nb_rb_ul[slice_idx] = nb_allocated_rbs[CC_id][UE_id];
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LOG_D(MAC, "******************UL Scheduling Information for UE%d CC_id %d ************************\n",
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UE_id, CC_id);
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UE_id,
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CC_id);
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LOG_D(MAC, "[eNB %d] total RB allocated for UE%d CC_id %d = %d\n",
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module_idP, UE_id, CC_id, UE_template->pre_allocated_nb_rb_ul[slice_idx]);
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module_idP,
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UE_id,
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CC_id,
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UE_template->pre_allocated_nb_rb_ul[slice_idx]);
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}
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}
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@@ -1781,38 +1780,26 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
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}
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void
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assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
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sub_frame_t subframeP, uint16_t *first_rb) {
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assign_max_mcs_min_rb(module_id_t module_idP,
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int slice_idx,
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int frameP,
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sub_frame_t subframeP,
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uint16_t *first_rb) {
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int i;
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uint16_t n, UE_id;
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uint8_t CC_id;
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rnti_t rnti = -1;
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int mcs;
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int rb_table_index = 0, tbs, tx_power;
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eNB_MAC_INST *eNB = RC.mac[module_idP];
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UE_list_t *UE_list = &eNB->UE_list;
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slice_info_t *sli = &RC.mac[module_idP]->slice_info;
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slice_info_t *sli = &eNB->slice_info;
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UE_TEMPLATE *UE_template;
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UE_sched_ctrl *ue_sched_ctl;
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int Ncp;
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int N_RB_UL;
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int first_rb_offset, available_rbs;
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for (i = 0; i < MAX_MOBILES_PER_ENB; i++) {
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if (UE_list->active[i] != TRUE)
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continue;
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rnti = UE_RNTI(module_idP, i);
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if (rnti == NOT_A_RNTI)
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continue;
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if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
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continue;
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if (!ue_ul_slice_membership(module_idP, i, slice_idx))
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continue;
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for (i = UE_list->head_ul; i >= 0; i = UE_list->next_ul[i]) {
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if (UE_list->UE_sched_ctrl[i].phr_received == 1) {
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/* if we've received the power headroom information the UE, we can go to
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* maximum mcs */
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@@ -1827,21 +1814,21 @@ assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
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for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
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// This is the actual CC_id in the list
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CC_id = UE_list->ordered_ULCCids[n][UE_id];
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AssertFatal(CC_id < RC.nb_mac_CC[module_idP],
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"CC_id %u should be < %u, loop n=%u < numactiveULCCs[%u]=%u",
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CC_id, NFAPI_CC_MAX, n, UE_id,
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AssertFatal(CC_id < RC.nb_mac_CC[module_idP], "CC_id %u should be < %u, loop n=%u < numactiveULCCs[%u]=%u",
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CC_id,
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NFAPI_CC_MAX,
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n,
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UE_id,
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UE_list->numactiveULCCs[UE_id]);
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UE_template = &UE_list->UE_template[CC_id][UE_id];
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UE_template->pre_assigned_mcs_ul = mcs;
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ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
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Ncp = RC.mac[module_idP]->common_channels[CC_id].Ncp;
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N_RB_UL = to_prb(RC.mac[module_idP]->common_channels[CC_id].ul_Bandwidth);
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ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx] =
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nb_rbs_allowed_slice(sli->ul[slice_idx].pct, N_RB_UL);
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Ncp = eNB->common_channels[CC_id].Ncp;
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N_RB_UL = to_prb(eNB->common_channels[CC_id].ul_Bandwidth);
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ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx] = nb_rbs_allowed_slice(sli->ul[slice_idx].pct, N_RB_UL);
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int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes;
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if (bytes_to_schedule < 0) bytes_to_schedule = 0;
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int bits_to_schedule = bytes_to_schedule * 8;
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// if this UE has UL traffic
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@@ -1851,9 +1838,7 @@ assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
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// fixme: set use_srs flag
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tx_power = estimate_ue_tx_power(tbs, rb_table[rb_table_index], 0, Ncp, 0);
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while ((((UE_template->phr_info - tx_power) < 0)
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|| (tbs > bits_to_schedule))
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&& (UE_template->pre_assigned_mcs_ul > 3)) {
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while ((UE_template->phr_info - tx_power < 0 || tbs > bits_to_schedule) && UE_template->pre_assigned_mcs_ul > 3) {
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// LOG_I(MAC,"UE_template->phr_info %d tx_power %d mcs %d\n", UE_template->phr_info,tx_power, mcs);
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UE_template->pre_assigned_mcs_ul--;
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tbs = get_TBS_UL(UE_template->pre_assigned_mcs_ul, rb_table[rb_table_index]) << 3;
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@@ -1861,13 +1846,13 @@ assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
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}
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first_rb_offset = UE_list->first_rb_offset[CC_id][slice_idx];
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available_rbs = cmin(ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx],
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N_RB_UL - first_rb[CC_id] - first_rb_offset);
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available_rbs =
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cmin(ue_sched_ctl->max_rbs_allowed_slice_uplink[CC_id][slice_idx], N_RB_UL - first_rb[CC_id] - first_rb_offset);
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while ((tbs < bits_to_schedule)
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&& (rb_table[rb_table_index] < available_rbs)
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&& ((UE_template->phr_info - tx_power) > 0)
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&& (rb_table_index < 32)) {
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while (tbs < bits_to_schedule &&
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rb_table[rb_table_index] < available_rbs &&
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UE_template->phr_info - tx_power > 0 &&
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rb_table_index < 32) {
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rb_table_index++;
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tbs = get_TBS_UL(UE_template->pre_assigned_mcs_ul, rb_table[rb_table_index]) << 3;
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tx_power = estimate_ue_tx_power(tbs, rb_table[rb_table_index], 0, Ncp, 0);
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@@ -1884,9 +1869,12 @@ assign_max_mcs_min_rb(module_id_t module_idP, int slice_idx, int frameP,
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UE_template->pre_allocated_rb_table_index_ul = rb_table_index;
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UE_template->pre_allocated_nb_rb_ul[slice_idx] = rb_table[rb_table_index];
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LOG_D(MAC,
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"[eNB %d] frame %d subframe %d: for UE %d CC %d: pre-assigned mcs %d, pre-allocated rb_table[%d]=%d RBs (phr %d, tx power %d)\n",
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module_idP, frameP, subframeP, UE_id, CC_id,
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LOG_D(MAC, "[eNB %d] frame %d subframe %d: for UE %d CC %d: pre-assigned mcs %d, pre-allocated rb_table[%d]=%d RBs (phr %d, tx power %d)\n",
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module_idP,
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frameP,
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subframeP,
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UE_id,
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CC_id,
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UE_template->pre_assigned_mcs_ul,
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UE_template->pre_allocated_rb_table_index_ul,
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UE_template->pre_allocated_nb_rb_ul[slice_idx],
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@@ -1968,37 +1956,39 @@ static int ue_ul_compare(const void *_a, const void *_b, void *_params) {
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return 0;
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}
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void sort_ue_ul(module_id_t module_idP, int frameP, sub_frame_t subframeP) {
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void
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sort_ue_ul(module_id_t module_idP,
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int slice_idx,
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int frameP,
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sub_frame_t subframeP,
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rnti_t *rntiTable)
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{
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int i;
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int list[MAX_MOBILES_PER_ENB];
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int list_size = 0;
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int rnti;
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struct sort_ue_ul_params params = { module_idP, frameP, subframeP };
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UE_list_t *UE_list = &RC.mac[module_idP]->UE_list;
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||||
for (i = 0; i < MAX_MOBILES_PER_ENB; i++) {
|
||||
if (UE_list->active[i] == FALSE)
|
||||
continue;
|
||||
|
||||
if ((rnti = UE_RNTI(module_idP, i)) == NOT_A_RNTI)
|
||||
continue;
|
||||
|
||||
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
|
||||
continue;
|
||||
|
||||
list[list_size] = i;
|
||||
list_size++;
|
||||
rntiTable[i] = UE_RNTI(module_idP, i);
|
||||
// Valid element and is not the actual CC_id in the list
|
||||
if (UE_list->active[i] == TRUE &&
|
||||
rntiTable[i] != NOT_A_RNTI &&
|
||||
UE_list->UE_sched_ctrl[i].ul_out_of_sync != 1 &&
|
||||
ue_ul_slice_membership(module_idP, i, slice_idx)) {
|
||||
list[list_size++] = i; // Add to list
|
||||
}
|
||||
}
|
||||
|
||||
qsort_r(list, list_size, sizeof(int), ue_ul_compare, ¶ms);
|
||||
|
||||
if (list_size) {
|
||||
if (list_size) { // At mimimum one list element
|
||||
for (i = 0; i < list_size - 1; i++)
|
||||
UE_list->next_ul[list[i]] = list[i + 1];
|
||||
|
||||
UE_list->next_ul[list[list_size - 1]] = -1;
|
||||
UE_list->head_ul = list[0];
|
||||
} else {
|
||||
} else { // No element
|
||||
UE_list->head_ul = -1;
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user