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fill_dci for 1_0 RA_RNTI

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This commit is contained in:
Guy De Souza
2018-08-03 09:59:12 +02:00
parent 32af23b0c1
commit 271303c57a
9 changed files with 108 additions and 108 deletions
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openair1/PHY/INIT/nr_init.c
+1 -1
View File
@@ -128,7 +128,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t*));
AssertFatal(pdcch_dmrs[slot]!=NULL, "NR init: pdcch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++){
pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(NR_MAX_PDCCH_DMRS_LENGTH_DWORD*sizeof(uint32_t));
pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
AssertFatal(pdcch_dmrs[slot][symb]!=NULL, "NR init: pdcch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
}
}
openair1/PHY/NR_REFSIG/nr_gold.c
+1 -1
View File
@@ -67,7 +67,7 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
reset = 1;
x2 = ((1<<17) * (14*slot+symb+1) * ((Nid<<1)+1) + (Nid<<1))&(((uint32_t)1<<31)-1);
for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_LENGTH_DWORD; n++) {
for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) {
pdcch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
openair1/PHY/NR_TRANSPORT/nr_dci.c
+6 -8
View File
@@ -51,8 +51,8 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
size += 20;
size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated
size += nr_get_dci_size(NFAPI_NR_DL_DCI_FORMAT_1_0, rnti_type, bwp, config) - size; // Padding to match 1_0 size
// UL/SUL indicator assumed to be 0
// Padding
break;
case NFAPI_NR_UL_DCI_FORMAT_0_1:
@@ -81,7 +81,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
/// fixed: Format identifier 1, VRB2PRB 1, MCS 5, NDI 1, RV 2, HARQ PID 4, DAI 2, PUCCH TPC 2, PUCCH RInd 3, PDSCH to HARQ TInd 3 Time Domain assgnmt 4 -- 28
size += 28;
size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment
// Time domain assignment
break;
case NFAPI_NR_DL_DCI_FORMAT_1_1:
@@ -160,7 +160,7 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
nfapi_nr_config_request_t config)
{
uint16_t mod_dmrs[NR_MAX_PDCCH_DMRS_LENGTH<<1];
uint16_t mod_dmrs[NR_MAX_PDCCH_DMRS_LENGTH>>1];
uint8_t idx=0;
uint16_t a;
int k,l,k_prime,dci_idx, dmrs_idx;
@@ -181,7 +181,6 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
mod_dmrs[i<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
mod_dmrs[(i<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_PDCCH_DMRS
printf("DMRS modulation\n");
printf("i %d idx %d gold seq %d b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, gold_pdcch_dmrs[(i<<1)>>5], (((gold_pdcch_dmrs[(i<<1)>>5])>>((i<<1)&0x1f))&1),
(((gold_pdcch_dmrs[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), mod_dmrs[(i<<1)], mod_dmrs[(i<<1)+1]);
#endif
@@ -192,8 +191,8 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
// scrambling
uint32_t scrambled_payload[4];
uint32_t Nid = (dci_alloc.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
uint32_t n_RNTI = (dci_alloc.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? dci_alloc.rnti : 0;
uint32_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
uint32_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.rnti : 0;
nr_pdcch_scrambling(dci_alloc.dci_pdu, dci_alloc.size, Nid, n_RNTI, scrambled_payload);
// QPSK modulation
@@ -203,8 +202,7 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
mod_dci[i<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
mod_dci[(i<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_DCI
printf("DCI modulation\n");
printf("i %d idx %d b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, (((scrambled_payload[(i<<1)>>5])>>((i<<1)&0x1f))&1),
printf("i %d idx %d b0-b1 %d-%d mod_dci %d %d\n", i, idx, (((scrambled_payload[(i<<1)>>5])>>((i<<1)&0x1f))&1),
(((scrambled_payload[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), mod_dci[(i<<1)], mod_dci[(i<<1)+1]);
#endif
}
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
+50 -10
View File
@@ -33,20 +33,60 @@
#include "nr_dci.h"
void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
int frame,
int subframe,
gNB_rxtx_proc_t *proc,
NR_gNB_DCI_ALLOC_t *dci_alloc,
nfapi_nr_dl_config_request_pdu_t *pdu)
int frame,
int subframe,
gNB_rxtx_proc_t *proc,
NR_gNB_DCI_ALLOC_t *dci_alloc,
nfapi_nr_dl_config_request_pdu_t *pdu)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint32_t *dci_pdu = &dci_alloc->dci_pdu[0];
nfapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &pdu->dci_dl_pdu.dci_dl_pdu_rel15;
uint32_t *dci_pdu = dci_alloc->dci_pdu;
nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &pdu->dci_dl_pdu.dci_dl_pdu_rel15;
nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &pdu->dci_dl_pdu.pdcch_params_rel15;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
dci_alloc->L = rel15->aggregation_level;
uint16_t N_RB = fp->initial_bwp_dl.N_RB;
uint8_t fsize = 0;
if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_1_0) {
/// Payload generation
switch(params_rel15->dci_format) {
case NFAPI_NR_DL_DCI_FORMAT_1_0:
switch(params_rel15->rnti_type) {
case NFAPI_NR_RNTI_RA:
// Freq domain assignment
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i))&1)<<i;
// Time domain assignment
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(4-i))&1)<<i;
//MCS
for (int i=0; i<5; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(5-i))&1)<<i;
// TB scaling
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->tb_scaling>>(2-i))&1)<<i;
break;
}
break;
case NFAPI_NR_UL_DCI_FORMAT_0_0:
break;
}
/// rest of DCI alloc
memcpy((void*)&dci_alloc->pdcch_params, (void*)params_rel15, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t));
dci_alloc->size = nr_get_dci_size(NFAPI_NR_DL_DCI_FORMAT_1_0,
NFAPI_NR_RNTI_RA,
&fp->initial_bwp_dl,
cfg);
/* if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_1_0) {
dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_1_0;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
if (rel15->rnti_type == NFAPI_NR_RNTI_C
@@ -87,7 +127,7 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
} else {
AssertFatal(1==0, "[nr_fill_dci_and_dlsch] Incorrect DCI Format(%d)",rel15->dci_format);
}
}*/
return;
}
openair1/PHY/defs_gNB.h
+1 -9
View File
@@ -47,18 +47,10 @@ typedef struct {
} NR_gNB_PBCH;
typedef struct {
/// Length of DCI in bits
/// Length of DCI payload in bits
uint8_t size;
/// Aggregation level
uint8_t L;
/// rnti
uint16_t rnti;
/// rnti type
nfapi_nr_rnti_type_e rnti_type;
/// search space type
nfapi_nr_search_space_type_e search_space_type;
/// Format
nfapi_nr_dci_format_e format;
/// PDCCH parameters
nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params;
/// CCE list
openair1/PHY/defs_nr_common.h
+9 -5
View File
@@ -62,11 +62,15 @@
#define NR_PBCH_DMRS_LENGTH 144 // in mod symbols
#define NR_PBCH_DMRS_LENGTH_DWORD 10 // ceil(2(QPSK)*NR_PBCH_DMRS_LENGTH/32)
#define NR_MAX_PDCCH_DMRS_LENGTH ((NR_MAX_NB_RB<<1)*3) // 3 symbols *2(QPSK)
#define NR_MAX_PDCCH_DMRS_LENGTH_DWORD 52 // ceil(NR_MAX_PDCCH_DMRS_LENGTH/32)
/*These max values are for the gold sequences which are generated at init for the
* full carrier bandwidth*/
#define NR_MAX_PDCCH_DMRS_INIT_LENGTH ((NR_MAX_NB_RB<<1)*3) // 3 symbols *2(QPSK)
#define NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD 52 // ceil(NR_MAX_PDCCH_DMRS_LENGTH/32)
/*used for the resource mapping*/
#define NR_MAX_PDCCH_DMRS_LENGTH 576 // 16(L)*2(QPSK)*3(3 DMRS symbs per REG)*6(REG per CCE)
#define NR_MAX_DCI_PAYLOAD_SIZE 64
#define NR_MAX_DCI_SIZE 200 //random values
#define NR_MAX_DCI_SIZE 1728 //16(L)*2(QPSK)*9(12 RE per REG - 3(DMRS))*6(REG per CCE)
#define NR_MAX_NUM_BWP 4
@@ -220,8 +224,8 @@ typedef struct NR_DL_FRAME_PARMS {
t_nrPolar_params pbch_polar_params;
//BWP params
NR_BWP_PARMS initial_bwp_params_dl;
NR_BWP_PARMS initial_bwp_params_ul;
NR_BWP_PARMS initial_bwp_dl;
NR_BWP_PARMS initial_bwp_ul;
} NR_DL_FRAME_PARMS;