maki/openairinterface5g
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge remote-tracking branch 'origin/develop-nr' into nr_pdsch

Browse Source
This commit is contained in:
Florian Kaltenberger
2018-11-26 21:07:48 +01:00
parent f0c413e6ae 32eb84f120
commit 2810dd50fb
37 changed files with 953 additions and 2441 deletions
Download Patch File Download Diff File Expand all files Collapse all files
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+146
View File
@@ -46,6 +46,152 @@ uint32_t get_ssb_slot(uint32_t ssb_index){
// return first_symbol(case, freq, ssb_index) / 14
}
uint8_t table_9_2_2_1[16][8]={
{0,12,2, 0, 0,3,0,0},
{0,12,2, 0, 0,4,8,0},
{0,12,2, 3, 0,4,8,0},
{1,10,4, 0, 0,6,0,0},
{1,10,4, 0, 0,3,6,9},
{1,10,4, 2, 0,3,6,9},
{1,10,4, 4, 0,3,6,9},
{1,4, 10,0, 0,6,0,0},
{1,4, 10,0, 0,3,6,9},
{1,4, 10,2, 0,3,6,9},
{1,4, 10,4, 0,3,6,9},
{1,0, 14,0, 0,6,0,0},
{1,0, 14,0, 0,3,6,9},
{1,0, 14,2, 0,3,6,9},
{1,0, 14,4, 0,3,6,9},
{1,0, 14,26,0,3,0,0}
};
int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, void *pduP, uint32_t pdu_len){
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request;
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
nr_phy_config_t *phy_config = &mac->phy_config;
//ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti;
// First we need to verify if DCI ind contains a ul-sch to be perfomred. If it does, we will handle a PUSCH in the UL_CONFIG_REQ.
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUCCH;
for (int i=0; i<10; i++) {
if (dci_ind->dci_list[i].dci_format < 2) ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
}
if (ul_config->ul_config_list[ul_config->number_pdus].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH) {
// fill in the elements in config request inside P5 message
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.bandwidth_part_ind = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.number_rbs = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.start_rb = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.frame_offset = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.number_symbols = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.start_symbol = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.pusch_freq_hopping = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.mcs = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.ndi = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.rv = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.accumulated_delta_PUSCH = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.absolute_delta_PUSCH = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.tpmi = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_dmrs_cdm_groups = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.dmrs_ports[4] = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_front_load_symb = 0;
//ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.srs_config = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.csi_reportTriggerSize = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.maxCodeBlockGroupsPerTransportBlock = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.ptrs_dmrs_association_port = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.beta_offset_ind = 0;
} else { // If DCI ind is not format 0_0 or 0_1, we will handle a PUCCH in the UL_CONFIG_REQ
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUCCH;
// If we handle PUCCH common
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.format = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][0]; /* format 0 1 2 3 4 */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.initialCyclicShift = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][4]; /* x x */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSymbols = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][2]; /* x x x x x */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingSymbolIndex = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][1]; /* x x x x x */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.timeDomainOCC = 0; /* x */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofPRBs = 0; /* x x */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingPRB = table_9_2_2_1[phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_resource_common][3]; /* maxNrofPhysicalResourceBlocks = 275 */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_length = 0; /* x */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_Index = 0; /* x */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.intraSlotFrequencyHopping = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.secondHopPRB = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.interslotFrequencyHopping = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.additionalDMRS = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.maxCodeRate = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSlots = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pi2PBSK = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.simultaneousHARQ_ACK_CSI = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping = phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_group_hopping;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId = phy_config->config_req.ul_bwp_common.pucch_config_common.hopping_id;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal = phy_config->config_req.ul_bwp_common.pucch_config_common.p0_nominal;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[NUMBER_PUCCH_FORMAT_NR] = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0; /* INTEGER (1..8) */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Value = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.twoPUCCH_PC_AdjustmentStates = 0;
// If we handle PUCCH dedicated
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.format = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].format; /* format 0 1 2 3 4 */
switch (ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.format){
case pucch_format1_nr:
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.interslotFrequencyHopping = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format1.inter_slot_frequency_hopping;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.additionalDMRS = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format1.additional_dmrs;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.maxCodeRate = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format1.max_code_rate;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSlots = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format1.number_of_slots;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pi2PBSK = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format1.pi2bpsk;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.simultaneousHARQ_ACK_CSI = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format1.simultaneous_harq_ack_csi;
break;
case pucch_format2_nr:
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.interslotFrequencyHopping = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format2.inter_slot_frequency_hopping;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.additionalDMRS = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format2.additional_dmrs;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.maxCodeRate = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format2.max_code_rate;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSlots = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format2.number_of_slots;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pi2PBSK = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format2.pi2bpsk;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.simultaneousHARQ_ACK_CSI = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format2.simultaneous_harq_ack_csi;
break;
case pucch_format3_nr:
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.interslotFrequencyHopping = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format3.inter_slot_frequency_hopping;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.additionalDMRS = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format3.additional_dmrs;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.maxCodeRate = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format3.max_code_rate;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSlots = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format3.number_of_slots;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pi2PBSK = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format3.pi2bpsk;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.simultaneousHARQ_ACK_CSI = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format3.simultaneous_harq_ack_csi;
break;
case pucch_format4_nr:
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.interslotFrequencyHopping = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format4.inter_slot_frequency_hopping;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.additionalDMRS = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format4.additional_dmrs;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.maxCodeRate = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format4.max_code_rate;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSlots = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format4.number_of_slots;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pi2PBSK = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format4.pi2bpsk;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.simultaneousHARQ_ACK_CSI = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.format4.simultaneous_harq_ack_csi;
break;
default:
break;
}
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.initialCyclicShift = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].initial_cyclic_shift; /* x x */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofSymbols = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].number_of_symbols; /* x x x x x */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingSymbolIndex = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].starting_symbol_index; /* x x x x x */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.timeDomainOCC = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].time_domain_occ; /* x */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.nrofPRBs = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].number_of_prbs; /* x x */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.startingPRB = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].starting_prb; /* maxNrofPhysicalResourceBlocks = 275 */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_length = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].occ_length; /* x */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.occ_Index = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].occ_index; /* x */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.intraSlotFrequencyHopping = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].intra_slot_frequency_hopping;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.secondHopPRB = phy_config->config_req.ul_bwp_dedicated.pucch_config_dedicated.multi_csi_pucch_resources[0].second_hop_prb;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping = phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_group_hopping;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId = phy_config->config_req.ul_bwp_common.pucch_config_common.hopping_id;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal = phy_config->config_req.ul_bwp_common.pucch_config_common.p0_nominal;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[NUMBER_PUCCH_FORMAT_NR] = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0; /* INTEGER (1..8) */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Value = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.twoPUCCH_PC_AdjustmentStates = 0;
}
if(mac->if_module != NULL && mac->if_module->ul_indication != NULL){
mac->if_module->ul_indication(&mac->scheduled_response);
}
return 0;
}
int8_t nr_ue_decode_mib(
module_id_t module_id,
int cc_id,
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
+46 -30
View File
@@ -64,6 +64,18 @@ int8_t handle_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_d
return nr_ue_process_dci(module_id, cc_id, gNB_index, dci, rnti, dci_type);
}
// L2 Abstraction Layer
int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len){
// return 0;
return nr_ue_process_dlsch( module_id,
cc_id,
gNB_index,
&dci_ind,
pduP,
pdu_len);
}
int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
@@ -115,36 +127,6 @@ int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
// clean up scheduled_response structure
if(dl_info->rx_ind != NULL){
printf("[L2][IF MODULE][DL INDICATION][RX_IND]\n");
for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
switch(dl_info->rx_ind->rx_indication_body[i].pdu_type){
case FAPI_NR_RX_PDU_TYPE_MIB:
ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.additional_bits,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_length,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.cell_id )) << FAPI_NR_RX_PDU_TYPE_MIB;
break;
case FAPI_NR_RX_PDU_TYPE_SIB:
ret_mask |= (handle_bcch_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.sibs_mask,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu_length )) << FAPI_NR_RX_PDU_TYPE_SIB;
break;
case FAPI_NR_RX_PDU_TYPE_DLSCH:
ret_mask |= (0) << FAPI_NR_RX_PDU_TYPE_DLSCH;
break;
default:
break;
}
}
}
if(dl_info->dci_ind != NULL){
printf("[L2][IF MODULE][DL INDICATION][DCI_IND]\n");
@@ -208,6 +190,40 @@ int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
}
}
if(dl_info->rx_ind != NULL){
printf("[L2][IF MODULE][DL INDICATION][RX_IND]\n");
for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
switch(dl_info->rx_ind->rx_indication_body[i].pdu_type){
case FAPI_NR_RX_PDU_TYPE_MIB:
ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.additional_bits,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_length,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.cell_id )) << FAPI_NR_RX_PDU_TYPE_MIB;
break;
case FAPI_NR_RX_PDU_TYPE_SIB:
ret_mask |= (handle_bcch_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.sibs_mask,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu_length )) << FAPI_NR_RX_PDU_TYPE_SIB;
break;
case FAPI_NR_RX_PDU_TYPE_DLSCH:
// ret_mask |= (0) << FAPI_NR_RX_PDU_TYPE_DLSCH;
ret_mask |= (handle_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index, &dl_info->dci_ind,
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu_length)) << FAPI_NR_RX_PDU_TYPE_DLSCH;
break;
default:
break;
}
}
}
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);