Merge remote-tracking branch 'origin/NR_UE_stability_fixes' into integration_2020_wk48_2
This commit is contained in:
@@ -798,7 +798,7 @@ typedef struct {
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} fapi_nr_pusch_power_control_t;
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typedef enum {tx_config_codebook = 1, tx_config_nonCodebook = 2} tx_config_t;
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typedef enum {transform_precoder_disabled = 0, transform_precoder_enabled = 1} transform_precoder_t;
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typedef enum {transform_precoder_enabled = 0, transform_precoder_disabled = 1} transform_precoder_t;
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typedef enum {
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codebook_subset_fullyAndPartialAndNonCoherent = 1,
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codebook_subset_partialAndNonCoherent = 2,
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@@ -1008,6 +1008,12 @@ boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, NR_UE_MAC_INST_t *mac, uint8
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if (resource_set_found == TRUE) {
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if (pucch_resource_indicator < MAX_PUCCH_RESOURCE_INDICATOR) {
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// Verify that the value of pucch_resource_indicator is valid
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if (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[pucch_resource_set_id]->resourceList.list.count <= pucch_resource_indicator)
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{
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LOG_E(PHY, "Value of pucch_resource_indicator is out of bounds! Possibly due to a false DCI. \n");
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return (FALSE);
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}
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/* check if resource indexing by pucch_resource_indicator of this set is compatible */
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if ((ready_pucch_resource_id == TRUE) || (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[pucch_resource_set_id]->resourceList.list.array[pucch_resource_indicator][0] != MAX_NB_OF_PUCCH_RESOURCES)) {
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@@ -1393,7 +1393,7 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl
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NR_TDD_UL_DL_Pattern_t *tdd_pattern = &mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1;
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const int num_slots_per_tdd = nr_slots_per_frame[mu] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity);
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const int num_slots_ul = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0);
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int index = slot + num_slots_ul - num_slots_per_tdd;
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int index = (slot + num_slots_ul - num_slots_per_tdd) % num_slots_per_tdd;
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LOG_D(MAC, "nr_ue_procedures: get_ul_config_request() slots per tdd %d, num_slots_ul %d, index %d\n",
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num_slots_per_tdd,
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num_slots_ul,
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@@ -2896,6 +2896,13 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
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dlsch_config_pdu->number_rbs = NRRIV2BW(riv,n_RB_DLBWP);
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dlsch_config_pdu->start_rb = NRRIV2PRBOFFSET(riv,n_RB_DLBWP);
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// Sanity check in case a false or erroneous DCI is received
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if ((dlsch_config_pdu->number_rbs < 1 ) || (dlsch_config_pdu->number_rbs > n_RB_DLBWP - dlsch_config_pdu->start_rb)) {
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// DCI is invalid!
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LOG_W(MAC, "Frequency domain assignment values are invalid! #RBs: %d, Start RB: %d, n_RB_DLBWP: %d \n", dlsch_config_pdu->number_rbs, dlsch_config_pdu->start_rb, n_RB_DLBWP);
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return -1;
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}
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}
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if(pusch_config_pdu != NULL){
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/*
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@@ -2910,6 +2917,14 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
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pusch_config_pdu->rb_size = NRRIV2BW(riv,n_RB_ULBWP);
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pusch_config_pdu->rb_start = NRRIV2PRBOFFSET(riv,n_RB_ULBWP);
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// Sanity check in case a false or erroneous DCI is received
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if ((pusch_config_pdu->rb_size < 1) || (pusch_config_pdu->rb_size > n_RB_ULBWP - pusch_config_pdu->rb_start)) {
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// DCI is invalid!
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LOG_W(MAC, "Frequency domain assignment values are invalid! #RBs: %d, Start RB: %d, n_RB_ULBWP: %d \n",pusch_config_pdu->rb_size, pusch_config_pdu->rb_start, n_RB_ULBWP);
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return -1;
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}
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}
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return 0;
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}
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@@ -3133,6 +3148,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
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int bwp_id = 1;
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int mu = 0;
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long k2 = 0;
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int pucch_res_set_cnt = 0, valid = 0;
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uint16_t frame_tx = 0, slot_tx = 0;
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bool valid_ptrs_setup = 0;
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NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
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@@ -3194,7 +3210,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
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nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu_0_0 = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu;
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/* IDENTIFIER_DCI_FORMATS */
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/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
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nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->frequency_domain_assignment.val);
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if (nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->frequency_domain_assignment.val) < 0)
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return -1;
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/* TIME_DOM_RESOURCE_ASSIGNMENT */
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if (nr_ue_process_dci_time_dom_resource_assignment(mac,pusch_config_pdu_0_0,NULL,dci->time_domain_assignment.val) < 0)
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return -1;
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@@ -3205,6 +3222,27 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
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/* MCS */
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pusch_config_pdu_0_0->mcs_index = dci->mcs;
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/* MCS TABLE */
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if (mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL)
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pusch_config_pdu_0_0->transform_precoding = 1;
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else
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pusch_config_pdu_0_0->transform_precoding = 0;
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if (pusch_config_pdu_0_0->transform_precoding == transform_precoder_disabled)
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pusch_config_pdu_0_0->mcs_table = get_pusch_mcs_table(pusch_config->mcs_Table, 0,
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dci_format, NR_RNTI_TC, NR_SearchSpace__searchSpaceType_PR_common, false);
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else
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pusch_config_pdu_0_0->mcs_table = get_pusch_mcs_table(pusch_config->mcs_TableTransformPrecoder, 1,
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dci_format, NR_RNTI_TC, NR_SearchSpace__searchSpaceType_PR_common, false);
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pusch_config_pdu_0_0->target_code_rate = nr_get_code_rate_ul(pusch_config_pdu_0_0->mcs_index, pusch_config_pdu_0_0->mcs_table);
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pusch_config_pdu_0_0->qam_mod_order = nr_get_Qm_ul(pusch_config_pdu_0_0->mcs_index, pusch_config_pdu_0_0->mcs_table);
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if (pusch_config_pdu_0_0->target_code_rate == 0 || pusch_config_pdu_0_0->qam_mod_order == 0) {
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LOG_W(MAC, "Invalid code rate or Mod order, likely due to unexpected UL DCI. Ignoring DCI! \n");
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return -1;
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}
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/* NDI */
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pusch_config_pdu_0_0->pusch_data.new_data_indicator = dci->ndi;
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/* RV */
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@@ -3293,7 +3331,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
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/* BANDWIDTH_PART_IND */
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//pusch_config_pdu_0_1->bandwidth_part_ind = dci->bwp_indicator.val;
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/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
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nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->frequency_domain_assignment.val);
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if (nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->frequency_domain_assignment.val) < 0)
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return -1;
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/* TIME_DOM_RESOURCE_ASSIGNMENT */
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if (nr_ue_process_dci_time_dom_resource_assignment(mac,pusch_config_pdu_0_1,NULL,dci->time_domain_assignment.val) < 0)
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return -1;
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@@ -3651,7 +3690,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
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dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
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/* IDENTIFIER_DCI_FORMATS */
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/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
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nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,n_RB_DLBWP,dci->frequency_domain_assignment.val);
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if (nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,n_RB_DLBWP,dci->frequency_domain_assignment.val) < 0)
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return -1;
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/* TIME_DOM_RESOURCE_ASSIGNMENT */
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if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val) < 0)
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return -1;
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@@ -3669,6 +3709,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
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dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved;
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/* MCS */
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dlsch_config_pdu_1_0->mcs = dci->mcs;
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// Basic sanity check for MCS value to check for a false or erroneous DCI
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if (dlsch_config_pdu_1_0->mcs > 28) {
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LOG_W(MAC, "MCS value % d out of bounds! Possibly due to false DCI. Ignoring DCI!!\n", dlsch_config_pdu_1_0->mcs);
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return -1;
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}
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/* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
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dlsch_config_pdu_1_0->ndi = dci->ndi;
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/* RV (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
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@@ -3699,6 +3744,20 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
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//if (dci->pucch_resource_indicator == 6) dlsch_config_pdu_1_0->pucch_resource_id = 7; //pucch-ResourceId obtained from the 7th value of resourceList FIXME!!
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//if (dci->pucch_resource_indicator == 7) dlsch_config_pdu_1_0->pucch_resource_id = 8; //pucch-ResourceId obtained from the 8th value of resourceList FIXME!!
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dlsch_config_pdu_1_0->pucch_resource_id = dci->pucch_resource_indicator;
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// Sanity check for pucch_resource_indicator value received to check for false DCI.
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valid = 0;
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pucch_res_set_cnt = mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.count;
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for (int id = 0; id < pucch_res_set_cnt; id++) {
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if (dlsch_config_pdu_1_0->pucch_resource_id < mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) {
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valid = 1;
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break;
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}
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}
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if (!valid) {
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LOG_W(MAC, "pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", dlsch_config_pdu_1_0->pucch_resource_id);
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return -1;
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}
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/* PDSCH_TO_HARQ_FEEDBACK_TIME_IND (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI)*/
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dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind = dci->pdsch_to_harq_feedback_timing_indicator.val;
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@@ -3776,7 +3835,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
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/* BANDWIDTH_PART_IND */
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// dlsch_config_pdu_1_1->bandwidth_part_ind = dci->bandwidth_part_ind;
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/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
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nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_1,0,n_RB_DLBWP,dci->frequency_domain_assignment.val);
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if (nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_1,0,n_RB_DLBWP,dci->frequency_domain_assignment.val) < 0)
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return -1;
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/* TIME_DOM_RESOURCE_ASSIGNMENT */
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if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_1,dci->time_domain_assignment.val) < 0)
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return -1;
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@@ -3799,12 +3859,22 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
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dlsch_config_pdu_1_1->zp_csi_rs_trigger = dci->zp_csi_rs_trigger.val;
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/* MCS (for transport block 1)*/
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dlsch_config_pdu_1_1->mcs = dci->mcs;
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// Basic sanity check for MCS value to check for a false or erroneous DCI
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if (dlsch_config_pdu_1_1->mcs > 28) {
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LOG_W(MAC, "MCS value % d out of bounds! Possibly due to false DCI. Ignoring DCI!!\n", dlsch_config_pdu_1_1->mcs);
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return -1;
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}
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/* NDI (for transport block 1)*/
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dlsch_config_pdu_1_1->ndi = dci->ndi;
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/* RV (for transport block 1)*/
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dlsch_config_pdu_1_1->rv = dci->rv;
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/* MCS (for transport block 2)*/
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dlsch_config_pdu_1_1->tb2_mcs = dci->mcs2.val;
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// Basic sanity check for MCS value to check for a false or erroneous DCI
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if (dlsch_config_pdu_1_1->tb2_mcs > 28) {
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LOG_W(MAC, "MCS value % d out of bounds! Possibly due to false DCI. Ignoring DCI!!\n", dlsch_config_pdu_1_1->tb2_mcs);
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return -1;
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}
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/* NDI (for transport block 2)*/
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dlsch_config_pdu_1_1->tb2_ndi = dci->ndi2.val;
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/* RV (for transport block 2)*/
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@@ -3821,6 +3891,20 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
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if (dci->tpc == 3) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 3;
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/* PUCCH_RESOURCE_IND */
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dlsch_config_pdu_1_1->pucch_resource_id = dci->pucch_resource_indicator;
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// Sanity check for pucch_resource_indicator value received to check for false DCI.
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valid = 0;
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pucch_res_set_cnt = mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.count;
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for (int id = 0; id < pucch_res_set_cnt; id++) {
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if (dlsch_config_pdu_1_1->pucch_resource_id < mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) {
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valid = 1;
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break;
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}
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}
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if (!valid) {
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LOG_W(MAC, "pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", dlsch_config_pdu_1_1->pucch_resource_id);
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return -1;
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}
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/* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */
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// according to TS 38.213 Table 9.2.3-1
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dlsch_config_pdu_1_1->pdsch_to_harq_feedback_time_ind = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0];
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