Merge remote-tracking branch 'origin/simpler-parallel-exclusion-ue-tx' into integration_2024_w21b
This commit is contained in:
@@ -19,7 +19,7 @@ gNBs =
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////////// Physical parameters:
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min_rxtxtime = 2;
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min_rxtxtime = 5;
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do_SRS = 0;
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force_256qam_off = 1;
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pdsch_AntennaPorts_N1 = 1;
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+21
-23
@@ -526,6 +526,14 @@ void processSlotTX(void *arg)
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PHY_VARS_NR_UE *UE = rxtxD->UE;
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nr_phy_data_tx_t phy_data = {0};
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// Force sequential execution, even if we launch in // for all slots
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// at least ULstatus variable is a pure race condition that is quickly detected by assert() in the code because one thread sets it
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// to active, so the other thread try to steal&run the ul work
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if (rxtxD->stream_status == STREAM_STATUS_SYNCED) {
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notifiedFIFO_elt_t *res = pullNotifiedFIFO(UE->tx_resume_ind_fifo + proc->nr_slot_tx);
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delNotifiedFIFO_elt(res);
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}
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if (UE->if_inst)
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UE->if_inst->slot_indication(UE->Mod_id);
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@@ -560,11 +568,6 @@ void processSlotTX(void *arg)
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instead,
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we may run in place the processSlotTX() when the conditions are met (when a decreasing tx_wait_for_dlsch[slot] will become 0)
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It will remove the condition signals (for a thread safe semaphore or counter) and make the system simpler
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This require also other modifications to
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remove txFifo that is also a big issue
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add out of order RF board sending, because,
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if we encode and send tx slot as soon as we can,
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it will be thrown out of order, especially in TDD mode
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*/
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notifiedFIFO_elt_t *res = pollNotifiedFIFO(UE->tx_resume_ind_fifo + proc->nr_slot_tx);
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if (res)
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@@ -590,6 +593,11 @@ void processSlotTX(void *arg)
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phy_procedures_nrUE_TX(UE, proc, &phy_data);
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}
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notifiedFIFO_elt_t *newElt = newNotifiedFIFO_elt(sizeof(int), 0, NULL, NULL);
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int *msgData = (int *)NotifiedFifoData(newElt);
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int newslot = (proc->nr_slot_tx + 1) % UE->frame_parms.slots_per_frame;
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*msgData = newslot;
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pushNotifiedFIFO(UE->tx_resume_ind_fifo + newslot, newElt);
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RU_write(rxtxD);
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}
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@@ -743,7 +751,7 @@ void *UE_thread(void *arg)
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PHY_VARS_NR_UE *UE = (PHY_VARS_NR_UE *) arg;
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// int tx_enabled = 0;
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void *rxp[NB_ANTENNAS_RX];
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int start_rx_stream = 0;
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enum stream_status_e stream_status = STREAM_STATUS_UNSYNC;
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fapi_nr_config_request_t *cfg = &UE->nrUE_config;
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int tmp = openair0_device_load(&(UE->rfdevice), &openair0_cfg[0]);
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AssertFatal(tmp == 0, "Could not load the device\n");
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@@ -755,9 +763,6 @@ void *UE_thread(void *arg)
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notifiedFIFO_t nf;
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initNotifiedFIFO(&nf);
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notifiedFIFO_t txFifo;
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initNotifiedFIFO(&txFifo);
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notifiedFIFO_t freeBlocks;
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initNotifiedFIFO_nothreadSafe(&freeBlocks);
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@@ -796,7 +801,7 @@ void *UE_thread(void *arg)
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intialSyncOffset = syncMsg->rx_offset;
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}
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delNotifiedFIFO_elt(res);
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start_rx_stream = 0;
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stream_status = STREAM_STATUS_UNSYNC;
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} else {
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if (IS_SOFTMODEM_IQPLAYER || IS_SOFTMODEM_IQRECORDER) {
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// For IQ recorder-player we force synchronization to happen in 280 ms
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@@ -826,8 +831,8 @@ void *UE_thread(void *arg)
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continue;
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}
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if (start_rx_stream == 0) {
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start_rx_stream=1;
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if (stream_status == STREAM_STATUS_UNSYNC) {
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stream_status = STREAM_STATUS_SYNCING;
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syncInFrame(UE, &sync_timestamp, intialSyncOffset);
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openair0_write_reorder_clear_context(&UE->rfdevice);
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shiftForNextFrame = 0; // will be used to track clock drift
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@@ -938,25 +943,18 @@ void *UE_thread(void *arg)
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// Start TX slot processing here. It runs in parallel with RX slot processing
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// in current code, DURATION_RX_TO_TX constant is the limit to get UL data to encode from a RX slot
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notifiedFIFO_elt_t *newTx = newNotifiedFIFO_elt(sizeof(nr_rxtx_thread_data_t), curMsg.proc.nr_slot_tx, &txFifo, processSlotTX);
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notifiedFIFO_elt_t *newTx = newNotifiedFIFO_elt(sizeof(nr_rxtx_thread_data_t), curMsg.proc.nr_slot_tx, NULL, processSlotTX);
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nr_rxtx_thread_data_t *curMsgTx = (nr_rxtx_thread_data_t *)NotifiedFifoData(newTx);
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curMsgTx->proc = curMsg.proc;
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curMsgTx->writeBlockSize = writeBlockSize;
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curMsgTx->proc.timestamp_tx = writeTimestamp;
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curMsgTx->UE = UE;
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curMsgTx->tx_wait_for_dlsch = tx_wait_for_dlsch[curMsgTx->proc.nr_slot_tx];
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curMsgTx->stream_status = stream_status;
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stream_status = STREAM_STATUS_SYNCED;
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tx_wait_for_dlsch[curMsgTx->proc.nr_slot_tx] = 0;
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pushTpool(&(get_nrUE_params()->Tpool), newTx);
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// Wait for TX slot processing to finish
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// Should be removed when bugs, race conditions, will be fixed
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notifiedFIFO_elt_t *res;
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res = pullTpool(&txFifo, &(get_nrUE_params()->Tpool));
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if (res == NULL)
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LOG_E(PHY, "Tpool has been aborted\n");
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else
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delNotifiedFIFO_elt(res);
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} // while !oai_exit
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}
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return NULL;
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}
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@@ -645,7 +645,7 @@ void clean_UE_harq(PHY_VARS_NR_UE *UE)
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for (int harq_pid = 0; harq_pid < NR_MAX_ULSCH_HARQ_PROCESSES; harq_pid++) {
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NR_UL_UE_HARQ_t *ul_harq_process = &UE->ul_harq_processes[harq_pid];
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ul_harq_process->tx_status = NEW_TRANSMISSION_HARQ;
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ul_harq_process->status = SCH_IDLE;
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ul_harq_process->ULstatus = SCH_IDLE;
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ul_harq_process->round = 0;
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}
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}
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@@ -47,7 +47,7 @@ typedef struct {
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/// HARQ tx status
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harq_result_t tx_status;
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/// Status Flag indicating for this ULSCH (idle,active,disabled)
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SCH_status_t status;
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SCH_status_t ULstatus;
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/// Last TPC command
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uint8_t TPC;
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/// Length of ACK information (bits)
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@@ -557,7 +557,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
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NR_UL_UE_HARQ_t *harq_process_ulsch = NULL;
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harq_process_ulsch = &UE->ul_harq_processes[harq_pid];
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harq_process_ulsch->status = SCH_IDLE;
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harq_process_ulsch->ULstatus = SCH_IDLE;
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///////////
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////////////////////////////////////////////////////////////////////////
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}
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@@ -632,6 +632,8 @@ typedef struct nr_phy_data_s {
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sl_nr_rx_config_type_enum_t sl_rx_action;
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} nr_phy_data_t;
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enum stream_status_e { STREAM_STATUS_UNSYNC, STREAM_STATUS_SYNCING, STREAM_STATUS_SYNCED};
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/* this structure is used to pass both UE phy vars and
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* proc to the function UE_thread_rxn_txnp4
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*/
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@@ -642,6 +644,7 @@ typedef struct nr_rxtx_thread_data_s {
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nr_phy_data_t phy_data;
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int tx_wait_for_dlsch;
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int rx_offset;
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enum stream_status_e stream_status;
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} nr_rxtx_thread_data_t;
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typedef struct LDPCDecode_ue_s {
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@@ -272,7 +272,7 @@
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/* - between reception of pdsch and tarnsmission of its acknowlegment */
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/* - between reception of un uplink grant and its related transmission */
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// should be 2 as per NR standard, but current UE is not able to perform this value
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#define NR_UE_CAPABILITY_SLOT_RX_TO_TX (2)
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#define NR_UE_CAPABILITY_SLOT_RX_TO_TX (3)
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#define DURATION_RX_TO_TX (NR_UE_CAPABILITY_SLOT_RX_TO_TX)
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@@ -473,7 +473,7 @@ static void nr_ue_scheduled_response_ul(PHY_VARS_NR_UE *phy, fapi_nr_ul_config_r
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pdu->pusch_config_pdu.tx_request_body.pdu_length);
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}
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harq_process_ul_ue->status = ACTIVE;
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harq_process_ul_ue->ULstatus = ACTIVE;
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pdu->pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
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} break;
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@@ -294,7 +294,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, n
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start_meas(&ue->phy_proc_tx);
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for (uint8_t harq_pid = 0; harq_pid < NR_MAX_ULSCH_HARQ_PROCESSES; harq_pid++) {
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if (ue->ul_harq_processes[harq_pid].status == ACTIVE) {
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if (ue->ul_harq_processes[harq_pid].ULstatus == ACTIVE) {
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nr_ue_ulsch_procedures(ue, harq_pid, frame_tx, slot_tx, gNB_id, phy_data, (c16_t **)&txdataF);
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}
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}
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@@ -788,6 +788,10 @@ static int nr_ue_process_dci_dl_10(NR_UE_MAC_INST_t *mac,
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}
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if (dci_ind->rnti != mac->ra.ra_rnti && dci_ind->rnti != SI_RNTI)
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AssertFatal(1 + dci->pdsch_to_harq_feedback_timing_indicator.val > DURATION_RX_TO_TX,
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"PDSCH to HARQ feedback time (%d) needs to be higher than DURATION_RX_TO_TX (%d).\n",
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1 + dci->pdsch_to_harq_feedback_timing_indicator.val,
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DURATION_RX_TO_TX);
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// set the harq status at MAC for feedback
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set_harq_status(mac,
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@@ -1115,6 +1119,12 @@ static int nr_ue_process_dci_dl_11(NR_UE_MAC_INST_t *mac,
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// according to TS 38.213 Table 9.2.3-1
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uint8_t feedback_ti = pucch_Config->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0];
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AssertFatal(feedback_ti > DURATION_RX_TO_TX,
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"PDSCH to HARQ feedback time (%d) needs to be higher than DURATION_RX_TO_TX (%d). Min feedback time set in config "
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"file (min_rxtxtime).\n",
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feedback_ti,
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DURATION_RX_TO_TX);
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// set the harq status at MAC for feedback
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set_harq_status(mac,
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dci->pucch_resource_indicator,
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@@ -1009,6 +1009,9 @@ void nr_ue_aperiodic_srs_scheduling(NR_UE_MAC_INST_t *mac, long resource_trigger
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return;
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}
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AssertFatal(slot_offset > DURATION_RX_TO_TX,
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"Slot offset between DCI and aperiodic SRS (%d) needs to be higher than DURATION_RX_TO_TX (%d)\n",
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slot_offset, DURATION_RX_TO_TX);
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int n_slots_frame = nr_slots_per_frame[current_UL_BWP->scs];
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int sched_slot = (slot + slot_offset) % n_slots_frame;
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NR_TDD_UL_DL_ConfigCommon_t *tdd_config = mac->tdd_UL_DL_ConfigurationCommon;
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@@ -1467,6 +1470,13 @@ int nr_ue_pusch_scheduler(const NR_UE_MAC_INST_t *mac,
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AssertFatal(1 == 0, "Invalid numerology %i\n", mu);
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}
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AssertFatal((k2 + delta) > DURATION_RX_TO_TX,
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"Slot offset (%ld) for Msg3 needs to be higher than DURATION_RX_TO_TX (%d). Please set min_rxtxtime at least to %d in gNB config file or gNBs.[0].min_rxtxtime=%d via command line.\n",
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k2,
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DURATION_RX_TO_TX,
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DURATION_RX_TO_TX,
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DURATION_RX_TO_TX);
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*slot_tx = (current_slot + k2 + delta) % nr_slots_per_frame[mu];
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if (current_slot + k2 + delta >= nr_slots_per_frame[mu]){
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*frame_tx = (current_frame + 1) % 1024;
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@@ -1475,6 +1485,14 @@ int nr_ue_pusch_scheduler(const NR_UE_MAC_INST_t *mac,
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}
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} else {
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AssertFatal(k2 > DURATION_RX_TO_TX,
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"Slot offset K2 (%ld) needs to be higher than DURATION_RX_TO_TX (%d). Please set min_rxtxtime at least to %d in gNB config file or gNBs.[0].min_rxtxtime=%d via command line.\n",
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k2,
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DURATION_RX_TO_TX,
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DURATION_RX_TO_TX,
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DURATION_RX_TO_TX);
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if (k2 < 0) { // This can happen when a false DCI is received
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LOG_W(PHY, "%d.%d. Received k2 %ld\n", current_frame, current_slot, k2);
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return -1;
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