Avoid use of FAPI message buffers in msgDataTx
Note: after this commit, monolithic works but nFAPI operation is broken and fixed in the next commit, to keep the changes small(er). All simulators work. This commit removes the use of msgDataTx's intermediate buffers for FAPI messages and the call of the "Schedule response". The latter incurs an additional copy of FAPI messages for the TX chain (for the RX chain, it is and will remain there) which we can avoid. Instead, it uses an NR_Sched_Rsp_t-typed variable sched_response to store the results of the scheduler when called from tx_func(). Thus, the scheduler remains unchanged (it gets a pointer to where to put FAPI messages), but we don't call nr_schedule_response() to then copy FAPI messages into the L1, but have them in a local variable sched_response. sched_response on on the data segment, as it is big and would overflow the stack; at the same time, this is ok because only one tx_func() runs at a time. Since we don't use allocate_sched_response() anymore, we don't need deref_sched_response(). clear_slot_beamid() is moved to tx_func(), as it was called in nr_schedule_response(). Since the "intermediate" NR_gNB_DLSCH_t structure groups both the DL_tti_pdsch and TX_data.req structures, a pointer has been created to point to pdsch_pdu. This affects a number of simulators, as they have to put some messages on the stack: - nr_dlschsim: put the corresponding variable on the stack - nr_pbchsim: a new array for the SSB PDUs has been introduced Further, these changes are now necessary: - nr_dlsim: there were variables "rel15" and "pdsch_pdu_rel15" that point to the same PDSCH PDU. At least "rel15" would not exist, as the corresponding pointer is now populated in phy_procedures_gNB_TX(), and we therefore refer to the single PDSCH PDU variable with "pdsch_pdu_rel15", but at the place where "rel15" used to be initialized. - nr_ulsim: use nr_save_ul_tti_req() to load PDUs into the RX chain instead of nr_schedule_response(), which does not exist anymore.
This commit is contained in:
@@ -59,13 +59,7 @@ uint8_t nr_get_rv(int rel_round)
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return nr_rv_round_map[rel_round];
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}
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void clear_nr_nfapi_information(gNB_MAC_INST *gNB,
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int CC_idP,
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frame_t frameP,
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slot_t slotP,
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nfapi_nr_dl_tti_request_t *DL_req,
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nfapi_nr_tx_data_request_t *TX_req,
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nfapi_nr_ul_dci_request_t *UL_dci_req)
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void clear_nr_nfapi_information(gNB_MAC_INST *gNB, int CC_idP, frame_t frameP, slot_t slotP)
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{
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/* called below and in simulators, so we assume a lock but don't require it */
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const int num_slots = gNB->frame_structure.numb_slots_frame;
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@@ -75,16 +69,8 @@ void clear_nr_nfapi_information(gNB_MAC_INST *gNB,
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gNB->pdu_index[CC_idP] = 0;
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DL_req[CC_idP].SFN = frameP;
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DL_req[CC_idP].Slot = slotP;
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DL_req[CC_idP].dl_tti_request_body.nPDUs = 0;
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DL_req[CC_idP].dl_tti_request_body.nGroup = 0;
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memset(pdcch, 0, sizeof(*pdcch) * MAX_NUM_CORESET);
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UL_dci_req[CC_idP].SFN = frameP;
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UL_dci_req[CC_idP].Slot = slotP;
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UL_dci_req[CC_idP].numPdus = 0;
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/* advance last round's future UL_tti_req to be ahead of current frame/slot */
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const int size = gNB->UL_tti_req_ahead_size;
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const int prev_slot = frameP * num_slots + slotP + size - 1;
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@@ -100,8 +86,6 @@ void clear_nr_nfapi_information(gNB_MAC_INST *gNB,
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future_ul_tti_req->n_ulsch = 0;
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future_ul_tti_req->n_ulcch = 0;
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future_ul_tti_req->n_group = 0;
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TX_req[CC_idP].Number_of_PDUs = 0;
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}
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static void clear_beam_information(NR_beam_info_t *beam_info, int frame, int slot, int slots_per_frame)
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@@ -191,7 +175,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, slot_t slo
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uint16_t *vrb_map_UL = cc[CC_id].vrb_map_UL[i];
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memcpy(&vrb_map_UL[prev_slot % size * MAX_BWP_SIZE], &gNB->ulprbbl, sizeof(uint16_t) * MAX_BWP_SIZE);
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}
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clear_nr_nfapi_information(gNB, CC_id, frame, slot, &sched_info->DL_req, &sched_info->TX_req, &sched_info->UL_dci_req);
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clear_nr_nfapi_information(gNB, CC_id, frame, slot);
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}
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bool wait_prach_completed = gNB->num_scheduled_prach_rx >= NUM_PRACH_RX_FOR_NOISE_ESTIMATE;
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@@ -68,13 +68,7 @@ int nr_mac_get_reconfig_delay_slots(NR_SubcarrierSpacing_t scs);
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int nr_mac_interrupt_ue_transmission(gNB_MAC_INST *mac, NR_UE_info_t *UE, int slots);
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int nr_transmission_action_indicator_stop(gNB_MAC_INST *mac, NR_UE_info_t *UE_info);
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void clear_nr_nfapi_information(gNB_MAC_INST *gNB,
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int CC_idP,
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frame_t frameP,
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slot_t slotP,
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nfapi_nr_dl_tti_request_t *DL_req,
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nfapi_nr_tx_data_request_t *TX_req,
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nfapi_nr_ul_dci_request_t *UL_dci_req);
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void clear_nr_nfapi_information(gNB_MAC_INST *gNB, int CC_idP, frame_t frameP, slot_t slotP);
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void nr_mac_update_timers(module_id_t module_id, frame_t frame, slot_t slot);
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@@ -380,48 +380,22 @@ static void match_crc_rx_pdu(nfapi_nr_rx_data_indication_t *rx_ind, nfapi_nr_crc
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}
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extern void handle_nr_slot_ind(uint16_t sfn, uint16_t slot);
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static void pnf_send_slot_ind(module_id_t module_id, int CC_id, int frame, int slot)
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static void pnf_send_slot_ind(const nfapi_nr_slot_indication_scf_t *ind, NR_Sched_Rsp_t *rsp)
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{
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(void)module_id;
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(void)CC_id;
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handle_nr_slot_ind(frame, slot);
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module_id_t module_id = 0;
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int CC_id = 0;
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reset_sched_response(rsp, ind->sfn, ind->slot, module_id, CC_id);
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handle_nr_slot_ind(ind->sfn, ind->slot);
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// TODO copy messages from FAPI buffers
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}
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static void run_scheduler_monolithic(module_id_t module_id, int CC_id, int frame, int slot)
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static void run_scheduler_monolithic(const nfapi_nr_slot_indication_scf_t *ind, NR_Sched_Rsp_t *rsp)
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{
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NR_IF_Module_t *ifi = nr_if_inst[module_id];
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LOG_D(NR_MAC, "Calling scheduler for %d.%d\n", frame, slot);
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NR_Sched_Rsp_t *sched_info = allocate_sched_response();
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// clear UL DCI prior to handling ULSCH
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sched_info->UL_dci_req.numPdus = 0;
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gNB_dlsch_ulsch_scheduler(module_id, frame, slot, sched_info);
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ifi->CC_mask = 0;
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sched_info->module_id = module_id;
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sched_info->CC_id = CC_id;
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sched_info->frame = frame;
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sched_info->slot = slot;
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/*
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sched_info->DL_req = &mac->DL_req[CC_id];
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sched_info->UL_dci_req = &mac->UL_dci_req[CC_id];
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sched_info->UL_tti_req = mac->UL_tti_req[CC_id];
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sched_info->TX_req = &mac->TX_req[CC_id];
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*/
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#ifdef DUMP_FAPI
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dump_dl(sched_info);
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#endif
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AssertFatal(ifi->NR_Schedule_response != NULL, "nr_schedule_response is null (mod %d, cc %d)\n", module_id, CC_id);
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ifi->NR_Schedule_response(sched_info);
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LOG_D(NR_PHY,
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"NR_Schedule_response: SFN SLOT:%d %d dl_pdus:%d\n",
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sched_info->frame,
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sched_info->slot,
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sched_info->DL_req.dl_tti_request_body.nPDUs);
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module_id_t module_id = 0;
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int CC_id = 0;
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reset_sched_response(rsp, ind->sfn, ind->slot, module_id, CC_id);
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gNB_dlsch_ulsch_scheduler(rsp->module_id, ind->sfn, ind->slot, rsp);
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}
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void NR_UL_indication(NR_UL_IND_t *UL_info) {
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@@ -515,3 +489,33 @@ NR_IF_Module_t *NR_IF_Module_init(int Mod_id) {
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return nr_if_inst[Mod_id];
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}
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void reset_sched_response(NR_Sched_Rsp_t *sched_response, int frame, int slot, int module_id, int CC_id)
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{
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sched_response->module_id = module_id;
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sched_response->CC_id = CC_id;
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sched_response->frame = frame;
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sched_response->slot = slot;
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nfapi_nr_dl_tti_request_t *DL_req = &sched_response->DL_req;
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DL_req->SFN = frame;
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DL_req->Slot = slot;
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DL_req->dl_tti_request_body.nPDUs = 0;
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DL_req->dl_tti_request_body.nGroup = 0;
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nfapi_nr_ul_dci_request_t *UL_dci_req = &sched_response->UL_dci_req;
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UL_dci_req->SFN = frame;
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UL_dci_req->Slot = slot;
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UL_dci_req->numPdus = 0;
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nfapi_nr_ul_tti_request_t *UL_tti_req = &sched_response->UL_tti_req;
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UL_tti_req->SFN = frame;
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UL_tti_req->Slot = slot;
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UL_tti_req->n_pdus = 0;
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nfapi_nr_tx_data_request_t *TX_req = &sched_response->TX_req;
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TX_req->SFN = frame;
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TX_req->Slot = slot;
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TX_req->Number_of_PDUs = 0;
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}
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@@ -111,6 +111,7 @@ typedef struct {
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/// Pointers to DL SDUs
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nfapi_nr_tx_data_request_t TX_req;
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} NR_Sched_Rsp_t;
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void reset_sched_response(NR_Sched_Rsp_t *sched_response, int frame, int slot, int module_id, int CC_id);
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typedef struct {
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uint8_t Mod_id;
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@@ -122,7 +123,7 @@ typedef struct NR_IF_Module_s {
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//define the function pointer
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void (*NR_UL_indication)(NR_UL_IND_t *UL_INFO);
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void (*NR_Schedule_response)(NR_Sched_Rsp_t *Sched_INFO);
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void (*NR_slot_indication)(module_id_t module_idP, int CC_id, int frame, int slot);
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void (*NR_slot_indication)(const nfapi_nr_slot_indication_scf_t *ind, NR_Sched_Rsp_t *rsp);
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void (*NR_PHY_config_req)(NR_PHY_Config_t *config_INFO);
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uint32_t CC_mask;
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uint16_t current_frame;
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