moving function to prepare pucch scheduling inside dlsch_phytest
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@@ -361,7 +361,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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int UE_id;
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uint64_t *dlsch_in_slot_bitmap=NULL;
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uint64_t *ulsch_in_slot_bitmap=NULL;
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int pucch_sched;
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UE_id=0;
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int bwp_id = 1;
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@@ -468,8 +467,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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// Phytest scheduling
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if (UE_list->fiveG_connected[UE_id] && (is_xlsch_in_slot(*dlsch_in_slot_bitmap,slot_txP%num_slots_per_tdd))) {
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ue_sched_ctl->current_harq_pid = slot_txP % num_slots_per_tdd;
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nr_update_pucch_scheduling(module_idP, UE_id, frame_txP, slot_txP, num_slots_per_tdd,&pucch_sched);
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nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP, &UE_list->UE_sched_ctrl[UE_id].sched_pucch[pucch_sched], NULL);
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nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP, num_slots_per_tdd, NULL);
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// resetting ta flag
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gNB->ta_len = 0;
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}
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@@ -479,7 +477,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
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allocate_CCEs(module_idP, CC_id, subframeP, 0);
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*/
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} //is_nr_DL_slot
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if (is_nr_UL_slot(cc->ServingCellConfigCommon,slot_rxP)) {
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@@ -541,12 +541,13 @@ void configure_fapi_dl_Tx(module_id_t Mod_idP,
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void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
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frame_t frameP,
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sub_frame_t slotP,
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NR_sched_pucch *pucch_sched,
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int num_slots_per_tdd,
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nfapi_nr_dl_tti_pdsch_pdu_rel15_t *dlsch_config){
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int post_padding = 0, ta_len = 0, header_length_total = 0, sdu_length_total = 0, num_sdus = 0;
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int lcid, offset, i, header_length_last, TBS_bytes;
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int UE_id = 0, CC_id = 0;
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int pucch_sched;
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gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP];
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//NR_COMMON_channels_t *cc = nr_mac->common_channels;
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@@ -607,9 +608,11 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
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LOG_I(MAC, "configure fapi due to data availability \n");
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nr_update_pucch_scheduling(module_idP, UE_id, frameP, slotP, num_slots_per_tdd, &pucch_sched);
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TBS_bytes = configure_fapi_dl_pdu(module_idP,
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dl_req,
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pucch_sched,
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&UE_list->UE_sched_ctrl[UE_id].sched_pucch[pucch_sched],
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dlsch_config!=NULL ? dlsch_config->mcsIndex : NULL,
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dlsch_config!=NULL ? &dlsch_config->rbSize : NULL,
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dlsch_config!=NULL ? &dlsch_config->rbStart : NULL);
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@@ -646,9 +649,11 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
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}
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else if(ta_len > 0){
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LOG_I(MAC, "configure fapi due to TA \n");
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nr_update_pucch_scheduling(module_idP, UE_id, frameP, slotP, num_slots_per_tdd, &pucch_sched);
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TBS_bytes = configure_fapi_dl_pdu(module_idP,
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dl_req,
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pucch_sched,
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&UE_list->UE_sched_ctrl[UE_id].sched_pucch[pucch_sched],
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dlsch_config!=NULL ? dlsch_config->mcsIndex : NULL,
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dlsch_config!=NULL ? &dlsch_config->rbSize : NULL,
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dlsch_config!=NULL ? &dlsch_config->rbStart : NULL);
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@@ -664,9 +669,10 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
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} //if (IS_SOFTMODEM_NOS1 || get_softmodem_params()->phy_test)
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else {
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nr_update_pucch_scheduling(module_idP, UE_id, frameP, slotP, num_slots_per_tdd, &pucch_sched);
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TBS_bytes = configure_fapi_dl_pdu(module_idP,
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dl_req,
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pucch_sched,
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&UE_list->UE_sched_ctrl[UE_id].sched_pucch[pucch_sched],
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dlsch_config!=NULL ? dlsch_config->mcsIndex : NULL,
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dlsch_config!=NULL ? &dlsch_config->rbSize : NULL,
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dlsch_config!=NULL ? &dlsch_config->rbStart : NULL);
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@@ -497,7 +497,6 @@ int nr_configure_pdcch(gNB_MAC_INST *nr_mac,
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//precoderGranularity
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pdcch_pdu->precoderGranularity = coreset->precoderGranularity;
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pdcch_pdu->dci_pdu.RNTI[pdcch_pdu->numDlDci]=rnti;
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if (coreset->pdcch_DMRS_ScramblingID != NULL &&
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@@ -145,7 +145,7 @@ void configure_fapi_dl_Tx(module_id_t Mod_idP,
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void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
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frame_t frameP,
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sub_frame_t slotP,
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NR_sched_pucch *pucch_sched,
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int num_slots_per_tdd,
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nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_config);
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void nr_schedule_uss_ulsch_phytest(int Mod_idP,
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