Merge branch 'integration_2022_wk11' into 'develop'

integration_2022_wk11

See merge request oai/openairinterface5g!1495
This commit is contained in:
Robert Schmidt
2022-03-21 23:39:50 +00:00
58 changed files with 917 additions and 913 deletions
+4 -4
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@@ -1093,10 +1093,10 @@
(Test8: 217 PRB 100 PDSCH-PRBs 110 PDSCH-Offset),
(Test9: 106 PRBs 50 PDSCH-PRBs MCS Index 27),
(Test10: 106 PRBs 50 PDSCH-PRBs MCS Index 16),
(Test11: 106 MCS-TABLE 256 QAM MCS Index 26),
(Test12: HARQ test 25% TP (4 rounds),
(Test13: HARQ test 33% TP (3 rounds),
(Test14: HARQ test 50% TP (2 rounds),
(Test11: 106 MCS-TABLE 256 QAM MCS Index 27),
(Test12: HARQ test 25% TP 4 rounds),
(Test13: HARQ test 33% TP 3 rounds),
(Test14: HARQ test 50% TP 2 rounds),
(Test15: 3 PTRS, 8 Interpolated Symbols),
(Test16: 6 PTRS, 5 Interpolated Symbols),
(Test17: 11 PTRS, 0 Interpolated Symbols),
-2
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@@ -521,7 +521,6 @@ int get_subband_size(int NPRB,int size) {
}
// from start symbol index and nb or symbols to symbol occupation bitmap in a slot
uint16_t SL_to_bitmap(int startSymbolIndex, int nrOfSymbols) {
return ((1<<nrOfSymbols)-1)<<startSymbolIndex;
@@ -543,5 +542,4 @@ void SLIV2SL(int SLIV,int *S,int *L) {
*L=15-SLIVdiv14;
*S=13-SLIVmod14;
}
}
+23 -11
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@@ -177,15 +177,14 @@ void rx_func(void *param) {
void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
int j;
for (j = 0; j < NUMBER_OF_NR_ULSCH_MAX; j++)
if (gNB->ulsch[j][0]->rnti == rnti_to_remove[i]) {
gNB->ulsch[j][0]->rnti = 0;
gNB->ulsch[j][0]->harq_mask = 0;
//clean_gNB_ulsch(gNB->ulsch[j][0]);
if (gNB->ulsch[j]->rnti == rnti_to_remove[i]) {
gNB->ulsch[j]->rnti = 0;
gNB->ulsch[j]->harq_mask = 0;
int h;
for (h = 0; h < NR_MAX_ULSCH_HARQ_PROCESSES; h++) {
gNB->ulsch[j][0]->harq_processes[h]->status = SCH_IDLE;
gNB->ulsch[j][0]->harq_processes[h]->round = 0;
gNB->ulsch[j][0]->harq_processes[h]->handled = 0;
gNB->ulsch[j]->harq_processes[h]->status = SCH_IDLE;
gNB->ulsch[j]->harq_processes[h]->round = 0;
gNB->ulsch[j]->harq_processes[h]->handled = 0;
}
up_removed++;
}
@@ -210,7 +209,6 @@ void rx_func(void *param) {
if (pthread_mutex_unlock(&rnti_to_remove_mutex)) exit(1);
// RX processing
int tx_slot_type = nr_slot_select(cfg,frame_tx,slot_tx);
int rx_slot_type = nr_slot_select(cfg,frame_rx,slot_rx);
if (rx_slot_type == NR_UPLINK_SLOT || rx_slot_type == NR_MIXED_SLOT) {
// UE-specific RX processing for subframe n
@@ -244,7 +242,8 @@ void rx_func(void *param) {
gNB->if_inst->NR_UL_indication(&gNB->UL_INFO);
pthread_mutex_unlock(&gNB->UL_INFO_mutex);
stop_meas(&gNB->ul_indication_stats);
int tx_slot_type = nr_slot_select(cfg,frame_rx,slot_tx);
if (tx_slot_type == NR_DOWNLINK_SLOT || tx_slot_type == NR_MIXED_SLOT) {
notifiedFIFO_elt_t *res;
processingData_L1tx_t *syncMsg;
@@ -256,8 +255,17 @@ void rx_func(void *param) {
syncMsg->timestamp_tx = info->timestamp_tx;
res->key = slot_tx;
pushTpool(gNB->threadPool, res);
} else if (get_softmodem_params()->continuous_tx) {
notifiedFIFO_elt_t *res = pullTpool(gNB->L1_tx_free, gNB->threadPool);
processingData_L1tx_t *syncMsg = (processingData_L1tx_t *)NotifiedFifoData(res);
syncMsg->gNB = gNB;
syncMsg->timestamp_tx = info->timestamp_tx;
syncMsg->frame = frame_tx;
syncMsg->slot = slot_tx;
res->key = slot_tx;
pushNotifiedFIFO(gNB->L1_tx_out, res);
}
#if 0
LOG_D(PHY, "rxtx:%lld nfapi:%lld phy:%lld tx:%lld rx:%lld prach:%lld ofdm:%lld ",
softmodem_stats_rxtx_sf.diff_now, nfapi_meas.diff_now,
@@ -395,7 +403,11 @@ void *tx_reorder_thread(void* param) {
syncMsgRU.slot_tx = syncMsgL1->slot;
syncMsgRU.timestamp_tx = syncMsgL1->timestamp_tx;
syncMsgRU.ru = gNB->RU_list[0];
next_tx_slot = get_next_downlink_slot(gNB, &gNB->gNB_config, syncMsgRU.frame_tx, syncMsgRU.slot_tx);
if (get_softmodem_params()->continuous_tx) {
int slots_per_frame = gNB->frame_parms.slots_per_frame;
next_tx_slot = (syncMsgRU.slot_tx + 1) % slots_per_frame;
} else
next_tx_slot = get_next_downlink_slot(gNB, &gNB->gNB_config, syncMsgRU.frame_tx, syncMsgRU.slot_tx);
pushNotifiedFIFO(gNB->L1_tx_free, resL1);
if (resL1==resL1Reserve)
resL1Reserve=NULL;
+34 -27
View File
@@ -703,46 +703,53 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
nfapi_nr_config_request_scf_t *cfg = &ru->config;
void *txp[ru->nb_tx];
unsigned int txs;
int i,txsymb=fp->symbols_per_slot;
int i;
T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(frame), T_INT(slot),
T_INT(0), T_BUFFER(&ru->common.txdata[0][fp->get_samples_slot_timestamp(slot,fp,0)], fp->samples_per_subframe * 4));
int slot_type = nr_slot_select(cfg,frame,slot%fp->slots_per_frame);
int prevslot_type = nr_slot_select(cfg,frame,(slot+(fp->slots_per_frame-1))%fp->slots_per_frame);
int nextslot_type = nr_slot_select(cfg,frame,(slot+1)%fp->slots_per_frame);
int sf_extension = 0;
int siglen=fp->get_samples_per_slot(slot,fp);
int flags=1;
int flags = 0;
//nr_subframe_t SF_type = nr_slot_select(cfg,slot%fp->slots_per_frame);
if (slot_type == NR_DOWNLINK_SLOT || slot_type == NR_MIXED_SLOT || IS_SOFTMODEM_RFSIM) {
if (cfg->cell_config.frame_duplex_type.value == TDD) {
if(slot_type == NR_MIXED_SLOT) {
txsymb = 0;
if (cfg->cell_config.frame_duplex_type.value == TDD && !get_softmodem_params()->continuous_tx) {
int slot_type = nr_slot_select(cfg,frame,slot%fp->slots_per_frame);
if(slot_type == NR_MIXED_SLOT) {
int txsymb = 0;
for(int symbol_count = 0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value == 0)
txsymb++;
}
AssertFatal(txsymb>0,"illegal txsymb %d\n",txsymb);
if(slot%(fp->slots_per_subframe/2))
siglen = txsymb * (fp->ofdm_symbol_size + fp->nb_prefix_samples);
else
siglen = (fp->ofdm_symbol_size + fp->nb_prefix_samples0) + (txsymb - 1) * (fp->ofdm_symbol_size + fp->nb_prefix_samples);
//+ ru->end_of_burst_delay;
flags = 3; // end of burst
for(int symbol_count = 0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value == 0)
txsymb++;
}
if (slot_type == NR_DOWNLINK_SLOT && prevslot_type == NR_UPLINK_SLOT) {
AssertFatal(txsymb>0,"illegal txsymb %d\n",txsymb);
if(slot%(fp->slots_per_subframe/2))
siglen = txsymb * (fp->ofdm_symbol_size + fp->nb_prefix_samples);
else
siglen = (fp->ofdm_symbol_size + fp->nb_prefix_samples0) + (txsymb - 1) * (fp->ofdm_symbol_size + fp->nb_prefix_samples);
//+ ru->end_of_burst_delay;
flags = 3; // end of burst
} else if (slot_type == NR_DOWNLINK_SLOT) {
int prevslot_type = nr_slot_select(cfg,frame,(slot+(fp->slots_per_frame-1))%fp->slots_per_frame);
int nextslot_type = nr_slot_select(cfg,frame,(slot+1)%fp->slots_per_frame);
if (prevslot_type == NR_UPLINK_SLOT) {
flags = 2; // start of burst
sf_extension = ru->sf_extension;
}
if (slot_type == NR_DOWNLINK_SLOT && nextslot_type == NR_UPLINK_SLOT)
} else if (nextslot_type == NR_UPLINK_SLOT) {
flags = 3; // end of burst
} else {
flags = 1; // middle of burst
}
}
} else { // FDD
if (proc->first_tx == 1) {
flags = 2; // start of burst
} else {
flags = 1; // middle of burst
}
}
if (flags) {
if (fp->freq_range==nr_FR2) {
// the beam index is written in bits 8-10 of the flags
// bit 11 enables the gpio programming
+5 -4
View File
@@ -18,7 +18,8 @@
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#define _GNU_SOURCE
#define _GNU_SOURCE
#include <pthread.h>
#include <openair1/PHY/impl_defs_top.h>
#include "executables/nr-uesoftmodem.h"
@@ -1125,9 +1126,8 @@ void *UE_thread(void *arg) {
}
int flags = 0;
int slot_tx_usrp = slot_nr + DURATION_RX_TO_TX - NR_RX_NB_TH;
if (openair0_cfg[0].duplex_mode == duplex_mode_TDD) {
if (openair0_cfg[0].duplex_mode == duplex_mode_TDD && !get_softmodem_params()->continuous_tx) {
uint8_t tdd_period = mac->phy_config.config_req.tdd_table.tdd_period_in_slots;
int nrofUplinkSlots, nrofUplinkSymbols;
@@ -1139,8 +1139,9 @@ void *UE_thread(void *arg) {
nrofUplinkSlots = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
nrofUplinkSymbols = mac->scc_SIB->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols;
}
uint8_t num_UL_slots = nrofUplinkSlots + (nrofUplinkSymbols != 0);
int slot_tx_usrp = slot_nr + DURATION_RX_TO_TX - NR_RX_NB_TH;
uint8_t num_UL_slots = nrofUplinkSlots + (nrofUplinkSymbols != 0);
uint8_t first_tx_slot = tdd_period - num_UL_slots;
if (slot_tx_usrp % tdd_period == first_tx_slot)
+5 -1
View File
@@ -99,6 +99,7 @@ extern "C"
#define CONFIG_HLP_USRP_THREAD "having extra thead for usrp tx\n"
#define CONFIG_HLP_NFAPI "Change the nFAPI mode for NR\n"
#define CONFIG_L1_EMULATOR "Run in L1 emulated mode (disable PHY layer)\n"
#define CONFIG_HLP_CONTINUOUS_TX "perform continuous transmission, even in TDD mode (to work around USRP issues)\n"
/*-----------------------------------------------------------------------------------------------------------------------------------------------------*/
/* command line parameters common to eNodeB and UE */
@@ -126,6 +127,7 @@ extern "C"
#define NODE_NUMBER softmodem_params.node_number
#define NON_STOP softmodem_params.non_stop
#define EMULATE_L1 softmodem_params.emulate_l1
#define CONTINUOUS_TX softmodem_params.continuous_tx
#define DEFAULT_RFCONFIG_FILE "/usr/local/etc/syriq/ue.band7.tm1.PRB100.NR40.dat";
@@ -163,7 +165,8 @@ extern int usrp_tx_thread;
{"do-prb-interpolation", CONFIG_HLP_PRBINTER, PARAMFLAG_BOOL, iptr:&PRB_INTERPOLATION, defintval:0, TYPE_INT, 0}, \
{"nfapi", CONFIG_HLP_NFAPI, 0, u8ptr:&nfapi_mode, defintval:0, TYPE_UINT8, 0}, \
{"non-stop", CONFIG_HLP_NONSTOP, PARAMFLAG_BOOL, iptr:&NON_STOP, defintval:0, TYPE_INT, 0}, \
{"emulate-l1", CONFIG_L1_EMULATOR, PARAMFLAG_BOOL, iptr:&EMULATE_L1, defintval:0, TYPE_INT, 0} \
{"emulate-l1", CONFIG_L1_EMULATOR, PARAMFLAG_BOOL, iptr:&EMULATE_L1, defintval:0, TYPE_INT, 0}, \
{"continuous-tx", CONFIG_HLP_CONTINUOUS_TX,PARAMFLAG_BOOL, iptr:&CONTINUOUS_TX, defintval:0, TYPE_INT, 0}, \
}
#define CONFIG_HLP_NSA "Enable NSA mode \n"
@@ -254,6 +257,7 @@ typedef struct {
uint16_t node_number;
int non_stop;
int emulate_l1;
int continuous_tx;
} softmodem_params_t;
extern uint64_t get_softmodem_optmask(void);
+1 -1
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@@ -117,7 +117,7 @@ int test_ldpc(short No_iteration,
sigma = 1.0/sqrt(2*SNR);
opp_enabled=1;
//short test_input[block_length];
unsigned char *test_input[MAX_NUM_NR_DLSCH_SEGMENTS]={NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL};;
unsigned char *test_input[MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS]={NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL};;
//short *c; //padded codeword
unsigned char estimated_output[MAX_NUM_DLSCH_SEGMENTS][block_length];
memset(estimated_output, 0, sizeof(estimated_output));
+1 -1
View File
@@ -57,7 +57,7 @@ typedef struct {
/// Number of "Filler" bits
uint32_t F;
/// LDPC-code outputs
uint8_t *d[MAX_NUM_NR_DLSCH_SEGMENTS];
uint8_t *d[MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS];
} encoder_implemparams_t;
#define INIT0_LDPCIMPLEMPARAMS {0,0,0,NULL,NULL,NULL,NULL}
typedef void(*nrLDPC_initcallfunc_t)(t_nrLDPC_dec_params *p_decParams, int8_t *p_llr, int8_t *p_out);
-5
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@@ -63,11 +63,6 @@ int32_t nr_segmentation(unsigned char *input_buffer,
#endif
}
if ((*C)>MAX_NUM_NR_DLSCH_SEGMENTS) {
LOG_E(PHY,"nr_segmentation.c: too many segments %d, B %d, L %d, Bprime %d\n",*C,B,L,Bprime);
return(-1);
}
// Find K+
Kprime = Bprime/(*C);
+31 -22
View File
@@ -117,12 +117,15 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
gNB->bad_pucch = 0;
// ceil(((NB_RB<<1)*3)/32) // 3 RE *2(QPSK)
int pdcch_dmrs_init_length = (((fp->N_RB_DL<<1)*3)>>5)+1;
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
AssertFatal(pdcch_dmrs[slot]!=NULL, "NR init: pdcch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(pdcch_dmrs_init_length*sizeof(uint32_t));
LOG_D(PHY,"pdcch_dmrs[%d][%d] %p\n",slot,symb,pdcch_dmrs[slot][symb]);
AssertFatal(pdcch_dmrs[slot][symb]!=NULL, "NR init: pdcch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
}
@@ -136,16 +139,19 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
gNB->nr_gold_pdsch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
int pdsch_dmrs_init_length = ((fp->N_RB_DL*12)>>5)+1;
for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_MAX_NB_CODEWORDS*sizeof(uint32_t *));
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(nb_codewords*sizeof(uint32_t *));
AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<NR_MAX_NB_CODEWORDS; q++) {
pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
for (int q=0; q<nb_codewords; q++) {
pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pdsch_dmrs_init_length*sizeof(uint32_t));
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d codeword %d - malloc failed\n", slot, symb, q);
}
}
@@ -158,6 +164,8 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
for(int nscid=0; nscid<2; nscid++) {
pusch_dmrs[nscid] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
AssertFatal(pusch_dmrs[nscid]!=NULL, "NR init: pusch_dmrs for nscid %d - malloc failed\n", nscid);
@@ -167,7 +175,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
AssertFatal(pusch_dmrs[nscid][slot]!=NULL, "NR init: pusch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pusch_dmrs[nscid][slot][symb] = (uint32_t *)malloc16(NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
pusch_dmrs[nscid][slot][symb] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t));
AssertFatal(pusch_dmrs[nscid][slot][symb]!=NULL, "NR init: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
}
}
@@ -182,12 +190,15 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
uint32_t ***csi_rs = gNB->nr_gold_csi_rs;
AssertFatal(csi_rs!=NULL, "NR init: csi reference signal malloc failed\n");
// ceil((NB_RB*8(max allocation per RB)*2(QPSK))/32)
int csi_dmrs_init_length = ((fp->N_RB_DL<<4)>>5)+1;
for (int slot=0; slot<fp->slots_per_frame; slot++) {
csi_rs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
AssertFatal(csi_rs[slot]!=NULL, "NR init: csi reference signal for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
csi_rs[slot][symb] = (uint32_t *)malloc16(NR_MAX_CSI_RS_INIT_LENGTH_DWORD*sizeof(uint32_t));
csi_rs[slot][symb] = (uint32_t *)malloc16(csi_dmrs_init_length*sizeof(uint32_t));
AssertFatal(csi_rs[slot][symb]!=NULL, "NR init: csi reference signal for slot %d symbol %d - malloc failed\n", slot, symb);
}
}
@@ -196,6 +207,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
for (int id=0; id<NUMBER_OF_NR_SRS_MAX; id++) {
gNB->nr_srs_info[id] = (nr_srs_info_t *)malloc16_clear(sizeof(nr_srs_info_t));
gNB->nr_srs_info[id]->sc_list = (uint16_t *) malloc16_clear(6*fp->N_RB_UL*sizeof(uint16_t));
gNB->nr_srs_info[id]->srs_generated_signal = (int32_t*)malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t));
gNB->nr_srs_info[id]->noise_power = (uint32_t*)malloc16_clear(sizeof(uint32_t));
gNB->nr_srs_info[id]->srs_received_signal = (int32_t **)malloc16(Prx*sizeof(int32_t*));
@@ -314,9 +326,10 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(pdcch_dmrs);
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
for (int q = 0; q < NR_MAX_NB_CODEWORDS; q++)
for (int q = 0; q < nb_codewords; q++)
free_and_zero(pdsch_dmrs[slot][symb][q]);
free_and_zero(pdsch_dmrs[slot][symb]);
}
@@ -351,6 +364,7 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(gNB->nr_srs_info[id]->srs_estimated_channel_time[i]);
free_and_zero(gNB->nr_srs_info[id]->srs_estimated_channel_time_shifted[i]);
}
free_and_zero(gNB->nr_srs_info[id]->sc_list);
free_and_zero(gNB->nr_srs_info[id]->srs_generated_signal);
free_and_zero(gNB->nr_srs_info[id]->noise_power);
free_and_zero(gNB->nr_srs_info[id]->srs_received_signal);
@@ -559,9 +573,10 @@ void init_DLSCH_struct(PHY_VARS_gNB *gNB, processingData_L1tx_t *msg) {
uint16_t grid_size = cfg->carrier_config.dl_grid_size[fp->numerology_index].value;
msg->num_pdsch_slot = 0;
int num_cw = NR_MAX_NB_LAYERS > 4? 2:1;
for (int i=0; i<gNB->number_of_nr_dlsch_max; i++) {
LOG_I(PHY,"Allocating Transport Channel Buffers for DLSCH %d/%d\n",i,gNB->number_of_nr_dlsch_max);
for (int j=0; j<2; j++) {
for (int j=0; j<num_cw; j++) {
msg->dlsch[i][j] = new_gNB_dlsch(fp,1,16,NSOFT,0,grid_size);
AssertFatal(msg->dlsch[i][j]!=NULL,"Can't initialize dlsch %d \n", i);
}
@@ -573,9 +588,10 @@ void reset_DLSCH_struct(const PHY_VARS_gNB *gNB, processingData_L1tx_t *msg)
const NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
const nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
const uint16_t grid_size = cfg->carrier_config.dl_grid_size[fp->numerology_index].value;
int num_cw = NR_MAX_NB_LAYERS > 4? 2:1;
for (int i=0; i<gNB->number_of_nr_dlsch_max; i++)
for (int j=0; j<2; j++)
free_gNB_dlsch(&msg->dlsch[i][j], grid_size);
for (int j=0; j<num_cw; j++)
free_gNB_dlsch(&msg->dlsch[i][j], grid_size, fp);
}
void init_nr_transport(PHY_VARS_gNB *gNB) {
@@ -600,22 +616,16 @@ void init_nr_transport(PHY_VARS_gNB *gNB) {
LOG_I(PHY,"Allocating Transport Channel Buffer for ULSCH %d/%d\n",i,gNB->number_of_nr_ulsch_max);
for (int j=0; j<2; j++) {
// ULSCH for data
gNB->ulsch[i][j] = new_gNB_ulsch(MAX_LDPC_ITERATIONS, fp->N_RB_UL);
if (!gNB->ulsch[i][j]) {
LOG_E(PHY,"Can't get gNB ulsch structures\n");
exit(-1);
}
gNB->ulsch[i] = new_gNB_ulsch(MAX_LDPC_ITERATIONS, fp->N_RB_UL);
if (!gNB->ulsch[i]) {
LOG_E(PHY,"Can't get gNB ulsch structures\n");
exit(-1);
}
}
gNB->rx_total_gain_dB=130;
//fp->pucch_config_common.deltaPUCCH_Shift = 1;
}
@@ -630,6 +640,5 @@ void reset_nr_transport(PHY_VARS_gNB *gNB)
free_gNB_srs(gNB->srs[i]);
for (int i=0; i<gNB->number_of_nr_ulsch_max; i++)
for (int j=0; j<2; j++)
free_gNB_ulsch(&gNB->ulsch[i][j], fp->N_RB_UL);
free_gNB_ulsch(&gNB->ulsch[i], fp->N_RB_UL);
}
+38 -49
View File
@@ -57,6 +57,7 @@ extern uint16_t beta_cqi[16];
*/
void phy_init_nr_ue__PDSCH(NR_UE_PDSCH *const pdsch,
const NR_DL_FRAME_PARMS *const fp) {
AssertFatal( pdsch, "pdsch==0" );
pdsch->pmi_ext = (uint8_t *)malloc16_clear( fp->N_RB_DL );
pdsch->llr[0] = (int16_t *)malloc16_clear( (8*(3*8*6144))*sizeof(int16_t) );
@@ -154,21 +155,6 @@ void phy_term_nr_ue__PDSCH(NR_UE_PDSCH* pdsch, const NR_DL_FRAME_PARMS *const fp
free_and_zero(pdsch->dl_ch_ptrs_estimates_ext);
}
void phy_init_nr_ue_PUSCH(NR_UE_PUSCH *const pusch,
const NR_DL_FRAME_PARMS *const fp) {
AssertFatal( pusch, "pusch==0" );
for (int i=0; i<NR_MAX_NB_LAYERS; i++) {
pusch->txdataF_layers[i] = (int32_t *)malloc16_clear(NR_MAX_PUSCH_ENCODED_LENGTH*sizeof(int32_t));
}
}
void phy_term_nr_ue_PUSCH(NR_UE_PUSCH *pusch)
{
for (int i = 0; i < NR_MAX_NB_LAYERS; i++)
free_and_zero(pusch->txdataF_layers[i]);
}
int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
{
// create shortcuts
@@ -176,13 +162,15 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
NR_UE_COMMON *const common_vars = &ue->common_vars;
NR_UE_PBCH **const pbch_vars = ue->pbch_vars;
NR_UE_PRACH **const prach_vars = ue->prach_vars;
int i,j,k,l,slot,symb;
NR_UE_SRS **const srs_vars = ue->srs_vars;
int i,j,k,l,slot,symb,q;
int gNB_id;
int th_id;
uint32_t ****pusch_dmrs;
LOG_I(PHY, "Initializing UE vars for gNB TXant %u, UE RXant %u\n", fp->nb_antennas_tx, fp->nb_antennas_rx);
phy_init_nr_top(ue);
// many memory allocation sizes are hard coded
AssertFatal( fp->nb_antennas_rx <= 4, "hard coded allocation for ue_common_vars->dl_ch_estimates[gNB_id]" );
@@ -210,15 +198,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
// init NR modulation lookup tables
nr_generate_modulation_table();
/////////////////////////PUSCH init/////////////////////////
///////////
for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
ue->pusch_vars[th_id][gNB_id] = (NR_UE_PUSCH *)malloc16(sizeof(NR_UE_PUSCH));
phy_init_nr_ue_PUSCH( ue->pusch_vars[th_id][gNB_id], fp );
}
}
/////////////////////////PUCCH init/////////////////////////
///////////
for (th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
@@ -234,21 +213,21 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
/////////////////////////PUSCH DMRS init/////////////////////////
///////////
ue->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
pusch_dmrs = ue->nr_gold_pusch_dmrs;
// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
ue->nr_gold_pusch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
uint32_t ***pusch_dmrs = ue->nr_gold_pusch_dmrs;
for (slot=0; slot<fp->slots_per_frame; slot++) {
pusch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
pusch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
AssertFatal(pusch_dmrs[slot]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d - malloc failed\n", slot);
for (symb=0; symb<fp->symbols_per_slot; symb++) {
pusch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_MAX_NB_CODEWORDS*sizeof(uint32_t *));
pusch_dmrs[slot][symb] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t));
AssertFatal(pusch_dmrs[slot][symb]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (q=0; q<NR_MAX_NB_CODEWORDS; q++) {
pusch_dmrs[slot][symb][q] = (uint32_t *)malloc16(NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
AssertFatal(pusch_dmrs[slot][symb][q]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d codeword %d - malloc failed\n", slot, symb, q);
}
}
}
@@ -297,6 +276,8 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
}
}
// ceil(((NB_RB<<1)*3)/32) // 3 RE *2(QPSK)
int pdcch_dmrs_init_length = (((fp->N_RB_DL<<1)*3)>>5)+1;
//PDCCH DMRS init (gNB offset = 0)
ue->nr_gold_pdcch[0] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
uint32_t ***pdcch_dmrs = ue->nr_gold_pdcch[0];
@@ -307,11 +288,14 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
AssertFatal(pdcch_dmrs[slot]!=NULL, "NR init: pdcch_dmrs for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(pdcch_dmrs_init_length*sizeof(uint32_t));
AssertFatal(pdcch_dmrs[slot][symb]!=NULL, "NR init: pdcch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
}
}
// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
int pdsch_dmrs_init_length = ((fp->N_RB_DL*12)>>5)+1;
//PDSCH DMRS init (eNB offset = 0)
ue->nr_gold_pdsch[0] = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
uint32_t ****pdsch_dmrs = ue->nr_gold_pdsch[0];
@@ -320,12 +304,13 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_MAX_NB_CODEWORDS*sizeof(uint32_t *));
pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(nb_codewords*sizeof(uint32_t *));
AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
for (int q=0; q<NR_MAX_NB_CODEWORDS; q++) {
pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
for (int q=0; q<nb_codewords; q++) {
pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pdsch_dmrs_init_length*sizeof(uint32_t));
AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d codeword %d - malloc failed\n", slot, symb, q);
}
}
@@ -347,6 +332,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
srs_vars[gNB_id]->active = false;
ue->nr_srs_info = (nr_srs_info_t *)malloc16_clear(sizeof(nr_srs_info_t));
ue->nr_srs_info->sc_list = (uint16_t *) malloc16_clear(6*fp->N_RB_UL*sizeof(uint16_t));
ue->nr_srs_info->srs_generated_signal = (int32_t *) malloc16_clear( (2*(fp->samples_per_frame)+2048)*sizeof(int32_t) );
ue->nr_srs_info->noise_power = (uint32_t*)malloc16_clear(sizeof(uint32_t));
ue->nr_srs_info->srs_received_signal = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
@@ -483,16 +469,12 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
for (int th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
for (int gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++) {
phy_term_nr_ue_PUSCH(ue->pusch_vars[th_id][gNB_id]);
free_and_zero(ue->pusch_vars[th_id][gNB_id]);
free_and_zero(ue->pucch_vars[th_id][gNB_id]);
}
}
for (int slot = 0; slot < fp->slots_per_frame; slot++) {
for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
for (int q = 0; q < NR_MAX_NB_CODEWORDS; q++)
free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb][q]);
free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb]);
}
free_and_zero(ue->nr_gold_pusch_dmrs[slot]);
@@ -526,9 +508,10 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
}
free_and_zero(ue->nr_gold_pdcch[0]);
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (int slot=0; slot<fp->slots_per_frame; slot++) {
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
for (int q=0; q<NR_MAX_NB_CODEWORDS; q++)
for (int q=0; q<nb_codewords; q++)
free_and_zero(ue->nr_gold_pdsch[0][slot][symb][q]);
free_and_zero(ue->nr_gold_pdsch[0][slot][symb]);
}
@@ -610,6 +593,7 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
free_and_zero(ue->nr_srs_info->srs_estimated_channel_time[i]);
free_and_zero(ue->nr_srs_info->srs_estimated_channel_time_shifted[i]);
}
free_and_zero(ue->nr_srs_info->sc_list);
free_and_zero(ue->nr_srs_info->srs_generated_signal);
free_and_zero(ue->nr_srs_info->noise_power);
free_and_zero(ue->nr_srs_info->srs_received_signal);
@@ -645,7 +629,8 @@ void term_nr_ue_transport(PHY_VARS_NR_UE *ue)
for (int j = 0; j < 2; j++) {
for (int k = 0; k < RX_NB_TH_MAX; k++) {
free_nr_ue_dlsch(&ue->dlsch[k][i][j], N_RB_DL);
free_nr_ue_ulsch(&ue->ulsch[k][i][j], N_RB_DL);
if (j==0)
free_nr_ue_ulsch(&ue->ulsch[k][i], N_RB_DL);
}
}
@@ -656,15 +641,19 @@ void term_nr_ue_transport(PHY_VARS_NR_UE *ue)
free_nr_ue_dlsch(&ue->dlsch_MCH[0], N_RB_DL);
}
void init_nr_ue_transport(PHY_VARS_NR_UE *ue)
{
void init_nr_ue_transport(PHY_VARS_NR_UE *ue) {
int num_codeword = NR_MAX_NB_LAYERS > 4? 2:1;
for (int i = 0; i < NUMBER_OF_CONNECTED_gNB_MAX; i++) {
for (int j=0; j<2; j++) {
for (int j=0; j<num_codeword; j++) {
for (int k=0; k<RX_NB_TH_MAX; k++) {
AssertFatal((ue->dlsch[k][i][j] = new_nr_ue_dlsch(1,NR_MAX_DLSCH_HARQ_PROCESSES,NSOFT,MAX_LDPC_ITERATIONS,ue->frame_parms.N_RB_DL))!=NULL,"Can't get ue dlsch structures\n");
LOG_D(PHY,"dlsch[%d][%d][%d] => %p\n",k,i,j,ue->dlsch[k][i][j]);
AssertFatal((ue->ulsch[k][i][j] = new_nr_ue_ulsch(ue->frame_parms.N_RB_UL, NR_MAX_ULSCH_HARQ_PROCESSES))!=NULL,"Can't get ue ulsch structures\n");
LOG_D(PHY,"ulsch[%d][%d][%d] => %p\n",k,i,j,ue->ulsch[k][i][j]);
if (j==0) {
AssertFatal((ue->ulsch[k][i] = new_nr_ue_ulsch(ue->frame_parms.N_RB_UL, NR_MAX_ULSCH_HARQ_PROCESSES))!=NULL,"Can't get ue ulsch structures\n");
LOG_D(PHY,"ulsch[%d][%d] => %p\n",k,i,ue->ulsch[k][i]);
}
}
}
-1
View File
@@ -253,7 +253,6 @@ int nr_init_frame_parms(nfapi_nr_config_request_scf_t* cfg,
LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, fp->N_RB_DL, Ncp);
if (Ncp == NFAPI_CP_EXTENDED)
AssertFatal(mu == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, mu);
+7 -89
View File
@@ -320,98 +320,16 @@ void nr_layer_mapping(int16_t **mod_symbs,
}
}
void nr_ue_layer_mapping(NR_UE_ULSCH_t **ulsch_ue,
void nr_ue_layer_mapping(int16_t *mod_symbs,
uint8_t n_layers,
uint16_t n_symbs,
int16_t **tx_layers)
{
int16_t *mod_symbs;
int16_t **tx_layers) {
switch (n_layers) {
case 1:
mod_symbs = (int16_t *)ulsch_ue[0]->d_mod;
for (int i=0; i<n_symbs; i++) {
tx_layers[0][i<<1] = (mod_symbs[i<<1]*AMP)>>15;
tx_layers[0][(i<<1)+1] = (mod_symbs[(i<<1)+1]*AMP)>>15;
}
break;
case 2:
case 3:
case 4:
mod_symbs = (int16_t *)ulsch_ue[0]->d_mod;
for (int i=0; i<n_symbs/n_layers; i++) {
for (int l=0; l<n_layers; l++) {
tx_layers[l][i<<1] = (mod_symbs[(n_layers*i+l)<<1]*AMP)>>15;
tx_layers[l][(i<<1)+1] = (mod_symbs[((n_layers*i+l)<<1)+1]*AMP)>>15;
}
}
break;
case 5:
mod_symbs = (int16_t *)ulsch_ue[0]->d_mod;
for (int i=0; i<n_symbs>>1; i++)
for (int l=0; l<2; l++) {
tx_layers[l][i<<1] = (mod_symbs[((i<<1)+l)<<1]*AMP)>>15;
tx_layers[l][(i<<1)+1] = (mod_symbs[(((i<<1)+l)<<1)+1]*AMP)>>15;
}
mod_symbs = (int16_t *)ulsch_ue[1]->d_mod;
for (int i=0; i<n_symbs/3; i++)
for (int l=2; l<5; l++) {
tx_layers[l][i<<1] = (mod_symbs[(3*i+l)<<1]*AMP)>>15;
tx_layers[l][(i<<1)+1] = (mod_symbs[((3*i+l)<<1)+1]*AMP)>>15;
}
break;
case 6:
for (int q=0; q<2; q++) {
mod_symbs = (int16_t *)ulsch_ue[q]->d_mod;
for (int i=0; i<n_symbs/3; i++)
for (int l=0; l<3; l++) {
tx_layers[l][i<<1] = (mod_symbs[(3*i+l)<<1]*AMP)>>15;
tx_layers[l][(i<<1)+1] = (mod_symbs[((3*i+l)<<1)+1]*AMP)>>15;
}
}
break;
case 7:
mod_symbs = (int16_t *)ulsch_ue[1]->d_mod;
for (int i=0; i<n_symbs/3; i++)
for (int l=0; l<3; l++) {
tx_layers[l][i<<1] = (mod_symbs[(3*i+l)<<1]*AMP)>>15;
tx_layers[l][(i<<1)+1] = (mod_symbs[((3*i+l)<<1)+1]*AMP)>>15;
}
mod_symbs = (int16_t *)ulsch_ue[0]->d_mod;
for (int i=0; i<n_symbs/4; i++)
for (int l=3; l<7; l++) {
tx_layers[l][i<<1] = (mod_symbs[((i<<2)+l)<<1]*AMP)>>15;
tx_layers[l][(i<<1)+1] = (mod_symbs[(((i<<2)+l)<<1)+1]*AMP)>>15;
}
break;
case 8:
for (int q=0; q<2; q++) {
mod_symbs = (int16_t *)ulsch_ue[q]->d_mod;
for (int i=0; i<n_symbs>>2; i++)
for (int l=0; l<3; l++) {
tx_layers[l][i<<1] = (mod_symbs[((i<<2)+l)<<1]*AMP)>>15;
tx_layers[l][(i<<1)+1] = (mod_symbs[(((i<<2)+l)<<1)+1]*AMP)>>15;
}
}
break;
default:
AssertFatal(0, "Invalid number of layers %d\n", n_layers);
for (int i=0; i<n_symbs/n_layers; i++) {
for (int l=0; l<n_layers; l++) {
tx_layers[l][i<<1] = (mod_symbs[(n_layers*i+l)<<1]*AMP)>>15;
tx_layers[l][(i<<1)+1] = (mod_symbs[((n_layers*i+l)<<1)+1]*AMP)>>15;
}
}
}
+1 -1
View File
@@ -66,7 +66,7 @@ void nr_layer_mapping(int16_t **mod_symbs,
@param[out] tx_layers, modulated symbols for each layer
*/
void nr_ue_layer_mapping(NR_UE_ULSCH_t **ulsch_ue,
void nr_ue_layer_mapping(int16_t *mod_symbs,
uint8_t n_layers,
uint16_t n_symbs,
int16_t **tx_layers);
@@ -184,7 +184,7 @@ void nr_gnb_measurements(PHY_VARS_gNB *gNB, uint8_t ulsch_id, unsigned char harq
PHY_MEASUREMENTS_gNB *meas = &gNB->measurements;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
int ch_offset = fp->ofdm_symbol_size * symbol;
int N_RB_UL = gNB->ulsch[ulsch_id][0]->harq_processes[harq_pid]->ulsch_pdu.rb_size;
int N_RB_UL = gNB->ulsch[ulsch_id]->harq_processes[harq_pid]->ulsch_pdu.rb_size;
rx_power_tot[ulsch_id] = 0;
+13 -9
View File
@@ -60,6 +60,7 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
uint8_t reset;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
int pdcch_dmrs_init_length = (((fp->N_RB_DL<<1)*3)>>5)+1;
for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
@@ -67,7 +68,7 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid<<1));
LOG_D(PHY,"PDCCH DMRS slot %d, symb %d, Nid %d, x2 %x\n",slot,symb,Nid,x2);
for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) {
for (uint32_t n=0; n<pdcch_dmrs_init_length; n++) {
pdcch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
@@ -81,11 +82,12 @@ void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
{
uint32_t x1, x2;
uint8_t reset, q;
uint8_t reset;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
uint16_t N_n_scid[NR_MAX_NB_CODEWORDS]={Nid, Nid}; // Not correct, appropriate scrambling IDs have to be updated to support DCI 1_1
int pdsch_dmrs_init_length = ((fp->N_RB_DL*12)>>5)+1;
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
uint16_t N_n_scid[2]={Nid, Nid};
uint8_t n_scid=0; // again works only for 1_0
for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {
@@ -93,13 +95,13 @@ void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid));
LOG_D(PHY,"PDSCH DMRS slot %d, symb %d x2 %x, N_n_scid %d,n_scid %d\n",slot,symb,x2,N_n_scid[n_scid],n_scid);
for (uint32_t n=0; n<NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD; n++) {
for (uint32_t n=0; n<pdsch_dmrs_init_length; n++) {
pdsch_dmrs[slot][symb][0][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
for (q = 1; q < NR_MAX_NB_CODEWORDS; q++)
memcpy(pdsch_dmrs[slot][symb][q],pdsch_dmrs[slot][symb][0],sizeof(uint32_t)*NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD);
if(nb_codewords>1)
memcpy(pdsch_dmrs[slot][symb][1],pdsch_dmrs[slot][symb][0],sizeof(uint32_t)*pdsch_dmrs_init_length);
}
}
}
@@ -113,6 +115,7 @@ void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid) {
unsigned int nid;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
unsigned short l;
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
for (nscid=0; nscid<2; nscid++) {
nid = Nid[nscid];
@@ -122,7 +125,7 @@ void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid) {
x2 = ((1<<17) * (fp->symbols_per_slot*ns+l+1) * ((nid<<1)+1) +((nid<<1)+nscid));
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",ns,l,x2);
for (n=0; n<NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD; n++) {
for (n=0; n<pusch_dmrs_init_length; n++) {
gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
@@ -138,6 +141,7 @@ void nr_init_csi_rs(PHY_VARS_gNB* gNB, uint32_t Nid)
uint32_t ***csi_rs = gNB->nr_gold_csi_rs;
uint32_t x1, x2;
uint8_t reset;
int csi_dmrs_init_length = ((fp->N_RB_DL<<4)>>5)+1;
for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
@@ -145,7 +149,7 @@ void nr_init_csi_rs(PHY_VARS_gNB* gNB, uint32_t Nid)
reset = 1;
x2 = ((1<<10) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid));
for (uint32_t n=0; n<NR_MAX_CSI_RS_INIT_LENGTH_DWORD; n++) {
for (uint32_t n=0; n<csi_dmrs_init_length; n++) {
csi_rs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
+15 -16
View File
@@ -57,6 +57,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
unsigned char ns,l;
unsigned int n,x1,x2,x2tmp0;
uint8_t reset;
int pdcch_dmrs_init_length = (((ue->frame_parms.N_RB_DL<<1)*3)>>5)+1;
for (ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
@@ -66,7 +67,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
x2tmp0 = ((ue->frame_parms.symbols_per_slot*ns+l+1)*((nid<<1)+1))<<17;
x2 = (x2tmp0+(nid<<1))%(1U<<31); //cinit
for (n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) {
for (n=0; n<pdcch_dmrs_init_length; n++) {
ue->nr_gold_pdcch[0][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
@@ -77,28 +78,28 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
unsigned short *n_idDMRS)
{
unsigned char l;
unsigned int n,x1,x2,x2tmp0,ns;
int nscid;
unsigned int x1,x2,x2tmp0;
unsigned int nid;
uint8_t reset;
int pdsch_dmrs_init_length = ((ue->frame_parms.N_RB_DL*12)>>5)+1;
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
/// to be updated from higher layer
//unsigned short lbar = 0;
for (nscid=0; nscid<2; nscid++) {
for (ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
for (int nscid=0; nscid<nb_codewords; nscid++) {
for (int ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
nid = n_idDMRS[nscid];
for (l=0; l<ue->frame_parms.symbols_per_slot; l++) {
for (int l=0; l<ue->frame_parms.symbols_per_slot; l++) {
reset = 1;
x2tmp0 = ((ue->frame_parms.symbols_per_slot*ns+l+1)*((nid<<1)+1))<<17;
x2 = (x2tmp0+(nid<<1)+nscid)%(1U<<31); //cinit
LOG_D(PHY,"UE DMRS slot %d, symb %d, x2 %x, nscid %d\n",ns,l,x2,nscid);
for (n=0; n<NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD; n++) {
for (int n=0; n<pdsch_dmrs_init_length; n++) {
ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
@@ -112,9 +113,10 @@ void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
uint8_t n_scid)
{
uint32_t x1, x2, n;
uint8_t reset, slot, symb, q;
uint8_t reset, slot, symb;
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
uint32_t ***pusch_dmrs = ue->nr_gold_pusch_dmrs;
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
for (slot=0; slot<fp->slots_per_frame; slot++) {
@@ -123,13 +125,10 @@ void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid));
for (n=0; n<NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD; n++) {
pusch_dmrs[slot][symb][0][n] = lte_gold_generic(&x1, &x2, reset);
for (n=0; n<pusch_dmrs_init_length; n++) {
pusch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
for (q = 1; q < NR_MAX_NB_CODEWORDS; q++)
memcpy(pusch_dmrs[slot][symb][q],pusch_dmrs[slot][symb][0],sizeof(uint32_t)*NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD);
}
}
}
+4 -2
View File
@@ -37,7 +37,9 @@ void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
int32_t **txdataF = gNB->common_vars.txdataF;
int txdataF_offset = slot*frame_parms.samples_per_slot_wCP;
uint32_t **gold_csi_rs = gNB->nr_gold_csi_rs[slot];
int16_t mod_csi[frame_parms.symbols_per_slot][NR_MAX_CSI_RS_LENGTH>>1] __attribute__((aligned(16)));;
//*8(max allocation per RB)*2(QPSK))
int csi_rs_length = frame_parms.N_RB_DL<<4;
int16_t mod_csi[frame_parms.symbols_per_slot][csi_rs_length>>1] __attribute__((aligned(16)));;
uint16_t b = csi_params.freq_domain;
uint16_t n, csi_bw, csi_start, p, k, l, mprime, na, kpn, csi_length;
uint8_t size, ports, kprime, lprime, i, gs;
@@ -59,7 +61,7 @@ void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
for (uint8_t symb=0; symb<frame_parms.symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<10) * (frame_parms.symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid));
for (uint32_t n=0; n<NR_MAX_CSI_RS_INIT_LENGTH_DWORD; n++) {
for (uint32_t n=0; n<(csi_rs_length>>5)+1; n++) {
gold_csi_rs[symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
+14 -11
View File
@@ -79,10 +79,8 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
NR_DL_gNB_HARQ_t *harq = &dlsch->harq_process;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &harq->pdsch_pdu.pdsch_pdu_rel15;
uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5];
int16_t **mod_symbs = (int16_t**)dlsch->mod_symbs;
int16_t **tx_layers = (int16_t**)dlsch->txdataF;
int16_t **txdataF_precoding = (int16_t**)dlsch->txdataF_precoding;
int8_t Wf[2], Wt[2], l0, l_prime, l_overline, delta;
uint8_t dmrs_Type = rel15->dmrsConfigType;
int nb_re_dmrs;
@@ -100,6 +98,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
uint16_t nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs*dmrs_len-xOverhead)*rel15->rbSize*rel15->nrOfLayers;
uint8_t Qm = rel15->qamModOrder[0];
uint32_t encoded_length = nb_re*Qm;
uint32_t scrambled_output[rel15->NrOfCodewords][(encoded_length>>5)+1];
int16_t mod_dmrs[n_dmrs<<1] __attribute__ ((aligned(16)));
/* PTRS */
@@ -121,8 +120,8 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
/// CRC, coding, interleaving and rate matching
AssertFatal(harq->pdu!=NULL,"harq->pdu is null\n");
unsigned char output[rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS] __attribute__((aligned(32)));
bzero(output,rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS);
unsigned char output[rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * Qm * rel15->nrOfLayers] __attribute__((aligned(32)));
bzero(output,rel15->rbSize * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * Qm * rel15->nrOfLayers);
start_meas(dlsch_encoding_stats);
if (nr_dlsch_encoding(gNB,
@@ -147,20 +146,18 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
}
printf("\n");
#endif
/// scrambling
start_meas(dlsch_scrambling_stats);
for (int q=0; q<rel15->NrOfCodewords; q++)
memset((void*)scrambled_output[q], 0, (encoded_length>>5)*sizeof(uint32_t));
for (int q=0; q<rel15->NrOfCodewords; q++)
for (int q=0; q<rel15->NrOfCodewords; q++) {
memset((void*)scrambled_output[q], 0, ((encoded_length>>5)+1)*sizeof(uint32_t));
nr_pdsch_codeword_scrambling(output,
encoded_length,
q,
rel15->dataScramblingId,
rel15->rnti,
scrambled_output[q]);
}
stop_meas(dlsch_scrambling_stats);
#ifdef DEBUG_DLSCH
@@ -219,6 +216,9 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
start_sc -= frame_parms->ofdm_symbol_size;
int txdataF_offset = slot*frame_parms->samples_per_slot_wCP;
int16_t **txdataF_precoding = (int16_t **)malloc16(rel15->nrOfLayers*sizeof(int16_t *));
for (int layer = 0; layer<rel15->nrOfLayers; layer++)
txdataF_precoding[layer] = (int16_t *)malloc16(2*14*frame_parms->ofdm_symbol_size*sizeof(int16_t));
#ifdef DEBUG_DLSCH_MAPPING
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_re %d,nb_layers %d)\n",
@@ -295,7 +295,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
ptrs_symbol = is_ptrs_symbol(l,dlPtrsSymPos);
if(ptrs_symbol) {
/* PTRS QPSK Modulation for each OFDM symbol in a slot */
printf("Doing ptrs modulation for symbol %d, n_ptrs %d\n",l,n_ptrs);
LOG_D(PHY,"Doing ptrs modulation for symbol %d, n_ptrs %d\n",l,n_ptrs);
nr_modulation(pdsch_dmrs[l][0], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs);
}
}
@@ -535,6 +535,9 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
else {
LOG_D(PHY,"beam index for PDSCH allocation already taken\n");
}
for (int layer = 0; layer<rel15->nrOfLayers; layer++)
free16(txdataF_precoding[layer],2*14*frame_parms->ofdm_symbol_size);
free16(txdataF_precoding,rel15->nrOfLayers);
}// dlsch loop
}
-1
View File
@@ -68,7 +68,6 @@ void nr_fill_dlsch(processingData_L1tx_t *msgTx,
void nr_generate_pdsch(processingData_L1tx_t *msgTx,
int frame,
int slot);
void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB);
void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
+45 -25
View File
@@ -50,10 +50,14 @@
//#define DEBUG_DLSCH_FREE 1
void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB) {
int r;
void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr,
uint16_t N_RB,
const NR_DL_FRAME_PARMS* frame_parms) {
NR_gNB_DLSCH_t *dlsch = *dlschptr;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated
int max_layers = (frame_parms->nb_antennas_tx<NR_MAX_NB_LAYERS) ? frame_parms->nb_antennas_tx : NR_MAX_NB_LAYERS;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*max_layers;
if (N_RB != 273) {
a_segments = a_segments*N_RB;
@@ -65,26 +69,30 @@ void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB) {
free16(harq->b, a_segments * 1056);
harq->b = NULL;
}
for (r = 0; r < a_segments; r++) {
for (int r = 0; r < a_segments; r++) {
free(harq->c[r]);
harq->c[r] = NULL;
}
free(harq->c);
free(harq->pdu);
for (int aa = 0; aa < 64; aa++)
free(dlsch->calib_dl_ch_estimates[aa]);
free(dlsch->calib_dl_ch_estimates);
for (int q=0; q<NR_MAX_NB_CODEWORDS; q++)
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
for (int q=0; q<nb_codewords; q++)
free(dlsch->mod_symbs[q]);
free(dlsch->mod_symbs);
for (int layer = 0; layer < NR_MAX_NB_LAYERS; layer++) {
free(dlsch->txdataF_precoding[layer]);
for (int layer = 0; layer < max_layers; layer++) {
free(dlsch->txdataF[layer]);
for (int aa = 0; aa < 64; aa++)
free(dlsch->ue_spec_bf_weights[layer][aa]);
free(dlsch->ue_spec_bf_weights[layer]);
}
free(dlsch->txdataF);
free(dlsch->ue_spec_bf_weights);
free(dlsch);
*dlschptr = NULL;
@@ -96,9 +104,9 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
uint32_t Nsoft,
uint8_t abstraction_flag,
uint16_t N_RB) {
unsigned char i,r,aa,layer;
int re;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated
int max_layers = (frame_parms->nb_antennas_tx<NR_MAX_NB_LAYERS) ? frame_parms->nb_antennas_tx : NR_MAX_NB_LAYERS;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*max_layers; //number of segments to be allocated
if (N_RB != 273) {
a_segments = a_segments*N_RB;
@@ -114,31 +122,36 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
dlsch->Mlimit = 4;
dlsch->Nsoft = Nsoft;
for (layer=0; layer<NR_MAX_NB_LAYERS; layer++) {
int txdataf_size = frame_parms->N_RB_DL*NR_SYMBOLS_PER_SLOT*NR_NB_SC_PER_RB*8; // max pdsch encoded length for each layer
dlsch->txdataF = (int32_t **)malloc16(max_layers*sizeof(int32_t *));
dlsch->ue_spec_bf_weights = (int32_t ***)malloc16(max_layers*sizeof(int32_t **));
for (int layer=0; layer<max_layers; layer++) {
dlsch->ue_spec_bf_weights[layer] = (int32_t **)malloc16(64*sizeof(int32_t *));
for (aa=0; aa<64; aa++) {
for (int aa=0; aa<64; aa++) {
dlsch->ue_spec_bf_weights[layer][aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t));
for (re=0; re<OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES; re++) {
for (int re=0; re<OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES; re++) {
dlsch->ue_spec_bf_weights[layer][aa][re] = 0x00007fff;
}
}
dlsch->txdataF[layer] = (int32_t *)malloc16((NR_MAX_PDSCH_ENCODED_LENGTH/NR_MAX_NB_LAYERS)*sizeof(int32_t)); // NR_MAX_NB_LAYERS is already included in NR_MAX_PDSCH_ENCODED_LENGTH
dlsch->txdataF_precoding[layer] = (int32_t *)malloc16(2*14*frame_parms->ofdm_symbol_size*sizeof(int32_t));
dlsch->txdataF[layer] = (int32_t *)malloc16((txdataf_size)*sizeof(int32_t));
}
for (int q=0; q<NR_MAX_NB_CODEWORDS; q++)
dlsch->mod_symbs[q] = (int32_t *)malloc16(NR_MAX_PDSCH_ENCODED_LENGTH*sizeof(int32_t));
int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
dlsch->mod_symbs = (int32_t **)malloc16(nb_codewords*sizeof(int32_t *));
for (int q=0; q<nb_codewords; q++)
dlsch->mod_symbs[q] = (int32_t *)malloc16(txdataf_size*max_layers*sizeof(int32_t));
dlsch->calib_dl_ch_estimates = (int32_t **)malloc16(64*sizeof(int32_t *));
for (aa=0; aa<64; aa++) {
for (int aa=0; aa<64; aa++) {
dlsch->calib_dl_ch_estimates[aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t));
}
for (i=0; i<20; i++) {
for (int i=0; i<20; i++) {
dlsch->harq_ids[0][i] = 0;
dlsch->harq_ids[1][i] = 0;
}
@@ -153,7 +166,8 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
nr_emulate_dlsch_payload(harq->pdu, (dlsch_bytes) >> 3);
bzero(harq->b, dlsch_bytes);
for (r = 0; r < a_segments; r++) {
harq->c = (uint8_t **)malloc16(a_segments*sizeof(uint8_t *));
for (int r = 0; r < a_segments; r++) {
// account for filler in first segment and CRCs for multiple segment case
// [hna] 8448 is the maximum CB size in NR
// 68*348 = 68*(maximum size of Zc)
@@ -316,6 +330,7 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
stats->current_Qm = rel15->qamModOrder[0];
}
int max_bytes = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*rel15->nrOfLayers*1056;
if (A > 3824) {
// Add 24-bit crc (polynomial A) to payload
crc = crc24a(a,A)>>8;
@@ -326,11 +341,11 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
//printf("a0 %d a1 %d a2 %d\n", a[A>>3], a[1+(A>>3)], a[2+(A>>3)]);
harq->B = A+24;
// harq->b = a;
AssertFatal((A / 8) + 4 <= MAX_NR_DLSCH_PAYLOAD_BYTES,
AssertFatal((A / 8) + 4 <= max_bytes,
"A %d is too big (A/8+4 = %d > %d)\n",
A,
(A / 8) + 4,
MAX_NR_DLSCH_PAYLOAD_BYTES);
max_bytes);
memcpy(harq->b, a, (A / 8) + 4); // why is this +4 if the CRC is only 3 bytes?
} else {
// Add 16-bit crc (polynomial A) to payload
@@ -341,11 +356,11 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
//printf("a0 %d a1 %d \n", a[A>>3], a[1+(A>>3)]);
harq->B = A+16;
// harq->b = a;
AssertFatal((A / 8) + 3 <= MAX_NR_DLSCH_PAYLOAD_BYTES,
AssertFatal((A / 8) + 3 <= max_bytes,
"A %d is too big (A/8+3 = %d > %d)\n",
A,
(A / 8) + 3,
MAX_NR_DLSCH_PAYLOAD_BYTES);
max_bytes);
memcpy(harq->b, a, (A / 8) + 3); // using 3 bytes to mimic the case of 24 bit crc
}
@@ -363,6 +378,11 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
impp.Kb = nr_segmentation(harq->b, harq->c, harq->B, &impp.n_segments, &impp.K, impp.Zc, &impp.F, impp.BG);
stop_meas(dlsch_segmentation_stats);
if (impp.n_segments>MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*rel15->nrOfLayers) {
LOG_E(PHY,"nr_segmentation.c: too many segments %d, B %d\n",impp.n_segments,harq->B);
return(-1);
}
for (int r=0; r<impp.n_segments; r++) {
//d_tmp[r] = &harq->d[r][0];
//channel_input[r] = &harq->d[r][0];
+1 -1
View File
@@ -40,7 +40,7 @@ void nr_codeword_scrambling(uint8_t *in,
__m256i c = ((__m256i*)in)[i];
uint32_t in32 = _mm256_movemask_epi8(_mm256_slli_epi16(c,7));
out[i]=(in32^s);
//printf("in[%d] %x => %x\n",i,in32,out[i]);
LOG_D(PHY,"in[%d] %x => %x\n",i,in32,out[i]);
s=lte_gold_generic(&x1, &x2, 0);
}
#elif defined(__SSE4__)
@@ -106,7 +106,7 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
uint8_t abstraction_flag,
uint16_t N_RB);
void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB);
void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB, const NR_DL_FRAME_PARMS* frame_parms);
/** \brief This function is the top-level entry point to PUSCH demodulation, after frequency-domain transformation and channel estimation. It performs
- RB extraction (signal and channel estimates)
@@ -146,7 +146,7 @@ void nr_ulsch_extract_rbs_single(int32_t **rxdataF,
void nr_ulsch_scale_channel(int32_t **ul_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
NR_gNB_ULSCH_t **ulsch_gNB,
NR_gNB_ULSCH_t *ulsch_gNB,
uint8_t symbol,
uint8_t start_symbol,
uint16_t nb_rb,
+6 -7
View File
@@ -42,15 +42,14 @@ int16_t find_nr_ulsch(uint16_t rnti, PHY_VARS_gNB *gNB,find_type_t type) {
AssertFatal(gNB!=NULL,"gNB is null\n");
for (i=0; i<gNB->number_of_nr_ulsch_max; i++) {
AssertFatal(gNB->ulsch[i]!=NULL,"gNB->ulsch[%d] is null\n",i);
AssertFatal(gNB->ulsch[i][0]!=NULL,"gNB->ulsch[%d][0] is null\n",i);
LOG_D(PHY,"searching for rnti %x : ulsch_index %d=> harq_mask %x, rnti %x, first_free_index %d\n", rnti,i,gNB->ulsch[i][0]->harq_mask,gNB->ulsch[i][0]->rnti,first_free_index);
if ((gNB->ulsch[i][0]->harq_mask >0) &&
(gNB->ulsch[i][0]->rnti==rnti)) return i;
else if ((gNB->ulsch[i][0]->harq_mask == 0) && (first_free_index==-1)) first_free_index=i;
LOG_D(PHY,"searching for rnti %x : ulsch_index %d=> harq_mask %x, rnti %x, first_free_index %d\n", rnti,i,gNB->ulsch[i]->harq_mask,gNB->ulsch[i]->rnti,first_free_index);
if ((gNB->ulsch[i]->harq_mask >0) &&
(gNB->ulsch[i]->rnti==rnti)) return i;
else if ((gNB->ulsch[i]->harq_mask == 0) && (first_free_index==-1)) first_free_index=i;
}
if (type == SEARCH_EXIST) return -1;
if (first_free_index != -1)
gNB->ulsch[first_free_index][0]->rnti = 0;
gNB->ulsch[first_free_index]->rnti = 0;
return first_free_index;
}
@@ -64,7 +63,7 @@ void nr_fill_ulsch(PHY_VARS_gNB *gNB,
AssertFatal( (ulsch_id>=0) && (ulsch_id<gNB->number_of_nr_ulsch_max),
"illegal or no ulsch_id found!!! rnti %04x ulsch_id %d\n",ulsch_pdu->rnti,ulsch_id);
NR_gNB_ULSCH_t *ulsch = gNB->ulsch[ulsch_id][0];
NR_gNB_ULSCH_t *ulsch = gNB->ulsch[ulsch_id];
int harq_pid = ulsch_pdu->pusch_data.harq_process_id;
ulsch->rnti = ulsch_pdu->rnti;
//ulsch->rnti_type;
@@ -175,7 +175,7 @@ void clean_gNB_ulsch(NR_gNB_ULSCH_t *ulsch)
//t_nrLDPC_procBuf* p_nrLDPC_procBuf[MAX_NUM_NR_ULSCH_SEGMENTS];
ulsch->harq_processes[i]->Z=0;
/// code blocks after bit selection in rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
//int16_t e[MAX_NUM_NR_DLSCH_SEGMENTS][3*8448];
//int16_t e[MAX_NUM_NR_ULSCH_SEGMENTS][3*8448];
ulsch->harq_processes[i]->E=0;
@@ -406,7 +406,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
#endif
NR_gNB_ULSCH_t *ulsch = phy_vars_gNB->ulsch[ULSCH_id][0];
NR_gNB_ULSCH_t *ulsch = phy_vars_gNB->ulsch[ULSCH_id];
NR_gNB_PUSCH *pusch = phy_vars_gNB->pusch_vars[ULSCH_id];
NR_UL_gNB_HARQ_t *harq_process = ulsch->harq_processes[harq_pid];
@@ -532,6 +532,12 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
&harq_process->F,
p_decParams->BG);
if (harq_process->C>MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*n_layers) {
LOG_E(PHY,"nr_segmentation.c: too many segments %d, B %d\n",harq_process->C,harq_process->B);
return(-1);
}
#ifdef DEBUG_ULSCH_DECODING
printf("ulsch decoding nr segmentation Z %d\n", harq_process->Z);
if (!frame%100)
@@ -403,7 +403,7 @@ void nr_ulsch_extract_rbs_single(int32_t **rxdataF,
void nr_ulsch_scale_channel(int **ul_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
NR_gNB_ULSCH_t **ulsch_gNB,
NR_gNB_ULSCH_t *ulsch_gNB,
uint8_t symbol,
uint8_t is_dmrs_symbol,
unsigned short nb_rb,
@@ -418,7 +418,7 @@ void nr_ulsch_scale_channel(int **ul_ch_estimates_ext,
// Determine scaling amplitude based the symbol
ch_amp = 1024*8; //((pilots) ? (ulsch_gNB[0]->sqrt_rho_b) : (ulsch_gNB[0]->sqrt_rho_a));
ch_amp = 1024*8; //((pilots) ? (ulsch_gNB->sqrt_rho_b) : (ulsch_gNB->sqrt_rho_a));
LOG_D(PHY,"Scaling PUSCH Chest in OFDM symbol %d by %d, pilots %d nb_rb %d NCP %d symbol %d\n", symbol, ch_amp, is_dmrs_symbol, nb_rb, frame_parms->Ncp, symbol);
// printf("Scaling PUSCH Chest in OFDM symbol %d by %d\n",symbol_mod,ch_amp);
@@ -1177,7 +1177,7 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
int avgs = 0;
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_pusch_pdu_t *rel15_ul = &gNB->ulsch[ulsch_id][0]->harq_processes[harq_pid]->ulsch_pdu;
nfapi_nr_pusch_pdu_t *rel15_ul = &gNB->ulsch[ulsch_id]->harq_processes[harq_pid]->ulsch_pdu;
int avg[frame_parms->nb_antennas_rx*rel15_ul->nrOfLayers];
gNB->pusch_vars[ulsch_id]->dmrs_symbol = INVALID_VALUE;
+1 -1
View File
@@ -457,7 +457,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
uci_pdu->harq->harq_list[1].harq_value = !(index&0x01);
uci_pdu->harq->harq_list[0].harq_value = !((index>>1)&0x01);
LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d (0 pass, 1 fail) and %d with confidence level %d (0 is good, 1 is bad), xrt_mag %d xrt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d,sync_pos %d\n",
LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d and %d (0 pass, 1 fail) with confidence level %d (0 is good, 1 is bad), xrt_mag %d xrt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d,sync_pos %d\n",
frame,slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10,max_n0,uci_stats->pucch0_n00,uci_stats->pucch0_n01,uci_stats->pucch0_thres,cqi,SNRtimes10,gNB->ulsch_stats[0].sync_pos);
if (pucch_pdu->sr_flag == 1) {
uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr));
@@ -79,9 +79,11 @@ void init_dlsch_tpool(uint8_t num_dlsch_threads) {
free(params);
}
void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlschptr, uint16_t N_RB_DL) {
int i,r;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS;
NR_UE_DLSCH_t *dlsch=*dlschptr;
if (dlsch) {
@@ -90,36 +92,23 @@ void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlschptr, uint16_t N_RB_DL) {
a_segments = a_segments/273 +1;
}
for (i=0; i<dlsch->Mdlharq; i++) {
for (int i=0; i<dlsch->Mdlharq; i++) {
if (dlsch->harq_processes[i]) {
if (dlsch->harq_processes[i]->b) {
free16(dlsch->harq_processes[i]->b,a_segments*1056);
dlsch->harq_processes[i]->b = NULL;
}
for (r=0; r<a_segments; r++) {
for (int r=0; r<a_segments; r++) {
free16(dlsch->harq_processes[i]->c[r],1056);
dlsch->harq_processes[i]->c[r] = NULL;
free16(dlsch->harq_processes[i]->d[r],5*8448);
dlsch->harq_processes[i]->d[r] = NULL;
nrLDPC_free_mem(dlsch->harq_processes[i]->p_nrLDPC_procBuf[r]);
}
for (r=0; r<a_segments; r++)
if (dlsch->harq_processes[i]->d[r]) {
free16(dlsch->harq_processes[i]->d[r],(5*8448)*sizeof(short));
dlsch->harq_processes[i]->d[r] = NULL;
}
for (r=0; r<a_segments; r++)
if (dlsch->harq_processes[i]->w[r]) {
free16(dlsch->harq_processes[i]->w[r],(5*8448)*sizeof(short));
dlsch->harq_processes[i]->w[r] = NULL;
}
for (r=0; r<a_segments; r++) {
if (dlsch->harq_processes[i]->p_nrLDPC_procBuf[r]) {
nrLDPC_free_mem(dlsch->harq_processes[i]->p_nrLDPC_procBuf[r]);
dlsch->harq_processes[i]->p_nrLDPC_procBuf[r] = NULL;
}
}
free16(dlsch->harq_processes[i]->c,a_segments);
free16(dlsch->harq_processes[i]->d,a_segments);
free16(dlsch->harq_processes[i]->p_nrLDPC_procBuf,a_segments);
free16(dlsch->harq_processes[i],sizeof(NR_DL_UE_HARQ_t));
dlsch->harq_processes[i] = NULL;
@@ -131,10 +120,13 @@ void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlschptr, uint16_t N_RB_DL) {
}
}
NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t max_ldpc_iterations,uint16_t N_RB_DL) {
NR_UE_DLSCH_t *dlsch;
uint8_t exit_flag = 0,i,r;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated
uint8_t exit_flag = 0;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS; //number of segments to be allocated
if (N_RB_DL != 273) {
a_segments = a_segments*N_RB_DL;
@@ -153,7 +145,7 @@ NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint
dlsch->Mlimit = 4;
dlsch->max_ldpc_iterations = max_ldpc_iterations;
for (i=0; i<Mdlharq; i++) {
for (int i=0; i<Mdlharq; i++) {
dlsch->harq_processes[i] = (NR_DL_UE_HARQ_t *)malloc16(sizeof(NR_DL_UE_HARQ_t));
if (dlsch->harq_processes[i]) {
@@ -167,26 +159,17 @@ NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint
else
exit_flag=3;
for (r=0; r<a_segments; r++) {
dlsch->harq_processes[i]->c = (uint8_t **)malloc16(a_segments*sizeof(uint8_t *));
dlsch->harq_processes[i]->d = (int16_t **)malloc16(a_segments*sizeof(int16_t *));
dlsch->harq_processes[i]->p_nrLDPC_procBuf = (t_nrLDPC_procBuf **)malloc16(a_segments*sizeof(t_nrLDPC_procBuf *));
for (int r=0; r<a_segments; r++) {
dlsch->harq_processes[i]->p_nrLDPC_procBuf[r] = nrLDPC_init_mem();
dlsch->harq_processes[i]->c[r] = (uint8_t *)malloc16(1056);
dlsch->harq_processes[i]->d[r] = (int16_t *)malloc16(5*8448*sizeof(int16_t));
if (dlsch->harq_processes[i]->c[r])
memset(dlsch->harq_processes[i]->c[r],0,1056);
else
exit_flag=2;
dlsch->harq_processes[i]->d[r] = (short *)malloc16((5*8448)*sizeof(short));
if (dlsch->harq_processes[i]->d[r])
memset(dlsch->harq_processes[i]->d[r],0,(5*8448)*sizeof(short));
else
exit_flag=2;
dlsch->harq_processes[i]->w[r] = (short *)malloc16((5*8448)*sizeof(short));
if (dlsch->harq_processes[i]->w[r])
memset(dlsch->harq_processes[i]->w[r],0,(5*8448)*sizeof(short));
memset(dlsch->harq_processes[i]->d[r],0,5*8448);
else
exit_flag=2;
}
@@ -320,11 +303,16 @@ void nr_processDLSegment(void* arg) {
t_nrLDPC_procBuf **p_nrLDPC_procBuf = harq_process->p_nrLDPC_procBuf;
int16_t w[5*8448];
memset(w,0,(5*8448)*sizeof(short));
start_meas(&rdata->ts_deinterleave);
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_DEINTERLEAVING, VCD_FUNCTION_IN);
nr_deinterleaving_ldpc(E,
Qm,
harq_process->w[r], // [hna] w is e
w, // [hna] w is e
dlsch_llr+r_offset);
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_DEINTERLEAVING, VCD_FUNCTION_OUT);
stop_meas(&rdata->ts_deinterleave);
@@ -346,7 +334,7 @@ void nr_processDLSegment(void* arg) {
p_decoderParms->BG,
p_decoderParms->Z,
harq_process->d[r],
harq_process->w[r],
w,
harq_process->C,
harq_process->rvidx,
(harq_process->first_rx==1)?1:0,
@@ -578,6 +566,11 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
&harq_process->F,
p_decParams->BG);
if (harq_process->C>MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*harq_process->Nl) {
LOG_E(PHY,"nr_segmentation.c: too many segments %d, B %d\n",harq_process->C,harq_process->B);
return(-1);
}
if (LOG_DEBUGFLAG(DEBUG_DLSCH_DECOD) && (!frame%100))
LOG_I(PHY,"K %d C %d Z %d nl %d \n", harq_process->K, harq_process->C, p_decParams->Z, harq_process->Nl);
}
@@ -593,7 +586,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
p_decParams->numMaxIter = dlsch->max_ldpc_iterations;
p_decParams->outMode= 0;
r_offset = 0;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS; //number of segments to be allocated
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*harq_process->Nl; //number of segments to be allocated
if (nb_rb != 273) {
a_segments = a_segments*nb_rb;
@@ -202,7 +202,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars = ue->pdsch_vars[proc->thread_id];
dlsch = ue->dlsch[proc->thread_id][gNB_id];
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
dlsch1_harq = dlsch[1]->harq_processes[harq_pid];
if (NR_MAX_NB_LAYERS>4)
dlsch1_harq = dlsch[1]->harq_processes[harq_pid];
beamforming_mode = ue->transmission_mode[gNB_id] < 7 ? 0 :ue->transmission_mode[gNB_id];
break;
+6 -50
View File
@@ -88,9 +88,9 @@ typedef struct {
/// LDPC-code outputs
uint8_t *d[MAX_NUM_NR_ULSCH_SEGMENTS];
/// LDPC-code outputs (TS 36.212 V15.4.0, Sec 5.3.2 p. 17)
uint8_t *e;
uint8_t *e;
/// Rate matching (Interleaving) outputs (TS 36.212 V15.4.0, Sec 5.4.2.2 p. 30)
uint8_t *f;
uint8_t *f;
/// Number of code segments
uint32_t C;
/// Number of bits in code segments
@@ -122,55 +122,15 @@ typedef struct {
typedef struct {
/// SRS active flag
uint8_t srs_active;
//#if defined(UPGRADE_RAT_NR)
#if 1
// Pointers to HARQ processes for the ULSCH
NR_UL_UE_HARQ_t *harq_processes[NR_MAX_ULSCH_HARQ_PROCESSES];
int harq_process_id[NR_MAX_SLOTS_PER_FRAME];
// UL number of harq processes
uint8_t number_harq_processes_for_pusch;
#endif
/*
/// Pointer to CQI data (+1 for 8 bits crc)
uint8_t o[1+MAX_CQI_BYTES];
/// Length of CQI data (bits)
uint8_t O;
/// Format of CQI data
UCI_format_t uci_format;
/// Rank information
uint8_t o_RI[2];
/// Length of rank information (bits)
uint8_t O_RI;
/// Pointer to ACK
uint8_t o_ACK[4];
*/
/// Minimum number of CQI bits for PUSCH (36-212 r8.6, Sec 5.2.4.1 p. 37)
uint8_t O_CQI_MIN;
/// ACK/NAK Bundling flag
uint8_t bundling;
/// Concatenated "g"-sequences (for definition see 36-212 V15.4.0 2018-12, p.31)
uint8_t g[MAX_NUM_NR_CHANNEL_BITS] __attribute__ ((aligned(32)));
/// Interleaved "h"-sequences (for definition see 36-212 V8.6 2009-03, p.17-18)
uint8_t h[MAX_NUM_NR_CHANNEL_BITS];
/// Scrambled "b"-sequences (for definition see 36-211 V8.6 2009-03, p.14)
uint8_t b_tilde[MAX_NUM_NR_CHANNEL_BITS];
/// Modulated "d"-sequences (for definition see 36-211 V8.6 2009-03, p.14)
int32_t d_mod[MAX_NUM_NR_RE] __attribute__ ((aligned(16)));
/// Transform-coded "y"-sequences (for definition see 38-211 V15.3.0 2018-09, subsection 6.3.1.4)
int32_t y[MAX_NUM_NR_RE] __attribute__ ((aligned(16)));
/*
/// "q" sequences for CQI/PMI (for definition see 36-212 V8.6 2009-03, p.27)
uint8_t q[MAX_CQI_PAYLOAD];
/// coded and interleaved CQI bits
uint8_t o_w[(MAX_CQI_BITS+8)*3];
/// coded CQI bits
uint8_t o_d[96+((MAX_CQI_BITS+8)*3)];
/// coded ACK bits
uint8_t q_ACK[MAX_ACK_PAYLOAD];
/// coded RI bits
uint8_t q_RI[MAX_RI_PAYLOAD];
*/
/// beta_offset_cqi times 8
uint16_t beta_offset_cqi_times8;
/// beta_offset_ri times 8
@@ -219,7 +179,9 @@ typedef struct {
/// Pointer to the payload
uint8_t *b;
/// Pointers to transport block segments
uint8_t *c[MAX_NUM_NR_DLSCH_SEGMENTS];
uint8_t **c;
/// soft bits for each received segment ("d"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
int16_t **d;
/// Index of current HARQ round for this DLSCH
uint8_t round;
/// MCS table for this DLSCH
@@ -234,14 +196,8 @@ typedef struct {
uint8_t rvidx;
/// MIMO mode for this DLSCH
MIMO_nrmode_t mimo_mode;
/// soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
int16_t *w[MAX_NUM_NR_DLSCH_SEGMENTS];
/// for abstraction soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
//double w_abs[MAX_NUM_NR_DLSCH_SEGMENTS][3*8448];
/// soft bits for each received segment ("d"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
int16_t *d[MAX_NUM_NR_DLSCH_SEGMENTS];
/// LDPC processing buffers
t_nrLDPC_procBuf* p_nrLDPC_procBuf[MAX_NUM_NR_DLSCH_SEGMENTS];
t_nrLDPC_procBuf **p_nrLDPC_procBuf;
/// Number of code segments
uint32_t C;
/// Number of bits in code segments
@@ -86,16 +86,17 @@ void nr_rf_card_config_freq(openair0_config_t *openair0_cfg,
uint8_t cc_id = 0;
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[mod_id][cc_id];
int rf_chain = ue->rf_map.chain;
double freq_scale = (double)(dl_carrier + freq_offset) / dl_carrier;
for (int i = rf_chain; i < rf_chain + 4; i++) {
if (i < openair0_cfg->rx_num_channels)
openair0_cfg->rx_freq[i + rf_chain] = dl_carrier + freq_offset;
openair0_cfg->rx_freq[i + rf_chain] = dl_carrier * freq_scale;
else
openair0_cfg->rx_freq[i] = 0.0;
if (i<openair0_cfg->tx_num_channels)
openair0_cfg->tx_freq[i] = ul_carrier + freq_offset;
openair0_cfg->tx_freq[i] = ul_carrier * freq_scale;
else
openair0_cfg->tx_freq[i] = 0.0;
+38 -57
View File
@@ -174,43 +174,23 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
unsigned int G)
{
start_meas(&ue->ulsch_encoding_stats);
/////////////////////////parameters and variables declaration/////////////////////////
///////////
unsigned int crc;
NR_UL_UE_HARQ_t *harq_process;
uint16_t nb_rb ;
uint32_t A, F;
uint32_t *pz;
uint8_t mod_order;
uint16_t Kr,r;
uint32_t r_offset;
uint32_t E,Kb;
uint8_t Ilbrm;
uint32_t Tbslbrm;
uint16_t R;
float Coderate;
///////////
///////////////////////////////////////////////////////////////////////////////////////
/////////////////////////parameters and variables initialization/////////////////////////
///////////
crc = 1;
harq_process = ulsch->harq_processes[harq_pid];
nb_rb = harq_process->pusch_pdu.rb_size;
A = harq_process->pusch_pdu.pusch_data.tb_size*8;
pz = &harq_process->Z;
mod_order = nr_get_Qm_ul(harq_process->pusch_pdu.mcs_index, harq_process->pusch_pdu.mcs_table);
R = nr_get_code_rate_ul(harq_process->pusch_pdu.mcs_index, harq_process->pusch_pdu.mcs_table);
Kr=0;
r_offset=0;
F=0;
Ilbrm = 0;
Tbslbrm = 950984; //max tbs
Coderate = 0.0;
unsigned int crc = 1;
NR_UL_UE_HARQ_t *harq_process = ulsch->harq_processes[harq_pid];
uint16_t nb_rb = harq_process->pusch_pdu.rb_size;
uint32_t A = harq_process->pusch_pdu.pusch_data.tb_size*8;
uint32_t *pz = &harq_process->Z;
uint8_t mod_order = nr_get_Qm_ul(harq_process->pusch_pdu.mcs_index, harq_process->pusch_pdu.mcs_table);
uint16_t R = nr_get_code_rate_ul(harq_process->pusch_pdu.mcs_index, harq_process->pusch_pdu.mcs_table);
uint16_t Kr=0;
uint32_t r_offset=0;
uint32_t F=0;
uint8_t Ilbrm = 0;
uint32_t Tbslbrm = 950984; //max tbs
float Coderate = 0.0;
///////////
/////////////////////////////////////////////////////////////////////////////////////////
@@ -286,14 +266,19 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_SEGMENTATION, VCD_FUNCTION_IN);
start_meas(&ue->ulsch_segmentation_stats);
Kb=nr_segmentation(harq_process->b,
harq_process->c,
harq_process->B,
&harq_process->C,
&harq_process->K,
pz,
&harq_process->F,
harq_process->BG);
uint32_t Kb=nr_segmentation(harq_process->b,
harq_process->c,
harq_process->B,
&harq_process->C,
&harq_process->K,
pz,
&harq_process->F,
harq_process->BG);
if (harq_process->C>MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*harq_process->pusch_pdu.nrOfLayers) {
LOG_E(PHY,"nr_segmentation.c: too many segments %d, B %d\n",harq_process->C,harq_process->B);
return(-1);
}
stop_meas(&ue->ulsch_segmentation_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_SEGMENTATION, VCD_FUNCTION_OUT);
@@ -310,7 +295,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
//printf("segment Z %d k %d Kr %d BG %d\n", *pz,harq_process->K,Kr,BG);
//start_meas(te_stats);
for (r=0; r<harq_process->C; r++) {
for (int r=0; r<harq_process->C; r++) {
//channel_input[r] = &harq_process->d[r][0];
#ifdef DEBUG_ULSCH_CODING
printf("Encoder: B %d F %d \n",harq_process->B, harq_process->F);
@@ -345,8 +330,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_LDPC_ENCODER_OPTIM, VCD_FUNCTION_IN);
start_meas(&ue->ulsch_ldpc_encoding_stats);
for(int j = 0; j < (harq_process->C/8 + 1); j++)
{
for(int j = 0; j < (harq_process->C/8 + 1); j++) {
impp.macro_num = j;
nrLDPC_encoder(harq_process->c,harq_process->d,*pz,Kb,Kr,harq_process->BG,&impp);
}
@@ -369,14 +353,13 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
F = harq_process->F;
Kr = harq_process->K;
for (r=0; r<harq_process->C; r++) { // looping over C segments
for (int r=0; r<harq_process->C; r++) { // looping over C segments
if (harq_process->F>0) {
for (int k=(Kr-F-2*(*pz)); k<Kr-2*(*pz); k++) {
harq_process->d[r][k] = NR_NULL;
//if (k<(Kr-F+8))
//printf("r %d filler bits [%d] = %d \n", r,k, harq_process->d[r][k]);
}
for (int k=(Kr-F-2*(*pz)); k<Kr-2*(*pz); k++) {
harq_process->d[r][k] = NR_NULL;
//if (k<(Kr-F+8))
//printf("r %d filler bits [%d] = %d \n", r,k, harq_process->d[r][k]);
}
}
@@ -391,7 +374,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
///////////////////////// d---->| Rate matching bit selection |---->e /////////////////////////
///////////
E = nr_get_E(G, harq_process->C, mod_order, harq_process->pusch_pdu.nrOfLayers, r);
uint32_t E = nr_get_E(G, harq_process->C, mod_order, harq_process->pusch_pdu.nrOfLayers, r);
Tbslbrm = nr_compute_tbslbrm(0,nb_rb,harq_process->pusch_pdu.nrOfLayers);
@@ -434,9 +417,9 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
start_meas(&ue->ulsch_interleaving_stats);
nr_interleaving_ldpc(E,
mod_order,
harq_process->e+r_offset,
harq_process->f+r_offset);
mod_order,
harq_process->e+r_offset,
harq_process->f+r_offset);
stop_meas(&ue->ulsch_interleaving_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_INTERLEAVING_LDPC, VCD_FUNCTION_OUT);
@@ -458,8 +441,6 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
}
memcpy(ulsch->g,harq_process->f,G); // g is the concatenated code block
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_UE_ULSCH_ENCODING, VCD_FUNCTION_OUT);
stop_meas(&ue->ulsch_encoding_stats);
+136 -147
View File
@@ -105,18 +105,15 @@ void nr_pusch_codeword_scrambling(uint8_t *in,
}
void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
unsigned char harq_pid,
uint32_t frame,
uint8_t slot,
uint8_t thread_id,
int gNB_id) {
unsigned char harq_pid,
uint32_t frame,
uint8_t slot,
uint8_t thread_id,
int gNB_id) {
LOG_D(PHY,"nr_ue_ulsch_procedures hard_id %d %d.%d\n",harq_pid,frame,slot);
uint32_t available_bits;
uint8_t cwd_index, l;
uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5];
int16_t **tx_layers;
int32_t **txdataF;
int8_t Wf[2], Wt[2];
int l_prime[2], delta;
@@ -125,102 +122,100 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
int sample_offsetF, N_RE_prime;
NR_DL_FRAME_PARMS *frame_parms = &UE->frame_parms;
NR_UE_PUSCH *pusch_ue = UE->pusch_vars[thread_id][gNB_id];
uint8_t num_of_codewords = 1; // tmp assumption
int N_PRB_oh = 0; // higher layer (RRC) parameter xOverhead in PUSCH-ServingCellConfig
uint16_t number_dmrs_symbols = 0;
for (cwd_index = 0;cwd_index < num_of_codewords; cwd_index++) {
NR_UE_ULSCH_t *ulsch_ue = UE->ulsch[thread_id][gNB_id];
NR_UL_UE_HARQ_t *harq_process_ul_ue = ulsch_ue->harq_processes[harq_pid];
nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &harq_process_ul_ue->pusch_pdu;
NR_UE_ULSCH_t *ulsch_ue = UE->ulsch[thread_id][gNB_id][cwd_index];
NR_UL_UE_HARQ_t *harq_process_ul_ue = ulsch_ue->harq_processes[harq_pid];
nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &harq_process_ul_ue->pusch_pdu;
int start_symbol = pusch_pdu->start_symbol_index;
uint16_t ul_dmrs_symb_pos = pusch_pdu->ul_dmrs_symb_pos;
uint8_t number_of_symbols = pusch_pdu->nr_of_symbols;
uint8_t dmrs_type = pusch_pdu->dmrs_config_type;
uint16_t start_rb = pusch_pdu->rb_start;
uint16_t nb_rb = pusch_pdu->rb_size;
uint8_t Nl = pusch_pdu->nrOfLayers;
uint8_t mod_order = pusch_pdu->qam_mod_order;
uint16_t rnti = pusch_pdu->rnti;
uint8_t cdm_grps_no_data = pusch_pdu->num_dmrs_cdm_grps_no_data;
uint16_t start_sc = frame_parms->first_carrier_offset + (start_rb+pusch_pdu->bwp_start)*NR_NB_SC_PER_RB;
int start_symbol = pusch_pdu->start_symbol_index;
uint16_t ul_dmrs_symb_pos = pusch_pdu->ul_dmrs_symb_pos;
uint8_t number_of_symbols = pusch_pdu->nr_of_symbols;
uint8_t dmrs_type = pusch_pdu->dmrs_config_type;
uint16_t start_rb = pusch_pdu->rb_start;
uint16_t nb_rb = pusch_pdu->rb_size;
uint8_t Nl = pusch_pdu->nrOfLayers;
uint8_t mod_order = pusch_pdu->qam_mod_order;
uint16_t rnti = pusch_pdu->rnti;
uint8_t cdm_grps_no_data = pusch_pdu->num_dmrs_cdm_grps_no_data;
uint16_t start_sc = frame_parms->first_carrier_offset + (start_rb+pusch_pdu->bwp_start)*NR_NB_SC_PER_RB;
if (start_sc >= frame_parms->ofdm_symbol_size)
start_sc -= frame_parms->ofdm_symbol_size;
if (start_sc >= frame_parms->ofdm_symbol_size)
start_sc -= frame_parms->ofdm_symbol_size;
ulsch_ue->Nid_cell = frame_parms->Nid_cell;
ulsch_ue->Nid_cell = frame_parms->Nid_cell;
for (int i = start_symbol; i < start_symbol + number_of_symbols; i++) {
if((ul_dmrs_symb_pos >> i) & 0x01)
number_dmrs_symbols += 1;
}
for (int i = start_symbol; i < start_symbol + number_of_symbols; i++) {
if((ul_dmrs_symb_pos >> i) & 0x01)
number_dmrs_symbols += 1;
}
nb_dmrs_re_per_rb = ((dmrs_type == pusch_dmrs_type1) ? 6:4)*cdm_grps_no_data;
nb_dmrs_re_per_rb = ((dmrs_type == pusch_dmrs_type1) ? 6:4)*cdm_grps_no_data;
LOG_D(PHY,"ulsch %x : start_rb %d bwp_start %d start_sc %d start_symbol %d num_symbols %d cdmgrpsnodata %d num_dmrs %d dmrs_re_per_rb %d\n",
rnti,start_rb,pusch_pdu->bwp_start,start_sc,start_symbol,number_of_symbols,cdm_grps_no_data,number_dmrs_symbols,nb_dmrs_re_per_rb);
LOG_D(PHY,"ulsch %x : start_rb %d bwp_start %d start_sc %d start_symbol %d num_symbols %d cdmgrpsnodata %d num_dmrs %d dmrs_re_per_rb %d\n",
rnti,start_rb,pusch_pdu->bwp_start,start_sc,start_symbol,number_of_symbols,cdm_grps_no_data,number_dmrs_symbols,nb_dmrs_re_per_rb);
// TbD num_of_mod_symbols is set but never used
N_RE_prime = NR_NB_SC_PER_RB*number_of_symbols - nb_dmrs_re_per_rb*number_dmrs_symbols - N_PRB_oh;
harq_process_ul_ue->num_of_mod_symbols = N_RE_prime*nb_rb;
// TbD num_of_mod_symbols is set but never used
N_RE_prime = NR_NB_SC_PER_RB*number_of_symbols - nb_dmrs_re_per_rb*number_dmrs_symbols - N_PRB_oh;
harq_process_ul_ue->num_of_mod_symbols = N_RE_prime*nb_rb*num_of_codewords;
/////////////////////////ULSCH coding/////////////////////////
///////////
/////////////////////////ULSCH coding/////////////////////////
///////////
unsigned int G = nr_get_G(nb_rb, number_of_symbols,
nb_dmrs_re_per_rb, number_dmrs_symbols, mod_order, Nl);
unsigned int G = nr_get_G(nb_rb, number_of_symbols,
nb_dmrs_re_per_rb, number_dmrs_symbols, mod_order, Nl);
trace_NRpdu(DIRECTION_UPLINK,
ulsch_ue->harq_processes[harq_pid]->a,
ulsch_ue->harq_processes[harq_pid]->pusch_pdu.pusch_data.tb_size,
0, WS_C_RNTI, rnti, frame, slot, 0, 0);
trace_NRpdu(DIRECTION_UPLINK,
harq_process_ul_ue->a,
harq_process_ul_ue->pusch_pdu.pusch_data.tb_size,
0, WS_C_RNTI, rnti, frame, slot, 0, 0);
if (nr_ulsch_encoding(UE, ulsch_ue, frame_parms, harq_pid, G) == -1)
return;
if (nr_ulsch_encoding(UE, ulsch_ue, frame_parms, harq_pid, G) == -1)
return;
///////////
////////////////////////////////////////////////////////////////////
///////////
////////////////////////////////////////////////////////////////////
/////////////////////////ULSCH scrambling/////////////////////////
///////////
/////////////////////////ULSCH scrambling/////////////////////////
///////////
available_bits = G;
available_bits = G;
uint32_t scrambled_output[(available_bits>>5)+1];
memset(scrambled_output, 0, ((available_bits>>5)+1)*sizeof(uint32_t));
memset(scrambled_output[cwd_index], 0, ((available_bits>>5)+1)*sizeof(uint32_t));
nr_pusch_codeword_scrambling(harq_process_ul_ue->f,
available_bits,
ulsch_ue->Nid_cell,
rnti,
false,
scrambled_output);
nr_pusch_codeword_scrambling(ulsch_ue->g,
available_bits,
ulsch_ue->Nid_cell,
rnti,
false,
scrambled_output[cwd_index]); // assume one codeword for the moment
/////////////
//////////////////////////////////////////////////////////////////////////
/////////////////////////ULSCH modulation/////////////////////////
///////////
/////////////
//////////////////////////////////////////////////////////////////////////
int max_num_re = number_of_symbols*nb_rb*NR_NB_SC_PER_RB;
int32_t d_mod[max_num_re] __attribute__ ((aligned(16)));
/////////////////////////ULSCH modulation/////////////////////////
///////////
nr_modulation(scrambled_output[cwd_index], // assume one codeword for the moment
available_bits,
mod_order,
(int16_t *)ulsch_ue->d_mod);
nr_modulation(scrambled_output, // assume one codeword for the moment
available_bits,
mod_order,
(int16_t *)d_mod);
///////////
////////////////////////////////////////////////////////////////////////
///////////
////////////////////////////////////////////////////////////////////////
/////////////////////////DMRS Modulation/////////////////////////
///////////
uint32_t ***pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
uint32_t **pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
uint16_t n_dmrs = (pusch_pdu->bwp_start + start_rb + nb_rb)*((dmrs_type == pusch_dmrs_type1) ? 6:4);
int16_t mod_dmrs[n_dmrs<<1] __attribute((aligned(16)));
///////////
@@ -256,9 +251,11 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
/////////////////////////ULSCH layer mapping/////////////////////////
///////////
tx_layers = (int16_t **)pusch_ue->txdataF_layers;
int16_t **tx_layers = (int16_t **)malloc16_clear(Nl*sizeof(int16_t *));
for (int nl=0; nl<Nl; nl++)
tx_layers[nl] = (int16_t *)malloc16_clear((available_bits<<1)/mod_order*sizeof(int16_t));
nr_ue_layer_mapping(UE->ulsch[thread_id][gNB_id],
nr_ue_layer_mapping((int16_t *)d_mod,
Nl,
available_bits/mod_order,
tx_layers);
@@ -276,13 +273,16 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint8_t u = 0, v = 0;
int16_t *dmrs_seq = NULL;
/// Transform-coded "y"-sequences (for definition see 38-211 V15.3.0 2018-09, subsection 6.3.1.4)
int32_t y[max_num_re] __attribute__ ((aligned(16)));
// if transform precoding is enbaled (value 0)
if (pusch_pdu->transform_precoding == 0) {
uint32_t nb_re_pusch=nb_rb * NR_NB_SC_PER_RB;
uint32_t y_offset = 0;
uint16_t num_dmrs_res_per_symbol = nb_rb*(NR_NB_SC_PER_RB/2);
// Calculate index to dmrs seq array based on number of DMRS Subcarriers on this symbol
index = get_index_for_dmrs_lowpapr_seq(num_dmrs_res_per_symbol);
u = pusch_pdu->dfts_ofdm.low_papr_group_number;
@@ -291,59 +291,54 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
AssertFatal(index >= 0, "Num RBs not configured according to 3GPP 38.211 section 6.3.1.4. For PUSCH with transform precoding, num RBs cannot be multiple of any other primenumber other than 2,3,5\n");
AssertFatal(dmrs_seq != NULL, "DMRS low PAPR seq not found, check if DMRS sequences are generated");
LOG_D(PHY,"Transform Precoding params. u: %d, v: %d, index for dmrsseq: %d\n", u, v, index);
for (l = start_symbol; l < start_symbol + number_of_symbols; l++) {
for (int l = start_symbol; l < start_symbol + number_of_symbols; l++) {
if((ul_dmrs_symb_pos >> l) & 0x01)
/* In the symbol with DMRS no data would be transmitted CDM groups is 2*/
continue;
nr_dft(&ulsch_ue->y[y_offset], &((int32_t*)tx_layers[0])[y_offset], nb_re_pusch);
nr_dft(&y[y_offset], &((int32_t*)tx_layers[0])[y_offset], nb_re_pusch);
y_offset = y_offset + nb_re_pusch;
LOG_D(PHY,"Transform precoding being done on data- symbol: %d, nb_re_pusch: %d, y_offset: %d\n", l, nb_re_pusch, y_offset);
#ifdef DEBUG_PUSCH_MAPPING
printf("NR_ULSCH_UE: y_offset %d\t nb_re_pusch %d \t Symbol %d \t nb_rb %d \n",
y_offset, nb_re_pusch, l, nb_rb);
#endif
#ifdef DEBUG_PUSCH_MAPPING
printf("NR_ULSCH_UE: y_offset %d\t nb_re_pusch %d \t Symbol %d \t nb_rb %d \n",
y_offset, nb_re_pusch, l, nb_rb);
#endif
}
#ifdef DEBUG_DFT_IDFT
int32_t debug_symbols[MAX_NUM_NR_RE] __attribute__ ((aligned(16)));
int offset = 0;
printf("NR_ULSCH_UE: available_bits: %d, mod_order: %d", available_bits,mod_order);
#ifdef DEBUG_DFT_IDFT
int32_t debug_symbols[max_num_re] __attribute__ ((aligned(16)));
int offset = 0;
printf("NR_ULSCH_UE: available_bits: %d, mod_order: %d", available_bits,mod_order);
for (int ll = 0; ll < (available_bits/mod_order); ll++) {
debug_symbols[ll] = ulsch_ue->y[ll];
}
printf("NR_ULSCH_UE: numSym: %d, num_dmrs_sym: %d", number_of_symbols,number_dmrs_symbols);
for (int ll = 0; ll < (number_of_symbols-number_dmrs_symbols); ll++) {
for (int ll = 0; ll < (available_bits/mod_order); ll++) {
debug_symbols[ll] = y[ll];
}
nr_idft(&debug_symbols[offset], nb_re_pusch);
offset = offset + nb_re_pusch;
}
LOG_M("preDFT_all_symbols.m","UE_preDFT", tx_layers[0],number_of_symbols*nb_re_pusch,1,1);
LOG_M("postDFT_all_symbols.m","UE_postDFT", ulsch_ue->y,number_of_symbols*nb_re_pusch,1,1);
LOG_M("DEBUG_IDFT_SYMBOLS.m","UE_Debug_IDFT", debug_symbols,number_of_symbols*nb_re_pusch,1,1);
LOG_M("UE_DMRS_SEQ.m","UE_DMRS_SEQ", dmrs_seq,nb_re_pusch,1,1);
#endif
printf("NR_ULSCH_UE: numSym: %d, num_dmrs_sym: %d", number_of_symbols,number_dmrs_symbols);
for (int ll = 0; ll < (number_of_symbols-number_dmrs_symbols); ll++) {
nr_idft(&debug_symbols[offset], nb_re_pusch);
offset = offset + nb_re_pusch;
}
LOG_M("preDFT_all_symbols.m","UE_preDFT", tx_layers[0],number_of_symbols*nb_re_pusch,1,1);
LOG_M("postDFT_all_symbols.m","UE_postDFT", y,number_of_symbols*nb_re_pusch,1,1);
LOG_M("DEBUG_IDFT_SYMBOLS.m","UE_Debug_IDFT", debug_symbols,number_of_symbols*nb_re_pusch,1,1);
LOG_M("UE_DMRS_SEQ.m","UE_DMRS_SEQ", dmrs_seq,nb_re_pusch,1,1);
#endif
}
else
memcpy(ulsch_ue->y, tx_layers[0], (available_bits/mod_order)*sizeof(int32_t));
memcpy(y, tx_layers[0], (available_bits/mod_order)*sizeof(int32_t));
///////////
////////////////////////////////////////////////////////////////////////
for (int nl = 0; nl < Nl; nl++)
free_and_zero(tx_layers[nl]);
free_and_zero(tx_layers);
/////////////////////////ULSCH RE mapping/////////////////////////
///////////
@@ -356,18 +351,16 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint16_t m = 0;
#ifdef DEBUG_PUSCH_MAPPING
printf("NR_ULSCH_UE: Value of CELL ID %d /t, u %d \n", frame_parms->Nid_cell, u);
#endif
#ifdef DEBUG_PUSCH_MAPPING
printf("NR_ULSCH_UE: Value of CELL ID %d /t, u %d \n", frame_parms->Nid_cell, u);
#endif
// DMRS params for this ap
get_Wt(Wt, ap, dmrs_type);
get_Wf(Wf, ap, dmrs_type);
delta = get_delta(ap, dmrs_type);
for (l=start_symbol; l<start_symbol+number_of_symbols; l++) {
for (int l=start_symbol; l<start_symbol+number_of_symbols; l++) {
uint16_t k = start_sc;
uint16_t n = 0;
@@ -388,21 +381,18 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
// TODO: performance improvement, we can skip the modulation of DMRS symbols outside the bandwidth part
// Perform this on gold sequence, not required when SC FDMA operation is done,
LOG_D(PHY,"DMRS in symbol %d\n",l);
nr_modulation(pusch_dmrs[l][0], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
LOG_D(PHY,"DMRS in symbol %d\n",l);
nr_modulation(pusch_dmrs[l], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // Qm = 2 as DMRS is QPSK modulated
} else {
dmrs_idx = 0;
}
} else if (pusch_pdu->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) {
AssertFatal(pusch_pdu->transform_precoding == 1, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n");
if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) {
is_ptrs_sym = 1;
nr_modulation(pusch_dmrs[l][0], nb_rb, DMRS_MOD_ORDER, mod_ptrs);
nr_modulation(pusch_dmrs[l], nb_rb, DMRS_MOD_ORDER, mod_ptrs);
}
}
@@ -417,15 +407,15 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if (k == ((start_sc+get_dmrs_freq_idx_ul(n, k_prime, delta, dmrs_type))%frame_parms->ofdm_symbol_size))
is_dmrs = 1;
} else if (is_ptrs_sym) {
is_ptrs = is_ptrs_subcarrier(k,
rnti,
ap,
dmrs_type,
K_ptrs,
nb_rb,
pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset,
start_sc,
frame_parms->ofdm_symbol_size);
is_ptrs = is_ptrs_subcarrier(k,
rnti,
ap,
dmrs_type,
K_ptrs,
nb_rb,
pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset,
start_sc,
frame_parms->ofdm_symbol_size);
}
if (is_dmrs == 1) {
@@ -434,19 +424,19 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[2*dmrs_idx]) >> 15;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[(2*dmrs_idx) + 1]) >> 15;
} else {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*mod_dmrs[dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*mod_dmrs[dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
}
}
#ifdef DEBUG_PUSCH_MAPPING
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t dmrs: %d %d\n",
dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[(sample_offsetF)<<1],
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1]);
#endif
#ifdef DEBUG_PUSCH_MAPPING
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t dmrs: %d %d\n",
dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[(sample_offsetF)<<1],
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1]);
#endif
dmrs_idx++;
@@ -463,14 +453,14 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
} else if (!is_dmrs_sym || allowed_xlsch_re_in_dmrs_symbol(k, start_sc, frame_parms->ofdm_symbol_size, cdm_grps_no_data, dmrs_type)) {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = ((int16_t *) ulsch_ue->y)[m<<1];
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = ((int16_t *) ulsch_ue->y)[(m<<1) + 1];
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = ((int16_t *) y)[m<<1];
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = ((int16_t *) y)[(m<<1) + 1];
#ifdef DEBUG_PUSCH_MAPPING
#ifdef DEBUG_PUSCH_MAPPING
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, k, ((int16_t*)txdataF[ap])[(sample_offsetF)<<1],
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1]);
#endif
m, l, k, ((int16_t*)txdataF[ap])[(sample_offsetF)<<1],
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1]);
#endif
m++;
@@ -486,10 +476,9 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
}
}
}
}
NR_UL_UE_HARQ_t *harq_process_ulsch=NULL;
harq_process_ulsch = UE->ulsch[thread_id][gNB_id][0]->harq_processes[harq_pid];
harq_process_ulsch = UE->ulsch[thread_id][gNB_id]->harq_processes[harq_pid];
harq_process_ulsch->status = SCH_IDLE;
///////////
+6 -8
View File
@@ -89,7 +89,7 @@ typedef struct {
/// Pointer to the payload
uint8_t *b;
/// Pointers to transport block segments
uint8_t *c[MAX_NUM_NR_DLSCH_SEGMENTS];
uint8_t **c;
/// Frame where current HARQ round was sent
uint32_t frame;
/// Subframe where current HARQ round was sent
@@ -157,13 +157,11 @@ typedef struct {
/// Pointers to variables related to DLSCH harq process
NR_DL_gNB_HARQ_t harq_process;
/// TX buffers for UE-spec transmission (antenna layers 1,...,4 after to precoding)
int32_t *txdataF[NR_MAX_NB_LAYERS];
/// TX buffers for UE-spec transmission (antenna ports 1000 or 1001,...,1007, before precoding)
int32_t *txdataF_precoding[NR_MAX_NB_LAYERS];
int32_t **txdataF;
/// Modulated symbols buffer
int32_t *mod_symbs[NR_MAX_NB_CODEWORDS];
int32_t **mod_symbs;
/// beamforming weights for UE-spec transmission (antenna ports 5 or 7..14), for each codeword, maximum 4 layers?
int32_t **ue_spec_bf_weights[NR_MAX_NB_LAYERS];
int32_t ***ue_spec_bf_weights;
/// dl channel estimates (estimated from ul channel estimates)
int32_t **calib_dl_ch_estimates;
/// Allocated RNTI (0 means DLSCH_t is not currently used)
@@ -287,7 +285,7 @@ typedef struct {
/// LDPC lifting size (38.212 V15.4.0 table 5.3.2-1)
uint32_t Z;
/// code blocks after bit selection in rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
int16_t e[MAX_NUM_NR_DLSCH_SEGMENTS][3*8448];
int16_t e[MAX_NUM_NR_ULSCH_SEGMENTS][3*8448];
/// Number of bits in each code block after rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
uint32_t E;
/// Number of segments processed so far
@@ -771,7 +769,7 @@ typedef struct PHY_VARS_gNB_s {
NR_gNB_PDCCH_t pdcch_pdu[NUMBER_OF_NR_PDCCH_MAX];
NR_gNB_UL_PDCCH_t ul_pdcch_pdu[NUMBER_OF_NR_PDCCH_MAX];
NR_gNB_DLSCH_t *dlsch[NUMBER_OF_NR_DLSCH_MAX][2]; // Nusers times two spatial streams
NR_gNB_ULSCH_t *ulsch[NUMBER_OF_NR_ULSCH_MAX][2]; // [Nusers times][2 codewords]
NR_gNB_ULSCH_t *ulsch[NUMBER_OF_NR_ULSCH_MAX]; // [Nusers times]
NR_gNB_DLSCH_t *dlsch_SI,*dlsch_ra,*dlsch_p;
NR_gNB_DLSCH_t *dlsch_PCH;
/// statistics for DLSCH measurement collection
+3 -9
View File
@@ -225,11 +225,6 @@ typedef struct {
} NR_UE_COMMON_PER_THREAD;
typedef struct {
/// TX buffers for multiple layers
int32_t *txdataF_layers[NR_MAX_NB_LAYERS];
} NR_UE_PUSCH;
typedef struct {
bool active[2];
fapi_nr_ul_config_pucch_pdu pucch_pdu[2];
@@ -785,10 +780,9 @@ typedef struct {
NR_UE_PDCCH *pdcch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PRACH *prach_vars[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_SRS *srs_vars[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PUSCH *pusch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PUCCH *pucch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_DLSCH_t *dlsch[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX][NR_MAX_NB_CODEWORDS]; // two RxTx Threads
NR_UE_ULSCH_t *ulsch[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX][NR_MAX_NB_CODEWORDS]; // two code words
NR_UE_DLSCH_t *dlsch[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX][NR_MAX_NB_LAYERS>4 ? 2:1]; // two RxTx Threads
NR_UE_ULSCH_t *ulsch[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_DLSCH_t *dlsch_SI[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_DLSCH_t *dlsch_ra[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_DLSCH_t *dlsch_p[NUMBER_OF_CONNECTED_gNB_MAX];
@@ -832,7 +826,7 @@ typedef struct {
uint16_t scramblingID_pdcch;
/// PUSCH DMRS sequence
uint32_t ****nr_gold_pusch_dmrs;
uint32_t ***nr_gold_pusch_dmrs;
uint32_t X_u[64][839];
+4 -24
View File
@@ -44,8 +44,6 @@
#define MAX_NUM_SUBCARRIER_SPACING 5
#define NR_MAX_NB_RB 275
#define NR_NB_SC_PER_RB 12
#define NR_NB_REG_PER_CCE 6
@@ -67,22 +65,9 @@
#define NR_PBCH_DMRS_LENGTH 144 // in mod symbols
#define NR_PBCH_DMRS_LENGTH_DWORD 10 // ceil(2(QPSK)*NR_PBCH_DMRS_LENGTH/32)
/*These max values are for the gold sequences which are generated at init for the
* full carrier bandwidth*/
#define NR_MAX_PDCCH_DMRS_INIT_LENGTH ((NR_MAX_NB_RB<<1)*3) // 3 symbols *2(QPSK)
#define NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD 52 // ceil(NR_MAX_PDCCH_DMRS_LENGTH/32)
/*used for the resource mapping*/
#define NR_MAX_PDCCH_DMRS_LENGTH 576 // 16(L)*2(QPSK)*3(3 DMRS symbs per REG)*6(REG per CCE)
#define NR_MAX_PDSCH_DMRS_LENGTH 3300 //275*6(k)*2(QPSK real+imag)
#define NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD 104 // ceil(NR_MAX_PDSCH_DMRS_LENGTH/32)
#define NR_MAX_CSI_RS_LENGTH 4400 //275*8(max allocation per RB)*2(QPSK)
#define NR_MAX_CSI_RS_INIT_LENGTH_DWORD 138 // ceil(NR_MAX_CSI_RS_LENGTH/32)
#define NR_MAX_PUSCH_DMRS_LENGTH NR_MAX_PDSCH_DMRS_LENGTH
#define NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD
#define NR_MAX_DCI_PAYLOAD_SIZE 64
#define NR_MAX_DCI_SIZE 1728 //16(L)*2(QPSK)*9(12 RE per REG - 3(DMRS))*6(REG per CCE)
#define NR_MAX_DCI_SIZE_DWORD 54 // ceil(NR_MAX_DCI_SIZE/32)
@@ -93,24 +78,19 @@
#define NR_MAX_CSET_DURATION 3
#define NR_MAX_NB_RBG 18
#define NR_MAX_NB_LAYERS 2 // 8 // SU-MIMO (3GPP TS 38.211 V15.4.0 section 7.3.1.3)
#define NR_MAX_NB_CODEWORDS 2
#define NR_MAX_NB_LAYERS 4 // 8
#define NR_MAX_NB_HARQ_PROCESSES 16
#define NR_MAX_PDSCH_ENCODED_LENGTH (NR_MAX_NB_RB*NR_SYMBOLS_PER_SLOT*NR_NB_SC_PER_RB*8*NR_MAX_NB_LAYERS) // 8 is the maximum modulation order (it was 950984 before !!)
#define NR_MAX_PUSCH_ENCODED_LENGTH NR_MAX_PDSCH_ENCODED_LENGTH
#define NR_MAX_PDSCH_TBS 3824
#define NR_MAX_SIB_LENGTH 2976 // 3GPP TS 38.331 section 5.2.1 - The physical layer imposes a limit to the maximum size a SIB can take. The maximum SIB1 or SI message size is 2976 bits.
#define MAX_NUM_NR_DLSCH_SEGMENTS (NR_MAX_NB_LAYERS*34)
#define MAX_NR_DLSCH_PAYLOAD_BYTES (MAX_NUM_NR_DLSCH_SEGMENTS*1056)
#define MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER 34
#define MAX_NUM_NR_ULSCH_SEGMENTS 34
#define MAX_NR_ULSCH_PAYLOAD_BYTES (MAX_NUM_NR_ULSCH_SEGMENTS*1056)
#define MAX_NUM_NR_SRS_SYMBOLS 4
#define MAX_NUM_NR_CHANNEL_BITS (14*273*12*8) // 14 symbols, 273 RB
#define MAX_NUM_NR_RE (14*273*12)
#define NR_RX_NB_TH 1
#define NR_NB_TH_SLOT 2
@@ -253,7 +233,7 @@ typedef struct {
typedef struct {
uint16_t sc_list_length;
uint16_t sc_list[6 * NR_MAX_NB_RB];
uint16_t *sc_list;
uint8_t srs_generated_signal_bits;
int32_t *srs_generated_signal;
int32_t **srs_received_signal;
+77 -53
View File
@@ -1938,6 +1938,8 @@ void fill_ulsch_harq_indication (PHY_VARS_eNB *eNB, LTE_UL_eNB_HARQ_t *ulsch_har
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
}
#define packetError(ConD, fmt, args...) if (!(ConD)) { LOG_E(PHY, fmt, args); goodPacket=false; }
void fill_uci_harq_indication (int UEid, PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci, int frame, int subframe, uint8_t *harq_ack, uint8_t tdd_mapping_mode, uint16_t tdd_multiplexing_mask) {
if ( split73 == SPLIT73_DU ) {
sendFs6Ulharq(fs6ULindicationHarq, UEid, eNB, uci, frame, subframe, harq_ack, tdd_mapping_mode, tdd_multiplexing_mask, 0, 0);
@@ -1953,6 +1955,7 @@ void fill_uci_harq_indication (int UEid, PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci, in
}
pthread_mutex_lock(&eNB->UL_INFO_mutex);
bool goodPacket=true;
nfapi_harq_indication_t *ind = &eNB->UL_INFO.harq_ind;
nfapi_harq_indication_body_t *body = &ind->harq_indication_body;
assert(eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs <= NFAPI_HARQ_IND_MAX_PDU);
@@ -1985,73 +1988,87 @@ void fill_uci_harq_indication (int UEid, PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci, in
pdu->harq_indication_fdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_FDD_REL13_TAG;
pdu->harq_indication_fdd_rel13.mode = 0;
pdu->harq_indication_fdd_rel13.number_of_ack_nack = 1;
AssertFatal (harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n", harq_ack[0]);
pdu->harq_indication_fdd_rel13.harq_tb_n[0] = harq_ack[0];
// release DLSCH if needed
release_harq(eNB,DLSCH_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
packetError (harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n", harq_ack[0]);
if (goodPacket) {
pdu->harq_indication_fdd_rel13.harq_tb_n[0] = harq_ack[0];
// release DLSCH if needed
release_harq(eNB,DLSCH_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
}
} else if (uci->pucch_fmt == pucch_format1b) {
pdu->harq_indication_fdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_FDD_REL13_TAG;
pdu->harq_indication_fdd_rel13.mode = 0;
pdu->harq_indication_fdd_rel13.number_of_ack_nack = 2;
AssertFatal (harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n", harq_ack[0]);
AssertFatal (harq_ack[1] == 1 || harq_ack[1] == 2 || harq_ack[1] == 4, "harq_ack[1] is %d, should be 0,1 or 4\n", harq_ack[1]);
pdu->harq_indication_fdd_rel13.harq_tb_n[0] = harq_ack[0];
pdu->harq_indication_fdd_rel13.harq_tb_n[1] = harq_ack[1];
// release DLSCH if needed
release_harq(eNB,DLSCH_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
release_harq(eNB,DLSCH_id,1,frame,subframe,0xffff, harq_ack[1] == 1);
} else AssertFatal(1==0,"only format 1a/b for now, received %d\n",uci->pucch_fmt);
packetError (harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n", harq_ack[0]);
packetError (harq_ack[1] == 1 || harq_ack[1] == 2 || harq_ack[1] == 4, "harq_ack[1] is %d, should be 0,1 or 4\n", harq_ack[1]);
if (goodPacket) {
pdu->harq_indication_fdd_rel13.harq_tb_n[0] = harq_ack[0];
pdu->harq_indication_fdd_rel13.harq_tb_n[1] = harq_ack[1];
// release DLSCH if needed
release_harq(eNB,DLSCH_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
release_harq(eNB,DLSCH_id,1,frame,subframe,0xffff, harq_ack[1] == 1);
}
} else
packetError(1==0,"only format 1a/b for now, received %d\n",uci->pucch_fmt);
} else { // TDD
AssertFatal (tdd_mapping_mode == 0 || tdd_mapping_mode == 1 || tdd_mapping_mode == 2, "Illegal tdd_mapping_mode %d\n", tdd_mapping_mode);
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.mode = tdd_mapping_mode;
LOG_D(PHY,"%s(eNB, uci_harq format %d, rnti:%04x, frame:%d, subframe:%d, tdd_mapping_mode:%d) harq_ack[0]:%d harq_ack[1]:%d\n", __FUNCTION__, uci->pucch_fmt,uci->rnti, frame, subframe,
tdd_mapping_mode,harq_ack[0],harq_ack[1]);
packetError (tdd_mapping_mode == 0 || tdd_mapping_mode == 1 || tdd_mapping_mode == 2, "Illegal tdd_mapping_mode %d\n", tdd_mapping_mode);
if (goodPacket) {
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.mode = tdd_mapping_mode;
LOG_D(PHY,"%s(eNB, uci_harq format %d, rnti:%04x, frame:%d, subframe:%d, tdd_mapping_mode:%d) harq_ack[0]:%d harq_ack[1]:%d\n", __FUNCTION__, uci->pucch_fmt,uci->rnti, frame, subframe,
tdd_mapping_mode,harq_ack[0],harq_ack[1]);
switch (tdd_mapping_mode) {
switch (tdd_mapping_mode) {
case 0: // bundling
if (uci->pucch_fmt == pucch_format1a) {
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.number_of_ack_nack = 1;
LOG_D(PHY,"bundling, pucch1a, number of ack nack %d\n",pdu->harq_indication_tdd_rel13.number_of_ack_nack);
AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n",harq_ack[0]);
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = harq_ack[0];
// release all bundled DLSCH if needed
release_harq(eNB,DLSCH_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
packetError(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n",harq_ack[0]);
if (goodPacket) {
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = harq_ack[0];
// release all bundled DLSCH if needed
release_harq(eNB,DLSCH_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
}
} else if (uci->pucch_fmt == pucch_format1b) {
pdu->harq_indication_tdd_rel13.number_of_ack_nack = 2;
AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n",harq_ack[0]);
AssertFatal(harq_ack[1] == 1 || harq_ack[1] == 2 || harq_ack[1] == 4, "harq_ack[1] is %d, should be 0,1 or 4\n",harq_ack[1]);
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = harq_ack[0];
pdu->harq_indication_tdd_rel13.harq_data[1].bundling.value_0 = harq_ack[1];
// release all DLSCH if needed
release_harq(eNB,DLSCH_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
release_harq(eNB,DLSCH_id,1,frame,subframe,0xffff, harq_ack[1] == 1);
packetError(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n",harq_ack[0]);
packetError(harq_ack[1] == 1 || harq_ack[1] == 2 || harq_ack[1] == 4, "harq_ack[1] is %d, should be 0,1 or 4\n",harq_ack[1]);
if (goodPacket) {
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = harq_ack[0];
pdu->harq_indication_tdd_rel13.harq_data[1].bundling.value_0 = harq_ack[1];
// release all DLSCH if needed
release_harq(eNB,DLSCH_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
release_harq(eNB,DLSCH_id,1,frame,subframe,0xffff, harq_ack[1] == 1);
}
}
break;
case 1: // multiplexing
AssertFatal (uci->pucch_fmt == pucch_format1b, "uci->pucch_format %d is not format1b\n", uci->pucch_fmt);
if (uci->num_pucch_resources == 1 && uci->pucch_fmt == pucch_format1a) {
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.number_of_ack_nack = 1;
AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n",harq_ack[0]);
pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = harq_ack[0];
// release all DLSCH if needed
release_harq(eNB,DLSCH_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
packetError (uci->pucch_fmt == pucch_format1b, "uci->pucch_format %d is not format1b\n", uci->pucch_fmt);
if (goodPacket) {
if (uci->num_pucch_resources == 1 && uci->pucch_fmt == pucch_format1a) {
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.number_of_ack_nack = 1;
packetError(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n",harq_ack[0]);
if (goodPacket) {
pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = harq_ack[0];
// release all DLSCH if needed
release_harq(eNB,DLSCH_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
}
} else if (uci->num_pucch_resources == 1 && uci->pucch_fmt == pucch_format1b) {
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.number_of_ack_nack = 2;
AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n",harq_ack[0]);
AssertFatal(harq_ack[1] == 1 || harq_ack[1] == 2 || harq_ack[1] == 4, "harq_ack[1] is %d, should be 0,1 or 4\n",harq_ack[1]);
pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = harq_ack[0];
pdu->harq_indication_tdd_rel13.harq_data[1].multiplex.value_0 = harq_ack[1];
// release all DLSCH if needed
release_harq(eNB,DLSCH_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
release_harq(eNB,DLSCH_id,1,frame,subframe,0xffff, harq_ack[1] == 1);
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.number_of_ack_nack = 2;
packetError(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[1] == 4, "harq_ack[0] is %d, should be 0,1 or 4\n",harq_ack[0]);
packetError(harq_ack[1] == 1 || harq_ack[1] == 2 || harq_ack[1] == 4, "harq_ack[1] is %d, should be 0,1 or 4\n",harq_ack[1]);
if (goodPacket) {
pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = harq_ack[0];
pdu->harq_indication_tdd_rel13.harq_data[1].multiplex.value_0 = harq_ack[1];
// release all DLSCH if needed
release_harq(eNB,DLSCH_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
release_harq(eNB,DLSCH_id,1,frame,subframe,0xffff, harq_ack[1] == 1);
}
} else { // num_pucch_resources (M) > 1
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.number_of_ack_nack = uci->num_pucch_resources;
@@ -2067,7 +2084,7 @@ void fill_uci_harq_indication (int UEid, PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci, in
release_harq(eNB,DLSCH_id,1,frame,subframe,tdd_multiplexing_mask, 1 /* force release? previous code was unconditional */);
}
break;
break;
case 2: // special bundling (SR collision)
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
@@ -2117,16 +2134,23 @@ void fill_uci_harq_indication (int UEid, PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci, in
} else {
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = 0;
}
break;
}
break;
}
}
}
} //TDD
eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs++;
LOG_D(PHY,"Incremented eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs:%d\n", eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs);
if (goodPacket) {
eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs++;
LOG_D(PHY,"Incremented eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs:%d\n", eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs);
} else {
LOG_W(PHY,"discarded a PUCCH because the decoded values are impossible\n");
}
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
}
+6 -6
View File
@@ -198,7 +198,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
NR_UL_gNB_HARQ_t *ulsch_harq = rdata->ulsch_harq;
NR_gNB_ULSCH_t *ulsch = rdata->ulsch;
int r = rdata->segment_r;
nfapi_nr_pusch_pdu_t *pusch_pdu = &gNB->ulsch[rdata->ulsch_id][0]->harq_processes[rdata->harq_pid]->ulsch_pdu;
nfapi_nr_pusch_pdu_t *pusch_pdu = &gNB->ulsch[rdata->ulsch_id]->harq_processes[rdata->harq_pid]->ulsch_pdu;
bool decodeSuccess = (rdata->decodeIterations <= rdata->decoderParms.numMaxIter);
ulsch_harq->processedSegments++;
@@ -303,7 +303,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH_id, uint8_t harq_pid)
{
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_pusch_pdu_t *pusch_pdu = &gNB->ulsch[ULSCH_id][0]->harq_processes[harq_pid]->ulsch_pdu;
nfapi_nr_pusch_pdu_t *pusch_pdu = &gNB->ulsch[ULSCH_id]->harq_processes[harq_pid]->ulsch_pdu;
uint8_t l, number_dmrs_symbols = 0;
uint32_t G;
@@ -379,13 +379,13 @@ void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id,
pthread_mutex_lock(&gNB->UL_INFO_mutex);
NR_gNB_ULSCH_t *ulsch = gNB->ulsch[ULSCH_id][0];
NR_gNB_ULSCH_t *ulsch = gNB->ulsch[ULSCH_id];
NR_UL_gNB_HARQ_t *harq_process = ulsch->harq_processes[harq_pid];
NR_gNB_SCH_STATS_t *stats=get_ulsch_stats(gNB,ulsch);
nfapi_nr_pusch_pdu_t *pusch_pdu = &harq_process->ulsch_pdu;
// pdu->data = gNB->ulsch[ULSCH_id+1][0]->harq_processes[harq_pid]->b;
// pdu->data = gNB->ulsch[ULSCH_id+1]->harq_processes[harq_pid]->b;
int sync_pos = nr_est_timing_advance_pusch(gNB, ULSCH_id); // estimate timing advance for MAC
// scale the 16 factor in N_TA calculation in 38.213 section 4.2 according to the used FFT size
@@ -548,7 +548,7 @@ void fill_ul_rb_mask(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
}
for (int ULSCH_id=0;ULSCH_id<gNB->number_of_nr_ulsch_max;ULSCH_id++) {
NR_gNB_ULSCH_t *ulsch = gNB->ulsch[ULSCH_id][0];
NR_gNB_ULSCH_t *ulsch = gNB->ulsch[ULSCH_id];
int harq_pid;
NR_UL_gNB_HARQ_t *ulsch_harq;
if ((ulsch) &&
@@ -708,7 +708,7 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
}
for (int ULSCH_id=0;ULSCH_id<gNB->number_of_nr_ulsch_max;ULSCH_id++) {
NR_gNB_ULSCH_t *ulsch = gNB->ulsch[ULSCH_id][0];
NR_gNB_ULSCH_t *ulsch = gNB->ulsch[ULSCH_id];
int harq_pid;
int no_sig;
NR_UL_gNB_HARQ_t *ulsch_harq;
+8 -8
View File
@@ -280,7 +280,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
thread_id = scheduled_response->thread_id;
NR_UE_DLSCH_t *dlsch0 = NULL;
NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
NR_UE_ULSCH_t *ulsch = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0];
NR_UE_PUCCH *pucch_vars = PHY_vars_UE_g[module_id][cc_id]->pucch_vars[thread_id][0];
if(scheduled_response->dl_config != NULL){
@@ -367,8 +367,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
// pusch config pdu
pusch_config_pdu = &ul_config->ul_config_list[i].pusch_config_pdu;
current_harq_pid = pusch_config_pdu->pusch_data.harq_process_id;
NR_UL_UE_HARQ_t *harq_process_ul_ue = ulsch0->harq_processes[current_harq_pid];
harq_process_ul_ue->status = 0;
NR_UL_UE_HARQ_t *harq_process_ul_ue = ulsch->harq_processes[current_harq_pid];
if (harq_process_ul_ue){
@@ -376,7 +375,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
memcpy(pusch_pdu, pusch_config_pdu, sizeof(nfapi_nr_ue_pusch_pdu_t));
ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
ulsch->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
if (scheduled_response->tx_request) {
for (int j=0; j<scheduled_response->tx_request->number_of_pdus; j++) {
@@ -384,15 +383,16 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
if ((tx_req_body->pdu_index == i) && (tx_req_body->pdu_length > 0)) {
LOG_D(PHY,"%d.%d Copying %d bytes to harq_process_ul_ue->a (harq_pid %d)\n",scheduled_response->frame,slot,tx_req_body->pdu_length,current_harq_pid);
memcpy(harq_process_ul_ue->a, tx_req_body->pdu, tx_req_body->pdu_length);
harq_process_ul_ue->status = ACTIVE;
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++;
LOG_D(PHY, "%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n", scheduled_response->frame, slot, ul_config, pdu_type, pdu_done, ul_config->number_pdus);
break;
}
}
}
harq_process_ul_ue->status = ACTIVE;
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++;
LOG_D(PHY, "%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n", scheduled_response->frame, slot, ul_config, pdu_type, pdu_done, ul_config->number_pdus);
} else {
LOG_E(PHY, "[phy_procedures_nrUE_TX] harq_process_ul_ue is NULL !!\n");
+4 -4
View File
@@ -123,7 +123,7 @@ void config_uplink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int thread_id, i
memset(ulsch,0,sizeof(NR_UE_ULSCH_t));
ue->ulsch[thread_id][gNB_id][code_word_idx] = ulsch;
ue->ulsch[thread_id][gNB_id] = ulsch;
}
else {
LOG_E(PHY, "Fatal memory allocation problem at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
@@ -148,7 +148,7 @@ void config_uplink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int thread_id, i
}
for (int slot_tx = 0; slot_tx < NR_MAX_SLOTS_PER_FRAME; slot_tx++) {
ue->ulsch[thread_id][gNB_id][code_word_idx]->harq_process_id[slot_tx] = NR_MAX_HARQ_PROCESSES;
ue->ulsch[thread_id][gNB_id]->harq_process_id[slot_tx] = NR_MAX_HARQ_PROCESSES;
}
}
@@ -167,7 +167,7 @@ void config_uplink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int thread_id, i
void release_uplink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int thread_id, int code_word_idx)
{
NR_UE_ULSCH_t *ulsch = ue->ulsch[thread_id][gNB_id][code_word_idx];
NR_UE_ULSCH_t *ulsch = ue->ulsch[thread_id][gNB_id];
for (int process_id = 0; process_id < ulsch->number_harq_processes_for_pusch; process_id++) {
@@ -178,7 +178,7 @@ void release_uplink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int thread_id,
free16(ulsch, sizeof(NR_UE_ULSCH_t));
ue->ulsch[thread_id][gNB_id][code_word_idx] = NULL;
ue->ulsch[thread_id][gNB_id] = NULL;
}
/*******************************************************************
+8 -3
View File
@@ -289,8 +289,9 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
start_meas(&ue->phy_proc_tx);
if (ue->UE_mode[gNB_id] <= PUSCH){
for (uint8_t harq_pid = 0; harq_pid < ue->ulsch[proc->thread_id][gNB_id][0]->number_harq_processes_for_pusch; harq_pid++) {
if (ue->ulsch[proc->thread_id][gNB_id][0]->harq_processes[harq_pid]->status == ACTIVE)
for (uint8_t harq_pid = 0; harq_pid < ue->ulsch[proc->thread_id][gNB_id]->number_harq_processes_for_pusch; harq_pid++) {
if (ue->ulsch[proc->thread_id][gNB_id]->harq_processes[harq_pid]->status == ACTIVE)
nr_ue_ulsch_procedures(ue, harq_pid, frame_tx, slot_tx, proc->thread_id, gNB_id);
}
}
@@ -1627,13 +1628,17 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
start_meas(&ue->dlsch_procedures_stat[proc->thread_id]);
NR_UE_DLSCH_t *dlsch1 = NULL;
if (NR_MAX_NB_LAYERS>4)
dlsch1 = ue->dlsch[proc->thread_id][gNB_id][1];
if (ret_pdsch >= 0)
nr_ue_dlsch_procedures(ue,
proc,
gNB_id,
PDSCH,
ue->dlsch[proc->thread_id][gNB_id][0],
ue->dlsch[proc->thread_id][gNB_id][1],
dlsch1,
&ue->dlsch_errors[gNB_id]);
stop_meas(&ue->dlsch_procedures_stat[proc->thread_id]);
+6 -18
View File
@@ -395,19 +395,6 @@ int main(int argc, char **argv)
load_pbch_desc(pbch_file_fd);
}
/* for (int k=0; k<2; k++) {
// Create transport channel structures for 2 transport blocks (MIMO)
for (i=0; i<2; i++) {
gNB->dlsch[k][i] = new_gNB_dlsch(Kmimo,8,Nsoft,0,frame_parms,gNB_config);
if (!gNB->dlsch[k][i]) {
printf("Can't get eNB dlsch structures\n");
exit(-1);
}
gNB->dlsch[k][i]->Nsoft = 10;
gNB->dlsch[k][i]->rnti = n_rnti+k;
}
}*/
//configure UE
UE = malloc(sizeof(PHY_VARS_NR_UE));
memcpy(&UE->frame_parms, frame_parms, sizeof(NR_DL_FRAME_PARMS));
@@ -420,10 +407,10 @@ int main(int argc, char **argv)
//nr_init_frame_parms_ue(&UE->frame_parms);
//init_nr_ue_transport(UE, 0);
int num_codeword = NR_MAX_NB_LAYERS > 4? 2:1;
for (int sf = 0; sf < 2; sf++) {
for (i = 0; i < 2; i++) {
for (i = 0; i < num_codeword; i++) {
UE->dlsch[sf][0][i] = new_nr_ue_dlsch(Kmimo, 8, Nsoft, 5, N_RB_DL);
if (!UE->dlsch[sf][0][i]) {
printf("Can't get ue dlsch structures\n");
exit(-1);
@@ -434,8 +421,8 @@ int main(int argc, char **argv)
}
unsigned char harq_pid = 0; //dlsch->harq_ids[subframe];
processingData_L1tx_t msgDataTx;
init_DLSCH_struct(gNB, &msgDataTx);
processingData_L1tx_t msgDataTx;
init_DLSCH_struct(gNB, &msgDataTx);
NR_gNB_DLSCH_t *dlsch = msgDataTx.dlsch[0][0];
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &dlsch->harq_process.pdsch_pdu.pdsch_pdu_rel15;
//time_stats_t *rm_stats, *te_stats, *i_stats;
@@ -642,8 +629,9 @@ int main(int argc, char **argv)
free(RC.gNB[0]);
free(RC.gNB);
int num_cw = NR_MAX_NB_LAYERS > 4? 2:1;
for (int sf = 0; sf < 2; sf++)
for (int i = 0; i < 2; i++)
for (int i = 0; i < num_cw; i++)
free_nr_ue_dlsch(&UE->dlsch[sf][0][i], N_RB_DL);
term_nr_ue_signal(UE, 1);
free(UE);
+5 -4
View File
@@ -656,7 +656,7 @@ int main(int argc, char **argv)
printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n",
argv[0]);
printf("-h This message\n");
printf("-L <log level, 0(errors), 1(warning), 2(info) 3(debug) 4 (trace)>\n");
printf("-L <log level, 0(errors), 1(warning), 2(analysis), 3(info), 4(debug), 5(trace)>\n");
//printf("-p Use extended prefix mode\n");
//printf("-d Use TDD\n");
printf("-n Number of frames to simulate\n");
@@ -1110,7 +1110,7 @@ int main(int argc, char **argv)
pdsch_pdu_rel15->dlDmrsSymbPos);
ptrsSymbPerSlot = get_ptrs_symbols_in_slot(dlPtrsSymPos, pdsch_pdu_rel15->StartSymbolIndex, pdsch_pdu_rel15->NrOfSymbols);
ptrsRePerSymb = ((rel15->rbSize + rel15->PTRSFreqDensity - 1)/rel15->PTRSFreqDensity);
printf("[DLSIM] PTRS Symbols in a slot: %2u, RE per Symbol: %3u, RE in a slot %4d\n", ptrsSymbPerSlot,ptrsRePerSymb, ptrsSymbPerSlot*ptrsRePerSymb );
LOG_D(PHY,"[DLSIM] PTRS Symbols in a slot: %2u, RE per Symbol: %3u, RE in a slot %4d\n", ptrsSymbPerSlot,ptrsRePerSymb, ptrsSymbPerSlot*ptrsRePerSymb );
}
msgDataTx->ssb[0].ssb_pdu.ssb_pdu_rel15.bchPayload=0x001234;
@@ -1267,7 +1267,7 @@ int main(int argc, char **argv)
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, rel15->nrOfLayers);
if(pdu_bit_map & 0x1) {
available_bits-= (ptrsSymbPerSlot * ptrsRePerSymb *rel15->nrOfLayers* 2);
printf("[DLSIM][PTRS] Available bits are: %5u, removed PTRS bits are: %5u \n",available_bits, (ptrsSymbPerSlot * ptrsRePerSymb *rel15->nrOfLayers* 2) );
LOG_D(PHY,"[DLSIM][PTRS] Available bits are: %5u, removed PTRS bits are: %5u \n",available_bits, (ptrsSymbPerSlot * ptrsRePerSymb *rel15->nrOfLayers* 2) );
}
/*
@@ -1324,7 +1324,8 @@ int main(int argc, char **argv)
printf("*****************************************\n");
printf("\n");
dump_pdsch_stats(stdout,gNB);
printf("SNR %f : n_errors (negative CRC) = %d/%d, Avg round %.2f, Channel BER %e, BLER %.2f, Eff Rate %.4f bits/slot, Eff Throughput %.2f, TBS %u bits/slot\n", SNR, n_errors, n_trials,roundStats[snrRun],berStats[snrRun],blerStats[snrRun],effRate,effRate/TBS*100,TBS);
printf("SNR %f : n_errors (negative CRC) = %d/%d, Avg round %.2f, Channel BER %e, BLER %.2f, Eff Rate %.4f bits/slot, Eff Throughput %.2f, TBS %u bits/slot\n",
SNR, n_errors, n_trials,roundStats[snrRun],berStats[snrRun],blerStats[snrRun],effRate,effRate/TBS*100,TBS);
printf("\n");
if (print_perf==1) {
+8 -14
View File
@@ -407,15 +407,10 @@ int main(int argc, char **argv)
}
for (sf = 0; sf < 2; sf++) {
for (i = 0; i < 2; i++) {
UE->ulsch[sf][0][i] = new_nr_ue_ulsch(N_RB_UL, 8);
if (!UE->ulsch[sf][0][i]) {
printf("Can't get ue ulsch structures.\n");
exit(-1);
}
UE->ulsch[sf][0] = new_nr_ue_ulsch(N_RB_UL, 8);
if (!UE->ulsch[sf][0]) {
printf("Can't get ue ulsch structures.\n");
exit(-1);
}
}
@@ -431,11 +426,11 @@ int main(int argc, char **argv)
uint8_t rvidx = 0;
uint8_t UE_id = 0;
NR_gNB_ULSCH_t *ulsch_gNB = gNB->ulsch[UE_id][0];
NR_gNB_ULSCH_t *ulsch_gNB = gNB->ulsch[UE_id];
NR_UL_gNB_HARQ_t *harq_process_gNB = ulsch_gNB->harq_processes[harq_pid];
nfapi_nr_pusch_pdu_t *rel15_ul = &harq_process_gNB->ulsch_pdu;
NR_UE_ULSCH_t *ulsch_ue = UE->ulsch[0][0][0];
NR_UE_ULSCH_t *ulsch_ue = UE->ulsch[0][0];
mod_order = nr_get_Qm_ul(Imcs, 0);
code_rate = nr_get_code_rate_ul(Imcs, 0);
@@ -525,7 +520,7 @@ int main(int argc, char **argv)
}
*/
if (ulsch_ue->g[i] == 0)
if (ulsch_ue->harq_processes[harq_pid]->f[i] == 0)
modulated_input[i] = 1.0; ///sqrt(2); //QPSK
else
modulated_input[i] = -1.0; ///sqrt(2);
@@ -615,8 +610,7 @@ int main(int argc, char **argv)
}
for (sf = 0; sf < 2; sf++)
for (i = 0; i < 2; i++)
free_nr_ue_ulsch(&UE->ulsch[sf][0][i], N_RB_UL);
free_nr_ue_ulsch(&UE->ulsch[sf][0], N_RB_UL);
term_nr_ue_signal(UE, 1);
free(UE);
+15 -15
View File
@@ -804,7 +804,7 @@ int main(int argc, char **argv)
unsigned char harq_pid = 0;
NR_gNB_ULSCH_t *ulsch_gNB = gNB->ulsch[UE_id][0];
NR_gNB_ULSCH_t *ulsch_gNB = gNB->ulsch[UE_id];
//nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &ulsch_gNB->harq_processes[harq_pid]->ulsch_pdu;
nfapi_nr_ul_tti_request_t *UL_tti_req = malloc(sizeof(*UL_tti_req));
NR_Sched_Rsp_t *Sched_INFO = malloc(sizeof(*Sched_INFO));
@@ -813,7 +813,7 @@ int main(int argc, char **argv)
nfapi_nr_pusch_pdu_t *pusch_pdu = &UL_tti_req->pdus_list[0].pusch_pdu;
NR_UE_ULSCH_t **ulsch_ue = UE->ulsch[0][0];
NR_UE_ULSCH_t *ulsch_ue = UE->ulsch[0][0];
unsigned char *estimated_output_bit;
unsigned char *test_input_bit;
@@ -1044,8 +1044,8 @@ int main(int argc, char **argv)
memset((void*)roundStats,0,50*sizeof(roundStats[0]));
while (round<max_rounds && crc_status) {
round_trials[round][snrRun]++;
ulsch_ue[0]->harq_processes[harq_pid]->round = round;
gNB->ulsch[0][0]->harq_processes[harq_pid]->round = round;
ulsch_ue->harq_processes[harq_pid]->round = round;
gNB->ulsch[0]->harq_processes[harq_pid]->round = round;
rv_index = nr_rv_round_map[round];
UE_proc.thread_id = 0;
@@ -1186,7 +1186,7 @@ int main(int argc, char **argv)
//nr_fill_ulsch(gNB,frame,slot,pusch_pdu); // Not needed as its its already filled as apart of "nr_schedule_response(Sched_INFO);"
for (int i=0;i<(TBS/8);i++) ulsch_ue[0]->harq_processes[harq_pid]->a[i]=i&0xff;
for (int i=0;i<(TBS/8);i++) ulsch_ue->harq_processes[harq_pid]->a[i]=i&0xff;
if (input_fd == NULL) {
// set FAPI parameters for UE, put them in the scheduled response and call
@@ -1361,8 +1361,8 @@ int main(int argc, char **argv)
}
////////////////////////////////////////////////////////////
if ((gNB->ulsch[0][0]->last_iteration_cnt >=
gNB->ulsch[0][0]->max_ldpc_iterations+1) || ul_proc_error == 1) {
if ((gNB->ulsch[0]->last_iteration_cnt >=
gNB->ulsch[0]->max_ldpc_iterations+1) || ul_proc_error == 1) {
error_flag = 1;
n_errors[round][snrRun]++;
crc_status = 1;
@@ -1387,8 +1387,8 @@ int main(int argc, char **argv)
for (i = 0; i < available_bits; i++) {
if(((ulsch_ue[0]->g[i] == 0) && (gNB->pusch_vars[UE_id]->llr[i] <= 0)) ||
((ulsch_ue[0]->g[i] == 1) && (gNB->pusch_vars[UE_id]->llr[i] >= 0)))
if(((ulsch_ue->harq_processes[harq_pid]->f[i] == 0) && (gNB->pusch_vars[UE_id]->llr[i] <= 0)) ||
((ulsch_ue->harq_processes[harq_pid]->f[i] == 1) && (gNB->pusch_vars[UE_id]->llr[i] >= 0)))
{
/*if(errors_scrambling == 0)
printf("\x1B[34m" "[frame %d][trial %d]\t1st bit in error in unscrambling = %d\n" "\x1B[0m", frame, trial, i);*/
@@ -1406,7 +1406,7 @@ int main(int argc, char **argv)
for (i = 0; i < TBS; i++) {
estimated_output_bit[i] = (ulsch_gNB->harq_processes[harq_pid]->b[i/8] & (1 << (i & 7))) >> (i & 7);
test_input_bit[i] = (ulsch_ue[0]->harq_processes[harq_pid]->b[i/8] & (1 << (i & 7))) >> (i & 7);
test_input_bit[i] = (ulsch_ue->harq_processes[harq_pid]->b[i/8] & (1 << (i & 7))) >> (i & 7);
if (estimated_output_bit[i] != test_input_bit[i]) {
/*if(errors_decoding == 0)
@@ -1415,13 +1415,13 @@ int main(int argc, char **argv)
}
}
if (n_trials == 1) {
for (int r=0;r<ulsch_ue[0]->harq_processes[harq_pid]->C;r++)
for (int i=0;i<ulsch_ue[0]->harq_processes[harq_pid]->K>>3;i++) {
if ((ulsch_ue[0]->harq_processes[harq_pid]->c[r][i]^ulsch_gNB->harq_processes[harq_pid]->c[r][i]) != 0) printf("************");
for (int r=0;r<ulsch_ue->harq_processes[harq_pid]->C;r++)
for (int i=0;i<ulsch_ue->harq_processes[harq_pid]->K>>3;i++) {
if ((ulsch_ue->harq_processes[harq_pid]->c[r][i]^ulsch_gNB->harq_processes[harq_pid]->c[r][i]) != 0) printf("************");
/*printf("r %d: in[%d] %x, out[%d] %x (%x)\n",r,
i,ulsch_ue[0]->harq_processes[harq_pid]->c[r][i],
i,ulsch_ue->harq_processes[harq_pid]->c[r][i],
i,ulsch_gNB->harq_processes[harq_pid]->c[r][i],
ulsch_ue[0]->harq_processes[harq_pid]->c[r][i]^ulsch_gNB->harq_processes[harq_pid]->c[r][i]);*/
ulsch_ue->harq_processes[harq_pid]->c[r][i]^ulsch_gNB->harq_processes[harq_pid]->c[r][i]);*/
}
}
if (errors_decoding > 0 && error_flag == 0) {
+18 -12
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@@ -624,15 +624,18 @@ void RCconfig_NR_L1(void) {
config_getlist( &GNBParamList,GNBParams,sizeof(GNBParams)/sizeof(paramdef_t),NULL);
char *ulprbbl = *GNBParamList.paramarray[0][GNB_ULPRBBLACKLIST_IDX].strptr;
if (ulprbbl) LOG_I(NR_PHY,"PRB blacklist %s\n",ulprbbl);
char *pt = strtok(ulprbbl,",");
char *save = NULL;
char *pt = strtok_r(ulprbbl, ",", &save);
int prbbl[275];
int num_prbbl=0;
memset(prbbl,0,275*sizeof(int));
while (pt) {
prbbl[atoi(pt)] = 1;
const int rb = atoi(pt);
AssertFatal(rb < 275, "RB %d out of bounds (max 275)\n", rb);
prbbl[rb] = 0x3FFF; // all symbols taken
LOG_I(NR_PHY,"Blacklisting prb %d\n",atoi(pt));
pt = strtok(NULL,",");
pt = strtok_r(NULL, ",", &save);
num_prbbl++;
}
@@ -736,15 +739,16 @@ void RCconfig_nr_macrlc() {
config_getlist( &GNBParamList,GNBParams,sizeof(GNBParams)/sizeof(paramdef_t),NULL);
char *ulprbbl = *GNBParamList.paramarray[0][GNB_ULPRBBLACKLIST_IDX].strptr;
char *pt = strtok(ulprbbl,",");
int prbbl[275];
char *save = NULL;
char *pt = strtok_r(ulprbbl, ",", &save);
uint16_t prbbl[275];
int num_prbbl=0;
int prb;
memset(prbbl,0,275*sizeof(int));
memset(prbbl,0,sizeof(prbbl));
while (pt) {
prb=atoi(pt);
prbbl[prb] = 1;
pt = strtok(NULL,",");
const int prb = atoi(pt);
AssertFatal(prb < 275, "RB %d out of bounds (max 275)\n", prb);
prbbl[prb] = 0x3FFF; // all symbols taken
pt = strtok_r(NULL, ",", &save);
num_prbbl++;
}
@@ -1458,7 +1462,8 @@ int RCconfig_NR_NG(MessageDef *msg_p, uint32_t i) {
// NGAP_REGISTER_GNB_REQ (msg_p).enb_interface_name_for_NGU = strdup(enb_interface_name_for_NGU);
cidr = *(NETParams[GNB_IPV4_ADDRESS_FOR_NG_AMF_IDX].strptr);
address = strtok(cidr, "/");
char *save = NULL;
address = strtok_r(cidr, "/", &save);
NGAP_REGISTER_GNB_REQ (msg_p).gnb_ip_address.ipv6 = 0;
NGAP_REGISTER_GNB_REQ (msg_p).gnb_ip_address.ipv4 = 1;
@@ -1730,7 +1735,8 @@ int RCconfig_NR_X2(MessageDef *msg_p, uint32_t i) {
}
cidr = *(NETParams[ENB_IPV4_ADDR_FOR_X2C_IDX].strptr);
address = strtok(cidr, "/");
char *save = NULL;
address = strtok_r(cidr, "/", &save);
X2AP_REGISTER_ENB_REQ (msg_p).enb_x2_ip_address.ipv6 = 0;
X2AP_REGISTER_ENB_REQ (msg_p).enb_x2_ip_address.ipv4 = 1;
strcpy(X2AP_REGISTER_ENB_REQ (msg_p).enb_x2_ip_address.ipv4_address, address);
+1 -1
View File
@@ -1119,7 +1119,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
tx_req.number_of_pdus = 0;
for (int j = 0; j < ul_config->number_pdus; j++) {
uint8_t *ulsch_input_buffer = &(ulsch_input_buffer_array[tx_req.number_of_pdus][MAX_ULSCH_PAYLOAD_BYTES]);
uint8_t *ulsch_input_buffer = ulsch_input_buffer_array[tx_req.number_of_pdus];
fapi_nr_ul_config_request_pdu_t *ulcfg_pdu = &ul_config->ul_config_list[j];
+1 -1
View File
@@ -318,7 +318,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
const int num_slots = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const int last_slot = (slot + num_slots - 1) % num_slots;
uint16_t *vrb_map_UL = cc[CC_id].vrb_map_UL;
memset(&vrb_map_UL[last_slot * MAX_BWP_SIZE], 0, sizeof(uint16_t) * MAX_BWP_SIZE);
memcpy(&vrb_map_UL[last_slot * MAX_BWP_SIZE], &RC.nrmac[module_idP]->ulprbbl, sizeof(uint16_t) * MAX_BWP_SIZE);
clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame, slot);
+16 -6
View File
@@ -389,7 +389,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
const int16_t N_RA_RB = get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, mu_pusch);
uint16_t *vrb_map_UL = &cc->vrb_map_UL[slotP * MAX_BWP_SIZE];
for (int i = 0; i < N_RA_RB * fdm; ++i)
vrb_map_UL[bwp_start + rach_ConfigGeneric->msg1_FrequencyStart + i] = 0xff; // all symbols
vrb_map_UL[bwp_start + rach_ConfigGeneric->msg1_FrequencyStart + i] = SL_to_bitmap(start_symbol, N_t_slot*N_dur);
}
}
}
@@ -772,6 +772,8 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
int scs = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
int fh = 0;
int startSymbolAndLength = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength;
int StartSymbolIndex, NrOfSymbols;
SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols);
int mappingtype = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType;
uint16_t *vrb_map_UL = &RC.nrmac[module_idP]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE];
@@ -780,7 +782,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
int BWPSize = nr_mac->type0_PDCCH_CSS_config[ra->beam_id].num_rbs;
int rbStart = 0;
for (int i = 0; (i < ra->msg3_nb_rb) && (rbStart <= (BWPSize - ra->msg3_nb_rb)); i++) {
if (vrb_map_UL[rbStart + BWPStart + i]) {
if (vrb_map_UL[rbStart + BWPStart + i]&SL_to_bitmap(StartSymbolIndex, NrOfSymbols)) {
rbStart += i;
i = 0;
}
@@ -898,7 +900,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
aggregation_level);
for (int rb = 0; rb < ra->msg3_nb_rb; rb++) {
vrb_map_UL[rbStart + BWPStart + rb] = 1;
vrb_map_UL[rbStart + BWPStart + rb] |= SL_to_bitmap(StartSymbolIndex, NrOfSymbols);
}
// reset state to wait msg3
@@ -928,6 +930,9 @@ void nr_get_Msg3alloc(module_id_t module_id,
int mu = ubwp ?
ubwp->bwp_Common->genericParameters.subcarrierSpacing :
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
int StartSymbolIndex = 0;
int NrOfSymbols = 0;
int startSymbolAndLength = 0;
int temp_slot = 0;
ra->Msg3_tda_id = 16; // initialization to a value above limit
@@ -942,6 +947,8 @@ void nr_get_Msg3alloc(module_id_t module_id,
int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
int nb_slots_per_period = ((1<<mu)*10)/nb_periods_per_frame;
for (int i=0; i<pusch_TimeDomainAllocationList->list.count; i++) {
startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols);
k2 = *pusch_TimeDomainAllocationList->list.array[i]->k2;
// we want to transmit in the uplink symbols of mixed slot
if ((k2 + DELTA[mu])%nb_slots_per_period == 0) {
@@ -949,6 +956,8 @@ void nr_get_Msg3alloc(module_id_t module_id,
ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu];
if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot)) {
ra->Msg3_tda_id = i;
ra->msg3_startsymb = StartSymbolIndex;
ra->msg3_nrsymb = NrOfSymbols;
break;
}
}
@@ -1002,11 +1011,12 @@ void nr_get_Msg3alloc(module_id_t module_id,
while (rbSize < msg3_nb_rb) {
rbStart += rbSize; /* last iteration rbSize was not enough, skip it */
rbSize = 0;
while (rbStart < bwpSize && vrb_map_UL[rbStart + bwpStart])
while (rbStart < bwpSize &&
(vrb_map_UL[rbStart + bwpStart]&SL_to_bitmap(StartSymbolIndex, NrOfSymbols)))
rbStart++;
AssertFatal(rbStart < bwpSize - msg3_nb_rb, "no space to allocate Msg 3 for RA!\n");
while (rbStart + rbSize < bwpSize
&& !vrb_map_UL[rbStart + bwpStart + rbSize]
&& !(vrb_map_UL[rbStart + bwpStart + rbSize]&SL_to_bitmap(StartSymbolIndex, NrOfSymbols))
&& rbSize < msg3_nb_rb)
rbSize++;
}
@@ -1113,7 +1123,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
i + ra->msg3_first_rb,
ra->Msg3_frame,
ra->Msg3_slot);
vrb_map_UL[i + ra->msg3_first_rb + ra->msg3_bwp_start] = 1;
vrb_map_UL[i + ra->msg3_first_rb + ra->msg3_bwp_start] |= SL_to_bitmap(ra->msg3_startsymb, ra->msg3_nrsymb);
}
LOG_D(NR_MAC, "[gNB %d][RAPROC] Frame %d, Slot %d : CC_id %d RA is active, Msg3 in (%d,%d)\n", module_idP, frameP, slotP, CC_id, ra->Msg3_frame, ra->Msg3_slot);
@@ -640,7 +640,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req];
// Data to be transmitted
bzero(tx_req->TLVs[0].value.direct,MAX_NR_DLSCH_PAYLOAD_BYTES);
bzero(tx_req->TLVs[0].value.direct,MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*1056);
memcpy(tx_req->TLVs[0].value.direct, sib1_payload, sib1_sdu_length);
tx_req->PDU_length = TBS;
@@ -691,7 +691,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
/* retransmissions: directly allocate */
*n_rb_sched -= sched_ctrl->sched_pdsch.rbSize;
for (int rb = 0; rb < sched_ctrl->sched_pdsch.rbSize; rb++)
rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] -= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] ^= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
return true;
}
@@ -910,7 +910,7 @@ void pf_dl(module_id_t module_id,
/* transmissions: directly allocate */
n_rb_sched -= sched_pdsch->rbSize;
for (int rb = 0; rb < sched_pdsch->rbSize; rb++)
rballoc_mask[rb + sched_pdsch->rbStart] -= slbitmap;
rballoc_mask[rb + sched_pdsch->rbStart] ^= slbitmap;
}
}
@@ -55,8 +55,6 @@ extern RAN_CONTEXT_t RC;
//#define ENABLE_MAC_PAYLOAD_DEBUG 1
//uint8_t mac_pdu[MAX_NR_DLSCH_PAYLOAD_BYTES];
/*Scheduling of DLSCH with associated DCI in common search space
* current version has only a DCI for type 1 PDCCH for C_RNTI*/
void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
@@ -481,9 +479,8 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
uint16_t *vrb_map_UL =
&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE];
const uint16_t symb = ((1 << ps->nrOfSymbols) - 1) << ps->startSymbolIndex;
for (int i = rbStart; i < rbStart + rbSize; ++i) {
if ((vrb_map_UL[i+BWPStart] & symb) != 0) {
if ((vrb_map_UL[i+BWPStart] & SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)) != 0) {
LOG_E(MAC,
"%s(): %4d.%2d RB %d is already reserved, cannot schedule UE\n",
__func__,
@@ -561,6 +558,6 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
sched_ctrl->aggregation_level);
for (int rb = rbStart; rb < rbStart + rbSize; rb++)
vrb_map_UL[rb+BWPStart] = 1;
vrb_map_UL[rb+BWPStart] |= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
return true;
}
@@ -1235,23 +1235,26 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
else { // this is the default PUCCH configuration, PUCCH format 0 or 1
LOG_D(NR_MAC,"pucch_acknak: Filling default PUCCH configuration from Tables (r_pucch %d, bwp %p)\n",r_pucch,bwp);
int rsetindex = *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_ResourceCommon;
int prboffset = r_pucch/default_pucch_csset[rsetindex];
int prboffsetm8 = (r_pucch-8)/default_pucch_csset[rsetindex];
pucch_pdu->prb_start = (r_pucch>>3)==0 ?
default_pucch_prboffset[rsetindex] + prboffset:
pucch_pdu->bwp_size-1-default_pucch_prboffset[rsetindex]-prboffsetm8;
int prb_start, second_hop_prb, nr_of_symb, start_symb;
set_r_pucch_parms(rsetindex,
r_pucch,
pucch_pdu->bwp_size,
&prb_start,
&second_hop_prb,
&nr_of_symb,
&start_symb);
pucch_pdu->prb_start = prb_start;
pucch_pdu->rnti = rnti;
pucch_pdu->freq_hop_flag = 1;
pucch_pdu->second_hop_prb = (r_pucch>>3)==0?
pucch_pdu->bwp_size-1-default_pucch_prboffset[rsetindex]-prboffset:
default_pucch_prboffset[rsetindex] + prboffsetm8;
pucch_pdu->second_hop_prb = second_hop_prb;
pucch_pdu->format_type = default_pucch_fmt[rsetindex];
pucch_pdu->initial_cyclic_shift = r_pucch%default_pucch_csset[rsetindex];
if (rsetindex==3||rsetindex==7||rsetindex==11) pucch_pdu->initial_cyclic_shift*=6;
else if (rsetindex==1||rsetindex==2) pucch_pdu->initial_cyclic_shift*=3;
else pucch_pdu->initial_cyclic_shift*=4;
pucch_pdu->nr_of_symbols = default_pucch_numbsymb[rsetindex];
pucch_pdu->start_symbol_index = default_pucch_firstsymb[rsetindex];
pucch_pdu->nr_of_symbols = nr_of_symb;
pucch_pdu->start_symbol_index = start_symb;
if (pucch_pdu->format_type == 1) pucch_pdu->time_domain_occ_idx = 0; // check this!!
pucch_pdu->sr_flag = O_sr;
pucch_pdu->prb_size=1;
@@ -1259,6 +1262,32 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
}
void set_r_pucch_parms(int rsetindex,
int r_pucch,
int bwp_size,
int *prb_start,
int *second_hop_prb,
int *nr_of_symbols,
int *start_symbol_index) {
// procedure described in 38.213 section 9.2.1
int prboffset = r_pucch/default_pucch_csset[rsetindex];
int prboffsetm8 = (r_pucch-8)/default_pucch_csset[rsetindex];
*prb_start = (r_pucch>>3)==0 ?
default_pucch_prboffset[rsetindex] + prboffset:
bwp_size-1-default_pucch_prboffset[rsetindex]-prboffsetm8;
*second_hop_prb = (r_pucch>>3)==0?
bwp_size-1-default_pucch_prboffset[rsetindex]-prboffset:
default_pucch_prboffset[rsetindex] + prboffsetm8;
*nr_of_symbols = default_pucch_numbsymb[rsetindex];
*start_symbol_index = default_pucch_firstsymb[rsetindex];
}
void prepare_dci(const NR_CellGroupConfig_t *CellGroup,
dci_pdu_rel15_t *dci_pdu_rel15,
nr_dci_format_t format,
+118 -58
View File
@@ -760,16 +760,16 @@ void nr_csi_meas_reporting(int Mod_idP,
switch(pucchres->format.present){
case NR_PUCCH_Resource__format_PR_format2:
len = pucchres->format.choice.format2->nrofPRBs;
mask = ((1 << pucchres->format.choice.format2->nrofSymbols) - 1) << pucchres->format.choice.format2->startingSymbolIndex;
mask = SL_to_bitmap(pucchres->format.choice.format2->startingSymbolIndex, pucchres->format.choice.format2->nrofSymbols);
curr_pucch->simultaneous_harqcsi = pucch_Config->format2->choice.setup->simultaneousHARQ_ACK_CSI;
break;
case NR_PUCCH_Resource__format_PR_format3:
len = pucchres->format.choice.format3->nrofPRBs;
mask = ((1 << pucchres->format.choice.format3->nrofSymbols) - 1) << pucchres->format.choice.format3->startingSymbolIndex;
mask = SL_to_bitmap(pucchres->format.choice.format3->startingSymbolIndex, pucchres->format.choice.format3->nrofSymbols);
curr_pucch->simultaneous_harqcsi = pucch_Config->format3->choice.setup->simultaneousHARQ_ACK_CSI;
break;
case NR_PUCCH_Resource__format_PR_format4:
mask = ((1 << pucchres->format.choice.format4->nrofSymbols) - 1) << pucchres->format.choice.format4->startingSymbolIndex;
mask = SL_to_bitmap(pucchres->format.choice.format4->startingSymbolIndex, pucchres->format.choice.format4->nrofSymbols);
curr_pucch->simultaneous_harqcsi = pucch_Config->format4->choice.setup->simultaneousHARQ_ACK_CSI;
break;
default:
@@ -777,7 +777,12 @@ void nr_csi_meas_reporting(int Mod_idP,
}
// verify resources are free
for (int i = start; i < start + len; ++i) {
vrb_map_UL[i+bwp_start] |= mask;
if((vrb_map_UL[i+bwp_start] & mask) != 0) {
LOG_E(NR_MAC, "%4d.%2d VRB MAP in %4d.%2d not free. Can't schedule CSI reporting on PUCCH.\n", frame, slot, frame, sched_slot);
memset(curr_pucch, 0, sizeof(*curr_pucch));
}
else
vrb_map_UL[i+bwp_start] |= mask;
}
}
}
@@ -1508,6 +1513,61 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
}
}
bool test_acknack_vrb_occupation(NR_UE_sched_ctrl_t *sched_ctrl,
NR_sched_pucch_t *pucch,
uint16_t *vrb_map_UL,
const NR_ServingCellConfigCommon_t *scc,
NR_PUCCH_Config_t *pucch_Config,
int r_pucch,
int bwp_start,
int bwp_size) {
// We assume initial cyclic shift is always 0 so different pucch resources can't overlap
NR_sched_pucch_t *csi_pucch = &sched_ctrl->sched_pucch[1];
if (csi_pucch &&
csi_pucch->csi_bits > 0 &&
csi_pucch->frame == pucch->frame &&
csi_pucch->ul_slot == pucch->ul_slot &&
csi_pucch->simultaneous_harqcsi &&
(csi_pucch->csi_bits + csi_pucch->dai_c) < 11)
return true; // available resources for csi_pucch already verified
if(r_pucch<0){
const NR_PUCCH_Resource_t *resource = pucch_Config->resourceToAddModList->list.array[0];
DevAssert(resource->format.present == NR_PUCCH_Resource__format_PR_format0);
pucch->second_hop_prb = resource->secondHopPRB!= NULL ? *resource->secondHopPRB : 0;
pucch->nr_of_symb = resource->format.choice.format0->nrofSymbols;
pucch->start_symb = resource->format.choice.format0->startingSymbolIndex;
pucch->prb_start = resource->startingPRB;
}
else{
int rsetindex = *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_ResourceCommon;
set_r_pucch_parms(rsetindex,
r_pucch,
bwp_size,
&pucch->prb_start,
&pucch->second_hop_prb,
&pucch->nr_of_symb,
&pucch->start_symb);
}
// verifying occupation of PRBs for ACK/NACK on dedicated pucch
for (int l=0; l<pucch->nr_of_symb; l++) {
uint16_t symb = SL_to_bitmap(pucch->start_symb+l, 1);
int prb;
if (l==1 && pucch->second_hop_prb != 0)
prb = pucch->second_hop_prb;
else
prb = pucch->prb_start;
if ((vrb_map_UL[bwp_start+prb] & symb) != 0) {
return false;
break;
}
}
return true;
}
// this function returns an index to NR_sched_pucch structure
// currently this structure contains PUCCH0 at index 0 and PUCCH2 at index 1
@@ -1547,6 +1607,24 @@ int nr_acknack_scheduling(int mod_id,
* later)
* * each UE has dedicated PUCCH Format 0 resources, and we use index 0! */
NR_UE_sched_ctrl_t *sched_ctrl = &RC.nrmac[mod_id]->UE_info.UE_sched_ctrl[UE_id];
NR_CellGroupConfig_t *cg = RC.nrmac[mod_id]->UE_info.CellGroup[UE_id];
NR_PUCCH_Config_t *pucch_Config = NULL;
if (sched_ctrl->active_ubwp) {
pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
} else if (cg &&
cg->spCellConfig &&
cg->spCellConfig->spCellConfigDedicated &&
cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) {
pucch_Config = cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
}
NR_BWP_t *genericParameters = sched_ctrl->active_ubwp ?
&sched_ctrl->active_ubwp->bwp_Common->genericParameters:
&scc->uplinkConfigCommon->initialUplinkBWP->genericParameters;
int bwp_start = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth,MAX_BWP_SIZE);
int bwp_size = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[0];
LOG_D(NR_MAC, "In %s: %d.%d Trying to allocate pucch, current DAI %d\n", __FUNCTION__, frame, slot, pucch->dai_c);
@@ -1592,7 +1670,6 @@ int nr_acknack_scheduling(int mod_id,
LOG_D(NR_MAC, "In %s: pucch_acknak 1. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n", __FUNCTION__, frame, slot, pucch->frame, pucch->ul_slot, pucch->dai_c);
// this is hardcoded for now as ue specific only if we are not on the initialBWP (to be fixed to allow ue_Specific also on initialBWP
NR_CellGroupConfig_t *cg = RC.nrmac[mod_id]->UE_info.CellGroup[UE_id];
NR_BWP_UplinkDedicated_t *ubwpd=NULL;
if (cg &&
@@ -1666,23 +1743,36 @@ int nr_acknack_scheduling(int mod_id,
// Find the right timing_indicator value.
int ind_found = -1;
// while we are within the feedback limits
uint16_t *vrb_map_UL;
while ((n_slots_frame + pucch->ul_slot - slot) % n_slots_frame <= max_fb_time) {
int i = 0;
while (i < 8) {
LOG_D(NR_MAC, "In %s: pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n", __FUNCTION__,
i,pdsch_to_harq_feedback[i],pucch->ul_slot,slot);
int diff = pucch->ul_slot - slot;
if (diff<0)
diff += n_slots_frame;
if (pdsch_to_harq_feedback[i] == diff &&
pdsch_to_harq_feedback[i] >= minfbtime) {
ind_found = i;
break;
// checking if in ul_slot the resources potentially to be assigned to this PUCCH are available
vrb_map_UL = &RC.nrmac[mod_id]->common_channels[CC_id].vrb_map_UL[pucch->ul_slot * MAX_BWP_SIZE];
bool ret = test_acknack_vrb_occupation(sched_ctrl,
pucch,
vrb_map_UL,
scc,
pucch_Config,
r_pucch,
bwp_start,
bwp_size);
if (ret) {
int i = 0;
while (i < 8) {
LOG_D(NR_MAC,"pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n",
i,pdsch_to_harq_feedback[i],pucch->ul_slot,slot);
int diff = pucch->ul_slot - slot;
if (diff<0)
diff += n_slots_frame;
if (pdsch_to_harq_feedback[i] == diff &&
pdsch_to_harq_feedback[i] >= minfbtime) {
ind_found = i;
break;
}
++i;
}
++i;
if (ind_found!=-1)
break;
}
if (ind_found!=-1)
break;
// advance to the next ul slot
const int f = pucch->frame;
const int s = pucch->ul_slot;
@@ -1743,46 +1833,16 @@ int nr_acknack_scheduling(int mod_id,
pucch->dai_c++;
pucch->resource_indicator = 0; // each UE has dedicated PUCCH resources
pucch->r_pucch=r_pucch;
NR_PUCCH_Config_t *pucch_Config = NULL;
if (sched_ctrl->active_ubwp) {
pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
} else if (RC.nrmac[mod_id]->UE_info.CellGroup[UE_id] &&
RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]->spCellConfig &&
RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated &&
RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig &&
RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP &&
RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) {
pucch_Config = RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
}
NR_BWP_t *genericParameters = sched_ctrl->active_ubwp ?
&sched_ctrl->active_ubwp->bwp_Common->genericParameters:
&scc->uplinkConfigCommon->initialUplinkBWP->genericParameters;
int bwp_start = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth,MAX_BWP_SIZE);
/* verify that at that slot and symbol, resources are free. We only do this
* for initialCyclicShift 0 (we assume it always has that one), so other
* initialCyclicShifts can overlap with ICS 0!*/
if (pucch_Config) {
const NR_PUCCH_Resource_t *resource = pucch_Config->resourceToAddModList->list.array[pucch->resource_indicator];
DevAssert(resource->format.present == NR_PUCCH_Resource__format_PR_format0);
int second_hop_prb = resource->secondHopPRB!= NULL ? *resource->secondHopPRB : 0;
int nr_of_symbols = resource->format.choice.format0->nrofSymbols;
if (resource->format.choice.format0->initialCyclicShift == 0) {
uint16_t *vrb_map_UL = &RC.nrmac[mod_id]->common_channels[CC_id].vrb_map_UL[pucch->ul_slot * MAX_BWP_SIZE];
for (int l=0; l<nr_of_symbols; l++) {
uint16_t symb = 1 << (resource->format.choice.format0->startingSymbolIndex + l);
int prb;
if (l==1 && second_hop_prb != 0)
prb = second_hop_prb;
else
prb = resource->startingPRB;
if ((vrb_map_UL[bwp_start+prb] & symb) != 0)
LOG_W(MAC, "symbol 0x%x is not free for PUCCH alloc in vrb_map_UL at RB %ld and slot %d.%d\n", symb, resource->startingPRB, pucch->frame, pucch->ul_slot);
vrb_map_UL[bwp_start+prb] |= symb;
}
}
vrb_map_UL = &RC.nrmac[mod_id]->common_channels[CC_id].vrb_map_UL[pucch->ul_slot * MAX_BWP_SIZE];
for (int l=0; l<pucch->nr_of_symb; l++) {
uint16_t symb = SL_to_bitmap(pucch->start_symb+l, 1);
int prb;
if (l==1 && pucch->second_hop_prb != 0)
prb = pucch->second_hop_prb;
else
prb = pucch->prb_start;
vrb_map_UL[bwp_start+prb] |= symb;
}
return 0;
}
@@ -977,13 +977,6 @@ bool allocate_ul_retransmission(module_id_t module_id,
LOG_D(NR_MAC,"retInfo->time_domain_allocation = %d, tda = %d\n", retInfo->time_domain_allocation, tda);
LOG_D(NR_MAC,"num_dmrs_cdm_grps_no_data %d, tbs %d\n",num_dmrs_cdm_grps_no_data, retInfo->tb_size);
if (tda == retInfo->time_domain_allocation) {
/* Check the resource is enough for retransmission */
while (rbStart < bwpSize && !rballoc_mask[rbStart])
rbStart++;
if (rbStart + retInfo->rbSize > bwpSize) {
LOG_W(NR_MAC, "cannot allocate retransmission of UE %d/RNTI %04x: no resources (rbStart %d, retInfo->rbSize %d, bwpSize %d\n", UE_id, UE_info->rnti[UE_id], rbStart, retInfo->rbSize, bwpSize);
return false;
}
/* check whether we need to switch the TDA allocation since tha last
* (re-)transmission */
NR_pusch_semi_static_t *ps = &sched_ctrl->pusch_semi_static;
@@ -997,18 +990,29 @@ bool allocate_ul_retransmission(module_id_t module_id,
nr_set_pusch_semi_static(scc, sched_ctrl->active_ubwp, ubwpd, dci_format, tda, num_dmrs_cdm_grps_no_data, ps);
sched_ctrl->update_pusch_ps = false;
}
/* Check the resource is enough for retransmission */
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
rbStart++;
if (rbStart + retInfo->rbSize > bwpSize) {
LOG_W(NR_MAC, "cannot allocate retransmission of UE %d/RNTI %04x: no resources (rbStart %d, retInfo->rbSize %d, bwpSize %d\n", UE_id, UE_info->rnti[UE_id], rbStart, retInfo->rbSize, bwpSize);
return false;
}
LOG_D(NR_MAC, "%s(): retransmission keeping TDA %d and TBS %d\n", __func__, tda, retInfo->tb_size);
} else {
/* the retransmission will use a different time domain allocation, check
* that we have enough resources */
while (rbStart < bwpSize && !rballoc_mask[rbStart])
rbStart++;
int rbSize = 0;
while (rbStart + rbSize < bwpSize && rballoc_mask[rbStart + rbSize])
rbSize++;
NR_pusch_semi_static_t temp_ps;
int dci_format = get_dci_format(sched_ctrl);
nr_set_pusch_semi_static(scc, sched_ctrl->active_ubwp,ubwpd, dci_format, tda, num_dmrs_cdm_grps_no_data, &temp_ps);
/* the retransmission will use a different time domain allocation, check
* that we have enough resources */
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols)))
rbStart++;
int rbSize = 0;
while (rbStart + rbSize < bwpSize &&
(rballoc_mask[rbStart + rbSize]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols)))
rbSize++;
uint32_t new_tbs;
uint16_t new_rbSize;
bool success = nr_find_nb_rb(retInfo->Qm,
@@ -1091,7 +1095,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
/* Mark the corresponding RBs as used */
n_rb_sched -= sched_pusch->rbSize;
for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++)
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] = 0;
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] ^= SL_to_bitmap(sched_ctrl->pusch_semi_static.startSymbolIndex, sched_ctrl->pusch_semi_static.nrOfSymbols);
return true;
}
@@ -1209,21 +1213,6 @@ void pf_ul(module_id_t module_id,
if (max_num_ue < 0)
return;
LOG_D(NR_MAC,"Looking for min_rb %d RBs, starting at %d\n", min_rb, rbStart);
while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++;
if (rbStart + min_rb >= bwpSize) {
LOG_W(NR_MAC, "cannot allocate continuous UL data for UE %d/RNTI %04x: no resources (rbStart %d, min_rb %d, bwpSize %d\n",
UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
return;
}
sched_ctrl->cce_index = CCEIndex;
fill_pdcch_vrb_map(RC.nrmac[module_id],
CC_id,
&sched_ctrl->sched_pdcch,
CCEIndex,
sched_ctrl->aggregation_level);
/* Save PUSCH field */
/* we want to avoid a lengthy deduction of DMRS and other parameters in
* every TTI if we can save it, so check whether dci_format, TDA, or
@@ -1238,6 +1227,24 @@ void pf_ul(module_id_t module_id,
nr_set_pusch_semi_static(scc, sched_ctrl->active_ubwp, ubwpd, dci_format, tda, num_dmrs_cdm_grps_no_data, ps);
sched_ctrl->update_pusch_ps = false;
}
LOG_D(NR_MAC,"Looking for min_rb %d RBs, starting at %d\n", min_rb, rbStart);
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
rbStart++;
if (rbStart + min_rb >= bwpSize) {
LOG_W(NR_MAC, "cannot allocate continuous UL data for UE %d/RNTI %04x: no resources (rbStart %d, min_rb %d, bwpSize %d\n",
UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
return;
}
sched_ctrl->cce_index = CCEIndex;
fill_pdcch_vrb_map(RC.nrmac[module_id],
CC_id,
&sched_ctrl->sched_pdcch,
CCEIndex,
sched_ctrl->aggregation_level);
NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
sched_pusch->mcs = 9;
update_ul_ue_R_Qm(sched_pusch, ps);
@@ -1256,7 +1263,7 @@ void pf_ul(module_id_t module_id,
/* Mark the corresponding RBs as used */
n_rb_sched -= sched_pusch->rbSize;
for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++)
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] = 0;
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] ^= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
continue;
}
@@ -1331,19 +1338,6 @@ void pf_ul(module_id_t module_id,
NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
NR_pusch_semi_static_t *ps = &sched_ctrl->pusch_semi_static;
while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++;
sched_pusch->rbStart = rbStart;
uint16_t max_rbSize = 1;
while (rbStart + max_rbSize < bwpSize && rballoc_mask[rbStart + max_rbSize])
max_rbSize++;
if (rbStart + min_rb >= bwpSize) {
LOG_W(NR_MAC, "cannot allocate UL data for UE %d/RNTI %04x: no resources (rbStart %d, min_rb %d, bwpSize %d\n",
UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
return;
}
else LOG_D(NR_MAC,"allocating UL data for UE %d/RNTI %04x (rbStsart %d, min_rb %d, bwpSize %d\n",UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
/* Save PUSCH field */
/* we want to avoid a lengthy deduction of DMRS and other parameters in
* every TTI if we can save it, so check whether dci_format, TDA, or
@@ -1360,6 +1354,23 @@ void pf_ul(module_id_t module_id,
}
update_ul_ue_R_Qm(sched_pusch, ps);
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
rbStart++;
sched_pusch->rbStart = rbStart;
uint16_t max_rbSize = 1;
while (rbStart + max_rbSize < bwpSize &&
(rballoc_mask[rbStart + max_rbSize]&&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
max_rbSize++;
if (rbStart + min_rb >= bwpSize) {
LOG_W(NR_MAC, "cannot allocate UL data for UE %d/RNTI %04x: no resources (rbStart %d, min_rb %d, bwpSize %d\n",
UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
return;
}
else LOG_D(NR_MAC,"allocating UL data for UE %d/RNTI %04x (rbStsart %d, min_rb %d, bwpSize %d\n",UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
/* Calculate the current scheduling bytes and the necessary RBs */
const int B = cmax(sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes, 0);
uint16_t rbSize = 0;
@@ -1390,7 +1401,7 @@ void pf_ul(module_id_t module_id,
n_rb_sched -= sched_pusch->rbSize;
for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++)
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] = 0;
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] ^= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
}
}
@@ -1473,11 +1484,9 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
int startSymbolIndex, nrOfSymbols;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
const uint16_t symb = ((1 << nrOfSymbols) - 1) << startSymbolIndex;
const uint16_t symb = SL_to_bitmap(startSymbolIndex, nrOfSymbols);
int st = 0, e = 0, len = 0;
for (int i = 0; i < bwpSize; i++)
if (RC.nrmac[module_id]->ulprbbl[i] == 1) vrb_map_UL[i]=symb;
for (int i = 0; i < bwpSize; i++) {
while ((vrb_map_UL[bwpStart + i] & symb) != 0 && i < bwpSize)
@@ -1498,7 +1507,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
/* Calculate mask: if any RB in vrb_map_UL is blocked (1), the current RB will be 0 */
for (int i = 0; i < bwpSize; i++)
rballoc_mask[i] = i >= st && i <= e;
rballoc_mask[i] = (i >= st && i <= e)*SL_to_bitmap(startSymbolIndex, nrOfSymbols);
/* proportional fair scheduling algorithm */
pf_ul(module_id,
+8
View File
@@ -291,6 +291,14 @@ void prepare_dci(const NR_CellGroupConfig_t *CellGroup,
nr_dci_format_t format,
int bwp_id);
void set_r_pucch_parms(int rsetindex,
int r_pucch,
int bwp_size,
int *prb_start,
int *second_hop_prb,
int *nr_of_symbols,
int *start_symbol_index);
/* find coreset within the search space */
NR_ControlResourceSet_t *get_coreset(module_id_t module_idP,
NR_ServingCellConfigCommon_t *scc,
+7 -1
View File
@@ -171,6 +171,8 @@ typedef struct {
uint8_t msg3_round;
/// Flag to indicate if Msg3 carries a DCCH or DTCH message
bool msg3_dcch_dtch;
int msg3_startsymb;
int msg3_nrsymb;
/// TBS used for Msg4
int msg4_TBsize;
/// MCS used for Msg4
@@ -327,6 +329,10 @@ typedef struct NR_sched_pucch {
uint8_t timing_indicator;
uint8_t resource_indicator;
int r_pucch;
int prb_start;
int second_hop_prb;
int nr_of_symb;
int start_symb;
} NR_sched_pucch_t;
/* PUSCH semi-static configuration: as long as the TDA and DCI format remain
@@ -724,7 +730,7 @@ typedef struct gNB_MAC_INST_s {
/// current PDU index (BCH,DLSCH)
uint16_t pdu_index[NFAPI_CC_MAX];
int num_ulprbbl;
int ulprbbl[275];
uint16_t ulprbbl[275];
/// NFAPI Config Request Structure
nfapi_nr_config_request_scf_t config[NFAPI_CC_MAX];
/// NFAPI DL Config Request Structure
+11 -1
View File
@@ -2011,8 +2011,18 @@ void *UE_thread(void *arg)
if (is_synchronized == 0) {
if (instance_cnt_synch < 0) { // we can invoke the synch
// grab 10 ms of signal and wakeup synch thread
// we shift in time flow because the UE doesn't detect sync when frame alignment is not easy
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (void *)&dummy_rx[i][0];
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
rxp,
UE->frame_parms.samples_per_tti/2,
UE->frame_parms.nb_antennas_rx);
// grab 10 ms of signal and wakeup synch thread
if (UE->mode != loop_through_memory) {
if (IS_SOFTMODEM_RFSIM ) {
for(int sf=0; sf<10; sf++) {