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integration of remaining nFAPI messages

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This commit is contained in:
Raymond Knopp
2017-09-14 07:15:49 -07:00
parent f962c2e371
commit 362f584d66
44 changed files with 4653 additions and 3092 deletions
Download Patch File Download Diff File Expand all files Collapse all files
common/ran_context.h
+2
View File
@@ -56,6 +56,8 @@ typedef struct {
int *nb_CC;
/// Number of MACRLC instances in this node
int nb_macrlc_inst;
/// Number of component carriers per instance in this node
int *nb_mac_CC;
/// Number of L1 instances in this node
int nb_L1_inst;
/// Number of Component Carriers per instance in this node
common/utils/itti/intertask_interface.c
+5 -1
View File
@@ -623,7 +623,7 @@ static inline void itti_receive_msg_internal_event_fd(task_id_t task_id, uint8_t
read_ret = read (itti_desc.threads[thread_id].task_event_fd, &sem_counter, sizeof(sem_counter));
AssertFatal (read_ret == sizeof(sem_counter), "Read from task message FD (%d) failed (%d/%d)!\n", thread_id, (int) read_ret, (int) sizeof(sem_counter));
printf("sem_counter %d task %d\n", (int)sem_counter, task_id);
if (lfds611_queue_dequeue (itti_desc.tasks[task_id].message_queue, (void **) &message) == 0) {
/* No element in list -> this should not happen */
AssertFatal (0, "No message in queue for task %d while there are %d events and some for the messages queue!\n", task_id, epoll_ret);
@@ -631,9 +631,13 @@ static inline void itti_receive_msg_internal_event_fd(task_id_t task_id, uint8_t
AssertFatal(message != NULL, "Message from message queue is NULL!\n");
*received_msg = message->msg;
printf("ITTI: message %s\n", ITTI_MSG_NAME(message->msg));
result = itti_free (ITTI_MSG_ORIGIN_ID(*received_msg), message);
AssertFatal (result == EXIT_SUCCESS, "Failed to free memory (%d)!\n", result);
/* Mark that the event has been processed */
itti_desc.threads[thread_id].events[i].events &= ~EPOLLIN;
return;
openair1/PHY/INIT/lte_init.c
+204 -202
View File
@@ -153,91 +153,93 @@ void phy_config_request(PHY_Config_t *phy_config) {
RC.eNB[Mod_id][CC_id]->X_u);
#ifdef Rel14
fp->prach_emtc_config_common.prach_Config_enabled=1;
if (cfg->emtc_config.prach_ce_level_0_enable.value == 1) {
fp->prach_emtc_config_common.prach_Config_enabled=1;
fp->prach_emtc_config_common.rootSequenceIndex = cfg->emtc_config.prach_catm_root_sequence_index.value;
fp->prach_emtc_config_common.rootSequenceIndex = cfg->emtc_config.prach_catm_root_sequence_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag = cfg->emtc_config.prach_catm_high_speed_flag.value;
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = cfg->emtc_config.prach_catm_zero_correlation_zone_configuration.value;
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag = cfg->emtc_config.prach_catm_high_speed_flag.value;
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = cfg->emtc_config.prach_catm_zero_correlation_zone_configuration.value;
// CE Level 3 parameters
fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[3] = cfg->emtc_config.prach_ce_level_3_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[3] = cfg->emtc_config.prach_ce_level_3_starting_subframe_periodicity.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[3] = cfg->emtc_config.prach_ce_level_3_number_of_repetitions_per_attempt.value;
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[3]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[3],
"prach_starting_subframe_periodicity[3] < prach_numPetitionPerPreambleAttempt[3]\n");
// CE Level 3 parameters
fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[3] = cfg->emtc_config.prach_ce_level_3_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[3] = cfg->emtc_config.prach_ce_level_3_starting_subframe_periodicity.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[3] = cfg->emtc_config.prach_ce_level_3_number_of_repetitions_per_attempt.value;
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[3]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[3],
"prach_starting_subframe_periodicity[3] < prach_numPetitionPerPreambleAttempt[3]\n");
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3] = cfg->emtc_config.prach_ce_level_3_configuration_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[3] = cfg->emtc_config.prach_ce_level_3_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[3] = cfg->emtc_config.prach_ce_level_3_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[3] = cfg->emtc_config.prach_ce_level_3_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[3] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[3]);
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3] = cfg->emtc_config.prach_ce_level_3_configuration_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[3] = cfg->emtc_config.prach_ce_level_3_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[3] = cfg->emtc_config.prach_ce_level_3_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[3] = cfg->emtc_config.prach_ce_level_3_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[3] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[3]);
// CE Level 2 parameters
fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[2] = cfg->emtc_config.prach_ce_level_2_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[2] = cfg->emtc_config.prach_ce_level_2_starting_subframe_periodicity.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[2] = cfg->emtc_config.prach_ce_level_2_number_of_repetitions_per_attempt.value;
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[2]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[2],
"prach_starting_subframe_periodicity[2] < prach_numPetitionPerPreambleAttempt[2]\n");
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[2] = cfg->emtc_config.prach_ce_level_2_configuration_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[2] = cfg->emtc_config.prach_ce_level_2_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[2] = cfg->emtc_config.prach_ce_level_2_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[2] = cfg->emtc_config.prach_ce_level_2_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[2] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[2]);
// CE Level 2 parameters
fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[2] = cfg->emtc_config.prach_ce_level_2_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[2] = cfg->emtc_config.prach_ce_level_2_starting_subframe_periodicity.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[2] = cfg->emtc_config.prach_ce_level_2_number_of_repetitions_per_attempt.value;
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[2]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[2],
"prach_starting_subframe_periodicity[2] < prach_numPetitionPerPreambleAttempt[2]\n");
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[2] = cfg->emtc_config.prach_ce_level_2_configuration_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[2] = cfg->emtc_config.prach_ce_level_2_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[2] = cfg->emtc_config.prach_ce_level_2_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[2] = cfg->emtc_config.prach_ce_level_2_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[2] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[2]);
// CE Level 1 parameters
fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[1] = cfg->emtc_config.prach_ce_level_1_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[1] = cfg->emtc_config.prach_ce_level_1_starting_subframe_periodicity.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[1] = cfg->emtc_config.prach_ce_level_1_number_of_repetitions_per_attempt.value;
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[1]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[1],
"prach_starting_subframe_periodicity[1] < prach_numPetitionPerPreambleAttempt[1]\n");
// CE Level 1 parameters
fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[1] = cfg->emtc_config.prach_ce_level_1_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[1] = cfg->emtc_config.prach_ce_level_1_starting_subframe_periodicity.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[1] = cfg->emtc_config.prach_ce_level_1_number_of_repetitions_per_attempt.value;
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[1]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[1],
"prach_starting_subframe_periodicity[1] < prach_numPetitionPerPreambleAttempt[1]\n");
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[1] = cfg->emtc_config.prach_ce_level_1_configuration_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[1] = cfg->emtc_config.prach_ce_level_1_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[1] = cfg->emtc_config.prach_ce_level_1_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[1] = cfg->emtc_config.prach_ce_level_1_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[1] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[1]);
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[1] = cfg->emtc_config.prach_ce_level_1_configuration_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[1] = cfg->emtc_config.prach_ce_level_1_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[1] = cfg->emtc_config.prach_ce_level_1_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[1] = cfg->emtc_config.prach_ce_level_1_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[1] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[1]);
// CE Level 0 parameters
fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] = cfg->emtc_config.prach_ce_level_0_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0] = cfg->emtc_config.prach_ce_level_0_starting_subframe_periodicity.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0] = cfg->emtc_config.prach_ce_level_0_number_of_repetitions_per_attempt.value;
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0],
"prach_starting_subframe_periodicity[0] %d < prach_numPetitionPerPreambleAttempt[0] %d\n",
fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0],
fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0]);
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0] > 0,
"prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0]==0\n");
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[0] = cfg->emtc_config.prach_ce_level_0_configuration_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[0] = cfg->emtc_config.prach_ce_level_0_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[0] = cfg->emtc_config.prach_ce_level_0_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[0] = cfg->emtc_config.prach_ce_level_0_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[0]);
// CE Level 0 parameters
fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] = cfg->emtc_config.prach_ce_level_0_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0] = cfg->emtc_config.prach_ce_level_0_starting_subframe_periodicity.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0] = cfg->emtc_config.prach_ce_level_0_number_of_repetitions_per_attempt.value;
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0]>=fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0],
"prach_starting_subframe_periodicity[0] %d < prach_numPetitionPerPreambleAttempt[0] %d\n",
fp->prach_emtc_config_common.prach_ConfigInfo.prach_starting_subframe_periodicity[0],
fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0]);
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0] > 0,
"prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0]==0\n");
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[0] = cfg->emtc_config.prach_ce_level_0_configuration_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[0] = cfg->emtc_config.prach_ce_level_0_frequency_offset.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_enable[0] = cfg->emtc_config.prach_ce_level_0_hopping_enable.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_hopping_offset[0] = cfg->emtc_config.prach_ce_level_0_hopping_offset.value;
if (fp->prach_emtc_config_common.prach_ConfigInfo.prach_CElevel_enable[0] == 1)
compute_prach_seq(fp->prach_emtc_config_common.rootSequenceIndex,
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[3],
fp->prach_emtc_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
fp->prach_emtc_config_common.prach_ConfigInfo.highSpeedFlag,
fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u_br[0]);
}
#endif
@@ -264,9 +266,9 @@ void phy_config_request(PHY_Config_t *phy_config) {
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 0;
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
if (cfg->uplink_reference_signal_config.uplink_rs_hopping.value == 1)
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
if (cfg->uplink_reference_signal_config.uplink_rs_hopping.value == 2)
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 1;
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 1;
LOG_I(PHY,"pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = %d\n",fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled);
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = cfg->uplink_reference_signal_config.group_assignment.value;
LOG_I(PHY,"pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = %d\n",fp->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH);
@@ -313,14 +315,14 @@ void phy_config_sib1_ue(uint8_t Mod_id,int CC_id,
}
/*
void phy_config_sib2_eNB(uint8_t Mod_id,
int CC_id,
RadioResourceConfigCommonSIB_t *radioResourceConfigCommon,
ARFCN_ValueEUTRA_t *ul_CArrierFreq,
long *ul_Bandwidth,
AdditionalSpectrumEmission_t *additionalSpectrumEmission,
struct MBSFN_SubframeConfigList *mbsfn_SubframeConfigList)
{
void phy_config_sib2_eNB(uint8_t Mod_id,
int CC_id,
RadioResourceConfigCommonSIB_t *radioResourceConfigCommon,
ARFCN_ValueEUTRA_t *ul_CArrierFreq,
long *ul_Bandwidth,
AdditionalSpectrumEmission_t *additionalSpectrumEmission,
struct MBSFN_SubframeConfigList *mbsfn_SubframeConfigList)
{
LTE_DL_FRAME_PARMS *fp = &RC.eNB[Mod_id][CC_id]->frame_parms;
//LTE_eNB_UE_stats *eNB_UE_stats = RC.eNB[Mod_id][CC_id].eNB_UE_stats;
@@ -347,7 +349,7 @@ void phy_config_sib2_eNB(uint8_t Mod_id,
init_prach_tables(839);
compute_prach_seq(&fp->prach_config_common,fp->frame_type,
RC.eNB[Mod_id][CC_id]->X_u);
RC.eNB[Mod_id][CC_id]->X_u);
fp->pucch_config_common.deltaPUCCH_Shift = 1+radioResourceConfigCommon->pucch_ConfigCommon.deltaPUCCH_Shift;
fp->pucch_config_common.nRB_CQI = radioResourceConfigCommon->pucch_ConfigCommon.nRB_CQI;
@@ -389,15 +391,15 @@ void phy_config_sib2_eNB(uint8_t Mod_id,
fp->soundingrs_ul_config_common.enabled_flag = 0;
if (radioResourceConfigCommon->soundingRS_UL_ConfigCommon.present==SoundingRS_UL_ConfigCommon_PR_setup) {
fp->soundingrs_ul_config_common.enabled_flag = 1;
fp->soundingrs_ul_config_common.srs_BandwidthConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.srs_BandwidthConfig;
fp->soundingrs_ul_config_common.srs_SubframeConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.srs_SubframeConfig;
fp->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission = radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.ackNackSRS_SimultaneousTransmission;
fp->soundingrs_ul_config_common.enabled_flag = 1;
fp->soundingrs_ul_config_common.srs_BandwidthConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.srs_BandwidthConfig;
fp->soundingrs_ul_config_common.srs_SubframeConfig = radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.srs_SubframeConfig;
fp->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission = radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.ackNackSRS_SimultaneousTransmission;
if (radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.srs_MaxUpPts)
fp->soundingrs_ul_config_common.srs_MaxUpPts = 1;
else
fp->soundingrs_ul_config_common.srs_MaxUpPts = 0;
if (radioResourceConfigCommon->soundingRS_UL_ConfigCommon.choice.setup.srs_MaxUpPts)
fp->soundingrs_ul_config_common.srs_MaxUpPts = 1;
else
fp->soundingrs_ul_config_common.srs_MaxUpPts = 0;
}
@@ -425,34 +427,34 @@ void phy_config_sib2_eNB(uint8_t Mod_id,
// MBSFN
if (mbsfn_SubframeConfigList != NULL) {
fp->num_MBSFN_config = mbsfn_SubframeConfigList->list.count;
fp->num_MBSFN_config = mbsfn_SubframeConfigList->list.count;
for (i=0; i<mbsfn_SubframeConfigList->list.count; i++) {
fp->MBSFN_config[i].radioframeAllocationPeriod = mbsfn_SubframeConfigList->list.array[i]->radioframeAllocationPeriod;
fp->MBSFN_config[i].radioframeAllocationOffset = mbsfn_SubframeConfigList->list.array[i]->radioframeAllocationOffset;
for (i=0; i<mbsfn_SubframeConfigList->list.count; i++) {
fp->MBSFN_config[i].radioframeAllocationPeriod = mbsfn_SubframeConfigList->list.array[i]->radioframeAllocationPeriod;
fp->MBSFN_config[i].radioframeAllocationOffset = mbsfn_SubframeConfigList->list.array[i]->radioframeAllocationOffset;
if (mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.present == MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame) {
fp->MBSFN_config[i].fourFrames_flag = 0;
fp->MBSFN_config[i].mbsfn_SubframeConfig = mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[0]; // 6-bit subframe configuration
LOG_I(PHY, "[CONFIG] MBSFN_SubframeConfig[%d] pattern is %d\n", i,
fp->MBSFN_config[i].mbsfn_SubframeConfig);
} else if (mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.present == MBSFN_SubframeConfig__subframeAllocation_PR_fourFrames) { // 24-bit subframe configuration
fp->MBSFN_config[i].fourFrames_flag = 1;
fp->MBSFN_config[i].mbsfn_SubframeConfig =
mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[0]|
(mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[1]<<8)|
(mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[2]<<16);
if (mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.present == MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame) {
fp->MBSFN_config[i].fourFrames_flag = 0;
fp->MBSFN_config[i].mbsfn_SubframeConfig = mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[0]; // 6-bit subframe configuration
LOG_I(PHY, "[CONFIG] MBSFN_SubframeConfig[%d] pattern is %d\n", i,
fp->MBSFN_config[i].mbsfn_SubframeConfig);
} else if (mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.present == MBSFN_SubframeConfig__subframeAllocation_PR_fourFrames) { // 24-bit subframe configuration
fp->MBSFN_config[i].fourFrames_flag = 1;
fp->MBSFN_config[i].mbsfn_SubframeConfig =
mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[0]|
(mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[1]<<8)|
(mbsfn_SubframeConfigList->list.array[i]->subframeAllocation.choice.oneFrame.buf[2]<<16);
LOG_I(PHY, "[CONFIG] MBSFN_SubframeConfig[%d] pattern is %d\n", i,
fp->MBSFN_config[i].mbsfn_SubframeConfig);
}
}
LOG_I(PHY, "[CONFIG] MBSFN_SubframeConfig[%d] pattern is %d\n", i,
fp->MBSFN_config[i].mbsfn_SubframeConfig);
}
}
} else
fp->num_MBSFN_config = 0;
fp->num_MBSFN_config = 0;
//
}
}
*/
void phy_config_sib2_ue(uint8_t Mod_id,int CC_id,
@@ -852,7 +854,7 @@ void phy_config_afterHO_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_id, Mobility
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[1][eNB_id]->crnti = mobilityControlInfo->newUE_Identity.buf[0]|(mobilityControlInfo->newUE_Identity.buf[1]<<8);
LOG_I(PHY,"SET C-RNTI %x %x\n",PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[0][eNB_id]->crnti,
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[1][eNB_id]->crnti);
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[1][eNB_id]->crnti);
}
if(ho_failed) {
@@ -881,67 +883,67 @@ void phy_config_meas_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index,uint8_t n
}
/*
void phy_config_dedicated_eNB(uint8_t Mod_id,
int CC_id,
uint16_t rnti,
struct PhysicalConfigDedicated *physicalConfigDedicated)
{
void phy_config_dedicated_eNB(uint8_t Mod_id,
int CC_id,
uint16_t rnti,
struct PhysicalConfigDedicated *physicalConfigDedicated)
{
PHY_VARS_eNB *eNB = RC.eNB[Mod_id][CC_id];
int8_t UE_id = find_ue(rnti,eNB);
int i;
if (UE_id == -1) {
LOG_E( PHY, "[eNB %"PRIu8"] find_ue() returns -1\n", Mod_id);
return;
LOG_E( PHY, "[eNB %"PRIu8"] find_ue() returns -1\n", Mod_id);
return;
}
if (physicalConfigDedicated) {
eNB->physicalConfigDedicated[UE_id] = physicalConfigDedicated;
LOG_I(PHY,"phy_config_dedicated_eNB: physicalConfigDedicated=%p\n",physicalConfigDedicated);
eNB->physicalConfigDedicated[UE_id] = physicalConfigDedicated;
LOG_I(PHY,"phy_config_dedicated_eNB: physicalConfigDedicated=%p\n",physicalConfigDedicated);
if (physicalConfigDedicated->antennaInfo) {
switch(physicalConfigDedicated->antennaInfo->choice.explicitValue.transmissionMode) {
case AntennaInfoDedicated__transmissionMode_tm1:
eNB->transmission_mode[UE_id] = 1;
break;
case AntennaInfoDedicated__transmissionMode_tm2:
eNB->transmission_mode[UE_id] = 2;
break;
case AntennaInfoDedicated__transmissionMode_tm3:
eNB->transmission_mode[UE_id] = 3;
break;
case AntennaInfoDedicated__transmissionMode_tm4:
eNB->transmission_mode[UE_id] = 4;
break;
case AntennaInfoDedicated__transmissionMode_tm5:
eNB->transmission_mode[UE_id] = 5;
break;
case AntennaInfoDedicated__transmissionMode_tm6:
eNB->transmission_mode[UE_id] = 6;
break;
case AntennaInfoDedicated__transmissionMode_tm7:
lte_gold_ue_spec_port5(eNB->lte_gold_uespec_port5_table[0],eNB->frame_parms.Nid_cell,rnti);
if (physicalConfigDedicated->antennaInfo) {
switch(physicalConfigDedicated->antennaInfo->choice.explicitValue.transmissionMode) {
case AntennaInfoDedicated__transmissionMode_tm1:
eNB->transmission_mode[UE_id] = 1;
break;
case AntennaInfoDedicated__transmissionMode_tm2:
eNB->transmission_mode[UE_id] = 2;
break;
case AntennaInfoDedicated__transmissionMode_tm3:
eNB->transmission_mode[UE_id] = 3;
break;
case AntennaInfoDedicated__transmissionMode_tm4:
eNB->transmission_mode[UE_id] = 4;
break;
case AntennaInfoDedicated__transmissionMode_tm5:
eNB->transmission_mode[UE_id] = 5;
break;
case AntennaInfoDedicated__transmissionMode_tm6:
eNB->transmission_mode[UE_id] = 6;
break;
case AntennaInfoDedicated__transmissionMode_tm7:
lte_gold_ue_spec_port5(eNB->lte_gold_uespec_port5_table[0],eNB->frame_parms.Nid_cell,rnti);
for (i=0;i<eNB->num_RU;i++) eNB->RU_list[i]->do_precoding=1;
eNB->transmission_mode[UE_id] = 7;
break;
default:
LOG_E(PHY,"Unknown transmission mode!\n");
break;
}
LOG_I(PHY,"Transmission Mode (phy_config_dedicated_eNB) %d\n",eNB->transmission_mode[UE_id]);
for (i=0;i<eNB->num_RU;i++) eNB->RU_list[i]->do_precoding=1;
eNB->transmission_mode[UE_id] = 7;
break;
default:
LOG_E(PHY,"Unknown transmission mode!\n");
break;
}
LOG_I(PHY,"Transmission Mode (phy_config_dedicated_eNB) %d\n",eNB->transmission_mode[UE_id]);
} else {
LOG_D(PHY,"[eNB %d] : Received NULL radioResourceConfigDedicated->antennaInfo from eNB %d\n",Mod_id,UE_id);
}
} else {
LOG_E(PHY,"[eNB %d] Received NULL radioResourceConfigDedicated from eNB %d\n",Mod_id, UE_id);
return;
LOG_D(PHY,"[eNB %d] : Received NULL radioResourceConfigDedicated->antennaInfo from eNB %d\n",Mod_id,UE_id);
}
} else {
LOG_E(PHY,"[eNB %d] Received NULL radioResourceConfigDedicated from eNB %d\n",Mod_id, UE_id);
return;
}
}
}
*/
#if defined(Rel10) || defined(Rel14)
@@ -953,11 +955,11 @@ void phy_config_dedicated_scell_ue(uint8_t Mod_id,
}
/*
void phy_config_dedicated_scell_eNB(uint8_t Mod_id,
uint16_t rnti,
SCellToAddMod_r10_t *sCellToAddMod_r10,
int CC_id)
{
void phy_config_dedicated_scell_eNB(uint8_t Mod_id,
uint16_t rnti,
SCellToAddMod_r10_t *sCellToAddMod_r10,
int CC_id)
{
uint8_t UE_id = find_ue(rnti,RC.eNB[Mod_id][0]);
@@ -968,37 +970,37 @@ void phy_config_dedicated_scell_eNB(uint8_t Mod_id,
uint32_t carrier_freq_local;
if ((dl_CarrierFreq_r10>=36000) && (dl_CarrierFreq_r10<=36199)) {
carrier_freq_local = 1900000000 + (dl_CarrierFreq_r10-36000)*100000; //band 33 from 3GPP 36.101 v 10.9 Table 5.7.3-1
LOG_I(PHY,"[eNB %d] Frame %d: Configured SCell %d to frequency %d (ARFCN %ld) for UE %d\n",Mod_id,
//eNB->frame
0,
CC_id,carrier_freq_local,dl_CarrierFreq_r10,UE_id);
carrier_freq_local = 1900000000 + (dl_CarrierFreq_r10-36000)*100000; //band 33 from 3GPP 36.101 v 10.9 Table 5.7.3-1
LOG_I(PHY,"[eNB %d] Frame %d: Configured SCell %d to frequency %d (ARFCN %ld) for UE %d\n",Mod_id,
//eNB->frame
0,
CC_id,carrier_freq_local,dl_CarrierFreq_r10,UE_id);
} else if ((dl_CarrierFreq_r10>=6150) && (dl_CarrierFreq_r10<=6449)) {
carrier_freq_local = 832000000 + (dl_CarrierFreq_r10-6150)*100000; //band 20 from 3GPP 36.101 v 10.9 Table 5.7.3-1
// this is actually for the UL only, but we use it for DL too, since there is no TDD mode for this band
LOG_I(PHY,"[eNB %d] Frame %d: Configured SCell %d to frequency %d (ARFCN %ld) for UE %d\n",Mod_id,
//eNB->frame
0,CC_id,carrier_freq_local,dl_CarrierFreq_r10,UE_id);
carrier_freq_local = 832000000 + (dl_CarrierFreq_r10-6150)*100000; //band 20 from 3GPP 36.101 v 10.9 Table 5.7.3-1
// this is actually for the UL only, but we use it for DL too, since there is no TDD mode for this band
LOG_I(PHY,"[eNB %d] Frame %d: Configured SCell %d to frequency %d (ARFCN %ld) for UE %d\n",Mod_id,
//eNB->frame
0,CC_id,carrier_freq_local,dl_CarrierFreq_r10,UE_id);
} else {
LOG_E(PHY,"[eNB %d] Frame %d: ARFCN %ld of SCell %d for UE %d not supported\n",Mod_id,
//eNB->frame
0,dl_CarrierFreq_r10,CC_id,UE_id);
LOG_E(PHY,"[eNB %d] Frame %d: ARFCN %ld of SCell %d for UE %d not supported\n",Mod_id,
//eNB->frame
0,dl_CarrierFreq_r10,CC_id,UE_id);
}
if (physicalConfigDedicatedSCell_r10) {
//#warning " eNB->physicalConfigDedicatedSCell_r10 does not exist in eNB"
// eNB->physicalConfigDedicatedSCell_r10[UE_id] = physicalConfigDedicatedSCell_r10;
LOG_I(PHY,"[eNB %d] Frame %d: Configured phyConfigDedicatedSCell with CC_id %d for UE %d\n",Mod_id,
//eNB->frame
0,CC_id,UE_id);
//#warning " eNB->physicalConfigDedicatedSCell_r10 does not exist in eNB"
// eNB->physicalConfigDedicatedSCell_r10[UE_id] = physicalConfigDedicatedSCell_r10;
LOG_I(PHY,"[eNB %d] Frame %d: Configured phyConfigDedicatedSCell with CC_id %d for UE %d\n",Mod_id,
//eNB->frame
0,CC_id,UE_id);
} else {
LOG_E(PHY,"[eNB %d] Frame %d: Received NULL radioResourceConfigDedicated (CC_id %d, UE %d)\n",Mod_id,
//eNB->frame
0,CC_id,UE_id);
return;
LOG_E(PHY,"[eNB %d] Frame %d: Received NULL radioResourceConfigDedicated (CC_id %d, UE %d)\n",Mod_id,
//eNB->frame
0,CC_id,UE_id);
return;
}
}
}
*/
#endif
@@ -1172,7 +1174,7 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
}
if (physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic) {
if (physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic->present == CQI_ReportPeriodic_PR_setup) {
// configure PUCCH CQI reporting
// configure PUCCH CQI reporting
phy_vars_ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PUCCH_ResourceIndex = physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic->choice.setup.cqi_PUCCH_ResourceIndex;
phy_vars_ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex = physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic->choice.setup.cqi_pmi_ConfigIndex;
if (physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic->choice.setup.ri_ConfigIndex)
@@ -1211,12 +1213,12 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
phy_vars_ue->decode_MIB = 0;
//phy_vars_ue->pdcch_vars[1][eNB_id]->crnti = phy_vars_ue->pdcch_vars[0][eNB_id]->crnti;
if(phy_vars_ue->pdcch_vars[0][eNB_id]->crnti == 0x1234)
phy_vars_ue->pdcch_vars[0][eNB_id]->crnti = phy_vars_ue->pdcch_vars[1][eNB_id]->crnti;
phy_vars_ue->pdcch_vars[0][eNB_id]->crnti = phy_vars_ue->pdcch_vars[1][eNB_id]->crnti;
else
phy_vars_ue->pdcch_vars[1][eNB_id]->crnti = phy_vars_ue->pdcch_vars[0][eNB_id]->crnti;
phy_vars_ue->pdcch_vars[1][eNB_id]->crnti = phy_vars_ue->pdcch_vars[0][eNB_id]->crnti;
LOG_I(PHY,"C-RNTI %x %x \n", phy_vars_ue->pdcch_vars[0][eNB_id]->crnti,
phy_vars_ue->pdcch_vars[1][eNB_id]->crnti);
phy_vars_ue->pdcch_vars[1][eNB_id]->crnti);
}
@@ -1653,7 +1655,7 @@ int phy_init_RU(RU_t *ru) {
ru->common.txdata[i] = (int32_t*)malloc16_clear( fp->samples_per_tti*10*sizeof(int32_t) );
LOG_I(PHY,"[INIT] common.txdata[%d] = %p (%lu bytes)\n",i,ru->common.txdata[i],
fp->samples_per_tti*10*sizeof(int32_t));
fp->samples_per_tti*10*sizeof(int32_t));
}
for (i=0;i<ru->nb_rx;i++) {
@@ -1843,12 +1845,12 @@ int phy_init_lte_eNB(PHY_VARS_eNB *eNB,
#endif
/* number of elements of an array X is computed as sizeof(X) / sizeof(X[0])
AssertFatal(fp->nb_antennas_rx <= sizeof(prach_vars->rxsigF) / sizeof(prach_vars->rxsigF[0]),
"nb_antennas_rx too large");
for (i=0; i<fp->nb_antennas_rx; i++) {
prach_vars->rxsigF[i] = (int16_t*)malloc16_clear( fp->ofdm_symbol_size*12*2*sizeof(int16_t) );
LOG_D(PHY,"[INIT] prach_vars->rxsigF[%d] = %p\n",i,prach_vars->rxsigF[i]);
}*/
AssertFatal(fp->nb_antennas_rx <= sizeof(prach_vars->rxsigF) / sizeof(prach_vars->rxsigF[0]),
"nb_antennas_rx too large");
for (i=0; i<fp->nb_antennas_rx; i++) {
prach_vars->rxsigF[i] = (int16_t*)malloc16_clear( fp->ofdm_symbol_size*12*2*sizeof(int16_t) );
LOG_D(PHY,"[INIT] prach_vars->rxsigF[%d] = %p\n",i,prach_vars->rxsigF[i]);
}*/
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
@@ -1876,7 +1878,7 @@ int phy_init_lte_eNB(PHY_VARS_eNB *eNB,
pusch_vars[UE_id]->rxdataF_comp[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->N_RB_UL*12*fp->symbols_per_tti );
pusch_vars[UE_id]->ul_ch_mag[i] = (int32_t*)malloc16_clear( fp->symbols_per_tti*sizeof(int32_t)*fp->N_RB_UL*12 );
pusch_vars[UE_id]->ul_ch_magb[i] = (int32_t*)malloc16_clear( fp->symbols_per_tti*sizeof(int32_t)*fp->N_RB_UL*12 );
}
}
pusch_vars[UE_id]->llr = (int16_t*)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) );
} //UE_id
openair1/PHY/LTE_TRANSPORT/dci.c
+2 -2
View File
@@ -2130,11 +2130,11 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
if (dci_alloc[i].L == (uint8_t)L) {
#ifdef DEBUG_DCI_ENCODING
//#ifdef DEBUG_DCI_ENCODING
LOG_I(PHY,"Generating DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,dci_alloc[i].L,
*(unsigned int*)dci_alloc[i].dci_pdu);
dump_dci(frame_parms,&dci_alloc[i]);
#endif
//#endif
if (dci_alloc[i].firstCCE>=0) {
e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
openair1/PHY/LTE_TRANSPORT/dci_tools.c
+280 -33
View File
@@ -863,13 +863,12 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
uint8_t *dci_pdu = &dci_alloc->dci_pdu[0];
nfapi_dl_config_dci_dl_pdu_rel8_t *rel8 = &pdu->dci_dl_pdu_rel8;
int harq_pid;
LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
int beamforming_mode = 0;
int UE_id=-1;
int subframe = proc->subframe_tx;
int RIV_max;
int NPRB;
int TB0_active;
int TB1_active;
@@ -882,7 +881,8 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dci_alloc->harq_pid = rel8->harq_process;
dci_alloc->ra_flag = 0;
LOG_D(PHY,"NFAPI: DCI format %d, nCCE %d, L %d, rnti %x,harq_pid %d\n",
LOG_I(PHY,"NFAPI: DCI format %d, nCCE %d, L %d, rnti %x,harq_pid %d\n",
rel8->dci_format,rel8->cce_idx,rel8->aggregation_level,rel8->rnti,rel8->harq_process);
if ((rel8->rnti_type == 2 ) && (rel8->rnti != SI_RNTI) && (rel8->rnti != P_RNTI)) dci_alloc->ra_flag = 1;
@@ -898,12 +898,13 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dlsch1_harq = dlsch1->harq_processes[rel8->harq_process];
dlsch1_harq->codeword = 1;
dlsch0->subframe_tx[subframe] = 1;
dlsch0->harq_mask |= (1<<rel8->harq_process);
switch (rel8->dci_format) {
case NFAPI_DL_DCI_FORMAT_1A:
dci_alloc->format = format1A;
dlsch0->active = 1;
dlsch0->harq_mask |= (1<<rel8->harq_process);
switch (fp->N_RB_DL) {
case 6:
@@ -936,7 +937,6 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rel8->resource_block_coding];
dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag;
dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rel8->resource_block_coding];//NPRB;
RIV_max = RIV_max6;
break;
case 25:
if (fp->frame_type == TDD) {
@@ -967,7 +967,6 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT25[rel8->resource_block_coding];
dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag;
dlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rel8->resource_block_coding];//NPRB;
RIV_max = RIV_max25;
break;
case 50:
if (fp->frame_type == TDD) {
@@ -999,7 +998,6 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT50_1[rel8->resource_block_coding];
dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag;
dlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rel8->resource_block_coding];//NPRB;
RIV_max = RIV_max50;
break;
case 100:
if (fp->frame_type == TDD) {
@@ -1033,7 +1031,6 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dlsch0_harq->rb_alloc[3] = localRIV2alloc_LUT100_3[rel8->resource_block_coding];
dlsch0_harq->vrb_type = rel8->virtual_resource_block_assignment_flag;
dlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rel8->resource_block_coding];//NPRB;
RIV_max = RIV_max100;
break;
}
@@ -1072,6 +1069,9 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dci_alloc->format = format1;
dlsch0->active = 1;
dlsch0->harq_mask |= (1<<rel8->harq_process);
LOG_I(PHY,"Frame %d, Subframe %d: Programming DLSCH for Format 1 DCI, harq_pid %d\n",proc->frame_tx,subframe,rel8->harq_process);
switch (fp->N_RB_DL) {
case 6:
@@ -1224,6 +1224,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
}
LOG_I(PHY,"DCI: Set harq_ids[%d] to %d\n",subframe,rel8->harq_process);
dlsch0->harq_ids[subframe] = rel8->harq_process;
@@ -1414,15 +1415,18 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dlsch1_harq->Nl = 1;
dlsch0->active = 1;
dlsch1->active = 1;
dlsch0->harq_mask |= (1<<rel8->harq_process);
dlsch1->harq_mask |= (1<<rel8->harq_process);
// check if either TB is disabled (see 36-213 V11.3 Section )
if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) {
dlsch0->active = 0;
dlsch0->harq_mask &= ~(1<<rel8->harq_process);
}
if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) {
dlsch1->active = 0;
dlsch1->harq_mask &= ~(1<<rel8->harq_process);
}
// dlsch0_harq->dl_power_off = 0;
@@ -1704,6 +1708,8 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
if (TB0_active && TB1_active && rel8->transport_block_to_codeword_swap_flag==0) {
dlsch0->active = 1;
dlsch1->active = 1;
dlsch0->harq_mask |= (1<<rel8->harq_process);
dlsch1->harq_mask |= (1<<rel8->harq_process);
dlsch0_harq = dlsch0->harq_processes[rel8->harq_process];
dlsch1_harq = dlsch1->harq_processes[rel8->harq_process];
dlsch0_harq->mcs = rel8->mcs_1;
@@ -1725,7 +1731,10 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dlsch1 = eNB->dlsch[UE_id][0];
dlsch0->active = 1;
dlsch1->active = 1;
dlsch0_harq = dlsch0->harq_processes[rel8->harq_process];
dlsch0->harq_mask |= (1<<rel8->harq_process);
dlsch1->harq_mask |= (1<<rel8->harq_process);
dlsch1_harq = dlsch1->harq_processes[rel8->harq_process];
dlsch0_harq->mcs = rel8->mcs_1;
dlsch1_harq->mcs = rel8->mcs_2;
@@ -1740,6 +1749,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
}
else if (TB0_active && (TB1_active==0)) {
dlsch0->active = 1;
dlsch0->harq_mask |= (1<<rel8->harq_process);
dlsch0_harq = dlsch0->harq_processes[rel8->harq_process];
dlsch0_harq->mcs = rel8->mcs_1;
dlsch0_harq->Qm = get_Qm(rel8->mcs_1);
@@ -1754,6 +1764,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
}
else if ((TB0_active==0) && TB1_active) {
dlsch1->active = 1;
dlsch1->harq_mask |= (1<<rel8->harq_process);
dlsch1_harq = dlsch1->harq_processes[rel8->harq_process];
dlsch1_harq->mcs = rel8->mcs_2;
dlsch1_harq->Qm = get_Qm(rel8->mcs_2);
@@ -2196,7 +2207,7 @@ int fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *dc
dlsch0_harq->dl_power_off = 1;
dlsch0->active = 1;
dlsch0->harq_mask |= (1<<rel13->harq_process);
if (dlsch0_harq->round == 0) {
@@ -2222,9 +2233,225 @@ int fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *dc
}
int fill_dci_and_ulsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,nfapi_hi_dci0_dci_pdu *pdu) {
void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
nfapi_hi_dci0_dci_pdu *pdu) {
exit(-1);
uint8_t UE_id;
AssertFatal((UE_id=find_ulsch(pdu->dci_pdu_rel8.rnti,eNB,SEARCH_EXIST_OR_FREE))>=0,
"No existing UE ULSCH for rnti %x\n",pdu->dci_pdu_rel8.rnti);
LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
uint32_t cqi_req = pdu->dci_pdu_rel8.cqi_csi_request;
uint32_t dai = pdu->dci_pdu_rel8.dl_assignment_index;
uint32_t cshift = pdu->dci_pdu_rel8.cyclic_shift_2_for_drms;
uint32_t TPC = pdu->dci_pdu_rel8.tpc;
uint32_t mcs = pdu->dci_pdu_rel8.mcs_1;
uint32_t rballoc = computeRIV(frame_parms->N_RB_DL,
pdu->dci_pdu_rel8.resource_block_start,
pdu->dci_pdu_rel8.number_of_resource_block);
uint32_t ndi = pdu->dci_pdu_rel8.new_data_indication_1;
void *dci_pdu = (void*)dci_alloc->dci_pdu;
dci_alloc->format = format0;
dci_alloc->firstCCE = pdu->dci_pdu_rel8.cce_index;
dci_alloc->L = pdu->dci_pdu_rel8.aggregation_level;
dci_alloc->rnti = pdu->dci_pdu_rel8.rnti;
// dci_alloc->harq_pid = pdu->dci_pdu_rel8.harq_process;
dci_alloc->ra_flag = 0;
switch (frame_parms->N_RB_DL) {
case 6:
if (frame_parms->frame_type == TDD) {
((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->cqi_req = cqi_req;
((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->dai = dai;
((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->cshift = cshift;
((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC = TPC;
((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs = mcs;
((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->ndi = ndi;
((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc = rballoc;
// hopping = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->hopping;
((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->type = 0;
} else {
((DCI0_1_5MHz_FDD_t *)dci_pdu)->cqi_req = cqi_req;
((DCI0_1_5MHz_FDD_t *)dci_pdu)->cshift = cshift;
((DCI0_1_5MHz_FDD_t *)dci_pdu)->TPC = TPC;
((DCI0_1_5MHz_FDD_t *)dci_pdu)->mcs = mcs;
((DCI0_1_5MHz_FDD_t *)dci_pdu)->ndi = ndi;
((DCI0_1_5MHz_FDD_t *)dci_pdu)->rballoc = rballoc;
// hopping = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->hopping;
((DCI0_1_5MHz_FDD_t *)dci_pdu)->type = 0;
}
break;
case 25:
if (frame_parms->frame_type == TDD) {
((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cqi_req = cqi_req;
((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->dai = dai;
((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift = cshift;
((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->TPC = TPC;
((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->mcs = mcs;
((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->ndi = ndi;
((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->rballoc = rballoc;
// hopping = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->hopping;
((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->type = 0;
} else {
((DCI0_5MHz_FDD_t *)dci_pdu)->cqi_req = cqi_req;
((DCI0_5MHz_FDD_t *)dci_pdu)->cshift = cshift;
((DCI0_5MHz_FDD_t *)dci_pdu)->TPC = TPC;
((DCI0_5MHz_FDD_t *)dci_pdu)->mcs = mcs;
((DCI0_5MHz_FDD_t *)dci_pdu)->ndi = ndi;
((DCI0_5MHz_FDD_t *)dci_pdu)->rballoc = rballoc;
// hopping = ((DCI0_5MHz_FDD_t *)dci_pdu)->hopping;
((DCI0_5MHz_FDD_t *)dci_pdu)->type = 0;
}
break;
case 50:
if (frame_parms->frame_type == TDD) {
((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->cqi_req = cqi_req;
((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->dai = dai;
((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->cshift = cshift;
((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->TPC = TPC;
((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->mcs = mcs;
((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->ndi = ndi;
((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->rballoc = rballoc;
// hopping = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->hopping;
((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->type = 0;
} else {
((DCI0_10MHz_FDD_t *)dci_pdu)->cqi_req = cqi_req;
((DCI0_10MHz_FDD_t *)dci_pdu)->cshift = cshift;
((DCI0_10MHz_FDD_t *)dci_pdu)->TPC = TPC;
((DCI0_10MHz_FDD_t *)dci_pdu)->mcs = mcs;
((DCI0_10MHz_FDD_t *)dci_pdu)->ndi = ndi;
((DCI0_10MHz_FDD_t *)dci_pdu)->rballoc = rballoc;
// hopping = ((DCI0_10MHz_FDD_t *)dci_pdu)->hopping;
((DCI0_10MHz_FDD_t *)dci_pdu)->type = 0;
}
break;
case 100:
if (frame_parms->frame_type == TDD) {
((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->cqi_req = cqi_req;
((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->dai = dai;
((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->cshift = cshift;
((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->TPC = TPC;
((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->mcs = mcs;
((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->ndi = ndi;
((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->rballoc = rballoc;
// hopping = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->hopping;
((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->type = 0;
} else {
((DCI0_20MHz_FDD_t *)dci_pdu)->cqi_req = cqi_req;
((DCI0_20MHz_FDD_t *)dci_pdu)->cshift = cshift;
((DCI0_20MHz_FDD_t *)dci_pdu)->TPC = TPC;
((DCI0_20MHz_FDD_t *)dci_pdu)->mcs = mcs;
((DCI0_20MHz_FDD_t *)dci_pdu)->ndi = ndi;
((DCI0_20MHz_FDD_t *)dci_pdu)->rballoc = rballoc;
// hopping = ((DCI0_20MHz_FDD_t *)dci_pdu)->hopping;
((DCI0_20MHz_FDD_t *)dci_pdu)->type = 0;
}
//printf("eNB: rb_alloc (20 MHz dci) %d\n",rballoc);
break;
default:
LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
DevParam (frame_parms->N_RB_DL, 0, 0);
break;
}
}
void fill_ulsch(PHY_VARS_eNB *eNB,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame,int subframe) {
uint8_t harq_pid;
uint8_t UE_id;
AssertFatal((UE_id=find_ulsch(ulsch_pdu->ulsch_pdu_rel8.rnti,eNB,SEARCH_EXIST_OR_FREE))>=0,
"No existing UE ULSCH for rnti %x\n",ulsch_pdu->ulsch_pdu_rel8.rnti);
LTE_eNB_ULSCH_t *ulsch=eNB->ulsch[UE_id];
LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
int use_srs = 0;
harq_pid = ulsch_pdu->ulsch_pdu_rel8.harq_process_number;
ulsch->harq_processes[harq_pid]->frame = frame;
ulsch->harq_processes[harq_pid]->subframe = subframe;
ulsch->harq_processes[harq_pid]->first_rb = ulsch_pdu->ulsch_pdu_rel8.resource_block_start;
ulsch->harq_processes[harq_pid]->nb_rb = ulsch_pdu->ulsch_pdu_rel8.number_of_resource_blocks;
AssertFatal(ulsch->harq_processes[harq_pid]->nb_rb>0,"nb_rb = 0\n");
ulsch->harq_processes[harq_pid]->dci_alloc = 1;
ulsch->harq_processes[harq_pid]->rar_alloc = 0;
ulsch->harq_processes[harq_pid]->n_DMRS = ulsch_pdu->ulsch_pdu_rel8.cyclic_shift_2_for_drms;
ulsch->harq_processes[harq_pid]->Nsymb_pusch = 12-(frame_parms->Ncp<<1)-(use_srs==0?0:1);
ulsch->harq_processes[harq_pid]->srs_active = use_srs;
//Mapping of cyclic shift field in DCI format0 to n_DMRS2 (3GPP 36.211, Table 5.5.2.1.1-1)
if(ulsch->harq_processes[harq_pid]->n_DMRS == 0)
ulsch->harq_processes[harq_pid]->n_DMRS2 = 0;
else if(ulsch->harq_processes[harq_pid]->n_DMRS == 1)
ulsch->harq_processes[harq_pid]->n_DMRS2 = 6;
else if(ulsch->harq_processes[harq_pid]->n_DMRS == 2)
ulsch->harq_processes[harq_pid]->n_DMRS2 = 3;
else if(ulsch->harq_processes[harq_pid]->n_DMRS == 3)
ulsch->harq_processes[harq_pid]->n_DMRS2 = 4;
else if(ulsch->harq_processes[harq_pid]->n_DMRS == 4)
ulsch->harq_processes[harq_pid]->n_DMRS2 = 2;
else if(ulsch->harq_processes[harq_pid]->n_DMRS == 5)
ulsch->harq_processes[harq_pid]->n_DMRS2 = 8;
else if(ulsch->harq_processes[harq_pid]->n_DMRS == 6)
ulsch->harq_processes[harq_pid]->n_DMRS2 = 10;
else if(ulsch->harq_processes[harq_pid]->n_DMRS == 7)
ulsch->harq_processes[harq_pid]->n_DMRS2 = 9;
LOG_I(PHY,"[eNB %d][PUSCH %d] Programming PUSCH with n_DMRS2 %d (cshift %d) for Frame %d, Subframe %d\n",
eNB->Mod_id,harq_pid,ulsch->harq_processes[harq_pid]->n_DMRS2,ulsch->harq_processes[harq_pid]->n_DMRS,
frame,subframe);
ulsch->harq_processes[harq_pid]->rvidx = ulsch_pdu->ulsch_pdu_rel8.redundancy_version;
ulsch->harq_processes[harq_pid]->Qm = ulsch_pdu->ulsch_pdu_rel8.modulation_type;
if (ulsch->harq_processes[harq_pid]->round == 0) {
ulsch->harq_processes[harq_pid]->status = ACTIVE;
ulsch->harq_processes[harq_pid]->TBS = ulsch_pdu->ulsch_pdu_rel8.size<<3;
ulsch->harq_processes[harq_pid]->Msc_initial = ulsch_pdu->ulsch_pdu_rel8.number_of_resource_blocks;
ulsch->harq_processes[harq_pid]->Nsymb_initial = ulsch->harq_processes[harq_pid]->Nsymb_pusch;
ulsch->harq_processes[harq_pid]->round = 0;
}
ulsch->rnti = ulsch_pdu->ulsch_pdu_rel8.rnti;
LOG_I(PHY,"Filling ULSCH %x for Frame %d, Subframe %d : harq_pid %d, first_rb %d, nb_rb %d, rvidx %d, Qm %d, TBS %d, round %d \n",
ulsch->rnti,
frame,
subframe,
harq_pid,
ulsch->harq_processes[harq_pid]->first_rb,
ulsch->harq_processes[harq_pid]->nb_rb,
ulsch->harq_processes[harq_pid]->rvidx,
ulsch->harq_processes[harq_pid]->Qm,
ulsch->harq_processes[harq_pid]->TBS,
ulsch->harq_processes[harq_pid]->round);
}
int generate_eNB_dlsch_params_from_dci(int frame,
@@ -6488,16 +6715,33 @@ void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
uint8_t rah = pdci_info_extarcted->rah;
uint8_t dai = pdci_info_extarcted->dai;
uint8_t NPRB = 0;
uint8_t NPRB = 0;
uint8_t NPRB4TBS = 0;
if(dci_format == format1A)
{
if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
switch (N_RB_DL) {
case 6:
NPRB = RIV2nb_rb_LUT6[rballoc];
break;
case 25:
NPRB = RIV2nb_rb_LUT25[rballoc];
break;
case 50:
NPRB = RIV2nb_rb_LUT50[rballoc];
break;
case 100:
NPRB = RIV2nb_rb_LUT100[rballoc];
break;
}
if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
{
NPRB = (TPC&1) + 2;
NPRB4TBS = (TPC&1) + 2;
}
else
else
{
NPRB4TBS = NPRB;
/*
switch (N_RB_DL) {
case 6:
NPRB = RIV2nb_rb_LUT6[rballoc];//NPRB;
@@ -6512,11 +6756,13 @@ void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
NPRB = RIV2nb_rb_LUT100[rballoc];//NPRB;
break;
}
*/
}
}
else // format1
{
NPRB = conv_nprb(rah, rballoc, N_RB_DL);
NPRB4TBS=NPRB;
}
pdlsch0->current_harq_pid = harq_pid;
@@ -6607,7 +6853,7 @@ void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
pdlsch0_harq->rb_alloc_even[1] = localRIV2alloc_LUT50_1[rballoc];
pdlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT50_0[rballoc];
pdlsch0_harq->rb_alloc_odd[1] = localRIV2alloc_LUT50_1[rballoc];
// printf("rballoc: %08x.%08x\n",pdlsch0_harq->rb_alloc_even[0],pdlsch0_harq->rb_alloc_even[1]);
printf("rballoc: %08x.%08x\n",pdlsch0_harq->rb_alloc_even[0],pdlsch0_harq->rb_alloc_even[1]);
} else { // DISTRIBUTED
if ((rballoc&(1<<10)) == 0) {
rballoc = rballoc&(~(1<<10));
@@ -6674,14 +6920,14 @@ void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti))
{
pdlsch0_harq->TBS = TBStable[mcs1][NPRB-1];
pdlsch0_harq->TBS = TBStable[mcs1][NPRB4TBS-1];
pdlsch0_harq->Qm = 2;
}
else
{
if(mcs1 < 29)
{
pdlsch0_harq->TBS = TBStable[get_I_TBS(mcs1)][NPRB-1];
pdlsch0_harq->TBS = TBStable[get_I_TBS(mcs1)][NPRB4TBS-1];
pdlsch0_harq->Qm = get_Qm(mcs1);
}
}
@@ -9443,6 +9689,7 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
}
/*
int generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB *eNB,
eNB_rxtx_proc_t *proc,
void *dci_pdu,
@@ -9612,13 +9859,13 @@ int generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB *eNB,
if (cqi_req == 1) {
/* 36.213 7.2.1 (release 10) says:
* "RI is only reported for transmission modes 3 and 4,
* as well as transmission modes 8 and 9 with PMI/RI reporting"
* This is for aperiodic reporting.
* TODO: deal with TM 8&9 correctly when they are implemented.
* TODO: deal with periodic reporting if we implement it.
*/
// 36.213 7.2.1 (release 10) says:
// "RI is only reported for transmission modes 3 and 4,
// as well as transmission modes 8 and 9 with PMI/RI reporting"
// This is for aperiodic reporting.
// TODO: deal with TM 8&9 correctly when they are implemented.
// TODO: deal with periodic reporting if we implement it.
//
if (transmission_mode == 3 || transmission_mode == 4)
ulsch->harq_processes[harq_pid]->O_RI = 1; //we only support 2 antenna ports, so this is always 1 according to 3GPP 36.213 Table
else
@@ -10022,13 +10269,13 @@ int generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB *eNB,
ulsch->harq_processes[harq_pid]->mcs = mcs;
// ulsch->harq_processes[harq_pid]->calibration_flag = 0;
//if (ulsch->harq_processes[harq_pid]->mcs)
/*
if (ulsch->harq_processes[harq_pid]->mcs == 29) {
ulsch->harq_processes[harq_pid]->mcs = 4;
//
//if (ulsch->harq_processes[harq_pid]->mcs == 29) {
//ulsch->harq_processes[harq_pid]->mcs = 4;
// ulsch->harq_processes[harq_pid]->calibration_flag = 1;
// printf("Auto-Calibration (eNB): mcs %d, nb_rb %d\n",ulsch->harq_processes[harq_pid]->mcs,ulsch->harq_processes[harq_pid]->nb_rb);
}
*/
//}
ulsch->harq_processes[harq_pid]->TBS = TBStable[get_I_TBS_UL(ulsch->harq_processes[harq_pid]->mcs)][ulsch->harq_processes[harq_pid]->nb_rb-1];
ulsch->harq_processes[harq_pid]->Msc_initial = 12*ulsch->harq_processes[harq_pid]->nb_rb;
@@ -10073,7 +10320,7 @@ int generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB *eNB,
}
}
*/
double sinr_eff_cqi_calc(PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe)
{
openair1/PHY/LTE_TRANSPORT/defs.h
+21 -12
View File
@@ -398,14 +398,10 @@ typedef struct {
uint8_t subframe;
/// Frame for reception
uint32_t frame;
/// Subframe cba scheduling indicator (i.e. CBA Transmission opportunity indicator)
uint8_t subframe_cba_scheduling_flag;
/// PHICH active flag
uint8_t phich_active;
/// PHICH ACK
uint8_t phich_ACK;
/// Last TPC command
uint8_t TPC;
/// First Allocated RB
uint16_t first_rb;
/// First Allocated RB - previous scheduling
@@ -413,7 +409,9 @@ typedef struct {
/// is done after a new scheduling
uint16_t previous_first_rb;
/// Current Number of RBs
uint16_t nb_rb;
uint16_t nb_rb;
/// Current Modulation order
uint8_t Qm;
/// Transport block size
uint32_t TBS;
/// The payload + CRC size in bits
@@ -468,8 +466,6 @@ typedef struct {
uint8_t srs_active;
/// Index of current HARQ round for this ULSCH
uint8_t round;
/// MCS format for this ULSCH
uint8_t mcs;
/// Redundancy-version of the current sub-frame
uint8_t rvidx;
/// soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
@@ -513,6 +509,9 @@ typedef enum {
pucch_format1=0,
pucch_format1a,
pucch_format1b,
pucch_format1b_csA2,
pucch_format1b_csA3,
pucch_format1b_csA4,
pucch_format2,
pucch_format2a,
pucch_format2b,
@@ -547,14 +546,24 @@ typedef struct {
uint16_t rnti;
/// Type (SR,HARQ,CQI,HARQ_SR,HARQ_CQI,SR_CQI,HARQ_SR_CQI)
UCI_type_t type;
/// SRS active flag
uint8_t srs_active;
/// PUCCH format to use
PUCCH_FMT_t pucch_fmt;
/// antenna indicator
/// number of PUCCH antenna ports
uint8_t num_antenna_ports;
/// number of PUCCH resources
uint8_t num_pucch_resources;
/// two antenna n1_pucch
uint16_t n_pucch_1[2];
/// two antenna n2_pucch
/// two antenna n1_pucch 1_0
uint16_t n_pucch_1[4][2];
/// two antenna n1_pucch 1_0 for SR
uint16_t n_pucch_1_0_sr[2];
/// two antenna n2_pucch
uint16_t n_pucch_2[2];
/// two antenna n3_pucch
uint16_t n_pucch_3[2];
/// TDD Bundling/multiplexing flag
uint8_t tdd_bundling;
#ifdef Rel14
/// non BL/CE, CEmodeA, CEmodeB
UE_type_t ue_type;
@@ -573,7 +582,7 @@ typedef struct {
// Indicates if the resource blocks allocated for this grant overlap with the SRS configuration.
uint8_t Nsrs;
#endif
} LTE_eNB_UCI_t;
} LTE_eNB_UCI;
typedef struct {
/// HARQ process mask, indicates which processes are currently active
openair1/PHY/LTE_TRANSPORT/dlsch_demodulation.c
+5 -5
View File
@@ -353,10 +353,10 @@ int rx_pdsch(PHY_VARS_UE *ue,
}
#ifdef DEBUG_PHY
//#ifdef DEBUG_PHY
LOG_D(PHY,"[DLSCH] nb_rb %d log2_maxh = %d (%d,%d)\n",nb_rb,pdsch_vars[eNB_id]->log2_maxh,avg[0],avgs);
LOG_D(PHY,"[DLSCH] mimo_mode = %d\n", dlsch0_harq->mimo_mode);
#endif
//#endif
aatx = frame_parms->nb_antenna_ports_eNB;
aarx = frame_parms->nb_antennas_rx;
@@ -3327,9 +3327,9 @@ void dlsch_scale_channel(int **dl_ch_estimates_ext,
// Determine scaling amplitude based the symbol
ch_amp = ((pilots) ? (dlsch_ue[0]->sqrt_rho_b) : (dlsch_ue[0]->sqrt_rho_a));
LOG_D(PHY,"Scaling PDSCH Chest in OFDM symbol %d by %d, pilots %d nb_rb %d NCP %d symbol %d\n",symbol_mod,ch_amp,pilots,nb_rb,frame_parms->Ncp,symbol);
ch_amp = ((pilots) ? (dlsch_ue[0]->sqrt_rho_b) : (dlsch_ue[0]->sqrt_rho_a));
LOG_D(PHY,"Scaling PDSCH Chest in OFDM symbol %d by %d, pilots %d nb_rb %d NCP %d symbol %d\n",symbol_mod,ch_amp,pilots,nb_rb,frame_parms->Ncp,symbol);
// printf("Scaling PDSCH Chest in OFDM symbol %d by %d\n",symbol_mod,ch_amp);
ch_amp128 = _mm_set1_epi16(ch_amp); // Q3.13
openair1/PHY/LTE_TRANSPORT/dlsch_scrambling.c
+2 -2
View File
@@ -124,7 +124,7 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
}
#ifdef DEBUG_SCRAMBLING
printf("scrambling: rnti %x, q %d, Ns %d, Nid_cell %d, length %d\n",dlsch->rnti,q,Ns,frame_parms->Nid_cell, G);
printf("scrambling: i0 %d rnti %x, q %d, Ns %d, Nid_cell %d, G %d x2 %x\n",dlsch->i0,dlsch->rnti,q,Ns,frame_parms->Nid_cell, G, x2);
#endif
s = lte_gold_scram(&x1, &x2, 1);
@@ -206,7 +206,7 @@ void dlsch_unscrambling(LTE_DL_FRAME_PARMS *frame_parms,
x2 = ((Ns>>1)<<9) + frame_parms->Nid_cell_mbsfn; //this is c_init in 36.211 Sec 6.3.1
#ifdef DEBUG_SCRAMBLING
printf("unscrambling: rnti %x, q %d, Ns %d, Nid_cell %d length %d\n",dlsch->rnti,q,Ns,frame_parms->Nid_cell,G);
printf("unscrambling: rnti %x, q %d, Ns %d, Nid_cell %d G %d, x2 %x\n",dlsch->rnti,q,Ns,frame_parms->Nid_cell,G,x2);
#endif
s = lte_gold_scram(&x1, &x2, 1);
openair1/PHY/LTE_TRANSPORT/if4_tools.c
+8 -7
View File
@@ -200,14 +200,14 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
if (packet_type > IF4p5_PRACH)
rxF = &prach_rxsigF_br[packet_type - IF4p5_PRACH - 1][0][0];
else
#else
#endif
rxF = &prach_rxsigF[0][0];
#endif
AssertFatal(rxF!=NULL,"rxF is null\n");
if (eth->flags == ETH_RAW_IF4p5_MODE) {
memcpy((void *)(tx_buffer_prach + MAC_HEADER_SIZE_BYTES + sizeof_IF4p5_header_t),
(void*)rxF,
PRACH_BLOCK_SIZE_BYTES);
memcpy((void *)(tx_buffer_prach + MAC_HEADER_SIZE_BYTES + sizeof_IF4p5_header_t),
(void*)rxF,
PRACH_BLOCK_SIZE_BYTES);
} else {
memcpy((void *)(tx_buffer_prach + sizeof_IF4p5_header_t),
(void *)rxF,
@@ -335,13 +335,14 @@ void recv_IF4p5(RU_t *ru, int *frame, int *subframe, uint16_t *packet_type, uint
if (*packet_type > IF4p5_PRACH)
rxF = &prach_rxsigF_br[*packet_type - IF4p5_PRACH - 1][0][0];
else
#else
rxF = &prach_rxsigF[0][0];
#endif
rxF = &prach_rxsigF[0][0];
// FIX: hard coded prach samples length
db_fulllength = PRACH_NUM_SAMPLES;
AssertFatal(rxF!=NULL,"rxF is null\n");
if (eth->flags == ETH_RAW_IF4p5_MODE) {
memcpy(rxF,
(int16_t*) (rx_buffer+MAC_HEADER_SIZE_BYTES+sizeof_IF4p5_header_t),
openair1/PHY/LTE_TRANSPORT/phich.c
+43 -99
View File
@@ -1474,8 +1474,9 @@ void rx_phich(PHY_VARS_UE *ue,
//ulsch->harq_processes[8] = ulsch->harq_processes[harq_pid];
ulsch->harq_processes[harq_pid]->status = SCH_IDLE;
ulsch->harq_processes[harq_pid]->round = 0;
ulsch->harq_processes[harq_pid]->status = SCH_IDLE;
ulsch->harq_processes[harq_pid]->round = 0;
ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 0;
// inform MAC?
ue->ulsch_Msg3_active[eNB_id] = 0;
@@ -1490,21 +1491,20 @@ void rx_phich(PHY_VARS_UE *ue,
void generate_phich_top(PHY_VARS_eNB *eNB,
eNB_rxtx_proc_t *proc,
int16_t amp,
uint8_t sect_id)
int16_t amp)
{
LTE_DL_FRAME_PARMS *frame_parms=&eNB->frame_parms;
LTE_eNB_ULSCH_t **ulsch = eNB->ulsch;
int32_t **txdataF = eNB->common_vars.txdataF;
uint8_t harq_pid;
uint8_t Ngroup_PHICH,ngroup_PHICH,nseq_PHICH;
uint8_t NSF_PHICH = 4;
uint8_t pusch_subframe;
uint8_t UE_id;
uint8_t i;
uint32_t pusch_frame;
int subframe = proc->subframe_tx;
phich_config_t *phich;
// compute Ngroup_PHICH (see formula at beginning of Section 6.9 in 36-211
@@ -1520,98 +1520,42 @@ void generate_phich_top(PHY_VARS_eNB *eNB,
pusch_subframe = phich_subframe2_pusch_subframe(frame_parms,subframe);
harq_pid = subframe2harq_pid(frame_parms,pusch_frame,pusch_subframe);
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
if ((ulsch[UE_id])&&(ulsch[UE_id]->rnti>0)) {
if (ulsch[UE_id]->harq_processes[harq_pid]->phich_active == 1) {
for (i=0; i<eNB->phich_vars[subframe&1].num_hi; i++) {
LOG_I(PHY,"[eNB][PUSCH %d/%x] Frame %d subframe %d (pusch_subframe %d,pusch_frame %d) phich active %d\n",
harq_pid,ulsch[UE_id]->rnti,proc->frame_tx,subframe,pusch_subframe,pusch_frame,ulsch[UE_id]->harq_processes[harq_pid]->phich_active);
/* the HARQ process may have been reused by a new scheduling, so we use
* previous values of first_rb and n_DMRS to compute ngroup_PHICH and nseq_PHICH
*/
ngroup_PHICH = (ulsch[UE_id]->harq_processes[harq_pid]->previous_first_rb +
ulsch[UE_id]->harq_processes[harq_pid]->previous_n_DMRS)%Ngroup_PHICH;
if ((frame_parms->tdd_config == 0) && (frame_parms->frame_type == TDD) ) {
if ((pusch_subframe == 4) || (pusch_subframe == 9))
ngroup_PHICH += Ngroup_PHICH;
}
nseq_PHICH = ((ulsch[UE_id]->harq_processes[harq_pid]->previous_first_rb/Ngroup_PHICH) +
ulsch[UE_id]->harq_processes[harq_pid]->previous_n_DMRS)%(2*NSF_PHICH);
LOG_I(PHY,"[eNB %d][PUSCH %d] Frame %d subframe %d Generating PHICH, ngroup_PHICH %d/%d, nseq_PHICH %d : HI %d, first_rb %d dci_alloc %d)\n",
eNB->Mod_id,harq_pid,proc->frame_tx,
subframe,ngroup_PHICH,Ngroup_PHICH,nseq_PHICH,
ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK,
ulsch[UE_id]->harq_processes[harq_pid]->previous_first_rb,
ulsch[UE_id]->harq_processes[harq_pid]->dci_alloc);
T(T_ENB_PHY_PHICH, T_INT(eNB->Mod_id), T_INT(proc->frame_tx), T_INT(subframe),
T_INT(UE_id), T_INT(ulsch[UE_id]->rnti), T_INT(harq_pid),
T_INT(Ngroup_PHICH), T_INT(NSF_PHICH),
T_INT(ngroup_PHICH), T_INT(nseq_PHICH),
T_INT(ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK),
T_INT(ulsch[UE_id]->harq_processes[harq_pid]->previous_first_rb),
T_INT(ulsch[UE_id]->harq_processes[harq_pid]->previous_n_DMRS));
if (ulsch[UE_id]->Msg3_active == 1) {
LOG_I(PHY,"[eNB %d][PUSCH %d][RAPROC] Frame %d, subframe %d: Generating Msg3 PHICH for UE %d, ngroup_PHICH %d/%d, nseq_PHICH %d : HI %d, first_rb %d\n",
eNB->Mod_id,harq_pid,proc->frame_tx,subframe,
UE_id,ngroup_PHICH,Ngroup_PHICH,nseq_PHICH,ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK,
ulsch[UE_id]->harq_processes[harq_pid]->previous_first_rb);
}
if (eNB->abstraction_flag == 0) {
generate_phich(frame_parms,
amp,//amp*2,
nseq_PHICH,
ngroup_PHICH,
ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK,
subframe,
txdataF);
} else {
/*
generate_phich_emul(frame_parms,
//nseq_PHICH,
//ngroup_PHICH,
ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK,
subframe);
*/
}
// if no format0 DCI was transmitted by MAC, prepare the
// MCS parameters for the retransmission
if ((ulsch[UE_id]->harq_processes[harq_pid]->dci_alloc == 0) &&
(ulsch[UE_id]->harq_processes[harq_pid]->rar_alloc == 0) ) {
if (ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK==0 ) {
T(T_ENB_PHY_ULSCH_UE_NO_DCI_RETRANSMISSION, T_INT(eNB->Mod_id), T_INT(proc->frame_tx),
T_INT(subframe), T_INT(UE_id), T_INT(ulsch[UE_id]->rnti), T_INT(harq_pid));
LOG_I(PHY,"[eNB %d][PUSCH %d] frame %d, subframe %d : PHICH NACK / (no format0 DCI) Setting subframe_scheduling_flag\n",
eNB->Mod_id,harq_pid,proc->frame_tx,subframe);
// ulsch[UE_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
ulsch[UE_id]->harq_processes[harq_pid]->subframe = (subframe + 4)%10;
if (subframe>5) ulsch[UE_id]->harq_processes[harq_pid]->frame++;
ulsch[UE_id]->harq_processes[harq_pid]->rvidx = rv_table[ulsch[UE_id]->harq_processes[harq_pid]->round&3];
ulsch[UE_id]->harq_processes[harq_pid]->O_RI = 0;
ulsch[UE_id]->harq_processes[harq_pid]->Or2 = 0;
ulsch[UE_id]->harq_processes[harq_pid]->Or1 = 0;
ulsch[UE_id]->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_nopmi;
} else {
LOG_I(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d PHICH ACK (no format0 DCI) Clearing subframe_scheduling_flag, setting round to 0\n",
eNB->Mod_id,harq_pid,proc->frame_tx,subframe);
ulsch[UE_id]->harq_processes[harq_pid]->status = SCH_IDLE;
ulsch[UE_id]->harq_processes[harq_pid]->round=0;
}
}
ulsch[UE_id]->harq_processes[harq_pid]->phich_active=0;
} // phich_active==1
} //ulsch_ue[UE_id] is non-null
}// UE loop
phich = &eNB->phich_vars[subframe&1].config[i];
ngroup_PHICH = (phich->first_rb +
phich->n_DMRS)%Ngroup_PHICH;
if ((frame_parms->tdd_config == 0) && (frame_parms->frame_type == TDD) ) {
if ((pusch_subframe == 4) || (pusch_subframe == 9))
ngroup_PHICH += Ngroup_PHICH;
}
nseq_PHICH = ((phich->first_rb/Ngroup_PHICH) +
phich->n_DMRS)%(2*NSF_PHICH);
LOG_I(PHY,"[eNB %d][PUSCH %d] Frame %d subframe %d Generating PHICH, AMP %d ngroup_PHICH %d/%d, nseq_PHICH %d : HI %d, first_rb %d)\n",
eNB->Mod_id,harq_pid,proc->frame_tx,
subframe,amp,ngroup_PHICH,Ngroup_PHICH,nseq_PHICH,
phich->hi,
phich->first_rb);
T(T_ENB_PHY_PHICH, T_INT(eNB->Mod_id), T_INT(proc->frame_tx), T_INT(subframe),
T_INT(i), T_INT(0), T_INT(harq_pid),
T_INT(Ngroup_PHICH), T_INT(NSF_PHICH),
T_INT(ngroup_PHICH), T_INT(nseq_PHICH),
T_INT(phich->hi),
T_INT(phich->first_rb),
T_INT(phich->n_DMRS));
generate_phich(frame_parms,
amp,//amp*2,
nseq_PHICH,
ngroup_PHICH,
phich->hi,
subframe,
txdataF);
}// for (i=0; i<eNB->phich_vars[subframe&1].num_hi; i++) {
eNB->phich_vars[subframe&1].num_hi=0;
}
openair1/PHY/LTE_TRANSPORT/proto.h
+6 -6
View File
@@ -1661,11 +1661,12 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,
DCI_ALLOC_t *dci_alloc,
nfapi_dl_config_dci_dl_pdu *pdu);
int fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *dci_alloc,nfapi_dl_config_mpdcch_pdu *pdu);
int fill_dci_and_ulsch(PHY_VARS_eNB *eNB,
eNB_rxtx_proc_t *proc,
DCI_ALLOC_t *dci_alloc,
nfapi_hi_dci0_dci_pdu *pdu);
void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
nfapi_hi_dci0_dci_pdu *pdu);
void fill_ulsch(PHY_VARS_eNB *eNB,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame,int subframe);
int32_t generate_eNB_dlsch_params_from_dci(int frame,
uint8_t subframe,
@@ -1862,8 +1863,7 @@ uint32_t ulsch_decoding_emul(PHY_VARS_eNB *phy_vars_eNB,
void generate_phich_top(PHY_VARS_eNB *phy_vars_eNB,
eNB_rxtx_proc_t *proc,
int16_t amp,
uint8_t sect_id);
int16_t amp);
/* \brief This routine demodulates the PHICH and updates PUSCH/ULSCH parameters.
@param phy_vars_ue Pointer to UE variables
openair1/PHY/LTE_TRANSPORT/pucch.c
+4 -22
View File
@@ -1857,25 +1857,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
}
first_call=0;
}
/*
switch (frame_parms->N_RB_UL) {
case 6:
sigma2_dB -= 8;
break;
case 25:
sigma2_dB -= 14;
break;
case 50:
sigma2_dB -= 17;
break;
case 100:
sigma2_dB -= 20;
break;
default:
sigma2_dB -= 14;
}
*/
if(fmt!=pucch_format3) { /* PUCCH format3 */
@@ -2241,8 +2223,8 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
stat_re += ((rxcomp[aa][off]*(int32_t)cfo[l2<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l2<<1)])>>15);
stat_im += ((rxcomp[aa][off]*(int32_t)cfo[1+(l2<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l2<<1)])>>15);
} else { //reference_symbols
stat_ref_re += ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
stat_ref_im += ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
stat_ref_re += ((rxcomp[aa][off]*(int32_t)cfo[l2<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l2<<1)])>>15);
stat_ref_im += ((rxcomp[aa][off]*(int32_t)cfo[1+(l2<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l2<<1)])>>15);
}
off+=2;
@@ -2420,13 +2402,13 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
if (fmt==pucch_format1b)
*(1+payload) = (stat_im<0) ? 1 : 0;
} else { // insufficient energy on PUCCH so NAK
*payload = 0;
*payload = 4; // DTX
((int16_t*)&eNB->pucch1ab_stats[UE_id][(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe])])[0] = (int16_t)(stat_re);
((int16_t*)&eNB->pucch1ab_stats[UE_id][(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe])])[1] = (int16_t)(stat_im);
eNB->pucch1ab_stats_cnt[UE_id][subframe] = (eNB->pucch1ab_stats_cnt[UE_id][subframe]+1)&1023;
if (fmt==pucch_format1b)
*(1+payload) = 0;
*(1+payload) = 6;
}
} else {
LOG_E(PHY,"[eNB] PUCCH fmt2/2a/2b not supported\n");
openair1/PHY/LTE_TRANSPORT/rar_tools.c
+10 -13
View File
@@ -116,7 +116,7 @@ int generate_eNB_ulsch_params_from_rar(PHY_VARS_eNB *eNB,
break;
}
ulsch_harq->TPC = (rar[3]>>2)&7;//rar->TPC;
rballoc = (((uint16_t)(rar[1]&7))<<7)|(rar[2]>>1);
if (rballoc>RIV_max) {
@@ -150,19 +150,19 @@ int generate_eNB_ulsch_params_from_rar(PHY_VARS_eNB *eNB,
ulsch->rnti = rnti;
ulsch->harq_mask = 1<<harq_pid;
if (ulsch_harq->round == 0) {
// if (ulsch_harq->round == 0) {
ulsch_harq->status = ACTIVE;
ulsch_harq->rvidx = 0;
ulsch_harq->mcs = ((rar[2]&1)<<3)|(rar[3]>>5);
//ulsch_harq->TBS = dlsch_tbs25[ulsch_harq->mcs][ulsch_harq->nb_rb-1];
ulsch_harq->TBS = TBStable[get_I_TBS_UL(ulsch_harq->mcs)][ulsch_harq->nb_rb-1];
uint8_t mcs = ((rar[2]&1)<<3)|(rar[3]>>5);
ulsch_harq->TBS = TBStable[get_I_TBS_UL(mcs)][ulsch_harq->nb_rb-1];
ulsch_harq->Qm = get_Qm_ul(mcs);
ulsch_harq->Msc_initial = 12*ulsch_harq->nb_rb;
ulsch_harq->Nsymb_initial = 9;
ulsch_harq->round = 0;
} else {
/* } else {
ulsch_harq->rvidx = 0;
ulsch_harq->round++;
}
}*/
ulsch->Msg3_active = 1;
@@ -173,6 +173,7 @@ int generate_eNB_ulsch_params_from_rar(PHY_VARS_eNB *eNB,
&ulsch_harq->frame,
&ulsch_harq->subframe);
LOG_I(PHY,"Programming msg3 reception in (%d,%d)\n",ulsch_harq->frame,ulsch_harq->subframe);
use_srs = is_srs_occasion_common(frame_parms,ulsch_harq->frame,ulsch_harq->subframe);
ulsch_harq->Nsymb_pusch = 12-(frame_parms->Ncp<<1)-(use_srs==0?0:1);
ulsch_harq->srs_active = use_srs;
@@ -264,15 +265,11 @@ int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *ue,
ulsch->harq_processes[harq_pid]->first_rb = RIV2first_rb_LUT[rballoc];
ulsch->harq_processes[harq_pid]->nb_rb = RIV2nb_rb_LUT[rballoc];
if (ulsch->harq_processes[harq_pid]->nb_rb ==0)
return(-1);
AssertFatal(ulsch->harq_processes[harq_pid]->nb_rb >0, "nb_rb == 0\n");
ulsch->power_offset = ue_power_offsets[ulsch->harq_processes[harq_pid]->nb_rb];
if (ulsch->harq_processes[harq_pid]->nb_rb > 4) {
LOG_D(PHY,"rar_tools.c: unlikely rb count for RAR grant : nb_rb > 3\n");
return(-1);
}
AssertFatal(ulsch->harq_processes[harq_pid]->nb_rb > 6,"unlikely rb count for RAR grant : nb_rb > 6\n");
// ulsch->harq_processes[harq_pid]->Ndi = 1;
if (ulsch->harq_processes[harq_pid]->round == 0)
openair1/PHY/LTE_TRANSPORT/uci_tools.c
-55
View File
@@ -232,18 +232,6 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_
stats->DL_pmi_dual = ((HLC_subband_cqi_rank2_2A_1_5MHz *)o)->pmi;
break;
case HLC_subband_cqi_mcs_CBA:
if ((*crnti == ((HLC_subband_cqi_mcs_CBA_1_5MHz *)o)->crnti) && (*crnti !=0)) {
*access_mode=CBA_ACCESS;
LOG_N(PHY,"[eNB] UCI for CBA : mcs %d crnti %x\n",
((HLC_subband_cqi_mcs_CBA_1_5MHz *)o)->mcs, ((HLC_subband_cqi_mcs_CBA_1_5MHz *)o)->crnti);
} else {
LOG_D(PHY,"[eNB] UCI for CBA : rnti (enb context %x, rx uci %x) invalid, unknown access\n",
*crnti, ((HLC_subband_cqi_mcs_CBA_1_5MHz *)o)->crnti);
}
break;
case unknown_cqi:
default:
LOG_N(PHY,"[eNB][UCI] received unknown uci (rb %d)\n",N_RB_DL);
@@ -318,18 +306,6 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_
stats->DL_pmi_dual = ((HLC_subband_cqi_rank2_2A_5MHz *)o)->pmi;
break;
case HLC_subband_cqi_mcs_CBA:
if ((*crnti == ((HLC_subband_cqi_mcs_CBA_5MHz *)o)->crnti) && (*crnti !=0)) {
*access_mode=CBA_ACCESS;
LOG_N(PHY,"[eNB] UCI for CBA : mcs %d crnti %x\n",
((HLC_subband_cqi_mcs_CBA_5MHz *)o)->mcs, ((HLC_subband_cqi_mcs_CBA_5MHz *)o)->crnti);
} else {
LOG_D(PHY,"[eNB] UCI for CBA : rnti (enb context %x, rx uci %x) invalid, unknown access\n",
*crnti, ((HLC_subband_cqi_mcs_CBA_5MHz *)o)->crnti);
}
break;
case unknown_cqi:
default:
LOG_N(PHY,"[eNB][UCI] received unknown uci (rb %d)\n",N_RB_DL);
@@ -398,18 +374,6 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_
stats->DL_pmi_dual = ((HLC_subband_cqi_rank2_2A_10MHz *)o)->pmi;
break;
case HLC_subband_cqi_mcs_CBA:
if ((*crnti == ((HLC_subband_cqi_mcs_CBA_10MHz *)o)->crnti) && (*crnti !=0)) {
*access_mode=CBA_ACCESS;
LOG_N(PHY,"[eNB] UCI for CBA : mcs %d crnti %x\n",
((HLC_subband_cqi_mcs_CBA_10MHz *)o)->mcs, ((HLC_subband_cqi_mcs_CBA_10MHz *)o)->crnti);
} else {
LOG_D(PHY,"[eNB] UCI for CBA : rnti (enb context %x, rx uci %x) invalid, unknown access\n",
*crnti, ((HLC_subband_cqi_mcs_CBA_10MHz *)o)->crnti);
}
break;
case unknown_cqi:
default:
LOG_N(PHY,"[eNB][UCI] received unknown uci (RB %d)\n",N_RB_DL);
@@ -478,18 +442,6 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_
stats->DL_pmi_dual = ((HLC_subband_cqi_rank2_2A_20MHz *)o)->pmi;
break;
case HLC_subband_cqi_mcs_CBA:
if ((*crnti == ((HLC_subband_cqi_mcs_CBA_20MHz *)o)->crnti) && (*crnti !=0)) {
*access_mode=CBA_ACCESS;
LOG_N(PHY,"[eNB] UCI for CBA : mcs %d crnti %x\n",
((HLC_subband_cqi_mcs_CBA_20MHz *)o)->mcs, ((HLC_subband_cqi_mcs_CBA_20MHz *)o)->crnti);
} else {
LOG_D(PHY,"[eNB] UCI for CBA : rnti (enb context %x, rx uci %x) invalid, unknown access\n",
*crnti, ((HLC_subband_cqi_mcs_CBA_20MHz *)o)->crnti);
}
break;
case unknown_cqi:
default:
LOG_N(PHY,"[eNB][UCI] received unknown uci (RB %d)\n",N_RB_DL);
@@ -750,13 +702,6 @@ void print_CQI(void *o,UCI_format_t uci_format,unsigned char eNB_id,int N_RB_DL)
break;
}
#endif //DEBUG_UCI
break;
case HLC_subband_cqi_mcs_CBA:
#ifdef DEBUG_UCI
LOG_I(PHY,"[PRINT CQI] hlc_cqi_mcs_CBA : eNB %d, mcs %d\n",eNB_id,((HLC_subband_cqi_mcs_CBA_5MHz *)o)->mcs);
LOG_I(PHY,"[PRINT CQI] hlc_cqi_mcs_CBA : eNB %d, rnti %x\n",eNB_id,((HLC_subband_cqi_mcs_CBA_5MHz *)o)->crnti);
#endif //DEBUG_UCI
break;
openair1/PHY/LTE_TRANSPORT/ulsch_decoding.c
+9 -46
View File
@@ -224,7 +224,7 @@ int ulsch_decoding_data_2thread0(td_params* tdp) {
int16_t dummy_w[MAX_NUM_ULSCH_SEGMENTS][3*(6144+64)];
LTE_eNB_ULSCH_t *ulsch = eNB->ulsch[UE_id];
LTE_UL_eNB_HARQ_t *ulsch_harq = ulsch->harq_processes[harq_pid];
int Q_m = get_Qm_ul(ulsch_harq->mcs);
int Q_m = ulsch_harq->Qm;
int G = ulsch_harq->G;
uint32_t E;
uint32_t Gp,GpmodC,Nl=1;
@@ -352,7 +352,7 @@ int ulsch_decoding_data_2thread0(td_params* tdp) {
1,
ulsch_harq->rvidx,
(ulsch_harq->round==0)?1:0, // clear
get_Qm_ul(ulsch_harq->mcs),
ulsch_harq->Qm,
1,
r,
&E)==-1) {
@@ -447,7 +447,7 @@ int ulsch_decoding_data_2thread(PHY_VARS_eNB *eNB,int UE_id,int harq_pid,int llr
int16_t dummy_w[MAX_NUM_ULSCH_SEGMENTS][3*(6144+64)];
LTE_eNB_ULSCH_t *ulsch = eNB->ulsch[UE_id];
LTE_UL_eNB_HARQ_t *ulsch_harq = ulsch->harq_processes[harq_pid];
//int Q_m = get_Qm_ul(ulsch_harq->mcs);
int G = ulsch_harq->G;
unsigned int E;
int Cby2;
@@ -571,7 +571,7 @@ int ulsch_decoding_data_2thread(PHY_VARS_eNB *eNB,int UE_id,int harq_pid,int llr
1,
ulsch_harq->rvidx,
(ulsch_harq->round==0)?1:0, // clear
get_Qm_ul(ulsch_harq->mcs),
ulsch_harq->Qm,
1,
r,
&E)==-1) {
@@ -655,7 +655,7 @@ int ulsch_decoding_data(PHY_VARS_eNB *eNB,int UE_id,int harq_pid,int llr8_flag)
int16_t dummy_w[MAX_NUM_ULSCH_SEGMENTS][3*(6144+64)];
LTE_eNB_ULSCH_t *ulsch = eNB->ulsch[UE_id];
LTE_UL_eNB_HARQ_t *ulsch_harq = ulsch->harq_processes[harq_pid];
//int Q_m = get_Qm_ul(ulsch_harq->mcs);
int G = ulsch_harq->G;
unsigned int E;
@@ -736,7 +736,7 @@ int ulsch_decoding_data(PHY_VARS_eNB *eNB,int UE_id,int harq_pid,int llr8_flag)
1,
ulsch_harq->rvidx,
(ulsch_harq->round==0)?1:0, // clear
get_Qm_ul(ulsch_harq->mcs),
ulsch_harq->Qm,
1,
r,
&E)==-1) {
@@ -907,16 +907,15 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
A = ulsch_harq->TBS;
Q_m = get_Qm_ul(ulsch_harq->mcs);
Q_m = ulsch_harq->Qm;
G = nb_rb * (12 * Q_m) * ulsch_harq->Nsymb_pusch;
#ifdef DEBUG_ULSCH_DECODING
printf("ulsch_decoding (Nid_cell %d, rnti %x, x2 %x): round %d, RV %d, mcs %d, O_RI %d, O_ACK %d, G %d, subframe %d\n",
printf("ulsch_decoding (Nid_cell %d, rnti %x, x2 %x): round %d, RV %d, O_RI %d, O_ACK %d, G %d, subframe %d\n",
frame_parms->Nid_cell,ulsch->rnti,x2,
ulsch_harq->round,
ulsch_harq->rvidx,
ulsch_harq->mcs,
ulsch_harq->O_RI,
ulsch_harq->O_ACK,
G,
@@ -952,12 +951,11 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
}
AssertFatal(sumKr>0,
"[eNB %d] ulsch_decoding.c: FATAL sumKr is 0! (Nid_cell %d, rnti %x, x2 %x): harq_pid %d round %d, RV %d, mcs %d, O_RI %d, O_ACK %d, G %d, subframe %d\n",
"[eNB %d] ulsch_decoding.c: FATAL sumKr is 0! (Nid_cell %d, rnti %x, x2 %x): harq_pid %d round %d, RV %d, O_RI %d, O_ACK %d, G %d, subframe %d\n",
frame_parms->Nid_cell,ulsch->rnti,x2,
harq_pid,
ulsch_harq->round,
ulsch_harq->rvidx,
ulsch_harq->mcs,
ulsch_harq->O_RI,
ulsch_harq->O_ACK,
G,
@@ -2015,41 +2013,6 @@ uint32_t ulsch_decoding_emul(PHY_VARS_eNB *eNB, eNB_rxtx_proc_t *proc,
} else
*crnti = 0x0;
// Do abstraction here to determine if packet it in error
/* if (ulsch_abstraction_MIESM(eNB->sinr_dB_eNB,1, eNB->ulsch[UE_id]->harq_processes[harq_pid]->mcs,eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb, eNB->ulsch[UE_id]->harq_processes[harq_pid]->first_rb) == 1)
flag = 1;
else flag = 0;*/
/*
//SINRdbPost = eNB->sinr_dB_eNB;
mcsPost = eNB->ulsch[UE_id]->harq_processes[harq_pid]->mcs,
nrbPost = eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb;
frbPost = eNB->ulsch[UE_id]->harq_processes[harq_pid]->first_rb;
if(nrbPost > 0)
{
SINRdbPost = eNB->sinr_dB_eNB;
ULflag1 = 1;
}
else
{
SINRdbPost = NULL ;
ULflag1 = 0 ;
}*/
//
// write_output("postprocSINR.m","SINReNB",eNB->sinr_dB,301,1,7);
//Yazdir buraya her frame icin 300 eNb
// fprintf(SINRrx,"%e,%e,%e,%e;\n",SINRdbPost);
//fprintf(SINRrx,"%e\n",SINRdbPost);
// fprintf(csv_fd,"%e+i*(%e),",channelx,channely);
// if (ulsch_abstraction(eNB->sinr_dB,1, eNB->ulsch[UE_id]->harq_processes[harq_pid]->mcs,eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb, eNB->ulsch[UE_id]->harq_processes[harq_pid]->first_rb) == 1) {
if (1) {
LOG_D(PHY,"ulsch_decoding_emul abstraction successful\n");
openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c
+9 -372
View File
@@ -1025,381 +1025,16 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext,
#if defined(__x86_64__) || defined(__i386__)
__m128i QAM_amp128U_0,QAM_amp128bU_0,QAM_amp128U_1,QAM_amp128bU_1;
#endif
void ulsch_channel_compensation_alamouti(int32_t **rxdataF_ext, // For Distributed Alamouti Combining
int32_t **ul_ch_estimates_ext_0,
int32_t **ul_ch_estimates_ext_1,
int32_t **ul_ch_mag_0,
int32_t **ul_ch_magb_0,
int32_t **ul_ch_mag_1,
int32_t **ul_ch_magb_1,
int32_t **rxdataF_comp_0,
int32_t **rxdataF_comp_1,
LTE_DL_FRAME_PARMS *frame_parms,
uint8_t symbol,
uint8_t Qm,
uint16_t nb_rb,
uint8_t output_shift)
{
#if defined(__x86_64__) || defined(__i386__)
uint16_t rb;
__m128i *ul_ch128_0,*ul_ch128_1,*ul_ch_mag128_0,*ul_ch_mag128_1,*ul_ch_mag128b_0,*ul_ch_mag128b_1,*rxdataF128,*rxdataF_comp128_0,*rxdataF_comp128_1;
uint8_t aarx;//,symbol_mod;
__m128i mmtmpU0,mmtmpU1,mmtmpU2,mmtmpU3;
// symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
// printf("comp: symbol %d\n",symbol);
if (Qm == 4) {
QAM_amp128U_0 = _mm_set1_epi16(QAM16_n1);
QAM_amp128U_1 = _mm_set1_epi16(QAM16_n1);
} else if (Qm == 6) {
QAM_amp128U_0 = _mm_set1_epi16(QAM64_n1);
QAM_amp128bU_0 = _mm_set1_epi16(QAM64_n2);
QAM_amp128U_1 = _mm_set1_epi16(QAM64_n1);
QAM_amp128bU_1 = _mm_set1_epi16(QAM64_n2);
}
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
ul_ch128_0 = (__m128i *)&ul_ch_estimates_ext_0[aarx][symbol*frame_parms->N_RB_DL*12];
ul_ch_mag128_0 = (__m128i *)&ul_ch_mag_0[aarx][symbol*frame_parms->N_RB_DL*12];
ul_ch_mag128b_0 = (__m128i *)&ul_ch_magb_0[aarx][symbol*frame_parms->N_RB_DL*12];
ul_ch128_1 = (__m128i *)&ul_ch_estimates_ext_1[aarx][symbol*frame_parms->N_RB_DL*12];
ul_ch_mag128_1 = (__m128i *)&ul_ch_mag_1[aarx][symbol*frame_parms->N_RB_DL*12];
ul_ch_mag128b_1 = (__m128i *)&ul_ch_magb_1[aarx][symbol*frame_parms->N_RB_DL*12];
rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol*frame_parms->N_RB_DL*12];
rxdataF_comp128_0 = (__m128i *)&rxdataF_comp_0[aarx][symbol*frame_parms->N_RB_DL*12];
rxdataF_comp128_1 = (__m128i *)&rxdataF_comp_1[aarx][symbol*frame_parms->N_RB_DL*12];
for (rb=0; rb<nb_rb; rb++) {
// printf("comp: symbol %d rb %d\n",symbol,rb);
if (Qm>2) {
// get channel amplitude if not QPSK
mmtmpU0 = _mm_madd_epi16(ul_ch128_0[0],ul_ch128_0[0]);
mmtmpU0 = _mm_srai_epi32(mmtmpU0,output_shift);
mmtmpU1 = _mm_madd_epi16(ul_ch128_0[1],ul_ch128_0[1]);
mmtmpU1 = _mm_srai_epi32(mmtmpU1,output_shift);
mmtmpU0 = _mm_packs_epi32(mmtmpU0,mmtmpU1);
ul_ch_mag128_0[0] = _mm_unpacklo_epi16(mmtmpU0,mmtmpU0);
ul_ch_mag128b_0[0] = ul_ch_mag128_0[0];
ul_ch_mag128_0[0] = _mm_mulhi_epi16(ul_ch_mag128_0[0],QAM_amp128U_0);
ul_ch_mag128_0[0] = _mm_slli_epi16(ul_ch_mag128_0[0],2); // 2 to compensate the scale channel estimate
ul_ch_mag128_0[1] = _mm_unpackhi_epi16(mmtmpU0,mmtmpU0);
ul_ch_mag128b_0[1] = ul_ch_mag128_0[1];
ul_ch_mag128_0[1] = _mm_mulhi_epi16(ul_ch_mag128_0[1],QAM_amp128U_0);
ul_ch_mag128_0[1] = _mm_slli_epi16(ul_ch_mag128_0[1],2); // 2 to scale compensate the scale channel estimate
mmtmpU0 = _mm_madd_epi16(ul_ch128_0[2],ul_ch128_0[2]);
mmtmpU0 = _mm_srai_epi32(mmtmpU0,output_shift);
mmtmpU1 = _mm_packs_epi32(mmtmpU0,mmtmpU0);
ul_ch_mag128_0[2] = _mm_unpacklo_epi16(mmtmpU1,mmtmpU1);
ul_ch_mag128b_0[2] = ul_ch_mag128_0[2];
ul_ch_mag128_0[2] = _mm_mulhi_epi16(ul_ch_mag128_0[2],QAM_amp128U_0);
ul_ch_mag128_0[2] = _mm_slli_epi16(ul_ch_mag128_0[2],2); // 2 to scale compensate the scale channel estimat
ul_ch_mag128b_0[0] = _mm_mulhi_epi16(ul_ch_mag128b_0[0],QAM_amp128bU_0);
ul_ch_mag128b_0[0] = _mm_slli_epi16(ul_ch_mag128b_0[0],2); // 2 to scale compensate the scale channel estima
ul_ch_mag128b_0[1] = _mm_mulhi_epi16(ul_ch_mag128b_0[1],QAM_amp128bU_0);
ul_ch_mag128b_0[1] = _mm_slli_epi16(ul_ch_mag128b_0[1],2); // 2 to scale compensate the scale channel estima
ul_ch_mag128b_0[2] = _mm_mulhi_epi16(ul_ch_mag128b_0[2],QAM_amp128bU_0);
ul_ch_mag128b_0[2] = _mm_slli_epi16(ul_ch_mag128b_0[2],2); // 2 to scale compensate the scale channel estima
mmtmpU0 = _mm_madd_epi16(ul_ch128_1[0],ul_ch128_1[0]);
mmtmpU0 = _mm_srai_epi32(mmtmpU0,output_shift);
mmtmpU1 = _mm_madd_epi16(ul_ch128_1[1],ul_ch128_1[1]);
mmtmpU1 = _mm_srai_epi32(mmtmpU1,output_shift);
mmtmpU0 = _mm_packs_epi32(mmtmpU0,mmtmpU1);
ul_ch_mag128_1[0] = _mm_unpacklo_epi16(mmtmpU0,mmtmpU0);
ul_ch_mag128b_1[0] = ul_ch_mag128_1[0];
ul_ch_mag128_1[0] = _mm_mulhi_epi16(ul_ch_mag128_1[0],QAM_amp128U_1);
ul_ch_mag128_1[0] = _mm_slli_epi16(ul_ch_mag128_1[0],2); // 2 to compensate the scale channel estimate
ul_ch_mag128_1[1] = _mm_unpackhi_epi16(mmtmpU0,mmtmpU0);
ul_ch_mag128b_1[1] = ul_ch_mag128_1[1];
ul_ch_mag128_1[1] = _mm_mulhi_epi16(ul_ch_mag128_1[1],QAM_amp128U_1);
ul_ch_mag128_1[1] = _mm_slli_epi16(ul_ch_mag128_1[1],2); // 2 to scale compensate the scale channel estimate
mmtmpU0 = _mm_madd_epi16(ul_ch128_1[2],ul_ch128_1[2]);
mmtmpU0 = _mm_srai_epi32(mmtmpU0,output_shift);
mmtmpU1 = _mm_packs_epi32(mmtmpU0,mmtmpU0);
ul_ch_mag128_1[2] = _mm_unpacklo_epi16(mmtmpU1,mmtmpU1);
ul_ch_mag128b_1[2] = ul_ch_mag128_1[2];
ul_ch_mag128_1[2] = _mm_mulhi_epi16(ul_ch_mag128_1[2],QAM_amp128U_0);
ul_ch_mag128_1[2] = _mm_slli_epi16(ul_ch_mag128_1[2],2); // 2 to scale compensate the scale channel estimat
ul_ch_mag128b_1[0] = _mm_mulhi_epi16(ul_ch_mag128b_1[0],QAM_amp128bU_1);
ul_ch_mag128b_1[0] = _mm_slli_epi16(ul_ch_mag128b_1[0],2); // 2 to scale compensate the scale channel estima
ul_ch_mag128b_1[1] = _mm_mulhi_epi16(ul_ch_mag128b_1[1],QAM_amp128bU_1);
ul_ch_mag128b_1[1] = _mm_slli_epi16(ul_ch_mag128b_1[1],2); // 2 to scale compensate the scale channel estima
ul_ch_mag128b_1[2] = _mm_mulhi_epi16(ul_ch_mag128b_1[2],QAM_amp128bU_1);
ul_ch_mag128b_1[2] = _mm_slli_epi16(ul_ch_mag128b_1[2],2); // 2 to scale compensate the scale channel estima
}
/************************For Computing (y)*(h0*)********************************************/
// multiply by conjugated channel
mmtmpU0 = _mm_madd_epi16(ul_ch128_0[0],rxdataF128[0]);
// print_ints("re",&mmtmpU0);
// mmtmpU0 contains real part of 4 consecutive outputs (32-bit)
mmtmpU1 = _mm_shufflelo_epi16(ul_ch128_0[0],_MM_SHUFFLE(2,3,0,1));
mmtmpU1 = _mm_shufflehi_epi16(mmtmpU1,_MM_SHUFFLE(2,3,0,1));
mmtmpU1 = _mm_sign_epi16(mmtmpU1,*(__m128i*)&conjugate[0]);
// print_ints("im",&mmtmpU1);
mmtmpU1 = _mm_madd_epi16(mmtmpU1,rxdataF128[0]);
// mmtmpU1 contains imag part of 4 consecutive outputs (32-bit)
mmtmpU0 = _mm_srai_epi32(mmtmpU0,output_shift);
// print_ints("re(shift)",&mmtmpU0);
mmtmpU1 = _mm_srai_epi32(mmtmpU1,output_shift);
// print_ints("im(shift)",&mmtmpU1);
mmtmpU2 = _mm_unpacklo_epi32(mmtmpU0,mmtmpU1);
mmtmpU3 = _mm_unpackhi_epi32(mmtmpU0,mmtmpU1);
// print_ints("c0",&mmtmpU2);
// print_ints("c1",&mmtmpU3);
rxdataF_comp128_0[0] = _mm_packs_epi32(mmtmpU2,mmtmpU3);
// print_shorts("rx:",rxdataF128[0]);
// print_shorts("ch:",ul_ch128_0[0]);
// print_shorts("pack:",rxdataF_comp128_0[0]);
// multiply by conjugated channel
mmtmpU0 = _mm_madd_epi16(ul_ch128_0[1],rxdataF128[1]);
// mmtmpU0 contains real part of 4 consecutive outputs (32-bit)
mmtmpU1 = _mm_shufflelo_epi16(ul_ch128_0[1],_MM_SHUFFLE(2,3,0,1));
mmtmpU1 = _mm_shufflehi_epi16(mmtmpU1,_MM_SHUFFLE(2,3,0,1));
mmtmpU1 = _mm_sign_epi16(mmtmpU1,*(__m128i*)conjugate);
mmtmpU1 = _mm_madd_epi16(mmtmpU1,rxdataF128[1]);
// mmtmpU1 contains imag part of 4 consecutive outputs (32-bit)
mmtmpU0 = _mm_srai_epi32(mmtmpU0,output_shift);
mmtmpU1 = _mm_srai_epi32(mmtmpU1,output_shift);
mmtmpU2 = _mm_unpacklo_epi32(mmtmpU0,mmtmpU1);
mmtmpU3 = _mm_unpackhi_epi32(mmtmpU0,mmtmpU1);
rxdataF_comp128_0[1] = _mm_packs_epi32(mmtmpU2,mmtmpU3);
// print_shorts("rx:",rxdataF128[1]);
// print_shorts("ch:",ul_ch128_0[1]);
// print_shorts("pack:",rxdataF_comp128_0[1]);
// multiply by conjugated channel
mmtmpU0 = _mm_madd_epi16(ul_ch128_0[2],rxdataF128[2]);
// mmtmpU0 contains real part of 4 consecutive outputs (32-bit)
mmtmpU1 = _mm_shufflelo_epi16(ul_ch128_0[2],_MM_SHUFFLE(2,3,0,1));
mmtmpU1 = _mm_shufflehi_epi16(mmtmpU1,_MM_SHUFFLE(2,3,0,1));
mmtmpU1 = _mm_sign_epi16(mmtmpU1,*(__m128i*)conjugate);
mmtmpU1 = _mm_madd_epi16(mmtmpU1,rxdataF128[2]);
// mmtmpU1 contains imag part of 4 consecutive outputs (32-bit)
mmtmpU0 = _mm_srai_epi32(mmtmpU0,output_shift);
mmtmpU1 = _mm_srai_epi32(mmtmpU1,output_shift);
mmtmpU2 = _mm_unpacklo_epi32(mmtmpU0,mmtmpU1);
mmtmpU3 = _mm_unpackhi_epi32(mmtmpU0,mmtmpU1);
rxdataF_comp128_0[2] = _mm_packs_epi32(mmtmpU2,mmtmpU3);
// print_shorts("rx:",rxdataF128[2]);
// print_shorts("ch:",ul_ch128_0[2]);
// print_shorts("pack:",rxdataF_comp128_0[2]);
/*************************For Computing (y*)*(h1)************************************/
// multiply by conjugated signal
mmtmpU0 = _mm_madd_epi16(ul_ch128_1[0],rxdataF128[0]);
// print_ints("re",&mmtmpU0);
// mmtmpU0 contains real part of 4 consecutive outputs (32-bit)
mmtmpU1 = _mm_shufflelo_epi16(rxdataF128[0],_MM_SHUFFLE(2,3,0,1));
mmtmpU1 = _mm_shufflehi_epi16(mmtmpU1,_MM_SHUFFLE(2,3,0,1));
mmtmpU1 = _mm_sign_epi16(mmtmpU1,*(__m128i*)&conjugate[0]);
// print_ints("im",&mmtmpU1);
mmtmpU1 = _mm_madd_epi16(mmtmpU1,ul_ch128_1[0]);
// mmtmpU1 contains imag part of 4 consecutive outputs (32-bit)
mmtmpU0 = _mm_srai_epi32(mmtmpU0,output_shift);
// print_ints("re(shift)",&mmtmpU0);
mmtmpU1 = _mm_srai_epi32(mmtmpU1,output_shift);
// print_ints("im(shift)",&mmtmpU1);
mmtmpU2 = _mm_unpacklo_epi32(mmtmpU0,mmtmpU1);
mmtmpU3 = _mm_unpackhi_epi32(mmtmpU0,mmtmpU1);
// print_ints("c0",&mmtmpU2);
// print_ints("c1",&mmtmpU3);
rxdataF_comp128_1[0] = _mm_packs_epi32(mmtmpU2,mmtmpU3);
// print_shorts("rx:",rxdataF128[0]);
// print_shorts("ch_conjugate:",ul_ch128_1[0]);
// print_shorts("pack:",rxdataF_comp128_1[0]);
// multiply by conjugated signal
mmtmpU0 = _mm_madd_epi16(ul_ch128_1[1],rxdataF128[1]);
// mmtmpU0 contains real part of 4 consecutive outputs (32-bit)
mmtmpU1 = _mm_shufflelo_epi16(rxdataF128[1],_MM_SHUFFLE(2,3,0,1));
mmtmpU1 = _mm_shufflehi_epi16(mmtmpU1,_MM_SHUFFLE(2,3,0,1));
mmtmpU1 = _mm_sign_epi16(mmtmpU1,*(__m128i*)conjugate);
mmtmpU1 = _mm_madd_epi16(mmtmpU1,ul_ch128_1[1]);
// mmtmpU1 contains imag part of 4 consecutive outputs (32-bit)
mmtmpU0 = _mm_srai_epi32(mmtmpU0,output_shift);
mmtmpU1 = _mm_srai_epi32(mmtmpU1,output_shift);
mmtmpU2 = _mm_unpacklo_epi32(mmtmpU0,mmtmpU1);
mmtmpU3 = _mm_unpackhi_epi32(mmtmpU0,mmtmpU1);
rxdataF_comp128_1[1] = _mm_packs_epi32(mmtmpU2,mmtmpU3);
// print_shorts("rx:",rxdataF128[1]);
// print_shorts("ch_conjugate:",ul_ch128_1[1]);
// print_shorts("pack:",rxdataF_comp128_1[1]);
// multiply by conjugated signal
mmtmpU0 = _mm_madd_epi16(ul_ch128_1[2],rxdataF128[2]);
// mmtmpU0 contains real part of 4 consecutive outputs (32-bit)
mmtmpU1 = _mm_shufflelo_epi16(rxdataF128[2],_MM_SHUFFLE(2,3,0,1));
mmtmpU1 = _mm_shufflehi_epi16(mmtmpU1,_MM_SHUFFLE(2,3,0,1));
mmtmpU1 = _mm_sign_epi16(mmtmpU1,*(__m128i*)conjugate);
mmtmpU1 = _mm_madd_epi16(mmtmpU1,ul_ch128_1[2]);
// mmtmpU1 contains imag part of 4 consecutive outputs (32-bit)
mmtmpU0 = _mm_srai_epi32(mmtmpU0,output_shift);
mmtmpU1 = _mm_srai_epi32(mmtmpU1,output_shift);
mmtmpU2 = _mm_unpacklo_epi32(mmtmpU0,mmtmpU1);
mmtmpU3 = _mm_unpackhi_epi32(mmtmpU0,mmtmpU1);
rxdataF_comp128_1[2] = _mm_packs_epi32(mmtmpU2,mmtmpU3);
// print_shorts("rx:",rxdataF128[2]);
// print_shorts("ch_conjugate:",ul_ch128_0[2]);
// print_shorts("pack:",rxdataF_comp128_1[2]);
ul_ch128_0+=3;
ul_ch_mag128_0+=3;
ul_ch_mag128b_0+=3;
ul_ch128_1+=3;
ul_ch_mag128_1+=3;
ul_ch_mag128b_1+=3;
rxdataF128+=3;
rxdataF_comp128_0+=3;
rxdataF_comp128_1+=3;
}
}
_mm_empty();
_m_empty();
#endif
}
void ulsch_alamouti(LTE_DL_FRAME_PARMS *frame_parms,// For Distributed Alamouti Receiver Combining
int32_t **rxdataF_comp,
int32_t **rxdataF_comp_0,
int32_t **rxdataF_comp_1,
int32_t **ul_ch_mag,
int32_t **ul_ch_magb,
int32_t **ul_ch_mag_0,
int32_t **ul_ch_magb_0,
int32_t **ul_ch_mag_1,
int32_t **ul_ch_magb_1,
uint8_t symbol,
uint16_t nb_rb)
{
#if defined(__x86_64__) || defined(__i386__)
int16_t *rxF,*rxF0,*rxF1;
__m128i *ch_mag,*ch_magb,*ch_mag0,*ch_mag1,*ch_mag0b,*ch_mag1b;
uint8_t rb,re,aarx;
int32_t jj=(symbol*frame_parms->N_RB_DL*12);
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
rxF = (int16_t*)&rxdataF_comp[aarx][jj];
rxF0 = (int16_t*)&rxdataF_comp_0[aarx][jj]; // Contains (y)*(h0*)
rxF1 = (int16_t*)&rxdataF_comp_1[aarx][jj]; // Contains (y*)*(h1)
ch_mag = (__m128i *)&ul_ch_mag[aarx][jj];
ch_mag0 = (__m128i *)&ul_ch_mag_0[aarx][jj];
ch_mag1 = (__m128i *)&ul_ch_mag_1[aarx][jj];
ch_magb = (__m128i *)&ul_ch_magb[aarx][jj];
ch_mag0b = (__m128i *)&ul_ch_magb_0[aarx][jj];
ch_mag1b = (__m128i *)&ul_ch_magb_1[aarx][jj];
for (rb=0; rb<nb_rb; rb++) {
for (re=0; re<12; re+=2) {
// Alamouti RX combining
rxF[0] = rxF0[0] + rxF1[2]; // re((y0)*(h0*))+ re((y1*)*(h1)) = re(x0)
rxF[1] = rxF0[1] + rxF1[3]; // im((y0)*(h0*))+ im((y1*)*(h1)) = im(x0)
rxF[2] = rxF0[2] - rxF1[0]; // re((y1)*(h0*))- re((y0*)*(h1)) = re(x1)
rxF[3] = rxF0[3] - rxF1[1]; // im((y1)*(h0*))- im((y0*)*(h1)) = im(x1)
rxF+=4;
rxF0+=4;
rxF1+=4;
}
// compute levels for 16QAM or 64 QAM llr unit
ch_mag[0] = _mm_adds_epi16(ch_mag0[0],ch_mag1[0]);
ch_mag[1] = _mm_adds_epi16(ch_mag0[1],ch_mag1[1]);
ch_mag[2] = _mm_adds_epi16(ch_mag0[2],ch_mag1[2]);
ch_magb[0] = _mm_adds_epi16(ch_mag0b[0],ch_mag1b[0]);
ch_magb[1] = _mm_adds_epi16(ch_mag0b[1],ch_mag1b[1]);
ch_magb[2] = _mm_adds_epi16(ch_mag0b[2],ch_mag1b[2]);
ch_mag+=3;
ch_mag0+=3;
ch_mag1+=3;
ch_magb+=3;
ch_mag0b+=3;
ch_mag1b+=3;
}
}
_mm_empty();
_m_empty();
#endif
}
#if defined(__x86_64__) || defined(__i386__)
__m128i avg128U;
#elif defined(__arm__)
int32x4_t avg128U;
#endif
void ulsch_channel_level(int32_t **drs_ch_estimates_ext,
LTE_DL_FRAME_PARMS *frame_parms,
@@ -1410,10 +1045,13 @@ void ulsch_channel_level(int32_t **drs_ch_estimates_ext,
int16_t rb;
uint8_t aarx;
#if defined(__x86_64__) || defined(__i386__)
__m128i avg128U;
__m128i *ul_ch128;
#elif defined(__arm__)
int16x4_t *ul_ch128;
int32x4_t avg128U;
#endif
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
//clear average level
#if defined(__x86_64__) || defined(__i386__)
@@ -1464,8 +1102,7 @@ void ulsch_channel_level(int32_t **drs_ch_estimates_ext,
#endif
}
int32_t avgU[2];
int32_t avgU_0[2],avgU_1[2]; // For the Distributed Alamouti Scheme
void rx_ulsch(PHY_VARS_eNB *eNB,
eNB_rxtx_proc_t *proc,
@@ -1482,7 +1119,7 @@ void rx_ulsch(PHY_VARS_eNB *eNB,
uint32_t l,i;
int32_t avgs;
uint8_t log2_maxh=0,aarx;
int32_t avgU[2];
// uint8_t harq_pid = ( ulsch->RRCConnRequest_flag== 0) ? subframe2harq_pid_tdd(frame_parms->tdd_config,subframe) : 0;
@@ -1492,7 +1129,7 @@ void rx_ulsch(PHY_VARS_eNB *eNB,
int subframe = proc->subframe_rx;
harq_pid = subframe2harq_pid(frame_parms,proc->frame_rx,subframe);
Qm = get_Qm_ul(ulsch[UE_id]->harq_processes[harq_pid]->mcs);
Qm = ulsch[UE_id]->harq_processes[harq_pid]->Qm;
#ifdef DEBUG_ULSCH
printf("rx_ulsch: harq_pid %d, nb_rb %d first_rb %d\n",harq_pid,ulsch[UE_id]->harq_processes[harq_pid]->nb_rb,ulsch[UE_id]->harq_processes[harq_pid]->first_rb);
@@ -1701,8 +1338,8 @@ void rx_ulsch_emul(PHY_VARS_eNB *eNB,
harq_pid = subframe2harq_pid(&eNB->frame_parms,proc->frame_rx,subframe);
printf("Dumping ULSCH in subframe %d with harq_pid %d, for NB_rb %d, mcs %d, Qm %d, N_symb %d\n", subframe,harq_pid,eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb,
eNB->ulsch[UE_id]->harq_processes[harq_pid]->mcs,get_Qm_ul(eNB->ulsch[UE_id]->harq_processes[harq_pid]->mcs),
printf("Dumping ULSCH in subframe %d with harq_pid %d, for NB_rb %d, TBS %d, Qm %d, N_symb %d\n", subframe,harq_pid,eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb,
eNB->ulsch[UE_id]->harq_processes[harq_pid]->TBS,eNB->ulsch[UE_id]->harq_processes[harq_pid]->Qm,
eNB->ulsch[UE_id]->harq_processes[harq_pid]->Nsymb_pusch);
//#ifndef OAI_EMU
write_output("/tmp/ulsch_d.m","ulsch_dseq",&eNB->ulsch[UE_id]->harq_processes[harq_pid]->d[0][96],
@@ -1739,7 +1376,7 @@ void rx_ulsch_emul(PHY_VARS_eNB *eNB,
write_output("/tmp/ulsch_rxF_comp0.m","ulsch0_rxF_comp0",&eNB->pusch_vars[UE_id]->rxdataF_comp[0][0],eNB->frame_parms.N_RB_UL*12*nsymb,1,1);
// write_output("ulsch_rxF_comp1.m","ulsch0_rxF_comp1",&eNB->pusch_vars[UE_id]->rxdataF_comp[0][1][0],eNB->frame_parms.N_RB_UL*12*nsymb,1,1);
write_output("/tmp/ulsch_rxF_llr.m","ulsch_llr",eNB->pusch_vars[UE_id]->llr,
eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12*get_Qm_ul(eNB->ulsch[UE_id]->harq_processes[harq_pid]->mcs)
eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12*eNB->ulsch[UE_id]->harq_processes[harq_pid]->Qm
*eNB->ulsch[UE_id]->harq_processes[harq_pid]->Nsymb_pusch,1,0);
write_output("/tmp/ulsch_ch_mag.m","ulsch_ch_mag",&eNB->pusch_vars[UE_id]->ul_ch_mag[0][0],eNB->frame_parms.N_RB_UL*12*nsymb,1,1);
// write_output("ulsch_ch_mag1.m","ulsch_ch_mag1",&eNB->pusch_vars[UE_id]->ul_ch_mag[1][0],eNB->frame_parms.N_RB_UL*12*nsymb,1,1);
openair1/PHY/TOOLS/lte_phy_scope.c
+3 -3
View File
@@ -180,16 +180,16 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
uint32_t total_dlsch_bitrate = phy_vars_enb->total_dlsch_bitrate;
int coded_bits_per_codeword = 0;
uint8_t harq_pid; // in TDD config 3 it is sf-2, i.e., can be 0,1,2
int mcs = 0;
int Qm = 2;
// choose max MCS to compute coded_bits_per_codeword
if (phy_vars_enb->ulsch[UE_id]!=NULL) {
for (harq_pid=0; harq_pid<3; harq_pid++) {
mcs = cmax(phy_vars_enb->ulsch[UE_id]->harq_processes[harq_pid]->mcs,mcs);
Qm = cmax(phy_vars_enb->ulsch[UE_id]->harq_processes[harq_pid]->Qm,Qm);
}
}
coded_bits_per_codeword = frame_parms->N_RB_UL*12*get_Qm(mcs)*frame_parms->symbols_per_tti;
coded_bits_per_codeword = frame_parms->N_RB_UL*12*Qm*frame_parms->symbols_per_tti;
chest_f_abs = (float*) calloc(nsymb_ce*nb_antennas_rx*nb_antennas_tx,sizeof(float));
llr = (float*) calloc(coded_bits_per_codeword,sizeof(float)); // init to zero
openair1/PHY/defs.h
+10 -1
View File
@@ -901,6 +901,14 @@ typedef struct PHY_VARS_eNB_s {
nfapi_rx_indication_pdu_t rx_pdu_list[NFAPI_RX_IND_MAX_PDU];
/// NFAPI RX ULSCH CRC information
nfapi_crc_indication_pdu_t crc_pdu_list[NFAPI_CRC_IND_MAX_PDU];
/// NFAPI HARQ information
nfapi_harq_indication_pdu_t harq_pdu_list[NFAPI_HARQ_IND_MAX_PDU];
/// NFAPI SR information
nfapi_sr_indication_pdu_t sr_pdu_list[NFAPI_SR_IND_MAX_PDU];
/// NFAPI CQI information
nfapi_cqi_indication_pdu_t cqi_pdu_list[NFAPI_CQI_IND_MAX_PDU];
/// NFAPI CQI information (raw component)
nfapi_cqi_indication_raw_pdu_t cqi_raw_pdu_list[NFAPI_CQI_IND_MAX_PDU];
/// NFAPI PRACH information
nfapi_preamble_pdu_t preamble_list[MAX_NUM_RX_PRACH_PREAMBLES];
#ifdef Rel14
@@ -909,13 +917,14 @@ typedef struct PHY_VARS_eNB_s {
#endif
Sched_Rsp_t Sched_INFO;
LTE_eNB_PDCCH pdcch_vars[2];
LTE_eNB_PHICH phich_vars[2];
#ifdef Rel14
LTE_eNB_EPDCCH epdcch_vars[2];
LTE_eNB_MPDCCH mpdcch_vars[2];
LTE_eNB_PRACH prach_vars_br;
#endif
LTE_eNB_COMMON common_vars;
LTE_eNB_UCI_t uci_vars[NUMBER_OF_UE_MAX];
LTE_eNB_UCI uci_vars[NUMBER_OF_UE_MAX];
LTE_eNB_SRS srs_vars[NUMBER_OF_UE_MAX];
LTE_eNB_PBCH pbch;
LTE_eNB_PUSCH *pusch_vars[NUMBER_OF_UE_MAX];
openair1/PHY/impl_defs_lte.h
+18
View File
@@ -350,6 +350,14 @@ typedef struct {
/// SoundingRS-UL-ConfigDedicated Information Element from 36.331 RRC spec
typedef struct {
/// This descriptor is active
uint8_t active;
/// This descriptor's frame
uint16_t frame;
/// This descriptor's subframe
uint8_t subframe;
/// rnti
uint16_t rnti;
/// Parameter: \f$B_\text{SRS}\f$, see TS 36.211 (table 5.5.3.2-1, 5.5.3.2-2, 5.5.3.2-3 and 5.5.3.2-4). \vr{[0..3]} \note the specification sais it is an enumerated value.
uint8_t srs_Bandwidth;
/// Parameter: SRS hopping bandwidth \f$b_\text{hop}\in\{0,1,2,3\}\f$, see TS 36.211 (5.5.3.2) \vr{[0..3]} \note the specification sais it is an enumerated value.
@@ -831,6 +839,16 @@ typedef struct {
DCI_ALLOC_t dci_alloc[32];
} LTE_eNB_PDCCH;
typedef struct {
uint8_t hi;
uint8_t first_rb;
uint8_t n_DMRS;
} phich_config_t;
typedef struct {
uint8_t num_hi;
phich_config_t config[32];
} LTE_eNB_PHICH;
typedef struct {
uint8_t num_dci;
openair1/SCHED/phy_procedures_lte_eNb.c
+1390 -1557
View File
File diff suppressed because it is too large Load Diff
openair1/SCHED/phy_procedures_lte_ue.c
+20 -17
View File
@@ -1905,6 +1905,9 @@ void get_pucch_param(PHY_VARS_UE *ue,
case pucch_format1a:
case pucch_format1b:
case pucch_format1b_csA2:
case pucch_format1b_csA3:
case pucch_format1b_csA4:
{
pucch_resource[0] = get_n1_pucch(ue,
proc,
@@ -3379,16 +3382,16 @@ void ue_dlsch_procedures(PHY_VARS_UE *ue,
subframe_rx<<1);
stop_meas(&ue->dlsch_unscrambling_stats);
#if 0
LOG_I(PHY," ------ start turbo decoder for AbsSubframe %d.%d / %d ------ \n", frame_rx, subframe_rx, harq_pid);
LOG_I(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> nb_rb %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->nb_rb);
LOG_I(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> rb_alloc_even %x \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->rb_alloc_even);
LOG_I(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Qm %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->Qm);
LOG_I(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Nl %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->Nl);
LOG_I(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> G %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->G);
LOG_I(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Kmimo %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->Kmimo);
LOG_I(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Pdcch Sym %d \n", frame_rx, subframe_rx, harq_pid, ue->pdcch_vars[subframe_rx & 0x1][eNB_id]->num_pdcch_symbols);
#endif
//#if 0
LOG_D(PHY," ------ start turbo decoder for AbsSubframe %d.%d / %d ------ \n", frame_rx, subframe_rx, harq_pid);
LOG_D(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> nb_rb %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->nb_rb);
LOG_D(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> rb_alloc_even %x \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->rb_alloc_even[0]);
LOG_D(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Qm %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->Qm);
LOG_D(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Nl %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->Nl);
LOG_D(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> G %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->G);
LOG_D(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Kmimo %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->Kmimo);
LOG_D(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Pdcch Sym %d \n", frame_rx, subframe_rx, harq_pid, ue->pdcch_vars[subframe_rx & 0x1][eNB_id]->num_pdcch_symbols);
//#endif
start_meas(&ue->dlsch_decoding_stats[subframe_rx&0x1]);
ret = dlsch_decoding(ue,
@@ -3471,13 +3474,13 @@ void ue_dlsch_procedures(PHY_VARS_UE *ue,
if(dlsch0->rnti != 0xffff)
{
LOG_D(PHY,"[UE %d][PDSCH %x/%d] AbsSubframe %d.%d : DLSCH CW0 in error (rv %d,round %d, mcs %d,TBS %d)\n",
ue->Mod_id,dlsch0->rnti,
harq_pid,frame_rx,subframe_rx,
dlsch0->harq_processes[harq_pid]->rvidx,
dlsch0->harq_processes[harq_pid]->round,
dlsch0->harq_processes[harq_pid]->mcs,
dlsch0->harq_processes[harq_pid]->TBS);
LOG_D(PHY,"[UE %d][PDSCH %x/%d] AbsSubframe %d.%d : DLSCH CW0 in error (rv %d,round %d, mcs %d,TBS %d)\n",
ue->Mod_id,dlsch0->rnti,
harq_pid,frame_rx,subframe_rx,
dlsch0->harq_processes[harq_pid]->rvidx,
dlsch0->harq_processes[harq_pid]->round,
dlsch0->harq_processes[harq_pid]->mcs,
dlsch0->harq_processes[harq_pid]->TBS);
}
openair1/SCHED/pucch_pc.c
+3
View File
@@ -63,6 +63,9 @@ int16_t pucch_power_cntl(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t subframe,u
case pucch_format1a:
case pucch_format1b:
case pucch_format1b_csA2:
case pucch_format1b_csA3:
case pucch_format1b_csA4:
Po_PUCCH += (1+(ue->frame_parms.ul_power_control_config_common.deltaF_PUCCH_Format1b<<1));
break;
openair2/ENB_APP/enb_config.c
+5 -2
View File
@@ -496,9 +496,12 @@ void RCconfig_RU() {
config_setting_lookup_string(setting_ru, CONFIG_STRING_RU_LOCAL_RF,(const char **)&local_rf)
)
) {
local_rf_flag = CONFIG_FALSE;
local_rf_flag = CONFIG_FALSE;
}
else {
if (strcmp(local_rf, "no") == 0)
local_rf_flag = CONFIG_FALSE;
}
if (local_rf_flag == CONFIG_TRUE) { // eNB or RRU
openair2/LAYER2/MAC/config.c
+13 -12
View File
@@ -582,7 +582,7 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
if (UE_id == -1)
LOG_E(MAC,"%s:%d:%s: ERROR, UE_id == -1\n", __FILE__, __LINE__, __FUNCTION__);
else
config_dedicated(Mod_idP, CC_idP, UE_RNTI(Mod_idP, UE_id), physicalConfigDedicated);
UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated=physicalConfigDedicated;
}
@@ -658,19 +658,20 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
#endif
AssertFatal(RC.mac[Mod_idP]->if_inst->PHY_config_req != NULL,"if_inst->phy_config_request is null\n");
PHY_Config_t phycfg;
phycfg.Mod_id = Mod_idP;
phycfg.CC_id = CC_idP;
phycfg.cfg = &RC.mac[Mod_idP]->config[CC_idP];
if (RC.mac[Mod_idP]->if_inst->PHY_config_req) RC.mac[Mod_idP]->if_inst->PHY_config_req(&phycfg);
if (radioResourceConfigCommon!=NULL) {
AssertFatal(RC.mac[Mod_idP]->if_inst->PHY_config_req != NULL,"if_inst->phy_config_request is null\n");
PHY_Config_t phycfg;
phycfg.Mod_id = Mod_idP;
phycfg.CC_id = CC_idP;
phycfg.cfg = &RC.mac[Mod_idP]->config[CC_idP];
if (RC.mac[Mod_idP]->if_inst->PHY_config_req) RC.mac[Mod_idP]->if_inst->PHY_config_req(&phycfg);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_OUT);
return(0);
return(0);
}
int
rrc_mac_config_req_ue(
module_id_t Mod_idP,
openair2/LAYER2/MAC/defs.h
+51 -12
View File
@@ -755,11 +755,12 @@ typedef struct {
#ifdef Rel14
uint8_t rach_resource_type;
uint16_t mpdcch_repetition_cnt;
struct PhysicalConfigDedicated *physicalConfigDedicated;
uint16_t mpdcch_repetition_cnt;
frame_t Msg2_frame;
sub_frame_t Msg2_subframe;
#endif
sub_frame_t Msg2_subframe;
PhysicalConfigDedicated_t *physicalConfigDedicated;
} UE_TEMPLATE;
@@ -791,9 +792,13 @@ typedef struct {
uint16_t priority[MAX_NUM_LCID];
// resource scheduling information
uint8_t harq_pid[MAX_NUM_CCs];
uint8_t round[MAX_NUM_CCs];
uint8_t round_UL[8][MAX_NUM_CCs];
/// Current DL harq round per harq_pid on each CC
uint8_t round[MAX_NUM_CCs][10];
/// Current Active TBs per harq_pid on each CC
uint8_t tbcnt[MAX_NUM_CCs][10];
/// Current UL harq round per harq_pid on each CC
uint8_t round_UL[MAX_NUM_CCs][8];
uint8_t dl_pow_off[MAX_NUM_CCs];
uint16_t pre_nb_available_rbs[MAX_NUM_CCs];
unsigned char rballoc_sub_UE[MAX_NUM_CCs][N_RBG_MAX];
@@ -803,11 +808,34 @@ typedef struct {
int32_t context_active_timer;
int32_t cqi_req_timer;
int32_t ul_inactivity_timer;
int32_t ul_failure_timer;
int32_t ul_failure_timer;
int32_t ul_scheduled;
int32_t ra_pdcch_order_sent;
int32_t ul_out_of_sync;
int32_t phr_received;
uint8_t periodic_ri_received[NFAPI_CC_MAX];
uint8_t aperiodic_ri_received[NFAPI_CC_MAX];
uint8_t pucch1_snr[NFAPI_CC_MAX];
uint8_t pucch2_snr[NFAPI_CC_MAX];
uint8_t pucch3_snr[NFAPI_CC_MAX];
uint8_t pusch_snr[NFAPI_CC_MAX];
uint16_t feedback_cnt[NFAPI_CC_MAX];
uint16_t timing_advance;
uint16_t timing_advance_r9;
uint8_t periodic_wideband_cqi[NFAPI_CC_MAX];
uint8_t periodic_wideband_spatial_diffcqi[NFAPI_CC_MAX];
uint8_t periodic_wideband_pmi[NFAPI_CC_MAX];
uint8_t periodic_subband_cqi[NFAPI_CC_MAX][16];
uint8_t periodic_subband_spatial_diffcqi[NFAPI_CC_MAX][16];
uint8_t aperiodic_subband_cqi0[NFAPI_CC_MAX][25];
uint8_t aperiodic_subband_pmi[NFAPI_CC_MAX][25];
uint8_t aperiodic_subband_diffcqi0[NFAPI_CC_MAX][25];
uint8_t aperiodic_subband_cqi1[NFAPI_CC_MAX][25];
uint8_t aperiodic_subband_diffcqi1[NFAPI_CC_MAX][25];
uint8_t aperiodic_wideband_cqi0[NFAPI_CC_MAX];
uint8_t aperiodic_wideband_pmi[NFAPI_CC_MAX];
uint8_t aperiodic_wideband_cqi1[NFAPI_CC_MAX];
uint8_t aperiodic_wideband_pmi1[NFAPI_CC_MAX];
} UE_sched_ctrl;
/*! \brief eNB template for the Random access information */
typedef struct {
@@ -867,12 +895,18 @@ typedef struct {
uint8_t msg3_nb_rb;
/// Msg3 MCS
uint8_t msg3_mcs;
/// Msg3 TPC command
uint8_t msg3_TPC;
/// Msg3 ULdelay command
uint8_t msg3_ULdelay;
/// Msg3 cqireq command
uint8_t msg3_cqireq;
/// Round of Msg3 HARQ
uint8_t msg3_round;
/// TBS used for Msg4
int Msg4_TBsize;
int msg4_TBsize;
/// MCS used for Msg4
int Msg4_mcs;
int msg4_mcs;
#ifdef Rel14
uint8_t rach_resource_type;
uint8_t msg2_mpdcch_repetition_cnt;
@@ -954,6 +988,8 @@ typedef struct {
RA_TEMPLATE RA_template[NB_RA_PROC_MAX];
/// VRB map for common channels
uint8_t vrb_map[100];
/// VRB map for common channels and retransmissions by PHICH
uint8_t vrb_map_UL[100];
/// MBSFN SubframeConfig
struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[8];
/// number of subframe allocation pattern available for MBSFN sync area
@@ -1006,7 +1042,7 @@ typedef struct eNB_MAC_INST_s {
/// Common cell resources
COMMON_channels_t common_channels[MAX_NUM_CCs];
/// current PDU index (BCH,MCH,DLSCH)
int pdu_index[MAX_NUM_CCs];
uint16_t pdu_index[MAX_NUM_CCs];
/// NFAPI Config Request Structure
nfapi_config_request_t config[MAX_NUM_CCs];
@@ -1016,9 +1052,12 @@ typedef struct eNB_MAC_INST_s {
nfapi_dl_config_request_t DL_req[MAX_NUM_CCs];
/// Preallocated UL pdu list
nfapi_ul_config_request_pdu_t ul_config_pdu_list[MAX_NUM_CCs][MAX_NUM_UL_PDU];
nfapi_ul_config_request_pdu_t ul_config_pdu_list_msg3[MAX_NUM_CCs];
/// NFAPI UL Config Request Structure
/// Preallocated UL pdu list for ULSCH (n+k delay)
nfapi_ul_config_request_pdu_t ul_config_pdu_list_tmp[MAX_NUM_CCs][10][MAX_NUM_UL_PDU];
/// NFAPI UL Config Request Structure, send to L1 4 subframes before processing takes place
nfapi_ul_config_request_t UL_req[MAX_NUM_CCs];
/// NFAPI "Temporary" UL Config Request Structure, holds future UL_config requests
nfapi_ul_config_request_t UL_req_tmp[MAX_NUM_CCs][10];
/// Preallocated HI_DCI0 pdu list
nfapi_hi_dci0_request_pdu_t hi_dci0_pdu_list[MAX_NUM_CCs][MAX_NUM_HI_DCI0_PDU];
/// NFAPI HI/DCI0 Config Request Structure
openair2/LAYER2/MAC/eNB_scheduler.c
+279 -95
View File
@@ -70,6 +70,234 @@ extern RAN_CONTEXT_t RC;
uint16_t pdcch_order_table[6] = {31,31,511,2047,2047,8191};
void schedule_SRS(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP) {
eNB_MAC_INST *eNB = RC.mac[module_idP];
UE_list_t *UE_list = &eNB->UE_list;
nfapi_ul_config_request_body_t *ul_req;
int CC_id,UE_id;
COMMON_channels_t *cc = RC.mac[module_idP]->common_channels;
SoundingRS_UL_ConfigCommon_t *soundingRS_UL_ConfigCommon;
struct SoundingRS_UL_ConfigDedicated *soundingRS_UL_ConfigDedicated;
uint8_t TSFC;
uint16_t deltaTSFC; // bitmap
uint8_t srs_SubframeConfig;
// table for TSFC (Period) and deltaSFC (offset)
const uint16_t deltaTSFCTabType1[15][2] = { {1,1},{1,2},{2,2},{1,5},{2,5},{4,5},{8,5},{3,5},{12,5},{1,10},{2,10},{4,10},{8,10},{351,10},{383,10} }; // Table 5.5.3.3-2 3GPP 36.211 FDD
const uint16_t deltaTSFCTabType2[14][2] = { {2,5},{6,5},{10,5},{18,5},{14,5},{22,5},{26,5},{30,5},{70,10},{74,10},{194,10},{326,10},{586,10},{210,10} }; // Table 5.5.3.3-2 3GPP 36.211 TDD
uint16_t srsPeriodicity,srsOffset;
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
soundingRS_UL_ConfigCommon = &cc[CC_id].radioResourceConfigCommon->soundingRS_UL_ConfigCommon;
// check if SRS is enabled in this frame/subframe
if (soundingRS_UL_ConfigCommon) {
srs_SubframeConfig = soundingRS_UL_ConfigCommon->choice.setup.srs_SubframeConfig;
if (cc[CC_id].tdd_Config == NULL) { // FDD
deltaTSFC = deltaTSFCTabType1[srs_SubframeConfig][0];
TSFC = deltaTSFCTabType1[srs_SubframeConfig][1];
}
else { // TDD
deltaTSFC = deltaTSFCTabType2[srs_SubframeConfig][0];
TSFC = deltaTSFCTabType2[srs_SubframeConfig][1];
}
// Sounding reference signal subframes are the subframes satisfying ns/2 mod TSFC (- deltaTSFC
uint16_t tmp = (subframeP % TSFC);
if((1<<tmp) & deltaTSFC) {
// This is an SRS subframe, loop over UEs
for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id]) {
ul_req = &RC.mac[module_idP]->UL_req[CC_id].ul_config_request_body;
AssertFatal(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated != NULL, "physicalConfigDedicated is null for UE %d\n",UE_id);
if ((soundingRS_UL_ConfigDedicated = UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->soundingRS_UL_ConfigDedicated)!=NULL) {
if (soundingRS_UL_ConfigDedicated->present == SoundingRS_UL_ConfigDedicated_PR_setup) {
get_srs_pos(&cc[CC_id], soundingRS_UL_ConfigDedicated->choice.setup.srs_ConfigIndex, &srsPeriodicity, &srsOffset);
if (((10*frameP+subframeP) % srsPeriodicity) == srsOffset) {
// Prorgram SRS
ul_req->srs_present = 1;
nfapi_ul_config_request_pdu_t* ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus];
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_SRS_PDU_TYPE;
ul_config_pdu->pdu_size = 2+(uint8_t)(2+sizeof(nfapi_ul_config_srs_pdu));
ul_config_pdu->srs_pdu.srs_pdu_rel8.size = (uint8_t)sizeof(nfapi_ul_config_srs_pdu);;
ul_config_pdu->srs_pdu.srs_pdu_rel8.rnti = UE_list->UE_template[CC_id][UE_id].rnti;
ul_config_pdu->srs_pdu.srs_pdu_rel8.srs_bandwidth = soundingRS_UL_ConfigDedicated->choice.setup.srs_Bandwidth;
ul_config_pdu->srs_pdu.srs_pdu_rel8.frequency_domain_position = soundingRS_UL_ConfigDedicated->choice.setup.freqDomainPosition;
ul_config_pdu->srs_pdu.srs_pdu_rel8.srs_hopping_bandwidth = soundingRS_UL_ConfigDedicated->choice.setup.srs_HoppingBandwidth;;
ul_config_pdu->srs_pdu.srs_pdu_rel8.transmission_comb = soundingRS_UL_ConfigDedicated->choice.setup.transmissionComb;
ul_config_pdu->srs_pdu.srs_pdu_rel8.i_srs = soundingRS_UL_ConfigDedicated->choice.setup.srs_ConfigIndex;
ul_config_pdu->srs_pdu.srs_pdu_rel8.sounding_reference_cyclic_shift = soundingRS_UL_ConfigDedicated->choice.setup.cyclicShift;
// ul_config_pdu->srs_pdu.srs_pdu_rel10.antenna_port = ;//
// ul_config_pdu->srs_pdu.srs_pdu_rel13.number_of_combs = ;//
RC.mac[module_idP]->UL_req[CC_id].sfn_sf = (frameP<<4)+subframeP;
ul_req->number_of_pdus++;
} // if (((10*frameP+subframeP) % srsPeriodicity) == srsOffset)
} // if (soundingRS_UL_ConfigDedicated->present == SoundingRS_UL_ConfigDedicated_PR_setup)
} // if ((soundingRS_UL_ConfigDedicated = UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->soundingRS_UL_ConfigDedicated)!=NULL)
} // for (UE_id ...
} // if((1<<tmp) & deltaTSFC)
}// SRS config
}
}
void schedule_CSI(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP) {
eNB_MAC_INST *eNB = RC.mac[module_idP];
UE_list_t *UE_list = &eNB->UE_list;
COMMON_channels_t *cc;
nfapi_ul_config_request_body_t *ul_req;
int CC_id,UE_id;
struct CQI_ReportPeriodic *cqi_ReportPeriodic;
uint16_t Npd,N_OFFSET_CQI;
int H;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
cc = &eNB->common_channels[CC_id];
for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id]) {
ul_req = &RC.mac[module_idP]->UL_req[CC_id].ul_config_request_body;
AssertFatal(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated != NULL, "physicalConfigDedicated is null for UE %d\n",UE_id);
if (UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->cqi_ReportConfig) {
if ((cqi_ReportPeriodic = UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic)!=NULL &&
(cqi_ReportPeriodic->present!=CQI_ReportPeriodic_PR_release)) {
//Rel8 Periodic CQI/PMI/RI reporting
get_csi_params(cc,cqi_ReportPeriodic,&Npd,&N_OFFSET_CQI,&H);
if ((((frameP*10)+subframeP)%Npd) == N_OFFSET_CQI) { // CQI opportunity
UE_list->UE_sched_ctrl[UE_id].feedback_cnt[CC_id]=(((frameP*10)+subframeP)/Npd)%H;
// Program CQI
nfapi_ul_config_request_pdu_t* ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus];
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE;
ul_config_pdu->pdu_size = 2+(uint8_t)(2+sizeof(nfapi_ul_config_uci_cqi_pdu));
ul_config_pdu->uci_cqi_pdu.ue_information.ue_information_rel8.rnti = UE_list->UE_template[CC_id][UE_id].rnti;
ul_config_pdu->uci_cqi_pdu.cqi_information.cqi_information_rel8.pucch_index = cqi_ReportPeriodic->choice.setup.cqi_PUCCH_ResourceIndex;
ul_config_pdu->uci_cqi_pdu.cqi_information.cqi_information_rel8.dl_cqi_pmi_size = get_rel8_dl_cqi_pmi_size(&UE_list->UE_sched_ctrl[UE_id],
CC_id,
cc,
get_tmode(module_idP,CC_id,UE_id),
cqi_ReportPeriodic);
ul_req->number_of_pdus++;
#if defined(Rel10) || defined(Rel14)
// PUT rel10-13 UCI options here
#endif
}
else if ((cqi_ReportPeriodic->choice.setup.ri_ConfigIndex) &&
((((frameP*10)+subframeP)%((H*Npd)<<(*cqi_ReportPeriodic->choice.setup.ri_ConfigIndex/161)))==
N_OFFSET_CQI + (*cqi_ReportPeriodic->choice.setup.ri_ConfigIndex%161))) { // RI opportunity
// Program RI
nfapi_ul_config_request_pdu_t* ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus];
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE;
ul_config_pdu->pdu_size = 2+(uint8_t)(2+sizeof(nfapi_ul_config_uci_cqi_pdu));
ul_config_pdu->uci_cqi_pdu.ue_information.ue_information_rel8.rnti = UE_list->UE_template[CC_id][UE_id].rnti;
ul_config_pdu->uci_cqi_pdu.cqi_information.cqi_information_rel8.pucch_index = cqi_ReportPeriodic->choice.setup.cqi_PUCCH_ResourceIndex;
ul_config_pdu->uci_cqi_pdu.cqi_information.cqi_information_rel8.dl_cqi_pmi_size = (cc->p_eNB==2)?1:2;
RC.mac[module_idP]->UL_req[CC_id].sfn_sf = (frameP<<4)+subframeP;
ul_req->number_of_pdus++;
}
} // if ((cqi_ReportPeriodic = cqi_ReportConfig->cqi_ReportPeriodic)!=NULL) {
} // if (UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->cqi_ReportConfig)
} // for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id]) {
} // for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
}
void schedule_SR(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP) {
eNB_MAC_INST *eNB = RC.mac[module_idP];
UE_list_t *UE_list = &eNB->UE_list;
nfapi_ul_config_request_body_t *ul_req;
int CC_id,UE_id;
SchedulingRequestConfig_t *SRconfig;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id]) {
ul_req = &RC.mac[module_idP]->UL_req[CC_id].ul_config_request_body;
AssertFatal(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated != NULL, "physicalConfigDedicated is null for UE %d\n",UE_id);
if ((SRconfig = UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->schedulingRequestConfig)!=NULL) {
if (SRconfig->present == SchedulingRequestConfig_PR_setup) {
if (SRconfig->choice.setup.sr_ConfigIndex <= 4) { // 5 ms SR period
if ((subframeP%5) != SRconfig->choice.setup.sr_ConfigIndex)
continue;
} else if (SRconfig->choice.setup.sr_ConfigIndex <= 14) { // 10 ms SR period
if (subframeP!=(SRconfig->choice.setup.sr_ConfigIndex-5))
continue;
} else if (SRconfig->choice.setup.sr_ConfigIndex <= 34) { // 20 ms SR period
if ((10*(frameP&1)+subframeP) != (SRconfig->choice.setup.sr_ConfigIndex-15))
continue;
} else if (SRconfig->choice.setup.sr_ConfigIndex <= 74) { // 40 ms SR period
if ((10*(frameP&3)+subframeP) != (SRconfig->choice.setup.sr_ConfigIndex-35))
continue;
} else if (SRconfig->choice.setup.sr_ConfigIndex <= 154) { // 80 ms SR period
if ((10*(frameP&7)+subframeP) != (SRconfig->choice.setup.sr_ConfigIndex-75))
continue;
}
} // SRconfig->present == SchedulingRequestConfig_PR_setup)
} // SRconfig = UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->schedulingRequestConfig)!=NULL)
// if we get here there is some PUCCH1 reception to schedule for SR
int ul_ulsch_only=0;
// check that there is no existing UL grant for ULSCH which overrides the SR
for (int i=0;i<ul_req->number_of_pdus;i++)
if ((ul_req->ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_PDU_TYPE) &&
(ul_req->ul_config_pdu_list[i].ulsch_pdu.ulsch_pdu_rel8.rnti == UE_list->UE_template[CC_id][UE_id].rnti)) {
ul_ulsch_only=1;
break;
}
// drop the allocation because ULSCH with handle it with BSR
if (ul_ulsch_only==1) continue;
// if we get here then there is no UL grant so program the SR
ul_req->ul_config_pdu_list[ul_req->number_of_pdus].pdu_type = NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE;
ul_req->ul_config_pdu_list[ul_req->number_of_pdus].uci_sr_pdu.ue_information.ue_information_rel8.rnti = UE_list->UE_template[CC_id][UE_id].rnti;
// check Rel10 or Rel8 SR
#if defined(Rel10) || defined(Rel14)
if ((UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->ext2) &&
(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->ext2->schedulingRequestConfig_v1020)&&
(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->ext2->schedulingRequestConfig_v1020)) {
ul_req->ul_config_pdu_list[ul_req->number_of_pdus].uci_sr_pdu.sr_information.sr_information_rel10.number_of_pucch_resources = 1;
ul_req->ul_config_pdu_list[ul_req->number_of_pdus].uci_sr_pdu.sr_information.sr_information_rel10.pucch_index_p1 =
*UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->ext2->schedulingRequestConfig_v1020->sr_PUCCH_ResourceIndexP1_r10;
}
else
#endif
{
ul_req->ul_config_pdu_list[ul_req->number_of_pdus].uci_sr_pdu.sr_information.sr_information_rel8.pucch_index =
UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->schedulingRequestConfig->choice.setup.sr_PUCCH_ResourceIndex;
LOG_I(MAC,"Frame %d, Subframe %d : Scheduling SR for UE %d/%x\n",frameP,subframeP,UE_id,UE_list->UE_template[CC_id][UE_id].rnti);
}
RC.mac[module_idP]->UL_req[CC_id].sfn_sf = (frameP<<4)+subframeP;
ul_req->number_of_pdus++;
} // for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id])
} // for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++)
}
void check_ul_failure(module_id_t module_idP,int CC_id,int UE_id,
frame_t frameP, sub_frame_t subframeP) {
@@ -138,6 +366,7 @@ void clear_nfapi_information(eNB_MAC_INST *eNB,int CC_idP,frame_t frameP,sub_fra
nfapi_ul_config_request_t *UL_req = &eNB->UL_req[0];
nfapi_hi_dci0_request_t *HI_DCI0_req = &eNB->HI_DCI0_req[0];
nfapi_tx_request_t *TX_req = &eNB->TX_req[0];
eNB->pdu_index[CC_idP] = 0;
DL_req[CC_idP].dl_config_request_body.number_pdcch_ofdm_symbols = 1;
@@ -149,11 +378,40 @@ void clear_nfapi_information(eNB_MAC_INST *eNB,int CC_idP,frame_t frameP,sub_fra
HI_DCI0_req[CC_idP].hi_dci0_request_body.sfnsf = subframeP + (frameP<<3);
HI_DCI0_req[CC_idP].hi_dci0_request_body.number_of_dci = 0;
UL_req[CC_idP].ul_config_request_body.number_of_pdus = 0;
UL_req[CC_idP].ul_config_request_body.rach_prach_frequency_resources = 0; // ignored, handled by PHY for now
UL_req[CC_idP].ul_config_request_body.srs_present = 0; // ignored, handled by PHY for now
TX_req[CC_idP].tx_request_body.number_of_pdus = 0;
}
void copy_ulreq(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP) {
int CC_id;
eNB_MAC_INST *eNB;
nfapi_ul_config_request_body_t *ul_req_tmp;
nfapi_ul_config_request_body_t *ul_req;
eNB = RC.mac[module_idP];
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
ul_req_tmp = &eNB->UL_req_tmp[CC_id][subframeP].ul_config_request_body;
ul_req = &eNB->UL_req[CC_id].ul_config_request_body;
eNB->UL_req[CC_id].sfn_sf = (frameP<<4) + subframeP;
ul_req->number_of_pdus = ul_req_tmp->number_of_pdus;
ul_req_tmp->number_of_pdus = 0;
memcpy((void*)ul_req->ul_config_pdu_list,
(void*)ul_req_tmp->ul_config_pdu_list,
ul_req->number_of_pdus*sizeof(nfapi_ul_config_request_pdu_t));
}
}
void eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
@@ -187,17 +445,19 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP, sub_frame
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
mbsfn_status[CC_id]=0;
// clear vrb_map
memset(cc[CC_id].vrb_map,0,100);
// clear DL/UL info for new scheduling round
clear_nfapi_information(RC.mac[module_idP],CC_id,frameP,subframeP);
// clear vrb_maps
memset(cc[CC_id].vrb_map,0,100);
memset(cc[CC_id].vrb_map_UL,0,100);
#if defined(Rel10) || defined(Rel14)
cc[CC_id].mcch_active =0;
#endif
RC.mac[module_idP]->frame = frameP;
RC.mac[module_idP]->subframe = subframeP;
clear_nfapi_information(RC.mac[module_idP],CC_id,frameP,subframeP);
}
// refresh UE list based on UEs dropped by PHY in previous subframe
@@ -223,81 +483,10 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP, sub_frame
RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].cqi_req_timer++;
/*
//Inform the controller about the UE deactivation. Should be moved to RRC agent in the future
#if defined(FLEXRAN_AGENT_S_IF)
if (mac_agent_registered[module_idP]) {
agent_mac_xface[module_idP]->flexran_agent_notify_ue_state_change(module_idP,
rnti,
PROTOCOL__FLEX_UE_STATE_CHANGE_TYPE__FLUESC_DEACTIVATED);
}
#endif
}*/
check_ul_failure(module_idP,CC_id,i,frameP,subframeP);
}
#if defined(ENABLE_ITTI)
do {
// Checks if a message has been sent to MAC sub-task
itti_poll_msg (TASK_MAC_ENB, &msg_p);
if (msg_p != NULL) {
msg_name = ITTI_MSG_NAME (msg_p);
instance = ITTI_MSG_INSTANCE (msg_p);
switch (ITTI_MSG_ID(msg_p)) {
case MESSAGE_TEST:
LOG_D(MAC, "Received %s\n", ITTI_MSG_NAME(msg_p));
break;
case RRC_MAC_BCCH_DATA_REQ:
LOG_D(MAC, "Received %s from %s: instance %d, frameP %d, eNB_index %d\n",
msg_name, ITTI_MSG_ORIGIN_NAME(msg_p), instance,
RRC_MAC_BCCH_DATA_REQ (msg_p).frame, RRC_MAC_BCCH_DATA_REQ (msg_p).enb_index);
// TODO process BCCH data req.
break;
case RRC_MAC_CCCH_DATA_REQ:
LOG_D(MAC, "Received %s from %s: instance %d, frameP %d, eNB_index %d\n",
msg_name, ITTI_MSG_ORIGIN_NAME(msg_p), instance,
RRC_MAC_CCCH_DATA_REQ (msg_p).frame, RRC_MAC_CCCH_DATA_REQ (msg_p).enb_index);
// TODO process CCCH data req.
break;
#if defined(Rel10) || defined(Rel14)
case RRC_MAC_MCCH_DATA_REQ:
LOG_D(MAC, "Received %s from %s: instance %d, frameP %d, eNB_index %d, mbsfn_sync_area %d\n",
msg_name, ITTI_MSG_ORIGIN_NAME(msg_p), instance,
RRC_MAC_MCCH_DATA_REQ (msg_p).frame, RRC_MAC_MCCH_DATA_REQ (msg_p).enb_index, RRC_MAC_MCCH_DATA_REQ (msg_p).mbsfn_sync_area);
// TODO process MCCH data req.
break;
#endif
default:
LOG_E(MAC, "Received unexpected message %s\n", msg_name);
break;
}
result = itti_free (ITTI_MSG_ORIGIN_ID(msg_p), msg_p);
AssertFatal (result == EXIT_SUCCESS, "Failed to free memory (%d)!\n", result);
}
} while(msg_p != NULL);
#endif
/* #ifndef DISABLE_SF_TRIGGER */
/* //Send subframe trigger to the controller */
/* if (mac_agent_registered[module_idP]) { */
/* agent_mac_xface[module_idP]->flexran_agent_send_sf_trigger(module_idP); */
/* } */
/* #endif */
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frameP, subframeP,module_idP);
pdcp_run(&ctxt);
@@ -319,34 +508,29 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP, sub_frame
// This schedules MIB
if ((subframeP==0) && (frameP&3) == 0) schedule_mib(module_idP,frameP,subframeP);
// This schedules SI for legacy LTE and eMTC
// This schedules SI for legacy LTE and eMTC starting in subframeP
schedule_SI(module_idP,frameP,subframeP);
// This schedules Random-Access for legacy LTE and eMTC
// This schedules Random-Access for legacy LTE and eMTC starting in subframeP
schedule_RA(module_idP,frameP,subframeP);
// This schedules ULSCH in subframeP+k
// copy previously scheduled UL resources (ULSCH + HARQ)
copy_ulreq(module_idP,frameP,subframeP);
// This schedules SRS in subframeP
schedule_SRS(module_idP,frameP,subframeP);
// This schedules ULSCH in subframeP (dci0)
schedule_ulsch(module_idP,frameP,subframeP);
// This schedules UCI_SR in subframeP
schedule_SR(module_idP,frameP,subframeP);
// This schedules UCI_CSI in subframeP
schedule_CSI(module_idP, frameP, subframeP);
// This schedules DLSCH in subframeP
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
// Allocate CCEs and Msg3 for good after scheduling is done
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
allocate_CCEs(module_idP,CC_id,subframeP,0);
check_and_add_msg3(module_idP,frameP,subframeP);
}
#if defined(FLEXRAN_AGENT_SB_IF)
#ifndef DISABLE_CONT_STATS
//Send subframe trigger to the controller
if (mac_agent_registered[module_idP]) {
agent_mac_xface[module_idP]->flexran_agent_send_update_mac_stats(module_idP);
}
#endif
#endif
// Allocate CCEs for good after scheduling is done
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) allocate_CCEs(module_idP,CC_id,subframeP,0);
stop_meas(&RC.mac[module_idP]->eNB_scheduler);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT);
openair2/LAYER2/MAC/eNB_scheduler_RA.c
+271 -254
View File
@@ -62,136 +62,114 @@
#include "T.h"
void check_and_add_msg3(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP) {
void add_msg3(module_id_t module_idP,int CC_id, RA_TEMPLATE *RA_template, frame_t frameP, sub_frame_t subframeP) {
eNB_MAC_INST *eNB = RC.mac[module_idP];
RA_TEMPLATE *RA_template;
COMMON_channels_t *cc = eNB->common_channels;
uint8_t i;
int msg3_prog_subframe,msg3_prog_frame;
int CC_id;
COMMON_channels_t *cc = &eNB->common_channels[CC_id];
uint8_t i,j;
nfapi_ul_config_request_t *ul_req;
nfapi_ul_config_request_pdu_t *ul_config_pdu;
nfapi_ul_config_request_body_t *ul_req;
nfapi_ul_config_request_body_t *ul_req_body;
nfapi_hi_dci0_request_body_t *hi_dci0_req;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
hi_dci0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
ul_req = &eNB->UL_req[CC_id].ul_config_request_body;
uint8_t rvseq[4] = {0,2,3,1};
for (i=0; i<NB_RA_PROC_MAX; i++) {
RA_template = (RA_TEMPLATE *)&cc[CC_id].RA_template[i];
if (RA_template->RA_active == TRUE) {
hi_dci0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
ul_req = &eNB->UL_req_tmp[CC_id][RA_template->Msg3_subframe];
ul_req_body = &ul_req->ul_config_request_body;
AssertFatal(RA_template->RA_active == TRUE,"RA is not active for RA %X\n",RA_template->rnti);
#ifdef Rel14
if (RA_template->rach_resource_type>0) {
// program reception 4 subframes prior to transmission
msg3_prog_subframe = (RA_template->Msg3_subframe + 6)%10;
if (RA_template->Msg3_subframe<4) msg3_prog_frame=(RA_template->Msg3_frame+1023)&1023;
else msg3_prog_frame=RA_template->Msg3_frame;
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA %d CE level %d is active, Msg3 in (%d,%d), programmed in (%d,%d)\n",
module_idP,frameP,subframeP,CC_id,i,RA_template->rach_resource_type-1,
RA_template->Msg3_frame,RA_template->Msg3_subframe,
msg3_prog_frame,msg3_prog_subframe);
if ((msg3_prog_frame==frameP) &&
(msg3_prog_subframe==subframeP)) {
LOG_I(MAC,"Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d)\n",
frameP,subframeP,RA_template->Msg3_frame,RA_template->Msg3_subframe);
eNB->UL_req[CC_id].sfn_sf = (RA_template->Msg3_frame<<4) + RA_template->Msg3_subframe;
if (RA_template->msg3_round == 0) { // program ULSCH
ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus];
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_pdu));
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = eNB->ul_handle++;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = RA_template->rnti;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start = narrowband_to_first_rb(cc,RA_template->msg34_narrowband)+RA_template->msg3_first_rb;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = RA_template->msg3_nb_rb;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number = ((10*frameP)+subframeP)&7;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = get_TBS_UL(RA_template->msg3_mcs,
RA_template->msg3_nb_rb);
// Re13 fields
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.ue_type = RA_template->rach_resource_type>2 ? 2 : 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.total_number_of_repetitions = 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.repetition_number = 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.initial_transmission_sf_io = (RA_template->Msg3_frame*10)+RA_template->Msg3_subframe;
ul_req->number_of_pdus++;
}
}
}
else
if (RA_template->rach_resource_type>0) {
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA %d CE level %d is active, Msg3 in (%d,%d)\n",
module_idP,frameP,subframeP,CC_id,i,RA_template->rach_resource_type-1,
RA_template->Msg3_frame,RA_template->Msg3_subframe);
LOG_I(MAC,"Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d)\n",
frameP,subframeP,RA_template->Msg3_frame,RA_template->Msg3_subframe);
ul_config_pdu = &ul_req_body->ul_config_pdu_list[ul_req_body->number_of_pdus];
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_pdu));
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = eNB->ul_handle++;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = RA_template->rnti;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start = narrowband_to_first_rb(cc,RA_template->msg34_narrowband)+RA_template->msg3_first_rb;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = RA_template->msg3_nb_rb;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version = rvseq[RA_template->msg3_round];
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number = ((10*RA_template->Msg3_frame)+RA_template->Msg3_subframe)&7;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = get_TBS_UL(RA_template->msg3_mcs,
RA_template->msg3_nb_rb);
// Re13 fields
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.ue_type = RA_template->rach_resource_type>2 ? 2 : 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.total_number_of_repetitions = 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.repetition_number = 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.initial_transmission_sf_io = (RA_template->Msg3_frame*10)+RA_template->Msg3_subframe;
ul_req_body->number_of_pdus++;
} // if (RA_template->rach_resource_type>0) {
else
#endif
{
// program reception 4 subframes prior to transmission
msg3_prog_subframe = (RA_template->Msg3_subframe + 6)%10;
{
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA %d is active, Msg3 in (%d,%d)\n",
module_idP,frameP,subframeP,CC_id,i,RA_template->Msg3_frame,RA_template->Msg3_subframe);
if (RA_template->Msg3_subframe<4) msg3_prog_frame=(RA_template->Msg3_frame+1023)&1023;
else msg3_prog_frame=RA_template->Msg3_frame;
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA %d is active, Msg3 in (%d,%d), programmed in (%d,%d)\n",
module_idP,frameP,subframeP,CC_id,i,RA_template->Msg3_frame,RA_template->Msg3_subframe,
msg3_prog_frame,msg3_prog_subframe);
if ((msg3_prog_frame==frameP) &&
(msg3_prog_subframe==subframeP)) {
LOG_I(MAC,"Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d)\n",
frameP,subframeP,RA_template->Msg3_frame,RA_template->Msg3_subframe);
eNB->UL_req[CC_id].sfn_sf = (RA_template->Msg3_frame<<4) + RA_template->Msg3_subframe;
if (RA_template->msg3_round == 0) { // program ULSCH
ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus];
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_pdu));
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = eNB->ul_handle++;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = RA_template->rnti;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start = 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = get_TBS_UL(10,ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks);
ul_req->number_of_pdus++;
}
}
else { // program HI
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[hi_dci0_req->number_of_dci+hi_dci0_req->number_of_hi];
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_HI_PDU_TYPE;
hi_dci0_pdu->pdu_size = 2+sizeof(nfapi_hi_dci0_hi_pdu);
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.resource_block_start = 1; // note this is hard-coded like in fill_rar
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = 0;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0;
hi_dci0_req->number_of_hi++;
LOG_I(MAC,"[eNB %d][PUSCH-RA %x] CC_id %d Frame %d subframeP %d Scheduled (PHICH) RA %d (mcs %d, first rb %d, nb_rb %d,round %d)\n",
module_idP,RA_template[i].rnti,CC_id,frameP,subframeP,i,10,
1,1,
RA_template[i].msg3_round-1);
} // PHICH
} // non-BL/CE UE case
} // RA_active = TRUE
} // for RA_processes
} // for CCids
LOG_I(MAC,"Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d)\n",
frameP,subframeP,RA_template->Msg3_frame,RA_template->Msg3_subframe);
ul_config_pdu = &ul_req_body->ul_config_pdu_list[ul_req_body->number_of_pdus];
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_pdu));
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = eNB->ul_handle++;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = RA_template->rnti;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start = RA_template->msg3_first_rb;
AssertFatal(RA_template->msg3_nb_rb > 0, "nb_rb = 0\n");
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = RA_template->msg3_nb_rb;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version = rvseq[RA_template->msg3_round];
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number = subframe2harqpid(cc,RA_template->Msg3_frame,RA_template->Msg3_subframe);
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = get_TBS_UL(10,RA_template->msg3_nb_rb);
ul_req_body->number_of_pdus++;
// save UL scheduling information for preprocessor
for (j=0;j<RA_template->msg3_nb_rb;j++) cc->vrb_map_UL[RA_template->msg3_first_rb+j]=1;
if (RA_template->msg3_round != 0) { // program HI too
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[hi_dci0_req->number_of_dci+hi_dci0_req->number_of_hi];
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_HI_PDU_TYPE;
hi_dci0_pdu->pdu_size = 2+sizeof(nfapi_hi_dci0_hi_pdu);
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.resource_block_start = RA_template->msg3_first_rb;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = 0;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0;
hi_dci0_req->number_of_hi++;
// save UL scheduling information for preprocessor
for (j=0;j<RA_template->msg3_nb_rb;j++) cc->vrb_map_UL[RA_template->msg3_first_rb+j]=1;
LOG_I(MAC,"[eNB %d][PUSCH-RA %x] CC_id %d Frame %d subframeP %d Scheduled (PHICH) RA %d (mcs %d, first rb %d, nb_rb %d,round %d)\n",
module_idP,RA_template->rnti,CC_id,frameP,subframeP,i,10,
1,1,
RA_template->msg3_round-1);
} // if (RA_template->msg3_round != 0) { // program HI too
} // non-BL/CE UE case
}
void generate_Msg2(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t subframeP,RA_TEMPLATE *RA_template) {
@@ -347,7 +325,7 @@ void generate_Msg2(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
if ((RA_template->Msg2_frame == frameP) && (RA_template->Msg2_subframe == subframeP)) {
// Program PDSCH
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, Programming PDSCH %d\n",
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, Programming PDSCH\n",
module_idP,frameP,subframeP);
RA_template->generate_rar = 0;
@@ -389,8 +367,7 @@ void generate_Msg2(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
// Program UL processing for Msg3, same as regular LTE
get_Msg3alloc(&cc[CC_idP],subframeP,frameP,&RA_template->Msg3_frame,&RA_template->Msg3_subframe);
add_msg3(module_idP,CC_idP, RA_template,frameP,subframeP);
fill_rar_br(eNB,CC_idP,RA_template,frameP,subframeP,cc[CC_idP].RAR_pdu.payload,RA_template->rach_resource_type-1);
// DL request
eNB->TX_req[CC_idP].sfn_sf = (frameP<<3)+subframeP;
@@ -416,7 +393,8 @@ void generate_Msg2(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
RA_template->RA_dci_fmt1,
RA_template->RA_dci_size_bits1);
// Allocate 4 PRBS starting in RB 0
first_rb = 0;
vrb_map[first_rb] = 1;
vrb_map[first_rb+1] = 1;
@@ -440,7 +418,8 @@ void generate_Msg2(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.virtual_resource_block_assignment_flag = 0;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,4);
// This checks if the above DCI allocation is feasible in current subframe
if (!CCE_allocation_infeasible(module_idP,CC_idP,1,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,RA_template->RA_rnti)) {
LOG_D(MAC,"Frame %d: Subframe %d : Adding common DCI for RA_RNTI %x\n",
frameP,subframeP,RA_template->RA_rnti);
@@ -477,10 +456,13 @@ void generate_Msg2(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
// Program UL processing for Msg3
get_Msg3alloc(&cc[CC_idP],subframeP,frameP,&RA_template->Msg3_frame,&RA_template->Msg3_subframe);
LOG_I(MAC,"Frame %d, Subframe %d: Setting Msg3 reception for Frame %d Subframe %d\n",
frameP,subframeP,RA_template->Msg3_frame,RA_template->Msg3_subframe);
fill_rar(module_idP,CC_idP,frameP,cc[CC_idP].RAR_pdu.payload,N_RB_DL,7);
add_msg3(module_idP,CC_idP, RA_template,frameP,subframeP);
// DL request
eNB->TX_req[CC_idP].sfn_sf = (frameP<<3)+subframeP;
TX_req = &eNB->TX_req[CC_idP].tx_request_body.tx_pdu_list[eNB->TX_req[CC_idP].tx_request_body.number_of_pdus];
@@ -517,7 +499,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
nfapi_ul_config_request_body_t *ul_req;
uint8_t lcid;
uint8_t offset;
int harq_pid;
#ifdef Rel14
@@ -579,13 +561,16 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
dl_req = &eNB->DL_req[CC_idP].dl_config_request_body;
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
ul_req = &eNB->UL_req[CC_idP].ul_config_request_body;
ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus];
N_RB_DL = to_prb(cc[CC_idP].mib->message.dl_Bandwidth);
UE_id = find_UE_id(module_idP,RA_template->rnti);
AssertFatal(UE_id>=0,"Can't find UE for t-crnti\n");
// set HARQ process round to 0 for this UE
if (cc->tdd_Config) harq_pid = ((frameP*10)+subframeP)%10;
else harq_pid = ((frameP*10)+subframeP)&7;
// Get RRCConnectionSetup for Piggyback
rrc_sdu_length = mac_rrc_data_req(module_idP,
@@ -598,11 +583,11 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
module_idP,
0); // not used in this case
AssertFatal(rrc_sdu_length>=0,
AssertFatal(rrc_sdu_length>0,
"[MAC][eNB Scheduler] CCCH not allocated\n");
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: UE_id %d, rrc_sdu_length %d\n",
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: UE_id %d, rrc_sdu_length %d\n",
module_idP, CC_idP, frameP, subframeP,UE_id, rrc_sdu_length);
@@ -657,7 +642,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_process = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_process = harq_pid;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi_length = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi_flag = 0;
@@ -741,23 +726,22 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
RA_template->generate_Msg4=0;
RA_template->wait_ack_Msg4=1;
RA_template->RA_active = FALSE;
lcid=0;
// set HARQ process 0 round to 0 for this UE
UE_list->UE_sched_ctrl[UE_id].round[CC_idP] = 0;
UE_list->UE_sched_ctrl[UE_id].round[CC_idP][harq_pid] = 0;
msg4_header = 1+6+1; // CR header, CR CE, SDU header
if ((RA_template->Msg4_TBsize - rrc_sdu_length - msg4_header) <= 2) {
msg4_padding = RA_template->Msg4_TBsize - rrc_sdu_length - msg4_header;
if ((RA_template->msg4_TBsize - rrc_sdu_length - msg4_header) <= 2) {
msg4_padding = RA_template->msg4_TBsize - rrc_sdu_length - msg4_header;
msg4_post_padding = 0;
} else {
msg4_padding = 0;
msg4_post_padding = RA_template->Msg4_TBsize - rrc_sdu_length - msg4_header -1;
msg4_post_padding = RA_template->msg4_TBsize - rrc_sdu_length - msg4_header -1;
}
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d subframeP %d Msg4 : TBS %d, sdu_len %d, msg4_header %d, msg4_padding %d, msg4_post_padding %d\n",
module_idP,CC_idP,frameP,subframeP,RA_template->Msg4_TBsize,rrc_sdu_length,msg4_header,msg4_padding,msg4_post_padding);
module_idP,CC_idP,frameP,subframeP,RA_template->msg4_TBsize,rrc_sdu_length,msg4_header,msg4_padding,msg4_post_padding);
DevAssert( UE_id != UE_INDEX_INVALID ); // FIXME not sure how to gracefully return
// CHECK THIS: &cc[CC_idP].CCCH_pdu.payload[0]
offset = generate_dlsch_header((unsigned char*)eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0],
@@ -788,8 +772,10 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
int absSF = (RA_template->Msg3_frame*10)+RA_template->Msg3_subframe;
// see Section 10.2 from 36.213
int ackNAK_absSF = absSF + reps + 4;
eNB->UL_req[CC_idP].sfn_sf = ((ackNAK_absSF/10)<<4) + (ackNAK_absSF%10);
AssertFatal(reps>2,"Have to handle programming of ACK when PDSCH repetitions is > 2\n");
ul_req = &eNB->UL_req_tmp[CC_idP][ackNAK_absSF%10].ul_config_request_body;
ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus];
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_uci_harq_pdu));
ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel8.handle = 0; // don't know how to use this
@@ -812,7 +798,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
}
ul_req->number_of_pdus++;
T(T_ENB_MAC_UE_DL_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_idP), T_INT(RA_template->rnti), T_INT(frameP), T_INT(subframeP),
T_INT(0 /*harq_pid always 0?*/), T_BUFFER(&eNB->UE_list.DLSCH_pdu[CC_idP][0][UE_id].payload[0], RA_template->Msg4_TBsize));
T_INT(0 /*harq_pid always 0?*/), T_BUFFER(&eNB->UE_list.DLSCH_pdu[CC_idP][0][UE_id].payload[0], RA_template->msg4_TBsize));
if (opt_enabled==1) {
trace_pdu(1, (uint8_t *)eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0],
@@ -831,6 +817,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Generating Msg4 with RRC Piggyback (RNTI %x)\n",
module_idP, CC_idP, frameP, subframeP,RA_template->rnti);
/// Choose first 4 RBs for Msg4, should really check that these are free!
first_rb=0;
vrb_map[first_rb] = 1;
@@ -839,48 +826,40 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
vrb_map[first_rb+3] = 1;
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dci_dl_pdu));
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = 4;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = RA_template->rnti;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type = 1; // C-RNTI : see Table 4-10 from SCF082 - nFAPI specifications
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.transmission_power = 6000; // equal to RS power
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.harq_process = 0;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.tpc = 1; // no TPC
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.new_data_indicator_1 = 1;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.redundancy_version_1 = 0;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.virtual_resource_block_assignment_flag = 0;
// Compute MCS for 3 PRB
// Compute MCS/TBS for 3 PRB (coded on 4 vrb)
msg4_header = 1+6+1; // CR header, CR CE, SDU header
if ((rrc_sdu_length+msg4_header) <= 22) {
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_1 = 4;
RA_template->Msg4_TBsize = 22;
RA_template->msg4_mcs = 4;
RA_template->msg4_TBsize = 22;
} else if ((rrc_sdu_length+msg4_header) <= 28) {
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_1 = 5;
RA_template->Msg4_TBsize = 28;
RA_template->msg4_mcs = 5;
RA_template->msg4_TBsize = 28;
} else if ((rrc_sdu_length+msg4_header) <= 32) {
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_1 = 6;
RA_template->Msg4_TBsize = 32;
RA_template->msg4_mcs = 6;
RA_template->msg4_TBsize = 32;
} else if ((rrc_sdu_length+msg4_header) <= 41) {
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_1 = 7;
RA_template->Msg4_TBsize = 41;
RA_template->msg4_mcs = 7;
RA_template->msg4_TBsize = 41;
} else if ((rrc_sdu_length+msg4_header) <= 49) {
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_1 = 8;
RA_template->Msg4_TBsize = 49;
RA_template->msg4_mcs = 8;
RA_template->msg4_TBsize = 49;
} else if ((rrc_sdu_length+msg4_header) <= 57) {
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_1 = 9;
RA_template->Msg4_TBsize = 57;
RA_template->msg4_mcs = 9;
RA_template->msg4_TBsize = 57;
}
RA_template->Msg4_mcs = dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_1;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding= getRIV(N_RB_DL,first_rb,4);
fill_nfapi_dl_dci_1A(dl_config_pdu,
4, // aggregation_level
RA_template->rnti, // rnti
1, // rnti_type, CRNTI
harq_pid, // harq_process
1, // tpc, none
getRIV(N_RB_DL,first_rb,4), // resource_block_coding
RA_template->msg4_mcs, // mcs
1, // ndi
0, // rv
0); // vrb_flag
if (!CCE_allocation_infeasible(module_idP,CC_idP,0,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,RA_template->rnti)) {
dl_req->number_dci++;
@@ -888,22 +867,26 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
RA_template->generate_Msg4=0;
RA_template->wait_ack_Msg4=1;
RA_template->RA_active = FALSE;
RA_template->Msg4_frame++;
RA_template->Msg4_frame&=1023;
lcid=0;
// set HARQ process 0 round to 0 for this UE
UE_list->UE_sched_ctrl[UE_id].round[CC_idP] = 0;
if (cc->tdd_Config) harq_pid = ((frameP*10)+subframeP)%10;
else harq_pid = ((frameP*10)+subframeP)&7;
UE_list->UE_sched_ctrl[UE_id].round[CC_idP][harq_pid] = 0;
if ((RA_template->Msg4_TBsize - rrc_sdu_length - msg4_header) <= 2) {
msg4_padding = RA_template->Msg4_TBsize - rrc_sdu_length - msg4_header;
if ((RA_template->msg4_TBsize - rrc_sdu_length - msg4_header) <= 2) {
msg4_padding = RA_template->msg4_TBsize - rrc_sdu_length - msg4_header;
msg4_post_padding = 0;
} else {
msg4_padding = 0;
msg4_post_padding = RA_template->Msg4_TBsize - rrc_sdu_length - msg4_header -1;
msg4_post_padding = RA_template->msg4_TBsize - rrc_sdu_length - msg4_header -1;
}
LOG_I(MAC,"[eNB %d][RAPROC] CC_idP %d Frame %d subframeP %d Msg4 : TBS %d, sdu_len %d, msg4_header %d, msg4_padding %d, msg4_post_padding %d\n",
module_idP,CC_idP,frameP,subframeP,RA_template->Msg4_TBsize,rrc_sdu_length,msg4_header,msg4_padding,msg4_post_padding);
module_idP,CC_idP,frameP,subframeP,RA_template->msg4_TBsize,rrc_sdu_length,msg4_header,msg4_padding,msg4_post_padding);
DevAssert( UE_id != UE_INDEX_INVALID ); // FIXME not sure how to gracefully return
// CHECK THIS: &cc[CC_idP].CCCH_pdu.payload[0]
offset = generate_dlsch_header((unsigned char*)eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0],
@@ -920,35 +903,50 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
&cc[CC_idP].CCCH_pdu.payload[0],
rrc_sdu_length);
// DLSCH Config
fill_nfapi_dlsch_config(eNB,
dl_req,
RA_template->msg4_TBsize,
eNB->pdu_index[CC_idP]++,
RA_template->rnti,
2, // resource_allocation_type : format 1A/1B/1D
0, // virtual_resource_block_assignment_flag : localized
getRIV(N_RB_DL,first_rb,4), // resource_block_coding : RIV, 4 PRB
2, // modulation: QPSK
0, // redundancy version
1, // transport_blocks
0, // transport_block_to_codeword_swap_flag (0)
(cc->p_eNB==1 ) ? 0 : 1, // transmission_scheme
1, // number of layers
1, // number of subbands
//0, // codebook index
1, // ue_category_capacity
4, // pa: 0 dB
0, // delta_power_offset_index
0, // ngap
1, // NPRB = 3 like in DCI
(cc->p_eNB==1 ) ? 1 : 2, // transmission mode
1, // num_bf_prb_per_subband
1); // num_bf_vector
// DL request
eNB->TX_req[CC_idP].sfn_sf = (frameP<<3)+subframeP;
TX_req = &eNB->TX_req[CC_idP].tx_request_body.tx_pdu_list[eNB->TX_req[CC_idP].tx_request_body.number_of_pdus];
TX_req->pdu_length = rrc_sdu_length;
TX_req->pdu_index = eNB->pdu_index[CC_idP]++;
TX_req->num_segments = 1;
TX_req->segments[0].segment_length = rrc_sdu_length;
TX_req->segments[0].segment_data = eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0];
eNB->TX_req[CC_idP].tx_request_body.number_of_pdus++;
eNB->TX_req[CC_idP].sfn_sf = fill_nfapi_tx_req(&eNB->TX_req[CC_idP].tx_request_body,
(frameP*10)+subframeP,
rrc_sdu_length,
&eNB->pdu_index[CC_idP],
eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0]);
// Program PUCCH1a for ACK/NAK
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_uci_harq_pdu));
ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel8.handle = 0; // don't know how to use this
ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel8.rnti = RA_template->rnti;
if (cc[CC_idP].tdd_Config==NULL) { // FDD case
ul_config_pdu->uci_harq_pdu.harq_information.harq_information_rel8_fdd.n_pucch_1_0 = cc[CC_idP].radioResourceConfigCommon->pucch_ConfigCommon.n1PUCCH_AN + dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx;
// NOTE: How to fill in the rest of the n_pucch_1_0 information 213 Section 10.1.2.1 in the general case
ul_config_pdu->uci_harq_pdu.harq_information.harq_information_rel8_fdd.harq_size = 1; // 1-bit ACK/NAK
}
else {
AssertFatal(1==0,"PUCCH configuration for ACK/NAK not handled yet for TDD case yet\n");
}
ul_req->number_of_pdus++;
// Program ACK/NAK for Msg4 PDSCH
fill_nfapi_uci_acknak(module_idP,
CC_idP,
RA_template->rnti,
(frameP*10)+subframeP,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx);
T(T_ENB_MAC_UE_DL_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_idP), T_INT(RA_template->rnti), T_INT(frameP), T_INT(subframeP),
T_INT(0 /*harq_pid always 0?*/), T_BUFFER(&eNB->UE_list.DLSCH_pdu[CC_idP][0][UE_id].payload[0], RA_template->Msg4_TBsize));
T_INT(0 /*harq_pid always 0?*/), T_BUFFER(&eNB->UE_list.DLSCH_pdu[CC_idP][0][UE_id].payload[0], RA_template->msg4_TBsize));
if (opt_enabled==1) {
trace_pdu(1, (uint8_t *)eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0],
@@ -975,7 +973,7 @@ void check_Msg4_retransmission(module_id_t module_idP,int CC_idP,frame_t frameP,
UE_list_t *UE_list=&eNB->UE_list;
nfapi_dl_config_request_body_t *dl_req;
int round;
int round,harq_pid;
/*
#ifdef Rel14
COMMON_channels_t *cc = eNB->common_channels;
@@ -1011,67 +1009,81 @@ void check_Msg4_retransmission(module_id_t module_idP,int CC_idP,frame_t frameP,
*/
// check HARQ status and retransmit if necessary
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Checking if Msg4 was acknowledged: \tn",
module_idP,CC_idP,frameP,subframeP);
// Get candidate harq_pid from PHY
UE_id = find_UE_id(module_idP,RA_template->rnti);
AssertFatal(UE_id>=0,"Can't find UE for t-crnti\n");
round = UE_list->UE_sched_ctrl[UE_id].round[CC_idP];
if (cc[CC_idP].tdd_Config) harq_pid = ((frameP*10)+subframeP)%10;
else harq_pid = ((frameP*10)+subframeP)&7;
round = UE_list->UE_sched_ctrl[UE_id].round[CC_idP][harq_pid];
vrb_map = cc[CC_idP].vrb_map;
dl_req = &eNB->DL_req[CC_idP].dl_config_request_body;
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
N_RB_DL = to_prb(cc[CC_idP].mib->message.dl_Bandwidth);
if (round>0) {
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Checking if Msg4 was acknowledged (round %d)\n",
module_idP,CC_idP,frameP,subframeP,round);
if (round!=8) {
#ifdef Rel14
AssertFatal(1==0,"Msg4 Retransmissions not handled yet for BL/CE UEs\n");
#endif
{
if ( (RA_template->Msg4_frame == frameP) && (RA_template->Msg4_subframe == subframeP)) {
//RA_template->wait_ack_Msg4++;
// we have to schedule a retransmission
first_rb=0;
vrb_map[first_rb] = 1;
vrb_map[first_rb+1] = 1;
vrb_map[first_rb+2] = 1;
vrb_map[first_rb+3] = 1;
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dci_dl_pdu));
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = 4;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = RA_template->rnti;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type = 1; // C-RNTI : see Table 4-10 from SCF082 - nFAPI specifications
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.transmission_power = 6000; // equal to RS power
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.harq_process = 0;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.tpc = 1; // no TPC
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.new_data_indicator_1 = 1;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.redundancy_version_1 = round;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_1 = RA_template->Msg4_mcs;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.virtual_resource_block_assignment_flag = 0;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding= getRIV(N_RB_DL,first_rb,4);
if (!CCE_allocation_infeasible(module_idP,CC_idP,0,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,RA_template->rnti)) {
dl_req->number_dci++;
dl_req->number_pdu++;
LOG_I(MAC,"msg4 retransmission for rnti %x (round %d) fsf %d/%d\n", RA_template->rnti, round, frameP, subframeP);
}
else
LOG_I(MAC,"msg4 retransmission for rnti %x (round %d) fsf %d/%d CCE allocation failed!\n", RA_template->rnti, round, frameP, subframeP);
LOG_W(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Msg4 not acknowledged, adding ue specific dci (rnti %x) for RA (Msg4 Retransmission)\n",
module_idP,CC_idP,frameP,subframeP,RA_template->rnti);
}
if (RA_template->rach_resource_type>0) {
AssertFatal(1==0,"Msg4 Retransmissions not handled yet for BL/CE UEs\n");
}
else
#endif
{
if ( (RA_template->Msg4_frame == frameP) && (RA_template->Msg4_subframe == subframeP)) {
//RA_template->wait_ack_Msg4++;
// we have to schedule a retransmission
first_rb=0;
vrb_map[first_rb] = 1;
vrb_map[first_rb+1] = 1;
vrb_map[first_rb+2] = 1;
vrb_map[first_rb+3] = 1;
fill_nfapi_dl_dci_1A(dl_config_pdu,
4, // aggregation_level
RA_template->rnti, // rnti
1, // rnti_type, CRNTI
0, // harq_process
1, // tpc, none
getRIV(N_RB_DL,first_rb,4), // resource_block_coding
RA_template->msg4_mcs, // mcs
1, // ndi
round, // rv
0); // vrb_flag
if (!CCE_allocation_infeasible(module_idP,CC_idP,0,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,RA_template->rnti)) {
dl_req->number_dci++;
dl_req->number_pdu++;
LOG_I(MAC,"msg4 retransmission for rnti %x (round %d) fsf %d/%d\n", RA_template->rnti, round, frameP, subframeP);
}
else
LOG_I(MAC,"msg4 retransmission for rnti %x (round %d) fsf %d/%d CCE allocation failed!\n", RA_template->rnti, round, frameP, subframeP);
LOG_W(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Msg4 not acknowledged, adding ue specific dci (rnti %x) for RA (Msg4 Retransmission)\n",
module_idP,CC_idP,frameP,subframeP,RA_template->rnti);
// Program PUCCH1a for ACK/NAK
fill_nfapi_uci_acknak(module_idP,CC_idP,
RA_template->rnti,
(frameP*10)+subframeP,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx);
// prepare frame for retransmission
RA_template->Msg4_frame++;
RA_template->Msg4_frame&=1023;
} // Msg4 frame/subframe
} // regular LTE case
} else {
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d : Msg4 acknowledged\n",module_idP,CC_idP,frameP,subframeP);
RA_template->wait_ack_Msg4=0;
@@ -1095,7 +1107,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP)
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
// skip UL component carriers
// skip UL component carriers if TDD
if (is_UL_sf(&cc[CC_id],subframeP)==1) continue;
@@ -1141,15 +1153,20 @@ void initiate_ra_proc(module_id_t module_idP,
COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_id];
RA_TEMPLATE *RA_template = &cc->RA_template[0];
struct PRACH_ConfigSIB_v1310 *ext4_prach=cc->radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310;
PRACH_ParametersListCE_r13_t *prach_ParametersListCE_r13= &ext4_prach->prach_ParametersListCE_r13;
struct PRACH_ConfigSIB_v1310 *ext4_prach = NULL;
PRACH_ParametersListCE_r13_t *prach_ParametersListCE_r13 = NULL;
if (cc->radioResourceConfigCommon_BR && cc->radioResourceConfigCommon_BR->ext4) {
ext4_prach=cc->radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310;
prach_ParametersListCE_r13= &ext4_prach->prach_ParametersListCE_r13;
}
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d Initiating RA procedure for preamble index %d\n",module_idP,CC_id,frameP,subframeP,preamble_index);
#ifdef Rel14
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, Subframe %d PRACH resource type %d\n",module_idP,CC_id,frameP,subframeP,rach_resource_type);
#endif
if (prach_ParametersListCE_r13->list.count<rach_resource_type) {
if (prach_ParametersListCE_r13 &&
prach_ParametersListCE_r13->list.count<rach_resource_type) {
LOG_E(MAC,"[eNB %d][RAPROC] CC_id %d Received impossible PRACH resource type %d, only %d CE levels configured\n",
module_idP,CC_id,
rach_resource_type,
openair2/LAYER2/MAC/eNB_scheduler_bch.c
+12 -5
View File
@@ -240,7 +240,7 @@ schedule_SIB1_BR(
// Rel13 fields
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.ue_type = 1; // CEModeA UE
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.pdsch_payload_type = 0; // SIB1-BR
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.initial_transmission_sf_io = 0xFFFF; // absolute SF
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.initial_transmission_sf_io = 0xFFFF; // absolute SFx
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ;
dl_req->number_pdu++;
@@ -401,8 +401,8 @@ schedule_SI_BR(
vrb_map[first_rb+5] = 1;
if ((frameP&1023) < 200) LOG_D(MAC,"[eNB %d] Frame %d Subframe %d: SI_BR->DLSCH CC_id %d, Narrowband %d rvidx %d (sf_mod_period %d : si_WindowLength_BR_r13 %d : si_RepetitionPattern_r13 %d) bcch_sdu_length %d\n",
module_idP,frameP,subframeP,CC_id,si_Narrowband_r13-1,rvidx,
sf_mod_period,si_WindowLength_BR_r13,si_RepetitionPattern_r13,
module_idP,frameP,subframeP,CC_id,(int)si_Narrowband_r13-1,rvidx,
sf_mod_period,(int)si_WindowLength_BR_r13,(int)si_RepetitionPattern_r13,
bcch_sdu_length);
@@ -524,7 +524,7 @@ void schedule_mib(module_id_t module_idP,
LOG_D(MAC,"Frame %d, subframe %d: Adding BCH PDU in position %d (length %d)\n",
frameP,subframeP,dl_req->number_pdu,mib_sdu_length);
if ((frameP&1023) < 40) LOG_D(MAC,"[eNB %d] Frame %d : MIB->BCH CC_id %d, Received %d bytes (cc->mib->message.schedulingInfoSIB1_BR_r13 %d)\n",module_idP,frameP,CC_id,mib_sdu_length,cc->mib->message.schedulingInfoSIB1_BR_r13);
if ((frameP&1023) < 40) LOG_D(MAC,"[eNB %d] Frame %d : MIB->BCH CC_id %d, Received %d bytes (cc->mib->message.schedulingInfoSIB1_BR_r13 %d)\n",module_idP,frameP,CC_id,mib_sdu_length,(int)cc->mib->message.schedulingInfoSIB1_BR_r13);
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
@@ -671,7 +671,14 @@ schedule_SI(
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.redundancy_version_1 = 0;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,4);
// Rel10 fields
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel10.pdsch_start = 3;
// Rel13 fields
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.ue_type = 0; // regular UE
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.pdsch_payload_type = 2; // not BR
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.initial_transmission_sf_io = 0xFFFF; // absolute SF
if (!CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,SI_RNTI)) {
LOG_D(MAC,"Frame %d: Subframe %d : Adding common DCI for S_RNTI\n",
frameP,subframeP);
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+100 -36
View File
@@ -609,8 +609,12 @@ schedule_ue_spec(
}
nb_available_rb = ue_sched_ctl->pre_nb_available_rbs[CC_id];
harq_pid = ue_sched_ctl->harq_pid[CC_id];
round = ue_sched_ctl->round[CC_id];
if (cc->tdd_Config) harq_pid = ((frameP*10)+subframeP)%10;
else harq_pid = ((frameP*10)+subframeP)&7;
round = ue_sched_ctl->round[CC_id][harq_pid];
UE_list->eNB_UE_stats[CC_id][UE_id].crnti= rnti;
UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status=mac_eNB_get_rrc_status(module_idP,rnti);
UE_list->eNB_UE_stats[CC_id][UE_id].harq_pid = harq_pid;
@@ -645,8 +649,10 @@ schedule_ue_spec(
/* process retransmission */
if (round > 0) {
// get freq_allocation
nb_rb = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
TBS = get_TBS_DL(UE_list->UE_template[CC_id][UE_id].oldmcs1[harq_pid],nb_rb);
if (nb_rb <= nb_available_rb) {
if (cc[CC_id].tdd_Config != NULL) {
@@ -729,9 +735,38 @@ schedule_ue_spec(
dl_req->number_dci++;
dl_req->number_pdu++;
fill_nfapi_dlsch_config(eNB,dl_req,
TBS,
eNB->pdu_index[CC_id],
rnti,
0, // type 0 allocation from 7.1.6 in 36.213
0, // virtual_resource_block_assignment_flag, unused here
0, // resource_block_coding, to be filled in later
getQm(UE_list->UE_template[CC_id][UE_id].oldmcs1[harq_pid]),
round&3 , // redundancy version
1, // transport blocks
0, // transport block to codeword swap flag
cc[CC_id].p_eNB == 1 ? 0 : 1, // transmission_scheme
1, // number of layers
1, // number of subbands
// uint8_t codebook_index,
4, // UE category capacity
UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->pdsch_ConfigDedicated->p_a,
0, // delta_power_offset for TM5
0, // ngap
0, // nprb
cc[CC_id].p_eNB == 1 ? 1 : 2, // transmission mode
0, //number of PRBs treated as one subband, not used here
0 // number of beamforming vectors, not used here
);
eNB->pdu_index[CC_id]++;
program_dlsch_acknak(module_idP,CC_id,UE_id,frameP,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx);
// No TX request for retransmission (check if null request for FAPI)
}
else {
// No TX request for retransmission (check if null request for FAPI)
LOG_W(MAC,"Frame %d, Subframe %d: Dropping DLSCH allocation for UE %d\%x, infeasible CCE allocation\n",
frameP,subframeP,UE_id,rnti);
}
}
@@ -789,7 +824,7 @@ schedule_ue_spec(
ENB_FLAG_YES,
MBMS_FLAG_NO,
DCCH,
TBS, //not used
TBS, //not used
(char *)&dlsch_buffer[0]);
T(T_ENB_MAC_UE_DL_SDU, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP), T_INT(subframeP),
@@ -993,15 +1028,7 @@ schedule_ue_spec(
j = j+1;
}
}
/*
RC.eNB[module_idP][CC_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = nb_rb;
RC.eNB[module_idP][CC_id]->mu_mimo_mode[UE_id].dl_pow_off = ue_sched_ctl->dl_pow_off[CC_id];
for(j=0; j<N_RBG[CC_id]; j++) {
RC.eNB[module_idP][CC_id]->mu_mimo_mode[UE_id].rballoc_sub[j] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j];
}
*/
// decrease mcs until TBS falls below required length
while ((TBS > (sdu_length_total + header_len_dcch + header_len_dtch + ta_len)) && (mcs>0)) {
mcs--;
@@ -1120,7 +1147,7 @@ schedule_ue_spec(
// this is the normalized RX power
eNB_UE_stats = &UE_list->eNB_UE_stats[CC_id][UE_id];
normalized_rx_power = eNB_UE_stats->Po_PUCCH_dBm;
target_rx_power = get_target_pucch_rx_power(module_idP,CC_id) + 20;
target_rx_power = cc[CC_id].radioResourceConfigCommon->uplinkPowerControlCommon.p0_NominalPUCCH + 20;
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
@@ -1184,27 +1211,59 @@ schedule_ue_spec(
module_idP,CC_id,harq_pid,round,mcs);
}
dl_req->number_dci++;
dl_req->number_pdu++;
// Toggle NDI for next time
LOG_D(MAC,"CC_id %d Frame %d, subframeP %d: Toggling Format1 NDI for UE %d (rnti %x/%d) oldNDI %d\n",
CC_id, frameP,subframeP,UE_id,
UE_list->UE_template[CC_id][UE_id].rnti,harq_pid,UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid]);
UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid]=1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
UE_list->UE_template[CC_id][UE_id].oldmcs1[harq_pid] = mcs;
UE_list->UE_template[CC_id][UE_id].oldmcs2[harq_pid] = 0;
eNB->TX_req[CC_id].sfn_sf = (frameP<<3)+subframeP;
TX_req = &eNB->TX_req[CC_id].tx_request_body.tx_pdu_list[eNB->TX_req[CC_id].tx_request_body.number_of_pdus];
TX_req->pdu_length = TBS;
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
TX_req->num_segments = 1;
TX_req->segments[0].segment_length = TBS;
TX_req->segments[0].segment_data = eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[harq_pid];
eNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
if (!CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,rnti)) {
dl_req->number_dci++;
dl_req->number_pdu++;
// Toggle NDI for next time
LOG_D(MAC,"CC_id %d Frame %d, subframeP %d: Toggling Format1 NDI for UE %d (rnti %x/%d) oldNDI %d\n",
CC_id, frameP,subframeP,UE_id,
rnti,harq_pid,UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid]);
UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid]=1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
UE_list->UE_template[CC_id][UE_id].oldmcs1[harq_pid] = mcs;
UE_list->UE_template[CC_id][UE_id].oldmcs2[harq_pid] = 0;
AssertFatal(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated!=NULL,"physicalConfigDedicated is NULL\n");
AssertFatal(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->pdsch_ConfigDedicated!=NULL,"physicalConfigDedicated->pdsch_ConfigDedicated is NULL\n");
fill_nfapi_dlsch_config(eNB,dl_req,
TBS,
eNB->pdu_index[CC_id],
rnti,
0, // type 0 allocation from 7.1.6 in 36.213
0, // virtual_resource_block_assignment_flag, unused here
0, // resource_block_coding, to be filled in later
getQm(mcs),
0, // redundancy version
1, // transport blocks
0, // transport block to codeword swap flag
cc[CC_id].p_eNB == 1 ? 0 : 1, // transmission_scheme
1, // number of layers
1, // number of subbands
// uint8_t codebook_index,
4, // UE category capacity
UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->pdsch_ConfigDedicated->p_a,
0, // delta_power_offset for TM5
0, // ngap
0, // nprb
cc[CC_id].p_eNB == 1 ? 1 : 2, // transmission mode
0, //number of PRBs treated as one subband, not used here
0 // number of beamforming vectors, not used here
);
eNB->TX_req[CC_id].sfn_sf = fill_nfapi_tx_req(&eNB->TX_req[CC_id].tx_request_body,
(frameP*10)+subframeP,
TBS,
&eNB->pdu_index[CC_id],
eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[harq_pid]);
eNB->pdu_index[CC_id]++;
program_dlsch_acknak(module_idP,CC_id,UE_id,frameP,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx);
}
else {
LOG_W(MAC,"Frame %d, Subframe %d: Dropping DLSCH allocation for UE %d/%x, infeasible CCE allocations\n",
frameP,subframeP,UE_id,rnti);
}
} else { // There is no data from RLC or MAC header, so don't schedule
}
@@ -1277,7 +1336,8 @@ fill_DLSCH_dci(
// clear scheduling flag
eNB_dlsch_info[module_idP][CC_id][UE_id].status = S_DL_WAITING;
rnti = UE_RNTI(module_idP,UE_id);
harq_pid = UE_list->UE_sched_ctrl[UE_id].harq_pid[CC_id];
if (cc->tdd_Config) harq_pid = ((frameP*10)+subframeP)%10;
else harq_pid = ((frameP*10)+subframeP)&7;
nb_rb = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
eNB_UE_stats = &UE_list->eNB_UE_stats[CC_id][UE_id];
@@ -1297,7 +1357,11 @@ fill_DLSCH_dci(
(dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti == rnti)) {
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_allocation_type = 0;
break;
}
else if ((dl_config_pdu->pdu_type == NFAPI_DL_CONFIG_DLSCH_PDU_TYPE)&&
(dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti == rnti)) {
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 0;
}
}
}
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+1520 -12
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+113 -17
View File
@@ -133,7 +133,7 @@ void rx_sdu(const module_id_t enb_mod_idP,
"maxHARQ %d should be greater than 1\n",
(int)eNB->common_channels[CC_idP].radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx);
if (sduP==NULL) { // we've got an error
if (sduP==NULL) { // we've got an error on Msg3
LOG_I(MAC,"[eNB %d] CC_id %d, RA %d ULSCH in error in round %d/%d\n",enb_mod_idP,CC_idP,RA_id,
RA_template[RA_id].msg3_round,
(int)eNB->common_channels[CC_idP].radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx);
@@ -145,6 +145,7 @@ void rx_sdu(const module_id_t enb_mod_idP,
// prepare handling of retransmission
RA_template[RA_id].Msg3_frame += ((RA_template[RA_id].Msg3_subframe>1) ? 1 : 0);
RA_template[RA_id].Msg3_subframe = (RA_template[RA_id].Msg3_subframe+8)%10;
add_msg3(enb_mod_idP,CC_idP, &RA_template[RA_id],frameP,subframeP);
return;
}
}
@@ -333,7 +334,7 @@ void rx_sdu(const module_id_t enb_mod_idP,
}
for (i=0; i<num_sdu; i++) {
LOG_D(MAC,"SDU Number %d MAC Subheader SDU_LCID %d, length %d\n",i,rx_lcids[i],rx_lengths[i]);
LOG_I(MAC,"SDU Number %d MAC Subheader SDU_LCID %d, length %d\n",i,rx_lcids[i],rx_lengths[i]);
T(T_ENB_MAC_UE_UL_SDU, T_INT(enb_mod_idP), T_INT(CC_idP), T_INT(rntiP), T_INT(frameP), T_INT(subframeP),
T_INT(rx_lcids[i]), T_INT(rx_lengths[i]));
@@ -343,8 +344,8 @@ void rx_sdu(const module_id_t enb_mod_idP,
switch (rx_lcids[i]) {
case CCCH :
if (rx_lengths[i] > CCCH_PAYLOAD_SIZE_MAX) {
LOG_E(MAC, "[eNB %d/%d] frame %d received CCCH of size %d (too big, maximum allowed is %d), dropping packet\n",
enb_mod_idP, CC_idP, frameP, rx_lengths[i], CCCH_PAYLOAD_SIZE_MAX);
LOG_E(MAC, "[eNB %d/%d] frame %d received CCCH of size %d (too big, maximum allowed is %d, sdu_len %d), dropping packet\n",
enb_mod_idP, CC_idP, frameP, rx_lengths[i], CCCH_PAYLOAD_SIZE_MAX,sdu_lenP);
break;
}
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, Received CCCH: %x.%x.%x.%x.%x.%x, Terminating RA procedure for UE rnti %x\n",
@@ -407,7 +408,17 @@ void rx_sdu(const module_id_t enb_mod_idP,
// prepare transmission of Msg4
RA_template->generate_Msg4 = 1;
RA_template->wait_ack_Msg4 = 0;
// Program ACK for PHICH
LOG_I(MAC,"Programming PHICH ACK for Msg3 rnti %x\n",RA_template->rnti);
nfapi_hi_dci0_request_body_t *hi_dci0_req = &eNB->HI_DCI0_req[CC_idP].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[hi_dci0_req->number_of_dci+hi_dci0_req->number_of_hi];
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_HI_PDU_TYPE;
hi_dci0_pdu->pdu_size = 2+sizeof(nfapi_hi_dci0_hi_pdu);
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.resource_block_start = RA_template->msg3_first_rb;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = 0;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 1;
hi_dci0_req->number_of_hi++;
// Program Msg4 PDCCH+DLSCH/MPDCCH transmission 4 subframes from now, // Check if this is ok for BL/CE, or if the rule is different
RA_template->Msg4_frame = frameP + ((subframeP>5) ? 1 : 0);
RA_template->Msg4_subframe = (subframeP+4)%10;
@@ -786,7 +797,7 @@ void schedule_ulsch(module_id_t module_idP,
void schedule_ulsch_rnti(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
unsigned char sched_subframe,
unsigned char sched_subframeP,
uint16_t *first_rb)
{
@@ -812,8 +823,22 @@ void schedule_ulsch_rnti(module_id_t module_idP,
UE_list_t *UE_list=&eNB->UE_list;
UE_TEMPLATE *UE_template;
UE_sched_ctrl *UE_sched_ctrl;
nfapi_hi_dci0_request_body_t *hi_dci0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
int tmode;
int sched_frame=frameP;
if (sched_subframeP<subframeP) sched_frame++;
nfapi_hi_dci0_request_body_t *hi_dci0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
nfapi_ul_config_request_pdu_t *ul_config_pdu;
nfapi_ul_config_request_body_t *ul_req_tmp = &eNB->UL_req_tmp[CC_id][sched_subframeP].ul_config_request_body;
ul_config_pdu = &ul_req_tmp->ul_config_pdu_list[0];
LOG_D(MAC,"entering ulsch preprocesor\n");
ulsch_scheduler_pre_processor(module_idP,
@@ -823,9 +848,9 @@ void schedule_ulsch_rnti(module_id_t module_idP,
LOG_D(MAC,"exiting ulsch preprocesor\n");
eNB->HI_DCI0_req[CC_id].sfn_sf = (frameP<<3)+subframeP;
hi_dci0_req->number_of_dci = 0;
hi_dci0_req->number_of_hi = 0;
eNB->HI_DCI0_req[CC_id].sfn_sf = (frameP<<4)+subframeP;
// loop over all active UEs
for (UE_id=UE_list->head_ul; UE_id>=0; UE_id=UE_list->next_ul[UE_id]) {
@@ -904,8 +929,8 @@ abort();
UE_template = &UE_list->UE_template[CC_id][UE_id];
UE_sched_ctrl = &UE_list->UE_sched_ctrl[UE_id];
harq_pid = subframe2harqpid(&cc[CC_id],frameP,subframeP);
round = UE_sched_ctrl->round_UL[harq_pid][CC_id];
harq_pid = subframe2harqpid(&cc[CC_id],sched_frame,sched_subframeP);
round = UE_sched_ctrl->round_UL[harq_pid][CC_id];
/*
if (get_UL_harq_info(module_idP,CC_id,frameP,subframeP,&harq_pid,&round)<0) {
LOG_W(MAC,"[eNB %d] Scheduler Frame %d, subframeP %d: candidate harq_pid from PHY for UE %d CC %d RNTI %x\n",
@@ -1049,13 +1074,85 @@ abort();
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.new_data_indication_1 = ndi;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.tpc = tpc;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.cqi_csi_request = cqi_req;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dl_assignment_index = UE_template->DAI_ul[sched_subframe];
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dl_assignment_index = UE_template->DAI_ul[sched_subframeP];
if (!CCE_allocation_infeasible(module_idP,CC_id,2,subframeP,
aggregation,
rnti))
rnti)) {
eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci++;
LOG_I(MAC,"Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n",
frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP);
// Add UL_config PDUs
ul_config_pdu = &ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus];
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
if (cqi_req==0)
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE;
else
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_pdu));
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = eNB->ul_handle++;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = rnti;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start = first_rb[CC_id];
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = rb_table[rb_table_index];
if (mcs<11) ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2;
else if (mcs<21) ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 4;
else ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 6;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = cshift;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication = ndi;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number = harq_pid;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = get_TBS_UL(mcs,
rb_table[rb_table_index]);
#ifdef Rel14
// Re13 fields
if (UE_template->rach_resource_type>0) { // This is a BL/CE UE allocation
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.ue_type = UE_template->rach_resource_type>2 ? 2 : 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.total_number_of_repetitions = 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.repetition_number = 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.initial_transmission_sf_io = (frameP*10)+subframeP;
}
#endif
ul_req_tmp->number_of_pdus++;
if (cqi_req == 1) {
// Add CQI portion
tmode = get_tmode(module_idP,CC_id,UE_id);
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_cqi_ri_pdu));
((nfapi_ul_config_ulsch_cqi_ri_pdu*)ul_config_pdu)->cqi_ri_information.cqi_ri_information_rel9.report_type = 1;
((nfapi_ul_config_ulsch_cqi_ri_pdu*)ul_config_pdu)->cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.number_of_cc = 1;
if (cc->p_eNB<=2 && (tmode==3||tmode==4||tmode==8||tmode==9||tmode==10))
((nfapi_ul_config_ulsch_cqi_ri_pdu*)ul_config_pdu)->cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 1;
else if (cc->p_eNB<=2)
((nfapi_ul_config_ulsch_cqi_ri_pdu*)ul_config_pdu)->cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 0;
else if (cc->p_eNB==4)
((nfapi_ul_config_ulsch_cqi_ri_pdu*)ul_config_pdu)->cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 2;
AssertFatal(UE_template->physicalConfigDedicated->cqi_ReportConfig!=NULL,"physicalConfigDedicated->cqi_ReportConfig is null!\n");
AssertFatal(UE_template->physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic!=NULL,"physicalConfigDedicated->cqi_ReportModeAperiodic is null!\n");
AssertFatal(UE_template->physicalConfigDedicated->pusch_ConfigDedicated!=NULL,"physicalConfigDedicated->puschConfigDedicated is null!\n");
for (int ri=0;ri<(1<<((nfapi_ul_config_ulsch_cqi_ri_pdu*)ul_config_pdu)->cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size);ri++)
((nfapi_ul_config_ulsch_cqi_ri_pdu*)ul_config_pdu)->cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].dl_cqi_pmi_size[ri] =
get_dl_cqi_pmi_size_pusch(&UE_list->UE_sched_ctrl[UE_id],
cc,
tmode,
1+ri,
UE_template->physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic);
((nfapi_ul_config_ulsch_cqi_ri_pdu*)ul_config_pdu)->cqi_ri_information.cqi_ri_information_rel9.delta_offset_cqi = UE_template->physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_CQI_Index;
((nfapi_ul_config_ulsch_cqi_ri_pdu*)ul_config_pdu)->cqi_ri_information.cqi_ri_information_rel9.delta_offset_ri = UE_template->physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_RI_Index;
}
}
add_ue_ulsch_info(module_idP,
CC_id,
UE_id,
@@ -1080,7 +1177,6 @@ abort();
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = UE_template->cshift[harq_pid];
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0;
hi_dci0_req->number_of_hi++;
LOG_D(MAC,"[eNB %d][PUSCH %d/%x] CC_id %d Frame %d subframeP %d Scheduled (PHICH) UE %d (mcs %d, first rb %d, nb_rb %d, TBS %d, harq_pid %d,round %d)\n",
module_idP,harq_pid,rnti,CC_id,frameP,subframeP,UE_id,mcs,
UE_template->first_rb_ul[harq_pid], UE_template->nb_rb_ul[harq_pid],
openair2/LAYER2/MAC/main.c
+9
View File
@@ -175,11 +175,20 @@ int mac_top_init_eNB()
for (j=0;j<MAX_NUM_CCs;j++) {
RC.mac[i]->DL_req[j].dl_config_request_body.dl_config_pdu_list = RC.mac[i]->dl_config_pdu_list[j];
RC.mac[i]->UL_req[j].ul_config_request_body.ul_config_pdu_list = RC.mac[i]->ul_config_pdu_list[j];
for (int k=0;k<10;k++) RC.mac[i]->UL_req_tmp[j][k].ul_config_request_body.ul_config_pdu_list = RC.mac[i]->ul_config_pdu_list_tmp[j][k];
RC.mac[i]->HI_DCI0_req[j].hi_dci0_request_body.hi_dci0_pdu_list = RC.mac[i]->hi_dci0_pdu_list[j];
RC.mac[i]->TX_req[j].tx_request_body.tx_pdu_list = RC.mac[i]->tx_request_pdu[j];
RC.mac[i]->ul_handle = 0;
}
}
AssertFatal(rlc_module_init()==0,"Could not initialize RLC layer\n");
// These should be out of here later
pdcp_layer_init ();
rrc_init_global_param();
} else {
RC.mac = NULL;
}
openair2/LAYER2/MAC/pre_processor.c
+23 -17
View File
@@ -263,13 +263,19 @@ int maxround(module_id_t Mod_id,uint16_t rnti,int frame,sub_frame_t subframe,uin
{
uint8_t round,round_max=0,UE_id;
int CC_id;
int CC_id,harq_pid;
UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
COMMON_channels_t *cc;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
cc = &RC.mac[Mod_id]->common_channels[CC_id];
UE_id = find_UE_id(Mod_id,rnti);
round = UE_list->UE_sched_ctrl[UE_id].round[CC_id];
if (cc->tdd_Config) harq_pid = ((frame*10)+subframe)%10;
else harq_pid = ((frame*10)+subframe)&7;
round = UE_list->UE_sched_ctrl[UE_id].round[CC_id][harq_pid];
if (round > round_max) {
round_max = round;
}
@@ -507,9 +513,10 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
int transmission_mode = 0;
UE_sched_ctrl *ue_sched_ctl;
// int rrc_status = RRC_IDLE;
COMMON_channels_t *cc;
#ifdef TM5
int harq_pid1=0,harq_pid2=0;
int harq_pid1=0;
int round1=0,round2=0;
int UE_id2;
uint16_t i1,i2,i3;
@@ -581,12 +588,10 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
for (ii=0; ii<UE_num_active_CC(UE_list,UE_id); ii++) {
CC_id = UE_list->ordered_CCids[ii][UE_id];
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
harq_pid = ue_sched_ctl->harq_pid[CC_id];
round = ue_sched_ctl->round[CC_id];
// if there is no available harq_process, skip the UE
if (UE_list->UE_sched_ctrl[UE_id].harq_pid[CC_id]<0)
continue;
cc=&RC.mac[Mod_id]->common_channels[ii];
if (cc->tdd_Config) harq_pid = ((frameP*10)+subframeP)%10;
else harq_pid = ((frameP*10)+subframeP)&7;
round = ue_sched_ctl->round[CC_id][harq_pid];
average_rbs_per_user[CC_id]=0;
@@ -681,8 +686,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
for (ii=0; ii<UE_num_active_CC(UE_list,UE_id); ii++) {
CC_id = UE_list->ordered_CCids[ii][UE_id];
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
harq_pid = ue_sched_ctl->harq_pid[CC_id];
round = ue_sched_ctl->round[CC_id];
round = ue_sched_ctl->round[CC_id][harq_pid];
rnti = UE_RNTI(Mod_id,UE_id);
@@ -731,7 +735,6 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
UE_id2 = ii;
rnti2 = UE_RNTI(Mod_id,UE_id2);
ue_sched_ctl2 = &UE_list->UE_sched_ctrl[UE_id2];
harq_pid2 = ue_sched_ctl2->harq_pid[CC_id];
round2 = ue_sched_ctl2->round[CC_id];
if(rnti2 == NOT_A_RNTI)
continue;
@@ -887,7 +890,7 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
#endif
LOG_I(MAC,"Running preprocessor for UE %d (%x)\n",UE_id,rnti);
LOG_D(MAC,"Running preprocessor for UE %d (%x)\n",UE_id,rnti);
// initialize harq_pid and round
/*
@@ -1078,11 +1081,11 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
UE_TEMPLATE *UE_template = 0;
int N_RB_DL;
int N_RB_UL;
//LOG_I(MAC,"assign max mcs min rb\n");
LOG_D(MAC,"In ulsch_preprocessor: assign max mcs min rb\n");
// maximize MCS and then allocate required RB according to the buffer occupancy with the limit of max available UL RB
assign_max_mcs_min_rb(module_idP,frameP, subframeP, first_rb);
//LOG_I(MAC,"sort ue \n");
LOG_D(MAC,"In ulsch_preprocessor: sort ue \n");
// sort ues
sort_ue_ul (module_idP,frameP, subframeP);
@@ -1101,7 +1104,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
}
}
//LOG_I(MAC,"step2 \n");
LOG_D(MAC,"In ulsch_preprocessor: step2 \n");
// step 2: calculate the average rb per UE
total_ue_count =0;
max_num_ue_to_be_scheduled=0;
@@ -1119,9 +1122,11 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
UE_id = i;
LOG_D(MAC,"In ulsch_preprocessor: handling UE %d/%x\n",UE_id,rnti);
for (n=0; n<UE_list->numactiveULCCs[UE_id]; n++) {
// This is the actual CC_id in the list
CC_id = UE_list->ordered_ULCCids[n][UE_id];
LOG_D(MAC,"In ulsch_preprocessor: handling UE %d/%x CCid %d\n",UE_id,rnti,CC_id);
UE_template = &UE_list->UE_template[CC_id][UE_id];
average_rbs_per_user[CC_id]=0;
@@ -1174,6 +1179,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
CC_id = UE_list->ordered_ULCCids[n][UE_id];
harq_pid = subframe2harqpid(&RC.mac[module_idP]->common_channels[CC_id],frameP,subframeP);
// mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,openair_harq_UL);
if(UE_list->UE_sched_ctrl[UE_id].round_UL[CC_id]>0) {
@@ -1183,7 +1189,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
}
total_allocated_rbs[CC_id]+= nb_allocated_rbs[CC_id][UE_id];
LOG_D(MAC,"In ulsch_preprocessor: assigning %d RBs for UE %d/%x CCid %d, harq_pid %d\n",nb_allocated_rbs[CC_id][UE_id],UE_id,rnti,CC_id,harq_pid);
}
}
openair2/LAYER2/MAC/proto.h
+91 -7
View File
@@ -29,6 +29,8 @@
#ifndef __LAYER2_MAC_PROTO_H__
#define __LAYER2_MAC_PROTO_H__
#include "LAYER2/MAC/defs.h"
/** \addtogroup _mac
* @{
*/
@@ -287,11 +289,14 @@ void rx_sdu(const module_id_t enb_mod_idP,
/* \brief Function to indicate a scheduled schduling request (SR) was received by eNB.
@param Mod_id Instance ID of eNB
@param Mod_idP Instance ID of eNB
@param CC_idP CC_id of received SR
@param frameP of received SR
@param subframeP Index of subframe where SR was received
@param rnti RNTI of UE transmitting the SR
@param subframe Index of subframe where SR was received
@param ul_cqi SNR measurement of PUCCH (SNR quantized to 8 bits, -64 ... 63.5 dB in .5dB steps)
*/
void SR_indication(module_id_t module_idP,int CC_id,frame_t frameP,rnti_t rnti, sub_frame_t subframe);
void SR_indication(module_id_t module_idP,int CC_id,frame_t frameP,sub_frame_t subframe,rnti_t rnti,uint8_t ul_cqi);
/* \brief Function to indicate a UL failure was detected by eNB PHY.
@param Mod_id Instance ID of eNB
@@ -314,10 +319,7 @@ uint8_t *get_dlsch_sdu(module_id_t module_idP,int CC_id,frame_t frameP,rnti_t rn
MCH_PDU *get_mch_sdu( module_id_t Mod_id, int CC_id, frame_t frame, sub_frame_t subframe);
//added for ALU icic purpose
uint32_t Get_Cell_SBMap(module_id_t module_idP);
void UpdateSBnumber(module_id_t module_idP);
//end ALU's algo
void ue_mac_reset (module_id_t module_idP,uint8_t eNB_index);
@@ -326,6 +328,7 @@ void init_ue_sched_info(void);
void add_ue_ulsch_info (module_id_t module_idP, int CC_id, int UE_id, sub_frame_t subframe,UE_ULSCH_STATUS status);
void add_ue_dlsch_info (module_id_t module_idP, int CC_id,int UE_id, sub_frame_t subframe,UE_DLSCH_STATUS status);
int find_UE_id (module_id_t module_idP, rnti_t rnti) ;
int find_RA_id (module_id_t mod_idP, int CC_idP, rnti_t rntiP);
rnti_t UE_RNTI (module_id_t module_idP, int UE_id);
int UE_PCCID (module_id_t module_idP, int UE_id);
uint8_t find_active_UEs (module_id_t module_idP);
@@ -896,11 +899,92 @@ int to_prb(int dl_Bandwidth);
uint8_t get_Msg3harqpid(COMMON_channels_t *cc,
frame_t frame,
sub_frame_t current_subframe);
uint32_t pdcchalloc2ulframe(COMMON_channels_t *ccP,uint32_t frame, uint8_t n);
uint8_t pdcchalloc2ulsubframe(COMMON_channels_t *ccP,uint8_t n);
int is_UL_sf(COMMON_channels_t *ccP,sub_frame_t subframeP);
uint8_t getQm(uint8_t mcs);
uint8_t subframe2harqpid(COMMON_channels_t *cc,frame_t frame,sub_frame_t subframe);
void get_srs_pos(COMMON_channels_t *cc,uint16_t isrs,uint16_t *psrsPeriodicity,uint16_t *psrsOffset);
void get_csi_params(COMMON_channels_t *cc,struct CQI_ReportPeriodic *cqi_PMI_ConfigIndex,uint16_t *Npd,uint16_t *N_OFFSET_CQI,int *H);
uint8_t get_rel8_dl_cqi_pmi_size(UE_sched_ctrl *sched_ctl,int CC_idP,COMMON_channels_t *cc,uint8_t tmode, struct CQI_ReportPeriodic *cqi_ReportPeriodic);
uint8_t get_dl_cqi_pmi_size_pusch(UE_sched_ctrl *sched_ctl,COMMON_channels_t *cc,uint8_t tmode, uint8_t ri, CQI_ReportModeAperiodic_t *cqi_ReportModeAperiodic);
void extract_pucch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,sub_frame_t subframeP, uint8_t *pdu, uint8_t length);
void extract_pusch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,sub_frame_t subframeP,uint8_t *pdu, uint8_t length);
uint16_t fill_nfapi_tx_req(nfapi_tx_request_body_t *tx_req_body,uint16_t absSF,uint16_t pdu_length, uint16_t *pdu_index, uint8_t *pdu );
void program_dlsch_acknak(module_id_t module_idP, int CC_idP,int UE_idP, frame_t frameP, sub_frame_t subframeP,uint8_t cce_idx);
void fill_nfapi_dlsch_config(eNB_MAC_INST *eNB, nfapi_dl_config_request_body_t *dl_req,
uint16_t length,
uint16_t pdu_index,
uint16_t rnti,
uint8_t resource_allocation_type,
uint8_t virtual_resource_block_assignment_flag,
uint16_t resource_block_coding,
uint8_t modulation,
uint8_t redundancy_version,
uint8_t transport_blocks,
uint8_t transport_block_to_codeword_swap_flag,
uint8_t transmission_scheme,
uint8_t number_of_layers,
uint8_t number_of_subbands,
// uint8_t codebook_index,
uint8_t ue_category_capacity,
uint8_t pa,
uint8_t delta_power_offset_index,
uint8_t ngap,
uint8_t nprb,
uint8_t transmission_mode,
uint8_t num_bf_prb_per_subband,
uint8_t num_bf_vector
);
void fill_nfapi_harq_information(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
uint16_t absSFP,
nfapi_ul_config_harq_information *harq_information,
uint8_t cce_idxP);
void fill_nfapi_ulsch_harq_information(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
nfapi_ul_config_ulsch_harq_information *harq_information);
uint16_t fill_nfapi_uci_acknak(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
uint16_t absSFP,
uint8_t cce_idxP);
void fill_nfapi_dl_dci_1A(nfapi_dl_config_request_pdu_t *dl_config_pdu,
uint8_t aggregation_level,
uint16_t rnti,
uint8_t rnti_type,
uint8_t harq_process,
uint8_t tpc,
uint16_t resource_block_coding,
uint8_t mcs,
uint8_t ndi,
uint8_t rv,
uint8_t vrb_flag);
nfapi_ul_config_request_pdu_t* has_ul_grant(module_id_t module_idP,int CC_idP,uint16_t subframeP,uint16_t rnti);
uint8_t get_tmode(module_id_t module_idP,int CC_idP,int UE_idP);
uint8_t get_ul_req_index(module_id_t module_idP, int CC_idP, sub_frame_t subframeP);
#ifdef Rel14
int get_numnarrowbandbits(long dl_Bandwidth);
openair2/LAYER2/MAC/rar_tools.c
+24 -32
View File
@@ -62,8 +62,8 @@ unsigned short fill_rar(
// RAR_PDU *rar = (RAR_PDU *)(dlsch_buffer+1);
uint8_t *rar = (uint8_t *)(dlsch_buffer+1);
int i,ra_idx = -1;
uint16_t rballoc;
uint8_t mcs,TPC,ULdelay,cqireq;
RA_TEMPLATE *RA_template;
AssertFatal(CC_id < MAX_NUM_CCs, "CC_id %u < MAX_NUM_CCs %u", CC_id, MAX_NUM_CCs);
for (i=0; i<NB_RA_PROC_MAX; i++) {
@@ -73,7 +73,8 @@ unsigned short fill_rar(
break;
}
}
RA_template = &RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx];
//DevAssert( ra_idx != -1 );
if (ra_idx==-1)
return(0);
@@ -81,52 +82,43 @@ unsigned short fill_rar(
// subheader fixed
rarh->E = 0; // First and last RAR
rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader
rarh->RAPID = RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].preamble_index; // Respond to Preamble 0 only for the moment
/*
rar->R = 0;
rar->Timing_Advance_Command = eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].timing_offset/4;
rar->hopping_flag = 0;
rar->rb_alloc = mac_xface->computeRIV(N_RB_UL,12,2); // 2 RB
rar->mcs = 2; // mcs 2
rar->TPC = 4; // 2 dB power adjustment
rar->UL_delay = 0;
rar->cqi_req = 1;
rar->t_crnti = eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].rnti;
*/
rar[4] = (uint8_t)(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].rnti>>8);
rar[5] = (uint8_t)(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].rnti&0xff);
//RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset = 0;
RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t)(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t)(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4
rballoc = mac_computeRIV(N_RB_UL,1,1); // first PRB only for UL Grant
rarh->RAPID = RA_template->preamble_index; // Respond to Preamble 0 only for the moment
rar[4] = (uint8_t)(RA_template->rnti>>8);
rar[5] = (uint8_t)(RA_template->rnti&0xff);
//RA_template->timing_offset = 0;
RA_template->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t)(RA_template->timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t)(RA_template->timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4
RA_template->msg3_first_rb=1;
RA_template->msg3_nb_rb=1;
uint16_t rballoc = mac_computeRIV(N_RB_UL,RA_template->msg3_first_rb,RA_template->msg3_nb_rb); // first PRB only for UL Grant
rar[1] |= (rballoc>>7)&7; // Hopping = 0 (bit 3), 3 MSBs of rballoc
rar[2] = ((uint8_t)(rballoc&0xff))<<1; // 7 LSBs of rballoc
mcs = 10;
TPC = 3;
ULdelay = 0;
cqireq = 0;
rar[2] |= ((mcs&0x8)>>3); // mcs 10
rar[3] = (((mcs&0x7)<<5)) | ((TPC&7)<<2) | ((ULdelay&1)<<1) | (cqireq&1);
RA_template->msg3_mcs = 10;
RA_template->msg3_TPC = 3;
RA_template->msg3_ULdelay = 0;
RA_template->msg3_cqireq = 0;
rar[2] |= ((RA_template->msg3_mcs&0x8)>>3); // mcs 10
rar[3] = (((RA_template->msg3_mcs&0x7)<<5)) | ((RA_template->msg3_TPC&7)<<2) | ((RA_template->msg3_ULdelay&1)<<1) | (RA_template->msg3_cqireq&1);
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d Generating RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ra_idx %d, CRNTI %x,preamble %d/%d,TIMING OFFSET %d\n",
module_idP, CC_id,
frameP,
*(uint8_t*)rarh,rar[0],rar[1],rar[2],rar[3],rar[4],rar[5],
ra_idx,
RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].rnti,
RA_template->rnti,
rarh->RAPID,RC.mac[module_idP]->common_channels[CC_id].RA_template[0].preamble_index,
RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset);
RA_template->timing_offset);
if (opt_enabled) {
trace_pdu(1, dlsch_buffer, input_buffer_length, module_idP, 2, 1,
RC.mac[module_idP]->frame, RC.mac[module_idP]->subframe, 0, 0);
LOG_D(OPT,"[eNB %d][RAPROC] CC_id %d RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n",
module_idP, CC_id, frameP, RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].rnti,
module_idP, CC_id, frameP, RA_template->rnti,
rarh->RAPID, input_buffer_length);
}
return(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].rnti);
return(RA_template->rnti);
}
#ifdef Rel14
openair2/PHY_INTERFACE/IF_Module.c
+68 -6
View File
@@ -54,6 +54,52 @@ void handle_rach(UL_IND_t *UL_info) {
#endif
}
void handle_sr(UL_IND_t *UL_info) {
int i;
for (i=0;i<UL_info->sr_ind.number_of_srs;i++)
SR_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->sr_ind.sr_pdu_list[i].rx_ue_information.rnti,
UL_info->sr_ind.sr_pdu_list[i].ul_cqi_information.ul_cqi);
UL_info->sr_ind.number_of_srs=0;
}
void handle_cqi(UL_IND_t *UL_info) {
int i;
for (i=0;i<UL_info->cqi_ind.number_of_cqis;i++)
cqi_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->cqi_ind.cqi_pdu_list[i].rx_ue_information.rnti,
&UL_info->cqi_ind.cqi_pdu_list[i].cqi_indication_rel9,
UL_info->cqi_ind.cqi_raw_pdu_list[i].pdu,
&UL_info->cqi_ind.cqi_pdu_list[i].ul_cqi_information);
UL_info->cqi_ind.number_of_cqis=0;
}
void handle_harq(UL_IND_t *UL_info) {
int i;
for (i=0;i<UL_info->harq_ind.number_of_harqs;i++)
harq_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
&UL_info->harq_ind.harq_pdu_list[i]);
UL_info->harq_ind.number_of_harqs=0;
}
void handle_ulsch(UL_IND_t *UL_info) {
int i;
@@ -70,12 +116,12 @@ void handle_ulsch(UL_IND_t *UL_info) {
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.length,
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.timing_advance,
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
}
UL_info->rx_ind.number_of_pdus=0;
for (i=0;i<UL_info->crc_ind.number_of_crcs;i++) {
if (UL_info->crc_ind.crc_pdu_list[i].crc_indication_rel8.crc_flag == 1) { // CRC error indication
LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->subframe);
rx_sdu(UL_info->module_id,
@@ -88,8 +134,8 @@ void handle_ulsch(UL_IND_t *UL_info) {
0,
0);
}
}
UL_info->crc_ind.number_of_crcs=0;
}
@@ -121,9 +167,19 @@ void UL_indication(UL_IND_t *UL_info)
ifi->CC_mask |= (1<<CC_id);
// clear DL/UL info for new scheduling round
clear_nfapi_information(RC.mac[module_id],CC_id,
UL_info->frame,UL_info->subframe);
handle_rach(UL_info);
handle_sr(UL_info);
handle_cqi(UL_info);
handle_harq(UL_info);
// clear HI prior to hanling ULSCH
mac->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi = 0;
@@ -143,13 +199,19 @@ void UL_indication(UL_IND_t *UL_info)
sched_info->subframe = (UL_info->subframe+4)%10;
sched_info->DL_req = &mac->DL_req[CC_id];
sched_info->HI_DCI0_req = &mac->HI_DCI0_req[CC_id];
sched_info->UL_req = &mac->UL_req[CC_id];
if ((mac->common_channels[CC_id].tdd_Config==NULL) ||
(is_UL_sf(&mac->common_channels[CC_id],(sched_info->subframe+4)%10)>0))
sched_info->UL_req = &mac->UL_req[CC_id];
else
sched_info->UL_req = NULL;
sched_info->TX_req = &mac->TX_req[CC_id];
AssertFatal(ifi->schedule_response!=NULL,
"UL_indication is null (mod %d, cc %d)\n",
module_id,
CC_id);
ifi->schedule_response(sched_info);
LOG_D(PHY,"Schedule_response: frame %d, subframe %d (dl_pdus %d / %p)\n",sched_info->frame,sched_info->subframe,sched_info->DL_req->dl_config_request_body.number_pdu,
&sched_info->DL_req->dl_config_request_body.number_pdu);
}
openair2/PHY_INTERFACE/IF_Module.h
+1 -15
View File
@@ -1,10 +1,4 @@
/*This is the interface module between PHY
*Provided the FAPI style interface structures for P7.
*
*
*
*//*
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
@@ -43,14 +37,6 @@
#include "openair1/PHY/LTE_TRANSPORT/defs.h"
#include "nfapi_interface.h"
// uplink subframe P7
///
/*UL_IND_t:
* A structure handles all the uplink information.
*/
#define MAX_NUM_DL_PDU 100
#define MAX_NUM_UL_PDU 100
openair2/RRC/LITE/L2_interface.c
+6 -5
View File
@@ -84,7 +84,7 @@ mac_rrc_data_req(
#ifdef DEBUG_RRC
int i;
LOG_T(RRC,"[eNB %d] mac_rrc_data_req to SRB ID=%d\n",Mod_idP,Srb_id);
LOG_I(RRC,"[eNB %d] mac_rrc_data_req to SRB ID=%d\n",Mod_idP,Srb_id);
#endif
eNB_RRC_INST *rrc;
@@ -218,7 +218,7 @@ mac_rrc_data_req(
// check if data is there for MAC
if(Srb_info->Tx_buffer.payload_size>0) { //Fill buffer
LOG_D(RRC,"[eNB %d] CCCH (%p) has %d bytes (dest: %p, src %p)\n",Mod_idP,Srb_info,Srb_info->Tx_buffer.payload_size,buffer_pP,Srb_info->Tx_buffer.Payload);
LOG_I(RRC,"[eNB %d] CCCH (%p) has %d bytes (dest: %p, src %p)\n",Mod_idP,Srb_info,Srb_info->Tx_buffer.payload_size,buffer_pP,Srb_info->Tx_buffer.Payload);
#if defined(ENABLE_ITTI)
{
@@ -504,9 +504,9 @@ mac_rrc_data_ind(
} else { // This is an eNB
Srb_info = &RC.rrc[module_idP]->carrier[CC_id].Srb0;
LOG_T(RRC,"[eNB %d] Received SDU for CCCH on SRB %d\n",module_idP,Srb_info->Srb_id);
#if defined(ENABLE_ITTI)
LOG_I(RRC,"[eNB %d] Received SDU for CCCH on SRB %d\n",module_idP,Srb_info->Srb_id);
#if 0 //defined(ENABLE_ITTI)
{
MessageDef *message_p;
int msg_sdu_size = sizeof(RRC_MAC_CCCH_DATA_IND (message_p).sdu);
@@ -526,6 +526,7 @@ mac_rrc_data_ind(
RRC_MAC_CCCH_DATA_IND (message_p).CC_id = CC_id;
memset (RRC_MAC_CCCH_DATA_IND (message_p).sdu, 0, CCCH_SDU_SIZE);
memcpy (RRC_MAC_CCCH_DATA_IND (message_p).sdu, sduP, sdu_size);
LOG_I(RRC,"[eNB %d] Sending message to RRC task\n",module_idP);
itti_send_msg_to_task (TASK_RRC_ENB, ctxt.instance, message_p);
}
#else
openair2/RRC/LITE/MESSAGES/asn1_msg.c
+1 -3
View File
@@ -1371,9 +1371,7 @@ do_RRCConnectionSetup(
physicalConfigDedicated2->soundingRS_UL_ConfigDedicated = NULL;
physicalConfigDedicated2->antennaInfo = CALLOC(1,sizeof(*physicalConfigDedicated2->antennaInfo));
physicalConfigDedicated2->schedulingRequestConfig = CALLOC(1,sizeof(*physicalConfigDedicated2->schedulingRequestConfig));
#ifdef CBA
physicalConfigDedicated2->pusch_CBAConfigDedicated_vlola = CALLOC(1,sizeof(*physicalConfigDedicated2->pusch_CBAConfigDedicated_vlola));
#endif
// PDSCH
//assign_enum(&physicalConfigDedicated2->pdsch_ConfigDedicated->p_a,
// PDSCH_ConfigDedicated__p_a_dB0);
openair2/RRC/LITE/rrc_common.c
-63
View File
@@ -151,73 +151,10 @@ rrc_init_global_param(
Rlc_info_am_config.rlc.rlc_am_info.t_poll_retransmit = 15;
Rlc_info_am_config.rlc.rlc_am_info.t_reordering = 50;
Rlc_info_am_config.rlc.rlc_am_info.t_status_prohibit = 10;
#ifndef NO_RRM
if (L3_xface_init ()) {
return (-1);
}
#endif
return 0;
}
#ifndef NO_RRM
//-----------------------------------------------------------------------------
int
L3_xface_init(
void
)
//-----------------------------------------------------------------------------
{
int ret = 0;
#ifdef USER_MODE
int sock;
LOG_D(RRC, "[L3_XFACE] init de l'interface \n");
if (open_socket (&S_rrc, RRC_RRM_SOCK_PATH, RRM_RRC_SOCK_PATH, 0) == -1) {
return (-1);
}
if (S_rrc.s == -1) {
return (-1);
}
socket_setnonblocking (S_rrc.s);
msg ("Interface Connected... RRM-RRC\n");
return 0;
#else
ret=rtf_create(RRC2RRM_FIFO,32768);
if (ret < 0) {
msg("[openair][MAC][INIT] Cannot create RRC2RRM fifo %d (ERROR %d)\n",RRC2RRM_FIFO,ret);
return(-1);
} else {
msg("[openair][MAC][INIT] Created RRC2RRM fifo %d\n",RRC2RRM_FIFO);
rtf_reset(RRC2RRM_FIFO);
}
ret=rtf_create(RRM2RRC_FIFO,32768);
if (ret < 0) {
msg("[openair][MAC][INIT] Cannot create RRM2RRC fifo %d (ERROR %d)\n",RRM2RRC_FIFO,ret);
return(-1);
} else {
msg("[openair][MAC][INIT] Created RRC2RRM fifo %d\n",RRM2RRC_FIFO);
rtf_reset(RRM2RRC_FIFO);
}
return(0);
#endif
}
#endif
//-----------------------------------------------------------------------------
void
rrc_config_buffer(
openair2/RRC/LITE/rrc_eNB.c
+4 -34
View File
@@ -3453,38 +3453,7 @@ rrc_eNB_process_RRCConnectionReconfigurationComplete(
ue_context_pP->ue_context.kenb, &kRRCint);
#endif
#if ENABLE_RAL
{
MessageDef *message_ral_p = NULL;
rrc_ral_connection_reconfiguration_ind_t connection_reconfiguration_ind;
int i;
message_ral_p = itti_alloc_new_message(TASK_RRC_ENB, RRC_RAL_CONNECTION_RECONFIGURATION_IND);
memset(&connection_reconfiguration_ind, 0, sizeof(rrc_ral_connection_reconfiguration_ind_t));
connection_reconfiguration_ind.ue_id = ctxt_pP->rnti;
if (DRB_configList != NULL) {
connection_reconfiguration_ind.num_drb = DRB_configList->list.count;
for (i = 0; (i < DRB_configList->list.count) && (i < maxDRB); i++) {
connection_reconfiguration_ind.drb_id[i] = DRB_configList->list.array[i]->drb_Identity;
}
} else {
connection_reconfiguration_ind.num_drb = 0;
}
if (SRB_configList != NULL) {
connection_reconfiguration_ind.num_srb = SRB_configList->list.count;
} else {
connection_reconfiguration_ind.num_srb = 0;
}
memcpy(&message_ral_p->ittiMsg, (void *)&connection_reconfiguration_ind,
sizeof(rrc_ral_connection_reconfiguration_ind_t));
LOG_I(RRC, "Sending RRC_RAL_CONNECTION_RECONFIGURATION_IND to RAL\n");
itti_send_msg_to_task(TASK_RAL_ENB, ctxt_pP->instance, message_ral_p);
}
#endif
// Refresh SRBs/DRBs
MSC_LOG_TX_MESSAGE(
MSC_RRC_ENB,
@@ -4423,7 +4392,7 @@ rrc_eNB_decode_dcch(
sdu_sizeP,
0,
0);
/*
#if defined(ENABLE_ITTI)
# if defined(DISABLE_ITTI_XER_PRINT)
{
@@ -4452,7 +4421,7 @@ rrc_eNB_decode_dcch(
}
# endif
#endif
*/
{
for (i = 0; i < sdu_sizeP; i++) {
LOG_T(RRC, "%x.", Rx_sdu[i]);
@@ -4971,13 +4940,14 @@ rrc_enb_task(
protocol_ctxt_t ctxt;
itti_mark_task_ready(TASK_RRC_ENB);
LOG_I(RRC,"Entering main loop of RRC message task\n");
while (1) {
// Wait for a message
itti_receive_msg(TASK_RRC_ENB, &msg_p);
msg_name_p = ITTI_MSG_NAME(msg_p);
instance = ITTI_MSG_INSTANCE(msg_p);
LOG_I(RRC,"Received message %s\n",msg_name_p);
switch (ITTI_MSG_ID(msg_p)) {
case TERMINATE_MESSAGE:
targets/COMMON/create_tasks.c
+2 -8
View File
@@ -98,19 +98,13 @@ int create_tasks(uint32_t enb_nb, uint32_t ue_nb)
# endif
if (enb_nb > 0) {
LOG_I(RRC,"Creating RRC eNB Task\n");
if (itti_create_task (TASK_RRC_ENB, rrc_enb_task, NULL) < 0) {
LOG_E(RRC, "Create task for RRC eNB failed\n");
return -1;
}
# if ENABLE_RAL
if (itti_create_task (TASK_RAL_ENB, eRAL_task, NULL) < 0) {
LOG_E(RAL_ENB, "Create task for RAL eNB failed\n");
return -1;
}
# endif
}
if (ue_nb > 0) {
targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band7.tm1.if4p5.50PRB.lo.conf
+2 -2
View File
@@ -195,8 +195,8 @@ L1s = (
RUs = (
{
local_if_name = "lo";
remote_address = "127.0.0.1";
local_address = "127.0.0.2";
remote_address = "127.0.0.2";
local_address = "127.0.0.1";
local_portc = 50000;
remote_portc = 50000;
local_portd = 50001;
targets/RT/USER/lte-enb.c
+4
View File
@@ -940,6 +940,10 @@ void init_eNB(int single_thread_flag,int wait_for_sync) {
LOG_I(PHY,"Setting indication lists\n");
eNB->UL_INFO.rx_ind.rx_pdu_list = eNB->rx_pdu_list;
eNB->UL_INFO.crc_ind.crc_pdu_list = eNB->crc_pdu_list;
eNB->UL_INFO.sr_ind.sr_pdu_list = eNB->sr_pdu_list;
eNB->UL_INFO.harq_ind.harq_pdu_list = eNB->harq_pdu_list;
eNB->UL_INFO.cqi_ind.cqi_pdu_list = eNB->cqi_pdu_list;
eNB->UL_INFO.cqi_ind.cqi_raw_pdu_list = eNB->cqi_raw_pdu_list;
}
}