reverted Msg2 slot back to DL portion of mixed slot
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@@ -443,7 +443,7 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
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int FR = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257 ? nr_FR2 : nr_FR1;
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uint8_t start_next_period = (rach_slot-(rach_slot%tdd_period_slot)+tdd_period_slot)%nr_slots_per_frame[mu];
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*msg2_slot = start_next_period + last_dl_slot_period-1; // initializing scheduling of slot to next mixed (or last dl) slot
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*msg2_slot = start_next_period + last_dl_slot_period; // initializing scheduling of slot to next mixed (or last dl) slot
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*msg2_frame = ((*msg2_slot>(rach_slot))? rach_frame : (rach_frame+1))%1024;
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// we can't schedule msg2 before sl_ahead since prach
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@@ -718,7 +718,7 @@ void nr_get_Msg3alloc(module_id_t module_id,
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tdd_beam_association[num_tdd_period] = ra->beam_id;
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}
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LOG_I(NR_MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u start symbol index %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id, StartSymbolIndex);
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LOG_D(NR_MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u start symbol index %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id, StartSymbolIndex);
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uint16_t *vrb_map_UL =
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&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[ra->Msg3_slot * MAX_BWP_SIZE];
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const uint16_t bwpSize = NRRIV2BW(ubwp ?
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