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Merge remote-tracking branch 'origin/NR_SA_10MHz' into integration_2022_wk09

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This commit is contained in:
Robert Schmidt
2022-02-28 23:43:10 +01:00
parent bf70a3bfb4 5c56bb21ce
commit 37e09d1ca8
15 changed files with 845 additions and 106 deletions
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ci-scripts/conf_files/gnb.sa.band78.fr1.24PRB.usrpb210.conf
+301
View File
@@ -0,0 +1,301 @@
Active_gNBs = ( "gNB-OAI");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
gNB_name = "gNB-OAI";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
sst = 1;
sd = 0x1; // 0 false, else true
},
{
sst = 1;
sd = 0x112233; // 0 false, else true
}
);
});
nr_cellid = 12345678L;
////////// Physical parameters:
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 1;
sib1_tda = 15;
min_rxtxtime = 6;
pdcch_ConfigSIB1 = (
{
controlResourceSetZero = 2;
searchSpaceZero = 0;
}
);
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 12 PRBs@30kHz SCS (same as initial BWP)
absoluteFrequencySSB = 640288;
dl_frequencyBand = 78;
# this is 3600 MHz
dl_absoluteFrequencyPointA = 640000;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 1;
dl_carrierBandwidth = 24;
#initialDownlinkBWP
#genericParameters
# this is RBstart=27,L=48 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6325;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 2;
initialDLBWPsearchSpaceZero = 0;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 1;
ul_carrierBandwidth = 24;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 6325;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 98;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 13;
preambleReceivedTargetPower = -96;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 1;
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 4;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 14;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -90;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 1;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4;
ssPBCH_BlockPower = -25;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "192.168.70.132";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_NG_AMF = "demo-oai";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.70.129/24";
GNB_INTERFACE_NAME_FOR_NGU = "demo-oai";
GNB_IPV4_ADDRESS_FOR_NGU = "192.168.70.129/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 150;
pucch_TargetSNRx10 = 200;
ulsch_max_frame_inactivity = 1;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 150;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [78];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
sf_extension = 0;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
rfsimulator :
{
serveraddr = "server";
serverport = "4043";
options = (); #("saviq"); or/and "chanmod"
modelname = "AWGN";
IQfile = "/tmp/rfsimulator.iqs";
};
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="debug";
ngap_log_verbosity ="medium";
};
ci-scripts/reportTestLocally.sh
+1 -1
View File
@@ -756,7 +756,7 @@ function report_test {
EPC_CONFIGS=("noS1")
TRANS_MODES=("tdd")
FR_MODE=("SA")
BW_CASES=(106)
BW_CASES=(106 24)
for CN_CONFIG in ${EPC_CONFIGS[@]}
do
for TMODE in ${TRANS_MODES[@]}
ci-scripts/runTestOnVM.sh
+96 -4
View File
@@ -1401,8 +1401,11 @@ function start_rf_sim_nr_ue {
elif [ $LOC_RA_SA_TEST -eq 1 ] #RA test => use --do-ra option
then
echo "echo \"./nr-uesoftmodem --rfsim --do-ra --log_config.global_log_options level,nocolor,time --rrc_config_path /home/ubuntu/tmp/cmake_targets/ran_build/build/\" > ./my-nr-softmodem-run.sh " >> $1
else #SA test => use --sa option
elif [ $LOC_RA_SA_TEST -eq 2 ] #SA test 106PRB => use --sa option
then
echo "echo \"./nr-uesoftmodem -r 106 --numerology 1 --band 78 -C 3619200000 --rfsim --sa --log_config.global_log_options level,nocolor,time\" > ./my-nr-softmodem-run.sh " >> $1
else # -eq 3 SA test 24PRB
echo "echo \"./nr-uesoftmodem -r 24 -s 24 --numerology 1 --band 78 -C 3604320000 --rfsim --sa --log_config.global_log_options level,nocolor,time\" > ./my-nr-softmodem-run.sh " >> $1
fi
fi
echo "chmod 775 ./my-nr-softmodem-run.sh" >> $1
@@ -2270,7 +2273,7 @@ function run_test_on_vm {
mkdir --parents $ARCHIVES_LOC
echo "############################################################"
echo "SA TEST"
echo "SA TEST 106PRB"
echo "############################################################"
#SA test, attention : has a different config file from the rest of the test
CN_CONFIG="noS1"
@@ -2305,7 +2308,7 @@ function run_test_on_vm {
echo "${CN_CONFIG} : Starting the NR-UE"
echo "############################################################"
CURRENT_NR_UE_LOG_FILE=tdd_${PRB}prb_${CN_CONFIG}_ue_sa_test.log
#last argument = 2 is to enable --sa for SA test
#last argument = 2 is to enable --sa for SA test for 106PRB
start_rf_sim_nr_ue $NR_UE_VM_CMDS $NR_UE_VM_IP_ADDR $GNB_VM_IP_ADDR $CURRENT_NR_UE_LOG_FILE $PRB $FREQUENCY $S1_NOS1_CFG 2
if [ $NR_UE_SYNC -eq 0 ]
then
@@ -2340,9 +2343,11 @@ function run_test_on_vm {
echo "SA test NOT OK"
echo "try_cnt = " $try_cnt
try_cnt=$((try_cnt+1))
SA_106PRB_STATUS = -1
else
echo "SA test OK"
try_cnt=$((try_cnt+10))
SA_106PRB_STATUS = 0
fi
done
########### end SA test
@@ -2350,6 +2355,92 @@ function run_test_on_vm {
sleep 30
echo "############################################################"
echo "SA TEST 24PRB"
echo "############################################################"
#SA test, attention : has a different config file from the rest of the test
CN_CONFIG="noS1"
CONF_FILE=gnb.sa.band78.fr1.24PRB.usrpb210.conf
S1_NOS1_CFG=0
PRB=24
FREQUENCY=3600
if [ ! -d $ARCHIVES_LOC ]
then
mkdir --parents $ARCHIVES_LOC
fi
local try_cnt=0
######### start of SA TEST loop
while [ $try_cnt -lt 5 ] #5 because it hardly succeed within CI
do
SYNC_STATUS=0
SA_STATUS=0
rm -f $ARCHIVES_LOC/tdd_${PRB}prb_${CN_CONFIG}*sa_test.log
echo "############################################################"
echo "${CN_CONFIG} : Starting the gNB"
echo "############################################################"
CURRENT_GNB_LOG_FILE=tdd_${PRB}prb_${CN_CONFIG}_gnb_sa_test.log
#last argument = 2 is to enable --sa for SA test
start_rf_sim_gnb $GNB_VM_CMDS "$GNB_VM_IP_ADDR" $CURRENT_GNB_LOG_FILE $PRB $CONF_FILE $S1_NOS1_CFG 2
echo "############################################################"
echo "${CN_CONFIG} : Starting the NR-UE"
echo "############################################################"
CURRENT_NR_UE_LOG_FILE=tdd_${PRB}prb_${CN_CONFIG}_ue_sa_test.log
#last argument = 3 is to enable --sa for SA test for 24PRB
start_rf_sim_nr_ue $NR_UE_VM_CMDS $NR_UE_VM_IP_ADDR $GNB_VM_IP_ADDR $CURRENT_NR_UE_LOG_FILE $PRB $FREQUENCY $S1_NOS1_CFG 3
if [ $NR_UE_SYNC -eq 0 ]
then
echo "Problem w/ gNB and NR-UE not syncing"
terminate_enb_ue_basic_sim $NR_UE_VM_CMDS $NR_UE_VM_IP_ADDR 2
terminate_enb_ue_basic_sim $GNB_VM_CMDS $GNB_VM_IP_ADDR 1
scp -o StrictHostKeyChecking=no ubuntu@$GNB_VM_IP_ADDR:/home/ubuntu/tmp/cmake_targets/log/$CURRENT_GNB_LOG_FILE $ARCHIVES_LOC
scp -o StrictHostKeyChecking=no ubuntu@$NR_UE_VM_IP_ADDR:/home/ubuntu/tmp/cmake_targets/log/$CURRENT_NR_UE_LOG_FILE $ARCHIVES_LOC
SYNC_STATUS=-1
try_cnt=$((try_cnt+1))
continue
fi
echo "############################################################"
echo "${CN_CONFIG} : Terminate gNB/NR-UE simulators"
echo "############################################################"
sleep 20
terminate_enb_ue_basic_sim $NR_UE_VM_CMDS $NR_UE_VM_IP_ADDR 2
terminate_enb_ue_basic_sim $GNB_VM_CMDS $GNB_VM_IP_ADDR 1
scp -o StrictHostKeyChecking=no ubuntu@$GNB_VM_IP_ADDR:/home/ubuntu/tmp/cmake_targets/log/$CURRENT_GNB_LOG_FILE $ARCHIVES_LOC
scp -o StrictHostKeyChecking=no ubuntu@$NR_UE_VM_IP_ADDR:/home/ubuntu/tmp/cmake_targets/log/$CURRENT_NR_UE_LOG_FILE $ARCHIVES_LOC
#check SA markers in gNB and NR UE log files
echo "############################################################"
echo "${CN_CONFIG} : Checking SA on gNB / NR-UE"
echo "############################################################"
# Proper check to be done when SA test is working!
check_sa_result $ARCHIVES_LOC/$CURRENT_GNB_LOG_FILE $ARCHIVES_LOC/$CURRENT_NR_UE_LOG_FILE
if [ $SA_STATUS -ne 0 ]
then
echo "SA test NOT OK"
echo "try_cnt = " $try_cnt
try_cnt=$((try_cnt+1))
SA_24PRB_STATUS = -1
else
echo "SA test OK"
try_cnt=$((try_cnt+10))
SA_24PRB_STATUS = 0
fi
done
########### end SA test
sleep 30
echo "############################################################"
echo "RA TEST FR2"
@@ -2661,7 +2752,8 @@ function run_test_on_vm {
echo "Checking run status"
echo "############################################################"
if [ $SA_STATUS -ne 0 ]; then NR_STATUS=-1; fi
if [ $SA_106PRB_STATUS -ne 0 ]; then NR_STATUS=-1; fi
if [ $SA_24PRB_STATUS -ne 0 ]; then NR_STATUS=-1; fi
if [ $RA_FR2_STATUS -ne 0 ]; then NR_STATUS=-1; fi
if [ $RA_FR1_STATUS -ne 0 ]; then NR_STATUS=-1; fi
if [ $SYNC_STATUS -ne 0 ]; then NR_STATUS=-1; fi
openair1/PHY/NR_TRANSPORT/nr_sch_dmrs.c
-1
View File
@@ -92,6 +92,5 @@ uint8_t get_l0(uint16_t dlDmrsSymbPos) {
if ((mask&1) == 1) break;
mask>>=1;
}
AssertFatal(l0 < 4,"impossible l0 %d\n",l0);
return (l0);
}
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
+46 -53
View File
@@ -130,76 +130,75 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
*/
int c = 0, r = 0;
uint16_t bundle_j = 0, f_bundle_j = 0, f_reg = 0;
uint16_t f_bundle_j = 0;
uint32_t coreset_C = 0;
uint16_t index_z, index_llr;
int coreset_interleaved = 0;
int N_regs = coreset_nbr_rb*coreset_time_dur;
if (reg_bundle_size_L != 0) { // interleaving will be done only if reg_bundle_size_L != 0
coreset_interleaved = 1;
coreset_C = (uint32_t) (coreset_nbr_rb / (coreset_interleaver_size_R * reg_bundle_size_L));
coreset_C = (uint32_t) (N_regs / (coreset_interleaver_size_R * reg_bundle_size_L));
} else {
reg_bundle_size_L = 6;
}
int B_rb = reg_bundle_size_L/coreset_time_dur; // nb of RBs occupied by each REG bundle
int num_bundles_per_cce = 6/reg_bundle_size_L;
int max_bundles = NR_MAX_PDCCH_AGG_LEVEL*num_bundles_per_cce;
int f_bundle_j_list[max_bundles];
int f_bundle_j_list[(2*NR_MAX_PDCCH_AGG_LEVEL) - 1] = {};
for (int reg = 0; reg < coreset_nbr_rb; reg++) {
if ((reg % reg_bundle_size_L) == 0) {
// for each bundle
for (int nb = 0; nb < max_bundles; nb++) {
if (coreset_interleaved == 0) f_bundle_j = nb;
else {
if (r == coreset_interleaver_size_R) {
r = 0;
c++;
}
bundle_j = (c * coreset_interleaver_size_R) + r;
f_bundle_j = ((r * coreset_C) + c + n_shift) % (coreset_nbr_rb / reg_bundle_size_L);
if (coreset_interleaved == 0) f_bundle_j = bundle_j;
f_bundle_j_list[reg / 6] = f_bundle_j;
f_bundle_j = ((r * coreset_C) + c + n_shift) % (N_regs / reg_bundle_size_L);
r++;
}
if ((reg % reg_bundle_size_L) == 0) r++;
f_bundle_j_list[nb] = f_bundle_j;
}
// Get cce_list indices by reg_idx in ascending order
int f_bundle_j_list_id = 0;
int f_bundle_j_list_ord[(2*NR_MAX_PDCCH_AGG_LEVEL)-1] = {};
// Get cce_list indices by bundle index in ascending order
int f_bundle_j_list_ord[number_of_candidates][max_bundles];
for (int c_id = 0; c_id < number_of_candidates; c_id++ ) {
f_bundle_j_list_id = CCE[c_id];
for (int p = 0; p < NR_MAX_PDCCH_AGG_LEVEL; p++) {
for (int p2 = CCE[c_id]; p2 < CCE[c_id] + L[c_id]; p2++) {
AssertFatal(p2<2*NR_MAX_PDCCH_AGG_LEVEL,"number_of_candidates %d : p2 %d, CCE[%d] %d, L[%d] %d\n",number_of_candidates,p2,c_id,CCE[c_id],c_id,L[c_id]);
if (f_bundle_j_list[p2] == p) {
AssertFatal(f_bundle_j_list_id < 2*NR_MAX_PDCCH_AGG_LEVEL,"f_bundle_j_list_id %d\n",f_bundle_j_list_id);
f_bundle_j_list_ord[f_bundle_j_list_id] = p;
int start_bund_cand = CCE[c_id]*num_bundles_per_cce;
int max_bund_per_cand = L[c_id]*num_bundles_per_cce;
int f_bundle_j_list_id = 0;
for(int nb = 0; nb < max_bundles; nb++) {
for(int bund_cand = start_bund_cand; bund_cand < start_bund_cand+max_bund_per_cand; bund_cand++){
if (f_bundle_j_list[bund_cand] == nb) {
f_bundle_j_list_ord[c_id][f_bundle_j_list_id] = nb;
f_bundle_j_list_id++;
break;
}
}
}
}
int rb = 0;
int rb_count = 0;
int data_sc = 9; // 9 sub-carriers with data per PRB
for (int c_id = 0; c_id < number_of_candidates; c_id++ ) {
for (int symbol_idx = start_symbol; symbol_idx < start_symbol+coreset_time_dur; symbol_idx++) {
for (int cce_count = CCE[c_id/coreset_time_dur]+c_id%coreset_time_dur; cce_count < CCE[c_id/coreset_time_dur]+c_id%coreset_time_dur+L[c_id]; cce_count += coreset_time_dur) {
for (int reg_in_cce_idx = 0; reg_in_cce_idx < NR_NB_REG_PER_CCE; reg_in_cce_idx++) {
f_reg = (f_bundle_j_list_ord[cce_count] * reg_bundle_size_L) + reg_in_cce_idx;
index_z = 9 * rb;
index_llr = (uint16_t) (f_reg + symbol_idx * coreset_nbr_rb) * 9;
for (int i = 0; i < 9; i++) {
z[index_z + i] = llr[index_llr + i];
for (int cce_count = 0; cce_count < L[c_id]; cce_count ++) {
for (int k=0; k<NR_NB_REG_PER_CCE/reg_bundle_size_L; k++) { // loop over REG bundles
int f = f_bundle_j_list_ord[c_id][k+NR_NB_REG_PER_CCE*cce_count/reg_bundle_size_L];
for(int rb=0; rb<B_rb; rb++) { // loop over the RBs of the bundle
index_z = data_sc * rb_count;
index_llr = (uint16_t) (f*B_rb + rb + symbol_idx * coreset_nbr_rb) * data_sc;
for (int i = 0; i < data_sc; i++) {
z[index_z + i] = llr[index_llr + i];
#ifdef NR_PDCCH_DCI_DEBUG
LOG_I(PHY,"[cce_count=%d,reg_in_cce_idx=%d,bundle_j=%d,symbol_idx=%d,candidate=%d] z[%d]=(%d,%d) <-> \t[f_reg=%d,fbundle_j=%d] llr[%d]=(%d,%d) \n",
cce_count,reg_in_cce_idx,bundle_j,symbol_idx,c_id,(index_z + i),*(int16_t *) &z[index_z + i],*(1 + (int16_t *) &z[index_z + i]),
f_reg,f_bundle_j,(index_llr + i),*(int16_t *) &llr[index_llr + i], *(1 + (int16_t *) &llr[index_llr + i]));
LOG_I(PHY,"[candidate=%d,symbol_idx=%d,cce=%d,REG bundle=%d,PRB=%d] z[%d]=(%d,%d) <-> \t llr[%d]=(%d,%d) \n",
c_id,symbol_idx,cce_count,k,f*B_rb + rb,(index_z + i),*(int16_t *) &z[index_z + i],*(1 + (int16_t *) &z[index_z + i]),
(index_llr + i),*(int16_t *) &llr[index_llr + i], *(1 + (int16_t *) &llr[index_llr + i]));
#endif
}
rb_count++;
}
rb++;
}
}
}
@@ -783,15 +782,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
rel15->number_of_candidates,
rel15->CCE,
rel15->L);
/*
nr_pdcch_unscrambling(rel15->rnti,
frame_parms,
slot,
pdcch_vars->e_rx,
rel15->coreset.duration*n_rb*9*2,
// get_nCCE(n_pdcch_symbols, frame_parms, mi) * 72,
rel15->coreset.pdcch_dmrs_scrambling_id);
*/
LOG_D(PHY,"we end nr_pdcch_unscrambling()\n");
LOG_D(PHY,"Ending nr_rx_pdcch() function\n");
@@ -870,6 +861,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
//int gNB_id = 0;
int16_t tmp_e[16*108];
rnti_t n_rnti;
int e_rx_cand_idx = 0;
for (int j=0;j<rel15->number_of_candidates;j++) {
int CCEind = rel15->CCE[j];
@@ -892,13 +884,13 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
uint64_t dci_estimation[2]= {0};
LOG_D(PHY, "Trying DCI candidate %d of %d number of candidates, CCE %d (%d), L %d, length %d, format %s\n",
j, rel15->number_of_candidates, CCEind, CCEind*9*6*2, L, dci_length,nr_dci_format_string[rel15->dci_format_options[k]]);
j, rel15->number_of_candidates, CCEind, e_rx_cand_idx, L, dci_length,nr_dci_format_string[rel15->dci_format_options[k]]);
nr_pdcch_unscrambling(&pdcch_vars->e_rx[CCEind*108], rel15->coreset.scrambling_rnti, L*108, rel15->coreset.pdcch_dmrs_scrambling_id, tmp_e);
nr_pdcch_unscrambling(&pdcch_vars->e_rx[e_rx_cand_idx], rel15->coreset.scrambling_rnti, L*108, rel15->coreset.pdcch_dmrs_scrambling_id, tmp_e);
#ifdef DEBUG_DCI_DECODING
uint32_t * z = (uint32_t *) &pdcch_vars->e_rx[CCEind*108];
for (int index_z = 0; index_z < 96; index_z++){
uint32_t *z = (uint32_t *) &pdcch_vars->e_rx[e_rx_cand_idx];
for (int index_z = 0; index_z < L*6; index_z++){
for (int i=0; i<9; i++) {
LOG_D(PHY,"z[%d]=(%d,%d) \n", (9*index_z + i), *(int16_t *) &z[index_z + i],*(1 + (int16_t *) &z[index_z + i]));
}
@@ -937,6 +929,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
LOG_D(PHY,"(%i.%i) Decoded crc %x does not match rnti %x for DCI format %d\n", proc->frame_rx, proc->nr_slot_rx, crc, n_rnti, rel15->dci_format_options[k]);
}
}
e_rx_cand_idx += 9*L*6*2; //e_rx index for next candidate (L CCEs, 6 REGs per CCE and 9 REs per REG and 2 uint16_t per RE)
}
pdcch_vars->nb_search_space = 0;
return(dci_ind->number_of_dcis);
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+1 -1
View File
@@ -610,7 +610,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int gNB_
dual_stream_UE = 0;
gNB_id_i = gNB_id+1;
i_mod = 0;
if (( m==first_symbol_with_data ) && (m<4))
if (m==first_symbol_with_data)
first_symbol_flag = 1;
else
first_symbol_flag = 0;
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+12 -11
View File
@@ -315,21 +315,21 @@ void get_info_from_tda_tables(int default_abc,
int tda,
int dmrs_TypeA_Position,
int normal_CP,
bool *is_mapping_typeA,
int *startSymbolIndex,
int *nrOfSymbols) {
int k0 = 0;
int is_mapping_typeA = 1;
switch(default_abc){
case 1:
if (normal_CP){
if (dmrs_TypeA_Position){
is_mapping_typeA = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][0];
*is_mapping_typeA = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][0];
k0 = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][1];
*startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][2];
*nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][3];
}
else{
is_mapping_typeA = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][0];
*is_mapping_typeA = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][0];
k0 = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][1];
*startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][2];
*nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][3];
@@ -337,13 +337,13 @@ void get_info_from_tda_tables(int default_abc,
}
else{
if (dmrs_TypeA_Position){
is_mapping_typeA = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][0];
*is_mapping_typeA = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][0];
k0 = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][1];
*startSymbolIndex = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][2];
*nrOfSymbols = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][3];
}
else{
is_mapping_typeA = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][0];
*is_mapping_typeA = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][0];
k0 = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][1];
*startSymbolIndex = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][2];
*nrOfSymbols = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][3];
@@ -352,13 +352,13 @@ void get_info_from_tda_tables(int default_abc,
break;
case 2:
if (dmrs_TypeA_Position){
is_mapping_typeA = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][0];
*is_mapping_typeA = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][0];
k0 = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][1];
*startSymbolIndex = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][2];
*nrOfSymbols = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][3];
}
else{
is_mapping_typeA = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][0];
*is_mapping_typeA = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][0];
k0 = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][1];
*startSymbolIndex = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][2];
*nrOfSymbols = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][3];
@@ -366,13 +366,13 @@ void get_info_from_tda_tables(int default_abc,
break;
case 3:
if (dmrs_TypeA_Position){
is_mapping_typeA = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][0];
*is_mapping_typeA = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][0];
k0 = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][1];
*startSymbolIndex = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][2];
*nrOfSymbols = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][3];
}
else{
is_mapping_typeA = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][0];
*is_mapping_typeA = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][0];
k0 = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][1];
*startSymbolIndex = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][2];
*nrOfSymbols = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][3];
@@ -382,7 +382,6 @@ void get_info_from_tda_tables(int default_abc,
AssertFatal(1==0,"Invalid default time domaing allocation type\n");
}
AssertFatal(k0==0,"Only k0 = 0 is supported\n");
AssertFatal(is_mapping_typeA==1,"Only mapping type A is currently supported\n");
}
const char *prachfmt[]={"0","1","2","3", "A1","A2","A3","B1","B4","C0","C2","A1/B1","A2/B2","A3/B3"};
@@ -2721,6 +2720,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
LOG_D(NR_MAC,"DAI1 nbits %d\n",dci_pdu->dai[0].nbits);
// 2nd DAI
if (cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig &&
cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup &&
cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) { //TODO not sure about that
dci_pdu->dai[1].nbits = 2;
size += dci_pdu->dai[1].nbits;
@@ -2991,7 +2991,8 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
dci_pdu->srs_request.nbits = 3;
size += dci_pdu->srs_request.nbits;
// CBGTI
if (cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig&&
if (cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig &&
cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup &&
cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) {
uint8_t maxCBGperTB = (cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission->choice.setup->maxCodeBlockGroupsPerTransportBlock + 1) * 2;
long *maxCWperDCI_rrc = pdsch_Config->maxNrofCodeWordsScheduledByDCI;
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
+1
View File
@@ -140,6 +140,7 @@ void get_info_from_tda_tables(int default_abc,
int tda,
int dmrs_TypeA_Position,
int normal_CP,
bool *is_mapping_typeA,
int *startSymbolIndex,
int *nrOfSymbols);
openair2/LAYER2/NR_MAC_UE/mac_proto.h
+1
View File
@@ -271,6 +271,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
int *mappingtype,
uint8_t time_domain_ind,
int default_abc,
bool use_default);
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+17 -6
View File
@@ -470,6 +470,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
int *mapping_type,
uint8_t time_domain_ind,
int default_abc,
bool use_default){
@@ -547,13 +548,15 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
}
else {// Default configuration from tables
bool is_typeA;
get_info_from_tda_tables(default_abc,
time_domain_ind,
dmrs_typeA_pos,
1, // normal CP
&is_typeA,
&sliv_S,
&sliv_L);
*mapping_type = is_typeA? typeA : typeB;
dlsch_config_pdu->number_symbols = sliv_L;
dlsch_config_pdu->start_symbol = sliv_S;
}
@@ -859,12 +862,17 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup)
pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
int mappingtype;
/* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,pdsch_TimeDomainAllocationList,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val,default_abc,rnti==SI_RNTI) < 0) {
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,pdsch_TimeDomainAllocationList,
NULL,dlsch_config_pdu_1_0,&mappingtype,
dci->time_domain_assignment.val,
default_abc,rnti==SI_RNTI) < 0) {
LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot);
return -1;
}
int mappingtype = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType : ((dlsch_config_pdu_1_0->start_symbol <= 3)? typeA: typeB);
if(pdsch_TimeDomainAllocationList && rnti!=SI_RNTI)
mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
/* dmrs symbol positions*/
dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config,
@@ -1056,13 +1064,16 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
return -1;
}
/* TIME_DOM_RESOURCE_ASSIGNMENT */
int mappingtype;
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = choose_dl_tda_list(pdsch_Config,bwpc->pdsch_ConfigCommon->choice.setup);
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,pdsch_TimeDomainAllocationList,NULL,dlsch_config_pdu_1_1,dci->time_domain_assignment.val,0,false) < 0) {
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,pdsch_TimeDomainAllocationList,
NULL,dlsch_config_pdu_1_1,&mappingtype,
dci->time_domain_assignment.val,0,false) < 0) {
LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot);
return -1;
}
int mappingtype = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType : ((dlsch_config_pdu_1_1->start_symbol <= 3)? typeA: typeB);
if(pdsch_TimeDomainAllocationList)
mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
dlsch_config_pdu_1_1->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? NFAPI_NR_DMRS_TYPE1 : NFAPI_NR_DMRS_TYPE2;
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+1 -1
View File
@@ -768,7 +768,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
return -1;
}
/* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac, pusch_TimeDomainAllocationList, NULL, pusch_config_pdu, NULL, dci->time_domain_assignment.val,0,false) < 0) {
if (nr_ue_process_dci_time_dom_resource_assignment(mac, pusch_TimeDomainAllocationList, NULL, pusch_config_pdu, NULL, NULL, dci->time_domain_assignment.val,0,false) < 0) {
return -1;
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+56 -21
View File
@@ -1029,6 +1029,7 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
int start_symbol_index,nr_of_symbols;
SLIV2SL(startSymbolAndLength, &start_symbol_index, &nr_of_symbols);
int mcsindex = -1; // init value
pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
pusch_pdu->rnti = rnti;
@@ -1037,10 +1038,7 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
pusch_pdu->bwp_size = bwp_size;
pusch_pdu->subcarrier_spacing = scs;
pusch_pdu->cyclic_prefix = 0;
pusch_pdu->mcs_index = 1;
pusch_pdu->mcs_table = 0;
pusch_pdu->target_code_rate = nr_get_code_rate_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table);
pusch_pdu->qam_mod_order = nr_get_Qm_ul(pusch_pdu->mcs_index,pusch_pdu->mcs_table);
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL)
pusch_pdu->transform_precoding = 1;
else
@@ -1077,15 +1075,23 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
for(int i = start_symbol_index; i < start_symbol_index+nr_of_symbols; i++)
num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1;
pusch_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_pdu->qam_mod_order,
pusch_pdu->target_code_rate,
pusch_pdu->rb_size,
pusch_pdu->nr_of_symbols,
num_dmrs_symb*12, // nb dmrs set for no data in dmrs symbol
0, //nb_rb_oh
0, // to verify tb scaling
pusch_pdu->nrOfLayers)>>3;
int TBS = 0;
while(TBS<7) { // TBS for msg3 is 7 bytes (except for RRCResumeRequest1 currently not implemented)
mcsindex++;
pusch_pdu->target_code_rate = nr_get_code_rate_ul(mcsindex,pusch_pdu->mcs_table);
pusch_pdu->qam_mod_order = nr_get_Qm_ul(mcsindex,pusch_pdu->mcs_table);
TBS = nr_compute_tbs(pusch_pdu->qam_mod_order,
pusch_pdu->target_code_rate,
pusch_pdu->rb_size,
pusch_pdu->nr_of_symbols,
num_dmrs_symb*12, // nb dmrs set for no data in dmrs symbol
0, //nb_rb_oh
0, // to verify tb scaling
pusch_pdu->nrOfLayers)>>3;
pusch_pdu->mcs_index = mcsindex;
pusch_pdu->pusch_data.tb_size = TBS;
}
}
void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP, NR_RA_t *ra, uint8_t *RAR_pdu)
@@ -1179,7 +1185,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
time_domain_assignment = 1;
else
time_domain_assignment = 0;
uint8_t mcsIndex = 0;
int mcsIndex = -1; // initialization value
int rbStart = 0;
int rbSize = 8;
@@ -1336,9 +1342,6 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
pdsch_pdu_rel15->SubcarrierSpacing = genericParameters->subcarrierSpacing;
pdsch_pdu_rel15->CyclicPrefix = 0;
pdsch_pdu_rel15->NrOfCodewords = 1;
pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(mcsIndex,mcsTableIdx);
pdsch_pdu_rel15->qamModOrder[0] = 2;
pdsch_pdu_rel15->mcsIndex[0] = mcsIndex;
pdsch_pdu_rel15->mcsTable[0] = mcsTableIdx;
pdsch_pdu_rel15->rvIndex[0] = 0;
pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
@@ -1362,9 +1365,38 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
startSymbolIndex,
mappingtype, 1);
int x_Overhead = 0;
uint8_t tb_scaling = 0;
nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, x_Overhead, pdsch_pdu_rel15->numDmrsCdmGrpsNoData, tb_scaling);
int R, Qm;
uint8_t N_PRB_DMRS;
uint32_t TBS=0;
if (dmrsConfigType == NFAPI_NR_DMRS_TYPE1) {
// if no data in dmrs cdm group is 1 only even REs have no data
// if no data in dmrs cdm group is 2 both odd and even REs have no data
N_PRB_DMRS = pdsch_pdu_rel15->numDmrsCdmGrpsNoData*6;
}
else {
N_PRB_DMRS = pdsch_pdu_rel15->numDmrsCdmGrpsNoData*4;
}
uint16_t dmrs_length = get_num_dmrs(pdsch_pdu_rel15->dlDmrsSymbPos);
while(TBS<9) { // min TBS for RAR is 9 bytes
mcsIndex++;
R = nr_get_code_rate_dl(mcsIndex, mcsTableIdx);
Qm = nr_get_Qm_dl(mcsIndex, mcsTableIdx);
TBS = nr_compute_tbs(Qm,
R,
rbSize,
nrOfSymbols,
N_PRB_DMRS*dmrs_length,
0, // overhead
tb_scaling, // tb scaling
1)>>3; // layers
pdsch_pdu_rel15->targetCodeRate[0] = R;
pdsch_pdu_rel15->qamModOrder[0] = Qm;
pdsch_pdu_rel15->mcsIndex[0] = mcsIndex;
pdsch_pdu_rel15->TBSize[0] = TBS;
}
// Fill PDCCH DL DCI PDU
nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci];
@@ -1651,12 +1683,15 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
uint8_t tb_scaling = 0;
uint16_t *vrb_map = cc[CC_id].vrb_map;
do {
rbSize++;
if(rbSize < BWPSize)
rbSize++;
else
mcsIndex++;
LOG_D(NR_MAC,"Calling nr_compute_tbs with N_PRB_DMRS %d, N_DMRS_SLOT %d\n",N_PRB_DMRS,N_DMRS_SLOT);
harq->tb_size = nr_compute_tbs(nr_get_Qm_dl(mcsIndex, mcsTableIdx),
nr_get_code_rate_dl(mcsIndex, mcsTableIdx),
rbSize, nrOfSymbols, N_PRB_DMRS * N_DMRS_SLOT, 0, tb_scaling,1) >> 3;
} while (rbSize < BWPSize && harq->tb_size < ra->mac_pdu_length);
nr_get_code_rate_dl(mcsIndex, mcsTableIdx),
rbSize, nrOfSymbols, N_PRB_DMRS * N_DMRS_SLOT, 0, tb_scaling,1) >> 3;
} while (harq->tb_size < ra->mac_pdu_length && mcsIndex<=28);
int i = 0;
while ((i < rbSize) && (rbStart + rbSize <= BWPSize)) {
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+4 -3
View File
@@ -612,14 +612,15 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
int startSymbolIndex = 0;
int nrOfSymbols = 0;
bool is_typeA;
get_info_from_tda_tables(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern,
time_domain_allocation,
gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position,
1, &startSymbolIndex, &nrOfSymbols);
1, &is_typeA,
&startSymbolIndex, &nrOfSymbols);
// TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C)
int mappingtype = (startSymbolIndex <= 3)? typeA: typeB;
int mappingtype = is_typeA? typeA: typeB;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype, 1);
// Configure sched_ctrlCommon for SIB1
openair2/RRC/NR/nr_rrc_config.c
+7 -4
View File
@@ -34,14 +34,17 @@
void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc){
lte_frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing);
int curr_bwp = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
// coreset duration setting to be improved in the framework of RRC harmonization, potentially using a common function
int len_coreset = 1;
if (curr_bwp < 48)
len_coreset = 2;
// setting default TDA for DL with
struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t));
timedomainresourceallocation->mappingType = NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
timedomainresourceallocation->startSymbolAndLength = get_SLIV(1,13); // basic slot configuration starting in symbol 1 til the end of the slot
timedomainresourceallocation->startSymbolAndLength = get_SLIV(len_coreset,14-len_coreset); // basic slot configuration starting in symbol 1 til the end of the slot
ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list,
timedomainresourceallocation);
if(frame_type==TDD) {
// TDD
if(scc->tdd_UL_DL_ConfigurationCommon) {
@@ -49,7 +52,7 @@ void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc){
if(dl_symb > 1) {
timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t));
timedomainresourceallocation->mappingType = NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
timedomainresourceallocation->startSymbolAndLength = get_SLIV(1,dl_symb-1); // mixed slot configuration starting in symbol 1 til the end of the dl allocation
timedomainresourceallocation->startSymbolAndLength = get_SLIV(len_coreset,dl_symb-len_coreset); // mixed slot configuration starting in symbol 1 til the end of the dl allocation
ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list,
timedomainresourceallocation);
}
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.24PRB.usrpb210.conf
+301
View File
@@ -0,0 +1,301 @@
Active_gNBs = ( "gNB-OAI");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
gNB_name = "gNB-OAI";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
sst = 1;
sd = 0x1; // 0 false, else true
},
{
sst = 1;
sd = 0x112233; // 0 false, else true
}
);
});
nr_cellid = 12345678L;
////////// Physical parameters:
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 1;
sib1_tda = 15;
min_rxtxtime = 6;
pdcch_ConfigSIB1 = (
{
controlResourceSetZero = 2;
searchSpaceZero = 0;
}
);
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 12 PRBs@30kHz SCS (same as initial BWP)
absoluteFrequencySSB = 640288;
dl_frequencyBand = 78;
# this is 3600 MHz
dl_absoluteFrequencyPointA = 640000;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 1;
dl_carrierBandwidth = 24;
#initialDownlinkBWP
#genericParameters
# this is RBstart=27,L=48 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6325;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 2;
initialDLBWPsearchSpaceZero = 0;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 1;
ul_carrierBandwidth = 24;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 6325;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 98;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 13;
preambleReceivedTargetPower = -96;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 1;
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 4;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 14;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -90;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 1;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4;
ssPBCH_BlockPower = -25;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "192.168.70.132";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_NG_AMF = "demo-oai";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.70.129/24";
GNB_INTERFACE_NAME_FOR_NGU = "demo-oai";
GNB_IPV4_ADDRESS_FOR_NGU = "192.168.70.129/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 150;
pucch_TargetSNRx10 = 200;
ulsch_max_frame_inactivity = 1;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 150;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [78];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
sf_extension = 0;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
rfsimulator :
{
serveraddr = "server";
serverport = "4043";
options = (); #("saviq"); or/and "chanmod"
modelname = "AWGN";
IQfile = "/tmp/rfsimulator.iqs";
};
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="debug";
ngap_log_verbosity ="medium";
};