simplify SIB1 scheduling by removing unnecessary storage of information in sched_ctrlCommon
This commit is contained in:
@@ -320,62 +320,37 @@ static bool update_rb_mcs_tbs(NR_sched_pdsch_t *pdsch, uint32_t num_total_bytes,
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return true;
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}
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static NR_sched_pdsch_t schedule_control_sib1(gNB_MAC_INST *gNB_mac,
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int CC_id,
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NR_sched_pdcch_t *pdcch,
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NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
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int time_domain_allocation,
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NR_pdsch_dmrs_t *dmrs_parms,
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NR_tda_info_t *tda_info,
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uint8_t candidate_idx,
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int beam,
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uint16_t num_total_bytes)
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static NR_sched_pdsch_t allocate_sib1(gNB_MAC_INST *gNB_mac,
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int CC_id,
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NR_sched_pdcch_t *pdcch,
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NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
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int aggregation_level,
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int cce_index,
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int time_domain_allocation,
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NR_tda_info_t *tda_info,
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int beam,
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uint16_t num_total_bytes)
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{
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AssertFatal(gNB_mac->sched_ctrlCommon, "sched_ctrlCommon is NULL\n");
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NR_COMMON_channels_t *cc = &gNB_mac->common_channels[CC_id];
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uint16_t *vrb_map = cc->vrb_map[beam];
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc, NULL, tda_info, 1);
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NR_sched_pdsch_t pdsch = {
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.bwp_info = get_pdsch_bwp_start_size(gNB_mac, NULL),
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.time_domain_allocation = time_domain_allocation,
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.dmrs_parms = *dmrs_parms,
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.dmrs_parms = dmrs_parms,
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.tda_info = *tda_info,
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.nrOfLayers = 1,
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.pm_index = 0,
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.mcs = 0, // starting from mcs 0
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};
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gNB_mac->sched_ctrlCommon->num_total_bytes = num_total_bytes;
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uint8_t nr_of_candidates = 0;
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for (int i = 0; i < 3; i++) {
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find_aggregation_candidates(&gNB_mac->sched_ctrlCommon->aggregation_level, &nr_of_candidates, gNB_mac->sched_ctrlCommon->search_space,4<<i);
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if (nr_of_candidates > 0)
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break; // choosing the lower value of aggregation level available
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}
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AssertFatal(nr_of_candidates > 0, "nr_of_candidates is 0\n");
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gNB_mac->sched_ctrlCommon->cce_index = find_pdcch_candidate(gNB_mac,
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CC_id,
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gNB_mac->sched_ctrlCommon->aggregation_level,
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nr_of_candidates,
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beam,
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pdcch,
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gNB_mac->sched_ctrlCommon->coreset,
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0);
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AssertFatal(gNB_mac->sched_ctrlCommon->cce_index >= 0, "Could not find CCE for coreset0\n");
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bool success = update_rb_mcs_tbs(&pdsch, gNB_mac->sched_ctrlCommon->num_total_bytes, vrb_map);
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uint16_t *vrb_map = cc->vrb_map[beam];
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bool success = update_rb_mcs_tbs(&pdsch, num_total_bytes, vrb_map);
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if (success) {
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// Mark the corresponding RBs as used
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fill_pdcch_vrb_map(gNB_mac,
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CC_id,
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pdcch,
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gNB_mac->sched_ctrlCommon->cce_index,
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gNB_mac->sched_ctrlCommon->aggregation_level,
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beam);
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for (int rb = 0; rb < pdsch.rbSize; rb++) {
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fill_pdcch_vrb_map(gNB_mac, CC_id, pdcch, cce_index, aggregation_level, beam);
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for (int rb = 0; rb < pdsch.rbSize; rb++)
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vrb_map[rb + type0_PDCCH_CSS_config->cset_start_rb] |= SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
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}
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} else {
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pdsch.tb_size = 0; // to signal we couldn't allocate TBS
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pdsch.time_domain_allocation = -1;
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@@ -478,10 +453,11 @@ static void nr_fill_nfapi_dl_SIB_pdu(gNB_MAC_INST *gNB_mac,
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static bool check_sib1_tda(gNB_MAC_INST *gNB_mac,
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NR_sched_pdcch_t *sched_pdcch,
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NR_beam_alloc_t *beam,
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int aggregation_level,
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int cce_index,
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int tda,
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int ssb_index,
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int CC_id,
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int candidate_idx)
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int CC_id)
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{
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NR_COMMON_channels_t *cc = &gNB_mac->common_channels[CC_id];
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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@@ -502,18 +478,17 @@ static bool check_sib1_tda(gNB_MAC_INST *gNB_mac,
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if (tda_info.startSymbolIndex < type0_PDCCH_CSS_config->first_symbol_index + type0_PDCCH_CSS_config->num_symbols)
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return false;
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NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc, NULL, &tda_info, 1);
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// Configure sched_ctrlCommon for SIB1
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gNB_mac->sib1_pdsch[ssb_index] = schedule_control_sib1(gNB_mac,
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CC_id,
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sched_pdcch,
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type0_PDCCH_CSS_config,
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tda,
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&dmrs_parms,
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&tda_info,
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candidate_idx,
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beam->idx,
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cc->sib1_bcch_length);
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gNB_mac->sib1_pdsch[ssb_index] = allocate_sib1(gNB_mac,
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CC_id,
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sched_pdcch,
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type0_PDCCH_CSS_config,
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aggregation_level,
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cce_index,
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tda,
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&tda_info,
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beam->idx,
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cc->sib1_bcch_length);
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if (gNB_mac->sib1_pdsch[ssb_index].tb_size > 0) {
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LOG_D(NR_MAC, "Found TDA for SIB1: %d\n", tda);
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return true;
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@@ -544,7 +519,6 @@ void schedule_nr_sib1(module_id_t module_idP,
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/* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */
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// TODO: Get these values from RRC
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const int CC_id = 0;
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uint8_t candidate_idx = 0;
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gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP];
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NR_COMMON_channels_t *cc = &gNB_mac->common_channels[CC_id];
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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@@ -588,10 +562,30 @@ void schedule_nr_sib1(module_id_t module_idP,
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NULL,
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type0_PDCCH_CSS_config);
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uint8_t nr_of_candidates, aggregation_level;
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for (int c = 0; c < 3; c++) {
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find_aggregation_candidates(&aggregation_level,
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&nr_of_candidates,
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gNB_mac->sched_ctrlCommon->search_space,
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4 << c);
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if (nr_of_candidates > 0)
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break; // choosing the lower value of aggregation level available
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}
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AssertFatal(nr_of_candidates > 0, "nr_of_candidates is 0\n");
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int cce_index = find_pdcch_candidate(gNB_mac,
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CC_id,
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aggregation_level,
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nr_of_candidates,
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beam.idx,
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&sched_pdcch,
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gNB_mac->sched_ctrlCommon->coreset,
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0);
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bool res = false;
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if (gNB_mac->sib1_pdsch[i].time_domain_allocation < 0) {
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for (int t = 0; t < 16; t++) {
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if (check_sib1_tda(gNB_mac, &sched_pdcch, &beam, t, i, CC_id, candidate_idx)) {
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if (check_sib1_tda(gNB_mac, &sched_pdcch, &beam, aggregation_level, cce_index, t, i, CC_id)) {
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res = true;
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break;
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}
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@@ -599,7 +593,14 @@ void schedule_nr_sib1(module_id_t module_idP,
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}
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AssertFatal(gNB_mac->sib1_pdsch[i].time_domain_allocation >= 0, "Couldn't select any TDA for SIB1\n");
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if (!res)
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res = check_sib1_tda(gNB_mac, &sched_pdcch, &beam, gNB_mac->sib1_pdsch[i].time_domain_allocation, i, CC_id, candidate_idx);
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res = check_sib1_tda(gNB_mac,
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&sched_pdcch,
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&beam,
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aggregation_level,
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cce_index,
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gNB_mac->sib1_pdsch[i].time_domain_allocation,
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i,
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CC_id);
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int tb_size = gNB_mac->sib1_pdsch[i].tb_size;
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AssertFatal(res && tb_size > 0, "Couldn't allocate TB for SIB1 for an already allocated TDA\n");
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nfapi_nr_dl_tti_request_body_t *dl_req = &DL_req->dl_tti_request_body;
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@@ -609,8 +610,8 @@ void schedule_nr_sib1(module_id_t module_idP,
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&sched_pdcch,
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gNB_mac->sched_ctrlCommon->search_space,
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gNB_mac->sched_ctrlCommon->coreset,
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gNB_mac->sched_ctrlCommon->aggregation_level,
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gNB_mac->sched_ctrlCommon->cce_index,
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aggregation_level,
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cce_index,
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dl_req,
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pdu_index,
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type0_PDCCH_CSS_config,
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@@ -682,7 +683,6 @@ static void other_sib_sched_control(module_id_t module_idP,
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NR_COMMON_channels_t *cc = &gNB_mac->common_channels[0];
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NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &gNB_mac->type0_PDCCH_CSS_config[cc->ssb_index[beam_index]];
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AssertFatal(gNB_mac->sched_ctrlCommon, "sched_ctrlCommon is NULL\n");
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NR_PDSCH_ConfigCommon_t *pdsch_ConfigCommon = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup;
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int time_domain_allocation = 1;
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NR_tda_info_t tda_info = set_tda_info_from_list(pdsch_ConfigCommon->pdsch_TimeDomainAllocationList, time_domain_allocation);
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