Merge branch 'develop_merge' into 'nfapi_nr_develop'

Merge develop w49 to nfapi_nr_develop

See merge request oai/openairinterface5g!990
This commit is contained in:
Gokul Srinivasan
2020-12-02 12:20:43 +01:00
207 changed files with 39778 additions and 3478 deletions
+1 -1
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@@ -185,7 +185,7 @@ class OaiCiTest():
SSH.command('mkdir -p log', '\$', 5)
SSH.command('chmod 777 log', '\$', 5)
# no need to remove in log (git clean did the trick)
SSH.command('stdbuf -o0 ./build_oai ' + self.Build_OAI_UE_args + ' 2>&1 | stdbuf -o0 tee compile_oai_ue.log', 'Bypassing the Tests|build have failed', 900)
SSH.command('stdbuf -o0 ./build_oai ' + self.Build_OAI_UE_args + ' 2>&1 | stdbuf -o0 tee compile_oai_ue.log', 'Bypassing the Tests|build have failed', 1200)
SSH.command('ls ran_build/build', '\$', 3)
SSH.command('ls ran_build/build', '\$', 3)
buildStatus = True
@@ -32,7 +32,7 @@
<testCase id="090101">
<class>Build_OAI_UE</class>
<desc>Build OAI UE</desc>
<Build_OAI_UE_args>-w USRP --UE</Build_OAI_UE_args>
<Build_OAI_UE_args>-w USRP --UE --ninja</Build_OAI_UE_args>
</testCase>
</testCaseList>
+21 -3
View File
@@ -32,9 +32,13 @@
000001
050000
050001
050002
050003
000001
010002
000001
070001
070000
010002
010003
</TestCaseRequestedList>
<TestCaseExclusionList></TestCaseExclusionList>
@@ -89,16 +93,30 @@
<class>Ping</class>
<desc>Ping: 20pings in 20sec</desc>
<ping_args>-c 20</ping_args>
<ping_packetloss_threshold>50</ping_packetloss_threshold>
<ping_packetloss_threshold>0</ping_packetloss_threshold>
</testCase>
<testCase id="050001">
<class>Ping</class>
<desc>Ping: 5pings in 1sec</desc>
<ping_args>-c 5 -i 0.2</ping_args>
<ping_packetloss_threshold>50</ping_packetloss_threshold>
<ping_packetloss_threshold>0</ping_packetloss_threshold>
</testCase>
<testCase id="050002">
<class>Ping</class>
<desc>Ping: 100pings in 20sec</desc>
<ping_args>-c 100 -i 0.2</ping_args>
<ping_packetloss_threshold>0</ping_packetloss_threshold>
</testCase>
<testCase id="050003">$
<class>Ping</class>$
<desc>Ping: 100pings in 20sec size 1000</desc>$
<ping_args>-c 100 -i 0.2 -s 1000</ping_args>$
<ping_packetloss_threshold>0</ping_packetloss_threshold>$
</testCase>$
<testCase id="070000">
<class>Terminate_eNB</class>
<desc>Terminate eNB</desc>
+1 -1
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@@ -32,7 +32,7 @@
<testCase id="090101">
<class>Build_OAI_UE</class>
<desc>Build OAI UE</desc>
<Build_OAI_UE_args>-w USRP --UE</Build_OAI_UE_args>
<Build_OAI_UE_args>-w USRP --UE --ninja</Build_OAI_UE_args>
</testCase>
</testCaseList>
+228 -6
View File
@@ -463,9 +463,9 @@ include_directories ("${RRC_FULL_DIR}")
#NR RRC
#######
set (NR_RRC_ASN1_VERSION "NR_Rel15" )
make_version(NR_RRC_VERSION 15 6 0)
set (NR_RRC_GRAMMAR ${OPENAIR2_DIR}/RRC/NR/MESSAGES/asn1c/ASN1_files/nr-rrc-15.6.0.asn1)
set (NR_RRC_ASN1_VERSION "NR_Rel16" )
make_version(NR_RRC_VERSION 16 1 0)
set (NR_RRC_GRAMMAR ${OPENAIR2_DIR}/RRC/NR/MESSAGES/asn1c/ASN1_files/nr-rrc-16.1.0.asn1)
add_definitions(-DNR_RRC_VERSION=${NR_RRC_VERSION})
set (NR_RRC_FULL_DIR ${asn1_generated_dir}/RRC_${NR_RRC_ASN1_VERSION})
@@ -544,6 +544,59 @@ add_library(S1AP_ENB
add_dependencies(S1AP_ENB rrc_flag s1ap_flag)
# NGAP
# Same limitation as described in RRC: unknown generated file list
# so we generate it at cmake time
##############
set (NGAP_RELEASE R15)
set(NGAP_DIR ${OPENAIR3_DIR}/NGAP)
make_version(NGAP_VERSION 15 8 0)
set(NGAP_ASN_FILES "ngap-15.8.0.asn1")
add_definitions(-DNGAP_VERSION=${NGAP_VERSION})
set(NGAP_ASN_DIR ${NGAP_DIR}/MESSAGES/ASN1/ASN1_files)
set(NGAP_C_DIR ${asn1_generated_dir}/NGAP_${NGAP_RELEASE})
# Warning: if you modify ASN.1 source file to generate new C files, cmake should be re-run instead of make
execute_process(COMMAND ${OPENAIR_CMAKE}/tools/make_asn1c_includes.sh "${NGAP_C_DIR}" "${NGAP_ASN_DIR}/${NGAP_ASN_FILES}" "NGAP_" -fno-include-deps -findirect-choice
RESULT_VARIABLE ret)
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${ret}: error")
endif (NOT ${ret} STREQUAL 0)
file(GLOB NGAP_source ${NGAP_C_DIR}/*.c)
add_custom_target (
ngap_flag ALL
${OPENAIR_CMAKE}/tools/make_asn1c_includes.sh "${NGAP_C_DIR}" "${NGAP_ASN_DIR}/${NGAP_ASN_FILES}" "NGAP_" -fno-include-deps
DEPENDS "${NGAP_ASN_DIR}/${NGAP_ASN_FILES}"
)
add_library(NGAP_LIB
${NGAP_source}
# ${NGAP_DIR}/ngap_common.c
)
add_dependencies(NGAP_LIB rrc_flag ngap_flag)
include_directories ("${NGAP_C_DIR}")
include_directories ("${NGAP_DIR}")
add_library(NGAP_GNB
${NGAP_DIR}/ngap_gNB.c
${NGAP_DIR}/ngap_gNB_context_management_procedures.c
${NGAP_DIR}/ngap_gNB_decoder.c
${NGAP_DIR}/ngap_gNB_encoder.c
${NGAP_DIR}/ngap_gNB_handlers.c
${NGAP_DIR}/ngap_gNB_itti_messaging.c
${NGAP_DIR}/ngap_gNB_management_procedures.c
${NGAP_DIR}/ngap_gNB_nas_procedures.c
${NGAP_DIR}/ngap_gNB_nnsf.c
${NGAP_DIR}/ngap_gNB_overload.c
${NGAP_DIR}/ngap_gNB_trace.c
${NGAP_DIR}/ngap_gNB_ue_context.c
)
add_dependencies(NGAP_GNB rrc_flag ngap_flag)
#M2AP
# Same limitation as described in RRC/S1AP: unknown generated file list
# so we generate it at cmake time
@@ -933,6 +986,8 @@ add_boolean_option(MESSAGE_CHART_GENERATOR_PHY False "trace some PHY exchang
add_boolean_option(UE_EXPANSION False "enable UE_EXPANSION with max 256 UE")
add_boolean_option(PHY_TX_THREAD False "enable UE_EXPANSION with max 256 UE")
add_boolean_option(PRE_SCD_THREAD False "enable UE_EXPANSION with max 256 UE")
add_boolean_option(UESIM_EXPANSION False "enable UESIM_EXPANSION with max 256 UE")
add_boolean_option(ITTI_SIM False "enable itti simulator")
########################
# Include order
@@ -1965,6 +2020,7 @@ set(L2_NR_SRC
${NR_RRC_DIR}/rrc_gNB_internode.c
${NR_RRC_DIR}/rrc_gNB_reconfig.c
${NR_RRC_DIR}/rrc_gNB_UE_context.c
${NR_RRC_DIR}/rrc_gNB_NGAP.c
)
set(L2_SRC_UE
@@ -2031,6 +2087,7 @@ set (MAC_NR_SRC
${NR_GNB_MAC_DIR}/gNB_scheduler_ulsch.c
${NR_GNB_MAC_DIR}/gNB_scheduler_primitives.c
${NR_GNB_MAC_DIR}/gNB_scheduler_phytest.c
${NR_GNB_MAC_DIR}/gNB_scheduler_uci.c
${NR_GNB_MAC_DIR}/gNB_scheduler_RA.c
)
@@ -2471,6 +2528,124 @@ if(NAS_UE)
endif()
if(ITTI_SIM)
set(libnas_ue_api_OBJS
${NAS_SRC}UE/API/USER/at_command.c
${NAS_SRC}UE/API/USER/at_error.c
${NAS_SRC}UE/API/USER/at_response.c
${NAS_SRC}UE/API/USER/user_api.c
${NAS_SRC}UE/API/USER/user_indication.c
${NAS_SRC}UE/API/USIM/aka_functions.c
${NAS_SRC}UE/API/USIM/usim_api.c
)
set(libnas_ue_emm_OBJS
${NAS_SRC}UE/EMM/Attach.c
${NAS_SRC}UE/EMM/Authentication.c
${NAS_SRC}UE/EMM/Detach.c
${NAS_SRC}UE/EMM/emm_main.c
${NAS_SRC}UE/EMM/EmmStatusHdl.c
${NAS_SRC}UE/EMM/Identification.c
${NAS_SRC}UE/EMM/IdleMode.c
${NAS_SRC}UE/EMM/LowerLayer.c
${NAS_SRC}UE/EMM/SecurityModeControl.c
${NAS_SRC}UE/EMM/ServiceRequestHdl.c
${NAS_SRC}UE/EMM/TrackingAreaUpdate.c
)
set(libnas_ue_emm_sap_OBJS
${NAS_SRC}UE/EMM/SAP/emm_as.c
${NAS_SRC}UE/EMM/SAP/EmmDeregisteredAttachNeeded.c
${NAS_SRC}UE/EMM/SAP/EmmDeregisteredAttemptingToAttach.c
${NAS_SRC}UE/EMM/SAP/EmmDeregistered.c
${NAS_SRC}UE/EMM/SAP/EmmDeregisteredInitiated.c
${NAS_SRC}UE/EMM/SAP/EmmDeregisteredLimitedService.c
${NAS_SRC}UE/EMM/SAP/EmmDeregisteredNoCellAvailable.c
${NAS_SRC}UE/EMM/SAP/EmmDeregisteredNoImsi.c
${NAS_SRC}UE/EMM/SAP/EmmDeregisteredNormalService.c
${NAS_SRC}UE/EMM/SAP/EmmDeregisteredPlmnSearch.c
${NAS_SRC}UE/EMM/SAP/emm_esm.c
${NAS_SRC}UE/EMM/SAP/emm_fsm.c
${NAS_SRC}UE/EMM/SAP/EmmNull.c
${NAS_SRC}UE/EMM/SAP/emm_recv.c
${NAS_SRC}UE/EMM/SAP/emm_reg.c
${NAS_SRC}UE/EMM/SAP/EmmRegisteredAttemptingToUpdate.c
${NAS_SRC}UE/EMM/SAP/EmmRegistered.c
${NAS_SRC}UE/EMM/SAP/EmmRegisteredImsiDetachInitiated.c
${NAS_SRC}UE/EMM/SAP/EmmRegisteredInitiated.c
${NAS_SRC}UE/EMM/SAP/EmmRegisteredLimitedService.c
${NAS_SRC}UE/EMM/SAP/EmmRegisteredNoCellAvailable.c
${NAS_SRC}UE/EMM/SAP/EmmRegisteredNormalService.c
${NAS_SRC}UE/EMM/SAP/EmmRegisteredPlmnSearch.c
${NAS_SRC}UE/EMM/SAP/EmmRegisteredUpdateNeeded.c
${NAS_SRC}UE/EMM/SAP/emm_sap.c
${NAS_SRC}UE/EMM/SAP/emm_send.c
${NAS_SRC}UE/EMM/SAP/EmmServiceRequestInitiated.c
${NAS_SRC}UE/EMM/SAP/EmmTrackingAreaUpdatingInitiated.c
)
set (libnas_ue_esm_OBJS
${NAS_SRC}UE/ESM/DedicatedEpsBearerContextActivation.c
${NAS_SRC}UE/ESM/DefaultEpsBearerContextActivation.c
${NAS_SRC}UE/ESM/EpsBearerContextDeactivation.c
${NAS_SRC}UE/ESM/esm_ebr.c
${NAS_SRC}UE/ESM/esm_ebr_context.c
${NAS_SRC}UE/ESM/esm_ip.c
${NAS_SRC}UE/ESM/esm_main.c
${NAS_SRC}UE/ESM/esm_pt.c
${NAS_SRC}UE/ESM/EsmStatusHdl.c
${NAS_SRC}UE/ESM/PdnConnectivity.c
${NAS_SRC}UE/ESM/PdnDisconnect.c
)
set(libnas_ue_esm_sap_OBJS
${NAS_SRC}UE/ESM/SAP/esm_recv.c
${NAS_SRC}UE/ESM/SAP/esm_send.c
${NAS_SRC}UE/ESM/SAP/esm_sap.c
)
set(libnrnas_emm_msg_OBJS
${NAS_SRC}COMMON/EMM/MSG/RegistrationRequest.c
)
set(libnrnas_ies_OBJS
${NAS_SRC}COMMON/IES/ExtendedProtocolDiscriminator.c
${NAS_SRC}COMMON/IES/FGSMobileIdentity.c
${NAS_SRC}COMMON/IES/FGSRegistrationType.c
${NAS_SRC}COMMON/IES/SpareHalfOctet.c
${NAS_SRC}COMMON/IES/FGMMCapability.c
${NAS_SRC}COMMON/IES/NrUESecurityCapability.c
)
add_library(LIB_NAS_SIMUE
${NAS_SRC}UE/nas_itti_messaging.c
${NAS_SRC}UE/nas_network.c
${NAS_SRC}UE/nas_parser.c
${NAS_SRC}UE/nas_proc.c
${NAS_SRC}UE/nas_user.c
${NAS_SRC}NR_UE/nr_nas_msg_sim.c
${libnas_api_OBJS}
${libnas_ue_api_OBJS}
${libnas_emm_msg_OBJS}
${libnas_esm_msg_OBJS}
${libnas_ies_OBJS}
${libnas_utils_OBJS}
${libnas_ue_emm_OBJS}
${libnas_ue_emm_sap_OBJS}
${libnas_ue_esm_OBJS}
${libnas_ue_esm_sap_OBJS}
${libnrnas_emm_msg_OBJS}
${libnrnas_ies_OBJS}
)
add_dependencies(LIB_NAS_SIMUE rrc_flag)
set(NAS_SIM_LIB LIB_NAS_SIMUE)
include_directories(${NAS_SRC}NR_UE)
include_directories(${NAS_SRC}UE)
include_directories(${NAS_SRC}UE/API/USER)
include_directories(${NAS_SRC}UE/API/USIM)
include_directories(${NAS_SRC}UE/EMM)
include_directories(${NAS_SRC}UE/EMM/SAP)
include_directories(${NAS_SRC}UE/ESM)
include_directories(${NAS_SRC}UE/ESM/SAP)
endif()
# nbiot
add_definitions("-DNUMBER_OF_UE_MAX_NB_IoT=16")
set (NBIOT_SOURCES
@@ -2869,7 +3044,7 @@ target_link_libraries (nr-softmodem
-Wl,--start-group
UTIL HASHTABLE SCTP_CLIENT UDP SCHED_LIB SCHED_RU_LIB SCHED_NR_LIB PHY_NR PHY PHY_COMMON PHY_NR_COMMON PHY_RU LFDS NR_GTPV1U SECU_CN SECU_OSA
${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} ${FLEXRAN_AGENT_LIB} LFDS7 ${MSC_LIB} ${RAL_LIB} ${NAS_UE_LIB} RRC_LIB NR_RRC_LIB
S1AP_LIB S1AP_ENB L2_LTE_NR L2_NR MAC_NR_COMMON NFAPI_COMMON_LIB NFAPI_LIB NFAPI_VNF_LIB NFAPI_PNF_LIB NFAPI_USER_LIB
NGAP_LIB NGAP_GNB S1AP_LIB S1AP_ENB L2_LTE_NR L2_NR MAC_NR_COMMON NFAPI_COMMON_LIB NFAPI_LIB NFAPI_VNF_LIB NFAPI_PNF_LIB NFAPI_USER_LIB
X2AP_LIB X2AP_ENB F1AP_LIB F1AP M2AP_LIB M2AP_ENB M3AP_LIB M3AP_ENB ${PROTO_AGENT_LIB} ${FSPT_MSG_LIB}
-Wl,--end-group z dl)
@@ -2951,7 +3126,7 @@ add_executable(nr-uesoftmodem
target_link_libraries (nr-uesoftmodem
-Wl,--start-group
RRC_LIB NR_RRC_LIB SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_RU_LIB SCHED_UE_LIB SCHED_NR_UE_LIB
RRC_LIB NR_RRC_LIB NGAP_LIB NGAP_GNB SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_RU_LIB SCHED_UE_LIB SCHED_NR_UE_LIB
PHY_COMMON PHY_NR_COMMON PHY_UE PHY_NR_UE PHY_RU LFDS NR_L2_UE L2_UE_LTE_NR MAC_NR_COMMON NFAPI_COMMON_LIB NFAPI_LIB NFAPI_PNF_LIB
NFAPI_USER_LIB MISC_NFAPI_NR_LIB S1AP_LIB S1AP_ENB
${MSC_LIB} ${RAL_LIB} ${NAS_UE_LIB} ${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} LFDS7 ${ATLAS_LIBRARIES}
@@ -3265,7 +3440,7 @@ if (${T_TRACER})
foreach(i
#all "add_executable" definitions (except tests, rb_tool, updatefw)
lte-softmodem lte-uesoftmodem nr-softmodem
nr-uesoftmodem dlsim dlsim_tm4 dlsim_tm7
nr-uesoftmodem dlsim dlsim_tm4 dlsim_tm7 nr-ittisim
ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim
syncsim nr_ulsim nr_dlsim nr_dlschsim nr_pbchsim nr_pucchsim
nr_ulschsim ldpctest polartest smallblocktest cu_test du_test
@@ -3352,6 +3527,53 @@ add_executable(rb_tool
)
target_include_directories(rb_tool PRIVATE ${OPENAIR2_DIR}/NETWORK_DRIVER/MESH/)
# nr-ittisim
###################################################
add_executable(nr-ittisim
${rrc_h}
${nr_rrc_h}
${OPENAIR2_DIR}/GNB_APP/gnb_app.c
${OPENAIR2_DIR}/GNB_APP/gnb_config.c
${OPENAIR_DIR}/executables/nr-gnb.c
${OPENAIR_DIR}/executables/nr-ru.c
${OPENAIR2_DIR}/SIMULATION/NR_RRC/itti_sim.c
${OPENAIR_DIR}/executables/softmodem-common.c
${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
${OPENAIR_TARGETS}/ARCH/COMMON/record_player.c
${OPENAIR2_DIR}/RRC/NAS/nas_config.c
${OPENAIR2_DIR}/RRC/NAS/rb_config.c
${OPENAIR3_DIR}/GTPV1-U/gtpv1u_gNB.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
${OPENAIR3_DIR}/NAS/UE/nas_ue_task.c
${OPENAIR_DIR}/common/utils/utils.c
${OPENAIR_DIR}/common/utils/system.c
${OPENAIR_DIR}/common/utils/nr/nr_common.c
${OPENAIR_DIR}/common/utils/threadPool/thread-pool.c
${GTPU_need_ITTI}
${XFORMSINTERFACE_SOURCE}
${T_SOURCE}
${CONFIG_SOURCES}
${SHLIB_LOADER_SOURCES}
)
target_link_libraries (nr-ittisim
-Wl,--start-group
UTIL HASHTABLE SCTP_CLIENT UDP SCHED_LIB SCHED_RU_LIB SCHED_NR_LIB PHY_NR PHY PHY_COMMON PHY_NR_COMMON PHY_RU LFDS NR_GTPV1U SECU_CN SECU_OSA
${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} ${FLEXRAN_AGENT_LIB} LFDS7 ${MSC_LIB} ${RAL_LIB} ${NAS_SIM_LIB} RRC_LIB NR_RRC_LIB
NGAP_LIB NGAP_GNB S1AP_LIB S1AP_ENB L2_LTE_NR L2_NR MAC_NR_COMMON NFAPI_COMMON_LIB NFAPI_LIB NFAPI_VNF_LIB NFAPI_PNF_LIB NFAPI_USER_LIB
X2AP_LIB X2AP_ENB F1AP_LIB F1AP M2AP_LIB M2AP_ENB M3AP_LIB M3AP_ENB ${PROTO_AGENT_LIB} ${FSPT_MSG_LIB}
PHY_NR_UE SCHED_NR_UE_LIB NR_L2_UE
-Wl,--end-group z dl)
target_link_libraries (nr-ittisim ${LIBXML2_LIBRARIES})
target_link_libraries (nr-ittisim pthread m ${CONFIG_LIB} rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} ${NETTLE_LIBRARIES} sctp ${XFORMS_LIBRARIES} ${PROTOBUF_LIB} ${CMAKE_DL_LIBS} ${LIBYAML_LIBRARIES} ${ATLAS_LIBRARIES})
target_link_libraries (nr-ittisim ${LIB_LMS_LIBRARIES})
target_link_libraries (nr-ittisim ${T_LIB})
add_dependencies( nr-ittisim ldpc_orig ldpc_optim ldpc_optim8seg ldpc )
# ???
####################
list(APPEND oai_nw_drv_src device.c common.c ioctl.c classifier.c tool.c)
+19 -9
View File
@@ -1095,7 +1095,10 @@
(Test10: 106 PRBs 50 PDSCH-PRBs MCS Index 16),
(Test11: HARQ test 25% TP (4 rounds),
(Test12: HARQ test 33% TP (3 rounds),
(Test13: HARQ test 50% TP (2 rounds)</desc>
(Test13: HARQ test 50% TP (2 rounds),
(Test14: 3 PTRS, 8 Interpolated Symbols),
(Test15: 6 PTRS, 5 Interpolated Symbols),
(Test16: 11 PTRS, 0 Interpolated Symbols)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
@@ -1114,8 +1117,11 @@
-n100 -e16 -s10
-n100 -s1 -t25
-n100 -s1 -t33
-n100 -s1 -t50</main_exec_args>
<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11 nr_dlsim.test12 nr_dlsim.test13</tags>
-n100 -s1 -t50
-n100 -s5 -T 2 2 2
-n100 -s5 -T 2 1 2
-n100 -s5 -T 2 0 4</main_exec_args>
<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11 nr_dlsim.test12 nr_dlsim.test13 nr_dlsim.test14 nr_dlsim.test15 nr_dlsim.test16</tags>
<search_expr_true>PDSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
@@ -1302,10 +1308,12 @@
<testCase id="015112">
<class>execution</class>
<desc>nr_prachsim Test cases. (Test1: 106 PRBs - Prach format A2),
(Test2: 217 PRBs - Prach format A2),
(Test3: 273 PRBs - Prach format A2),
(Test4: 106 PRBs - Prach format 0)</desc>
<desc>nr_prachsim Test cases. (Test1: 30kHz SCS, 106 PRBs, Prach format A2),
(Test2: 30kHz SCS, 217 PRBs, Prach format A2),
(Test3: 30kHz SCS, 273 PRBs, Prach format A2),
(Test4: 30kHz SCS, 106 PRBs, Prach format 0),
(Test5: 120kHz SCS, 32 PRBs, Prach format A2),
(Test6: 120kHz SCS, 66 PRBs, Prach format A2)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
@@ -1315,8 +1323,10 @@
<main_exec_args>-a -s -30 -n 100 -p 63 -R 106
-a -s -30 -n 100 -p 63 -R 217
-a -s -30 -n 100 -p 63 -R 273
-a -s -30 -n 100 -p 63 -R 106 -c 4</main_exec_args>
<tags>nr_prachsim.test1 nr_prachsim.test2 nr_prachsim.test3 nr_prachsim.test4</tags>
-a -s -30 -n 100 -p 63 -R 106 -c 4
-a -s -30 -n 100 -p 32 -R 32 -m 3 -c52
-a -s -30 -n 100 -p 32 -R 66 -m 3 -c52</main_exec_args>
<tags>nr_prachsim.test1 nr_prachsim.test2 nr_prachsim.test3 nr_prachsim.test4 nr_prachsim.test5 nr_prachsim.test6</tags>
<search_expr_true>PRACH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
+14 -1
View File
@@ -66,6 +66,7 @@ UE_TIMING_TRACE="False"
USRP_REC_PLAY="False"
BUILD_ECLIPSE=0
NR="False"
ITTI_SIM="False"
OPTIONAL_LIBRARIES="telnetsrv enbscope uescope nrscope msc"
trap handle_ctrl_c INT
@@ -159,6 +160,8 @@ Options
Build for I/Q record-playback modes
-k | --skip-shared-libraries
Skip build for shared libraries to reduce compilation time when building frequently for debugging purposes
--ittiSIM
Makes the itti simulator
-h | --help
Print this help
@@ -413,6 +416,11 @@ function main() {
CMAKE_CMD="$CMAKE_CMD -GNinja"
MAKE_CMD=ninja
shift;;
--ittiSIM)
ittiSIM=1
ITTI_SIM="True"
echo_info "Will compile itti simulator"
shift;;
-h | --help)
print_help
exit 1;;
@@ -571,7 +579,7 @@ function main() {
config_libconfig_shlib=params_libconfig
# first generate the CMakefile in the right directory
if [ "$eNB" = "1" -o "$eNBocp" = "1" -o "$UE" = "1" -o "$gNB" = "1" -o "$nrUE" = "1" -o "$HW" = "EXMIMO" ] ; then
if [ "$eNB" = "1" -o "$eNBocp" = "1" -o "$UE" = "1" -o "$gNB" = "1" -o "$nrUE" = "1" -o "$HW" = "EXMIMO" -o "$ittiSIM" = "1" ] ; then
# softmodem compilation
@@ -595,6 +603,7 @@ function main() {
echo "set ( UE_TIMING_TRACE $UE_TIMING_TRACE )" >> $cmake_file
echo "set ( USRP_REC_PLAY $USRP_REC_PLAY )" >> $cmake_file
echo "set ( SKIP_SHARED_LIB_FLAG $SKIP_SHARED_LIB_FLAG )" >> $cmake_file
echo "set ( ITTI_SIM $ITTI_SIM )" >> $cmake_file
echo 'include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt)' >> $cmake_file
cd $DIR/$build_dir/build
eval $CMAKE_CMD
@@ -616,6 +625,10 @@ function main() {
execlist="$execlist nr-uesoftmodem"
fi
if [ "$ittiSIM" = "1" ] ; then
execlist="$execlist nr-ittisim"
fi
for f in $execlist ; do
echo_info "Compiling $f..."
compilations \
@@ -16,4 +16,5 @@ set ( UE_DEBUG_TRACE False )
set ( UE_TIMING_TRACE False )
set ( USRP_REC_PLAY False )
set ( SKIP_SHARED_LIB_FLAG False )
set ( PHYSIM True)
include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt)
@@ -19,6 +19,10 @@ if [ "$done_flag" -ot $ASN1_SOURCE_DIR ] ; then
sed -i 's/18446744073709551615))/18446744073709551615U))/g' "$GENERATED_FULL_DIR"/${ASN1C_PREFIX}E-RABUsageReportItem.c
sed -i 's/18446744073709551615 }/18446744073709551615U }/g' "$GENERATED_FULL_DIR"/${ASN1C_PREFIX}E-RABUsageReportItem.c
fi
if [ "$ASN1C_PREFIX" = "NGAP_" ] ; then
sed -i 's/18446744073709551615))/18446744073709551615U))/g' "$GENERATED_FULL_DIR"/${ASN1C_PREFIX}VolumeTimedReport-Item.c
sed -i 's/18446744073709551615 }/18446744073709551615U }/g' "$GENERATED_FULL_DIR"/${ASN1C_PREFIX}VolumeTimedReport-Item.c
fi
fi
touch $done_flag
+1
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@@ -445,6 +445,7 @@ int logInit (void)
register_log_component("NR_RRC","log",NR_RRC);
register_log_component("NR_MAC","log",NR_MAC);
register_log_component("NR_PHY","log",NR_PHY);
register_log_component("NGAP","",NGAP);
for (int i=0 ; log_level_names[i].name != NULL ; i++)
g_log->level2string[i] = toupper(log_level_names[i].name[0]); // uppercased first letter of level name
+1
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@@ -226,6 +226,7 @@ typedef enum {
X2AP,
M2AP,
M3AP,
NGAP,
GNB_APP,
NR_RRC,
NR_MAC,
+21
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@@ -400,6 +400,27 @@ ID = LEGACY_S1AP_TRACE
GROUP = ALL:LEGACY_S1AP:LEGACY_GROUP_TRACE:LEGACY
FORMAT = string,log
ID = LEGACY_NGAP_INFO
DESC = NGAP legacy logs - info level
GROUP = ALL:LEGACY_NGAP:LEGACY_GROUP_INFO:LEGACY
FORMAT = string,log
ID = LEGACY_NGAP_ERROR
DESC = NGAP legacy logs - error level
GROUP = ALL:LEGACY_NGAP:LEGACY_GROUP_ERROR:LEGACY
FORMAT = string,log
ID = LEGACY_NGAP_WARNING
DESC = NGAP legacy logs - warning level
GROUP = ALL:LEGACY_NGAP:LEGACY_GROUP_WARNING:LEGACY
FORMAT = string,log
ID = LEGACY_NGAP_DEBUG
DESC = NGAP legacy logs - debug level
GROUP = ALL:LEGACY_NGAP:LEGACY_GROUP_DEBUG:LEGACY
FORMAT = string,log
ID = LEGACY_NGAP_TRACE
DESC = NGAP legacy logs - trace level
GROUP = ALL:LEGACY_NGAP:LEGACY_GROUP_TRACE:LEGACY
FORMAT = string,log
ID = LEGACY_X2AP_INFO
DESC = X2AP legacy logs - info level
GROUP = ALL:LEGACY_X2AP:LEGACY_GROUP_INFO:LEGACY
+3
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@@ -49,11 +49,14 @@ typedef enum {
MSC_RLC_ENB,
MSC_PDCP_ENB,
MSC_RRC_ENB,
MSC_RRC_GNB,
MSC_IP_ENB,
MSC_S1AP_ENB,
MSC_NGAP_GNB,
MSC_GTPU_ENB,
MSC_GTPU_SGW,
MSC_S1AP_MME,
MSC_NGAP_AMF,
MSC_MMEAPP_MME,
MSC_NAS_MME,
MSC_NAS_EMM_MME,
+5
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@@ -16,3 +16,8 @@
#include "openair2/COMMON/gtpv1_u_messages_def.h"
#include "openair2/COMMON/flexran_messages_def.h"
#include "openair2/COMMON/f1ap_messages_def.h"
#include "openair2/COMMON/ngap_messages_def.h"
#if ITTI_SIM
#include "openair2/COMMON/itti_sim_messages_def.h"
#endif
@@ -194,7 +194,8 @@ task_list_t tasks[TASK_MAX];
t->next_timer=UINT64_MAX;
// Proceed expired timer
for ( auto it=t->timer_map.begin() ; it != t->timer_map.end() ; ++it ) {
for ( auto it=t->timer_map.begin() , next_it = it; it != t->timer_map.end() ; it = next_it ) {
++next_it;
if ( it->second.timeout < current_time ) {
MessageDef *message = itti_alloc_new_message(TASK_TIMER, TIMER_HAS_EXPIRED);
message->ittiMsg.timer_has_expired.timer_id=it->first;
@@ -230,6 +230,7 @@ typedef struct IttiMsgText_s {
#include <openair2/COMMON/sctp_messages_types.h>
#include <openair2/COMMON/udp_messages_types.h>
#include <openair2/COMMON/gtpv1_u_messages_types.h>
#include <openair2/COMMON/ngap_messages_types.h>
#include <openair3/SCTP/sctp_eNB_task.h>
#include <openair3/NAS/UE/nas_proc_defs.h>
#include <openair3/NAS/UE/ESM/esmData.h>
@@ -260,6 +261,11 @@ typedef struct IttiMsgText_s {
void *rrc_enb_process_itti_msg(void *);
#include <openair3/SCTP/sctp_eNB_task.h>
#include <openair3/S1AP/s1ap_eNB.h>
#include <openair3/NGAP/ngap_gNB.h>
#ifdef ITTI_SIM
#include <openair2/COMMON/itti_sim_messages_types.h>
#endif
/*
static const char *const messages_definition_xml = {
@@ -312,6 +318,7 @@ void * rrc_enb_process_msg(void*);
TASK_DEF(TASK_RRC_GNB, TASK_PRIORITY_MED, 200, NULL,NULL)\
TASK_DEF(TASK_RAL_ENB, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_S1AP, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_NGAP, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_X2AP, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_M2AP_ENB, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_M2AP_MCE, TASK_PRIORITY_MED, 200, NULL, NULL) \
@@ -329,6 +336,7 @@ void * rrc_enb_process_msg(void*);
TASK_DEF(TASK_RLC_UE, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_PDCP_UE, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_RRC_UE, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_RRC_NRUE, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_NAS_UE, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_RAL_UE, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_MSC, TASK_PRIORITY_MED, 200, NULL, NULL)\
@@ -336,6 +344,8 @@ void * rrc_enb_process_msg(void*);
TASK_DEF(TASK_UDP, TASK_PRIORITY_MED, 1000, NULL, NULL)\
TASK_DEF(TASK_CU_F1, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_DU_F1, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_RRC_UE_SIM, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_RRC_GNB_SIM, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_MAX, TASK_PRIORITY_MED, 200, NULL, NULL)
#define TASK_DEF(TaskID, pRIO, qUEUEsIZE, FuNc, ThreadFunc) { pRIO, qUEUEsIZE, #TaskID, FuNc, ThreadFunc },
+52 -8
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@@ -164,8 +164,6 @@ nr_schedule_ue_spec() is called
Calls nr_fill_nfapi_dl_pdu() to actually populate what should be done by the lower layers to make the Tx subframe
# RRC
RRC is a regular thread with itti loop on queue: TASK_RRC_GNB
it receives it's configuration in message NRRRC_CONFIGURATION_REQ, then real time mesages for all events: S1/NGAP events, X2AP messages and RRC_SUBFRAME_PROCESS
@@ -176,14 +174,56 @@ how does it communicate to scheduler ?
# RLC
RLC code is new implementation, not using OAI mechanisms: it is implmented directly on pthreads, ignoring OAI common functions.
It runs a thread waiting incoming data, but it is mainly running inside calling thread.
It is a library, running in thread RRC (except on itti message: F1AP_UL_RRC_MESSAGE for F1).
RLC code is new implementation, not using OAI mechanisms: it is implemented directly on pthreads, ignoring OAI common functions.
It is a library, running in thread RRC but also in PHY layer threads and some bits in pdcp running thread or F1 interface threads.
# NGAP
NGAP would be a itti thread as is S1AP (+twin thread SCTP that is almost void processing)?
About all messages are exchanged with RRC thread
RLC data is isolated and encapsulated.
It is stored under a global var: nr_rlc_ue_manager
The init function rlc_module_init() populates this global variable.
A small effort could lead us to return the pointer to the caller of rlc_module_init() (internal type: nr_rlc_ue_manager_internal_t)
but it returns void.
It could return the initialized pointer (as FILE* fopen() for example), then the RLC layer could have multiple instances in one process.
Even, a future evolution could remove this global rlc layer: rlc can be only a library that we create a instance for each UE because it doesn't shareany data between UEs.
For DL (respectively from UL in UE), the scheduler need to know the quantity of data waitin to be sent: it calls mac_rlc_status_ind()
That "peek" the size of the waiting data for a UE.
The scheduler then push orders to lower layers. The transport layer will actually pull data from RLC with: mac_rlc_data_req()
the low layer push data into rlc by: mac_rlc_data_ind()
Still on DL (gNB side), PDCP push incoming data into RLC by calling: rlc_data_req()
For UL, the low layer push data into rlc by: mac_rlc_data_ind()
Then, rlc push it to pdcp by calling pdcp_data_ind() from a complex rlc internal call back (deliver_sdu())
When adding a UE, external code have to call nr_rrc_rlc_config_asn1_req(), to remove it: rrc_rlc_remove_ue()
Inside UE, channels called drd or srb can be created: ??? and deleted: rrc_rlc_config_req()
nr_rlc_tick() must be called periodically to manage the internal timers
successful_delivery() and max_retx_reached(): in ??? trigger, the RLC sends a itti message to RRC: RLC_SDU_INDICATION (neutralized by #if 0 right now)
#PDCP
The PDCP implementation is also protected through a general mutex.
The design is very similar to rlc layer. The pdcp data is isolated and encapsulated.
pdcp_layer_init(): same as rlc init
we have to call a second init function: pdcp_module_init()
At Tx side (DL in gNB), pdcp_data_req() is the entry function that the upper layer calls.
The upper layer can be GTP or a PDCP internal thread enb_tun_read_thread() that read directly from Linux socket in case we skip 3GPP core implementation.
PDCP internals for pdcp_data_req() is thread safe: inside pdcp_data_req_drb(), the pdcp manager protects with the mutex the access to the SDU receiving function of PDCP (recv_sdu() callback, corresponding to nr_pdcp_entity_drb_am_recv_sdu() for DRBs). When it needs, the pdcp layer push this data to rlc by calling : rlc_data_req()
Also, incoming downlink sdu can comme from internal RRC: in this case, pdcp_run() reads a itti queue, for message RRC_DCCH_DATA_REQ, to0 only call 'pdcp_data_req()'
At Rx side, pdcp_data_ind() is the entry point that receives the data from RLC.
- Inside pdcp_data_ind(), the pdcp manager mutex protects the access to the PDU receiving function of PDCP (recv_pdu() callback corresponding to nr_pdcp_entity_drb_am_recv_pdu() for DRBs)
- Then deliver_sdu_drb() function sends the received data to GTP thread through an ITTI message (GTPV1U_ENB_TUNNEL_DATA_REQ).
pdcp_config_set_security(): not yet developped
nr_DRB_preconfiguration(): the mac layer calls this for ???
nr_rrc_pdcp_config_asn1_req() adds a UE in pdcp, pdcp_remove_UE() removes it
# GTP
Gtp + UDP are two twin threads performing the data plane interface to the core network
@@ -200,6 +240,10 @@ gtp thread calls directly pdcp_data_req(), so it runs inside it's context intern
## inside other threads
gtpv1u_create_s1u_tunnel(), delete tunnel, ... functions are called inside the other threads, without mutex.
# NGAP
NGAP would be a itti thread as is S1AP (+twin thread SCTP that is almost void processing)?
About all messages are exchanged with RRC thread
<div class="panel panel-info">
**Note**
+42 -17
View File
@@ -83,6 +83,8 @@ unsigned short config_frames[4] = {2,9,11,13};
#include "executables/thread-common.h"
#include "NB_IoT_interface.h"
#include "x2ap_eNB.h"
#include "ngap_gNB.h"
#include "gnb_paramdef.h"
pthread_cond_t nfapi_sync_cond;
pthread_mutex_t nfapi_sync_mutex;
@@ -387,30 +389,52 @@ int create_gNB_tasks(uint32_t gnb_nb) {
return -1;
}*/
if(itti_create_task(TASK_SCTP, sctp_eNB_task, NULL) < 0){
LOG_E(SCTP, "Create task for SCTP failed\n");
return -1;
LOG_E(SCTP, "Create task for SCTP failed\n");
return -1;
}
if (is_x2ap_enabled()) {
if(itti_create_task(TASK_X2AP, x2ap_task, NULL) < 0){
LOG_E(X2AP, "Create task for X2AP failed\n");
}
if(itti_create_task(TASK_X2AP, x2ap_task, NULL) < 0){
LOG_E(X2AP, "Create task for X2AP failed\n");
}
}
else {
LOG_I(X2AP, "X2AP is disabled.\n");
LOG_I(X2AP, "X2AP is disabled.\n");
}
}
paramdef_t NETParams[] = GNBNETPARAMS_DESC;
char aprefix[MAX_OPTNAME_SIZE*2 + 8];
sprintf(aprefix,"%s.[%i].%s",GNB_CONFIG_STRING_GNB_LIST,0,GNB_CONFIG_STRING_NETWORK_INTERFACES_CONFIG);
config_get( NETParams,sizeof(NETParams)/sizeof(paramdef_t),aprefix);
if (EPC_MODE_ENABLED && (get_softmodem_params()->phy_test==0 && get_softmodem_params()->do_ra==0)) {
for(int i = GNB_INTERFACE_NAME_FOR_NG_AMF_IDX; i <= GNB_IPV4_ADDRESS_FOR_NG_AMF_IDX; i++){
if( NETParams[i].strptr == NULL){
LOG_E(NGAP, "No configuration in the file.\n");
NGAP_CONF_MODE = 0;
}
else {
LOG_D(NGAP, "Configuration in the file: %s.\n",*NETParams[i].strptr);
}
}
if (AMF_MODE_ENABLED && (get_softmodem_params()->phy_test==0 && get_softmodem_params()->do_ra==0)) {
if (gnb_nb > 0) {
/*if (itti_create_task (TASK_SCTP, sctp_eNB_task, NULL) < 0) {
/*
if (itti_create_task (TASK_SCTP, sctp_eNB_task, NULL) < 0) {
LOG_E(SCTP, "Create task for SCTP failed\n");
return -1;
}
if (itti_create_task (TASK_S1AP, s1ap_eNB_task, NULL) < 0) {
LOG_E(S1AP, "Create task for S1AP failed\n");
return -1;
}*/
*/
if(NGAP_CONF_MODE){
if (itti_create_task (TASK_NGAP, ngap_gNB_task, NULL) < 0) {
LOG_E(NGAP, "Create task for NGAP failed\n");
return -1;
}
} else {
LOG_E(NGAP, "Ngap task not created\n");
}
if(!emulate_rf){
@@ -430,9 +454,9 @@ int create_gNB_tasks(uint32_t gnb_nb) {
if (gnb_nb > 0) {
if (itti_create_task (TASK_GNB_APP, gNB_app_task, NULL) < 0) {
LOG_E(GNB_APP, "Create task for gNB APP failed\n");
return -1;
}
LOG_E(GNB_APP, "Create task for gNB APP failed\n");
return -1;
}
LOG_I(NR_RRC,"Creating NR RRC gNB Task\n");
if (itti_create_task (TASK_RRC_GNB, rrc_gnb_task, NULL) < 0) {
@@ -822,7 +846,8 @@ int main( int argc, char **argv )
}
openair0_cfg[0].threequarter_fs = threequarter_fs;
EPC_MODE_ENABLED = !IS_SOFTMODEM_NOS1; //!get_softmodem_params()->phy_test;
AMF_MODE_ENABLED = !IS_SOFTMODEM_NOS1; //!get_softmodem_params()->phy_test;
NGAP_CONF_MODE = !IS_SOFTMODEM_NOS1; //!get_softmodem_params()->phy_test;
if (get_softmodem_params()->do_ra)
AssertFatal(get_softmodem_params()->phy_test == 0,"RA and phy_test are mutually exclusive\n");
+20 -20
View File
@@ -361,7 +361,7 @@ static void UE_synch(void *arg) {
void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
fapi_nr_config_request_t *cfg = &UE->nrUE_config;
int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_tti_tx);
int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_slot_tx);
uint8_t gNB_id = 0;
if (tx_slot_type == NR_UPLINK_SLOT || tx_slot_type == NR_MIXED_SLOT){
@@ -376,16 +376,16 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
ul_indication.gNB_index = gNB_id;
ul_indication.cc_id = UE->CC_id;
ul_indication.frame_rx = proc->frame_rx;
ul_indication.slot_rx = proc->nr_tti_rx;
ul_indication.slot_rx = proc->nr_slot_rx;
ul_indication.frame_tx = proc->frame_tx;
ul_indication.slot_tx = proc->nr_tti_tx;
ul_indication.slot_tx = proc->nr_slot_tx;
ul_indication.thread_id = proc->thread_id;
UE->if_inst->ul_indication(&ul_indication);
}
if (UE->mode != loop_through_memory) {
uint8_t thread_id = PHY_vars_UE_g[UE->Mod_id][0]->current_thread_id[proc->nr_tti_rx];
phy_procedures_nrUE_TX(UE,proc,0,thread_id);
phy_procedures_nrUE_TX(UE,proc,0);
}
}
}
@@ -393,7 +393,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
fapi_nr_config_request_t *cfg = &UE->nrUE_config;
int rx_slot_type = nr_ue_slot_select(cfg, proc->frame_rx, proc->nr_tti_rx);
int rx_slot_type = nr_ue_slot_select(cfg, proc->frame_rx, proc->nr_slot_rx);
uint8_t gNB_id = 0;
if (rx_slot_type == NR_DOWNLINK_SLOT || rx_slot_type == NR_MIXED_SLOT){
@@ -406,7 +406,8 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
dl_indication.gNB_index = gNB_id;
dl_indication.cc_id = UE->CC_id;
dl_indication.frame = proc->frame_rx;
dl_indication.slot = proc->nr_tti_rx;
dl_indication.slot = proc->nr_slot_rx;
dl_indication.thread_id = proc->thread_id;
UE->if_inst->dl_indication(&dl_indication, NULL);
}
@@ -417,16 +418,16 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
#else
uint64_t a=rdtsc();
phy_procedures_nrUE_RX( UE, proc, 0, UE->mode);
LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_tti_rx, (rdtsc()-a)/3500);
LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_slot_rx, (rdtsc()-a)/3500);
//printf(">>> nr_ue_pdcch_procedures ended\n");
#endif
if(IS_SOFTMODEM_NOS1){ //&& proc->nr_tti_rx==1
if(IS_SOFTMODEM_NOS1){ //&& proc->nr_slot_rx==1
//Hardcoded rnti value
protocol_ctxt_t ctxt;
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, UE->Mod_id, ENB_FLAG_NO,
0x1234, proc->frame_rx,
proc->nr_tti_rx, 0);
proc->nr_slot_rx, 0);
pdcp_run(&ctxt);
}
}
@@ -441,7 +442,8 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx;
UE->ul_indication.slot = proc->nr_slot_rx;
UE->ul_indication.thread_id = proc->thread_id;
UE->if_inst->ul_indication(&UE->ul_indication);
}
}
@@ -476,7 +478,7 @@ void UE_processing(void *arg) {
if (UE->mac_enabled == 1) {
uint8_t gNB_id = 0;
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &UE->ul_time_alignment[gNB_id];
int slot_tx = proc->nr_tti_tx;
int slot_tx = proc->nr_slot_tx;
int frame_tx = proc->frame_tx;
if (frame_tx == ul_time_alignment->ta_frame && slot_tx == ul_time_alignment->ta_slot) {
@@ -694,14 +696,12 @@ void *UE_thread(void *arg) {
processingData_t *curMsg=(processingData_t *)NotifiedFifoData(msgToPush);
curMsg->UE=UE;
// update thread index for received subframe
curMsg->UE->current_thread_id[slot_nr] = thread_idx;
curMsg->proc.CC_id = UE->CC_id;
curMsg->proc.nr_tti_rx= slot_nr;
curMsg->proc.subframe_rx=slot_nr/(nb_slot_frame/10);
curMsg->proc.nr_tti_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.subframe_tx=curMsg->proc.nr_tti_rx;
curMsg->proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = ((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.thread_id = thread_idx;
curMsg->proc.CC_id = UE->CC_id;
curMsg->proc.nr_slot_rx = slot_nr;
curMsg->proc.nr_slot_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = ((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.decoded_frame_rx=-1;
//LOG_I(PHY,"Process slot %d thread Idx %d total gain %d\n", slot_nr, thread_idx, UE->rx_total_gain_dB);
@@ -472,6 +472,21 @@ typedef struct {
uint8_t cbgti;
uint8_t codeBlockGroupFlushIndicator;
// to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
// PTRS [TS38.214, sec 5.1.6.3]
/// PT-RS antenna ports [TS38.214, sec 5.1.6.3] [TS38.211, table 7.4.1.2.2-1] Bitmap occupying the 6 LSBs with: bit 0: antenna port 1000 bit 5: antenna port 1005 and for each bit 0: PTRS port not used 1: PTRS port used
uint8_t PTRSPortIndex ;
/// PT-RS time density [TS38.214, table 5.1.6.3-1] 0: 1 1: 2 2: 4
uint8_t PTRSTimeDensity;
/// PT-RS frequency density [TS38.214, table 5.1.6.3-2] 0: 2 1: 4
uint8_t PTRSFreqDensity;
/// PT-RS resource element offset [TS38.211, table 7.4.1.2.2-1] Value: 0->3
uint8_t PTRSReOffset;
/// PT-RS-to-PDSCH EPRE ratio [TS38.214, table 4.1-2] Value :0->3
uint8_t nEpreRatioOfPDSCHToPTRS;
/// MCS table for this DLSCH
uint8_t mcs_table;
uint16_t pduBitmap;
} fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
@@ -783,7 +798,7 @@ typedef struct {
} fapi_nr_pusch_power_control_t;
typedef enum {tx_config_codebook = 1, tx_config_nonCodebook = 2} tx_config_t;
typedef enum {transform_precoder_disabled = 0, transform_precoder_enabled = 1} transform_precoder_t;
typedef enum {transform_precoder_enabled = 0, transform_precoder_disabled = 1} transform_precoder_t;
typedef enum {
codebook_subset_fullyAndPartialAndNonCoherent = 1,
codebook_subset_partialAndNonCoherent = 2,
+2 -2
View File
@@ -327,7 +327,7 @@ int nfapi_nr_pnf_config_resp(nfapi_pnf_config_t* config, nfapi_nr_config_respons
if(phy)
{
if(resp->error_code == NFAPI_MSG_OK)
if(resp->error_code == NFAPI_NR_CONFIG_MSG_OK)
{
phy->state = NFAPI_PNF_PHY_CONFIGURED;
}
@@ -382,7 +382,7 @@ int nfapi_nr_pnf_start_resp(nfapi_pnf_config_t* config, nfapi_nr_start_response_
nfapi_pnf_phy_config_t* phy = nfapi_pnf_phy_config_find(config, resp->header.phy_id);
if(phy)
{
if(resp->error_code == NFAPI_MSG_OK)
if(resp->error_code == NFAPI_NR_START_MSG_OK)
{
phy->state = NFAPI_PNF_PHY_RUNNING;
}
+2 -33
View File
@@ -959,10 +959,6 @@ int pnf_p7_slot_ind(pnf_p7_t* pnf_p7, uint16_t phy_id, uint16_t sfn, uint16_t sl
// apply the shift to the incoming sfn_sf
if(pnf_p7->slot_shift != 0) // see in vnf_build_send_dl_node_sync
{
// int32_t sfn_slot_dec = NFAPI_SFNSLOT2DEC(sfn,slot);
uint32_t slot_dec = NFAPI_SFNSLOT2DEC(sfn,slot);
// int32_t shifted_sfn_slot = sfn_slot_dec += pnf_p7->sfn_slot_shift;
uint16_t shifted_slot = slot + pnf_p7->slot_shift;
// adjust for wrap-around
@@ -1041,10 +1037,8 @@ int pnf_p7_slot_ind(pnf_p7_t* pnf_p7, uint16_t phy_id, uint16_t sfn, uint16_t sl
{
if(pnf_p7->_public.dl_tti_req_fn)
{
struct timespec curr;
clock_gettime(CLOCK_MONOTONIC,&curr);
printf("\npnf slot ind time %d.%d\n",curr.tv_sec,curr.tv_nsec);
printf("\nIn pnf_phy_dl_tti_req VNF: sfn %d slot %d, PNF: sfn %d slot %d slot buffer sfn %d %d \n",tx_slot_buffer->dl_tti_req->SFN,tx_slot_buffer->dl_tti_req->Slot,pnf_p7->sfn,pnf_p7->slot);
//printf("\nIn pnf_phy_dl_tti_req VNF: sfn %d slot %d, PNF: sfn %d slot %d slot buffer sfn %d %d \n",tx_slot_buffer->dl_tti_req->SFN,tx_slot_buffer->dl_tti_req->Slot,pnf_p7->sfn,pnf_p7->slot);
(pnf_p7->_public.dl_tti_req_fn)(NULL, &(pnf_p7->_public), tx_slot_buffer->dl_tti_req);
}
@@ -1115,12 +1109,6 @@ int pnf_p7_slot_ind(pnf_p7_t* pnf_p7, uint16_t phy_id, uint16_t sfn, uint16_t sl
deallocate_nfapi_ul_dci_request(tx_slot_buffer->ul_dci_req, pnf_p7);
tx_slot_buffer->ul_dci_req = 0;
}
#if 0
if(tx_slot_buffer->ue_release_req != 0){
deallocate_nfapi_ue_release_request(tx_slot_buffer->ue_release_req, pnf_p7);
tx_slot_buffer->ue_release_req = 0;
}
#endif
else
{
// If we ever need to "send" a dummy ul_config this won't work!!!
@@ -1151,25 +1139,6 @@ int pnf_p7_slot_ind(pnf_p7_t* pnf_p7, uint16_t phy_id, uint16_t sfn, uint16_t sl
(pnf_p7->_public.ul_tti_req_fn)(NULL, &(pnf_p7->_public), pnf_p7->_public.dummy_slot.ul_tti_req);
}
}
#if 0
if(slot_buffer->lbt_dl_config_req != 0)
{
if(pnf_p7->_public.lbt_dl_config_req)
(pnf_p7->_public.lbt_dl_config_req)(&(pnf_p7->_public), slot_buffer->lbt_dl_config_req);
//deallocate_nfapi_lbt_dl_config_request(subframe_buffer->lbt_dl_config_req, pnf_p7);
}
else
{
// send dummy
if(pnf_p7->_public.lbt_dl_config_req && pnf_p7->_public.dummy_subframe.lbt_dl_config_req)
{
pnf_p7->_public.dummy_subframe.lbt_dl_config_req->sfn_sf = sfn;
(pnf_p7->_public.lbt_dl_config_req)(&(pnf_p7->_public), pnf_p7->_public.dummy_subframe.lbt_dl_config_req);
} //Change later
}
#endif
//if(subframe_buffer->dl_config_req != 0)
//deallocate_nfapi_dl_config_request(subframe_buffer->dl_config_req, pnf_p7);
//if(subframe_buffer->tx_req != 0)
+12 -5
View File
@@ -438,11 +438,18 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,
//gNB_config->subframe_config.dl_cyclic_prefix_type.value = (fp->Ncp == NORMAL) ? NFAPI_CP_NORMAL : NFAPI_CP_EXTENDED;
gNB->mac_enabled = 1;
fp->dl_CarrierFreq = 3500000000;//from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
fp->ul_CarrierFreq = 3500000000;//fp->dl_CarrierFreq - (get_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
fp->nr_band = 78;
// fp->threequarter_fs= 0;
if (mu==1) {
fp->dl_CarrierFreq = 3500000000;//from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
fp->ul_CarrierFreq = 3500000000;//fp->dl_CarrierFreq - (get_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
fp->nr_band = 78;
// fp->threequarter_fs= 0;
} else if (mu==3) {
fp->dl_CarrierFreq = 27524520000;//from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
fp->ul_CarrierFreq = 27524520000;//fp->dl_CarrierFreq - (get_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
fp->nr_band = 261;
// fp->threequarter_fs= 0;
}
gNB_config->carrier_config.dl_bandwidth.value = config_bandwidth(mu, N_RB_DL, fp->nr_band);
nr_init_frame_parms(gNB_config, fp);
+6
View File
@@ -393,6 +393,9 @@ void phy_init_nr_ue__PDSCH(NR_UE_PDSCH *const pdsch,
//pdsch->dl_ch_rho2_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->dl_ch_mag0 = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) );
pdsch->dl_ch_magb0 = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) );
pdsch->ptrs_phase_per_slot = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) );
pdsch->ptrs_re_per_slot = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) );
pdsch->dl_ch_ptrs_estimates_ext = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) );
// the allocated memory size is fixed:
AssertFatal( fp->nb_antennas_rx <= 2, "nb_antennas_rx > 2" );
@@ -413,6 +416,9 @@ void phy_init_nr_ue__PDSCH(NR_UE_PDSCH *const pdsch,
//pdsch->dl_ch_rho2_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_mag0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_magb0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
pdsch->ptrs_re_per_slot[idx] = (int32_t *)malloc16_clear(sizeof(int32_t) * 14);
pdsch->ptrs_phase_per_slot[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * 14 );
pdsch->dl_ch_ptrs_estimates_ext[idx]= (int32_t *)malloc16_clear( sizeof(int32_t) * num);
}
}
}
+3 -3
View File
@@ -290,9 +290,9 @@ int nr_init_frame_parms(nfapi_nr_config_request_scf_t* cfg,
fp->slots_per_frame = 10* fp->slots_per_subframe;
fp->nb_antenna_ports_gNB = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->nb_antennas_rx = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->nb_antennas_tx = 1; // default value until overwritten by RRCConnectionReconfiguration
fp->nb_antenna_ports_gNB = cfg->carrier_config.num_tx_ant.value;// It corresponds to pdsch_AntennaPorts
fp->nb_antennas_rx = cfg->carrier_config.num_rx_ant.value; // It denotes the number of rx antennas at gNB
fp->nb_antennas_tx = 1; // It corresponds to the number of UE Tx antennas
fp->symbols_per_slot = ((Ncp == NORMAL)? 14 : 12); // to redefine for different slot formats
fp->samples_per_subframe_wCP = fp->ofdm_symbol_size * fp->symbols_per_slot * fp->slots_per_subframe;
+6 -4
View File
@@ -49,12 +49,14 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue,
int reset_freq_est);
int nr_slot_fep(PHY_VARS_NR_UE *phy_vars_ue,
unsigned char l,
unsigned char Ns,
int sample_offset,
int no_prefix);
UE_nr_rxtx_proc_t *proc,
unsigned char l,
unsigned char Ns,
int sample_offset,
int no_prefix);
int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
unsigned char Ns,
int sample_offset,
+16 -14
View File
@@ -37,6 +37,7 @@
#endif*/
int nr_slot_fep(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
unsigned char Ns,
int sample_offset,
@@ -125,7 +126,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
}
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
memset(&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
rx_offset = sample_offset + slot_offset - SOFFSET;
// Align with 256 bit
@@ -157,14 +158,14 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][rx_offset % frame_length_samples],
frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
#if UE_TIMING_TRACE
start_meas(&ue->rx_dft_stats);
#endif
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
#endif
@@ -185,11 +186,11 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
}
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
@@ -206,9 +207,9 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
int symb_offset = (Ns%frame_parms->slots_per_subframe)*frame_parms->symbols_per_slot;
int32_t rot2 = ((uint32_t*)frame_parms->symbol_rotation)[symbol+symb_offset];
((int16_t*)&rot2)[1]=-((int16_t*)&rot2)[1];
rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
(int16_t*)&rot2,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
frame_parms->ofdm_symbol_size,
15);
@@ -222,6 +223,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
}
int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
unsigned char Ns,
int sample_offset,
@@ -310,7 +312,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
}
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
memset(&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
rx_offset = sample_offset + slot_offset - SOFFSET;
// Align with 256 bit
@@ -342,7 +344,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][rx_offset],
frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
#if UE_TIMING_TRACE
start_meas(&ue->rx_dft_stats);
@@ -350,7 +352,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][rx_offset],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
#endif
@@ -371,10 +373,10 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][rx_offset],
frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][rx_offset],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
}
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
@@ -393,9 +395,9 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
symbol+symb_offset,((int16_t*)&rot2)[0],((int16_t*)&rot2)[1]);
#endif
rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
(int16_t*)&rot2,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
frame_parms->ofdm_symbol_size,
15);
@@ -25,6 +25,7 @@
#include "nr_ul_estimation.h"
#include "PHY/sse_intrin.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "PHY/NR_REFSIG/dmrs_nr.h"
#include "PHY/NR_REFSIG/ptrs_nr.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/NR_UE_ESTIMATION/filt16a_32.h"
@@ -533,384 +534,107 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
* 3) Compensated DMRS based estimated signal with PTRS estimation for slot
*********************************************************************/
void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_pusch_pdu_t *rel15_ul,
uint8_t ulsch_id,
uint8_t nr_tti_rx,
uint8_t dmrs_symbol_flag,
unsigned char symbol,
uint32_t nb_re_pusch)
{
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
int16_t *phase_per_symbol;
uint8_t L_ptrs = 0;
uint8_t right_side_ref = 0;
uint8_t left_side_ref = 0;
uint8_t nb_dmrs_in_slot = 0;
//#define DEBUG_UL_PTRS 1
/* First symbol calculate PTRS symbol index for slot & set the variables */
if(symbol == rel15_ul->start_symbol_index)
{
gNB->pusch_vars[ulsch_id]->ptrs_symbols = 0;
L_ptrs = 1<<(rel15_ul->pusch_ptrs.ptrs_time_density);
set_ptrs_symb_idx(&gNB->pusch_vars[ulsch_id]->ptrs_symbols,
rel15_ul->nr_of_symbols,
rel15_ul->start_symbol_index,
L_ptrs,
rel15_ul->ul_dmrs_symb_pos);
}/* First symbol check */
int16_t *phase_per_symbol = NULL;
int32_t *ptrs_re_symbol = NULL;
int8_t ret = 0;
uint8_t symbInSlot = rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols;
uint8_t *startSymbIndex = &rel15_ul->start_symbol_index;
uint8_t *nbSymb = &rel15_ul->nr_of_symbols;
uint8_t *L_ptrs = &rel15_ul->pusch_ptrs.ptrs_time_density;
uint8_t *K_ptrs = &rel15_ul->pusch_ptrs.ptrs_freq_density;
uint16_t *dmrsSymbPos = &rel15_ul->ul_dmrs_symb_pos;
uint16_t *ptrsSymbPos = &gNB->pusch_vars[ulsch_id]->ptrs_symbols;
uint8_t *ptrsSymbIdx = &gNB->pusch_vars[ulsch_id]->ptrs_symbol_index;
uint8_t *dmrsConfigType = &rel15_ul->dmrs_config_type;
uint16_t *nb_rb = &rel15_ul->rb_size;
uint8_t *ptrsReOffset = &rel15_ul->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset;
/* loop over antennas */
for (int aarx=0; aarx< frame_parms->nb_antennas_rx; aarx++)
{
for (int aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
phase_per_symbol = (int16_t*)gNB->pusch_vars[ulsch_id]->ptrs_phase_per_slot[aarx];
/* set the previous estimations to zero at first symbol */
if(symbol == rel15_ul->start_symbol_index)
{
memset(phase_per_symbol,0,sizeof(int32_t)*frame_parms->symbols_per_slot);
ptrs_re_symbol = &gNB->pusch_vars[ulsch_id]->ptrs_re_per_slot;
*ptrs_re_symbol = 0;
phase_per_symbol[(2*symbol)+1] = 0; // Imag
/* set DMRS estimates to 0 angle with magnitude 1 */
if(is_dmrs_symbol(symbol,*dmrsSymbPos)) {
/* set DMRS real estimation to 32767 */
phase_per_symbol[2*symbol]=(int16_t)((1<<15)-1); // 32767
#ifdef DEBUG_UL_PTRS
printf("[PHY][PTRS]: DMRS Symbol %d -> %4d + j*%4d\n", symbol, phase_per_symbol[2*symbol],phase_per_symbol[(2*symbol)+1]);
#endif
}
else {// real ptrs value is set to 0
phase_per_symbol[2*symbol] = 0; // Real
}
if(symbol == *startSymbIndex) {
*ptrsSymbPos = 0;
set_ptrs_symb_idx(ptrsSymbPos,
*nbSymb,
*startSymbIndex,
1<< *L_ptrs,
*dmrsSymbPos);
}
/* if not PTRS symbol set current ptrs symbol index to zero*/
gNB->pusch_vars[ulsch_id]->ptrs_symbol_index = 0;
gNB->pusch_vars[ulsch_id]->ptrs_sc_per_ofdm_symbol = 0;
*ptrsSymbIdx = 0;
/* Check if current symbol contains PTRS */
if(is_ptrs_symbol(symbol, gNB->pusch_vars[ulsch_id]->ptrs_symbols))
{
gNB->pusch_vars[ulsch_id]->ptrs_symbol_index = symbol;
if(is_ptrs_symbol(symbol, *ptrsSymbPos)) {
*ptrsSymbIdx = symbol;
/*------------------------------------------------------------------------------------------------------- */
/* 1) Estimate phase noise per PTRS symbol */
/* 1) Estimate common phase error per PTRS symbol */
/*------------------------------------------------------------------------------------------------------- */
nr_pusch_phase_estimation(frame_parms,
rel15_ul,
(int16_t *)&gNB->pusch_vars[ulsch_id]->ul_ch_ptrs_estimates_ext[aarx][symbol*nb_re_pusch],
nr_tti_rx,
symbol,
(int16_t*)&gNB->pusch_vars[ulsch_id]->rxdataF_comp[aarx][(symbol * nb_re_pusch)],
gNB->nr_gold_pusch_dmrs[rel15_ul->scid],
&phase_per_symbol[2* symbol],
&gNB->pusch_vars[ulsch_id]->ptrs_sc_per_ofdm_symbol);
}
/* DMRS Symbol channel estimates extraction */
else if(dmrs_symbol_flag)
{
phase_per_symbol[2* symbol]= (int16_t)((1<<15)-1); // 32767
phase_per_symbol[2* symbol +1]= 0;// no angle
nr_ptrs_cpe_estimation(*K_ptrs,*ptrsReOffset,*dmrsConfigType,*nb_rb,
rel15_ul->rnti,
(int16_t *)&gNB->pusch_vars[ulsch_id]->ul_ch_ptrs_estimates_ext[aarx][symbol*nb_re_pusch],
nr_tti_rx,
symbol,frame_parms->ofdm_symbol_size,
(int16_t*)&gNB->pusch_vars[ulsch_id]->rxdataF_comp[aarx][(symbol * nb_re_pusch)],
gNB->nr_gold_pusch_dmrs[rel15_ul->scid][nr_tti_rx][symbol],
&phase_per_symbol[2* symbol],
ptrs_re_symbol);
}
/* For last OFDM symbol at each antenna perform interpolation and compensation for the slot*/
if(symbol == (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols -1))
{
nb_dmrs_in_slot = get_dmrs_symbols_in_slot(rel15_ul->ul_dmrs_symb_pos,(rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols));
for(uint8_t dmrs_sym = 0; dmrs_sym < nb_dmrs_in_slot; dmrs_sym ++)
{
if(dmrs_sym == 0)
{
/* get first DMRS position */
left_side_ref = get_next_dmrs_symbol_in_slot(rel15_ul->ul_dmrs_symb_pos, rel15_ul->start_symbol_index, (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols));
/* get first DMRS position is not at start symbol position then we need to extrapolate left side */
if(left_side_ref > rel15_ul->start_symbol_index)
{
left_side_ref = rel15_ul->start_symbol_index;
}
if(symbol == (symbInSlot -1)) {
/*------------------------------------------------------------------------------------------------------- */
/* 2) Interpolate PTRS estimated value in TD */
/*------------------------------------------------------------------------------------------------------- */
/* If L-PTRS is > 0 then we need interpolation */
if(*L_ptrs > 0) {
ret = nr_ptrs_process_slot(*dmrsSymbPos, *ptrsSymbPos, phase_per_symbol, *startSymbIndex, *nbSymb);
if(ret != 0) {
LOG_W(PHY,"[PTRS] Compensation is skipped due to error in PTRS slot processing !!\n");
}
/* get the next symbol from left_side_ref value */
right_side_ref = get_next_dmrs_symbol_in_slot(rel15_ul->ul_dmrs_symb_pos, left_side_ref+1, (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols));
/* if no symbol found then interpolate till end of slot*/
if(right_side_ref == 0)
{
right_side_ref = (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols);
}
/*------------------------------------------------------------------------------------------------------- */
/* 2) Interpolate PTRS estimated value in TD */
/*------------------------------------------------------------------------------------------------------- */
nr_pusch_phase_interpolation(phase_per_symbol,left_side_ref,right_side_ref);
/* set left to last dmrs */
left_side_ref = right_side_ref;
} /*loop over dmrs positions */
}
#ifdef DEBUG_UL_PTRS
LOG_M("ptrsEst.m","est",gNB->pusch_vars[ulsch_id]->ptrs_phase_per_slot[aarx],frame_parms->symbols_per_slot,1,1 );
LOG_M("rxdataF_bf_ptrs_comp.m","bf_ptrs_cmp",
LOG_M("ptrsEstUl.m","est",gNB->pusch_vars[ulsch_id]->ptrs_phase_per_slot[aarx],frame_parms->symbols_per_slot,1,1 );
LOG_M("rxdataF_bf_ptrs_comp_ul.m","bf_ptrs_cmp",
&gNB->pusch_vars[0]->rxdataF_comp[aarx][rel15_ul->start_symbol_index * NR_NB_SC_PER_RB * rel15_ul->rb_size],
rel15_ul->nr_of_symbols * NR_NB_SC_PER_RB * rel15_ul->rb_size,1,1);
#endif
/*------------------------------------------------------------------------------------------------------- */
/* 3) Compensated DMRS based estimated signal with PTRS estimation */
/*--------------------------------------------------------------------------------------------------------*/
for(uint8_t i =rel15_ul->start_symbol_index; i< (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols);i++)
{
for(uint8_t i = *startSymbIndex; i< symbInSlot ;i++) {
/* DMRS Symbol has 0 phase so no need to rotate the respective symbol */
/* Skip rotation if the slot processing is wrong */
if((!is_dmrs_symbol(i,*dmrsSymbPos)) && (ret == 0)) {
#ifdef DEBUG_UL_PTRS
printf("PTRS: Rotate Symbol %2d with %d + j* %d\n", i, phase_per_symbol[2* i],phase_per_symbol[(2* i) +1]);
printf("[PHY][UL][PTRS]: Rotate Symbol %2d with %d + j* %d\n", i, phase_per_symbol[2* i],phase_per_symbol[(2* i) +1]);
#endif
rotate_cpx_vector((int16_t*)&gNB->pusch_vars[ulsch_id]->rxdataF_comp[aarx][(i * rel15_ul->rb_size * NR_NB_SC_PER_RB)],
&phase_per_symbol[2* i],
(int16_t*)&gNB->pusch_vars[ulsch_id]->rxdataF_comp[aarx][(i * rel15_ul->rb_size * NR_NB_SC_PER_RB)],
(rel15_ul->rb_size * NR_NB_SC_PER_RB),
15);
rotate_cpx_vector((int16_t*)&gNB->pusch_vars[ulsch_id]->rxdataF_comp[aarx][(i * rel15_ul->rb_size * NR_NB_SC_PER_RB)],
&phase_per_symbol[2* i],
(int16_t*)&gNB->pusch_vars[ulsch_id]->rxdataF_comp[aarx][(i * rel15_ul->rb_size * NR_NB_SC_PER_RB)],
((*nb_rb) * NR_NB_SC_PER_RB), 15);
}// if not DMRS Symbol
}// symbol loop
}//interpolation and compensation
}// Antenna loop
}
/*******************************************************************
*
* NAME : nr_pusch_phase_estimation
*
* PARAMETERS : frame_parms : UL frame parameters
* rel15_ul : UL PDU Structure
* Ns :
* Symbol : OFDM symbol index
* rxF : Channel compensated signal
* ptrs_gold_seq: Gold sequence for PTRS regeneration
* error_est : Estimated error output vector [Re Im]
* RETURN : nothing
*
* DESCRIPTION :
* perform phase estimation from regenerated PTRS SC and channel compensated
* signal
*********************************************************************/
void nr_pusch_phase_estimation(NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_pusch_pdu_t *rel15_ul,
int16_t *ptrs_ch_p,
unsigned char Ns,
unsigned char symbol,
int16_t *rxF_comp,
uint32_t ***ptrs_gold_seq,
int16_t *error_est,
uint16_t *ptrs_sc)
{
uint8_t is_ptrs_re = 0;
uint16_t re_cnt = 0;
uint16_t cnt = 0;
unsigned short nb_re_pusch = NR_NB_SC_PER_RB * rel15_ul->rb_size;
uint8_t K_ptrs = rel15_ul->pusch_ptrs.ptrs_freq_density;
uint16_t sc_per_symbol = (rel15_ul->rb_size + K_ptrs - 1)/K_ptrs;
int16_t *ptrs_p = (int16_t *)malloc(sizeof(int32_t)*(sc_per_symbol));
int16_t *dmrs_comp_p = (int16_t *)malloc(sizeof(int32_t)*(sc_per_symbol));
double abs = 0.0;
double real = 0.0;
double imag = 0.0;
#ifdef DEBUG_UL_PTRS
double alpha = 0;
#endif
/* generate PTRS RE for the symbol */
nr_gen_ref_conj_symbols(ptrs_gold_seq[Ns][symbol],sc_per_symbol*2,ptrs_p, NR_MOD_TABLE_QPSK_OFFSET,2);// 2 for QPSK
/* loop over all sub carriers to get compensated RE on ptrs symbols*/
for (int re = 0; re < nb_re_pusch; re++)
{
is_ptrs_re = is_ptrs_subcarrier(re,
rel15_ul->rnti,
0,
rel15_ul->dmrs_config_type,
K_ptrs,
rel15_ul->rb_size,
rel15_ul->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset,
0,// start_re is 0 here
frame_parms->ofdm_symbol_size);
if(is_ptrs_re)
{
dmrs_comp_p[re_cnt*2] = rxF_comp[re *2];
dmrs_comp_p[(re_cnt*2)+1] = rxF_comp[(re *2)+1];
re_cnt++;
}
else
{
/* Skip PTRS symbols and keep data in a continuous vector */
rxF_comp[cnt *2]= rxF_comp[re *2];
rxF_comp[(cnt *2)+1]= rxF_comp[(re *2)+1];
cnt++;
}
}/* RE loop */
/* update the total ptrs RE in a symbol */
*ptrs_sc = re_cnt;
/*Multiple compensated data with conj of PTRS */
mult_cpx_vector(dmrs_comp_p, ptrs_p, ptrs_ch_p,(1 + sc_per_symbol/4)*4,15); // 2^15 shifted
/* loop over all ptrs sub carriers in a symbol */
/* sum the error vector */
for(int i = 0;i < sc_per_symbol; i++)
{
real+= ptrs_ch_p[(2*i)];
imag+= ptrs_ch_p[(2*i)+1];
}
#ifdef DEBUG_UL_PTRS
alpha = atan(imag/real);
printf("PTRS: Symbol %d atan(Im,real):= %f \n",symbol, alpha );
#endif
/* mean */
real /= sc_per_symbol;
imag /= sc_per_symbol;
/* absolute calculation */
abs = sqrt(((real * real) + (imag * imag)));
/* normalized error estimation */
error_est[0]= (real / abs)*(1<<15);
/* compensation in given by conjugate of estimated phase (e^-j*2*pi*fd*t)*/
error_est[1]= (-1)*(imag / abs)*(1<<15);
#ifdef DEBUG_UL_PTRS
printf("PTRS: Estimated Symbol %d -> %d + j* %d \n",symbol, error_est[0], error_est[1] );
#endif
/* free vectors */
free(ptrs_p);
free(dmrs_comp_p);
}
/*******************************************************************
*
* NAME : nr_pusch_phase_interpolation
*
* PARAMETERS : *error_est : Data Pointer [Re Im Re Im ...]
* start_symbol : Start Symbol
* end_symbol : End Symbol
* RETURN : nothing
*
* DESCRIPTION :
* Perform Interpolation, extrapolation based upon the estimation
* location between the data Pointer Array.
*
*********************************************************************/
void nr_pusch_phase_interpolation(int16_t *error_est,
uint8_t start_symbol,
uint8_t end_symbol
)
{
int next = 0, prev = 0, candidates= 0, distance=0, leftEdge= 0, rightEdge = 0, getDiff =0 ;
double weight = 0.0;
double scale = 0.125 ; // to avoid saturation due to fixed point multiplication
#ifdef DEBUG_UL_PTRS
printf("PTRS: INT: Left limit %d, Right limit %d, Loop over %d Symbols \n",
start_symbol,end_symbol-1, (end_symbol -start_symbol)-1);
#endif
for(int i =start_symbol; i< end_symbol;i++)
{
/* Only update when an estimation is found */
if( error_est[i*2] != 0 )
{
/* if found a symbol then set next symbol also */
next = nr_ptrs_find_next_estimate(error_est, i, end_symbol);
/* left extrapolation, if first estimate value is zero */
if( error_est[i*2] == 0 )
{
leftEdge = 1;
}
/* right extrapolation, if next is 0 before end symbol */
if((next == 0) && (end_symbol > i))
{
rightEdge = 1;
/* special case as no right extrapolation possible with DMRS on left */
/* In this case take mean of most recent 2 estimated points */
if(prev ==0)
{
prev = start_symbol -1;
next = start_symbol -2;
getDiff =1;
}else
{
/* for right edge previous is second last from right side */
next = prev;
/* Set the current as recent estimation reference */
prev = i;
}
}
/* update current symbol as prev for next symbol */
if (rightEdge==0)
/* Set the current as recent estimation reference */
prev = i;
}
/*extrapolation left side*/
if(leftEdge)
{
distance = next - prev;
weight = 1.0/distance;
candidates = i;
for(int j = 1; j <= candidates; j++)
{
error_est[(i-j)*2] = 8 *(((double)(error_est[prev*2]) * scale * (distance + j) * weight) -
((double)(error_est[next*2]) * scale * j * weight));
error_est[((i-j)*2)+1]= 8 *(((double)(error_est[(prev*2)+1]) * scale* (distance + j) * weight) -
((double)(error_est[((next*2)+1)]) * scale * j * weight));
#ifdef DEBUG_UL_PTRS
printf("PTRS: INT: Left Edge i= %d weight= %f %d + j*%d, Prev %d Next %d \n",
(i-j),weight, error_est[(i-j)*2],error_est[((i-j)*2)+1], prev,next);
#endif
}
leftEdge = 0;
}
/* extrapolation at right side */
else if (rightEdge )
{
if(getDiff)
{
error_est[(i+1)*2] = ((1<<15) +(error_est[prev*2]) - error_est[next*2]);
error_est[((i+1)*2)+1]= error_est[(prev*2)+1] - error_est[(next*2)+1];
#ifdef DEBUG_UL_PTRS
printf("PTRS: INT: Right Edge Special Case i= %d weight= %f %d + j*%d, Prev %d Next %d \n",
(i+1),weight, error_est[(i+1)*2],error_est[((i+1)*2)+1], prev,next);
#endif
i++;
}
else
{
distance = prev - next;
candidates = (end_symbol -1) - i;
weight = 1.0/distance;
for(int j = 1; j <= candidates; j++)
{
error_est[(i+j)*2] = 8 *(((double)(error_est[prev*2]) * scale * (distance + j) * weight) -
((double)(error_est[next*2]) * scale * j * weight));
error_est[((i+j)*2)+1]= 8 *(((double)(error_est[(prev*2)+1]) * scale * (distance + j) * weight) -
((double)(error_est[((next*2)+1)]) * scale *j * weight));
#ifdef DEBUG_UL_PTRS
printf("PTRS: INT: Right Edge i= %d weight= %f %d + j*%d, Prev %d Next %d \n",
(i+j),weight, error_est[(i+j)*2],error_est[((i+j)*2)+1], prev,next);
#endif
}
if(candidates > 1)
{
i+=candidates;
}
}
}
/* Interpolation between 2 estimated points */
else if(next != 0 && ( error_est[2*i] == 0 ))
{
distance = next - prev;
weight = 1.0/distance;
candidates = next - i ;
for(int j = 0; j < candidates; j++)
{
error_est[(i+j)*2] = 8 *(((double)(error_est[prev*2]) * scale * (distance - (j+1)) * weight) +
((double)(error_est[next*2]) * scale * (j+1) * weight));
error_est[((i+j)*2)+1]= 8 *(((double)(error_est[(prev*2)+1]) * scale *(distance - (j+1)) * weight) +
((double)(error_est[((next*2)+1)]) * scale *(j+1) * weight));
#ifdef DEBUG_UL_PTRS
printf("PTRS: INT: Interpolation i= %d weight= %f %d + j*%d, Prev %d Next %d\n",
(i+j),weight, error_est[(i+j)*2],error_est[((i+j)*2)+1],prev,next);
#endif
}
if(candidates > 1)
{
i+=candidates-1;
}
}// interpolation
}// symbol loop
}
/* Find the next non zero Real value in a complex vector */
int nr_ptrs_find_next_estimate(int16_t *error_est,
uint8_t counter,
uint8_t end_symbol)
{
for (int i = counter +1 ; i< end_symbol; i++)
{
if( error_est[2*i] != 0)
{
return i;
}
}
return 0;
}// last symbol check
}//Antenna loop
}
+1 -19
View File
@@ -53,28 +53,10 @@ int nr_est_timing_advance_pusch(PHY_VARS_gNB* phy_vars_gNB, int UE_id);
void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_pusch_pdu_t *rel15_ul,
uint8_t ulsch_id,
uint8_t nr_tti_rx,
uint8_t dmrs_symbol_flag,
unsigned char symbol,
uint32_t nb_re_pusch);
void nr_pusch_phase_estimation(NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_pusch_pdu_t *rel15_ul,
int16_t *ptrs_ch_p,
unsigned char Ns,
unsigned char symbol,
int16_t *rxF_comp,
uint32_t ***ptrs_gold_seq,
int16_t *error_est,
uint16_t *ptrs_sc);
void nr_pusch_phase_interpolation(int16_t *error_est,
uint8_t start_symbol,
uint8_t end_symbol);
int nr_ptrs_find_next_estimate(int16_t *error_est,
uint8_t counter,
uint8_t end_symbol);
#endif
+31 -9
View File
@@ -37,6 +37,7 @@
uint8_t allowed_xlsch_re_in_dmrs_symbol(uint16_t k,
uint16_t start_sc,
uint16_t ofdm_symbol_size,
uint8_t numDmrsCdmGrpsNoData,
uint8_t dmrs_type) {
uint8_t delta;
@@ -44,7 +45,7 @@ uint8_t allowed_xlsch_re_in_dmrs_symbol(uint16_t k,
if (k>start_sc)
diff = k-start_sc;
else
diff = start_sc-k;
diff = (ofdm_symbol_size-start_sc)+k;
for (int i = 0; i<numDmrsCdmGrpsNoData; i++){
if (dmrs_type==NFAPI_NR_DMRS_TYPE1) {
delta = i;
@@ -53,7 +54,7 @@ uint8_t allowed_xlsch_re_in_dmrs_symbol(uint16_t k,
}
else {
delta = i<<1;
if ( (((diff)%6) == delta) || (((k-start_sc)%6) == (delta+1)) )
if (((diff%6) == delta) || ((diff%6) == (delta+1)))
return (0);
}
}
@@ -363,14 +364,14 @@ void generate_dmrs_pbch(uint32_t dmrs_pbch_bitmap[DMRS_PBCH_I_SSB][DMRS_PBCH_N_H
#endif
}
/* return the position of next dmrs symbol in a slot */
int get_next_dmrs_symbol_in_slot(uint16_t ul_dmrs_symb_pos, uint8_t counter, uint8_t end_symbol)
int8_t get_next_dmrs_symbol_in_slot(uint16_t ul_dmrs_symb_pos, uint8_t counter, uint8_t end_symbol)
{
for(uint8_t symbol = counter; symbol < end_symbol; symbol++)
if((ul_dmrs_symb_pos >>symbol)&0x01 )
{
for(uint8_t symbol = counter; symbol < end_symbol; symbol++) {
if((ul_dmrs_symb_pos >> symbol) & 0x01 ) {
return symbol;
}
return 0;
}
return -1;
}
@@ -378,9 +379,30 @@ int get_next_dmrs_symbol_in_slot(uint16_t ul_dmrs_symb_pos, uint8_t counter, ui
uint8_t get_dmrs_symbols_in_slot(uint16_t l_prime_mask, uint16_t nb_symb)
{
uint8_t tmp = 0;
for (int i = 0; i < nb_symb; i++)
{
for (int i = 0; i < nb_symb; i++) {
tmp += (l_prime_mask >> i) & 0x01;
}
return tmp;
}
/* return the position of valid dmrs symbol in a slot for channel compensation */
int8_t get_valid_dmrs_idx_for_channel_est(uint16_t dmrs_symb_pos, uint8_t counter)
{
int8_t symbIdx = -1;
/* if current symbol is DMRS then return this index */
if(is_dmrs_symbol(counter, dmrs_symb_pos ) ==1) {
return counter;
}
/* find previous DMRS symbol */
for(int8_t symbol = counter;symbol >=0 ; symbol--) {
if((1<<symbol & dmrs_symb_pos)> 0) {
symbIdx = symbol;
break;
}
}
/* if there is no previous dmrs available then find the next possible*/
if(symbIdx == -1) {
symbIdx = get_next_dmrs_symbol_in_slot(dmrs_symb_pos,counter,15);
}
return symbIdx;
}
+7
View File
@@ -58,9 +58,16 @@ uint16_t get_dmrs_freq_idx_ul(uint16_t n, uint8_t k_prime, uint8_t delta, uint8_
uint8_t allowed_xlsch_re_in_dmrs_symbol(uint16_t k,
uint16_t start_sc,
uint16_t ofdm_symbol_size,
uint8_t numDmrsCdmGrpsNoData,
uint8_t dmrs_type);
void nr_gen_ref_conj_symbols(uint32_t *in, uint32_t length, int16_t *output, uint16_t offset, int mod_order);
int8_t get_next_dmrs_symbol_in_slot(uint16_t ul_dmrs_symb_pos, uint8_t counter, uint8_t end_symbol);
uint8_t get_dmrs_symbols_in_slot(uint16_t l_prime_mask, uint16_t nb_symb);
int8_t get_valid_dmrs_idx_for_channel_est(uint16_t dmrs_symb_pos, uint8_t counter);
static inline uint8_t is_dmrs_symbol(uint8_t l, uint16_t dmrsSymbMask ) { return ((dmrsSymbMask >> l) & 0x1); }
#undef EXTERN
#endif /* DMRS_NR_H */
+5 -5
View File
@@ -121,18 +121,18 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
array_of_w *wf;
array_of_w *wt;
config_type = 0; //to be updated by higher layer
config_type = ue->dmrs_DownlinkConfig.pdsch_dmrs_type;
wf = (config_type==0) ? wf1 : wf2;
wt = (config_type==0) ? wt1 : wt2;
wf = (config_type==pdsch_dmrs_type1) ? wf1 : wf2;
wt = (config_type==pdsch_dmrs_type1) ? wt1 : wt2;
if (config_type > 1)
LOG_E(PHY,"Bad PDSCH DMRS config type %d\n", config_type);
if ((p>=1000) && (p<((config_type==0) ? 1008 : 1012))) {
if ((p>=1000) && (p<((config_type==pdsch_dmrs_type1) ? 1008 : 1012))) {
if (ue->frame_parms.Ncp == NORMAL) {
for (int i=0; i<nb_pdsch_rb*((config_type==0) ? 6:4); i++) {
for (int i=0; i<nb_pdsch_rb*((config_type==pdsch_dmrs_type1) ? 6:4); i++) {
w = (wf[p-1000][i&1])*(wt[p-1000][lp]);
mod_table = (w==1) ? nr_rx_mod_table : nr_rx_nmod_table;
+8 -10
View File
@@ -107,9 +107,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
}
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
unsigned short lbar,
unsigned short *n_idDMRS,
unsigned short length_dmrs)
unsigned short *n_idDMRS)
{
unsigned char ns,l;
unsigned int n,x1,x2,x2tmp0;
@@ -129,12 +127,12 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
for (ns=0; ns<20; ns++) {
for (l=0; l<length_dmrs; l++) {
for (l=0; l<14; l++) {
x2tmp0 = ((14*ns+(lbar+l)+1)*((nid<<1)+1))<<17;
x2tmp0 = ((14*ns+l+1)*((nid<<1)+1))<<17;
x2 = (x2tmp0+(nid<<1)+nscid)%(1<<31); //cinit
LOG_D(PHY,"UE DMRS slot %d, symb %d, lbar %d, x2 %x, nscid %d\n",ns,l,lbar,x2,nscid);
//printf("ns %d gold pdsch x2 %d\n",ns,x2);
LOG_D(PHY,"UE DMRS slot %d, symb %d, x2 %x, nscid %d\n",ns,l,x2,nscid);
//printf("ns %d gold pdsch x2 %d\n",ns,x2);
x1 = 1+ (1<<31);
x2=x2 ^ ((x2 ^ (x2>>1) ^ (x2>>2) ^ (x2>>3))<<31);
@@ -145,7 +143,7 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
x2 = x2 ^ (x2<<31) ^ (x2<<30) ^ (x2<<29) ^ (x2<<28);
//printf("x1 : %x, x2 : %x\n",x1,x2);
//printf("x1 : %x, x2 : %x\n",x1,x2);
}
for (n=0; n<NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD; n++) {
@@ -154,8 +152,8 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
x2 = x2 ^ (x2<<31) ^ (x2<<30) ^ (x2<<29) ^ (x2<<28);
ue->nr_gold_pdsch[nscid][ns][l][n] = x1^x2;
// if ((ns==2)&&(l==0))
//printf("n=%d : c %x\n",n,x1^x2);
// if ((ns==2)&&(l==0))
//printf("n=%d : c %x\n",n,x1^x2);
}
}
-4
View File
@@ -53,10 +53,6 @@ int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
uint8_t dmrs_type);
void init_scrambling_luts(void);
void nr_gen_ref_conj_symbols(uint32_t *in, uint32_t length, int16_t *output, uint16_t offset, int mod_order);
uint8_t get_next_dmrs_symbol_in_slot(uint16_t ul_dmrs_symb_pos, uint8_t counter, uint8_t end_symbol);
uint8_t get_dmrs_symbols_in_slot(uint16_t l_prime_mask, uint16_t nb_symb);
void nr_generate_modulation_table(void);
void nr_generate_modulation_table(void);
+239 -83
View File
@@ -34,7 +34,7 @@
#include <stdio.h>
#include "dmrs_nr.h"
#include "PHY/NR_REFSIG/ptrs_nr.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
/***********************************************************************/
@@ -180,93 +180,249 @@ uint8_t is_ptrs_subcarrier(uint16_t k,
return 0;
}
/*
int main(int argc, char const *argv[])
/* return the total number of ptrs symbol in a slot */
uint8_t get_ptrs_symbols_in_slot(uint16_t l_prime_mask, uint16_t start_symb, uint16_t nb_symb)
{
dmrs_UplinkConfig_t dmrs_Uplink_Config;
ptrs_UplinkConfig_t ptrs_Uplink_Config;
uint8_t resourceElementOffset;
uint8_t dmrs_antenna_port;
uint8_t L_ptrs, K_ptrs;
int16_t k_RE_ref;
uint16_t N_RB, ptrs_symbols, ofdm_symbol_size, k;
uint8_t duration_in_symbols, I_mcs;
uint8_t start_symbol, l;
uint8_t ptrs_symbol_flag;
uint16_t n_rnti;
dmrs_Uplink_Config.pusch_dmrs_type = pusch_dmrs_type1;
dmrs_Uplink_Config.pusch_dmrs_AdditionalPosition = pusch_dmrs_pos1;
dmrs_Uplink_Config.pusch_maxLength = pusch_len2;
ptrs_Uplink_Config.timeDensity.ptrs_mcs1 = 0; // setting MCS values to 0 indicate abscence of time_density field in the configuration
ptrs_Uplink_Config.timeDensity.ptrs_mcs2 = 0;
ptrs_Uplink_Config.timeDensity.ptrs_mcs3 = 0;
ptrs_Uplink_Config.frequencyDensity.n_rb0 = 0; // setting N_RB values to 0 indicate abscence of frequency_density field in the configuration
ptrs_Uplink_Config.frequencyDensity.n_rb1 = 0;
ptrs_Uplink_Config.resourceElementOffset = 0;
n_rnti = 0x1234;
resourceElementOffset = 0;
ptrs_symbols = 0;
dmrs_antenna_port = 0;
N_RB = 50;
duration_in_symbols = 14;
ofdm_symbol_size = 2048;
I_mcs = 9;
start_symbol = 0;
ptrs_symbol_flag = 0;
k_RE_ref = get_kRE_ref(dmrs_antenna_port, dmrs_Uplink_Config.pusch_dmrs_type, resourceElementOffset);
K_ptrs = get_K_ptrs(&ptrs_Uplink_Config, N_RB);
L_ptrs = get_L_ptrs(&ptrs_Uplink_Config, I_mcs);
set_ptrs_symb_idx(&ptrs_symbols,
&ptrs_Uplink_Config,
&dmrs_Uplink_Config,
1,
duration_in_symbols,
start_symbol,
L_ptrs,
ofdm_symbol_size);
printf("PTRS OFDM symbol indicies: ");
for (l = start_symbol; l < start_symbol + duration_in_symbols; l++){
ptrs_symbol_flag = is_ptrs_symbol(l,
0,
n_rnti,
N_RB,
duration_in_symbols,
dmrs_antenna_port,
K_ptrs,
ptrs_symbols,
dmrs_Uplink_Config.pusch_dmrs_type,
&ptrs_Uplink_Config);
if (ptrs_symbol_flag == 1)
printf(" %d ", l);
uint8_t tmp = 0;
for (int i = start_symb; i <= nb_symb; i++)
{
tmp += (l_prime_mask >> i) & 0x01;
}
return tmp;
}
printf("\n");
printf("PTRS subcarrier indicies: ");
for (k = 0; k < N_RB*12; k++){
if (is_ptrs_subcarrier(k, K_ptrs, n_rnti, N_RB, k_RE_ref) == 1)
printf(" %d ", k);
/* return the position of next ptrs symbol in a slot */
int8_t get_next_ptrs_symbol_in_slot(uint16_t ptrs_symb_pos, uint8_t counter, uint8_t nb_symb)
{
for(int8_t symbol = counter; symbol < nb_symb; symbol++) {
if((ptrs_symb_pos >>symbol)&0x01 ) {
return symbol;
}
}
return -1;
}
printf("\n");
/* get the next nearest estimate from DMRS or PTRS */
int8_t get_next_estimate_in_slot(uint16_t ptrsSymbPos,uint16_t dmrsSymbPos, uint8_t counter,uint8_t nb_symb)
{
int8_t nextPtrs = get_next_ptrs_symbol_in_slot(ptrsSymbPos, counter,nb_symb);
int8_t nextDmrs = get_next_dmrs_symbol_in_slot(dmrsSymbPos, counter,nb_symb);
if(nextDmrs == -1) {
return nextPtrs;
}
/* Special case when DMRS is next valid estimation */
if(nextPtrs == -1) {
return nextDmrs;
}
return (nextPtrs > nextDmrs)?nextDmrs:nextPtrs;
}
/*******************************************************************
*
* NAME : nr_ptrs_cpe_estimation
*
* PARAMETERS : K_ptrs : K value for PTRS
* ptrsReOffset : RE offset for PTRS
* dmrsConfigType: DMRS configuration type
* nb_rb : No. of resource blocks
* rnti : RNTI
* ptrs_ch_p : pointer to ptrs channel structure
* Ns :
* symbol : OFDM symbol
* ofdm_symbol_size: OFDM Symbol Size
* rxF_comp : pointer to channel compensated signal
* gold_seq : Gold sequence pointer
* error_est : Estimated error output vector [Re Im]
* ptrs_sc : Total PTRS RE in a symbol
* RETURN : nothing
*
* DESCRIPTION :
* perform phase estimation from regenerated PTRS SC and channel compensated
* signal
*********************************************************************/
void nr_ptrs_cpe_estimation(uint8_t K_ptrs,
uint8_t ptrsReOffset,
uint8_t dmrsConfigType,
uint16_t nb_rb,
uint16_t rnti,
int16_t *ptrs_ch_p,
unsigned char Ns,
unsigned char symbol,
uint16_t ofdm_symbol_size,
int16_t *rxF_comp,
uint32_t *gold_seq,
int16_t *error_est,
int32_t *ptrs_sc)
{
//#define DEBUG_PTRS 1
uint8_t is_ptrs_re = 0;
uint16_t re_cnt = 0;
uint16_t cnt = 0;
unsigned short nb_re_pdsch = NR_NB_SC_PER_RB * nb_rb;
uint16_t sc_per_symbol = (nb_rb + K_ptrs - 1)/K_ptrs;
int16_t *ptrs_p = (int16_t *)malloc(sizeof(int32_t)*(sc_per_symbol));
int16_t *dmrs_comp_p = (int16_t *)malloc(sizeof(int32_t)*(sc_per_symbol));
double abs = 0.0;
double real = 0.0;
double imag = 0.0;
#ifdef DEBUG_PTRS
double alpha = 0;
#endif
/* generate PTRS RE for the symbol */
nr_gen_ref_conj_symbols(gold_seq,sc_per_symbol*2,ptrs_p, NR_MOD_TABLE_QPSK_OFFSET,2);// 2 for QPSK
/* loop over all sub carriers to get compensated RE on ptrs symbols*/
for (int re = 0; re < nb_re_pdsch; re++) {
is_ptrs_re = is_ptrs_subcarrier(re,
rnti,
0,
dmrsConfigType,
K_ptrs,
nb_rb,
ptrsReOffset,
0,// start_re is 0 here
ofdm_symbol_size);
if(is_ptrs_re) {
dmrs_comp_p[re_cnt*2] = rxF_comp[re *2];
dmrs_comp_p[(re_cnt*2)+1] = rxF_comp[(re *2)+1];
re_cnt++;
}
else {
/* Skip PTRS symbols and keep data in a continuous vector */
rxF_comp[cnt *2]= rxF_comp[re *2];
rxF_comp[(cnt *2)+1]= rxF_comp[(re *2)+1];
cnt++;
}
}/* RE loop */
/* update the total ptrs RE in a symbol */
*ptrs_sc = re_cnt;
/*Multiple compensated data with conj of PTRS */
mult_cpx_vector(dmrs_comp_p, ptrs_p, ptrs_ch_p,(1 + sc_per_symbol/4)*4,15); // 2^15 shifted
/* loop over all ptrs sub carriers in a symbol */
/* sum the error vector */
for(int i = 0;i < sc_per_symbol; i++) {
real+= ptrs_ch_p[(2*i)];
imag+= ptrs_ch_p[(2*i)+1];
}
#ifdef DEBUG_PTRS
alpha = atan(imag/real);
printf("[PHY][PTRS]: Symbol %d atan(Im,real):= %f \n",symbol, alpha );
#endif
/* mean */
real /= sc_per_symbol;
imag /= sc_per_symbol;
/* absolute calculation */
abs = sqrt(((real * real) + (imag * imag)));
/* normalized error estimation */
error_est[0]= (real / abs)*(1<<15);
/* compensation in given by conjugate of estimated phase (e^-j*2*pi*fd*t)*/
error_est[1]= (-1)*(imag / abs)*(1<<15);
#ifdef DEBUG_PTRS
printf("[PHY][PTRS]: Estimated Symbol %d -> %d + j* %d \n",symbol, error_est[0], error_est[1] );
#endif
/* free vectors */
free(ptrs_p);
free(dmrs_comp_p);
}
/*******************************************************************
*
* NAME : nr_ptrs_process_slot
*
* PARAMETERS : dmrsSymbPos DMRS symbol index mask per slot
* ptrsSymbpos PTRS symbol index mask per slot
* estPerSymb Estimated CPE pointer
* startSymbIdx First symbol index in a slot
* noSymb total number of OFDM symbols in a slot
* RETURN : True if slot is process correctly
* DESCRIPTION :
* Process whole slot and interpolate or extrapolate estimation for the symbols
* where there is neither PTRS nor DMRS configured
*
*********************************************************************/
int8_t nr_ptrs_process_slot(uint16_t dmrsSymbPos,
uint16_t ptrsSymbPos,
int16_t *estPerSymb,
uint16_t startSymbIdx,
uint16_t noSymb)
{
double slope[2] = {0,0};
double *slope_p = &slope[0];
uint8_t symbInSlot = startSymbIdx + noSymb;
int8_t rightRef = 0;
int8_t leftRef = 0;
int8_t tmp = 0;
for(uint8_t symb = startSymbIdx; symb <symbInSlot; symb ++) {
/* Update left and right reference from an estimated symbol */
if((is_ptrs_symbol(symb, ptrsSymbPos)) || (is_dmrs_symbol(symb,dmrsSymbPos))) {
leftRef = symb;
rightRef = get_next_estimate_in_slot(ptrsSymbPos,dmrsSymbPos,symb+1,symbInSlot);
}
else {
/* The very first symbol must be a PTRS or DMRS */
if((symb == startSymbIdx) && (leftRef == -1) && (rightRef == -1)) {
printf("Wrong PTRS Setup, PTRS compensation will be skipped !");
return -1;
}
/* check for left side first */
/* right side a DMRS symbol then we need to left extrapolate */
if(is_dmrs_symbol(rightRef,dmrsSymbPos)) {
/* calculate slope from next valid estimates*/
tmp = get_next_estimate_in_slot(ptrsSymbPos,dmrsSymbPos,rightRef+1,symbInSlot);
/* Special case when DMRS is not followed by PTRS symbol then reuse old slope */
if(tmp!=-1) {
get_slope_from_estimates(rightRef, tmp, estPerSymb, slope_p);
}
ptrs_estimate_from_slope(estPerSymb,slope_p,leftRef, rightRef);
symb = rightRef -1;
}
else if(is_ptrs_symbol(rightRef,ptrsSymbPos)) {
/* calculate slope from next valid estimates */
get_slope_from_estimates(leftRef,rightRef,estPerSymb, slope_p);
ptrs_estimate_from_slope(estPerSymb,slope_p,leftRef, rightRef);
symb = rightRef -1;
}
else if((rightRef ==-1) && (symb <symbInSlot)) {
// in right extrapolation use the last slope
#ifdef DEBUG_PTRS
printf("[PHY][PTRS]: Last Slop Reused :(%4f %4f)\n", slope_p[0],slope_p[1]);
#endif
ptrs_estimate_from_slope(estPerSymb,slope_p,symb-1,symbInSlot);
symb = symbInSlot;
}
else {
printf("Wrong PTRS Setup, PTRS compensation will be skipped !");
return -1;
}
}
}
return 0;
}
*/
/* Calculate slope from 2 reference points */
void get_slope_from_estimates(uint8_t start, uint8_t end, int16_t *est_p, double *slope_p)
{
uint8_t distance = end - start;
slope_p[0] = (double)(est_p[end*2] - est_p[start*2]) /distance;
slope_p[1] = (double)(est_p[(end*2)+1] - est_p[(start*2)+1]) /distance;
#ifdef DEBUG_PTRS
printf("[PHY][PTRS]: Slop is :(%4f %4f) between Symbol %2d & Symbol %2d\n", slope_p[0],slope_p[1], start, end);
//printf("%d %d - %d %d\n",est_p[end*2],est_p[(end*2)+1],est_p[start*2],est_p[(start*2)+1]);
#endif
}
/* estimate from slope */
void ptrs_estimate_from_slope(int16_t *error_est, double *slope_p, uint8_t start, uint8_t end)
{
for(uint8_t i = 1; i< (end -start);i++) {
error_est[(start+i)*2] = (error_est[start*2] + (int16_t)(i * slope_p[0]));// real
error_est[((start +i)*2)+1] = (error_est[(start*2)+1] + (int16_t)( i * slope_p[1])); //imag
#ifdef DEBUG_PTRS
printf("[PHY][PTRS]: Estimated Symbol %2d -> %4d %4d from Slope (%4f %4f)\n", start+i,error_est[(start+i)*2],error_est[((start +i)*2)+1],
slope_p[0],slope_p[1]);
#endif
}
}
+25
View File
@@ -80,6 +80,31 @@ uint8_t is_ptrs_subcarrier(uint16_t k,
static inline uint8_t is_ptrs_symbol(uint8_t l, uint16_t ptrs_symbols) { return ((ptrs_symbols >> l) & 1); }
uint8_t get_ptrs_symbols_in_slot(uint16_t l_prime_mask, uint16_t start_symb, uint16_t nb_symb);
int8_t get_next_ptrs_symbol_in_slot(uint16_t ptrsSymbPos, uint8_t counter, uint8_t nb_symb);
int8_t get_next_estimate_in_slot(uint16_t ptrsSymbPos,uint16_t dmrsSymbPos, uint8_t counter,uint8_t nb_symb);
int8_t nr_ptrs_process_slot(uint16_t dmrsSymbPos,
uint16_t ptrsSymbPos,
int16_t *estPerSymb,
uint16_t startSymbIdx,
uint16_t noSymb
);
/* general function to estimate common phase error based upon PTRS */
void nr_ptrs_cpe_estimation(uint8_t K_ptrs,
uint8_t ptrsReOffset,
uint8_t dmrsConfigType,
uint16_t nb_rb,
uint16_t rnti,
int16_t *ptrs_ch_p,
unsigned char Ns,
unsigned char symbol,
uint16_t ofdm_symbol_size,
int16_t *rxF_comp,
uint32_t *gold_seq,
int16_t *error_est,
int32_t *ptrs_sc);
void get_slope_from_estimates(uint8_t start, uint8_t end, int16_t *est_p, double *slope_p);
void ptrs_estimate_from_slope(int16_t *error_est, double *slope_p, uint8_t start, uint8_t end);
#endif /* PTRS_NR_H */
+1 -3
View File
@@ -61,9 +61,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
unsigned short length_dmrs);
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
unsigned short lbar,
unsigned short *n_idDMRS,
unsigned short length_dmrs);
unsigned short *n_idDMRS);
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
uint16_t *N_n_scid,
+1 -7
View File
@@ -92,13 +92,7 @@ int pss_ch_est_nr(PHY_VARS_NR_UE *ue,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR]);
int _do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR],
uint8_t doPss, uint8_t doSss,
uint8_t subframe);
int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric, uint8_t *phase_max);
int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, uint8_t *phase_max);
#undef INIT_VARIABLES_SSS_NR_H
#undef EXTERN
+140 -60
View File
@@ -35,7 +35,9 @@
#include "nr_sch_dmrs.h"
#include "PHY/MODULATION/nr_modulation.h"
#include "PHY/NR_REFSIG/dmrs_nr.h"
#include "PHY/NR_REFSIG/ptrs_nr.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
//#define DEBUG_DLSCH
//#define DEBUG_DLSCH_MAPPING
@@ -117,8 +119,8 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
uint32_t ***pdsch_dmrs = gNB->nr_gold_pdsch_dmrs[slot];
int32_t** txdataF = gNB->common_vars.txdataF;
int16_t amp = AMP;
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
int xOverhead = 0;
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
time_stats_t *dlsch_encoding_stats=&gNB->dlsch_encoding_stats;
time_stats_t *dlsch_scrambling_stats=&gNB->dlsch_scrambling_stats;
time_stats_t *dlsch_modulation_stats=&gNB->dlsch_modulation_stats;
@@ -140,7 +142,7 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5];
int16_t **mod_symbs = (int16_t**)dlsch->mod_symbs;
int16_t **tx_layers = (int16_t**)dlsch->txdataF;
int8_t Wf[2], Wt[2], l0, l_prime[2], delta;
int8_t Wf[2], Wt[2], l0, l_prime, l_overline, delta;
uint8_t dmrs_Type = rel15->dmrsConfigType;
int nb_re_dmrs;
uint16_t n_dmrs;
@@ -152,13 +154,31 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
nb_re_dmrs = 4*rel15->numDmrsCdmGrpsNoData;
n_dmrs = ((rel15->rbSize+rel15->rbStart)*4)<<1;
}
uint16_t nb_re;
nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs-xOverhead)*rel15->rbSize*rel15->NrOfCodewords;
uint16_t dmrs_symbol_map = rel15->dlDmrsSymbPos;//single DMRS: 010000100 Double DMRS 110001100
uint8_t dmrs_len = get_num_dmrs(rel15->dlDmrsSymbPos);
uint16_t nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs*dmrs_len-xOverhead)*rel15->rbSize*rel15->nrOfLayers;
uint8_t Qm = rel15->qamModOrder[0];
uint32_t encoded_length = nb_re*Qm;
int16_t mod_dmrs[n_dmrs<<1] __attribute__ ((aligned(16)));
int16_t mod_dmrs[14][n_dmrs] __attribute__ ((aligned(16)));
/* PTRS */
uint16_t beta_ptrs = 1;
uint8_t ptrs_symbol = 0;
uint16_t dlPtrsSymPos = 0;
uint16_t n_ptrs = 0;
uint16_t ptrs_idx = 0;
uint8_t is_ptrs_re = 0;
if(rel15->pduBitmap & 0x1) {
set_ptrs_symb_idx(&dlPtrsSymPos,
rel15->NrOfSymbols,
rel15->StartSymbolIndex,
1<<rel15->PTRSTimeDensity,
rel15->dlDmrsSymbPos);
n_ptrs = (rel15->rbSize + rel15->PTRSFreqDensity - 1)/rel15->PTRSFreqDensity;
}
int16_t mod_ptrs[n_ptrs<<1] __attribute__ ((aligned(16)));
/// CRC, coding, interleaving and rate matching
AssertFatal(harq->pdu!=NULL,"harq->pdu is null\n");
start_meas(dlsch_encoding_stats);
@@ -248,24 +268,24 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
/// Antenna port mapping
//to be moved to init phase potentially, for now tx_layers 1-8 are mapped on antenna ports 1000-1007
/// DMRS QPSK modulation
l0 = get_l0(rel15->dlDmrsSymbPos);
nr_modulation(pdsch_dmrs[l0][0], n_dmrs, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
for (int l=rel15->StartSymbolIndex; l<rel15->StartSymbolIndex+rel15->NrOfSymbols; l++) {
if (rel15->dlDmrsSymbPos & (1 << l)) {
nr_modulation(pdsch_dmrs[l][0], n_dmrs, DMRS_MOD_ORDER, mod_dmrs[l]); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_DLSCH
printf("DMRS modulation (single symbol %d, %d symbols, type %d):\n", l0, n_dmrs>>1, dmrs_Type);
for (int i=0; i<n_dmrs>>4; i++) {
for (int j=0; j<8; j++) {
printf("%d %d\t", mod_dmrs[((i<<3)+j)<<1], mod_dmrs[(((i<<3)+j)<<1)+1]);
}
printf("\n");
}
printf("DMRS modulation (symbol %d, %d symbols, type %d):\n", l, n_dmrs>>1, dmrs_Type);
for (int i=0; i<n_dmrs>>4; i++) {
for (int j=0; j<8; j++) {
printf("%d %d\t", mod_dmrs[l][((i<<3)+j)<<1], mod_dmrs[l][(((i<<3)+j)<<1)+1]);
}
printf("\n");
}
#endif
}
}
/// Resource mapping
// Non interleaved VRB to PRB mapping
@@ -283,55 +303,115 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
get_Wt(Wt, ap, dmrs_Type);
get_Wf(Wf, ap, dmrs_Type);
delta = get_delta(ap, dmrs_Type);
l_prime[0] = 0; // single symbol ap 0
uint8_t dmrs_symbol = l0+l_prime[0];
l_prime = 0; // single symbol ap 0
l0 = get_l0(rel15->dlDmrsSymbPos);
l_overline = l0;
#ifdef DEBUG_DLSCH_MAPPING
uint8_t dmrs_symbol = l0+l_prime;
printf("DMRS Type %d params for ap %d: Wt %d %d \t Wf %d %d \t delta %d \t l_prime %d \t l0 %d\tDMRS symbol %d\n",
1+dmrs_Type,ap, Wt[0], Wt[1], Wf[0], Wf[1], delta, l_prime[0], l0, dmrs_symbol);
1+dmrs_Type,ap, Wt[0], Wt[1], Wf[0], Wf[1], delta, l_prime, l0, dmrs_symbol);
#endif
uint8_t k_prime=0;
uint16_t m=0, n=0, dmrs_idx=0, k=0;
uint16_t m=0, dmrs_idx=0, k=0;
int txdataF_offset = (slot%2)*frame_parms->samples_per_slot_wCP;
if (dmrs_Type == NFAPI_NR_DMRS_TYPE1) // another if condition to be included to check pdsch config type (reference of k)
dmrs_idx = rel15->rbStart*6;
else
dmrs_idx = rel15->rbStart*4;
// Loop Over OFDM symbols:
for (int l=rel15->StartSymbolIndex; l<rel15->StartSymbolIndex+rel15->NrOfSymbols; l++) {
k = start_sc;
for (int i=0; i<rel15->rbSize*NR_NB_SC_PER_RB; i++) {
if ((l == dmrs_symbol) && (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) {
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime[0]]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime[0]]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
/// DMRS QPSK modulation
uint8_t k_prime=0;
uint16_t n=0;
if ((dmrs_symbol_map & (1 << l))){ //DMRS time occasion
if (dmrs_Type == NFAPI_NR_DMRS_TYPE1) // another if condition to be included to check pdsch config type (reference of k)
dmrs_idx = rel15->rbStart*6;
else
dmrs_idx = rel15->rbStart*4;
}
// Update l_prime in the case of double DMRS config
if ((dmrs_symbol_map & (1 << l))){ //DMRS time occasion
if (l==(l_overline+1)) //take into account the double DMRS symbols
l_prime = 1;
else if (l>(l_overline+1)) {//new DMRS pair
l_overline = l;
l_prime = 0;
}
}
/* calculate if current symbol is PTRS symbols */
ptrs_idx = 0;
if(rel15->pduBitmap & 0x1) {
ptrs_symbol = is_ptrs_symbol(l,dlPtrsSymPos);
if(ptrs_symbol) {
/* PTRS QPSK Modulation for each OFDM symbol in a slot */
nr_modulation(pdsch_dmrs[l][0], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs);
}
}
k = start_sc;
// Loop Over SCs:
for (int i=0; i<rel15->rbSize*NR_NB_SC_PER_RB; i++) {
/* check if cuurent RE is PTRS RE*/
is_ptrs_re=0;
/* check for PTRS symbol and set flag for PTRS RE */
if(ptrs_symbol){
is_ptrs_re = is_ptrs_subcarrier(k,
rel15->rnti,
ap,
rel15->dmrsConfigType,
rel15->PTRSFreqDensity,
rel15->rbSize,
rel15->PTRSReOffset,
start_sc,
frame_parms->ofdm_symbol_size);
}
/* Map DMRS Symbol */
if ( ( dmrs_symbol_map & (1 << l) ) && (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) {
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
#endif
dmrs_idx++;
k_prime++;
k_prime&=1;
n+=(k_prime)?0:1;
}
else {
if( (l != dmrs_symbol) || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) {
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15;
dmrs_idx++;
k_prime++;
k_prime&=1;
n+=(k_prime)?0:1;
}
/* Map PTRS Symbol */
else if(is_ptrs_re){
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[ptrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (beta_ptrs*amp*mod_ptrs[(ptrs_idx<<1) + 1])>> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, k, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
printf("ptrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
ptrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
#endif
m++;
}
}
if (++k >= frame_parms->ofdm_symbol_size)
k -= frame_parms->ofdm_symbol_size;
} //RE loop
ptrs_idx++;
}
/* Map DATA Symbol */
else {
if( (!(dmrs_symbol_map & (1 << l))) || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,frame_parms->ofdm_symbol_size,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) {
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, k, ((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)]);
#endif
m++;
}
}
if (++k >= frame_parms->ofdm_symbol_size)
k -= frame_parms->ofdm_symbol_size;
} //RE loop
} // symbol loop
}// layer loop
dlsch->slot_tx[slot]=0;
}// dlsch loop
return 0;
+1 -2
View File
@@ -328,8 +328,7 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
uint16_t nb_rb = rel15->rbSize;
uint8_t nb_symb_sch = rel15->NrOfSymbols;
uint32_t A, Kb, F=0;
static uint32_t Z = 0;
uint32_t *Zc = &Z;
uint32_t *Zc = &dlsch->harq_processes[harq_pid]->Z;
uint8_t mod_order = rel15->qamModOrder[0];
uint16_t Kr=0,r;
uint32_t r_offset=0;
+143 -119
View File
@@ -185,10 +185,10 @@ void rx_nr_prach_ru(RU_t *ru,
for (int aa=0; aa<ru->nb_rx; aa++){
if (prach_sequence_length == 0) slot2=(slot/fp->slots_per_subframe)*fp->slots_per_subframe;
prach[aa] = (int16_t*)&ru->common.rxdata[aa][(slot2*fp->get_samples_per_slot(slot,fp))+sample_offset_slot-ru->N_TA_offset];
prach[aa] = (int16_t*)&ru->common.rxdata[aa][fp->get_samples_slot_timestamp(slot2,fp,0)+sample_offset_slot-ru->N_TA_offset];
}
idft_size_idx_t dftsize;
int dftlen=0;
int mu = fp->numerology_index;
int Ncp = 0;
@@ -269,7 +269,8 @@ void rx_nr_prach_ru(RU_t *ru,
if (LOG_DEBUGFLAG(PRACH)) {
LOG_D(PHY,"rx_prach: Doing PRACH FFT for nb_rx:%d Ncp:%d\n",ru->nb_rx, Ncp);
}
AssertFatal(mu==1,"only 30 kHz SCS handled for now\n");
// Note: Assumes PUSCH SCS @ 30 kHz, take values for formats 0-2 and adjust for others below
int kbar = 1;
@@ -299,6 +300,7 @@ void rx_nr_prach_ru(RU_t *ru,
AssertFatal(prach[aa]!=NULL,"prach[%d] is null\n",aa);
// do DFT
if (mu==1) {
if (fp->N_RB_UL <= 100)
AssertFatal(1==0,"N_RB_UL %d not support for NR PRACH yet\n",fp->N_RB_UL);
else if (fp->N_RB_UL < 137) {
@@ -327,36 +329,29 @@ void rx_nr_prach_ru(RU_t *ru,
}
}// 839 sequence
else {
if ((mu==0 &&
(prachStartSymbol == 0 || prachStartSymbol == 7)) ||
(mu==1 && prachStartSymbol == 0)) prach2+=64; // 32 samples @ 61.44 Ms/s in first symbol of each half subframe (15/30 kHz only)
if (prachStartSymbol == 0)
prach2+=64; // 32 samples @ 61.44 Ms/s in first symbol of each half subframe (15/30 kHz only)
if (mu==0) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==1) {
dftlen=2048;
dft(DFT_2048,prach2,rxsigF[aa],1);
if (prachFormat != 9/*C0*/) {
dft(DFT_2048,prach2+4096,rxsigF[aa]+4096,1);
reps++;
}
if (prachFormat == 5/*A2*/ || prachFormat == 6/*A3*/|| prachFormat == 8/*B4*/ || prachFormat == 10/*C2*/) {
dft(DFT_2048,prach2+4096*2,rxsigF[aa]+4096*2,1);
dft(DFT_2048,prach2+4096*3,rxsigF[aa]+4096*3,1);
reps+=2;
}
if (prachFormat == 6/*A3*/ || prachFormat == 8/*B4*/) {
dft(DFT_2048,prach2+4096*4,rxsigF[aa]+4096*4,1);
dft(DFT_2048,prach2+4096*5,rxsigF[aa]+4096*5,1);
reps+=2;
}
if (prachFormat == 8/*B4*/) {
for (int i=6;i<12;i++) dft(DFT_2048,prach2+(4096*i),rxsigF[aa]+(4096*i),1);
reps+=6;
}
dftlen=2048;
dft(DFT_2048,prach2,rxsigF[aa],1);
if (prachFormat != 9/*C0*/) {
dft(DFT_2048,prach2+4096,rxsigF[aa]+4096,1);
reps++;
}
if (prachFormat == 5/*A2*/ || prachFormat == 6/*A3*/|| prachFormat == 8/*B4*/ || prachFormat == 10/*C2*/) {
dft(DFT_2048,prach2+4096*2,rxsigF[aa]+4096*2,1);
dft(DFT_2048,prach2+4096*3,rxsigF[aa]+4096*3,1);
reps+=2;
}
if (prachFormat == 6/*A3*/ || prachFormat == 8/*B4*/) {
dft(DFT_2048,prach2+4096*4,rxsigF[aa]+4096*4,1);
dft(DFT_2048,prach2+4096*5,rxsigF[aa]+4096*5,1);
reps+=2;
}
if (prachFormat == 8/*B4*/) {
for (int i=6;i<12;i++) dft(DFT_2048,prach2+(4096*i),rxsigF[aa]+(4096*i),1);
reps+=6;
}
else if (mu==2) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==3) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==4) AssertFatal(1==0,"Shouldn't get here\n");
}
} else { // threequarter sampling
// 40 MHz @ 46.08 Ms/s
@@ -383,36 +378,28 @@ void rx_nr_prach_ru(RU_t *ru,
reps=4;
}
} else {
if ((mu==0 &&
(prachStartSymbol == 0 || prachStartSymbol == 7)) ||
(mu==1 && prachStartSymbol == 0)) prach2+=48; // 24 samples @ 46.08 Ms/s in first symbol of each half subframe (15/30 kHz only)
if (mu==0) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==1) {
dftlen=1536;
dft(DFT_1536,prach2,rxsigF[aa],1);
if (prachFormat != 9/*C0*/) {
dft(DFT_1536,prach2+3072,rxsigF[aa]+3072,1);
reps++;
}
if (prachFormat == 5/*A2*/ || prachFormat == 6/*A3*/|| prachFormat == 8/*B4*/ || prachFormat == 10/*C2*/) {
dft(DFT_1536,prach2+3072*2,rxsigF[aa]+3072*2,1);
dft(DFT_1536,prach2+3072*3,rxsigF[aa]+3072*3,1);
reps+=2;
}
if (prachFormat == 6/*A3*/ || prachFormat == 8/*B4*/) {
dft(DFT_1536,prach2+3072*4,rxsigF[aa]+3072*4,1);
dft(DFT_1536,prach2+3072*5,rxsigF[aa]+3072*5,1);
reps+=2;
}
if (prachFormat == 8/*B4*/) {
for (int i=6;i<12;i++) dft(DFT_1536,prach2+(3072*i),rxsigF[aa]+(3072*i),1);
reps+=6;
}
}// mu==1
else if (mu==2) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==3) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==4) AssertFatal(1==0,"Shouldn't get here\n");
if (prachStartSymbol == 0) prach2+=48; // 24 samples @ 46.08 Ms/s in first symbol of each half subframe (15/30 kHz only)
dftlen=1536;
dft(DFT_1536,prach2,rxsigF[aa],1);
if (prachFormat != 9/*C0*/) {
dft(DFT_1536,prach2+3072,rxsigF[aa]+3072,1);
reps++;
}
if (prachFormat == 5/*A2*/ || prachFormat == 6/*A3*/|| prachFormat == 8/*B4*/ || prachFormat == 10/*C2*/) {
dft(DFT_1536,prach2+3072*2,rxsigF[aa]+3072*2,1);
dft(DFT_1536,prach2+3072*3,rxsigF[aa]+3072*3,1);
reps+=2;
}
if (prachFormat == 6/*A3*/ || prachFormat == 8/*B4*/) {
dft(DFT_1536,prach2+3072*4,rxsigF[aa]+3072*4,1);
dft(DFT_1536,prach2+3072*5,rxsigF[aa]+3072*5,1);
reps+=2;
}
if (prachFormat == 8/*B4*/) {
for (int i=6;i<12;i++) dft(DFT_1536,prach2+(3072*i),rxsigF[aa]+(3072*i),1);
reps+=6;
}
} // short format
} // 3/4 sampling
} // <=50 MHz BW
@@ -442,37 +429,29 @@ void rx_nr_prach_ru(RU_t *ru,
}
}
else {
if ((mu==0 &&
(prachStartSymbol == 0 || prachStartSymbol == 7)) ||
(mu==1 && prachStartSymbol == 0)) prach2+=128; // 64 samples @ 122.88 Ms/s in first symbol of each half subframe (15/30 kHz only)
if (prachStartSymbol == 0) prach2+=128; // 64 samples @ 122.88 Ms/s in first symbol of each half subframe (15/30 kHz only)
if (mu==0) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==1) {
dftlen=4096;
dft(DFT_4096,prach2,rxsigF[aa],1);
if (prachFormat != 9/*C0*/) {
dft(DFT_4096,prach2+8192,rxsigF[aa]+8192,1);
reps++;
}
if (prachFormat == 5/*A2*/ || prachFormat == 6/*A3*/|| prachFormat == 8/*B4*/ || prachFormat == 10/*C2*/) {
dft(DFT_4096,prach2+8192*2,rxsigF[aa]+8192*2,1);
dft(DFT_4096,prach2+8192*3,rxsigF[aa]+8192*3,1);
reps+=2;
}
if (prachFormat == 6/*A3*/ || prachFormat == 8/*B4*/) {
dft(DFT_4096,prach2+8192*4,rxsigF[aa]+8192*4,1);
dft(DFT_4096,prach2+8192*5,rxsigF[aa]+8192*5,1);
reps+=2;
}
if (prachFormat == 8/*B4*/) {
for (int i=6;i<12;i++) dft(DFT_4096,prach2+(8192*i),rxsigF[aa]+(8192*i),1);
reps+=6;
}
dftlen=4096;
dft(DFT_4096,prach2,rxsigF[aa],1);
if (prachFormat != 9/*C0*/) {
dft(DFT_4096,prach2+8192,rxsigF[aa]+8192,1);
reps++;
}
if (prachFormat == 5/*A2*/ || prachFormat == 6/*A3*/|| prachFormat == 8/*B4*/ || prachFormat == 10/*C2*/) {
dft(DFT_4096,prach2+8192*2,rxsigF[aa]+8192*2,1);
dft(DFT_4096,prach2+8192*3,rxsigF[aa]+8192*3,1);
reps+=2;
}
if (prachFormat == 6/*A3*/ || prachFormat == 8/*B4*/) {
dft(DFT_4096,prach2+8192*4,rxsigF[aa]+8192*4,1);
dft(DFT_4096,prach2+8192*5,rxsigF[aa]+8192*5,1);
reps+=2;
}
if (prachFormat == 8/*B4*/) {
for (int i=6;i<12;i++) dft(DFT_4096,prach2+(8192*i),rxsigF[aa]+(8192*i),1);
reps+=6;
}
else if (mu==2) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==3) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==4) AssertFatal(1==0,"Shouldn't get here\n");
}
} else {
AssertFatal(fp->N_RB_UL <= 217,"cannot do more than 217 PRBs with 3/4 sampling\n");
@@ -494,40 +473,85 @@ void rx_nr_prach_ru(RU_t *ru,
reps=4;
}
} else {
if ((mu==0 &&
(prachStartSymbol == 0 || prachStartSymbol == 7)) ||
(mu==1 && prachStartSymbol == 0)) prach2+=96; // 64 samples @ 122.88 Ms/s in first symbol of each half subframe (15/30 kHz only)
if (prachStartSymbol == 0) prach2+=96; // 64 samples @ 122.88 Ms/s in first symbol of each half subframe (15/30 kHz only)
if (mu==0) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==1) {
dftlen=3072;
dft(DFT_3072,prach2,rxsigF[aa],1);
if (prachFormat != 9/*C0*/) {
dft(DFT_3072,prach2+6144,rxsigF[aa]+6144,1);
reps++;
}
if (prachFormat == 5/*A2*/ || prachFormat == 6/*A3*/|| prachFormat == 8/*B4*/ || prachFormat == 10/*C2*/) {
dft(DFT_3072,prach2+6144*2,rxsigF[aa]+6144*2,1);
dft(DFT_3072,prach2+6144*3,rxsigF[aa]+6144*3,1);
reps+=2;
}
if (prachFormat == 6/*A3*/ || prachFormat == 8/*B4*/) {
dft(DFT_3072,prach2+6144*4,rxsigF[aa]+6144*4,1);
dft(DFT_3072,prach2+6144*5,rxsigF[aa]+6144*5,1);
reps+=2;
}
if (prachFormat == 8/*B4*/) {
for (int i=6;i<12;i++) dft(DFT_3072,prach2+(6144*i),rxsigF[aa]+(6144*i),1);
reps+=6;
}
dftlen=3072;
dft(DFT_3072,prach2,rxsigF[aa],1);
if (prachFormat != 9/*C0*/) {
dft(DFT_3072,prach2+6144,rxsigF[aa]+6144,1);
reps++;
}
if (prachFormat == 5/*A2*/ || prachFormat == 6/*A3*/|| prachFormat == 8/*B4*/ || prachFormat == 10/*C2*/) {
dft(DFT_3072,prach2+6144*2,rxsigF[aa]+6144*2,1);
dft(DFT_3072,prach2+6144*3,rxsigF[aa]+6144*3,1);
reps+=2;
}
if (prachFormat == 6/*A3*/ || prachFormat == 8/*B4*/) {
dft(DFT_3072,prach2+6144*4,rxsigF[aa]+6144*4,1);
dft(DFT_3072,prach2+6144*5,rxsigF[aa]+6144*5,1);
reps+=2;
}
if (prachFormat == 8/*B4*/) {
for (int i=6;i<12;i++) dft(DFT_3072,prach2+(6144*i),rxsigF[aa]+(6144*i),1);
reps+=6;
}
else if (mu==2) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==3) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==4) AssertFatal(1==0,"Shouldn't get here\n");
}
}
}
}
else if (mu==3) {
if (fp->threequarter_fs) {
AssertFatal(1==0,"3/4 sampling not supported for numerology %d\n",mu);
}
if (prach_sequence_length == 0) {
AssertFatal(1==0,"long prach not supported for numerology %d\n",mu);
}
if (fp->N_RB_UL == 32) {
prach2 = prach[aa] + (Ncp<<2); // Ncp is for 30.72 Ms/s, so multiply by 2 for I/Q, and 2 for 61.44Msps
if (slot%(fp->slots_per_subframe/2)==0 && prachStartSymbol == 0)
prach2+=64; // 32 samples @ 61.44 Ms/s in first symbol of each half subframe
dftlen=512;
dftsize = DFT_512;
}
else if (fp->N_RB_UL == 66) {
prach2 = prach[aa] + (Ncp<<3); // Ncp is for 30.72 Ms/s, so multiply by 4 for I/Q, and 2 for 122.88Msps
if (slot%(fp->slots_per_subframe/2)==0 && prachStartSymbol == 0)
prach2+=128; // 64 samples @ 122.88 Ms/s in first symbol of each half subframe
dftlen=1024;
dftsize = DFT_1024;
}
else {
AssertFatal(1==0,"N_RB_UL %d not support for numerology %d\n",fp->N_RB_UL,mu);
}
dft(dftsize,prach2,rxsigF[aa],1);
if (prachFormat != 9/*C0*/) {
dft(dftsize,prach2+dftlen*2,rxsigF[aa]+dftlen*2,1);
reps++;
}
if (prachFormat == 5/*A2*/ || prachFormat == 6/*A3*/|| prachFormat == 8/*B4*/ || prachFormat == 10/*C2*/) {
dft(dftsize,prach2+dftlen*4,rxsigF[aa]+dftlen*4,1);
dft(dftsize,prach2+dftlen*6,rxsigF[aa]+dftlen*6,1);
reps+=2;
}
if (prachFormat == 6/*A3*/ || prachFormat == 8/*B4*/) {
dft(dftsize,prach2+dftlen*8,rxsigF[aa]+dftlen*8,1);
dft(dftsize,prach2+dftlen*10,rxsigF[aa]+dftlen*10,1);
reps+=2;
}
if (prachFormat == 8/*B4*/) {
for (int i=6;i<12;i++)
dft(dftsize,prach2+(dftlen*2*i),rxsigF[aa]+(dftlen*2*i),1);
reps+=6;
}
}
else {
AssertFatal(1==0,"Numerology not supported\n");
}
//LOG_M("ru_rxsigF_tmp.m","rxsFtmp", rxsigF[aa], dftlen*2*reps, 1, 1);
//Coherent combining of PRACH repetitions (assumes channel does not change, to be revisted for "long" PRACH)
LOG_D(PHY,"Doing PRACH combining of %d reptitions N_ZC %d\n",reps,N_ZC);
+2 -2
View File
@@ -67,12 +67,12 @@ void get_antenna_ports(uint8_t *ap, uint8_t n_symbs, uint8_t config) {
void get_Wt(int8_t *Wt, uint8_t ap, uint8_t config) {
for (int i=0; i<2; i++)
*(Wt+i)=(config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][3+i]):(pdsch_dmrs_2[ap][3+i]);
*(Wt+i)=(config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][5+i]):(pdsch_dmrs_2[ap][5+i]);
}
void get_Wf(int8_t *Wf, uint8_t ap, uint8_t config) {
for (int i=0; i<2; i++)
*(Wf+i)=(config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][5+i]):(pdsch_dmrs_2[ap][5+i]);
*(Wf+i)=(config==NFAPI_NR_DMRS_TYPE1)?(pdsch_dmrs_1[ap][3+i]):(pdsch_dmrs_2[ap][3+i]);
}
uint8_t get_delta(uint8_t ap, uint8_t config) {
@@ -44,7 +44,7 @@
void nr_group_sequence_hopping(pucch_GroupHopping_t PUCCH_GroupHopping,
uint32_t n_id,
uint8_t n_hop,
int nr_tti_tx,
int nr_slot_tx,
uint8_t *u,
uint8_t *v);
@@ -53,7 +53,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
uint8_t mcs,
uint8_t lnormal,
uint8_t lprime,
int nr_tti_tx);
int nr_slot_tx);
/** \brief Computes available bits G. */
uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch, uint8_t nb_re_dmrs, uint16_t length_dmrs, uint8_t Qm, uint8_t Nl);
+13 -13
View File
@@ -33,11 +33,11 @@
#include "nr_dci.h"
void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
uint32_t n_id,
uint8_t n_hop,
int nr_tti_tx,
uint8_t *u,
uint8_t *v) {
uint32_t n_id,
uint8_t n_hop,
int nr_slot_tx,
uint8_t *u,
uint8_t *v) {
/*
* Implements TS 38.211 subclause 6.3.2.2.1 Group and sequence hopping
* The following variables are set by higher layers:
@@ -65,7 +65,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
*v=0;
uint32_t c_init = 0;
uint32_t x1,s; // TS 38.211 Subclause 5.2.1
int l = 32, minShift = ((2*nr_tti_tx+n_hop)<<3);
int l = 32, minShift = ((2*nr_slot_tx+n_hop)<<3);
int tmpShift =0;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_group_sequence_hopping] calculating u,v -> ");
@@ -92,7 +92,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
f_gh = f_gh%30;
f_ss = n_id%30;
/* for (int m=0; m<8; m++){
f_gh = f_gh + ((1<<m)*((uint8_t)((s>>(8*(2*nr_tti_tx+n_hop)+m))&1))); // Not sure we have to use nr_tti_tx FIXME!!!
f_gh = f_gh + ((1<<m)*((uint8_t)((s>>(8*(2*nr_slot_tx+n_hop)+m))&1))); // Not sure we have to use nr_slot_tx FIXME!!!
}
f_gh = f_gh%30;
f_ss = n_id%30;*/
@@ -102,7 +102,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
c_init = (1<<5)*floor(n_id/30)+(n_id%30); // we initialize c_init to calculate u,v
s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1
f_ss = n_id%30;
l = 32, minShift = (2*nr_tti_tx+n_hop);
l = 32, minShift = (2*nr_slot_tx+n_hop);
while(minShift >= l) {
s = lte_gold_generic(&x1, &c_init, 0);
@@ -111,7 +111,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
tmpShift = (minShift&((1<<5)-1)); //minShift%32;
*v = (uint8_t)((s>>tmpShift)&1);
// *v = (uint8_t)((s>>(2*nr_tti_tx+n_hop))&1); // Not sure we have to use nr_tti_tx FIXME!!!
// *v = (uint8_t)((s>>(2*nr_slot_tx+n_hop))&1); // Not sure we have to use nr_slot_tx FIXME!!!
}
*u = (f_gh+f_ss)%30;
@@ -125,7 +125,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
uint8_t mcs,
uint8_t lnormal,
uint8_t lprime,
int nr_tti_tx) {
int nr_slot_tx) {
/*
* Implements TS 38.211 subclause 6.3.2.2.2 Cyclic shift hopping
* - n_id: higher-layer parameter hoppingId
@@ -140,7 +140,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
uint32_t x1,s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1
uint8_t n_cs=0;
int l = 32, minShift = (14*8*nr_tti_tx )+ 8*(lnormal+lprime);
int l = 32, minShift = (14*8*nr_slot_tx )+ 8*(lnormal+lprime);
int tmpShift =0;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_cyclic_shift_hopping] calculating alpha (cyclic shift) using c_init=%u -> \n",c_init);
@@ -155,8 +155,8 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
tmpShift = (minShift&((1<<5)-1)); //minShift%32;
minShift ++;
n_cs = n_cs+((1<<m)*((uint8_t)((s>>tmpShift)&1)));
// calculating n_cs (Not sure we have to use nr_tti_tx FIXME!!!)
// n_cs = n_cs+((1<<m)*((uint8_t)((s>>((14*8*nr_tti_tx) + 8*(lnormal+lprime) + m))&1)));
// calculating n_cs (Not sure we have to use nr_slot_tx FIXME!!!)
// n_cs = n_cs+((1<<m)*((uint8_t)((s>>((14*8*nr_slot_tx) + 8*(lnormal+lprime) + m))&1)));
}
alpha = (alpha * (double)((m0+mcs+n_cs)%12));
@@ -1235,16 +1235,16 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
{
start_meas(&gNB->ulsch_ptrs_processing_stats);
nr_pusch_ptrs_processing(gNB,
frame_parms,
rel15_ul,
ulsch_id,
nr_tti_rx,
dmrs_symbol_flag,
symbol,
nb_re_pusch);
stop_meas(&gNB->ulsch_ptrs_processing_stats);
/* Subtract total PTRS RE's in the symbol from PUSCH RE's */
gNB->pusch_vars[ulsch_id]->ul_valid_re_per_slot[symbol] -= gNB->pusch_vars[ulsch_id]->ptrs_sc_per_ofdm_symbol;
gNB->pusch_vars[ulsch_id]->ul_valid_re_per_slot[symbol] -= gNB->pusch_vars[ulsch_id]->ptrs_re_per_slot;
}
/*---------------------------------------------------------------------------------------------------- */
@@ -185,3 +185,57 @@ short filt8_rr1[8] = {
short filt8_rr2[8] = {
-4096,-8192,-12288,-16384,0,0,0,0};
short filt8_l2[8] = {
0,0,13107,9830,6554,3277,0,0};
short filt8_r2[8] = {
0,0,3277,6554,9830,13107,0,0};
short filt8_m2[8] = {
0,0,0,0,13107,9830,6554,3277};
short filt8_mm2[8]= {
0,0,0,0,3277,6554,9830,13107};
short filt8_rl2[8] = {
19661,22938,26214,29491,0,0,0,0};
short filt8_rm2[8] = {
-3277,-6554,-9830,-13107,0,0,0,0};//-3277,-6554,-9830,-13107
short filt8_l3[8] = {
22938,19661,0,0,13107,9830,6554,3277};
short filt8_r3[8] = {
-7537,-4260,0,0,3277,6554,9830,13107};//-6554,-3277
short filt8_rl3[8] = {
0,0,19661,22938,0,0,0,0};
short filt8_rr3[8] = {
0,0,-4260,-7537,0,0,0,0};//-3277,-6554
short filt8_dcrl1[8] = {
14895,13405,11916,10426,8937,7447,5958,4468};
short filt8_dcrh1[8] = {
2979,1489,0,0,0,0,0,0};
short filt8_dcll1[8] = {
13405,14895,0,0,0,0,0,0};
short filt8_dclh1[8] = {
1489,2979,4468,5958,7447,8937,10426,11916};
short filt8_dcrl2[8] = {
0,0,0,0,14895,13405,11916,10426};
short filt8_dcrh2[8] = {
8937,7447,5958,4468,2979,1489,0,0,};
short filt8_dcll2[8] = {
7447,8937,10426,11916,13405,14895,0,0};
short filt8_dclh2[8] = {
0,0,0,0,1489,2979,4468,5958};
@@ -133,4 +133,40 @@ extern short filt8_rr1[8];
extern short filt8_rr2[8];
extern short filt8_rm2[8];
extern short filt8_rl2[8];
extern short filt8_l2[8];
extern short filt8_r2[8];
extern short filt8_m2[8];
extern short filt8_mm2[8];
extern short filt8_l3[8];
extern short filt8_r3[8];
extern short filt8_rr3[8];
extern short filt8_rl3[8];
extern short filt8_dcrl1[8];
extern short filt8_dcrh1[8];
extern short filt8_dcll1[8];
extern short filt8_dclh1[8];
extern short filt8_dcrl2[8];
extern short filt8_dcrh2[8];
extern short filt8_dcll2[8];
extern short filt8_dclh2[8];
#endif
@@ -103,7 +103,7 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
if (ue->mac_enabled==1) {
LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",ue->Mod_id);
//mac_resynch();
//dl_phy_sync_success(ue->Mod_id,ue->proc.proc_rxtx[0].frame_rx,0,1);//ue->common_vars.eNb_id);
//dl_phy_sync_success(ue->Mod_id,frame,0,1);//ue->common_vars.eNb_id);
ue->UE_mode[0] = PRACH;
ue->prach_resources[gNB_id]->sync_frame = frame;
ue->prach_resources[gNB_id]->init_msg1 = 0;
@@ -122,9 +122,8 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
#ifdef DEBUG_PHY
LOG_D(PHY,"AbsSubframe %d: ThreadId %d diff =%i rx_offset (final) = %i : clear %d,max_pos = %d,max_pos_fil = %d (peak %d) max_val %d target_pos %d \n",
LOG_D(PHY,"AbsSubframe %d: diff =%i rx_offset (final) = %i : clear %d,max_pos = %d,max_pos_fil = %d (peak %d) max_val %d target_pos %d \n",
subframe,
ue->current_thread_id[subframe],
diff,
ue->rx_offset,
clear,
@@ -24,6 +24,10 @@
#include "SCHED_NR_UE/defs.h"
#include "nr_estimation.h"
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "PHY/NR_REFSIG/dmrs_nr.h"
#include "PHY/NR_REFSIG/ptrs_nr.h"
#include "PHY/NR_TRANSPORT/nr_sch_dmrs.h"
#include "filt16a_32.h"
//#define DEBUG_PDSCH
@@ -31,6 +35,7 @@
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
@@ -48,7 +53,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
uint8_t nushift;
uint8_t ssb_index=current_ssb->i_ssb;
uint8_t n_hf=current_ssb->n_hf;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
nushift = ue->frame_parms.Nid_cell%4;
ue->frame_parms.nushift = nushift;
@@ -65,7 +70,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
k = nushift;
#ifdef DEBUG_CH
printf("PBCH DMRS Correlation : ThreadId %d, eNB_offset %d , OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ue->frame_parms.ofdm_symbol_size,
printf("PBCH DMRS Correlation : ThreadId %d, eNB_offset %d , OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol);
#endif
@@ -192,6 +197,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
@@ -211,7 +217,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t nushift;
int **dl_ch_estimates =ue->pbch_vars[eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
nushift = ue->frame_parms.Nid_cell%4;
ue->frame_parms.nushift = nushift;
@@ -233,7 +239,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
k = nushift;
#ifdef DEBUG_CH
printf("PBCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
printf("PBCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol);
#endif
@@ -447,17 +453,17 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
if( dmrss == 2) // update time statistics for last PBCH symbol
{
// do ifft of channel estimate
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++)
for (p=0; p<ue->frame_parms.nb_antenna_ports_gNB; p++) {
if (ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p<<1)+aarx])
{
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d ch_offset %d\n", Ns, ue->current_thread_id[Ns], symbol, ch_offset);
idft(idftsizeidx,
(int16_t*) &ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p<<1)+aarx][ch_offset],
(int16_t*) ue->pbch_vars[eNB_offset]->dl_ch_estimates_time[(p<<1)+aarx],1);
}
}
// do ifft of channel estimate
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++)
for (p=0; p<ue->frame_parms.nb_antenna_ports_gNB; p++) {
if (ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p<<1)+aarx])
{
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d ch_offset %d\n", Ns, proc->thread_id, symbol, ch_offset);
idft(idftsizeidx,
(int16_t*) &ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p<<1)+aarx][ch_offset],
(int16_t*) ue->pbch_vars[eNB_offset]->dl_ch_estimates_time[(p<<1)+aarx],1);
}
}
}
//}
@@ -467,6 +473,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
}
int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
@@ -482,8 +489,8 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
int **dl_ch_estimates =ue->pdcch_vars[ue->current_thread_id[Ns]][eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
int **dl_ch_estimates =ue->pdcch_vars[proc->thread_id][eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
if (ue->high_speed_flag == 0) // use second channel estimate position for temporary storage
@@ -496,7 +503,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
k = coreset_start_subcarrier;
#ifdef DEBUG_PDCCH
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol);
#endif
@@ -641,6 +648,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
}
int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned short p,
@@ -652,20 +660,17 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned char aarx;
unsigned short k;
unsigned int pilot_cnt;
int16_t ch[2],*pil,*rxF,*dl_ch;
int16_t *fl,*fm,*fr,*fml,*fmr,*fmm,*fdcl,*fdcr,*fdclh,*fdcrh;
int16_t ch_l[2],ch_r[2],ch[2],*pil,*rxF,*dl_ch;
int16_t *fl,*fm,*fr,*fml,*fmr,*fmm,*fdcl,*fdcr,*fdclh,*fdcrh, *frl, *frr;
int ch_offset,symbol_offset;
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **dl_ch_estimates =ue->pdsch_vars[ue->current_thread_id[Ns]][eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
int **dl_ch_estimates =ue->pdsch_vars[proc->thread_id][eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
nushift = (p>>1)&1;
ue->frame_parms.nushift = nushift;
if (ue->high_speed_flag == 0) // use second channel estimate position for temporary storage
if (ue->high_speed_flag == 0)
ch_offset = ue->frame_parms.ofdm_symbol_size ;
else
ch_offset = ue->frame_parms.ofdm_symbol_size*symbol;
@@ -676,55 +681,103 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
int re_offset = k;
#ifdef DEBUG_CH
printf("PDSCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ch_offset,symbol_offset,ue->frame_parms.ofdm_symbol_size,
printf("PDSCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ch_offset,symbol_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol);
#endif
switch (nushift) {
case 0:
fl = filt8_l0;
fm = filt8_m0;
fr = filt8_r0;
fmm = filt8_mm0;
fml = filt8_m0;
fmr = filt8_mr0;
fdcl = filt8_dcl0;
fdcr = filt8_dcr0;
fdclh = filt8_dcl0_h;
fdcrh = filt8_dcr0_h;
break;
case 1:
fl = filt8_l1;
fm = filt8_m1;
fr = filt8_r1;
fmm = filt8_mm1;
fml = filt8_ml1;
fmr = filt8_m1;
fdcl = filt8_dcl1;
fdcr = filt8_dcr1;
fdclh = filt8_dcl1_h;
fdcrh = filt8_dcr1_h;
break;
default:
msg("pdsch_channel_estimation: nushift=%d -> ERROR\n",nushift);
return(-1);
break;
}
// generate pilot
// generate pilot for gNB port number 1000+p
uint16_t rb_offset = (bwp_start_subcarrier - ue->frame_parms.first_carrier_offset) / 12;
int config_type = 0; // needs to be updated from higher layer
nr_pdsch_dmrs_rx(ue,Ns,ue->nr_gold_pdsch[eNB_offset][Ns][0], &pilot[0],1000,0,nb_rb_pdsch+rb_offset);
uint8_t config_type = ue->dmrs_DownlinkConfig.pdsch_dmrs_type;
int8_t delta = get_delta(p, config_type);
nr_pdsch_dmrs_rx(ue,Ns,ue->nr_gold_pdsch[eNB_offset][Ns][symbol], &pilot[0],1000,0,nb_rb_pdsch+rb_offset);
if (config_type == pdsch_dmrs_type1){
nushift = (p>>1)&1;
ue->frame_parms.nushift = nushift;
switch (delta) {
case 0://port 0,1
fl = filt8_l0;//left interpolation Filter for DMRS config. 1
fm = filt8_m0;//left middle interpolation Filter
fr = filt8_r0;//right interpolation Filter
fmm = filt8_mm0;;//middle middle interpolation Filter
fml = filt8_m0;//left middle interpolation Filter
fmr = filt8_mr0;//middle right interpolation Filter
fdcl = filt8_dcl0;//left DC interpolation Filter (even RB)
fdcr = filt8_dcr0;//right DC interpolation Filter (even RB)
fdclh = filt8_dcl0_h;//left DC interpolation Filter (odd RB)
fdcrh = filt8_dcr0_h;//right DC interpolation Filter (odd RB)
frl = NULL;
frr = NULL;
break;
case 1://port2,3
fl = filt8_l1;
fm = filt8_m1;
fr = filt8_r1;
fmm = filt8_mm1;
fml = filt8_ml1;
fmr = filt8_m1;
fdcl = filt8_dcl1;
fdcr = filt8_dcr1;
fdclh = filt8_dcl1_h;
fdcrh = filt8_dcr1_h;
frl = NULL;
frr = NULL;
break;
default:
msg("pdsch_channel_estimation: nushift=%d -> ERROR\n",nushift);
return -1;
break;
}
} else {//pdsch_dmrs_type2
nushift = delta;
ue->frame_parms.nushift = nushift;
switch (delta) {
case 0://port 0,1
fl = filt8_l2;//left interpolation Filter should be fml
fr = filt8_r2;//right interpolation Filter should be fmr
fm = filt8_l2;
fmm = filt8_r2;
fml = filt8_ml2;
fmr = filt8_mr2;
frl = filt8_rl2;
frr = filt8_rm2;
fdcl = filt8_dcl1;
fdcr = filt8_dcr1;
fdclh = filt8_dcl1_h;
fdcrh = filt8_dcr1_h;
break;
case 2://port2,3
fl = filt8_l3;
fm = filt8_m2;
fr = filt8_r3;
fmm = filt8_mm2;
fml = filt8_l2;
fmr = filt8_r2;
frl = filt8_rl3;
frr = filt8_rr3;
fdcl = NULL;
fdcr = NULL;
fdclh = NULL;
fdcrh = NULL;
break;
default:
msg("pdsch_channel_estimation: nushift=%d -> ERROR\n",nushift);
return -1;
break;
}
}
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
pil = (int16_t *)&pilot[rb_offset*((config_type==0) ? 6:4)];
pil = (int16_t *)&pilot[rb_offset*((config_type==pdsch_dmrs_type1) ? 6:4)];
k = k % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];
dl_ch = (int16_t *)&dl_ch_estimates[aarx][ch_offset];
re_offset = k;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+re_offset+nushift)];
dl_ch = (int16_t *)&dl_ch_estimates[p*ue->frame_parms.nb_antennas_rx+aarx][ch_offset];
memset(dl_ch,0,4*(ue->frame_parms.ofdm_symbol_size));
if (ue->high_speed_flag==0) // multiply previous channel estimate by ch_est_alpha
@@ -737,7 +790,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
printf("rxF addr %p p %d\n", rxF,p);
printf("dl_ch addr %p nushift %d\n",dl_ch,nushift);
#endif
//if ((ue->frame_parms.N_RB_DL&1)==0) {
if (config_type == pdsch_dmrs_type1) {
// Treat first 2 pilots specially (left edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
@@ -867,7 +921,6 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
ch,
dl_ch,
8);
//}
// check if PRB crosses DC and improve estimates around DC
if ((bwp_start_subcarrier < ue->frame_parms.ofdm_symbol_size) && (bwp_start_subcarrier+nb_rb_pdsch*12 >= ue->frame_parms.ofdm_symbol_size)) {
@@ -875,7 +928,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
uint16_t idxDC = 2*(ue->frame_parms.ofdm_symbol_size - bwp_start_subcarrier);
uint16_t idxPil = idxDC/2;
re_offset = k;
pil = (int16_t *)&pilot[rb_offset*((config_type==0) ? 6:4)];
pil = (int16_t *)&pilot[rb_offset*((config_type==pdsch_dmrs_type1) ? 6:4)];
pil += (idxPil-2);
dl_ch += (idxDC-4);
dl_ch = memset(dl_ch, 0, sizeof(int16_t)*10);
@@ -920,20 +973,394 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
dl_ch,
8);
}
}
} else { //pdsch_dmrs_type2 |dmrs_r,dmrs_l,0,0,0,0,dmrs_r,dmrs_l,0,0,0,0|
// Treat first 4 pilots specially (left edge)
ch_l[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch_l[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PDSCH
printf("ch 0 %d\n",((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1]));
printf("pilot 0 : rxF - > (%d,%d) addr %p ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],&rxF[0],ch_l[0],ch_l[1],pil[0],pil[1]);
#endif
pil+=2;
re_offset = (re_offset+1) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch_r[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch_r[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
ch[0] = (ch_l[0]+ch_r[0])>>1;
ch[1] = (ch_l[1]+ch_r[1])>>1;
dl_ch[(0+2*nushift)] = ch[0];
dl_ch[(1+2*nushift)] = ch[1];
dl_ch[2+2*nushift] = ch[0];
dl_ch[3+2*nushift] = ch[1];
multadd_real_vector_complex_scalar(fl,
ch,
dl_ch,
8);
pil+=2;
re_offset = (re_offset+5) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch_l[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch_l[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
pil+=2;
re_offset = (re_offset+1) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch_r[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch_r[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
ch[0] = (ch_l[0]+ch_r[0])>>1;
ch[1] = (ch_l[1]+ch_r[1])>>1;
multadd_real_vector_complex_scalar(fr,
ch,
dl_ch,
8);
dl_ch+=12;
dl_ch[0+2*nushift] = ch[0];
dl_ch[1+2*nushift] = ch[1];
dl_ch[2+2*nushift] = ch[0];
dl_ch[3+2*nushift] = ch[1];
dl_ch+=4;
for (pilot_cnt=4; pilot_cnt<4*nb_rb_pdsch; pilot_cnt+=4) {
multadd_real_vector_complex_scalar(fml,
ch,
dl_ch,
8);
pil+=2;
re_offset = (re_offset+5) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch_l[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch_l[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PDSCH
printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch_l[0],ch_l[1],pil[0],pil[1]);
#endif
pil+=2;
re_offset = (re_offset+1) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch_r[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch_r[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
ch[0] = (ch_l[0]+ch_r[0])>>1;
ch[1] = (ch_l[1]+ch_r[1])>>1;
#ifdef DEBUG_PDSCH
printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],ch_r[0],ch_r[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fmr,
ch,
dl_ch,
8);
dl_ch+=8;
dl_ch[0+2*nushift] = ch[0];
dl_ch[1+2*nushift] = ch[1];
dl_ch[2+2*nushift] = ch[0];
dl_ch[3+2*nushift] = ch[1];
multadd_real_vector_complex_scalar(fm,
ch,
dl_ch,
8);
pil+=2;
re_offset = (re_offset+5) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch_l[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch_l[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
pil+=2;
re_offset = (re_offset+1) % ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+nushift+re_offset)];
ch_r[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch_r[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PDSCH
printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],ch_r[0],ch_r[1],pil[0],pil[1]);
#endif
ch[0] = (ch_l[0]+ch_r[0])>>1;
ch[1] = (ch_l[1]+ch_r[1])>>1;
multadd_real_vector_complex_scalar(fmm,
ch,
dl_ch,
8);
dl_ch+=12;
dl_ch[0+2*nushift] = ch[0];
dl_ch[1+2*nushift] = ch[1];
dl_ch[2+2*nushift] = ch[0];
dl_ch[3+2*nushift] = ch[1];
dl_ch+=4;
}
// Treat last 2 pilots specially (right edge)
// dl_ch-2+nushift<<1
multadd_real_vector_complex_scalar(frl,
dl_ch-2+2*nushift,
dl_ch,
8);
multadd_real_vector_complex_scalar(frr,
dl_ch-14+2*nushift,/*14*/
dl_ch,
8);
// check if PRB crosses DC and improve estimates around DC
if ((bwp_start_subcarrier < ue->frame_parms.ofdm_symbol_size) && (bwp_start_subcarrier+nb_rb_pdsch*12 >= ue->frame_parms.ofdm_symbol_size) && (p<2)) {
dl_ch = (int16_t *)&dl_ch_estimates[p*ue->frame_parms.nb_antennas_rx+aarx][ch_offset];
uint16_t idxDC = 2*(ue->frame_parms.ofdm_symbol_size - bwp_start_subcarrier);
dl_ch += (idxDC-8);
dl_ch = memset(dl_ch, 0, sizeof(int16_t)*20);
dl_ch -= 2;
ch_r[0] = dl_ch[0];
ch_r[1]= dl_ch[1] ;
dl_ch += 22;
ch_l[0] = dl_ch[0];
ch_l[1]= dl_ch[1] ;
// for proper allignment of SIMD vectors
if((ue->frame_parms.N_RB_DL&1)==0) {
dl_ch -= 20;
//Interpolate fdcrl1 with ch_r
multadd_real_vector_complex_scalar(filt8_dcrl1,
ch_r,
dl_ch,
8);
//Interpolate fdclh1 with ch_l
multadd_real_vector_complex_scalar(filt8_dclh1,
ch_l,
dl_ch,
8);
dl_ch += 16;
//Interpolate fdcrh1 with ch_r
multadd_real_vector_complex_scalar(filt8_dcrh1,
ch_r,
dl_ch,
8);
//Interpolate fdcll1 with ch_l
multadd_real_vector_complex_scalar(filt8_dcll1,
ch_l,
dl_ch,
8);
} else {
dl_ch -= 28;
//Interpolate fdcrl1 with ch_r
multadd_real_vector_complex_scalar(filt8_dcrl2,
ch_r,
dl_ch,
8);
//Interpolate fdclh1 with ch_l
multadd_real_vector_complex_scalar(filt8_dclh2,
ch_l,
dl_ch,
8);
dl_ch += 16;
//Interpolate fdcrh1 with ch_r
multadd_real_vector_complex_scalar(filt8_dcrh2,
ch_r,
dl_ch,
8);
//Interpolate fdcll1 with ch_l
multadd_real_vector_complex_scalar(filt8_dcll2,
ch_l,
dl_ch,
8);
}
}
}
#ifdef DEBUG_PDSCH
dl_ch = (int16_t *)&dl_ch_estimates[aarx][ch_offset];
dl_ch = (int16_t *)&dl_ch_estimates[p*ue->frame_parms.nb_antennas_rx+aarx][ch_offset];
for(uint16_t idxP=0; idxP<ceil((float)nb_rb_pdsch*12/8); idxP++) {
for(uint8_t idxI=0; idxI<16; idxI+=2) {
printf("%d\t%d\t",dl_ch[idxP*16+idxI],dl_ch[idxP*16+idxI+1]);
}
printf("%d\n",idxP);
}
#endif
#endif
}
return(0);
}
/*******************************************************************
*
* NAME : nr_pdsch_ptrs_processing
*
* PARAMETERS : ue : ue data structure
* NR_UE_PDSCH : pdsch_vars pointer
* NR_DL_FRAME_PARMS : frame_parms pointer
* NR_DL_UE_HARQ_t : dlsch0_harq pointer
* NR_DL_UE_HARQ_t : dlsch1_harq pointer
* uint8_t : eNB_id,
* uint8_t : nr_slot_rx,
* unsigned char : symbol,
* uint32_t : nb_re_pdsch,
* unsigned char : harq_pid
* uint16_t : rnti
* RX_type_t : rx_type
* RETURN : Nothing
*
* DESCRIPTION :
* If ptrs is enabled process the symbol accordingly
* 1) Estimate common phase error per PTRS symbol
* 2) Interpolate PTRS estimated value in TD after all PTRS symbols
* 3) Compensate signal with PTRS estimation for slot
*********************************************************************/
void nr_pdsch_ptrs_processing(PHY_VARS_NR_UE *ue,
NR_UE_PDSCH **pdsch_vars,
NR_DL_FRAME_PARMS *frame_parms,
NR_DL_UE_HARQ_t *dlsch0_harq,
NR_DL_UE_HARQ_t *dlsch1_harq,
uint8_t eNB_id,
uint8_t nr_slot_rx,
unsigned char symbol,
uint32_t nb_re_pdsch,
unsigned char harq_pid,
uint16_t rnti,
RX_type_t rx_type)
{
//#define DEBUG_DL_PTRS 1
int16_t *phase_per_symbol = NULL;
int32_t *ptrs_re_symbol = NULL;
int8_t ret = 0;
/* harq specific variables */
uint8_t symbInSlot = 0;
uint16_t *startSymbIndex = NULL;
uint16_t *nbSymb = NULL;
uint8_t *L_ptrs = NULL;
uint8_t *K_ptrs = NULL;
uint16_t *dmrsSymbPos = NULL;
uint16_t *ptrsSymbPos = NULL;
uint8_t *ptrsSymbIdx = NULL;
uint8_t *ptrsReOffset = NULL;
uint8_t *dmrsConfigType = NULL;
uint16_t *nb_rb = NULL;
if(dlsch0_harq->status == ACTIVE) {
symbInSlot = dlsch0_harq->start_symbol + dlsch0_harq->nb_symbols;
startSymbIndex = &dlsch0_harq->start_symbol;
nbSymb = &dlsch0_harq->nb_symbols;
L_ptrs = &dlsch0_harq->PTRSTimeDensity;
K_ptrs = &dlsch0_harq->PTRSFreqDensity;
dmrsSymbPos = &dlsch0_harq->dlDmrsSymbPos;
ptrsSymbPos = &dlsch0_harq->ptrs_symbols;
ptrsSymbIdx = &dlsch0_harq->ptrs_symbol_index;
ptrsReOffset = &dlsch0_harq->PTRSReOffset;
dmrsConfigType = &dlsch0_harq->ptrs_symbol_index;
nb_rb = &dlsch0_harq->nb_rb;
}
if(dlsch1_harq) {
symbInSlot = dlsch1_harq->start_symbol + dlsch0_harq->nb_symbols;
startSymbIndex = &dlsch1_harq->start_symbol;
nbSymb = &dlsch1_harq->nb_symbols;
L_ptrs = &dlsch1_harq->PTRSTimeDensity;
K_ptrs = &dlsch1_harq->PTRSFreqDensity;
dmrsSymbPos = &dlsch1_harq->dlDmrsSymbPos;
ptrsSymbPos = &dlsch1_harq->ptrs_symbols;
ptrsSymbIdx = &dlsch1_harq->ptrs_symbol_index;
ptrsReOffset = &dlsch1_harq->PTRSReOffset;
dmrsConfigType = &dlsch1_harq->ptrs_symbol_index;
nb_rb = &dlsch1_harq->nb_rb;
}
/* loop over antennas */
for (int aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
phase_per_symbol = (int16_t*)pdsch_vars[eNB_id]->ptrs_phase_per_slot[aarx];
ptrs_re_symbol = (int32_t*)pdsch_vars[eNB_id]->ptrs_re_per_slot[aarx];
ptrs_re_symbol[symbol] = 0;
phase_per_symbol[(2*symbol)+1] = 0; // Imag
/* set DMRS estimates to 0 angle with magnitude 1 */
if(is_dmrs_symbol(symbol,*dmrsSymbPos)) {
/* set DMRS real estimation to 32767 */
phase_per_symbol[2*symbol]=(int16_t)((1<<15)-1); // 32767
#ifdef DEBUG_DL_PTRS
printf("[PHY][PTRS]: DMRS Symbol %d -> %4d + j*%4d\n", symbol, phase_per_symbol[2*symbol],phase_per_symbol[(2*symbol)+1]);
#endif
}
else { // real ptrs value is set to 0
phase_per_symbol[2*symbol] = 0; // Real
}
if(dlsch0_harq->status == ACTIVE) {
if(symbol == *startSymbIndex) {
*ptrsSymbPos = 0;
set_ptrs_symb_idx(ptrsSymbPos,
*nbSymb,
*startSymbIndex,
1<< *L_ptrs,
*dmrsSymbPos);
}
/* if not PTRS symbol set current ptrs symbol index to zero*/
*ptrsSymbIdx = 0;
/* Check if current symbol contains PTRS */
if(is_ptrs_symbol(symbol, *ptrsSymbPos)) {
*ptrsSymbIdx = symbol;
/*------------------------------------------------------------------------------------------------------- */
/* 1) Estimate common phase error per PTRS symbol */
/*------------------------------------------------------------------------------------------------------- */
nr_ptrs_cpe_estimation(*K_ptrs,*ptrsReOffset,*dmrsConfigType,*nb_rb,
rnti,
(int16_t *)&pdsch_vars[eNB_id]->dl_ch_ptrs_estimates_ext[aarx][symbol*nb_re_pdsch],
nr_slot_rx,
symbol,frame_parms->ofdm_symbol_size,
(int16_t*)&pdsch_vars[eNB_id]->rxdataF_comp0[aarx][(symbol * nb_re_pdsch)],
ue->nr_gold_pdsch[eNB_id][nr_slot_rx][symbol],
&phase_per_symbol[2* symbol],
&ptrs_re_symbol[symbol]);
}
}// HARQ 0
/* For last OFDM symbol at each antenna perform interpolation and compensation for the slot*/
if(symbol == (symbInSlot -1)) {
/*------------------------------------------------------------------------------------------------------- */
/* 2) Interpolate PTRS estimated value in TD */
/*------------------------------------------------------------------------------------------------------- */
/* If L-PTRS is > 0 then we need interpolation */
if(*L_ptrs > 0) {
ret = nr_ptrs_process_slot(*dmrsSymbPos, *ptrsSymbPos, phase_per_symbol, *startSymbIndex, *nbSymb);
if(ret != 0) {
LOG_W(PHY,"[PTRS] Compensation is skipped due to error in PTRS slot processing !!\n");
}
}
#ifdef DEBUG_DL_PTRS
LOG_M("ptrsEst.m","est",pdsch_vars[eNB_id]->ptrs_phase_per_slot[aarx],frame_parms->symbols_per_slot,1,1 );
LOG_M("rxdataF_bf_ptrs_comp.m","bf_ptrs_cmp",
&pdsch_vars[eNB_id]->rxdataF_comp0[aarx][(*startSymbIndex) * NR_NB_SC_PER_RB * (*nb_rb) ],
(*nb_rb) * NR_NB_SC_PER_RB * (*nbSymb),1,1);
#endif
/*------------------------------------------------------------------------------------------------------- */
/* 3) Compensated DMRS based estimated signal with PTRS estimation */
/*--------------------------------------------------------------------------------------------------------*/
for(uint8_t i = *startSymbIndex; i< symbInSlot ;i++) {
/* DMRS Symbol has 0 phase so no need to rotate the respective symbol */
/* Skip rotation if the slot processing is wrong */
if((!is_dmrs_symbol(i,*dmrsSymbPos)) && (ret == 0)) {
#ifdef DEBUG_DL_PTRS
printf("[PHY][DL][PTRS]: Rotate Symbol %2d with %d + j* %d\n", i, phase_per_symbol[2* i],phase_per_symbol[(2* i) +1]);
#endif
rotate_cpx_vector((int16_t*)&pdsch_vars[eNB_id]->rxdataF_comp0[aarx][(i * (*nb_rb) * NR_NB_SC_PER_RB)],
&phase_per_symbol[2* i],
(int16_t*)&pdsch_vars[eNB_id]->rxdataF_comp0[aarx][(i * (*nb_rb) * NR_NB_SC_PER_RB)],
((*nb_rb) * NR_NB_SC_PER_RB), 15);
}// if not DMRS Symbol
}// symbol loop
}// last symbol check
}//Antenna loop
}//main function
+20 -2
View File
@@ -43,6 +43,7 @@
\param symbol symbol within frame
*/
int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
@@ -50,6 +51,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned short nb_rb_coreset);
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
@@ -57,6 +59,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
NR_UE_SSB *current_ssb);
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
@@ -65,6 +68,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t n_hf);
int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned short p,
@@ -81,6 +85,7 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
short coef);
void nr_ue_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned int subframe_offset,
unsigned char N0_symbol,
unsigned char abstraction_flag,
@@ -88,8 +93,9 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
uint8_t subframe);
void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
uint8_t slot,
uint8_t abstraction_flag);
UE_nr_rxtx_proc_t *proc,
uint8_t slot,
uint8_t abstraction_flag);
void phy_adjust_gain_nr(PHY_VARS_NR_UE *ue,
uint32_t rx_power_fil_dB,
@@ -97,6 +103,18 @@ void phy_adjust_gain_nr(PHY_VARS_NR_UE *ue,
int16_t get_nr_PL(uint8_t Mod_id, uint8_t CC_id, uint8_t gNB_index);
void nr_pdsch_ptrs_processing(PHY_VARS_NR_UE *ue,
NR_UE_PDSCH **pdsch_vars,
NR_DL_FRAME_PARMS *frame_parms,
NR_DL_UE_HARQ_t *dlsch0_harq,
NR_DL_UE_HARQ_t *dlsch1_harq,
uint8_t eNB_id,
uint8_t nr_slot_rx,
unsigned char symbol,
uint32_t nb_re_pdsch,
unsigned char harq_pid,
uint16_t rnti,
RX_type_t rx_type);
float_t get_nr_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t gNB_index);
@@ -107,11 +107,12 @@ float_t get_nr_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t gNB_index)
void nr_ue_measurements(PHY_VARS_NR_UE *ue,
unsigned int subframe_offset,
unsigned char N0_symbol,
unsigned char abstraction_flag,
unsigned char rank_adaptation,
uint8_t subframe)
UE_nr_rxtx_proc_t *proc,
unsigned int subframe_offset,
unsigned char N0_symbol,
unsigned char abstraction_flag,
unsigned char rank_adaptation,
uint8_t subframe)
{
int aarx,aatx,eNB_id=0; //,gain_offset=0;
//int rx_power[NUMBER_OF_CONNECTED_eNB_MAX];
@@ -131,7 +132,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
ue->measurements.nb_antennas_rx = frame_parms->nb_antennas_rx;
/*int16_t *dl_ch;
dl_ch = (int16_t *)&ue->pdsch_vars[ue->current_thread_id[subframe]][0]->dl_ch_estimates[eNB_id][ch_offset];*/
dl_ch = (int16_t *)&ue->pdsch_vars[proc->thread_id][0]->dl_ch_estimates[eNB_id][ch_offset];*/
ch_offset = ue->frame_parms.ofdm_symbol_size*2;
@@ -142,7 +143,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++) {
ue->measurements.rx_spatial_power[eNB_id][aatx][aarx] =
(signal_energy_nodc(&ue->pdsch_vars[ue->current_thread_id[subframe]][0]->dl_ch_estimates[eNB_id][ch_offset],
(signal_energy_nodc(&ue->pdsch_vars[proc->thread_id][0]->dl_ch_estimates[eNB_id][ch_offset],
(50*12)));
//- ue->measurements.n0_power[aarx];
@@ -224,6 +225,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
}
void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t slot,
uint8_t abstraction_flag)
{
@@ -234,7 +236,7 @@ void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset=0,l,nushift;
uint16_t off,nb_rb;
// NR_UE_MAC_INST_t *mac = get_mac_inst(0);
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[slot]].rxdataF;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
nushift = ue->frame_parms.Nid_cell%4;
ue->frame_parms.nushift = nushift;
+48 -46
View File
@@ -665,12 +665,13 @@ void pdcch_siso(NR_DL_FRAME_PARMS *frame_parms,
#ifdef NR_PDCCH_DCI_RUN
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
uint32_t frame,
uint32_t slot) {
UE_nr_rxtx_proc_t *proc) {
uint32_t frame = proc->frame_rx;
uint32_t slot = proc->nr_slot_rx;
NR_UE_COMMON *common_vars = &ue->common_vars;
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[slot]][0];
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][0];
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15;
uint8_t log2_maxh, aarx;
@@ -684,7 +685,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
for (int s=rel15->coreset.StartSymbolIndex; s<(rel15->coreset.StartSymbolIndex+rel15->coreset.duration); s++) {
LOG_D(PHY,"in nr_pdcch_extract_rbs_single(rxdataF -> rxdataF_ext || dl_ch_estimates -> dl_ch_estimates_ext)\n");
nr_pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[slot]].rxdataF,
nr_pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF,
pdcch_vars->dl_ch_estimates,
pdcch_vars->rxdataF_ext,
pdcch_vars->dl_ch_estimates_ext,
@@ -776,8 +777,9 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
#endif
void pdcch_scrambling(NR_DL_FRAME_PARMS *frame_parms,
uint8_t nr_tti_rx,
#if 0
void nr_pdcch_scrambling(NR_DL_FRAME_PARMS *frame_parms,
uint8_t nr_slot_rx,
uint8_t *e,
uint32_t length) {
int i;
@@ -785,7 +787,7 @@ void pdcch_scrambling(NR_DL_FRAME_PARMS *frame_parms,
uint32_t x1, x2, s=0;
reset = 1;
// x1 is set in lte_gold_generic
x2 = (nr_tti_rx<<9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.8.2
x2 = (nr_slot_rx<<9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.8.2
for (i=0; i<length; i++) {
if ((i&0x1f)==0) {
@@ -799,6 +801,7 @@ void pdcch_scrambling(NR_DL_FRAME_PARMS *frame_parms,
e[i] = (e[i]&1) ^ ((s>>(i&0x1f))&1);
}
}
#endif
#ifdef NR_PDCCH_DCI_RUN
@@ -836,11 +839,10 @@ void nr_pdcch_unscrambling(int16_t *z,
#ifdef NR_PDCCH_DCI_RUN
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
int frame,
int slot,
fapi_nr_dci_indication_t *dci_ind) {
UE_nr_rxtx_proc_t *proc,
fapi_nr_dci_indication_t *dci_ind) {
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[slot]][0];
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][0];
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15;
for (int i=0;i<pdcch_vars->nb_search_space;i++) {
@@ -881,8 +883,8 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
if (crc == n_rnti) {
LOG_D(PHY,"Decoded crc %x matches rnti %x for DCI format %d\n", crc, n_rnti, rel15->dci_format_options[k]);
dci_ind->SFN = frame;
dci_ind->slot = slot;
dci_ind->SFN = proc->frame_rx;
dci_ind->slot = proc->nr_slot_rx;
dci_ind->dci_list[dci_ind->number_of_dcis].rnti = n_rnti;
dci_ind->dci_list[dci_ind->number_of_dcis].n_CCE = CCEind;
dci_ind->dci_list[dci_ind->number_of_dcis].dci_format = rel15->dci_format_options[k];
@@ -906,7 +908,7 @@ void nr_dci_decoding_procedure0(int s,
uint16_t coreset_nbr_rb,
NR_UE_PDCCH **pdcch_vars,
int do_common,
uint8_t nr_tti_rx,
uint8_t nr_slot_rx,
NR_DCI_ALLOC_t *dci_alloc,
int16_t eNB_id,
uint8_t current_thread_id,
@@ -941,7 +943,7 @@ void nr_dci_decoding_procedure0(int s,
LOG_DDD("format_found is %d \n", *format_found);
//if (mode == NO_DCI) {
// #ifdef NR_PDCCH_DCI_DEBUG
// LOG_DDD("skip DCI decoding: expect no DCIs at nr_tti_rx %d in current searchSpace\n", nr_tti_rx);
// LOG_DDD("skip DCI decoding: expect no DCIs at nr_slot_rx %d in current searchSpace\n", nr_slot_rx);
// #endif
// return;
//}
@@ -975,8 +977,8 @@ void nr_dci_decoding_procedure0(int s,
// }
// if (mode == NO_DCI) {
// LOG_D(PHY, "skip DCI decoding: expect no DCIs at nr_tti_rx %d\n",
// nr_tti_rx);
// LOG_D(PHY, "skip DCI decoding: expect no DCIs at nr_slot_rx %d\n",
// nr_slot_rx);
// return;
// }
@@ -1047,7 +1049,7 @@ void nr_dci_decoding_procedure0(int s,
// compute Yk
Yk = (unsigned int) pdcch_vars[eNB_id]->crnti;
for (i = 0; i <= nr_tti_rx; i++)
for (i = 0; i <= nr_slot_rx; i++)
Yk = (Yk * A[p%3]) % 65537;
}
@@ -1316,7 +1318,7 @@ void nr_dci_decoding_procedure0(int s,
}
// store first nCCE of group for PUCCH transmission of ACK/NAK
pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
pdcch_vars[eNB_id]->nCCE[nr_slot_rx] = CCEind;
// if (crc == si_rnti) {
// dci_alloc[*dci_cnt].format = format_si;
@@ -1327,7 +1329,7 @@ void nr_dci_decoding_procedure0(int s,
// } else if (crc == ra_rnti) {
// dci_alloc[*dci_cnt].format = format_ra;
// // store first nCCE of group for PUCCH transmission of ACK/NAK
// pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
// pdcch_vars[eNB_id]->nCCE[nr_slot_rx] = CCEind;
// *dci_cnt = *dci_cnt + 1;
// } else if (crc == pdcch_vars[eNB_id]->crnti) {
@@ -1338,23 +1340,23 @@ void nr_dci_decoding_procedure0(int s,
// dci_alloc[*dci_cnt].format = format0;
// *format0_found = 1;
// *dci_cnt = *dci_cnt + 1;
// pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
// pdcch_vars[eNB_id]->nCCE[nr_slot_rx] = CCEind;
// }
// } else if (format_c == format0) { // this is a format 1A DCI
// dci_alloc[*dci_cnt].format = format1A;
// *dci_cnt = *dci_cnt + 1;
// pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
// pdcch_vars[eNB_id]->nCCE[nr_slot_rx] = CCEind;
// } else {
// // store first nCCE of group for PUCCH transmission of ACK/NAK
// if (*format_c_found == 0) {
// dci_alloc[*dci_cnt].format = format_c;
// *dci_cnt = *dci_cnt + 1;
// *format_c_found = 1;
// pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
// pdcch_vars[eNB_id]->nCCE[nr_slot_rx] = CCEind;
// }
// }
// }
//LOG_I(PHY,"DCI decoding CRNTI [format: %d, nCCE[nr_tti_rx: %d]: %d ], AggregationLevel %d \n",format_c, nr_tti_rx, pdcch_vars[eNB_id]->nCCE[nr_tti_rx],L2);
//LOG_I(PHY,"DCI decoding CRNTI [format: %d, nCCE[nr_slot_rx: %d]: %d ], AggregationLevel %d \n",format_c, nr_slot_rx, pdcch_vars[eNB_id]->nCCE[nr_slot_rx],L2);
// memcpy(&dci_alloc[*dci_cnt].dci_pdu[0],dci_decoded_output,sizeof_bytes);
switch (1 << L) {
case 1:
@@ -1421,7 +1423,7 @@ uint8_t nr_dci_decoding_procedure(int s,
NR_DCI_ALLOC_t *dci_alloc,
NR_SEARCHSPACE_TYPE_t searchSpacetype,
int16_t eNB_id,
uint8_t nr_tti_rx,
uint8_t nr_slot_rx,
uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
@@ -1429,16 +1431,16 @@ uint8_t nr_dci_decoding_procedure(int s,
format_found_t *format_found,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]) {
// uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
LOG_DD("(nr_dci_decoding_procedure) nr_tti_rx=%d n_RB_ULBWP=%d n_RB_DLBWP=%d format_found=%d\n",
nr_tti_rx,n_RB_ULBWP,n_RB_DLBWP,*format_found);
LOG_DD("(nr_dci_decoding_procedure) nr_slot_rx=%d n_RB_ULBWP=%d n_RB_DLBWP=%d format_found=%d\n",
nr_slot_rx,n_RB_ULBWP,n_RB_DLBWP,*format_found);
int do_common = (int)searchSpacetype;
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS];
crc_scrambled_t crc_scrambled_ = *crc_scrambled;
format_found_t format_found_ = *format_found;
uint8_t dci_cnt = 0, old_dci_cnt = 0;
uint32_t CCEmap0 = 0, CCEmap1 = 0, CCEmap2 = 0;
NR_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]];
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id];
NR_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_slot_rx]];
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id];
uint16_t pdcch_DMRS_scrambling_id = pdcch_vars2->coreset[p].pdcchDMRSScramblingID;
uint64_t coreset_freq_dom = pdcch_vars2->coreset[p].frequencyDomainResources;
int coreset_time_dur = pdcch_vars2->coreset[p].duration;
@@ -1452,7 +1454,7 @@ uint8_t nr_dci_decoding_procedure(int s,
coreset_nbr_rb = 6 * coreset_nbr_rb;
// coreset_time_dur,coreset_nbr_rb,
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
//uint8_t mi;// = get_mi(&ue->frame_parms, nr_tti_rx);
//uint8_t mi;// = get_mi(&ue->frame_parms, nr_slot_rx);
//uint8_t tmode = ue->transmission_mode[eNB_id];
//uint8_t frame_type = frame_parms->frame_type;
uint8_t format_0_0_1_0_size_bits = 0, format_0_0_1_0_size_bytes = 0; //FIXME
@@ -1487,7 +1489,7 @@ uint8_t nr_dci_decoding_procedure(int s,
* Possible overlap between RE for SS/PBCH blocks (described in section 10, 38.213) has not been implemented yet
* This can be implemented by setting variable 'mode = NO_DCI' when overlap occurs
*/
//dci_detect_mode_t mode = 3; //dci_detect_mode_select(&ue->frame_parms, nr_tti_rx);
//dci_detect_mode_t mode = 3; //dci_detect_mode_select(&ue->frame_parms, nr_slot_rx);
LOG_DD("searSpaceType=%d\n",do_common);
LOG_DD("%s_dci_format=%d\n",do_common?"uss":"css",css_dci_format);
@@ -1517,7 +1519,7 @@ uint8_t nr_dci_decoding_procedure(int s,
// blind decoding (Type0-PDCCH,Type0A-PDCCH,Type1-PDCCH,Type2-PDCCH)
// for format0_0 => we are NOT implementing format0_0 for common search spaces. FIXME!
// for format0_0 and format1_0, first we calculate dci pdu size
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0);
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0);
format_0_0_1_0_size_bytes = (format_0_0_1_0_size_bits%8 == 0) ? (uint8_t)floor(format_0_0_1_0_size_bits/8) : (uint8_t)(floor(format_0_0_1_0_size_bits/8) + 1);
LOG_DD("calculating dci format size for common searchSpaces with format css_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
@@ -1528,7 +1530,7 @@ uint8_t nr_dci_decoding_procedure(int s,
LOG_DD("common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<aggregationLevel));
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_slot_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_slot_rx], frame_parms,
crc_scrambled_values, aggregationLevel,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
@@ -1537,7 +1539,7 @@ uint8_t nr_dci_decoding_procedure(int s,
if (dci_cnt != old_dci_cnt) {
// we will exit the loop as we have found the DCI
aggregationLevel = 5;
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,crc_scrambled_,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,crc_scrambled_,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,
0); // after decoding dci successfully we recalculate dci pdu size with correct crc scrambled to get the right field sizes
old_dci_cnt = dci_cnt;
@@ -1552,7 +1554,7 @@ uint8_t nr_dci_decoding_procedure(int s,
// or TPC-PUSCH-RNTI, or TPC-PUCCH-RNTI, or TPC-SRS-RNTI, or C-RNTI, or CS-RNTI(s), or SP-CSI-RNTI
if (css_dci_format == cformat2_0) {
// for format2_0, first we calculate dci pdu size
format_2_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_sfi_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,4);
format_2_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,_sfi_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,4);
format_2_0_size_bytes = (format_2_0_size_bits%8 == 0) ? (uint8_t)floor(format_2_0_size_bits/8) : (uint8_t)(floor(format_2_0_size_bits/8) + 1);
LOG_DD("calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_0_size_bits=%d, format2_0_size_bytes=%d\n",
css_dci_format,format_2_0_size_bits,format_2_0_size_bytes);
@@ -1562,7 +1564,7 @@ uint8_t nr_dci_decoding_procedure(int s,
css_dci_format,(1<<aggregationLevelSFI));
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_slot_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_slot_rx], frame_parms,
crc_scrambled_values, aggregationLevelSFI,
cformat2_0, uformat0_0_and_1_0,
format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
@@ -1582,7 +1584,7 @@ uint8_t nr_dci_decoding_procedure(int s,
if (css_dci_format == cformat2_1) {
// for format2_1, first we calculate dci pdu size
format_2_1_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_int_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,5);
format_2_1_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,_int_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,5);
format_2_1_size_bytes = (format_2_1_size_bits%8 == 0) ? (uint8_t)floor(format_2_1_size_bits/8) : (uint8_t)(floor(format_2_1_size_bits/8) + 1);
LOG_DD("calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_1_size_bits=%d, format2_1_size_bytes=%d\n",
css_dci_format,format_2_1_size_bits,format_2_1_size_bytes);
@@ -1592,7 +1594,7 @@ uint8_t nr_dci_decoding_procedure(int s,
css_dci_format,(1<<aggregationLevel));
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_slot_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_slot_rx], frame_parms,
crc_scrambled_values, aggregationLevel,
cformat2_1, uformat0_0_and_1_0,
format_2_1_size_bits, format_2_1_size_bytes, &dci_cnt,
@@ -1612,7 +1614,7 @@ uint8_t nr_dci_decoding_procedure(int s,
if (css_dci_format == cformat2_2) {
// for format2_2, first we calculate dci pdu size
format_2_2_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_tpc_pucch_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,6);
format_2_2_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,_tpc_pucch_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,6);
format_2_2_size_bytes = (format_2_2_size_bits%8 == 0) ? (uint8_t)floor(format_2_2_size_bits/8) : (uint8_t)(floor(format_2_2_size_bits/8) + 1);
LOG_DD("calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_2_size_bits=%d, format2_2_size_bytes=%d\n",
css_dci_format,format_2_2_size_bits,format_2_2_size_bytes);
@@ -1622,7 +1624,7 @@ uint8_t nr_dci_decoding_procedure(int s,
css_dci_format,(1<<aggregationLevel));
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_slot_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_slot_rx], frame_parms,
crc_scrambled_values, aggregationLevel,
cformat2_2, uformat0_0_and_1_0,
format_2_2_size_bits, format_2_2_size_bytes, &dci_cnt,
@@ -1642,7 +1644,7 @@ uint8_t nr_dci_decoding_procedure(int s,
if (css_dci_format == cformat2_3) {
// for format2_1, first we calculate dci pdu size
format_2_3_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_tpc_srs_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,7);
format_2_3_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,_tpc_srs_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,7);
format_2_3_size_bytes = (format_2_3_size_bits%8 == 0) ? (uint8_t)floor(format_2_3_size_bits/8) : (uint8_t)(floor(format_2_3_size_bits/8) + 1);
LOG_DD("calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_3_size_bits=%d, format2_3_size_bytes=%d\n",
css_dci_format,format_2_3_size_bits,format_2_3_size_bytes);
@@ -1652,7 +1654,7 @@ uint8_t nr_dci_decoding_procedure(int s,
css_dci_format,(1<<aggregationLevel));
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_slot_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_slot_rx], frame_parms,
crc_scrambled_values, aggregationLevel,
cformat2_3, uformat0_0_and_1_0,
format_2_3_size_bits, format_2_3_size_bytes, &dci_cnt,
@@ -1673,7 +1675,7 @@ uint8_t nr_dci_decoding_procedure(int s,
// UE-specific search space for a DCI format with CRC scrambled by C-RNTI, or CS-RNTI(s), or SP-CSI-RNTI
if (uss_dci_format == uformat0_0_and_1_0) {
// for format0_0 and format1_0, first we calculate dci pdu size
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0);
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0);
format_0_0_1_0_size_bytes = (format_0_0_1_0_size_bits%8 == 0) ? (uint8_t)floor(format_0_0_1_0_size_bits/8) : (uint8_t)(floor(format_0_0_1_0_size_bits/8) + 1);
LOG_DD("calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
@@ -1684,7 +1686,7 @@ uint8_t nr_dci_decoding_procedure(int s,
LOG_DD("common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<aggregationLevel));
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_slot_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_slot_rx], frame_parms,
crc_scrambled_values, aggregationLevel,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
@@ -1704,7 +1706,7 @@ uint8_t nr_dci_decoding_procedure(int s,
if (uss_dci_format == uformat0_1_and_1_1) {
// for format0_0 and format1_0, first we calculate dci pdu size
format_0_1_1_1_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,1);
format_0_1_1_1_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,1);
format_0_1_1_1_size_bytes = (format_0_1_1_1_size_bits%8 == 0) ? (uint8_t)floor(format_0_1_1_1_size_bits/8) : (uint8_t)(floor(format_0_1_1_1_size_bits/8) + 1);
LOG_DD("calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format_0_1_1_1_size_bits=%d, format_0_1_1_1_size_bytes=%d\n",
css_dci_format,format_0_1_1_1_size_bits,format_0_1_1_1_size_bytes);
@@ -1715,7 +1717,7 @@ uint8_t nr_dci_decoding_procedure(int s,
LOG_DD("common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<aggregationLevel));
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_slot_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_slot_rx], frame_parms,
crc_scrambled_values, aggregationLevel,
cformat0_0_and_1_0, uformat0_1_and_1_1,
format_0_1_1_1_size_bits, format_0_1_1_1_size_bytes, &dci_cnt,
@@ -218,16 +218,18 @@ void nr_dlsch_unscrambling(int16_t* llr,
}
uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag)
UE_nr_rxtx_proc_t *proc,
int eNB_id,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_slot_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag)
{
#if UE_TIMING_TRACE
@@ -277,7 +279,6 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
nb_re_dmrs = 4*harq_process->n_dmrs_cdm_groups;
}
uint16_t dmrs_length = get_num_dmrs(harq_process->dlDmrsSymbPos);
AssertFatal(dmrs_length == 1 || dmrs_length == 2,"Illegal dmrs_length %d\n",dmrs_length);
uint32_t i,j;
@@ -298,14 +299,14 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
return(dlsch->max_ldpc_iterations + 1);
}
/*if (nr_tti_rx> (frame_parms->slots_per_subframe-1)) {
printf("dlsch_decoding.c: Illegal subframe index %d\n",nr_tti_rx);
/*if (nr_slot_rx> (frame_parms->slots_per_frame-1)) {
printf("dlsch_decoding.c: Illegal slot index %d\n",nr_slot_rx);
return(dlsch->max_ldpc_iterations + 1);
}*/
/*if (harq_process->harq_ack.ack != 2) {
LOG_D(PHY, "[UE %d] DLSCH @ SF%d : ACK bit is %d instead of DTX even before PDSCH is decoded!\n",
phy_vars_ue->Mod_id, nr_tti_rx, harq_process->harq_ack.ack);
phy_vars_ue->Mod_id, nr_slot_rx, harq_process->harq_ack.ack);
}*/
// nb_rb = dlsch->nb_rb;
@@ -316,7 +317,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
return(max_ldpc_iterations + 1);
}*/
/*harq_pid = dlsch->current_harq_pid[phy_vars_ue->current_thread_id[subframe]];
/*harq_pid = dlsch->current_harq_pid[proc->thread_id];
if (harq_pid >= 8) {
printf("dlsch_decoding.c: Illegal harq_pid %d\n",harq_pid);
return(max_ldpc_iterations + 1);
@@ -553,7 +554,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
start_meas(dlsch_turbo_decoding_stats);
#endif
//LOG_E(PHY,"AbsSubframe %d.%d Start LDPC segment %d/%d A %d ",frame%1024,nr_tti_rx,r,harq_process->C-1, A);
//LOG_E(PHY,"AbsSubframe %d.%d Start LDPC segment %d/%d A %d ",frame%1024,nr_slot_rx,r,harq_process->C-1, A);
//printf("harq process dr iteration %d\n", p_decParams->numMaxIter);
@@ -646,7 +647,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if ((err_flag == 0) && (ret>=(1+dlsch->max_ldpc_iterations))) {// a Code segment is in error so break;
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_tti_rx,r,harq_process->C-1);
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
err_flag = 1;
}
}
@@ -654,14 +655,14 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if (err_flag == 1) {
//#if UE_DEBUG_TRACE
LOG_D(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_tti_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
phy_vars_ue->Mod_id, frame, nr_slot_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
//#endif
harq_process->harq_ack.ack = 0;
harq_process->harq_ack.harq_id = harq_pid;
harq_process->harq_ack.send_harq_status = 1;
harq_process->errors[harq_process->round]++;
// printf("Rate: [UE %d] DLSCH: Setting NACK for slot %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->round);
// printf("Rate: [UE %d] DLSCH: Setting NACK for slot %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->round);
if (harq_process->round >= dlsch->Mlimit) {
harq_process->status = SCH_IDLE;
harq_process->round = 0;
@@ -670,15 +671,15 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if(is_crnti)
{
LOG_D(PHY,"[UE %d] DLSCH: Setting NACK for nr_tti_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mdlharq,harq_process->TBS);
LOG_D(PHY,"[UE %d] DLSCH: Setting NACK for nr_slot_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mdlharq,harq_process->TBS);
}
return((1 + dlsch->max_ldpc_iterations));
} else {
//#if UE_DEBUG_TRACE
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb, harq_process->round);
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_slot_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb, harq_process->round);
//#endif
harq_process->status = SCH_IDLE;
@@ -692,7 +693,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if(is_crnti)
{
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->round,harq_process->TBS);
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_slot_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->round,harq_process->TBS);
}
//LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
@@ -761,7 +762,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint8_t nr_slot_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag)
@@ -838,14 +839,14 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
return(dlsch->max_ldpc_iterations);
}
/* if (nr_tti_rx> (frame_parms->slots_per_subframe-1)) {
printf("dlsch_decoding.c: Illegal subframe index %d\n",nr_tti_rx);
/* if (nr_slot_rx> (frame_parms->slots_per_frame-1)) {
printf("dlsch_decoding.c: Illegal slot index %d\n",nr_slot_rx);
return(dlsch->max_ldpc_iterations);
}
if (dlsch->harq_ack[nr_tti_rx].ack != 2) {
if (dlsch->harq_ack[nr_slot_rx].ack != 2) {
LOG_D(PHY, "[UE %d] DLSCH @ SF%d : ACK bit is %d instead of DTX even before PDSCH is decoded!\n",
phy_vars_ue->Mod_id, nr_tti_rx, dlsch->harq_ack[nr_tti_rx].ack);
phy_vars_ue->Mod_id, nr_slot_rx, dlsch->harq_ack[nr_slot_rx].ack);
}*/
/*
@@ -854,7 +855,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
return(max_ldpc_iterations);
}*/
/*harq_pid = dlsch->current_harq_pid[phy_vars_ue->current_thread_id[subframe]];
/*harq_pid = dlsch->current_harq_pid[proc->thread_id];
if (harq_pid >= 8) {
printf("dlsch_decoding.c: Illegal harq_pid %d\n",harq_pid);
return(max_ldpc_iterations);
@@ -982,15 +983,16 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
memset(&curMsg->proc, 0, sizeof(curMsg->proc));
curMsg->proc.frame_rx = proc->frame_rx;
curMsg->proc.nr_tti_rx = proc->nr_tti_rx;
curMsg->proc.num_seg = nb_seg;
curMsg->proc.frame_rx = proc->frame_rx;
curMsg->proc.nr_slot_rx = proc->nr_slot_rx;
curMsg->proc.thread_id = proc->thread_id;
curMsg->proc.num_seg = nb_seg;
curMsg->proc.eNB_id= eNB_id;
curMsg->proc.harq_pid=harq_pid;
curMsg->proc.llr8_flag = llr8_flag;
msgToPush_dl->key= (nr_tti_rx%2) ? (nb_seg+30): nb_seg;
msgToPush_dl->key= (nr_slot_rx%2) ? (nb_seg+30): nb_seg;
pushTpool(Tpool_dl, msgToPush_dl);
/*Qm= harq_process->Qm;
@@ -1144,7 +1146,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
#if UE_TIMING_TRACE
start_meas(dlsch_turbo_decoding_stats);
#endif
LOG_D(PHY,"mthread AbsSubframe %d.%d Start LDPC segment %d/%d \n",frame%1024,nr_tti_rx,r,harq_process->C-1);
LOG_D(PHY,"mthread AbsSubframe %d.%d Start LDPC segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
/*for (int cnt =0; cnt < (kc-2)*p_decParams->Z; cnt++){
inv_d[cnt] = (1)*harq_process->d[r][cnt];
@@ -1236,7 +1238,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
if ((err_flag == 0) && (ret>=(1+dlsch->max_ldpc_iterations))) {// a Code segment is in error so break;
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_tti_rx,r,harq_process->C-1);
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
err_flag = 1;
}
//} //loop r
@@ -1244,7 +1246,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
if (err_flag == 1) {
#if UE_DEBUG_TRACE
LOG_D(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_tti_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
phy_vars_ue->Mod_id, frame, nr_slot_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
#endif
harq_process->harq_ack.ack = 0;
harq_process->harq_ack.harq_id = harq_pid;
@@ -1260,15 +1262,15 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
}
if(is_crnti)
{
LOG_D(PHY,"[UE %d] DLSCH: Setting NACK for nr_tti_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mlimit,harq_process->TBS);
LOG_D(PHY,"[UE %d] DLSCH: Setting NACK for nr_slot_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mlimit,harq_process->TBS);
}
return((1+dlsch->max_ldpc_iterations));
} else {
#if UE_DEBUG_TRACE
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb);
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_slot_rx %d TBS %d mcs %d nb_rb %d\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb);
#endif
harq_process->status = SCH_IDLE;
@@ -1281,7 +1283,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
if(is_crnti)
{
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->round,harq_process->TBS);
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_slot_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->round,harq_process->TBS);
}
//LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
@@ -1380,7 +1382,7 @@ void nr_dlsch_decoding_process(void *arg)
__m128i *pl = (__m128i*)&l;
proc->instance_cnt_dlsch_td=-1;
//proc->nr_tti_rx=proc->sub_frame_start;
//proc->nr_slot_rx = proc->sub_frame_start * frame_parms->slots_per_subframe;
proc->decoder_thread_available = 1;
@@ -1404,16 +1406,16 @@ void nr_dlsch_decoding_process(void *arg)
int harq_pid = proc->harq_pid;
llr8_flag1 = proc->llr8_flag;
int frame = proc->frame_rx;
int slot = proc->nr_tti_rx;
int slot = proc->nr_slot_rx;
r = proc->num_seg;
NR_UE_DLSCH_t *dlsch = phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[slot]][eNB_id][0];
NR_UE_DLSCH_t *dlsch = phy_vars_ue->dlsch[proc->thread_id][eNB_id][0];
NR_DL_UE_HARQ_t *harq_process = dlsch->harq_processes[harq_pid];
short *dlsch_llr = phy_vars_ue->pdsch_vars[phy_vars_ue->current_thread_id[slot]][eNB_id]->llr[0];
short *dlsch_llr = phy_vars_ue->pdsch_vars[proc->thread_id][eNB_id]->llr[0];
//printf("2thread0 llr flag %d tdp flag %d\n",llr8_flag1, tdp->llr8_flag);
p_nrLDPC_procBuf = harq_process->p_nrLDPC_procBuf[r];
nb_symb_sch = harq_process->nb_symbols;
printf("dlsch decoding process frame %d slot %d segment %d r %u nb symb %d \n", frame, proc->nr_tti_rx, proc->num_seg, r, harq_process->nb_symbols);
printf("dlsch decoding process frame %d slot %d segment %d r %u nb symb %d \n", frame, proc->nr_slot_rx, proc->num_seg, r, harq_process->nb_symbols);
/*
@@ -1422,7 +1424,7 @@ void nr_dlsch_decoding_process(void *arg)
return(max_ldpc_iterations);
}*/
/*harq_pid = dlsch->current_harq_pid[phy_vars_ue->current_thread_id[subframe]];
/*harq_pid = dlsch->current_harq_pid[proc->thread_id];
if (harq_pid >= 8) {
printf("dlsch_decoding.c: Illegal harq_pid %d\n",harq_pid);
return(max_ldpc_iterations);
File diff suppressed because it is too large Load Diff
+10 -9
View File
@@ -131,7 +131,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini
#endif
// computing correlation between received DMRS symbols and transmitted sequence for current i_ssb and n_hf
for(int i=pbch_initial_symbol; i<pbch_initial_symbol+3;i++)
nr_pbch_dmrs_correlation(ue,0,0,i,i-pbch_initial_symbol,current_ssb);
nr_pbch_dmrs_correlation(ue,proc,0,0,i,i-pbch_initial_symbol,current_ssb);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats);
#endif
@@ -155,7 +155,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini
#endif
// computing channel estimation for selected best ssb
for(int i=pbch_initial_symbol; i<pbch_initial_symbol+3;i++)
nr_pbch_channel_estimation(ue,0,0,i,i-pbch_initial_symbol,temp_ptr->i_ssb,temp_ptr->n_hf);
nr_pbch_channel_estimation(ue,proc,0,0,i,i-pbch_initial_symbol,temp_ptr->i_ssb,temp_ptr->n_hf);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats);
#endif
@@ -286,16 +286,17 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
for(int i=0; i<4;i++)
nr_slot_fep_init_sync(ue,
i,
0,
is*fp->samples_per_frame+ue->ssb_offset,
0);
proc,
i,
0,
is*fp->samples_per_frame+ue->ssb_offset,
0);
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"Calling sss detection (normal CP)\n");
#endif
rx_sss_nr(ue,&metric_tdd_ncp,&phase_tdd_ncp);
rx_sss_nr(ue, proc, &metric_tdd_ncp, &phase_tdd_ncp);
nr_gold_pbch(ue);
ret = nr_pbch_detection(proc, ue,1,mode); // start pbch detection at first symbol after pss
@@ -318,8 +319,8 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
int nb_prefix_samples0 = fp->nb_prefix_samples0;
fp->nb_prefix_samples0 = fp->nb_prefix_samples;
nr_slot_fep(ue,0, 0, ue->ssb_offset, 0, NR_PDCCH_EST);
nr_slot_fep(ue,1, 0, ue->ssb_offset, 0, NR_PDCCH_EST);
nr_slot_fep(ue, proc, 0, 0, ue->ssb_offset, 0, NR_PDCCH_EST);
nr_slot_fep(ue, proc, 1, 0, ue->ssb_offset, 0, NR_PDCCH_EST);
fp->nb_prefix_samples0 = nb_prefix_samples0;
LOG_I(PHY,"[UE %d] AUTOTEST Cell Sync : frame = %d, rx_offset %d, freq_offset %d \n",
+12 -10
View File
@@ -418,12 +418,11 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_PBCH *nr_ue_pbch_vars,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t eNB_id,
uint8_t gNB_id,
uint8_t i_ssb,
MIMO_mode_t mimo_mode,
uint32_t high_speed_flag) {
int Ns = proc->nr_tti_rx;
NR_UE_COMMON *nr_ue_common_vars = &ue->common_vars;
int max_h=0;
int symbol;
@@ -457,15 +456,15 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
#ifdef DEBUG_PBCH
//printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF);
//printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF);
write_output("rxdataF0_pbch.m","rxF0pbch",
&nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[0][(symbol_offset+1)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size*3,1,1);
&nr_ue_common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[0][(symbol_offset+1)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size*3,1,1);
#endif
// symbol refers to symbol within SSB. symbol_offset is the offset of the SSB wrt start of slot
for (symbol=1; symbol<4; symbol++) {
nr_pbch_extract(nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF,
nr_pbch_extract(nr_ue_common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF,
nr_ue_pbch_vars->dl_ch_estimates,
nr_ue_pbch_vars->rxdataF_ext,
nr_ue_pbch_vars->dl_ch_estimates_ext,
@@ -609,11 +608,14 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t rx_ind;
dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
dl_indication.dci_ind = NULL;
dl_indication.proc=proc;
dl_indication.module_id=0;
dl_indication.cc_id=proc->CC_id;
dl_indication.module_id = ue->Mod_id;
dl_indication.gNB_index = gNB_id;
dl_indication.cc_id = proc->CC_id;
dl_indication.frame = proc->frame_rx;
dl_indication.slot = proc->nr_slot_rx;
dl_indication.thread_id = proc->thread_id;
dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
dl_indication.dci_ind = NULL;
rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0]; //not good as it is pointing to a memory that can change
+181 -45
View File
@@ -105,6 +105,8 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
sample_offset_slot = (prachStartSymbol==0?0:fp->ofdm_symbol_size*prachStartSymbol+fp->nb_prefix_samples0+fp->nb_prefix_samples*(prachStartSymbol-1));
prach_start = fp->get_samples_slot_timestamp(slot, fp, 0) + sample_offset_slot;
//printf("prachstartsymbold %d, sample_offset_slot %d, prach_start %d\n",prachStartSymbol, sample_offset_slot, prach_start);
// First compute physical root sequence
/************************************************************************
* 4G and NR NCS tables are slightly different and depend on prach format
@@ -241,6 +243,7 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
*
*********************************************************/
if (mu==1) {
if (fp->N_RB_UL <= 100)
AssertFatal(1 == 0, "N_RB_UL %d not support for NR PRACH yet\n", fp->N_RB_UL);
else if (fp->N_RB_UL < 137) {
@@ -321,6 +324,22 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
}
}
}
}
else if (mu==3) {
if (fp->threequarter_fs)
AssertFatal(1==0,"3/4 sampling not supported for numerology %d\n",mu);
if (prach_sequence_length == 0)
AssertFatal(1==0,"long prach not supported for numerology %d\n",mu);
if (fp->N_RB_UL == 32)
dftlen=512;
else if (fp->N_RB_UL == 66)
dftlen=1024;
else
AssertFatal(1==0,"N_RB_UL %d not support for numerology %d\n",fp->N_RB_UL,mu);
}
for (offset=0,offset2=0; offset<N_ZC; offset++,offset2+=preamble_shift) {
@@ -344,6 +363,7 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
AssertFatal(prach_fmt_id < 4, "Illegal PRACH format %d for sequence length 839\n", prach_fmt_id);
// Ncp here is given in terms of T_s wich is 30.72MHz sampling
switch (prach_fmt_id) {
case 0:
Ncp = 3168;
@@ -401,13 +421,149 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
LOG_D(PHY, "PRACH [UE %d] Ncp %d, dftlen %d \n", Mod_id, Ncp, dftlen);
#endif
if (fp->N_RB_UL <= 100)
AssertFatal(1==0,"N_RB_UL %d not supported for NR PRACH yet\n",fp->N_RB_UL);
//actually what we should be checking here is how often the current prach crosses a 0.5ms boundary. I am not quite sure for which paramter set this would be the case, so I will ignore it for now and just check if the prach starts on a 0.5ms boundary
uint8_t use_extended_prach_prefix = 0;
if(fp->numerology_index == 0) {
if (prachStartSymbol == 0 || prachStartSymbol == 7)
use_extended_prach_prefix = 1;
}
else {
if (slot%(fp->slots_per_subframe/2)==0 && prachStartSymbol == 0)
use_extended_prach_prefix = 1;
}
if (fp->N_RB_UL <= 34) { //32 PRB case 61.44Msps
if (fp->threequarter_fs == 0) {
Ncp<<=1; //to account for 61.44Mbps
// This is after cyclic prefix
prach2 = prach+(Ncp<<1); //times 2 for complex samples
if (prach_sequence_length == 0)
AssertFatal(1==0,"no long PRACH for this PRACH size %d\n",fp->N_RB_UL);
else {
if (use_extended_prach_prefix)
Ncp+=32; // 16*kappa, kappa=2 for 61.44Msps
prach2 = prach+(Ncp<<1); //times 2 for complex samples
if (prach_fmt_id == 4 || prach_fmt_id == 7 || prach_fmt_id == 9) {
idft(IDFT_512,prachF,prach2,1);
// here we have |empty | Prach512 |
if (prach_fmt_id != 9) {
memmove(prach2+(512<<1),prach2,(512<<2));
prach_len = (512*2)+Ncp;
}
else prach_len = (512*1)+Ncp;
memmove(prach,prach+(512<<1),(Ncp<<2));
// here we have |Prefix | Prach512 | Prach512 (if ! 0xc0) |
} else if (prach_fmt_id == 5) { // 6x512
idft(IDFT_512,prachF,prach2,1);
// here we have |empty | Prach512 |
memmove(prach2+(512<<1),prach2,(512<<2));
// here we have |empty | Prach512 | Prach512| empty512 | empty512 |
memmove(prach2+(512<<2),prach2,(512<<3));
// here we have |empty | Prach512 | Prach512| Prach512 | Prach512 |
memmove(prach,prach+(512<<1),(Ncp<<2));
// here we have |Prefix | Prach512 |
prach_len = (512*4)+Ncp;
} else if (prach_fmt_id == 6) { // 6x512
idft(IDFT_512,prachF,prach2,1);
// here we have |empty | Prach512 |
memmove(prach2+(512<<1),prach2,(512<<2));
// here we have |empty | Prach512 | Prach512| empty512 | empty512 | empty512 | empty512
memmove(prach2+(512<<2),prach2,(512<<3));
// here we have |empty | Prach512 | Prach512| Prach512 | Prach512 | empty512 | empty512
memmove(prach2+(512<<3),prach2,(512<<3));
// here we have |empty | Prach512 | Prach512| Prach512 | Prach512 | Prach512 | Prach512
memmove(prach,prach+(512<<1),(Ncp<<2));
// here we have |Prefix | Prach512 |
prach_len = (512*6)+Ncp;
} else if (prach_fmt_id == 8) { // 12x512
idft(IDFT_512,prachF,prach2,1);
// here we have |empty | Prach512 |
memmove(prach2+(512<<1),prach2,(512<<2));
// here we have |empty | Prach512 | Prach512| empty512 | empty512 | empty512 | empty512
memmove(prach2+(512<<2),prach2,(512<<3));
// here we have |empty | Prach512 | Prach512| Prach512 | Prach512 | empty512 | empty512
memmove(prach2+(512<<3),prach2,(512<<3));
// here we have |empty | Prach512 | Prach512| Prach512 | Prach512 | Prach512 | Prach512
memmove(prach2+(512<<1)*6,prach2,(512<<2)*6);
// here we have |empty | Prach512 | Prach512| Prach512 | Prach512 | Prach512 | Prach512 | Prach512 | Prach512| Prach512 | Prach512 | Prach512 | Prach512|
memmove(prach,prach+(512<<1),(Ncp<<2));
// here we have |Prefix | Prach512 | Prach512| Prach512 | Prach512 | Prach512 | Prach512 | Prach512 | Prach512| Prach512 | Prach512 | Prach512 | Prach512|
prach_len = (512*12)+Ncp;
}
}
}
else
AssertFatal(1==0,"3/4 sampling not supported for this PRACH size %d\n",fp->N_RB_UL);
}
else if (fp->N_RB_UL <= 68) {//66 PRB case, 122.88 Msps
if (fp->threequarter_fs == 0) {
Ncp<<=2; //to account for 122.88Mbps
// This is after cyclic prefix
prach2 = prach+(Ncp<<1); //times 2 for complex samples
if (prach_sequence_length == 0)
AssertFatal(1==0,"no long PRACH for this PRACH size %d\n",fp->N_RB_UL);
else {
if (use_extended_prach_prefix)
Ncp+=64; // 16*kappa, kappa=4 for 122.88Msps
prach2 = prach+(Ncp<<1); //times 2 for complex samples
if (prach_fmt_id == 4 || prach_fmt_id == 7 || prach_fmt_id == 9) {
idft(IDFT_1024,prachF,prach2,1);
// here we have |empty | Prach1024 |
if (prach_fmt_id != 9) {
memmove(prach2+(1024<<1),prach2,(1024<<2));
prach_len = (1024*2)+Ncp;
}
else prach_len = (1024*1)+Ncp;
memmove(prach,prach+(1024<<1),(Ncp<<2));
// here we have |Prefix | Prach1024 | Prach1024 (if ! 0xc0) |
} else if (prach_fmt_id == 5) { // 6x1024
idft(IDFT_1024,prachF,prach2,1);
// here we have |empty | Prach1024 |
memmove(prach2+(1024<<1),prach2,(1024<<2));
// here we have |empty | Prach1024 | Prach1024| empty1024 | empty1024 |
memmove(prach2+(1024<<2),prach2,(1024<<3));
// here we have |empty | Prach1024 | Prach1024| Prach1024 | Prach1024 |
memmove(prach,prach+(1024<<1),(Ncp<<2));
// here we have |Prefix | Prach1024 |
prach_len = (1024*4)+Ncp;
} else if (prach_fmt_id == 6) { // 6x1024
idft(IDFT_1024,prachF,prach2,1);
// here we have |empty | Prach1024 |
memmove(prach2+(1024<<1),prach2,(1024<<2));
// here we have |empty | Prach1024 | Prach1024| empty1024 | empty1024 | empty1024 | empty1024
memmove(prach2+(1024<<2),prach2,(1024<<3));
// here we have |empty | Prach1024 | Prach1024| Prach1024 | Prach1024 | empty1024 | empty1024
memmove(prach2+(1024<<3),prach2,(1024<<3));
// here we have |empty | Prach1024 | Prach1024| Prach1024 | Prach1024 | Prach1024 | Prach1024
memmove(prach,prach+(1024<<1),(Ncp<<2));
// here we have |Prefix | Prach1024 |
prach_len = (1024*6)+Ncp;
} else if (prach_fmt_id == 8) { // 12x1024
idft(IDFT_1024,prachF,prach2,1);
// here we have |empty | Prach1024 |
memmove(prach2+(1024<<1),prach2,(1024<<2));
// here we have |empty | Prach1024 | Prach1024| empty1024 | empty1024 | empty1024 | empty1024
memmove(prach2+(1024<<2),prach2,(1024<<3));
// here we have |empty | Prach1024 | Prach1024| Prach1024 | Prach1024 | empty1024 | empty1024
memmove(prach2+(1024<<3),prach2,(1024<<3));
// here we have |empty | Prach1024 | Prach1024| Prach1024 | Prach1024 | Prach1024 | Prach1024
memmove(prach2+(1024<<1)*6,prach2,(1024<<2)*6);
// here we have |empty | Prach1024 | Prach1024| Prach1024 | Prach1024 | Prach1024 | Prach1024 | Prach1024 | Prach1024| Prach1024 | Prach1024 | Prach1024 | Prach1024|
memmove(prach,prach+(1024<<1),(Ncp<<2));
// here we have |Prefix | Prach1024 | Prach1024| Prach1024 | Prach1024 | Prach1024 | Prach1024 | Prach1024 | Prach1024| Prach1024 | Prach1024 | Prach1024 | Prach1024|
prach_len = (1024*12)+Ncp;
}
}
}
else
AssertFatal(1==0,"3/4 sampling not supported for this PRACH size %d\n",fp->N_RB_UL);
}
else if (fp->N_RB_UL < 137) { // 46.08 or 61.44 Ms/s
if (fp->threequarter_fs == 0) { // full sampling @ 61.44 Ms/s
Ncp<<=1;
// This is after cyclic prefix (Ncp<<1 samples for 30.72 Ms/s, Ncp<<2 samples for 61.44 Ms/s
prach2 = prach+(Ncp<<1);
Ncp<<=1; //to account for 61.44Mbps
// This is after cyclic prefix
prach2 = prach+(Ncp<<1); //times 2 for complex samples
if (prach_sequence_length == 0){
if (prach_fmt_id == 0) { //24576 samples @ 30.72 Ms/s, 49152 samples @ 61.44 Ms/s
idft(IDFT_49152,prachF,prach2,1);
@@ -442,9 +598,10 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
prach_len = (12288*4)+Ncp;
}
} else { // short PRACH sequence
if (use_extended_prach_prefix)
Ncp+=32; // 16*kappa, kappa=2 for 61.44Msps
prach2 = prach+(Ncp<<1); //times 2 for complex samples
if (prach_fmt_id == 4 || prach_fmt_id == 7 || prach_fmt_id == 9) {
Ncp+=32; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_2048,prachF,prach2,1);
// here we have |empty | Prach2048 |
if (prach_fmt_id != 9) {
@@ -455,8 +612,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
memmove(prach,prach+(2048<<1),(Ncp<<2));
// here we have |Prefix | Prach2048 | Prach2048 (if ! 0xc0) |
} else if (prach_fmt_id == 5) { // 6x2048
Ncp+=32; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_2048,prachF,prach2,1);
// here we have |empty | Prach2048 |
memmove(prach2+(2048<<1),prach2,(2048<<2));
@@ -467,8 +622,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
// here we have |Prefix | Prach2048 |
prach_len = (2048*4)+Ncp;
} else if (prach_fmt_id == 6) { // 6x2048
Ncp+=32;
prach2 = prach+(Ncp<<1);
idft(IDFT_2048,prachF,prach2,1);
// here we have |empty | Prach2048 |
memmove(prach2+(2048<<1),prach2,(2048<<2));
@@ -481,8 +634,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
// here we have |Prefix | Prach2048 |
prach_len = (2048*6)+Ncp;
} else if (prach_fmt_id == 8) { // 12x2048
Ncp+=32; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_2048,prachF,prach2,1);
// here we have |empty | Prach2048 |
memmove(prach2+(2048<<1),prach2,(2048<<2));
@@ -535,9 +686,10 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
prach_len = (9216*4)+Ncp;
}
} else { // short sequence
if (use_extended_prach_prefix)
Ncp+=24; // 16*kappa, kappa=1.5 for 46.08Msps
prach2 = prach+(Ncp<<1); //times 2 for complex samples
if (prach_fmt_id == 4 || prach_fmt_id == 7 || prach_fmt_id == 9) {
Ncp+=24; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_1536,prachF,prach2,1);
// here we have |empty | Prach1536 |
if (prach_fmt_id != 9) {
@@ -549,9 +701,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
// here we have |Prefix | Prach1536 | Prach1536 (if ! 0xc0) |
} else if (prach_fmt_id == 5) { // 6x1536
Ncp+=24; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_1536,prachF,prach2,1);
// here we have |empty | Prach1536 |
memmove(prach2+(1536<<1),prach2,(1536<<2));
@@ -562,8 +711,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
// here we have |Prefix | Prach1536 |
prach_len = (1536*4)+Ncp;
} else if (prach_fmt_id == 6) { // 6x1536
Ncp+=24; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_1536,prachF,prach2,1);
// here we have |empty | Prach1536 |
memmove(prach2+(1536<<1),prach2,(1536<<2));
@@ -576,8 +723,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
// here we have |Prefix | Prach1536 |
prach_len = (1536*6)+Ncp;
} else if (prach_fmt_id == 8) { // 12x1536
Ncp+=24; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_1536,prachF,prach2,1);
// here we have |empty | Prach1536 |
memmove(prach2+(1536<<1),prach2,(1536<<2));
@@ -596,8 +741,9 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
}
} else if (fp->N_RB_UL <= 273) {// 92.16 or 122.88 Ms/s
if (fp->threequarter_fs == 0) { // full sampling @ 122.88 Ms/s
Ncp<<=2;
prach2 = prach+(Ncp<<1);
Ncp<<=2; //to account for 122.88Mbps
// This is after cyclic prefix
prach2 = prach+(Ncp<<1); //times 2 for complex samples
if (prach_sequence_length == 0){
if (prach_fmt_id == 0) { //24576 samples @ 30.72 Ms/s, 98304 samples @ 122.88 Ms/s
idft(IDFT_98304,prachF,prach2,1);
@@ -632,9 +778,10 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
prach_len = (24576*4)+Ncp;
}
} else { // short sequence
if (use_extended_prach_prefix)
Ncp+=64; // 16*kappa, kappa=4 for 122.88Msps
prach2 = prach+(Ncp<<1); //times 2 for complex samples
if (prach_fmt_id == 4 || prach_fmt_id == 7 || prach_fmt_id == 9) {
Ncp+=64; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_4096,prachF,prach2,1);
// here we have |empty | Prach4096 |
if (prach_fmt_id != 9) {
@@ -644,8 +791,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
memmove(prach,prach+(4096<<1),(Ncp<<2));
// here we have |Prefix | Prach4096 | Prach4096 (if ! 0xc0) |
} else if (prach_fmt_id == 5) { // 4x4096
Ncp+=64; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_4096,prachF,prach2,1);
// here we have |empty | Prach4096 |
memmove(prach2+(4096<<1),prach2,(4096<<2));
@@ -656,8 +801,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
// here we have |Prefix | Prach4096 |
prach_len = (4096*4)+Ncp;
} else if (prach_fmt_id == 6) { // 6x4096
Ncp+=64; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_4096,prachF,prach2,1);
// here we have |empty | Prach4096 |
memmove(prach2+(4096<<1),prach2,(4096<<2));
@@ -670,8 +813,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
// here we have |Prefix | Prach4096 |
prach_len = (4096*6)+Ncp;
} else if (prach_fmt_id == 8) { // 12x4096
Ncp+=64; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_4096,prachF,prach2,1);
// here we have |empty | Prach4096 |
memmove(prach2+(4096<<1),prach2,(4096<<2));
@@ -688,8 +829,8 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
}
}
} else { // three quarter sampling @ 92.16 Ms/s
Ncp = (Ncp*3);
prach2 = prach+(Ncp<<1);
Ncp = (Ncp*3); //to account for 92.16 Msps
prach2 = prach+(Ncp<<1); //times 2 for complex samples
if (prach_sequence_length == 0){
if (prach_fmt_id == 0) {
idft(IDFT_73728,prachF,prach2,1);
@@ -724,20 +865,19 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
prach_len = (18432*4)+Ncp;
}
} else { // short sequence
if (prach_fmt_id == 4 || prach_fmt_id == 7 || prach_fmt_id == 9) {
Ncp+=48; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
if (use_extended_prach_prefix)
Ncp+=48; // 16*kappa, kappa=3 for 92.16Msps
prach2 = prach+(Ncp<<1); //times 2 for complex samples
if (prach_fmt_id == 4 || prach_fmt_id == 7 || prach_fmt_id == 9) {
idft(IDFT_3072,prachF,prach2,1);
// here we have |empty | Prach3072 |
if (prach_fmt_id != 9) {
memmove(prach2+(3072<<1),prach2,(3072<<2));
prach_len = (3072*2)+Ncp;
} else prach_len = (3072*1)+Ncp;
memmove(prach,prach+(3072<<1),(Ncp<<2));
// here we have |Prefix | Prach3072 | Prach3072 (if ! 0xc0) |
memmove(prach,prach+(3072<<1),(Ncp<<2));
// here we have |Prefix | Prach3072 | Prach3072 (if ! 0xc0) |
} else if (prach_fmt_id == 6) { // 6x3072
Ncp+=48; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_3072,prachF,prach2,1);
// here we have |empty | Prach3072 |
memmove(prach2+(3072<<1),prach2,(3072<<2));
@@ -750,8 +890,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
// here we have |Prefix | Prach3072 |
prach_len = (3072*6)+Ncp;
} else if (prach_fmt_id == 5) { // 4x3072
Ncp+=48; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_3072,prachF,prach2,1);
// here we have |empty | Prach3072 |
memmove(prach2+(3072<<1),prach2,(3072<<2));
@@ -762,8 +900,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
// here we have |Prefix | Prach3072 |
prach_len = (3072*4)+Ncp;
} else if (prach_fmt_id == 6) { // 12x3072
Ncp+=48; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_3072,prachF,prach2,1);
// here we have |empty | Prach3072 |
memmove(prach2+(3072<<1),prach2,(3072<<2));
@@ -678,7 +678,7 @@ void dlsch_detection_mrc_TM34(NR_DL_FRAME_PARMS *frame_parms,
uint8_t *pmi_ext,
uint32_t *rb_alloc,
uint8_t symbol,
uint8_t subframe,
uint8_t nr_slot_rx,
NR_DL_FRAME_PARMS *frame_parms)
\brief This function extracts the received resource blocks, both channel estimates and data symbols,
for the current allocation and for single antenna eNB transmission.
@@ -690,23 +690,10 @@ void dlsch_detection_mrc_TM34(NR_DL_FRAME_PARMS *frame_parms,
@param pmi_ext Extracted PMI for chosen RBs
@param rb_alloc RB allocation vector
@param symbol Symbol to extract
@param subframe Subframe number
@param vrb_type Flag to indicate distributed VRB type
@param nr_slot_rx Slot number
@param high_speed_flag
@param frame_parms Pointer to frame descriptor
*/
/*uint16_t nr_dlsch_extract_rbs_single(int32_t **rxdataF,
int32_t **dl_ch_estimates,
int32_t **rxdataF_ext,
int32_t **dl_ch_estimates_ext,
uint16_t pmi,
uint8_t *pmi_ext,
uint32_t *rb_alloc,
uint8_t symbol,
uint8_t subframe,
uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms);*/
unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
int **dl_ch_estimates,
int **rxdataF_ext,
@@ -714,12 +701,14 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
unsigned short pmi,
unsigned char *pmi_ext,
unsigned char symbol,
uint8_t pilots,
unsigned short start_rb,
unsigned short nb_pdsch_rb,
unsigned char nr_tti_rx,
uint8_t pilots,
uint8_t config_type,
unsigned short start_rb,
unsigned short nb_pdsch_rb,
unsigned char nr_slot_rx,
uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms);
NR_DL_FRAME_PARMS *frame_parms,
uint16_t dlDmrsSymbPos);
/** \fn dlsch_extract_rbs_dual(int32_t **rxdataF,
int32_t **dl_ch_estimates,
@@ -740,7 +729,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
@param pmi_ext Extracted PMI for chosen RBs
@param rb_alloc RB allocation vector
@param symbol Symbol to extract
@param subframe Subframe index
@param nr_slot_rx Slot index
@param high_speed_flag
@param frame_parms Pointer to frame descriptor
*/
@@ -754,7 +743,7 @@ unsigned short nr_dlsch_extract_rbs_dual(int **rxdataF,
uint8_t pilots,
unsigned short start_rb,
unsigned short nb_rb_pdsch,
unsigned char nr_tti_rx,
unsigned char nr_slot_rx,
uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms,
MIMO_mode_t mimo_mode);
@@ -1002,7 +991,8 @@ void nr_dlsch_scale_channel(int32_t **dl_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t **dlsch_ue,
uint8_t symbol,
uint8_t start_symbol,
uint8_t start_symbol,
uint32_t len,
uint16_t nb_rb);
/** \brief This is the top-level entry point for DLSCH decoding in UE. It should be replicated on several
@@ -1017,7 +1007,7 @@ void nr_dlsch_scale_channel(int32_t **dl_ch_estimates_ext,
@param lte_frame_parms Pointer to frame descriptor
@param dlsch Pointer to DLSCH descriptor
@param frame Frame number
@param subframe Subframe number
@param nr_slot_rx Slot number
@param num_pdcch_symbols Number of PDCCH symbols
@param is_crnti indicates if PDSCH belongs to a CRNTI (necessary for parallelizing decoding threads)
@param llr8_flag If 1, indicate that the 8-bit turbo decoder should be used
@@ -1025,13 +1015,15 @@ void nr_dlsch_scale_channel(int32_t **dl_ch_estimates_ext,
*/
uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
int eNB_id,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint16_t nb_symb_sch,
uint8_t nr_slot_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag);
@@ -1081,7 +1073,7 @@ uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
UE_nr_rxtx_proc_t *proc,
int eNB_id,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
@@ -1089,7 +1081,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint8_t nr_slot_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag);
@@ -1111,8 +1103,7 @@ uint32_t dlsch_decoding_emul(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t eNB_id);
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
uint32_t frame,
uint32_t slot);
UE_nr_rxtx_proc_t *proc);
/*! \brief Extract PSS and SSS resource elements
@@ -1478,25 +1469,6 @@ void nr_rf_card_config(openair0_config_t *openair0_cfg,
int freq_offset);
/*!
\brief Encoding of PUSCH/ACK/RI/ACK from 36-212.
@param a Pointer to ulsch SDU
@param frame_parms Pointer to Frame parameters
@param ulsch Pointer to ulsch descriptor
@param harq_pid HARQ process ID
@param tmode Transmission mode (1-7)
@param control_only_flag Generate PUSCH with control information only
@param Nbundled Parameter for ACK/NAK bundling (36.213 Section 7.3)
*/
uint32_t ulsch_encoding(uint8_t *a,
PHY_VARS_NR_UE *phy_vars_ue,
uint8_t harq_pid,
uint8_t eNB_id,
uint8_t subframe_rx,
uint8_t tmode,
uint8_t control_only_flag,
uint8_t Nbundled);
void print_CQI(void *o,UCI_format_t uci_format,uint8_t eNB_id,int N_RB_DL);
void fill_CQI(NR_UE_ULSCH_t *ulsch,PHY_NR_MEASUREMENTS *meas,uint8_t eNB_id, uint8_t harq_pid,int N_RB_DL, rnti_t rnti, uint8_t trans_mode,double sinr_eff);
@@ -1720,9 +1692,8 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms,
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
int frame,
int slot,
fapi_nr_dci_indication_t *dci_ind);
UE_nr_rxtx_proc_t *proc,
fapi_nr_dci_indication_t *dci_ind);
/** \brief This function is the top-level entry point to PDSCH demodulation, after frequency-domain transformation and channel estimation. It performs
@@ -1737,36 +1708,25 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
@param eNB_id eNb index (Nid1) 0,1,2
@param eNB_id_i Interfering eNB index (Nid1) 0,1,2, or 3 in case of MU-MIMO IC receiver
@param frame Frame number
@param nr_tti_rx Subframe number
@param nr_slot_rx Slot number
@param symbol Symbol on which to act (within sub-frame)
@param first_symbol_flag set to 1 on first DLSCH symbol
@param rx_type. rx_type=RX_IC_single_stream will enable interference cancellation of a second stream when decoding the first stream. In case of TM1, 2, 5, and this can cancel interference from a neighbouring cell given by eNB_id_i. In case of TM5, eNB_id_i should be set to n_connected_eNB to perform multi-user interference cancellation. In case of TM3, eNB_id_i should be set to eNB_id to perform co-channel interference cancellation; this option should be used together with an interference cancellation step [...]. In case of TM3, if rx_type=RX_IC_dual_stream, both streams will be decoded by applying the IC single stream receiver twice.
@param i_mod Modulation order of the interfering stream
*/
int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
PDSCH_t type,
unsigned char eNB_id,
unsigned char eNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference
uint32_t frame,
uint8_t nr_tti_rx,
uint8_t nr_slot_rx,
unsigned char symbol,
unsigned char first_symbol_flag,
RX_type_t rx_type,
unsigned char i_mod,
unsigned char harq_pid);
uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag);
int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t subframe);
void *dlsch_thread(void *arg);
@@ -141,6 +141,8 @@ typedef struct {
uint8_t decode_phich;
// Encoder BG
uint8_t BG;
// LDPC lifting size
uint32_t Z;
} NR_UL_UE_HARQ_t;
typedef struct {
@@ -316,6 +318,19 @@ typedef struct {
uint8_t codeword;
/// HARQ-ACKs
NR_UE_HARQ_STATUS_t harq_ack;
/// PTRS Frequency Density
uint8_t PTRSFreqDensity;
/// PTRS Time Density
uint8_t PTRSTimeDensity;
uint8_t PTRSPortIndex ;
uint8_t nEpreRatioOfPDSCHToPTRS;
uint8_t PTRSReOffset;
/// bit mask of PT-RS ofdm symbol indicies
uint16_t ptrs_symbols;
// PTRS symbol index, to be updated every PTRS symbol within a slot.
uint8_t ptrs_symbol_index;
/// PDU BITMAP
uint16_t pduBitmap;
} NR_DL_UE_HARQ_t;
typedef struct {
@@ -227,8 +227,7 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
NR_UL_UE_HARQ_t *harq_process;
uint16_t nb_rb ;
uint32_t A, F;
static uint32_t Z = 0;
uint32_t *pz = &Z;
uint32_t *pz;
uint8_t mod_order;
uint16_t Kr,r;
uint32_t r_offset;
@@ -249,7 +248,7 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
harq_process = ulsch->harq_processes[harq_pid];
nb_rb = harq_process->pusch_pdu.rb_size;
A = harq_process->pusch_pdu.pusch_data.tb_size*8;
pz = &Z;
pz = &harq_process->Z;
mod_order = nr_get_Qm_ul(harq_process->pusch_pdu.mcs_index, harq_process->pusch_pdu.mcs_table);
R = nr_get_code_rate_ul(harq_process->pusch_pdu.mcs_index, harq_process->pusch_pdu.mcs_table);
Kr=0;
@@ -387,12 +386,13 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
printf("%d \n", harq_process->d[0][cnt]);
}
printf("\n");*/
encoder_implemparams_t impp;
impp.n_segments = harq_process->C;
impp.tinput = NULL;
impp.tprep = NULL;
impp.tparity = NULL;
impp.toutput = NULL;
encoder_implemparams_t impp = {
.n_segments=harq_process->C,
.macro_num=0,
.tinput = NULL,
.tprep = NULL,
.tparity = NULL,
.toutput = NULL};
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_LDPC_ENCODER_OPTIM, VCD_FUNCTION_IN);
+1 -1
View File
@@ -360,7 +360,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
ptrs_idx++;
} else if (!is_dmrs_sym || allowed_xlsch_re_in_dmrs_symbol(k, start_sc, cdm_grps_no_data, dmrs_type)) {
} else if (!is_dmrs_sym || allowed_xlsch_re_in_dmrs_symbol(k, start_sc, frame_parms->ofdm_symbol_size, cdm_grps_no_data, dmrs_type)) {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = ((int16_t *) ulsch_ue->y)[m<<1];
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = ((int16_t *) ulsch_ue->y)[(m<<1) + 1];
+26 -26
View File
@@ -57,14 +57,14 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
long pucch_GroupHopping,
long hoppingId,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t m0,
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch0] start function at slot(nr_tti_tx)=%d\n",nr_tti_tx);
printf("\t [nr_generate_pucch0] start function at slot(nr_slot_tx)=%d\n",nr_slot_tx);
#endif
/*
* Implement TS 38.211 Subclause 6.3.2.3.1 Sequence generation
@@ -112,8 +112,8 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
for (int l=0; l<nrofSymbols; l++) {
// if frequency hopping is enabled n_hop = 1 for second hop. Not sure frequency hopping concerns format 0. FIXME!!!
// if ((PUCCH_Frequency_Hopping == 1)&&(l == (nrofSymbols-1))) n_hop = 1;
nr_group_sequence_hopping(pucch_GroupHopping,hoppingId,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(hoppingId,m0,mcs,l,startingSymbolIndex,nr_tti_tx);
nr_group_sequence_hopping(pucch_GroupHopping,hoppingId,n_hop,nr_slot_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(hoppingId,m0,mcs,l,startingSymbolIndex,nr_slot_tx);
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch0] sequence generation \tu=%d \tv=%d \talpha=%lf \t(for symbol l=%d)\n",u,v,alpha,l);
#endif
@@ -170,7 +170,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t m0,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
@@ -179,8 +179,8 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
uint8_t timeDomainOCC,
uint8_t nr_bit) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch1] start function at slot(nr_tti_tx)=%d payload=%lu m0=%d nrofSymbols=%d startingSymbolIndex=%d startingPRB=%d startingPRB_intraSlotHopping=%d timeDomainOCC=%d nr_bit=%d\n",
nr_tti_tx,payload,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,timeDomainOCC,nr_bit);
printf("\t [nr_generate_pucch1] start function at slot(nr_slot_tx)=%d payload=%lu m0=%d nrofSymbols=%d startingSymbolIndex=%d startingPRB=%d startingPRB_intraSlotHopping=%d timeDomainOCC=%d nr_bit=%d\n",
nr_slot_tx,payload,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,timeDomainOCC,nr_bit);
#endif
/*
* Implement TS 38.211 Subclause 6.3.2.4.1 Sequence modulation
@@ -283,11 +283,11 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
if ((intraSlotFrequencyHopping == 1) && (l >= (int)floor(nrofSymbols/2))) n_hop = 1; // n_hop = 1 for second hop
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch1] entering function nr_group_sequence_hopping with n_hop=%d, nr_tti_tx=%d\n",
n_hop,nr_tti_tx);
printf("\t [nr_generate_pucch1] entering function nr_group_sequence_hopping with n_hop=%d, nr_slot_tx=%d\n",
n_hop,nr_slot_tx);
#endif
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,l,lprime,nr_tti_tx);
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_slot_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,l,lprime,nr_slot_tx);
for (int n=0; n<12; n++) {
r_u_v_alpha_delta_re[n] = (int16_t)(((((int32_t)(round(32767*cos(alpha*n))) * table_5_2_2_2_2_Re[u][n])>>15)
@@ -505,7 +505,7 @@ void nr_generate_pucch1_old(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t m0,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
@@ -514,8 +514,8 @@ void nr_generate_pucch1_old(PHY_VARS_NR_UE *ue,
uint8_t timeDomainOCC,
uint8_t nr_bit) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch1] start function at slot(nr_tti_tx)=%d payload=%d m0=%d nrofSymbols=%d startingSymbolIndex=%d startingPRB=%d startingPRB_intraSlotHopping=%d timeDomainOCC=%d nr_bit=%d\n",
nr_tti_tx,payload,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,timeDomainOCC,nr_bit);
printf("\t [nr_generate_pucch1] start function at slot(nr_slot_tx)=%d payload=%d m0=%d nrofSymbols=%d startingSymbolIndex=%d startingPRB=%d startingPRB_intraSlotHopping=%d timeDomainOCC=%d nr_bit=%d\n",
nr_slot_tx,payload,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,timeDomainOCC,nr_bit);
#endif
/*
* Implement TS 38.211 Subclause 6.3.2.4.1 Sequence modulation
@@ -603,11 +603,11 @@ void nr_generate_pucch1_old(PHY_VARS_NR_UE *ue,
// y_n contains the complex value d multiplied by the sequence r_u_v
int16_t y_n_re[12],y_n_im[12];
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch1] entering function nr_group_sequence_hopping with n_hop=%d, nr_tti_tx=%d\n",
n_hop,nr_tti_tx);
printf("\t [nr_generate_pucch1] entering function nr_group_sequence_hopping with n_hop=%d, nr_slot_tx=%d\n",
n_hop,nr_slot_tx);
#endif
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,lnormal,lprime,nr_tti_tx);
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_slot_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,lnormal,lprime,nr_slot_tx);
for (int n=0; n<12; n++) {
r_u_v_alpha_delta_re[n] = (int16_t)(((((int32_t)(round(32767*cos(alpha*n))) * table_5_2_2_2_2_Re[u][n])>>15)
@@ -806,7 +806,7 @@ inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,
int i;
uint8_t c;
// c_init=nRNTI*2^15+n_id according to TS 38.211 Subclause 6.3.2.6.1
//x2 = (rnti) + ((uint32_t)(1+nr_tti_tx)<<16)*(1+(fp->Nid_cell<<1));
//x2 = (rnti) + ((uint32_t)(1+nr_slot_tx)<<16)*(1+(fp->Nid_cell<<1));
x2 = ((rnti)<<15)+n_id;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_pucch2_3_4_scrambling] gold sequence s=%x, M_bit %d\n",s,M_bit);
@@ -960,14 +960,14 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint8_t nr_bit) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch2] start function at slot(nr_tti_tx)=%d with payload=%lu and nr_bit=%d\n",nr_tti_tx, payload, nr_bit);
printf("\t [nr_generate_pucch2] start function at slot(nr_slot_tx)=%d with payload=%lu and nr_bit=%d\n",nr_slot_tx, payload, nr_bit);
#endif
// b is the block of bits transmitted on the physical channel after payload coding
uint64_t b[16]; // limit to 1024-bit encoded length
@@ -1043,7 +1043,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
int m=0;
for (int l=0; l<nrofSymbols; l++) {
x2 = (((1<<17)*((14*nr_tti_tx) + (l+startingSymbolIndex) + 1)*((2*dmrs_scrambling_id) + 1)) + (2*dmrs_scrambling_id))%(1U<<31); // c_init calculation according to TS38.211 subclause
x2 = (((1<<17)*((14*nr_slot_tx) + (l+startingSymbolIndex) + 1)*((2*dmrs_scrambling_id) + 1)) + (2*dmrs_scrambling_id))%(1U<<31); // c_init calculation according to TS38.211 subclause
int reset = 1;
for (int ii=0; ii<=(startingPRB>>2); ii++) {
@@ -1130,7 +1130,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
@@ -1140,7 +1140,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
uint8_t occ_length_format4,
uint8_t occ_index_format4) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch3_4] start function at slot(nr_tti_tx)=%d with payload=%lu and nr_bit=%d\n", nr_tti_tx, payload, nr_bit);
printf("\t [nr_generate_pucch3_4] start function at slot(nr_slot_tx)=%d with payload=%lu and nr_bit=%d\n", nr_slot_tx, payload, nr_bit);
#endif
// b is the block of bits transmitted on the physical channel after payload coding
uint64_t b[16];
@@ -1455,7 +1455,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
for (int l=0; l<nrofSymbols; l++) {
if ((intraSlotFrequencyHopping == 1) && (l >= (int)floor(nrofSymbols/2))) n_hop = 1; // n_hop = 1 for second hop
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_slot_tx,&u,&v); // calculating u and v value
// Next we proceed to calculate base sequence for DM-RS signal, according to TS 38.211 subclause 6.4.1.33
if (nrofPRB >= 3) { // TS 38.211 subclause 5.2.2.1 (Base sequences of length 36 or larger) applies
@@ -1501,7 +1501,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
}
uint16_t j=0;
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,l,startingSymbolIndex,nr_tti_tx);
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,l,startingSymbolIndex,nr_slot_tx);
for (int rb=0; rb<nrofPRB; rb++) {
if ((intraSlotFrequencyHopping == 1) && (l<floor(nrofSymbols/2))) { // intra-slot hopping enabled, we need to calculate new offset PRB
+4 -4
View File
@@ -52,7 +52,7 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
long pucch_GroupHopping,
long hoppingId,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t m0,
uint8_t mcs,
uint8_t nrofSymbols,
@@ -64,7 +64,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t m0,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
@@ -81,7 +81,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
@@ -95,7 +95,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
@@ -84,7 +84,7 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
uint32_t f_gh = 0;
SRS_Resource_t *p_SRS_Resource;
int frame_number = proc->frame_tx;
int slot_number = proc->nr_tti_tx;
int slot_number = proc->nr_slot_tx;
uint16_t n_SRS, n_SRS_cs_i;
double alpha_i;
uint8_t K_TC_p;
@@ -445,7 +445,7 @@ int ue_srs_procedure_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB
/* SRS resource configurated ? */
if (p_srs_resource != NULL) {
if (p_srs_resource_set->resourceType == periodic) {
if (is_srs_period_nr(p_srs_resource, frame_parms, proc->frame_tx, proc->nr_tti_tx) == 0) {
if (is_srs_period_nr(p_srs_resource, frame_parms, proc->frame_tx, proc->nr_slot_tx) == 0) {
generate_srs = 1;
}
}
@@ -459,7 +459,7 @@ int ue_srs_procedure_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB
if (generate_srs == 1) {
int16_t txptr = AMP;
uint16_t nsymb = (ue->frame_parms.Ncp==0) ? 14:12;
uint16_t symbol_offset = (int)ue->frame_parms.ofdm_symbol_size*((proc->nr_tti_tx*nsymb)+(nsymb-1));
uint16_t symbol_offset = (int)ue->frame_parms.ofdm_symbol_size*((proc->nr_slot_tx*nsymb)+(nsymb-1));
if (generate_srs_nr(p_srs_resource_set, frame_parms, &ue->common_vars.txdataF[eNB_id][symbol_offset], txptr, proc) == 0) {
return 0;
}
+9 -6
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@@ -314,6 +314,7 @@ int pss_ch_est_nr(PHY_VARS_NR_UE *ue,
*********************************************************************/
int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR],
uint8_t doPss, uint8_t doSss,
@@ -331,7 +332,7 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
pss_symbol = 0;
sss_symbol = SSS_SYMBOL_NB-PSS_SYMBOL_NB;
rxdataF = ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF;
rxdataF = ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
unsigned int ofdm_symbol_size = frame_parms->ofdm_symbol_size;
@@ -386,7 +387,7 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
/*******************************************************************
*
* NAME : rx_sss_nr
* NAME : pss_sss_extract_nr
*
* PARAMETERS : none
*
@@ -397,11 +398,12 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
*********************************************************************/
int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR],
uint8_t subframe)
{
return do_pss_sss_extract_nr(phy_vars_ue, pss_ext, sss_ext, 1 /* doPss */, 1 /* doSss */, subframe);
return do_pss_sss_extract_nr(phy_vars_ue, proc, pss_ext, sss_ext, 1 /* doPss */, 1 /* doSss */, subframe);
}
/*******************************************************************
@@ -417,7 +419,7 @@ int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue,
*
*********************************************************************/
int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max)
int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, uint8_t *phase_max)
{
uint8_t i;
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR];
@@ -433,6 +435,7 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max)
// pss sss extraction
pss_sss_extract_nr(ue,
proc,
pss_ext,
sss_ext,
0); /* subframe */
@@ -440,8 +443,8 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max)
#ifdef DEBUG_PLOT_SSS
write_output("rxsig0.m","rxs0",&ue->common_vars.rxdata[0][0],ue->frame_parms.samples_per_subframe,1,1);
write_output("rxdataF0_pss.m","rxF0_pss",&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[0]].rxdataF[0][0],frame_parms->ofdm_symbol_size,1,1);
write_output("rxdataF0_sss.m","rxF0_sss",&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[0]].rxdataF[0][(SSS_SYMBOL_NB-PSS_SYMBOL_NB)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
write_output("rxdataF0_pss.m","rxF0_pss",&ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF[0][0],frame_parms->ofdm_symbol_size,1,1);
write_output("rxdataF0_sss.m","rxF0_sss",&ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF[0][(SSS_SYMBOL_NB-PSS_SYMBOL_NB)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
write_output("pss_ext.m","pss_ext",pss_ext,LENGTH_PSS_NR,1,1);
#endif
+3 -1
View File
@@ -112,6 +112,8 @@ typedef struct {
uint32_t F;
/// Encoder BG
uint8_t BG;
/// LDPC lifting size
uint32_t Z;
} NR_DL_gNB_HARQ_t;
typedef struct {
@@ -467,7 +469,7 @@ typedef struct {
/// bit mask of PT-RS ofdm symbol indicies
uint16_t ptrs_symbols;
// PTRS subcarriers per OFDM symbol
uint16_t ptrs_sc_per_ofdm_symbol;
int32_t ptrs_re_per_slot;
/// \brief Estimated phase error based upon PTRS on each symbol .
/// - first index: ? [0..7] Number of Antenna
/// - second index: ? [0...14] smybol per slot
+15 -4
View File
@@ -338,6 +338,10 @@ typedef struct {
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
int32_t **dl_ch_estimates_ext;
/// \brief Downlink channel estimates extracted in PRBS.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
int32_t **dl_ch_ptrs_estimates_ext;
/// \brief Downlink cross-correlation of MIMO channel estimates (unquantized PMI) extracted in PRBS. For the SIC receiver we need to store the history of this for each harq process and round
/// - first index: ? [0..7] (hard coded) accessed via \c harq_pid
/// - second index: ? [0..7] (hard coded) accessed via \c round
@@ -414,6 +418,16 @@ typedef struct {
uint32_t llr_offset[14];
// llr length per ofdm symbol
uint32_t llr_length[14];
// llr offset per ofdm symbol
uint32_t dl_valid_re[14];
/// \brief Estimated phase error based upon PTRS on each symbol .
/// - first index: ? [0..7] Number of Antenna
/// - second index: ? [0...14] smybol per slot
int32_t **ptrs_phase_per_slot;
/// \brief Estimated phase error based upon PTRS on each symbol .
/// - first index: ? [0..7] Number of Antenna
/// - second index: ? [0...14] smybol per slot
int32_t **ptrs_re_per_slot;
} NR_UE_PDSCH;
#define NR_PDCCH_DEFS_NR_UE
@@ -848,9 +862,6 @@ typedef struct {
/// UE FAPI indication for DCI reception
//fapi_nr_dci_indication_t dci_ind;
// point to the current rxTx thread index
uint8_t current_thread_id[NR_MAX_SLOTS_PER_FRAME];
t_nrPolar_params *polarList;
NR_UE_PDSCH *pdsch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_eNB_MAX+1]; // two RxTx Threads
NR_UE_PBCH *pbch_vars[NUMBER_OF_CONNECTED_eNB_MAX];
@@ -892,7 +903,7 @@ typedef struct {
uint32_t nr_gold_pbch[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
/// PDSCH DMRS
uint32_t nr_gold_pdsch[2][20][2][NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD];
uint32_t nr_gold_pdsch[2][20][14][NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD];
/// PDCCH DMRS
uint32_t nr_gold_pdcch[7][20][3][52];
+2 -2
View File
@@ -496,8 +496,8 @@ typedef struct{ // CSI-MeasConfig IE is used to configure CSI-RS (reference sign
uint8_t reportTriggerSize;
} csi_MeasConfig_t;
typedef enum {
pdsch_dmrs_type1 = 1,
pdsch_dmrs_type2 = 2
pdsch_dmrs_type1 = 0,
pdsch_dmrs_type2 = 1
} pdsch_dmrs_type_t;
typedef enum {
pusch_dmrs_type1 = 0,
+2 -10
View File
@@ -4,26 +4,18 @@
#include <targets/ARCH/COMMON/common_lib.h>
/// Context data structure for RX/TX portion of subframe processing
typedef struct {
/// index of the current UE RX/TX proc
int proc_id;
/// index of the current UE RX/TX thread
int thread_id;
/// Component Carrier index
uint8_t CC_id;
/// timestamp transmitted to HW
openair0_timestamp timestamp_tx;
//#ifdef UE_NR_PHY_DEMO
/// NR TTI index within subframe_tx [0 .. slots_per_subframe - 1] to act upon for transmission
int nr_tti_tx;
/// NR TTI index within subframe_rx [0 .. slots_per_subframe - 1] to act upon for reception
int nr_tti_rx;
/// NR slot index within frame_tx [0 .. slots_per_frame - 1] to act upon for transmission
int nr_slot_tx;
/// NR slot index within frame_rx [0 .. slots_per_frame - 1] to act upon for transmission
int nr_slot_rx;
//#endif
/// subframe to act upon for transmission
int subframe_tx;
/// subframe to act upon for reception
int subframe_rx;
/// frame to act upon for transmission
int frame_tx;
/// frame to act upon for reception
+2 -2
View File
@@ -75,10 +75,10 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
/** \brief This function checks nr slot direction : downlink or uplink
* @param frame_parms NR DL Frame parameters
* @param nr_frame : frame number
* @param nr_tti : slot number
* @param nr_slot : slot number
@returns int : downlink, uplink or mixed slot type*/
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti);
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_slot);
/** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters
+2 -2
View File
@@ -242,7 +242,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
if (decodeSuccess) {
memcpy(ulsch_harq->b+rdata->offset,
ulsch_harq->c[r],
rdata->Kr_bytes- - (ulsch_harq->F>>3) -((ulsch_harq->C>1)?3:0));
rdata->Kr_bytes - (ulsch_harq->F>>3) -((ulsch_harq->C>1)?3:0));
} else {
if ( rdata->nbSegments != ulsch_harq->processedSegments ) {
@@ -260,7 +260,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
// if all segments are done
if (rdata->nbSegments == ulsch_harq->processedSegments) {
if (decodeSuccess) {
LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for nr_tti_rx %d TBS %d\n",
LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for slot %d TBS %d\n",
gNB->Mod_id,ulsch_harq->slot,ulsch_harq->TBS);
ulsch_harq->status = SCH_IDLE;
ulsch_harq->round = 0;
+3 -6
View File
@@ -103,14 +103,11 @@ void phy_procedures_UE_lte(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
int phy_procedures_RN_UE_RX(unsigned char last_slot, unsigned char next_slot, relaying_type_t r_type);
/*! \brief Scheduling for UE TX procedures in normal subframes.
@param phy_vars_ue Pointer to UE variables on which to act
@param ue Pointer to UE variables on which to act
@param proc Pointer to RXn-TXnp4 proc information
@param eNB_id Local id of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param mode calib/normal mode
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
*/
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id, uint8_t thread_id);
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB_id);
/*! \brief Scheduling for UE RX procedures in normal subframes.
@param ue Pointer to UE variables on which to act
@@ -306,7 +303,7 @@ int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
@param mu numerology index (0,1,2..)
*/
void nr_process_timing_advance(module_id_t Mod_id,uint8_t CC_id,uint8_t ta_command, uint8_t mu, uint16_t bwp_ul_NB_RB);
void nr_process_timing_advance_rar(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint16_t timing_advance);
void nr_process_timing_advance_rar(PHY_VARS_NR_UE *ue, int frame_rx, int nr_slot_rx, uint16_t ta_command);
unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb);
+9 -2
View File
@@ -52,7 +52,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
int slot = scheduled_response->slot;
// Note: we have to handle the thread IDs for this. To be revisited completely.
thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot];
thread_id = scheduled_response->thread_id;
NR_UE_DLSCH_t *dlsch0 = NULL;
NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
@@ -108,9 +108,16 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq->harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id;
dlsch0_harq->harq_ack.slot_for_feedback_ack = (slot+dlsch_config_pdu->pdsch_to_harq_feedback_time_ind)%frame_parms.slots_per_frame;
dlsch0_harq->Nl=1;
dlsch0_harq->mcs_table=0;
dlsch0_harq->mcs_table=dlsch_config_pdu->mcs_table;
dlsch0_harq->harq_ack.rx_status = downlink_harq_process(dlsch0_harq, dlsch0->current_harq_pid, dlsch_config_pdu->ndi, dlsch0->rnti_type);
dlsch0_harq->harq_ack.vDAI_DL = dlsch_config_pdu->dai;
/* PTRS */
dlsch0_harq->PTRSFreqDensity = dlsch_config_pdu->PTRSFreqDensity;
dlsch0_harq->PTRSTimeDensity = dlsch_config_pdu->PTRSTimeDensity;
dlsch0_harq->PTRSPortIndex = dlsch_config_pdu->PTRSPortIndex;
dlsch0_harq->nEpreRatioOfPDSCHToPTRS = dlsch_config_pdu->nEpreRatioOfPDSCHToPTRS;
dlsch0_harq->PTRSReOffset = dlsch_config_pdu->PTRSReOffset;
dlsch0_harq->pduBitmap = dlsch_config_pdu->pduBitmap;
LOG_D(MAC, ">>>> \tdlsch0->g_pucch = %d\tdlsch0_harq.mcs = %d\n", dlsch0->g_pucch, dlsch0_harq->mcs);
}
+2 -2
View File
@@ -73,12 +73,12 @@
@param nr_dci_info_extracted extracted information from dci
@param dlsch downlink context
@param ulsch uplink context
@param nr_tti_rx rx slot
@param nr_slot_rx rx slot
@param tx_offset slot offset for tx
@returns none */
void get_dci_info_for_harq(PHY_VARS_NR_UE *ue, NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted,
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t nr_tti_rx, uint8_t tx_offset);
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t nr_slot_rx, uint8_t tx_offset);
/** \brief This function configures uplink HARQ context
@param PHY_VARS_NR_UE ue context
+4 -4
View File
@@ -61,18 +61,18 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
/** \brief This function checks nr slot direction : downlink or uplink
* @param frame_parms NR DL Frame parameters
* @param nr_frame : frame number
* @param nr_tti : slot number
* @param nr_slot : slot number
@returns int : downlink or uplink */
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti);
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_slot);
/** \brief This function checks nr UE slot direction : downlink or uplink
* @param cfg : FAPI Config Request
* @param nr_frame : frame number
* @param nr_tti : slot number
* @param nr_slot : slot number
@returns int : downlink, uplink or mixed slot type */
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti);
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_slot);
/** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters
@@ -39,7 +39,7 @@
*
*********************************************************************/
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_slot) {
/* for FFD all slot can be considered as an uplink */
int mu = cfg->ssb_config.scs_common, check_slot = 0;
@@ -49,7 +49,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
if (nr_frame%2 == 0) {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
check_slot++;
}
}
@@ -61,7 +61,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
check_slot++;
}
}
@@ -73,7 +73,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
}
} else {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
check_slot++;
}
}
@@ -85,7 +85,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
check_slot++;
}
}
File diff suppressed because it is too large Load Diff
@@ -97,7 +97,7 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue,
G_b_f_c = 0;
}
else {
G_b_f_c = ue->dlsch[ue->current_thread_id[proc->subframe_rx]][gNB_id][0]->g_pucch;
G_b_f_c = ue->dlsch[proc->thread_id][gNB_id][0]->g_pucch;
LOG_W(PHY,"PUCCH Transmit power control command not yet implemented for NR : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (PUCCH_POWER_DEFAULT);
}
@@ -169,7 +169,7 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue,
//int K_PUCCH = 0;
if (O_ACK != 0) {
/* it assumes that PDCCH is in the first symbol of receive slot FFS TDDO NR */
//int slots_gap = (proc->nr_tti_tx > proc->nr_tti_rx ? (proc->nr_tti_tx - proc->nr_tti_rx - 1) : ((proc->nr_tti_tx + ue->frame_parms.slots_per_subframe) - proc->nr_tti_rx - 1));
//int slots_gap = (proc->nr_slot_tx > proc->nr_slot_rx ? (proc->nr_slot_tx - proc->nr_slot_rx - 1) : ((proc->nr_slot_tx + ue->frame_parms.slots_per_subframe) - proc->nr_slot_rx - 1));
//K_PUCCH = (slots_gap * (ue->frame_parms.symbols_per_tti)) - 1;
}
else {
+39 -33
View File
@@ -99,7 +99,7 @@ void nr_generate_pucch0(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
@@ -110,7 +110,7 @@ void nr_generate_pucch1(int32_t **txdataF,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
@@ -123,7 +123,7 @@ void nr_generate_pucch2(int32_t **txdataF,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
@@ -136,7 +136,7 @@ void nr_generate_pucch3_4(int32_t **txdataF,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
@@ -210,7 +210,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
uint64_t pucch_payload = 0;
uint32_t csi_payload = 0;
int frame_tx = proc->frame_tx;
int nr_tti_tx = proc->nr_tti_tx;
int nr_slot_tx = proc->nr_slot_tx;
int Mod_id = ue->Mod_id;
int CC_id = ue->CC_id;
@@ -241,15 +241,15 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
int subframe_number = proc->nr_slot_rx / ue->frame_parms.slots_per_subframe;
nb_pucch_format_4_in_subframes[subframe_number] = 0; /* reset pucch format 4 counter at current rx position */
int dl_harq_pid = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid;
int dl_harq_pid = ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid;
if (dl_harq_pid < ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->number_harq_processes_for_pdsch) {
if (dl_harq_pid < ue->dlsch[proc->thread_id][gNB_id][0]->number_harq_processes_for_pdsch) {
/* pucch indicator can be reseted in function get_downlink_ack so it should be get now */
pucch_resource_indicator = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid]->harq_ack.pucch_resource_indicator;
pucch_resource_indicator = ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid]->harq_ack.pucch_resource_indicator;
}
/* Part - I
* Collect feedback that should be transmitted at this nr_tti_tx :
* Collect feedback that should be transmitted at this nr_slot_tx :
* - ACK/NACK, SR, CSI (CQI, RI, ...)
*/
@@ -261,11 +261,11 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
/* sr_payload = 1 means that this is a positive SR, sr_payload = 0 means that it is a negative SR */
sr_payload = nr_ue_get_SR(Mod_id,
CC_id,
frame_tx,
gNB_id,
0,//ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
nr_tti_tx); // nr_tti_rx used for meas gap
CC_id,
frame_tx,
gNB_id,
0,//ue->pdcch_vars[proc->thread_id][gNB_id]->crnti,
nr_slot_tx); // nr_slot_rx used for meas gap
}
else {
sr_payload = 1;
@@ -287,7 +287,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
uint16_t report_slot_csi =csi_MeasConfig->csi_ReportConfigToAddModList->list.array[0]->reportConfigType.choice.periodic->reportSlotConfig.choice.slots320;
//if (mac->csirc->reportQuantity.choice.ssb_Index_RSRP){
if (report_slot_csi == proc->nr_tti_tx)
if (report_slot_csi == proc->nr_slot_tx)
csi_status = get_csi_nr(mac, ue, gNB_id, &csi_payload);
else
csi_status = 0;
@@ -301,8 +301,8 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
if(O_ACK == 0) {
N_UCI = O_SR + O_CSI;
if ((N_UCI == 0) || ((O_CSI == 0) && (sr_payload == 0))) { /* TS 38.213 9.2.4 UE procedure for reporting SR */
NR_TST_PHY_PRINTF("PUCCH No feedback AbsSubframe %d.%d \n", frame_tx%1024, nr_tti_tx);
LOG_D(PHY,"PUCCH No feedback AbsSubframe %d.%d \n", frame_tx%1024, nr_tti_tx);
NR_TST_PHY_PRINTF("PUCCH No feedback AbsSubframe %d.%d \n", frame_tx%1024, nr_slot_tx);
LOG_D(PHY,"PUCCH No feedback AbsSubframe %d.%d \n", frame_tx%1024, nr_slot_tx);
return (FALSE);
}
else {
@@ -354,7 +354,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
int occ_length = 0;
int occ_Index = 0;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid]->harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid]->harq_ack;
if (select_pucch_resource(ue, mac, gNB_id, N_UCI, pucch_resource_indicator, &initial_pucch_id, &pucch_resource_set,
&pucch_resource_id, harq_status) == TRUE) {
@@ -389,7 +389,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
if ((ue->UE_mode[gNB_id] != PUSCH) && (O_ACK > 1)) {
O_ACK = 1;
pucch_ack_payload &= 0x1; /* take only first ack */
LOG_W(PHY,"PUCCH ue is not expected to generate more than one HARQ-ACK at AbsSubframe %d.%d \n", frame_tx%1024, nr_tti_tx);
LOG_W(PHY,"PUCCH ue is not expected to generate more than one HARQ-ACK at AbsSubframe %d.%d \n", frame_tx%1024, nr_slot_tx);
}
NR_TST_PHY_PRINTF("PUCCH common configuration with index %d \n", initial_pucch_id);
}
@@ -442,7 +442,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
}
}
else {
LOG_W(PHY,"PUCCH No PUCCH resource found at AbsSubframe %d.%d \n", frame_tx%1024, nr_tti_tx);
LOG_W(PHY,"PUCCH No PUCCH resource found at AbsSubframe %d.%d \n", frame_tx%1024, nr_slot_tx);
return (FALSE);
}
@@ -490,7 +490,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
//}
nb_symbols = nb_symbols_excluding_dmrs[nb_symbols_total-4][index_additional_dmrs][index_hopping];
nb_of_prbs = 1;
subframe_number = nr_tti_tx / ue->frame_parms.slots_per_subframe;
subframe_number = nr_slot_tx / ue->frame_parms.slots_per_subframe;
nb_pucch_format_4_in_subframes[subframe_number]++; /* increment number of transmit pucch 4 in current subframe */
NR_TST_PHY_PRINTF("PUCCH Number of pucch format 4 in subframe %d is %d \n", subframe_number, nb_pucch_format_4_in_subframes[subframe_number]);
N_sc_ctrl_RB = N_SC_RB/(nb_pucch_format_4_in_subframes[subframe_number]);
@@ -595,7 +595,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
pucch_payload = pucch_payload | (csi_payload << (O_ACK + O_SR)) | (sr_payload << O_ACK) | pucch_ack_payload;
NR_TST_PHY_PRINTF("PUCCH ( AbsSubframe : %d.%d ) ( total payload size %d data 0x%02x ) ( ack length %d data 0x%02x ) ( sr length %d value %d ) ( csi length %d data : 0x%02x ) \n",
frame_tx%1024, nr_tti_tx, N_UCI, pucch_payload, O_ACK, pucch_ack_payload, O_SR, sr_payload, csi_status, csi_payload);
frame_tx%1024, nr_slot_tx, N_UCI, pucch_payload, O_ACK, pucch_ack_payload, O_SR, sr_payload, csi_status, csi_payload);
NR_TST_PHY_PRINTF("PUCCH ( format : %d ) ( modulation : %s ) ( nb prb : %d ) ( nb symbols total: %d ) ( nb symbols : %d ) ( max code rate*100 : %d ) ( starting_symbol_index : %d ) \n",
format, (Q_m == BITS_PER_SYMBOL_QPSK ? " QPSK " : " BPSK "), nb_of_prbs, nb_symbols_total, nb_symbols, max_code_rate, starting_symbol_index);
@@ -612,8 +612,8 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
O_CRC, n_HARQ_ACK);
/* set tx power */
ue->tx_power_dBm[nr_tti_tx] = pucch_tx_power;
ue->tx_total_RE[nr_tti_tx] = nb_of_prbs*N_SC_RB;
ue->tx_power_dBm[nr_slot_tx] = pucch_tx_power;
ue->tx_total_RE[nr_slot_tx] = nb_of_prbs*N_SC_RB;
int tx_amp;
@@ -635,7 +635,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
mac->ULbwp[bwp_id-1]->bwp_Common->pucch_ConfigCommon->choice.setup->pucch_GroupHopping,
mac->ULbwp[bwp_id-1]->bwp_Common->pucch_ConfigCommon->choice.setup->hoppingId[0],
tx_amp,
nr_tti_tx,
nr_slot_tx,
(uint8_t)m_0,
(uint8_t)m_CS,
nb_symbols_total,
@@ -650,7 +650,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
&ue->pucch_config_dedicated[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
(uint8_t)m_0,
nb_symbols_total,
starting_symbol_index,
@@ -671,7 +671,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
&ue->pucch_config_dedicated[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
@@ -683,14 +683,14 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
case pucch_format4_nr:
{
nr_generate_pucch3_4(ue,
0,//ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
0,//ue->pdcch_vars[proc->thread_id][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
format,
&ue->pucch_config_dedicated[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
@@ -743,7 +743,7 @@ uint8_t get_downlink_ack(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t
int number_harq_feedback = 0;
uint32_t dai_current = 0;
uint32_t dai_max = 0;
int number_pid_dl = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->number_harq_processes_for_pdsch;
int number_pid_dl = ue->dlsch[proc->thread_id][gNB_id][0]->number_harq_processes_for_pdsch;
bool two_transport_blocks = FALSE;
int number_of_code_word = 1;
int U_DAI_c = 0;
@@ -776,7 +776,7 @@ uint8_t get_downlink_ack(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t
harq_status = &ue->dlsch[thread_idx][gNB_id][code_word]->harq_processes[dl_harq_pid]->harq_ack;
/* check if current tx slot should transmit downlink acknowlegment */
if (harq_status->slot_for_feedback_ack == proc->nr_tti_tx) {
if (harq_status->slot_for_feedback_ack == proc->nr_slot_tx) {
if (harq_status->ack == DL_ACKNACK_NO_SET) {
LOG_E(PHY,"PUCCH Downlink acknowledgment has not been set : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME);
@@ -1008,6 +1008,12 @@ boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, NR_UE_MAC_INST_t *mac, uint8
if (resource_set_found == TRUE) {
if (pucch_resource_indicator < MAX_PUCCH_RESOURCE_INDICATOR) {
// Verify that the value of pucch_resource_indicator is valid
if (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[pucch_resource_set_id]->resourceList.list.count <= pucch_resource_indicator)
{
LOG_E(PHY, "Value of pucch_resource_indicator is out of bounds! Possibly due to a false DCI. \n");
return (FALSE);
}
/* check if resource indexing by pucch_resource_indicator of this set is compatible */
if ((ready_pucch_resource_id == TRUE) || (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[pucch_resource_set_id]->resourceList.list.array[pucch_resource_indicator][0] != MAX_NB_OF_PUCCH_RESOURCES)) {
@@ -1124,7 +1130,7 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, int uci_size)
break;
}
else {
pucch_resource_set_id = 1;
pucch_resource_set_id = 1;
return (pucch_resource_set_id);
break;
}
@@ -1278,7 +1284,7 @@ int trigger_periodic_scheduling_request(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_n
}
int16_t N_slot_frame = ue->frame_parms.slots_per_frame;
if (((proc->frame_tx * N_slot_frame) + proc->nr_tti_tx - SR_offset)%SR_periodicity == 0) {
if (((proc->frame_tx * N_slot_frame) + proc->nr_slot_tx - SR_offset)%SR_periodicity == 0) {
return (1);
}
else {
+2 -1
View File
@@ -52,6 +52,7 @@
PHY_VARS_gNB *gNB;
PHY_VARS_NR_UE *UE;
RAN_CONTEXT_t RC;
UE_nr_rxtx_proc_t proc;
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
double cpuf;
@@ -559,7 +560,7 @@ int main(int argc, char **argv)
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_DECODING0, VCD_FUNCTION_IN);
ret = nr_dlsch_decoding(UE, channel_output_fixed, &UE->frame_parms,
ret = nr_dlsch_decoding(UE, &proc, 0, channel_output_fixed, &UE->frame_parms,
dlsch0_ue, dlsch0_ue->harq_processes[0], frame, nb_symb_sch,
slot,harq_pid, is_crnti, llr8_flag);
+169 -25
View File
@@ -61,7 +61,7 @@
#include "openair1/SIMULATION/TOOLS/sim.h"
#include "openair1/SIMULATION/NR_PHY/nr_unitary_defs.h"
//#include "openair1/SIMULATION/NR_PHY/nr_dummy_functions.c"
#include "PHY/NR_REFSIG/ptrs_nr.h"
#include "NR_RRCReconfiguration.h"
#define inMicroS(a) (((double)(a))/(cpu_freq_GHz*1000.0))
#include "SIMULATION/LTE_PHY/common_sim.h"
@@ -148,7 +148,8 @@ int is_x2ap_enabled(void)
// needed for some functions
openair0_config_t openair0_cfg[MAX_CARDS];
void update_ptrs_config(NR_CellGroupConfig_t *secondaryCellGroup, uint16_t *rbSize, uint8_t *mcsIndex,int8_t *ptrs_arg);
void update_dmrs_config(NR_CellGroupConfig_t *scg,PHY_VARS_NR_UE *ue, int8_t* dmrs_arg);
/* specific dlsim DL preprocessor: uses rbStart/rbSize/mcs from command line of
dlsim, does not search for CCE/PUCCH occasion but simply sets to 0 */
@@ -255,6 +256,19 @@ int main(int argc, char **argv)
int css_flag=0;
cpuf = get_cpu_freq_GHz();
int8_t enable_ptrs = 0;
int8_t modify_dmrs = 0;
int8_t dmrs_arg[2] = {-1,-1};// Invalid values
/* L_PTRS = ptrs_arg[0], K_PTRS = ptrs_arg[1] */
int8_t ptrs_arg[2] = {-1,-1};// Invalid values
uint16_t ptrsRePerSymb = 0;
uint16_t pdu_bit_map = 0x0;
uint16_t dlPtrsSymPos = 0;
uint16_t ptrsSymbPerSlot = 0;
uint16_t rbSize = 106;
uint8_t mcsIndex = 9;
if ( load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) == 0) {
exit_fun("[NR_DLSIM] Error, configuration module init failed\n");
@@ -266,7 +280,7 @@ int main(int argc, char **argv)
FILE *scg_fd=NULL;
while ((c = getopt (argc, argv, "f:hA:pf:g:i:j:n:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:e:m:w")) != -1) {
while ((c = getopt (argc, argv, "f:hA:pf:g:i:j:n:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:e:m:w:T:U:")) != -1) {
switch (c) {
case 'f':
scg_fd = fopen(optarg,"r");
@@ -450,6 +464,20 @@ int main(int argc, char **argv)
output_fd = fopen("txdata.dat", "w+");
break;
case 'T':
enable_ptrs=1;
for(i=0; i < atoi(optarg); i++) {
ptrs_arg[i] = atoi(argv[optind++]);
}
break;
case 'U':
modify_dmrs = 1;
for(i=0; i < atoi(optarg); i++) {
dmrs_arg[i] = atoi(argv[optind++]);
}
break;
default:
case 'h':
printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n",
@@ -480,6 +508,8 @@ int main(int argc, char **argv)
printf("-j Number of symbols for PDSCH (fixed for now)\n");
printf("-e MSC index\n");
printf("-t Acceptable effective throughput (in percentage)\n");
printf("-T Enable PTRS, arguments list L_PTRS{0,1,2} K_PTRS{2,4}, e.g. -T 2 0 2 \n");
printf("-U Change DMRS Config, arguments list DMRS TYPE{0=A,1=B} DMRS AddPos{0:2}, e.g. -U 2 0 2 \n");
printf("-P Print DLSCH performances\n");
printf("-w Write txdata to binary file (one frame)\n");
exit (-1);
@@ -490,6 +520,8 @@ int main(int argc, char **argv)
logInit();
set_glog(loglvl);
T_stdout = 1;
/* initialize the sin table */
InitSinLUT();
get_softmodem_params()->phy_test = 1;
@@ -578,7 +610,17 @@ int main(int argc, char **argv)
n_tx,
0);
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
/* -U option modify DMRS */
if(modify_dmrs) {
update_dmrs_config(secondaryCellGroup, NULL,dmrs_arg);
}
/* -T option enable PTRS */
if(enable_ptrs) {
update_ptrs_config(secondaryCellGroup, &rbSize, &mcsIndex, ptrs_arg);
}
//xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
AssertFatal((gNB->if_inst = NR_IF_Module_init(0))!=NULL,"Cannot register interface");
gNB->if_inst->NR_PHY_config_req = nr_phy_config_request;
@@ -686,7 +728,6 @@ int main(int argc, char **argv)
else {UE->is_synchronized = 1; UE->UE_mode[0]=PUSCH;}
UE->perfect_ce = 0;
for (i=0;i<10;i++) UE->current_thread_id[i] = 0;
if (init_nr_ue_signal(UE, 1, 0) != 0)
{
@@ -694,6 +735,9 @@ int main(int argc, char **argv)
exit(-1);
}
if(modify_dmrs) {
update_dmrs_config( NULL,UE,dmrs_arg);
}
init_nr_ue_transport(UE,0);
nr_gold_pbch(UE);
@@ -748,7 +792,7 @@ int main(int argc, char **argv)
scheduled_response.CC_id = 0;
scheduled_response.frame = frame;
scheduled_response.slot = slot;
scheduled_response.thread_id = UE_proc.thread_id;
nr_ue_phy_config_request(&UE_mac->phy_config);
NR_UE_info_t *UE_info = &RC.nrmac[0]->UE_info;
@@ -787,14 +831,14 @@ int main(int argc, char **argv)
//multipath_channel(gNB2UE,s_re,s_im,r_re,r_im,frame_length_complex_samples,0);
UE->rx_offset=0;
UE_proc.frame_rx = frame;
UE_proc.nr_tti_rx= slot;
UE_proc.subframe_rx = slot;
UE_proc.thread_id = 0;
UE_proc.frame_rx = frame;
UE_proc.nr_slot_rx = slot;
dcireq.frame = frame;
dcireq.slot = slot;
NR_UE_DLSCH_t *dlsch0 = UE->dlsch[UE->current_thread_id[UE_proc.nr_tti_rx]][0][0];
NR_UE_DLSCH_t *dlsch0 = UE->dlsch[UE_proc.thread_id][0][0];
int harq_pid = slot;
NR_DL_UE_HARQ_t *UE_harq_process = dlsch0->harq_processes[harq_pid];
@@ -838,7 +882,22 @@ int main(int argc, char **argv)
Sched_INFO.UL_dci_req = NULL;
Sched_INFO.TX_req = &gNB_mac->TX_req[0];
nr_schedule_response(&Sched_INFO);
/* PTRS values for DLSIM calculations */
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[Sched_INFO.CC_id].dl_tti_request_body;
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[1];
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
pdu_bit_map = pdsch_pdu_rel15->pduBitmap;
if(pdu_bit_map & 0x1) {
set_ptrs_symb_idx(&dlPtrsSymPos,
pdsch_pdu_rel15->NrOfSymbols,
pdsch_pdu_rel15->StartSymbolIndex,
1<<pdsch_pdu_rel15->PTRSTimeDensity,
pdsch_pdu_rel15->dlDmrsSymbPos);
ptrsSymbPerSlot = get_ptrs_symbols_in_slot(dlPtrsSymPos, pdsch_pdu_rel15->StartSymbolIndex, pdsch_pdu_rel15->NrOfSymbols);
ptrsRePerSymb = ((rel15->rbSize + rel15->PTRSFreqDensity - 1)/rel15->PTRSFreqDensity);
printf("[DLSIM] PTRS Symbols in a slot: %2u, RE per Symbol: %3u, RE in a slot %4d\n", ptrsSymbPerSlot,ptrsRePerSymb, ptrsSymbPerSlot*ptrsRePerSymb );
}
if (run_initial_sync)
nr_common_signal_procedures(gNB,frame,slot);
else
@@ -895,7 +954,7 @@ int main(int argc, char **argv)
r_im[aa][i] = ((double)(((short *)txdata[aa]))[(i<<1)+1]);
}
}
double ts = 1.0/(frame_parms->subcarrier_spacing * frame_parms->ofdm_symbol_size);
//AWGN
sigma2_dB = 10 * log10((double)txlev * ((double)UE->frame_parms.ofdm_symbol_size/(12*rel15->rbSize))) - SNR;
sigma2 = pow(10, sigma2_dB/10);
@@ -908,6 +967,11 @@ int main(int argc, char **argv)
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
((short*) UE->common_vars.rxdata[aa])[2*i] = (short) ((r_re[aa][i] + sqrt(sigma2/2)*gaussdouble(0.0,1.0)));
((short*) UE->common_vars.rxdata[aa])[2*i+1] = (short) ((r_im[aa][i] + sqrt(sigma2/2)*gaussdouble(0.0,1.0)));
/* Add phase noise if enabled */
if (pdu_bit_map & 0x1) {
phase_noise(ts, &((short*) UE->common_vars.rxdata[aa])[2*i],
&((short*) UE->common_vars.rxdata[aa])[2*i+1]);
}
}
}
@@ -926,22 +990,26 @@ int main(int argc, char **argv)
//----------------------------------------------------------
//---------------------- count errors ----------------------
//----------------------------------------------------------
if (UE->dlsch[UE->current_thread_id[slot]][0][0]->last_iteration_cnt >=
UE->dlsch[UE->current_thread_id[slot]][0][0]->max_ldpc_iterations+1)
if (UE->dlsch[UE_proc.thread_id][0][0]->last_iteration_cnt >=
UE->dlsch[UE_proc.thread_id][0][0]->max_ldpc_iterations+1)
n_errors++;
NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE->current_thread_id[UE_proc.nr_tti_rx]];
NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE_proc.thread_id];
int16_t *UE_llr = pdsch_vars[0]->llr[0];
TBS = UE_harq_process->TBS;//rel15->TBSize[0];
uint16_t length_dmrs = 1;
uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos);
uint16_t nb_rb = rel15->rbSize;
uint8_t nb_re_dmrs = rel15->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4;
uint8_t mod_order = rel15->qamModOrder[0];
uint8_t nb_symb_sch = rel15->NrOfSymbols;
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, rel15->nrOfLayers);
if(pdu_bit_map & 0x1) {
available_bits-= (ptrsSymbPerSlot * ptrsRePerSymb *rel15->nrOfLayers* 2);
printf("[DLSIM][PTRS] Available bits are: %5u, removed PTRS bits are: %5u \n",available_bits, (ptrsSymbPerSlot * ptrsRePerSymb *rel15->nrOfLayers* 2) );
}
for (i = 0; i < available_bits; i++) {
@@ -993,7 +1061,7 @@ int main(int argc, char **argv)
printf("*****************************************\n");
printf("\n");
dump_pdsch_stats(gNB);
printf("SNR %f : n_errors (negative CRC) = %d/%d, Avg round %.2f, Channel BER %e, Eff Rate %.4f bits/slot, Eff Throughput %.2f, TBS %d bits/slot\n", SNR, n_errors, n_trials,roundStats[snrRun],(double)errors_scrambling/available_bits/n_trials,effRate,effRate/TBS*100,TBS);
printf("SNR %f : n_errors (negative CRC) = %d/%d, Avg round %.2f, Channel BER %e, Eff Rate %.4f bits/slot, Eff Throughput %.2f, TBS %u bits/slot\n", SNR, n_errors, n_trials,roundStats[snrRun],(double)errors_scrambling/available_bits/n_trials,effRate,effRate/TBS*100,TBS);
printf("\n");
if (print_perf==1) {
@@ -1030,9 +1098,9 @@ int main(int argc, char **argv)
printStatIndent(&UE->dlsch_unscrambling_stats,"DLSCH unscrambling time");
printStatIndent(&UE->dlsch_rate_unmatching_stats,"DLSCH Rate Unmatching");
printf("|__ DLSCH Turbo Decoding(%d bits), avg iterations: %.1f %.2f us (%d cycles, %d trials)\n",
UE->dlsch[UE->current_thread_id[subframe]][0][0]->harq_processes[0]->Cminus ?
UE->dlsch[UE->current_thread_id[subframe]][0][0]->harq_processes[0]->Kminus :
UE->dlsch[UE->current_thread_id[subframe]][0][0]->harq_processes[0]->Kplus,
UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Cminus ?
UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Kminus :
UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Kplus,
UE->dlsch_tc_intl1_stats.trials/(double)UE->dlsch_tc_init_stats.trials,
(double)UE->dlsch_turbo_decoding_stats.diff/UE->dlsch_turbo_decoding_stats.trials*timeBase,
(int)((double)UE->dlsch_turbo_decoding_stats.diff/UE->dlsch_turbo_decoding_stats.trials),
@@ -1054,7 +1122,7 @@ int main(int argc, char **argv)
LOG_M("rxsig1.m","rxs1", UE->common_vars.rxdata[1], frame_length_complex_samples, 1, 1);
LOG_M("chestF0.m","chF0",UE->pdsch_vars[0][0]->dl_ch_estimates_ext,N_RB_DL*12*14,1,1);
write_output("rxF_comp.m","rxFc",&UE->pdsch_vars[0][0]->rxdataF_comp0[0][0],N_RB_DL*12*14,1,1);
LOG_M("rxF_llr.m","rxFllr",UE->pdsch_vars[UE->current_thread_id[UE_proc.nr_tti_rx]][0]->llr[0],available_bits,1,0);
LOG_M("rxF_llr.m","rxFllr",UE->pdsch_vars[UE_proc.thread_id][0]->llr[0],available_bits,1,0);
break;
}
@@ -1103,3 +1171,79 @@ int main(int argc, char **argv)
return(n_errors);
}
void update_ptrs_config(NR_CellGroupConfig_t *secondaryCellGroup, uint16_t *rbSize, uint8_t *mcsIndex, int8_t *ptrs_arg)
{
NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[0];
int *ptrsFreqDenst = calloc(2, sizeof(long));
ptrsFreqDenst[0]= 25;
ptrsFreqDenst[1]= 115;
int *ptrsTimeDenst = calloc(3, sizeof(long));
ptrsTimeDenst[0]= 2;
ptrsTimeDenst[1]= 4;
ptrsTimeDenst[2]= 10;
int epre_Ratio = 0;
int reOffset = 0;
if(ptrs_arg[0] ==0) {
ptrsTimeDenst[2]= *mcsIndex -1;
}
else if(ptrs_arg[0] == 1) {
ptrsTimeDenst[1]= *mcsIndex - 1;
ptrsTimeDenst[2]= *mcsIndex + 1;
}
else if(ptrs_arg[0] ==2) {
ptrsTimeDenst[0]= *mcsIndex - 1;
ptrsTimeDenst[1]= *mcsIndex + 1;
}
else {
printf("[DLSIM] Wrong L_PTRS value, using default values 1\n");
}
/* L = 4 if Imcs < MCS4 */
if(ptrs_arg[1] ==2) {
ptrsFreqDenst[0]= *rbSize - 1;
ptrsFreqDenst[1]= *rbSize + 1;
}
else if(ptrs_arg[1] == 4) {
ptrsFreqDenst[1]= *rbSize - 1;
}
else {
printf("[DLSIM] Wrong K_PTRS value, using default values 2\n");
}
printf("[DLSIM] PTRS Enabled with L %d, K %d \n", 1<<ptrs_arg[0], ptrs_arg[1] );
/* overwrite the values */
rrc_config_dl_ptrs_params(bwp, ptrsFreqDenst, ptrsTimeDenst, &epre_Ratio, &reOffset);
}
void update_dmrs_config(NR_CellGroupConfig_t *scg,PHY_VARS_NR_UE *ue, int8_t* dmrs_arg)
{
int8_t mapping_type = typeA;//default value
int8_t add_pos = pdsch_dmrs_pos0;//default value
if(dmrs_arg[0] == 0) {
mapping_type = typeA;
}
else if (dmrs_arg[0] == 1) {
mapping_type = typeB;
}
/* Additional DMRS positions 0 ,1 and 2 */
if(dmrs_arg[1] >= 0 && dmrs_arg[1] <3 ) {
add_pos = dmrs_arg[1];
}
if(scg != NULL) {
NR_BWP_Downlink_t *bwp = scg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[0];
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = add_pos;
for (int i=0;i<bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;i++) {
bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->mappingType = mapping_type;
}
}
if(ue != NULL) {
for (int i=0;i<MAX_NR_OF_DL_ALLOCATIONS;i++) {
ue->PDSCH_Config.pdsch_TimeDomainResourceAllocation[i]->mappingType = mapping_type;
}
ue->dmrs_DownlinkConfig.pdsch_dmrs_AdditionalPosition = add_pos;
}
printf("[DLSIM] DMRS Config is modified with Mapping Type %d, Additional Positions %d \n", dmrs_arg[0], dmrs_arg[1] );
}
+2 -2
View File
@@ -235,8 +235,8 @@ void fill_scc(NR_ServingCellConfigCommon_t *scc,uint64_t *ssb_bitmap,int N_RB_DL
void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap);
void prepare_scc(NR_ServingCellConfigCommon_t *scc);
s1ap_eNB_config_t s1ap_config;
uint32_t s1ap_generate_eNB_id(void) {return 0;}
ngap_gNB_config_t ngap_config;
uint32_t ngap_generate_gNB_id(void) {return 0;}
void configure_nfapi_pnf(char *vnf_ip_addr, int vnf_p5_port, char *pnf_ip_addr, int pnf_p7_port, int vnf_p7_port) { return;}
void configure_nfapi_vnf(char *vnf_addr, int vnf_p5_port) { return;}
+8 -7
View File
@@ -680,6 +680,7 @@ int main(int argc, char **argv)
if (ret<0) n_errors++;
}
else {
UE_nr_rxtx_proc_t proc={0};
UE->rx_offset=0;
uint8_t ssb_index = 0;
while (!((SSB_positions >> ssb_index) & 0x01)) ssb_index++; // to select the first transmitted ssb
@@ -688,16 +689,16 @@ int main(int argc, char **argv)
int ssb_slot = (ssb_index>>1)+(n_hf*frame_parms->slots_per_frame);
for (int i=UE->symbol_offset+1; i<UE->symbol_offset+4; i++) {
nr_slot_fep(UE,
i%frame_parms->symbols_per_slot,
ssb_slot,
0,
0);
nr_slot_fep(UE,
&proc,
i%frame_parms->symbols_per_slot,
ssb_slot,
0,
0);
nr_pbch_channel_estimation(UE,0,ssb_slot,i%frame_parms->symbols_per_slot,i-(UE->symbol_offset+1),ssb_index%8,n_hf);
nr_pbch_channel_estimation(UE,&proc,0,ssb_slot,i%frame_parms->symbols_per_slot,i-(UE->symbol_offset+1),ssb_index%8,n_hf);
}
UE_nr_rxtx_proc_t proc={0};
ret = nr_rx_pbch(UE,
&proc,
+28 -16
View File
@@ -116,10 +116,10 @@ int main(int argc, char **argv){
int i, aa, aarx, **txdata, trial, n_frames = 1, prach_start, rx_prach_start; //, ntrials=1;
int N_RB_UL = 106, delay = 0, NCS_config = 13, rootSequenceIndex = 1, threequarter_fs = 0, mu = 1, fd_occasion = 0, loglvl = OAILOG_INFO, numRA = 0, prachStartSymbol = 0;
uint8_t snr1set = 0, ue_speed1set = 0, transmission_mode = 1, n_tx = 1, n_rx = 1, awgn_flag = 0, msg1_frequencystart = 0, num_prach_fd_occasions = 1, prach_format=0;
uint8_t frame = 1, subframe = 9, slot=19, slot_gNB=19, config_index = 98, prach_sequence_length = 1, restrictedSetConfig = 0, N_dur, N_t_slot, start_symbol;
uint8_t frame = 1, slot=19, slot_gNB=19, config_index = 98, prach_sequence_length = 1, restrictedSetConfig = 0, N_dur, N_t_slot, start_symbol;
uint16_t Nid_cell = 0, preamble_tx = 0, preamble_delay, format, format0, format1;
uint32_t tx_lev = 10000, prach_errors = 0; //,tx_lev_dB;
uint64_t SSB_positions = 0x01, absoluteFrequencyPointA = 640000;
uint64_t SSB_positions = 0x01;
uint16_t RA_sfn_index;
uint8_t N_RA_slot;
uint8_t config_period;
@@ -153,7 +153,7 @@ int main(int argc, char **argv){
randominit(0);
while ((c = getopt (argc, argv, "hHaA:Cc:r:p:g:n:s:S:t:x:y:v:V:z:N:F:d:Z:L:R:E")) != -1) {
while ((c = getopt (argc, argv, "hHaA:Cc:r:p:g:m:n:s:S:t:x:y:v:V:z:N:F:d:Z:L:R:E")) != -1) {
switch (c) {
case 'a':
printf("Running AWGN simulation\n");
@@ -243,6 +243,10 @@ int main(int argc, char **argv){
threequarter_fs=1;
break;
case 'm':
mu = atoi(optarg);
break;
case 'n':
n_frames = atoi(optarg);
break;
@@ -370,13 +374,6 @@ int main(int argc, char **argv){
}
}
if (config_index<67) { prach_sequence_length=0; slot = subframe*2; slot_gNB = 1+(subframe*2); }
uint16_t N_ZC;
N_ZC = prach_sequence_length == 0 ? 839 : 139;
printf("Config_index %d, prach_sequence_length %d\n",config_index,prach_sequence_length);
// Configure log
logInit();
set_glog(loglvl);
@@ -411,12 +408,20 @@ int main(int argc, char **argv){
frame_parms->N_RB_UL = N_RB_UL;
frame_parms->threequarter_fs = threequarter_fs;
frame_parms->frame_type = TDD;
frame_parms->freq_range = nr_FR1;
frame_parms->freq_range = (mu==1 ? nr_FR1 : nr_FR2);
frame_parms->numerology_index = mu;
nr_phy_config_request_sim(gNB, N_RB_UL, N_RB_UL, mu, Nid_cell, SSB_positions);
//nsymb = (frame_parms->Ncp == 0) ? 14 : 12;
uint64_t absoluteFrequencyPointA = (mu==1 ? 640000 : 2070833);
uint8_t subframe = slot/frame_parms->slots_per_subframe;
if (config_index<67 && mu==1) { prach_sequence_length=0; slot = subframe*2; slot_gNB = 1+(subframe*2); }
uint16_t N_ZC = prach_sequence_length == 0 ? 839 : 139;
printf("Config_index %d, prach_sequence_length %d\n",config_index,prach_sequence_length);
printf("FFT Size %d, Extended Prefix %d, Samples per subframe %d, Frame type %s, Frequency Range %s\n",
NUMBER_OF_OFDM_CARRIERS,
@@ -432,7 +437,14 @@ int main(int argc, char **argv){
gNB->gNB_config.carrier_config.num_tx_ant.value = 1;
gNB->gNB_config.carrier_config.num_rx_ant.value = 1;
gNB->gNB_config.tdd_table.tdd_period.value = 6;
if (mu==1)
gNB->gNB_config.tdd_table.tdd_period.value = 6;
else if (mu==3)
gNB->gNB_config.tdd_table.tdd_period.value = 3;
else {
printf("unsupported numerology %d\n",mu);
exit(-1);
}
gNB->gNB_config.prach_config.num_prach_fd_occasions.value = num_prach_fd_occasions;
gNB->gNB_config.prach_config.num_prach_fd_occasions_list = (nfapi_nr_num_prach_fd_occasions_t *) malloc(num_prach_fd_occasions*sizeof(nfapi_nr_num_prach_fd_occasions_t));
@@ -627,8 +639,8 @@ int main(int argc, char **argv){
subframe); */ //commented for testing purpose
UE_nr_rxtx_proc_t proc={0};
proc.frame_tx = frame;
proc.nr_tti_tx = slot;
proc.frame_tx = frame;
proc.nr_slot_tx = slot;
nr_ue_prach_procedures(UE,&proc,0,0);
/* tx_lev_dB not used later, no need to set */
@@ -752,7 +764,7 @@ int main(int argc, char **argv){
LOG_M("prachF0.m","prachF0", &gNB->prach_vars.prachF[0], N_ZC, 1, 1);
LOG_M("rxsig0.m","rxs0", &gNB->common_vars.rxdata[0][subframe*frame_parms->samples_per_subframe], frame_parms->samples_per_subframe, 1, 1);
LOG_M("ru_rxsig0.m","rxs0", &ru->common.rxdata[0][subframe*frame_parms->samples_per_subframe], frame_parms->samples_per_subframe, 1, 1);
LOG_M("rxsigF0.m","rxsF0", gNB->prach_vars.rxsigF[0], N_ZC, 1, 1);
LOG_M("ru_rxsigF0.m","rxsF0", ru->prach_rxsigF[0][0], N_ZC, 1, 1);
LOG_M("prach_preamble.m","prachp", &gNB->X_u[0], N_ZC, 1, 1);
LOG_M("ue_prach_preamble.m","prachp", &UE->X_u[0], N_ZC, 1, 1);
#endif
+48 -48
View File
@@ -90,7 +90,7 @@ int main(int argc, char **argv)
FILE *input_fd=NULL;
//uint8_t nacktoack_flag=0;
int16_t amp=0x7FFF;
int nr_tti_tx=0;
int nr_slot_tx=0;
uint64_t actual_payload=0,payload_received;
int nr_bit=1; // maximum value possible is 2
uint8_t m0=0;// higher layer paramater initial cyclic shift
@@ -501,13 +501,13 @@ int main(int argc, char **argv)
for (trial=0; trial<n_trials; trial++) {
bzero(txdataF[aa],frame_parms->ofdm_symbol_size*sizeof(int));
if(format==0){
nr_generate_pucch0(UE,txdataF,frame_parms,PUCCH_GroupHopping,hopping_id,amp,nr_tti_tx,m0,mcs,nrofSymbols,startingSymbolIndex,startingPRB);
nr_generate_pucch0(UE,txdataF,frame_parms,PUCCH_GroupHopping,hopping_id,amp,nr_slot_tx,m0,mcs,nrofSymbols,startingSymbolIndex,startingPRB);
}
else if (format == 1){
nr_generate_pucch1(UE,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_tti_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,0,nr_bit);
nr_generate_pucch1(UE,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_slot_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,0,nr_bit);
}
else {
nr_generate_pucch2(UE,0x1234,dmrs_scrambling_id,data_scrambling_id,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_tti_tx,nrofSymbols,startingSymbolIndex,nrofPRB,startingPRB,nr_bit);
nr_generate_pucch2(UE,0x1234,dmrs_scrambling_id,data_scrambling_id,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_slot_tx,nrofSymbols,startingSymbolIndex,nrofPRB,startingPRB,nr_bit);
}
int txlev = signal_energy(&txdataF[aa][startingSymbolIndex*frame_parms->ofdm_symbol_size],
@@ -536,21 +536,21 @@ int main(int argc, char **argv)
if (n_trials==1) printf("rxlev %d (%d dB), sigma2 %f dB, SNR %f, TX %f\n",rxlev,dB_fixed(rxlev),sigma2_dB,SNR,10*log10((double)txlev*UE->frame_parms.ofdm_symbol_size/12));
if(format==0){
nfapi_nr_uci_pucch_pdu_format_0_1_t uci_pdu;
nfapi_nr_pucch_pdu_t pucch_pdu;
pucch_pdu.subcarrier_spacing = 1;
pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1;
pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1;
pucch_pdu.bit_len_harq = nr_bit;
pucch_pdu.bit_len_csi_part1 = 0;
pucch_pdu.bit_len_csi_part2 = 0;
pucch_pdu.sr_flag = sr_flag;
pucch_pdu.nr_of_symbols = nrofSymbols;
pucch_pdu.hopping_id = hopping_id;
pucch_pdu.initial_cyclic_shift = 0;
pucch_pdu.start_symbol_index = startingSymbolIndex;
pucch_pdu.prb_start = startingPRB;
nr_decode_pucch0(gNB,nr_tti_tx,&uci_pdu,&pucch_pdu);
nfapi_nr_uci_pucch_pdu_format_0_1_t uci_pdu;
nfapi_nr_pucch_pdu_t pucch_pdu;
pucch_pdu.subcarrier_spacing = 1;
pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1;
pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1;
pucch_pdu.bit_len_harq = nr_bit;
pucch_pdu.bit_len_csi_part1 = 0;
pucch_pdu.bit_len_csi_part2 = 0;
pucch_pdu.sr_flag = sr_flag;
pucch_pdu.nr_of_symbols = nrofSymbols;
pucch_pdu.hopping_id = hopping_id;
pucch_pdu.initial_cyclic_shift = 0;
pucch_pdu.start_symbol_index = startingSymbolIndex;
pucch_pdu.prb_start = startingPRB;
nr_decode_pucch0(gNB,nr_slot_tx,&uci_pdu,&pucch_pdu);
if(sr_flag==1){
if (uci_pdu.sr->sr_indication == 0 || uci_pdu.sr->sr_confidence_level == 1)
sr_errors+=1;
@@ -565,7 +565,7 @@ int main(int argc, char **argv)
}
else if (format==1) {
nr_decode_pucch1(rxdataF,PUCCH_GroupHopping,hopping_id,
&(payload_received),frame_parms,amp,nr_tti_tx,
&(payload_received),frame_parms,amp,nr_slot_tx,
m0,nrofSymbols,startingSymbolIndex,startingPRB,
startingPRB_intraSlotHopping,timeDomainOCC,nr_bit);
if(nr_bit==1)
@@ -574,34 +574,34 @@ int main(int argc, char **argv)
ack_nack_errors+=((actual_payload^payload_received)&1) + (((actual_payload^payload_received)&2)>>1);
}
else if (format==2) {
nfapi_nr_uci_pucch_pdu_format_2_3_4_t uci_pdu;
nfapi_nr_pucch_pdu_t pucch_pdu;
pucch_pdu.rnti = 0x1234;
pucch_pdu.subcarrier_spacing = 1;
pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1;
pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1;
pucch_pdu.bit_len_csi_part1 = nr_bit;
pucch_pdu.bit_len_harq = 0;
pucch_pdu.bit_len_csi_part2 = 0;
pucch_pdu.sr_flag = 0;
pucch_pdu.nr_of_symbols = nrofSymbols;
pucch_pdu.hopping_id = hopping_id;
pucch_pdu.initial_cyclic_shift = 0;
pucch_pdu.start_symbol_index = startingSymbolIndex;
pucch_pdu.prb_size = nrofPRB;
pucch_pdu.prb_start = startingPRB;
pucch_pdu.dmrs_scrambling_id = dmrs_scrambling_id;
pucch_pdu.data_scrambling_id = data_scrambling_id;
nr_decode_pucch2(gNB,nr_tti_tx,&uci_pdu,&pucch_pdu);
int csi_part1_bytes=pucch_pdu.bit_len_csi_part1>>3;
if ((pucch_pdu.bit_len_csi_part1&7) > 0) csi_part1_bytes++;
for (int i=0;i<csi_part1_bytes;i++) {
if (uci_pdu.csi_part1.csi_part1_payload[i] != ((uint8_t*)&actual_payload)[i]) {
ack_nack_errors++;
break;
}
}
free(uci_pdu.csi_part1.csi_part1_payload);
nfapi_nr_uci_pucch_pdu_format_2_3_4_t uci_pdu;
nfapi_nr_pucch_pdu_t pucch_pdu;
pucch_pdu.rnti = 0x1234;
pucch_pdu.subcarrier_spacing = 1;
pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1;
pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1;
pucch_pdu.bit_len_csi_part1 = nr_bit;
pucch_pdu.bit_len_harq = 0;
pucch_pdu.bit_len_csi_part2 = 0;
pucch_pdu.sr_flag = 0;
pucch_pdu.nr_of_symbols = nrofSymbols;
pucch_pdu.hopping_id = hopping_id;
pucch_pdu.initial_cyclic_shift = 0;
pucch_pdu.start_symbol_index = startingSymbolIndex;
pucch_pdu.prb_size = nrofPRB;
pucch_pdu.prb_start = startingPRB;
pucch_pdu.dmrs_scrambling_id = dmrs_scrambling_id;
pucch_pdu.data_scrambling_id = data_scrambling_id;
nr_decode_pucch2(gNB,nr_slot_tx,&uci_pdu,&pucch_pdu);
int csi_part1_bytes=pucch_pdu.bit_len_csi_part1>>3;
if ((pucch_pdu.bit_len_csi_part1&7) > 0) csi_part1_bytes++;
for (int i=0;i<csi_part1_bytes;i++) {
if (uci_pdu.csi_part1.csi_part1_payload[i] != ((uint8_t*)&actual_payload)[i]) {
ack_nack_errors++;
break;
}
}
free(uci_pdu.csi_part1.csi_part1_payload);
}
n_errors=((actual_payload^payload_received)&1)+(((actual_payload^payload_received)&2)>>1)+(((actual_payload^payload_received)&4)>>2)+n_errors;
+1 -1
View File
@@ -81,7 +81,7 @@ int nr_postDecode_sim(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
if (decodeSuccess) {
memcpy(ulsch_harq->b+rdata->offset,
ulsch_harq->c[r],
rdata->Kr_bytes- - (ulsch_harq->F>>3) -((ulsch_harq->C>1)?3:0));
rdata->Kr_bytes - (ulsch_harq->F>>3) -((ulsch_harq->C>1)?3:0));
} else {
if ( rdata->nbSegments != ulsch_harq->processedSegments ) {
int nb=abortTpool(gNB->threadPool, req->key);
+29 -18
View File
@@ -56,7 +56,7 @@
#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h"
#include "openair2/LAYER2/NR_MAC_gNB/mac_proto.h"
#include "common/utils/threadPool/thread-pool.h"
#include "PHY/NR_REFSIG/ptrs_nr.h"
#define inMicroS(a) (((double)(a))/(cpu_freq_GHz*1000.0))
#include "SIMULATION/LTE_PHY/common_sim.h"
@@ -164,8 +164,7 @@ int main(int argc, char **argv)
FILE *input_fd = NULL;
SCM_t channel_model = AWGN; //Rayleigh1_anticorr;
uint16_t N_RB_DL = 106, N_RB_UL = 106, mu = 1;
double tx_gain=1.0;
double N0=30;
NB_UE_INST = 1;
//unsigned char frame_type = 0;
@@ -180,7 +179,6 @@ int main(int argc, char **argv)
int gNB_id = 0;
int ap;
int tx_offset;
double txlev_float;
int32_t txlev;
int start_rb = 0;
int UE_id =0; // [hna] only works for UE_id = 0 because NUMBER_OF_NR_UE_MAX is set to 1 (phy_init_nr_gNB causes segmentation fault)
@@ -200,6 +198,9 @@ int main(int argc, char **argv)
int ptrs_arg[2] = {-1,-1};// Invalid values
/* DMRS TYPE = dmrs_arg[0], Add Pos = dmrs_arg[1] */
int dmrs_arg[2] = {-1,-1};// Invalid values
uint16_t ptrsSymPos = 0;
uint16_t ptrsSymbPerSlot = 0;
uint16_t ptrsRePerSymb = 0;
UE_nr_rxtx_proc_t UE_proc;
FILE *scg_fd=NULL;
@@ -218,6 +219,9 @@ int main(int argc, char **argv)
//logInit();
randominit(0);
/* initialize the sin-cos table */
InitSinLUT();
while ((c = getopt(argc, argv, "a:b:c:d:ef:g:h:i:j:kl:m:n:p:r:s:y:z:F:G:H:M:N:PR:S:T:U:L:")) != -1) {
printf("handling optarg %c\n",c);
switch (c) {
@@ -834,7 +838,8 @@ int main(int argc, char **argv)
gNB->ulsch[0][0]->harq_processes[harq_pid]->round = round;
rv_index = nr_rv_round_map[round];
UE_proc.nr_tti_tx = slot;
UE_proc.thread_id = 0;
UE_proc.nr_slot_tx = slot;
UE_proc.frame_tx = frame;
UL_tti_req->SFN = frame;
@@ -905,6 +910,7 @@ int main(int argc, char **argv)
scheduled_response.CC_id = 0;
scheduled_response.frame = frame;
scheduled_response.slot = slot;
scheduled_response.thread_id = UE_proc.thread_id;
scheduled_response.dl_config = NULL;
scheduled_response.ul_config = &ul_config;
scheduled_response.tx_request = &tx_req;
@@ -949,8 +955,6 @@ int main(int argc, char **argv)
nr_fill_ulsch(gNB,frame,slot,pusch_pdu);
for (int i=0;i<(TBS/8);i++) ulsch_ue[0]->harq_processes[harq_pid]->a[i]=i&0xff;
double scale = 1;
if (input_fd == NULL) {
// set FAPI parameters for UE, put them in the scheduled response and call
@@ -960,7 +964,7 @@ int main(int argc, char **argv)
/////////////////////////phy_procedures_nr_ue_TX///////////////////////
///////////
phy_procedures_nrUE_TX(UE, &UE_proc, gNB_id, 0);
phy_procedures_nrUE_TX(UE, &UE_proc, gNB_id);
if (n_trials==1) {
@@ -973,20 +977,16 @@ int main(int argc, char **argv)
txlev = signal_energy(&UE->common_vars.txdata[0][tx_offset + 5*frame_parms->ofdm_symbol_size + 4*frame_parms->nb_prefix_samples + frame_parms->nb_prefix_samples0],
frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples);
txlev_float = (double)txlev/scale; // output of signal_energy is fixed point representation
}
else n_trials = 1;
if (input_fd == NULL ) {
sigma_dB = N0;
sigma_dB = 10 * log10((double)txlev * ((double)frame_parms->ofdm_symbol_size/(12*nb_rb))) - SNR;;
sigma = pow(10,sigma_dB/10);
tx_gain = sqrt(pow(10.0,.1*(N0+SNR))/txlev_float);
if(n_trials==1) printf("txlev_float %f, sigma_dB %f, tx_gain %f tx_offset %d, slot_offset %d\n",10*log10(txlev_float),sigma_dB,tx_gain,tx_offset,slot_offset);
if(n_trials==1) printf("sigma %f (%f dB), txlev %f (factor %f)\n",sigma,sigma_dB,10*log10((double)txlev),(double)(double)frame_parms->ofdm_symbol_size/(12*nb_rb));
for (i=0; i<slot_length; i++) {
for (int aa=0; aa<1; aa++) {
@@ -1005,8 +1005,8 @@ int main(int argc, char **argv)
}
for (i=0; i<slot_length; i++) {
for (ap=0; ap<frame_parms->nb_antennas_rx; ap++) {
((int16_t*) &gNB->common_vars.rxdata[ap][slot_offset])[(2*i) + (delay*2)] = (int16_t)((tx_gain*r_re[ap][i]) + (sqrt(sigma/2)*gaussdouble(0.0,1.0))); // convert to fixed point
((int16_t*) &gNB->common_vars.rxdata[ap][slot_offset])[(2*i)+1 + (delay*2)] = (int16_t)((tx_gain*r_im[ap][i]) + (sqrt(sigma/2)*gaussdouble(0.0,1.0)));
((int16_t*) &gNB->common_vars.rxdata[ap][slot_offset])[(2*i) + (delay*2)] = (int16_t)((r_re[ap][i]) + (sqrt(sigma/2)*gaussdouble(0.0,1.0))); // convert to fixed point
((int16_t*) &gNB->common_vars.rxdata[ap][slot_offset])[(2*i)+1 + (delay*2)] = (int16_t)((r_im[ap][i]) + (sqrt(sigma/2)*gaussdouble(0.0,1.0)));
/* Add phase noise if enabled */
if (pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) {
phase_noise(ts, &((int16_t*)&gNB->common_vars.rxdata[ap][slot_offset])[(2*i)],
@@ -1017,6 +1017,17 @@ int main(int argc, char **argv)
}
if(pusch_pdu->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) {
set_ptrs_symb_idx(&ptrsSymPos,
pusch_pdu->nr_of_symbols,
pusch_pdu->start_symbol_index,
1<<ptrs_time_density,
pusch_pdu->ul_dmrs_symb_pos);
ptrsSymbPerSlot = get_ptrs_symbols_in_slot(ptrsSymPos, pusch_pdu->start_symbol_index, pusch_pdu->nr_of_symbols);
ptrsRePerSymb = ((pusch_pdu->rb_size + ptrs_freq_density - 1)/ptrs_freq_density);
printf("[ULSIM] PTRS Symbols in a slot: %2u, RE per Symbol: %3u, RE in a slot %4d\n", ptrsSymbPerSlot,ptrsRePerSymb, ptrsSymbPerSlot*ptrsRePerSymb );
}
////////////////////////////////////////////////////////////
//----------------------------------------------------------
@@ -1081,7 +1092,7 @@ int main(int argc, char **argv)
}
/* 2*5*(50/2), for RB = 50,K = 2 for 5 OFDM PTRS symbols */
available_bits -= 2 * ptrs_symbols * ((nb_rb + ptrs_freq_density - 1) /ptrs_freq_density);
printf("After PTRS subtraction available_bits are : %u \n", available_bits);
printf("[ULSIM][PTRS] Available bits are: %5u, removed PTRS bits are: %5d \n",available_bits, (ptrsSymbPerSlot * ptrsRePerSymb * 2) );
}
for (i = 0; i < available_bits; i++) {
@@ -94,6 +94,7 @@ extern int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode);
int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int pss_sequence_number)
{
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
UE_nr_rxtx_proc_t proc = {0};
int synchro_position;
int offset;
int16_t *tmp;
@@ -130,7 +131,7 @@ int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, in
#endif
rx_sss_nr(PHY_vars_UE, &metric_fdd_ncp, &phase_fdd_ncp);
rx_sss_nr(PHY_vars_UE, &proc, &metric_fdd_ncp, &phase_fdd_ncp);
#if TEST_SYNCHRO_TIMING_PSS
@@ -244,7 +245,7 @@ void set_sequence_sss(PHY_VARS_NR_UE *PHY_vars_UE, int offset, int slot_offset)
void insert_sequence_sss(PHY_VARS_NR_UE *PHY_vars_UE, int offset)
{
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int samples_for_half_frame = (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti)>>1;
int samples_for_half_frame = frame_parms->samples_per_frame / 2;
set_sequence_sss(PHY_vars_UE, offset, 0);
@@ -327,7 +328,7 @@ int test_synchro_pss_sss(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int s
int sync_pos2 = synchro_position - frame_parms->nb_prefix_samples;
int sync_pos_slot = (frame_parms->samples_per_tti>>1) - frame_parms->ofdm_symbol_size - frame_parms->nb_prefix_samples;
int sync_pos_slot = (frame_parms->samples_per_slot>>1) - frame_parms->ofdm_symbol_size - frame_parms->nb_prefix_samples;
if (sync_pos2 >= sync_pos_slot)
PHY_vars_UE->rx_offset = sync_pos2 - sync_pos_slot;
@@ -300,7 +300,7 @@ typedef enum {
void set_random_rx_buffer(PHY_VARS_NR_UE *PHY_vars_UE, int amp) {
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int samples_for_frame = (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti);
int samples_for_frame = frame_parms->samples_per_frame;
int16_t random;
int16_t *data_p;
random_data_format_t data_format = SINUSOIDAL_DATA;
@@ -394,7 +394,7 @@ void set_random_rx_buffer(PHY_VARS_NR_UE *PHY_vars_UE, int amp) {
int set_pss_in_rx_buffer_from_external_buffer(PHY_VARS_NR_UE *PHY_vars_UE, short *input_buffer) {
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int samples_for_frame = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_subframe; /* both i and q */
int samples_for_frame = frame_parms->samples_per_frame; /* both i and q */
for (int aa=0; aa<PHY_vars_UE->frame_parms.nb_antennas_rx; aa++) {
for (int i = 0; i < samples_for_frame; i++) {
@@ -69,12 +69,6 @@ typedef struct {
int number_of_fail;
} test_t;
typedef struct {
uint16_t ofdm_symbol_size;
uint32_t samples_per_tti;
uint32_t samples_per_subframe;
} save_frame_parms_t;
/*************** GLOBAL VARIABLES***********************************/
EXTERN PHY_VARS_eNB *PHY_vars_eNB;
@@ -58,7 +58,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
int occ_Index = 0;
uint64_t pucch_payload = 0;
int tx_amp = 512;
int nr_tti_tx = 0;
int nr_slot_tx = 0;
int N_UCI = 0; /* size in bits for Uplink Control Information */
switch(format) {
@@ -67,7 +67,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
tx_amp,
nr_tti_tx,
nr_slot_tx,
(uint8_t)m_0,
(uint8_t)m_CS,
nb_symbols_total,
@@ -82,7 +82,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
(uint8_t)m_0,
nb_symbols_total,
starting_symbol_index,
@@ -95,13 +95,13 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
case pucch_format2_nr: {
nr_generate_pucch2(ue,
ue->pdcch_vars[ue->current_thread_id[nr_tti_tx]][gNB_id]->crnti,
ue->pdcch_vars[thread_number][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
@@ -113,14 +113,14 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
case pucch_format3_nr:
case pucch_format4_nr: {
nr_generate_pucch3_4(ue,
ue->pdcch_vars[ue->current_thread_id[nr_tti_tx]][gNB_id]->crnti,
ue->pdcch_vars[thread_number][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
format,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
@@ -169,7 +169,7 @@ int test_pucch_basic_error(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pr
printf("%s", tst_separator);
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
printf("\n => Test : No harq feedback on going\n");
@@ -180,7 +180,7 @@ int test_pucch_basic_error(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pr
}
/* set a tx slot with no ack */
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
@@ -267,7 +267,7 @@ int test_pucch_common_config_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_
common_pucch_configuration(ue, gNB_id, TST_PUCCH_COMMON_CONFIG_INDEX_OK);
/* set a tx slot with no ack */
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->ack = DL_ACK;
@@ -290,9 +290,9 @@ int test_pucch_common_config_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_
/* set a second ack on a different downlink harq process */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_SECOND;
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_SECOND;
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_SECOND].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_SECOND].harq_ack;
harq_status->n_CCE = 2;
harq_status->N_CCE = 4;
@@ -316,7 +316,7 @@ int test_pucch_common_config_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_
v_return = -1;
}
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack.ack = DL_NACK;
ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack.ack = DL_NACK;
printf("\n => Test : PUCCH format from common config in dedicated mode: two negative downlink ACKnowledgments \n");
@@ -563,9 +563,9 @@ int test_pucch_dedicated_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_id,
printf("%s", tst_separator);
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -582,9 +582,9 @@ int test_pucch_dedicated_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_id,
for (int i = 0; i < TST_NB_STEP_SINGLE_TRANSPORT_BLOCK; i++) {
/* set a tx slot with no ack */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = dl_harq_pid[i];
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = dl_harq_pid[i];
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -616,9 +616,9 @@ int test_pucch_dedicated_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_id,
for (i = 1; i < TST_NB_STEP_SINGLE_TRANSPORT_BLOCK; i = i+2) {
/* set a tx slot with no ack */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = dl_harq_pid[i];
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = dl_harq_pid[i];
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -677,12 +677,12 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
for (int code_word = 0; code_word < 2; code_word++) {
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->Number_MCS_HARQ_DL_DCI = 2;
ue->dlsch[proc->thread_id][gNB_id][code_word]->Number_MCS_HARQ_DL_DCI = 2;
/* set a tx slot with no ack */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->current_harq_pid = dl_harq_pid[i];
ue->dlsch[proc->thread_id][gNB_id][code_word]->current_harq_pid = dl_harq_pid[i];
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -697,7 +697,7 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
reset_harq = TRUE;
}
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->pucch_resource_indicator = pucch_resource_indicator[i][j];
@@ -720,12 +720,12 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
for (int code_word = 0; code_word < 2; code_word++) {
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->Number_MCS_HARQ_DL_DCI = 2;
ue->dlsch[proc->thread_id][gNB_id][code_word]->Number_MCS_HARQ_DL_DCI = 2;
/* set a tx slot with no ack */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->current_harq_pid = dl_harq_pid[i];
ue->dlsch[proc->thread_id][gNB_id][code_word]->current_harq_pid = dl_harq_pid[i];
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -734,7 +734,7 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
for (int j = 0 ; j < 2; j++) {
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->pucch_resource_indicator = pucch_resource_indicator[i][j];
}
@@ -754,12 +754,12 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
for (int code_word = 0; code_word < 2; code_word++) {
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->Number_MCS_HARQ_DL_DCI = 2;
ue->dlsch[proc->thread_id][gNB_id][code_word]->Number_MCS_HARQ_DL_DCI = 2;
/* set a tx slot with no ack */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->current_harq_pid = dl_harq_pid[i];
ue->dlsch[proc->thread_id][gNB_id][code_word]->current_harq_pid = dl_harq_pid[i];
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -768,7 +768,7 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
for (int j = 0 ; j < 2; j++) {
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->pucch_resource_indicator = pucch_resource_indicator[i][j];
}
@@ -935,7 +935,7 @@ int test_sr_alone_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *p
}
/* restore single transport block */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->Number_MCS_HARQ_DL_DCI = 1;
ue->dlsch[proc->thread_id][gNB_id][0]->Number_MCS_HARQ_DL_DCI = 1;
return (v_return);
}
@@ -976,9 +976,9 @@ int test_sr_ack_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pro
NR_UE_HARQ_STATUS_t *harq_status;
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -1015,9 +1015,9 @@ int test_sr_ack_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pro
/* set a second harq ack context */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_SECOND;
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_SECOND;
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_SECOND].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_SECOND].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -1073,7 +1073,7 @@ int test_csi_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *proc)
printf("%s", tst_separator);
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = NR_MAX_DLSCH_HARQ_PROCESSES;
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = NR_MAX_DLSCH_HARQ_PROCESSES;
set_csi_nr( 4, 0x0E );
@@ -1090,9 +1090,9 @@ int test_csi_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *proc)
NR_UE_HARQ_STATUS_t *harq_status;
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -1170,11 +1170,9 @@ int test_pucch(PHY_VARS_NR_UE *ue)
proc->frame_rx = 0;
proc->nr_slot_rx = 0;
proc->nr_tti_rx = 0;
proc->frame_tx = proc->frame_rx + (proc->nr_slot_rx + NR_UE_CAPABILITY_SLOT_RX_TO_TX) / ue->frame_parms.slots_per_frame;
proc->nr_slot_tx = (proc->nr_slot_rx + NR_UE_CAPABILITY_SLOT_RX_TO_TX) % ue->frame_parms.slots_per_frame;
proc->nr_tti_tx = proc->nr_slot_tx % ue->frame_parms.slots_per_subframe;
init_pucch_power_configuration( ue, gNB_id);
@@ -229,7 +229,6 @@ int test_srs_periodicity(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc)
for (int slot_tx = 0; slot_tx < frame_parms->slots_per_frame; slot_tx++) {
proc->frame_tx = frame_tx;
proc->nr_slot_tx = slot_tx;
proc->nr_tti_tx = slot_tx % frame_parms->slots_per_subframe;
if (ue_srs_procedure_nr( ue, proc, 0) == 0) {
printf("test_srs_periodicity srs at frame %d slot %d \n", frame_tx, slot_tx);
}
@@ -373,7 +372,7 @@ int test_srs(PHY_VARS_NR_UE *PHY_vars_UE)
/* start test of sounding reference signals */
default_srs_configuration(frame_parms);
txptr = calloc(frame_parms->samples_per_tti , sizeof(int32_t));
txptr = calloc(frame_parms->samples_per_slot , sizeof(int32_t));
if (txptr == NULL) {
printf("Error test_srs: memory allocation problem txptr \n");
assert(0);
@@ -84,6 +84,7 @@
int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, NR_DL_FRAME_PARMS *frame_parms_gNB, test_t *test)
{
UE_nr_rxtx_proc_t proc = {0};
VOID_PARAMETER test;
int synchro_position;
int offset;
@@ -133,7 +134,7 @@ int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, NR
#endif
rx_sss_nr(PHY_vars_UE, &metric_fdd_ncp, &phase_fdd_ncp);
rx_sss_nr(PHY_vars_UE, &proc, &metric_fdd_ncp, &phase_fdd_ncp);
#if TEST_SYNCHRO_TIMING_PSS
+37 -8
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@@ -29,14 +29,43 @@
/* linear phase noise model */
void phase_noise(double ts, int16_t * InRe, int16_t * InIm)
{
static uint64_t i=0;
int32_t x=0 ,y=0;
double fd = 300;//0.01*30000
static double i=0;
double real, imag,x ,y;
int16_t SinValue = 0, CosValue= 0;
double IdxDouble = (double)(i*fd * ts * ResolSinCos * 4);
int16_t IdxModulo = ((int32_t)(IdxDouble>0 ? IdxDouble+0.5 : IdxDouble-0.5)) % (ResolSinCos*4);
IdxModulo = IdxModulo<0 ? IdxModulo+ResolSinCos*4 : IdxModulo;
if(IdxModulo<2*ResolSinCos) {//< 2 check for 1st and 2nd
if(IdxModulo < ResolSinCos) {// 1st Quadrant
SinValue = LUTSin[IdxModulo];
CosValue = LUTSin[ResolSinCos-IdxModulo];
}
else {// 2nd Quadrant
SinValue = LUTSin[2*ResolSinCos-IdxModulo];
CosValue = -LUTSin[IdxModulo-ResolSinCos];
}
}
else {// 3rd and 4th Quadrant
if(IdxModulo < 3*ResolSinCos) {// 3rd Quadrant
SinValue = -LUTSin[IdxModulo-2*ResolSinCos];
CosValue = -LUTSin[3*ResolSinCos-IdxModulo];
}
else {//4th Quadrant
SinValue = -LUTSin[4*ResolSinCos-IdxModulo];
CosValue = LUTSin[IdxModulo-3*ResolSinCos];
}
}
x = ( ((int32_t)InRe[0] * CosValue) - ((int32_t)InIm[0] * SinValue ));
y = ( ((int32_t)InIm[0] * CosValue) + ((int32_t)InRe[0] * SinValue ));
InRe[0]= (int16_t)(x>>14);
InIm[0]= (int16_t)(y>>14);
i++;
real = cos(fd * 2 * M_PI * i * ts);
imag = sin (fd * 2 * M_PI * i * ts);
x = ((real * (double)InRe[0]) - (imag * (double)InIm[0])) ;
y= ((real * (double)InIm[0]) + (imag * (double)InRe[0])) ;
InRe[0]= (int16_t)(x);
InIm[0]= (int16_t)(y);
}
/* Initialisation function for SIN table values */
void InitSinLUT( void ) {
for ( int i=0; i<(ResolSinCos+1); i++ ) {
LUTSin[i] = sin((double)(M_PI*i)/(2*ResolSinCos)) * (1<<14); //Format: Q14
}
}
+4
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@@ -466,6 +466,10 @@ double N_RB2channel_bandwidth(uint16_t N_RB);
\param ts Sampling time
\param *Re *Im Real and Imag part of the signal
*/
//look-up table for the sine (cosine) function
#define ResolSinCos 100
uint16_t LUTSin[ResolSinCos+1];
void InitSinLUT( void );
void phase_noise(double ts, int16_t * InRe, int16_t * InIm);
#include "targets/RT/USER/rfsim.h"
+36
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@@ -0,0 +1,36 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file itti_sim_messages_def.h
* \brief itti message for itti simulator
* \author Yoshio INOUE, Masayuki HARADA
* \email yoshio.inoue@fujitsu.com,masayuki.harada@fujitsu.com
* \date 2020
* \version 0.1
*/
MESSAGE_DEF(GNB_RRC_BCCH_DATA_IND, MESSAGE_PRIORITY_MED, itti_sim_rrc_ch_t, GNBBCCHind)
MESSAGE_DEF(GNB_RRC_CCCH_DATA_IND, MESSAGE_PRIORITY_MED, itti_sim_rrc_ch_t, GNBCCCHind)
MESSAGE_DEF(GNB_RRC_DCCH_DATA_IND, MESSAGE_PRIORITY_MED, itti_sim_rrc_ch_t, GNBDCCHind)
MESSAGE_DEF(UE_RRC_CCCH_DATA_IND, MESSAGE_PRIORITY_MED, itti_sim_rrc_ch_t, UECCCHind)
MESSAGE_DEF(UE_RRC_DCCH_DATA_IND, MESSAGE_PRIORITY_MED, itti_sim_rrc_ch_t, UEDCCHind)
+51
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@@ -0,0 +1,51 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file itti_sim_messages_types.h
* \brief itti message for itti simulator
* \author Yoshio INOUE, Masayuki HARADA
* \email yoshio.inoue@fujitsu.com,masayuki.harada@fujitsu.com
* \date 2020
* \version 0.1
*/
#ifndef ITTI_SIM_MESSAGES_TYPES_H_
#define ITTI_SIM_MESSAGES_TYPES_H_
#include "LTE_asn_constant.h"
#define GNB_RRC_BCCH_DATA_IND(mSGpTR) (mSGpTR)->ittiMsg.GNBBCCHind
#define GNB_RRC_CCCH_DATA_IND(mSGpTR) (mSGpTR)->ittiMsg.GNBCCCHind
#define GNB_RRC_DCCH_DATA_IND(mSGpTR) (mSGpTR)->ittiMsg.GNBDCCHind
#define UE_RRC_CCCH_DATA_IND(mSGpTR) (mSGpTR)->ittiMsg.UECCCHind
#define UE_RRC_DCCH_DATA_IND(mSGpTR) (mSGpTR)->ittiMsg.UEDCCHind
typedef struct itti_sim_rrc_ch_s {
rb_id_t rbid;
uint8_t *sdu;
int size;
} itti_sim_rrc_ch_t;
#endif /* ITTI_SIM_MESSAGES_TYPES_H_ */
+7 -1
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@@ -41,10 +41,16 @@ MESSAGE_DEF(RRC_MAC_CCCH_DATA_REQ, MESSAGE_PRIORITY_MED_PLUS, RrcMacCcchDat
MESSAGE_DEF(RRC_MAC_CCCH_DATA_CNF, MESSAGE_PRIORITY_MED_PLUS, RrcMacCcchDataCnf, rrc_mac_ccch_data_cnf)
MESSAGE_DEF(RRC_MAC_CCCH_DATA_IND, MESSAGE_PRIORITY_MED_PLUS, RrcMacCcchDataInd, rrc_mac_ccch_data_ind)
MESSAGE_DEF(RRC_MAC_MCCH_DATA_REQ, MESSAGE_PRIORITY_MED_PLUS, RrcMacMcchDataReq, rrc_mac_mcch_data_req)
MESSAGE_DEF(RRC_MAC_MCCH_DATA_IND, MESSAGE_PRIORITY_MED_PLUS, RrcMacMcchDataInd, rrc_mac_mcch_data_ind)
MESSAGE_DEF(RRC_MAC_PCCH_DATA_REQ, MESSAGE_PRIORITY_MED_PLUS, RrcMacPcchDataReq, rrc_mac_pcch_data_req)
/* RRC configures DRX context (MAC timers) of a UE */
MESSAGE_DEF(RRC_MAC_DRX_CONFIG_REQ, MESSAGE_PRIORITY_MED, rrc_mac_drx_config_req_t, rrc_mac_drx_config_req)
MESSAGE_DEF(RRC_MAC_DRX_CONFIG_REQ, MESSAGE_PRIORITY_MED, rrc_mac_drx_config_req_t, rrc_mac_drx_config_req)
// gNB
MESSAGE_DEF(NR_RRC_MAC_CCCH_DATA_IND, MESSAGE_PRIORITY_MED_PLUS, NRRrcMacCcchDataInd, nr_rrc_mac_ccch_data_ind)
MESSAGE_DEF(NR_RRC_MAC_BCCH_DATA_IND, MESSAGE_PRIORITY_MED_PLUS, NRRrcMacBcchDataInd, nr_rrc_mac_bcch_data_ind)
+21
View File
@@ -38,6 +38,7 @@
#define RRC_MAC_BCCH_DATA_REQ(mSGpTR) (mSGpTR)->ittiMsg.rrc_mac_bcch_data_req
#define RRC_MAC_BCCH_DATA_IND(mSGpTR) (mSGpTR)->ittiMsg.rrc_mac_bcch_data_ind
#define NR_RRC_MAC_BCCH_DATA_IND(mSGpTR) (mSGpTR)->ittiMsg.nr_rrc_mac_bcch_data_ind
#define RRC_MAC_BCCH_MBMS_DATA_REQ(mSGpTR) (mSGpTR)->ittiMsg.rrc_mac_bcch_mbms_data_req
#define RRC_MAC_BCCH_MBMS_DATA_IND(mSGpTR) (mSGpTR)->ittiMsg.rrc_mac_bcch_mbms_data_ind
@@ -45,6 +46,7 @@
#define RRC_MAC_CCCH_DATA_REQ(mSGpTR) (mSGpTR)->ittiMsg.rrc_mac_ccch_data_req
#define RRC_MAC_CCCH_DATA_CNF(mSGpTR) (mSGpTR)->ittiMsg.rrc_mac_ccch_data_cnf
#define RRC_MAC_CCCH_DATA_IND(mSGpTR) (mSGpTR)->ittiMsg.rrc_mac_ccch_data_ind
#define NR_RRC_MAC_CCCH_DATA_IND(mSGpTR) (mSGpTR)->ittiMsg.nr_rrc_mac_ccch_data_ind
#define RRC_MAC_MCCH_DATA_REQ(mSGpTR) (mSGpTR)->ittiMsg.rrc_mac_mcch_data_req
#define RRC_MAC_MCCH_DATA_IND(mSGpTR) (mSGpTR)->ittiMsg.rrc_mac_mcch_data_ind
@@ -86,6 +88,15 @@ typedef struct RrcMacBcchDataInd_s {
uint8_t rsrp;
} RrcMacBcchDataInd;
typedef struct NRRrcMacBcchDataInd_s {
uint32_t frame;
uint8_t sub_frame;
uint32_t sdu_size;
uint8_t sdu[BCCH_SDU_SIZE];
uint8_t gnb_index;
uint8_t rsrq;
uint8_t rsrp;
} NRRrcMacBcchDataInd;
typedef struct RrcMacBcchMbmsDataReq_s {
uint32_t frame;
@@ -126,6 +137,16 @@ typedef struct RrcMacCcchDataInd_s {
int CC_id;
} RrcMacCcchDataInd;
typedef struct NRRrcMacCcchDataInd_s {
uint32_t frame;
uint8_t sub_frame;
uint16_t rnti;
uint32_t sdu_size;
uint8_t sdu[CCCH_SDU_SIZE];
uint8_t gnb_index;
int CC_id;
} NRRrcMacCcchDataInd;
typedef struct RrcMacMcchDataReq_s {
uint32_t frame;
uint32_t sdu_size;

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