Moved code for timing alignment procedures to PHY UE procedures
- new function called ue_ta_procedures - this makes the code more easier to read - small cleanup was also done
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+3
-22
@@ -462,32 +462,13 @@ void UE_processing(void *arg) {
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processingData_t *rxtxD = (processingData_t *) arg;
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UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
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PHY_VARS_NR_UE *UE = rxtxD->UE;
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int slot_tx = proc->nr_slot_tx;
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int frame_tx = proc->frame_tx;
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processSlotRX(UE, proc);
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processSlotTX(UE, proc);
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ue_ta_procedures(UE, slot_tx, frame_tx);
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/* UL time alignment
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// If the current tx frame and slot match the TA configuration in ul_time_alignment
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// then timing advance is processed and set to be applied in the next UL transmission */
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if (UE->mac_enabled == 1) {
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uint8_t gNB_id = 0;
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NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &UE->ul_time_alignment[gNB_id];
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int slot_tx = proc->nr_slot_tx;
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int frame_tx = proc->frame_tx;
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if (frame_tx == ul_time_alignment->ta_frame && slot_tx == ul_time_alignment->ta_slot) {
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uint8_t numerology = UE->frame_parms.numerology_index;
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uint16_t bwp_ul_NB_RB = UE->frame_parms.N_RB_UL;
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LOG_D(PHY,"Applying timing advance -- frame %d -- slot %d\n", frame_tx, slot_tx);
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//if (nfapi_mode!=3){
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nr_process_timing_advance(UE->Mod_id, UE->CC_id, ul_time_alignment->ta_command, numerology, bwp_ul_NB_RB);
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ul_time_alignment->ta_frame = -1;
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ul_time_alignment->ta_slot = -1;
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//}
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}
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}
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}
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void dummyWrite(PHY_VARS_NR_UE *UE,openair0_timestamp timestamp, int writeBlockSize) {
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@@ -296,6 +296,13 @@ uint16_t nr_get_Np(uint8_t N_RB_DL,uint8_t nCCE,uint8_t plus1);
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int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
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/*! \brief UL time alignment procedures for TA application
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@param PHY_VARS_NR_UE ue
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@param int slot_tx
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@param int frame_tx
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*/
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void ue_ta_procedures(PHY_VARS_NR_UE *ue, int slot_tx, int frame_tx);
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/*! \brief Compute the timing adjustment at UE side from the old TA offset and the new received TA command
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@param Mod_id Local UE index on which to act
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@param CC_id Component Carrier Index
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@@ -149,6 +149,32 @@ uint16_t get_bw_scaling(uint16_t nb_rb){
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return bw_scaling;
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}
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/* UL time alignment
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// If the current tx frame and slot match the TA configuration in ul_time_alignment
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// then timing advance is processed and set to be applied in the next UL transmission */
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void ue_ta_procedures(PHY_VARS_NR_UE *ue, int slot_tx, int frame_tx){
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if (ue->mac_enabled == 1) {
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uint8_t gNB_id = 0;
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NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &ue->ul_time_alignment[gNB_id];
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if (frame_tx == ul_time_alignment->ta_frame && slot_tx == ul_time_alignment->ta_slot) {
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uint8_t numerology = ue->frame_parms.numerology_index;
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uint16_t bwp_ul_NB_RB = ue->frame_parms.N_RB_UL;
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LOG_D(PHY, "In %s: applying timing advance -- frame %d -- slot %d\n", __FUNCTION__, frame_tx, slot_tx);
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nr_process_timing_advance(ue->Mod_id, ue->CC_id, ul_time_alignment->ta_command, numerology, bwp_ul_NB_RB);
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ul_time_alignment->ta_frame = -1;
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ul_time_alignment->ta_slot = -1;
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}
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}
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}
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void nr_process_timing_advance(module_id_t Mod_id, uint8_t CC_id, uint8_t ta_command, uint8_t mu, uint16_t bwp_ul_NB_RB){
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// 3GPP TS 38.213 p4.2
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