Uplink constellation + CRC OK
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@@ -428,7 +428,11 @@ static void *gNB_L1_thread( void *param ) {
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PROC_RXTX0, 0 );
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int frame_rx = L1_proc->frame_rx;
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int slot_rx = L1_proc->slot_rx;
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int slot_rx;
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if (NFAPI_MODE == NFAPI_MODE_PNF)
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slot_rx = (L1_proc->slot_rx) + 1;
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else
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slot_rx = L1_proc->slot_rx;
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int frame_tx = L1_proc->frame_tx;
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int slot_tx = L1_proc->slot_tx;
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uint64_t timestamp_tx = L1_proc->timestamp_tx;
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@@ -443,7 +443,9 @@ void nr_processULSegment(void* arg) {
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for (int m=0; m < Kr>>3; m ++) {
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ulsch_harq->c[r][m]= (uint8_t) llrProcBuf[m];
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//printf("%x ", ulsch_harq->c[r][m]);
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}
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//printf("\n");
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//stop_meas(&phy_vars_gNB->ulsch_ldpc_decoding_stats);
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}
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@@ -510,6 +512,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
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A = (harq_process->TBS)<<3;
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LOG_D(PHY,"ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, n_layers %d\n",harq_pid,A,G, mcs, n_layers, nb_rb, Qm, n_layers);
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//printf("ULSCH in %d.%d \n", frame, nr_tti_rx);
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if (R<1024)
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Coderate = (float) R /(float) 1024;
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@@ -275,13 +275,13 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
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///////////////////////// a---->| add CRC |---->b /////////////////////////
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///////////
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/*
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int i;
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printf("ulsch (tx): \n");
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for (i=0;i<(A>>3);i++)
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printf("%02x.",a[i]);
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printf("\n");
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*/
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// int i;
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// printf("ulsch (tx): \n");
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// for (i=0;i<(A>>3);i++)
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// printf("%x ",harq_process->a[i]);
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// printf("\n");
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if (A > 3824) {
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// Add 24-bit crc (polynomial A) to payload
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@@ -62,6 +62,7 @@
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#include "common/ran_context.h"
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extern RAN_CONTEXT_t RC;
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uint8_t count = 0; uint8_t harq_pid_ul = -1; int flag = 0;
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// Note the 2 scs values in the table names represent resp. scs_common and pdcch_scs
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/// LUT for the number of symbols in the coreset indexed by coreset index (4 MSB rmsi_pdcch_config)
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@@ -1248,6 +1249,11 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
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case NR_UL_DCI_FORMAT_0_1:
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switch (rnti_type) {
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case NR_RNTI_C:
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harq_pid_ul = (harq_pid_ul + 1) % 16;
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if (harq_pid_ul == 0)
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flag = !flag;
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dci_pdu_rel15->ndi = flag;
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// Indicating a DL DCI format 1bit
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pos = 1;
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*dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator & 0x1) << (dci_size - pos);
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@@ -1280,6 +1286,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
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*dci_pdu |= ((uint64_t)dci_pdu_rel15->rv & 0x3) << (dci_size - pos);
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// HARQ process number 4bit
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pos += 4;
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dci_pdu_rel15->harq_pid = harq_pid_ul;
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*dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos);
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// 1st Downlink assignment index
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pos += dci_pdu_rel15->dai[0].nbits;
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