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Merge remote-tracking branch 'origin/NR_gNB_BF_matrix' into integration_2024_w41

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This commit is contained in:
francescomani
2024-10-11 16:55:25 +02:00
parent e8597a16ed a4c211f2b4
commit 4528be42de
131 changed files with 1067 additions and 1327 deletions
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ci-scripts/conf_files/gnb-du.band78.106prb.rfsim.conf
-2
View File
@@ -198,8 +198,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
);
ci-scripts/conf_files/gnb-du.sa.band1.52prb.usrpb210.conf
-2
View File
@@ -195,8 +195,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 108;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
);
ci-scripts/conf_files/gnb-du.sa.band78.106prb.rfsim.conf
-2
View File
@@ -198,8 +198,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
);
ci-scripts/conf_files/gnb-du.sa.band78.106prb.usrpb200.conf
-2
View File
@@ -200,8 +200,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
);
ci-scripts/conf_files/gnb.band66.106prb.rfsim.phytest-dora.conf
-9
View File
@@ -187,15 +187,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2,second_addr=192.168.20.2";
clock_src = "external";
# if_freq = 3700000000L;
ci-scripts/conf_files/gnb.band78.106prb.rfsim.phytest-dora.conf
-9
View File
@@ -198,15 +198,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 50;
eNB_instances = [0];
## beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
## beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
#bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "addr=192.168.10.2,second_addr=192.168.20.2";
}
);
ci-scripts/conf_files/gnb.band78.106prb.usrpn300.phytest-dora.conf
-9
View File
@@ -198,15 +198,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 50;
eNB_instances = [0];
## beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
## beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
#bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "addr=192.168.10.2,second_addr=192.168.20.2";
}
);
ci-scripts/conf_files/gnb.band78.162prb.usrpn300.phytest-dora.conf
-1
View File
@@ -191,7 +191,6 @@ RUs = ({
max_pdschReferenceSignalPower = -27;
max_rxgain = 50;
eNB_instances = [0];
bf_weights = [0x00007fff, 0x0000];
sdr_addrs = "addr=192.168.10.2,second_addr=192.168.20.2";
});
ci-scripts/conf_files/gnb.band78.273prb.usrpn300.phytest-dora.conf
-1
View File
@@ -193,7 +193,6 @@ RUs = ({
max_pdschReferenceSignalPower = -27;
max_rxgain = 50;
eNB_instances = [0];
bf_weights = [0x00007fff, 0x0000];
sdr_addrs = "addr=192.168.10.2,second_addr=192.168.20.2";
});
ci-scripts/conf_files/gnb.nsa.band78.106prb.usrpn310.2x2.conf
-1
View File
@@ -211,7 +211,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
bf_weights = [0x00007fff, 0x00007fff];
#clock_src = "external";
sf_extension = 0
sdr_addrs = "mgmt_addr=172.21.19.14,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal"
ci-scripts/conf_files/gnb.sa.band261.u3.32prb.rfsim.conf
+5 -1
View File
@@ -23,7 +23,8 @@ gNBs =
sib1_tda = 15;
min_rxtxtime = 6;
beam_weights = [0]; // single SSB -> one analog beam
servingCellConfigCommon = (
{
#spCellConfigCommon
@@ -177,6 +178,9 @@ MACRLCs = ({
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 200;
pucch_TargetSNRx10 = 200;
set_analog_beamforming = 1;
beam_duration = 1;
beams_per_period = 1;
});
L1s = (
ci-scripts/conf_files/gnb.sa.band66.106prb.rfsim.conf
-2
View File
@@ -203,8 +203,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
);
ci-scripts/conf_files/gnb.sa.band66.ntn.25prb.rfsim.conf
-8
View File
@@ -216,14 +216,6 @@ RUs = (
max_rxgain = 114;
sf_extension = 0;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "type=x300";
clock_src = "internal";
# if_freq = 3700000000L;
ci-scripts/conf_files/gnb.sa.band66.u0.25prb.rfsim.conf
-8
View File
@@ -203,14 +203,6 @@ RUs = (
max_rxgain = 114;
sf_extension = 0;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "type=x300";
clock_src = "internal";
# if_freq = 3700000000L;
ci-scripts/conf_files/gnb.sa.band77.162prb.usrpn310.2x2.conf
-2
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@@ -212,8 +212,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
#clock_src = "internal";
sdr_addrs = "addr=192.168.80.53, clock_source=internal,time_source=internal"
ci-scripts/conf_files/gnb.sa.band77.273prb.fhi72.4x4-vvdn.conf
-2
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@@ -220,8 +220,6 @@ RUs = (
eNB_instances = [0];
ru_thread_core = 5;
sl_ahead = 5;
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000,0x00007fff, 0x0000];
clock_src = "internal";
tr_preference = "raw_if4p5"; # important: activate FHI7.2
do_precoding = 0; # needs to match O-RU configuration
ci-scripts/conf_files/gnb.sa.band77.273prb.usrpn310.2x2.conf
-2
View File
@@ -206,8 +206,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 72;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
#clock_src = "internal";
sdr_addrs = "addr=192.168.80.53,clock_source=internal,time_source=internal"
}
ci-scripts/conf_files/gnb.sa.band78.106prb.n310.7ds2u.conf
-2
View File
@@ -211,8 +211,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 65;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
sf_extension = 0
sdr_addrs = "addr=192.168.80.52,clock_source=internal,time_source=internal"
}
ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.conf
-8
View File
@@ -205,14 +205,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sf_extension = 0
sdr_addrs = "serial=XXXXXXX"
}
ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.neighbour.conf
-2
View File
@@ -266,8 +266,6 @@ RUs = ({
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
});
ci-scripts/conf_files/gnb.sa.band78.106prb.rfsim.yaml
-8
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@@ -166,14 +166,6 @@ RUs:
max_pdschReferenceSignalPower: -27
max_rxgain: 75
eNB_instances: [0]
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights: [0x00007fff, 0x0000]
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sf_extension: 0
sdr_addrs: serial=XXXXXXX
ci-scripts/conf_files/gnb.sa.band78.106prb.usrp310.2x2.conf
-8
View File
@@ -204,14 +204,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 68;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sf_extension = 0
sdr_addrs = "mgmt_addr=172.21.19.14,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal"
}
ci-scripts/conf_files/gnb.sa.band78.106prb.usrpb200.sc-fdma.conf
-2
View File
@@ -200,8 +200,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
);
ci-scripts/conf_files/gnb.sa.band78.106prb.usrpn310.ddsuu-2x2.conf
-8
View File
@@ -217,14 +217,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 68;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sf_extension = 0
sdr_addrs = "mgmt_addr=172.21.19.14,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal"
sl_ahead = 5;
ci-scripts/conf_files/gnb.sa.band78.162prb.usrpn310.2x2.conf
-8
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@@ -218,14 +218,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sf_extension = 0
sdr_addrs = "mgmt_addr=172.21.19.14,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal"
}
ci-scripts/conf_files/gnb.sa.band78.24prb.rfsim.conf
-2
View File
@@ -203,8 +203,6 @@ RUs = (
max_rxgain = 114;
sf_extension = 0;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
);
ci-scripts/conf_files/gnb.sa.band78.273prb.fhi72.4x4-benetel550.conf
-2
View File
@@ -227,8 +227,6 @@ RUs = (
eNB_instances = [0];
ru_thread_core = 5;
sl_ahead = 10;
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000,0x00007fff, 0x0000];
tr_preference = "raw_if4p5"; # important: activate FHI7.2
do_precoding = 0; # needs to match O-RU configuration
}
ci-scripts/conf_files/gnb.sa.band78.273prb.rfsim.2x2.conf
-2
View File
@@ -199,8 +199,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
#clock_src = "internal";
sdr_addrs = "mgmt_addr=192.168.10.2,addr=192.168.10.2,clock_source=internal,time_source=internal"
}
ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.2x2.conf
-8
View File
@@ -219,14 +219,6 @@ RUs = (
eNB_instances = [0];
bands = [78];
sl_ahead = 5;
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
}
);
ci-scripts/conf_files/gnb.sa.band78.51prb.aw2s.ddsuu.conf
-8
View File
@@ -219,14 +219,6 @@ RUs = (
eNB_instances = [0];
bands = [78];
sl_ahead = 5;
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
}
);
ci-scripts/conf_files/gnb.sa.band78.51prb.usrpb200.conf
-2
View File
@@ -199,8 +199,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
);
ci-scripts/conf_files/untested/gNB_SA_n78_106PRB.2x2_usrpn310.conf
-9
View File
@@ -217,15 +217,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "mgmt_addr=172.21.19.14,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal"
}
);
ci-scripts/conf_files/untested/gNB_SA_n78_133PRB.2x2_usrpn310.conf
-9
View File
@@ -213,15 +213,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "mgmt_addr=172.21.19.14,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal"
}
);
ci-scripts/conf_files/untested/gnb.band78.sa.fr1.106PRB.usrpn310.conf
-8
View File
@@ -221,14 +221,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sf_extension = 0
sdr_addrs = "mgmt_addr=172.21.19.14,addr=192.168.10.2,second_addr=192.168.20.2,clock_source=internal,time_source=internal"
}
ci-scripts/conf_files/untested/gnb.sa.band66.fr1.106PRB.usrpn300.conf
-2
View File
@@ -203,8 +203,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
);
ci-scripts/conf_files/untested/gnb.sa.band78.fr1.51PRB.usrpb210.conf
-2
View File
@@ -201,8 +201,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
clock_src = "internal";
}
);
common/utils/nr/nr_common.h
+1
View File
@@ -39,6 +39,7 @@
#include "PHY/defs_common.h"
#define NR_MAX_PDSCH_TBS 3824
#define MAX_NUM_BEAM_PERIODS 4
#define MAX_BWP_SIZE 275
#define NR_MAX_NUM_BWP 4
#define NR_MAX_HARQ_PROCESSES 32
executables/nr-gnb.c
+17 -18
View File
@@ -128,7 +128,7 @@ static void tx_func(processingData_L1tx_t *info)
// At this point, MAC scheduler just ran, including scheduling
// PRACH/PUCCH/PUSCH, so trigger RX chain processing
LOG_D(NR_PHY, "%s() trigger RX for %d.%d\n", __func__, frame_rx, slot_rx);
LOG_D(NR_PHY, "Trigger RX for %d.%d\n", frame_rx, slot_rx);
notifiedFIFO_elt_t *res = newNotifiedFIFO_elt(sizeof(processingData_L1_t), 0, &gNB->resp_L1, NULL);
processingData_L1_t *syncMsg = NotifiedFifoData(res);
syncMsg->gNB = gNB;
@@ -229,15 +229,17 @@ static void rx_func(processingData_L1_t *info)
if (gNB->phase_comp) {
//apply the rx signal rotation here
int soffset = (slot_rx & 3) * gNB->frame_parms.symbols_per_slot * gNB->frame_parms.ofdm_symbol_size;
for (int aa = 0; aa < gNB->frame_parms.nb_antennas_rx; aa++) {
apply_nr_rotation_RX(&gNB->frame_parms,
gNB->common_vars.rxdataF[aa],
gNB->frame_parms.symbol_rotation[1],
slot_rx,
gNB->frame_parms.N_RB_UL,
soffset,
0,
gNB->frame_parms.Ncp == EXTENDED ? 12 : 14);
for (int bb = 0; bb < gNB->common_vars.num_beams_period; bb++) {
for (int aa = 0; aa < gNB->frame_parms.nb_antennas_rx; aa++) {
apply_nr_rotation_RX(&gNB->frame_parms,
gNB->common_vars.rxdataF[bb][aa],
gNB->frame_parms.symbol_rotation[1],
slot_rx,
gNB->frame_parms.N_RB_UL,
soffset,
0,
gNB->frame_parms.Ncp == EXTENDED ? 12 : 14);
}
}
}
phy_procedures_gNB_uespec_RX(gNB, frame_rx, slot_rx);
@@ -417,17 +419,14 @@ void init_eNB_afterRU(void) {
LOG_I(PHY,"gNB->num_RU:%d\n", gNB->num_RU);
for (ru_id=0,aa=0; ru_id<gNB->num_RU; ru_id++) {
AssertFatal(gNB->RU_list[ru_id]->common.rxdataF!=NULL,
"RU %d : common.rxdataF is NULL\n",
gNB->RU_list[ru_id]->idx);
AssertFatal(gNB->RU_list[ru_id]->prach_rxsigF!=NULL,
"RU %d : prach_rxsigF is NULL\n",
gNB->RU_list[ru_id]->idx);
AssertFatal(gNB->RU_list[ru_id]->common.rxdataF != NULL, "RU %d : common.rxdataF is NULL\n", gNB->RU_list[ru_id]->idx);
AssertFatal(gNB->RU_list[ru_id]->prach_rxsigF != NULL, "RU %d : prach_rxsigF is NULL\n", gNB->RU_list[ru_id]->idx);
for (i=0; i<gNB->RU_list[ru_id]->nb_rx; aa++,i++) {
LOG_I(PHY,"Attaching RU %d antenna %d to gNB antenna %d\n",gNB->RU_list[ru_id]->idx,i,aa);
gNB->prach_vars.rxsigF[aa] = gNB->RU_list[ru_id]->prach_rxsigF[0][i];
gNB->common_vars.rxdataF[aa] = (c16_t *)gNB->RU_list[ru_id]->common.rxdataF[i];
gNB->prach_vars.rxsigF[aa] = gNB->RU_list[ru_id]->prach_rxsigF[0][i];
// TODO hardcoded beam to 0, still need to understand how to handle this properly
gNB->common_vars.rxdataF[0][aa] = (c16_t *)gNB->RU_list[ru_id]->common.rxdataF[i];
}
}
executables/nr-ru.c
+46 -96
View File
@@ -58,8 +58,6 @@ static int DEFBANDS[] = {7};
static int DEFENBS[] = {0};
static int DEFBFW[] = {0x00007fff};
static int DEFRUTPCORES[] = {-1,-1,-1,-1};
//static int DEFNRBANDS[] = {7};
//static int DEFGNBS[] = {0};
#include "ENB_APP/enb_paramdef.h"
#include "GNB_APP/gnb_paramdef.h"
@@ -540,9 +538,11 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot_tx );
}
if (ru->feptx_ofdm) ru->feptx_ofdm(ru,frame_tx,slot_tx);
if (ru->feptx_ofdm)
ru->feptx_ofdm(ru, frame_tx, slot_tx);
if (ru->fh_south_out) ru->fh_south_out(ru,frame_tx,slot_tx,proc->timestamp_tx);
if (ru->fh_south_out)
ru->fh_south_out(ru, frame_tx, slot_tx, proc->timestamp_tx);
}
void fh_if5_north_out(RU_t *ru) {
@@ -717,7 +717,7 @@ static radio_tx_gpio_flag_t get_gpio_flags(RU_t *ru, int slot)
if (ru->common.beam_id) {
int prev_slot = (slot - 1 + fp->slots_per_frame) % fp->slots_per_frame;
const uint8_t *beam_ids = ru->common.beam_id[0];
const int *beam_ids = ru->common.beam_id[0];
int prev_beam = beam_ids[prev_slot * fp->symbols_per_slot];
int beam = beam_ids[slot * fp->symbols_per_slot];
if (prev_beam != beam) {
@@ -748,12 +748,12 @@ static radio_tx_gpio_flag_t get_gpio_flags(RU_t *ru, int slot)
return flags_gpio;
}
void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
void tx_rf(RU_t *ru, int frame,int slot, uint64_t timestamp)
{
RU_proc_t *proc = &ru->proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
nfapi_nr_config_request_scf_t *cfg = &ru->config;
void *txp[ru->nb_tx];
unsigned int txs;
int i;
T(T_ENB_PHY_OUTPUT_SIGNAL,
T_INT(0),
@@ -809,7 +809,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
flags_burst = proc->first_tx == 1 ? TX_BURST_START : TX_BURST_MIDDLE;
}
if (fp->freq_range == FR2)
if (ru->openair0_cfg.gpio_controller != RU_GPIO_CONTROL_NONE)
flags_gpio = get_gpio_flags(ru, slot);
const int flags = flags_burst | (flags_gpio << 4);
@@ -827,8 +827,11 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (timestamp + ru->ts_offset) & 0xffffffff);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 1);
// prepare tx buffer pointers
txs = ru->rfdevice
.trx_write_func(&ru->rfdevice, timestamp + ru->ts_offset - sf_extension, txp, siglen + sf_extension, ru->nb_tx, flags);
uint32_t txs = ru->rfdevice.trx_write_func(&ru->rfdevice,
timestamp + ru->ts_offset - sf_extension,
txp,
siglen + sf_extension,
ru->nb_tx, flags);
LOG_D(PHY,
"[TXPATH] RU %d aa %d tx_rf, writing to TS %llu, %d.%d, unwrapped_frame %d, slot %d, flags %d, siglen+sf_extension %d, "
"returned %d, E %f\n",
@@ -1031,7 +1034,8 @@ void *ru_stats_thread(void *param) {
return(NULL);
}
void ru_tx_func(void *param) {
void ru_tx_func(void *param)
{
processingData_RU_t *info = (processingData_RU_t *) param;
RU_t *ru = info->ru;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
@@ -1039,7 +1043,7 @@ void ru_tx_func(void *param) {
int slot_tx = info->slot_tx;
int print_frame = 8;
char filename[40];
int cumul_samples = fp->get_samples_per_slot(0, fp);
int i = 1;
for (; i < fp->slots_per_subframe / 2; i++)
@@ -1050,10 +1054,12 @@ void ru_tx_func(void *param) {
int rt_prof_idx = absslot_rx % RT_PROF_DEPTH;
clock_gettime(CLOCK_MONOTONIC,&ru->rt_ru_profiling.start_RU_TX[rt_prof_idx]);
// do TX front-end processing if needed (precoding and/or IDFTs)
if (ru->feptx_prec) ru->feptx_prec(ru,frame_tx,slot_tx);
if (ru->feptx_prec)
ru->feptx_prec(ru,frame_tx,slot_tx);
// do OFDM with/without TX front-end processing if needed
if ((ru->fh_north_asynch_in == NULL) && (ru->feptx_ofdm)) ru->feptx_ofdm(ru,frame_tx,slot_tx);
if ((ru->fh_north_asynch_in == NULL) && (ru->feptx_ofdm))
ru->feptx_ofdm(ru, frame_tx, slot_tx);
if(!emulate_rf) {
// do outgoing fronthaul (south) if needed
@@ -1100,7 +1106,8 @@ void ru_tx_func(void *param) {
LOG_D(PHY,"rt_prof_idx %d : RU_TX time %d\n",rt_prof_idx,(int)(1e9 * (t1->tv_sec - t0->tv_sec) + (t1->tv_nsec-t0->tv_nsec)));
}
void *ru_thread( void *param ) {
void *ru_thread(void *param)
{
static int ru_thread_status;
RU_t *ru = (RU_t *)param;
RU_proc_t *proc = &ru->proc;
@@ -1333,11 +1340,11 @@ void *ru_thread( void *param ) {
// Do PRACH RU processing
int prach_id = find_nr_prach_ru(ru, proc->frame_rx, proc->tti_rx, SEARCH_EXIST);
if (prach_id>=0) {
if (prach_id >= 0) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_RU_PRACH_RX, 1 );
T(T_GNB_PHY_PRACH_INPUT_SIGNAL, T_INT(proc->frame_rx), T_INT(proc->tti_rx), T_INT(0),
T_BUFFER(&ru->common.rxdata[0][fp->get_samples_slot_timestamp(proc->tti_rx-1,fp,0)]/*-ru->N_TA_offset*/, fp->get_samples_per_slot(proc->tti_rx,fp)*4*2));
T_BUFFER(&ru->common.rxdata[0][fp->get_samples_slot_timestamp(proc->tti_rx-1,fp,0)]/*-ru->N_TA_offset*/, fp->get_samples_per_slot(proc->tti_rx,fp)*4*2));
int N_dur = get_nr_prach_duration(ru->prach_list[prach_id].fmt);
for (int prach_oc = 0; prach_oc<ru->prach_list[prach_id].num_prach_ocas; prach_oc++) {
@@ -1348,11 +1355,12 @@ void *ru_thread( void *param ) {
ru->prach_list[prach_id].numRA,
prachStartSymbol,
prach_oc,
proc->frame_rx,proc->tti_rx);
proc->frame_rx,
proc->tti_rx);
}
clock_gettime(CLOCK_MONOTONIC,&ru->rt_ru_profiling.return_RU_prachrx[rt_prof_idx]);
free_nr_ru_prach_entry(ru,prach_id);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_RU_PRACH_RX, 0 );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_RU_PRACH_RX, 0);
} // end if (prach_id > 0)
} // end if (ru->feprx)
else {
@@ -1602,38 +1610,8 @@ void configure_rru(void *ruu, void *arg)
nr_phy_init_RU(ru);
}
/*
void init_precoding_weights(PHY_VARS_gNB *gNB) {
int layer,ru_id,aa,re,ue,tb;
LTE_DL_FRAME_PARMS *fp=&gNB->frame_parms;
RU_t *ru;
LTE_gNB_DLSCH_t *dlsch;
// init precoding weigths
for (ue=0;ue<NUMBER_OF_UE_MAX;ue++) {
for (tb=0;tb<2;tb++) {
dlsch = gNB->dlsch[ue][tb];
for (layer=0; layer<4; layer++) {
int nb_tx=0;
for (ru_id=0;ru_id<RC.nb_RU;ru_id++) {
ru = RC.ru[ru_id];
nb_tx+=ru->nb_tx;
}
dlsch->ue_spec_bf_weights[layer] = (int32_t**)malloc16(nb_tx*sizeof(int32_t*));
for (aa=0; aa<nb_tx; aa++) {
dlsch->ue_spec_bf_weights[layer][aa] = (int32_t *)malloc16(fp->ofdm_symbol_size*sizeof(int32_t));
for (re=0;re<fp->ofdm_symbol_size; re++) {
dlsch->ue_spec_bf_weights[layer][aa][re] = 0x00007fff;
}
}
}
}
}
}*/
void set_function_spec_param(RU_t *ru) {
void set_function_spec_param(RU_t *ru)
{
switch (ru->if_south) {
case LOCAL_RF: // this is an RU with integrated RF (RRU, gNB)
reset_meas(&ru->rx_fhaul);
@@ -1782,20 +1760,19 @@ void init_NR_RU(configmodule_interface_t *cfg, char *rf_config_file)
}
}
gNB_RC = RC.gNB[0];
gNB0 = ru->gNB_list[0];
fp = ru->nr_frame_parms;
gNB_RC = RC.gNB[0];
gNB0 = ru->gNB_list[0];
fp = ru->nr_frame_parms;
LOG_D(PHY, "RU FUnction:%d ru->if_south:%d\n", ru->function, ru->if_south);
if (gNB0) {
if ((ru->function != NGFI_RRU_IF5) && (ru->function != NGFI_RRU_IF4p5))
AssertFatal(gNB0!=NULL,"gNB0 is null!\n");
AssertFatal(gNB0, "gNB0 is null!\n");
if (gNB0 && gNB_RC) {
LOG_I(PHY,"Copying frame parms from gNB in RC to gNB %d in ru %d and frame_parms in ru\n",gNB0->Mod_id,ru->idx);
memset((void *)fp, 0, sizeof(NR_DL_FRAME_PARMS));
memcpy((void *)fp,&gNB_RC->frame_parms,sizeof(NR_DL_FRAME_PARMS));
memcpy((void *)&gNB0->frame_parms,(void *)&gNB_RC->frame_parms,sizeof(NR_DL_FRAME_PARMS));
LOG_I(PHY,"Copying frame parms from gNB in RC to gNB %d in ru %d and frame_parms in ru\n", gNB0->Mod_id, ru->idx);
memcpy((void *)fp, &gNB_RC->frame_parms, sizeof(NR_DL_FRAME_PARMS));
memcpy((void *)&gNB0->frame_parms, (void *)&gNB_RC->frame_parms, sizeof(NR_DL_FRAME_PARMS));
// attach all RU to all gNBs in its list/
LOG_D(PHY,"ru->num_gNB:%d gNB0->num_RU:%d\n", ru->num_gNB, gNB0->num_RU);
@@ -1851,39 +1828,26 @@ void stop_RU(int nb_ru) {
static void NRRCconfig_RU(configmodule_interface_t *cfg)
{
paramdef_t RUParams[] = RUPARAMS_DESC;
paramlist_def_t RUParamList = {CONFIG_STRING_RU_LIST,NULL,0};
paramlist_def_t RUParamList = {CONFIG_STRING_RU_LIST, NULL, 0};
config_getlist(cfg, &RUParamList, RUParams, sizeofArray(RUParams), NULL);
paramdef_t GNBSParams[] = GNBSPARAMS_DESC;
paramdef_t GNBParams[] = GNBPARAMS_DESC;
paramlist_def_t GNBParamList = {GNB_CONFIG_STRING_GNB_LIST, NULL, 0};
config_get(cfg, GNBSParams, sizeofArray(GNBSParams), NULL);
int num_gnbs = GNBSParams[GNB_ACTIVE_GNBS_IDX].numelt;
AssertFatal(num_gnbs > 0, "Failed to parse config file no gnbs %s \n", GNB_CONFIG_STRING_ACTIVE_GNBS);
config_getlist(cfg, &GNBParamList, GNBParams, sizeofArray(GNBParams), NULL);
int N1 = *GNBParamList.paramarray[0][GNB_PDSCH_ANTENNAPORTS_N1_IDX].iptr;
int N2 = *GNBParamList.paramarray[0][GNB_PDSCH_ANTENNAPORTS_N2_IDX].iptr;
int XP = *GNBParamList.paramarray[0][GNB_PDSCH_ANTENNAPORTS_XP_IDX].iptr;
int num_logical_antennas = N1 * N2 * XP;
if (RUParamList.numelt > 0) {
RC.ru = (RU_t **)malloc(RC.nb_RU*sizeof(RU_t *));
RC.ru_mask = (1 << NB_RU) - 1;
printf("Set RU mask to %lx\n",RC.ru_mask);
for (int j = 0; j < RC.nb_RU; j++) {
RC.ru[j] = (RU_t *)malloc(sizeof(RU_t));
memset((void *)RC.ru[j],0,sizeof(RU_t));
RC.ru[j]->idx = j;
RC.ru[j]->nr_frame_parms = (NR_DL_FRAME_PARMS *)malloc(sizeof(NR_DL_FRAME_PARMS));
RC.ru[j]->frame_parms = (LTE_DL_FRAME_PARMS *)malloc(sizeof(LTE_DL_FRAME_PARMS));
RC.ru[j] = calloc(1, sizeof(*RC.ru[j]));
RC.ru[j]->idx = j;
RC.ru[j]->nr_frame_parms = calloc(1, sizeof(*RC.ru[j]->nr_frame_parms));
RC.ru[j]->frame_parms = calloc(1, sizeof(*RC.ru[j]->frame_parms));
printf("Creating RC.ru[%d]:%p\n", j, RC.ru[j]);
RC.ru[j]->if_timing = synch_to_ext_device;
RC.ru[j]->if_timing = synch_to_ext_device;
if (RC.nb_nr_L1_inst > 0)
RC.ru[j]->num_gNB = RUParamList.paramarray[j][RU_ENB_LIST_IDX].numelt;
RC.ru[j]->num_gNB = RUParamList.paramarray[j][RU_ENB_LIST_IDX].numelt;
else
RC.ru[j]->num_gNB = 0;
RC.ru[j]->num_gNB = 0;
for (int i = 0; i < RC.ru[j]->num_gNB; i++)
RC.ru[j]->gNB_list[i] = RC.gNB[RUParamList.paramarray[j][RU_ENB_LIST_IDX].iptr[i]];
@@ -1904,10 +1868,8 @@ static void NRRCconfig_RU(configmodule_interface_t *cfg)
"bad GPIO controller in configuration file: '%s'\n",
*(RUParamList.paramarray[j][RU_GPIO_CONTROL].strptr));
}
} else {
RC.ru[j]->openair0_cfg.gpio_controller = RU_GPIO_CONTROL_GENERIC;
LOG_I(PHY, "RU GPIO control set as 'generic'\n");
}
} else
RC.ru[j]->openair0_cfg.gpio_controller = RU_GPIO_CONTROL_NONE;
if (config_isparamset(RUParamList.paramarray[j], RU_TX_SUBDEV)) {
RC.ru[j]->openair0_cfg.tx_subdev = strdup(*(RUParamList.paramarray[j][RU_TX_SUBDEV].strptr));
@@ -2032,14 +1994,11 @@ static void NRRCconfig_RU(configmodule_interface_t *cfg)
} /* strcmp(local_rf, "yes") != 0 */
RC.ru[j]->nb_tx = *(RUParamList.paramarray[j][RU_NB_TX_IDX].uptr);
AssertFatal(RC.ru[j]->nb_tx >= num_logical_antennas,
"Number of logical antenna ports (set in config file with pdsch_AntennaPorts) cannot be larger than physical antennas (nb_tx)\n");
RC.ru[j]->nb_rx = *(RUParamList.paramarray[j][RU_NB_RX_IDX].uptr);
RC.ru[j]->att_tx = *(RUParamList.paramarray[j][RU_ATT_TX_IDX].uptr);
RC.ru[j]->att_rx = *(RUParamList.paramarray[j][RU_ATT_RX_IDX].uptr);
RC.ru[j]->if_frequency = *(RUParamList.paramarray[j][RU_IF_FREQUENCY].u64ptr);
RC.ru[j]->if_freq_offset = *(RUParamList.paramarray[j][RU_IF_FREQ_OFFSET].iptr);
RC.ru[j]->do_precoding = *(RUParamList.paramarray[j][RU_DO_PRECODING].iptr);
RC.ru[j]->sl_ahead = *(RUParamList.paramarray[j][RU_SL_AHEAD].iptr);
RC.ru[j]->num_bands = RUParamList.paramarray[j][RU_BAND_LIST_IDX].numelt;
for (int i = 0; i < RC.ru[j]->num_bands; i++)
@@ -2057,15 +2016,6 @@ static void NRRCconfig_RU(configmodule_interface_t *cfg)
AssertFatal(RC.ru[j]->num_tpcores <= RUParamList.paramarray[j][RU_TP_CORES].numelt, "Number of TP cores should be <=16\n");
for (int i = 0; i < RC.ru[j]->num_tpcores; i++)
RC.ru[j]->tpcores[i] = RUParamList.paramarray[j][RU_TP_CORES].iptr[i];
if (config_isparamset(RUParamList.paramarray[j], RU_BF_WEIGHTS_LIST_IDX)) {
RC.ru[j]->nb_bfw = RUParamList.paramarray[j][RU_BF_WEIGHTS_LIST_IDX].numelt;
for (int i = 0; i < RC.ru[j]->num_gNB; i++) {
RC.ru[j]->bw_list[i] = (int32_t *)malloc16_clear((RC.ru[j]->nb_bfw)*sizeof(int32_t));
for (int b = 0; b < RC.ru[j]->nb_bfw; b++)
RC.ru[j]->bw_list[i][b] = RUParamList.paramarray[j][RU_BF_WEIGHTS_LIST_IDX].iptr[b];
}
}
}// j=0..num_rus
} else {
RC.nb_RU = 0;
nfapi/open-nFAPI/fapi/src/nr_fapi_p5.c
+23
View File
@@ -1227,6 +1227,29 @@ uint8_t pack_nr_config_request(void *msg, uint8_t **ppWritePackedMsg, uint8_t *e
numTLVs++;
}
#endif
AssertFatal(pNfapiMsg->analog_beamforming_ve.num_beams_period_vendor_ext.tl.tag == 0, "BF Vendor extension shouldn't be set!");
// The call to pack the TLV would be the same as any other TLV, it is only packed if the tag is set,
// so, it's safe to add the call to pack_nr_tlv even if it is not always set
retval &= pack_nr_tlv(NFAPI_NR_FAPI_NUM_BEAMS_PERIOD_VENDOR_EXTENSION_TAG,
&(pNfapiMsg->analog_beamforming_ve.num_beams_period_vendor_ext),
ppWritePackedMsg,
end,
&pack_uint8_tlv_value);
// only increase if it was set
numTLVs += pNfapiMsg->analog_beamforming_ve.num_beams_period_vendor_ext.tl.tag == NFAPI_NR_FAPI_NUM_BEAMS_PERIOD_VENDOR_EXTENSION_TAG;
AssertFatal(pNfapiMsg->analog_beamforming_ve.analog_bf_vendor_ext.tl.tag == 0, "BF Vendor extension shouldn't be set!");
// The call to pack the TLV would be the same as any other TLV, it is only packed if the tag is set,
// so, it's safe to add the call to pack_nr_tlv even if it is not always set
retval &= pack_nr_tlv(NFAPI_NR_FAPI_ANALOG_BF_VENDOR_EXTENSION_TAG,
&(pNfapiMsg->analog_beamforming_ve.analog_bf_vendor_ext),
ppWritePackedMsg,
end,
&pack_uint8_tlv_value);
// only increase if it was set
numTLVs += pNfapiMsg->analog_beamforming_ve.analog_bf_vendor_ext.tl.tag == NFAPI_NR_FAPI_ANALOG_BF_VENDOR_EXTENSION_TAG;
pNfapiMsg->num_tlv = numTLVs;
retval &= push8(pNfapiMsg->num_tlv, &pNumTLVFields, end);
return retval;
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
+2
View File
@@ -23,6 +23,8 @@
#define NFAPI_NR_NFAPI_TIMING_WINDOW_TAG 0x011E
#define NFAPI_NR_NFAPI_TIMING_INFO_MODE_TAG 0x011F
#define NFAPI_NR_NFAPI_TIMING_INFO_PERIOD_TAG 0x0120
#define NFAPI_NR_FAPI_NUM_BEAMS_PERIOD_VENDOR_EXTENSION_TAG 0xA000
#define NFAPI_NR_FAPI_ANALOG_BF_VENDOR_EXTENSION_TAG 0xA001
typedef enum {
NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED=1,
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h
+34 -26
View File
@@ -22,6 +22,8 @@
#define NFAPI_MAX_NUM_UCI_INDICATION 8
#define NFAPI_MAX_NUM_GROUPS 8
#define NFAPI_MAX_NUM_CB 8
#define NFAPI_MAX_NUM_PRGS 1
#define NFAPI_MAX_NUM_BG_IF 1
// Extension to the generic structures for single tlv values
@@ -443,6 +445,27 @@ typedef struct
} nfapi_nr_measurement_config_t;
//-----------------------//
//3.3.6 Storing Precoding and Beamforming Tables
//table 3-32
typedef struct {
uint16_t dig_beam_weight_Re;
uint16_t dig_beam_weight_Im;
} nfapi_nr_txru_t;
typedef struct {
uint16_t beam_idx; //0~65535
nfapi_nr_txru_t *txru_list;
} nfapi_nr_dig_beam_t;
typedef struct {
uint16_t num_dig_beams; //0~65535
uint16_t num_txrus; //0~65535
nfapi_nr_dig_beam_t *dig_beam_list;
} nfapi_nr_dbt_pdu_t;
// Table 3–62 Precoding matrix (PM) PDU (v.222.10.04)
typedef struct {
int16_t precoder_weight_Re;
@@ -463,6 +486,11 @@ typedef struct {
nfapi_nr_pm_pdu_t *pmi_pdu;
} nfapi_nr_pm_list_t;
typedef struct {
nfapi_uint8_tlv_t num_beams_period_vendor_ext;
nfapi_uint8_tlv_t analog_bf_vendor_ext;
} nfapi_nr_analog_beamforming_ve_t;
// ERROR enums
typedef enum { // Table 2-22
NFAPI_NR_PARAM_MSG_OK = 0,
@@ -575,6 +603,8 @@ typedef struct {
nfapi_nr_measurement_config_t measurement_config;
nfapi_nr_nfapi_t nfapi_config;
nfapi_nr_pm_list_t pmi_list;
nfapi_nr_dbt_pdu_t dbt_config;
nfapi_nr_analog_beamforming_ve_t analog_beamforming_ve;
} nfapi_nr_config_request_scf_t;
typedef enum {
@@ -669,28 +699,6 @@ typedef struct {
nfapi_nr_phy_notifications_errors_e error_code;
} nfapi_nr_phy_notifications_error_indicate_t;
//-----------------------//
//3.3.6 Storing Precoding and Beamforming Tables
//table 3-32
//?
typedef struct {
uint16_t beam_idx; //0~65535
} nfapi_nr_dig_beam_t;
typedef struct {
uint16_t dig_beam_weight_Re;
uint16_t dig_beam_weight_Im;
} nfapi_nr_txru_t;
typedef struct {
uint16_t num_dig_beams; //0~65535
uint16_t num_txrus; //0~65535
nfapi_nr_dig_beam_t* dig_beam_list;
nfapi_nr_txru_t* txru_list;
} nfapi_nr_dbt_pdu_t;
// Section 3.4
// Section 3.4.1 slot indication
@@ -719,7 +727,7 @@ typedef struct
typedef struct
{
uint16_t pm_idx;//Index to precoding matrix (PM) pre-stored at cell configuration. Note: If precoding is not used this parameter should be set to 0. Value: 0->65535.
nfapi_nr_dig_bf_interface_t dig_bf_interface_list[1];//max dig_bf_interfaces
nfapi_nr_dig_bf_interface_t dig_bf_interface_list[NFAPI_MAX_NUM_BG_IF];//max dig_bf_interfaces
}nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t;
@@ -730,7 +738,7 @@ typedef struct
uint16_t prg_size;//Size in RBs of a precoding resource block group (PRG) – to which same precoding and digital beamforming gets applied. Value: 1->275
//watchout: dig_bf_interfaces here, in table 3-53 it's dig_bf_interface
uint8_t dig_bf_interfaces;//Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255
nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t prgs_list[1];//max prg_size
nfapi_nr_tx_precoding_and_beamforming_number_of_prgs_t prgs_list[NFAPI_MAX_NUM_PRGS];//max prg_size
}nfapi_nr_tx_precoding_and_beamforming_t;
@@ -1135,7 +1143,7 @@ typedef struct {
//for prach_pdu:
typedef struct
{
nfapi_nr_dig_bf_interface_t* dig_bf_interface_list;
nfapi_nr_dig_bf_interface_t dig_bf_interface_list[NFAPI_MAX_NUM_BG_IF];
} nfapi_nr_ul_beamforming_number_of_prgs_t;
typedef struct
@@ -1144,7 +1152,7 @@ typedef struct
uint16_t num_prgs; // Number of PRGs spanning this allocation. Value : 1->275
uint16_t prg_size; // Size in RBs of a precoding resource block group (PRG) – to which the same digital beamforming gets applied. Value: 1->275
uint8_t dig_bf_interface; // Number of logical antenna ports (parallel streams) resulting from the Rx combining. Value: 0->255
nfapi_nr_ul_beamforming_number_of_prgs_t *prgs_list;
nfapi_nr_ul_beamforming_number_of_prgs_t prgs_list[NFAPI_MAX_NUM_PRGS];
} nfapi_nr_ul_beamforming_t;
typedef struct
nfapi/open-nFAPI/nfapi/src/nfapi_p7.c
-13
View File
@@ -935,10 +935,6 @@ static uint8_t pack_ul_tti_request_prach_pdu(nfapi_nr_prach_pdu_t *prach_pdu, ui
return 0;
}
if (prach_pdu->beamforming.num_prgs > 0 || prach_pdu->beamforming.prg_size > 0 || prach_pdu->beamforming.dig_bf_interface > 0) {
AssertFatal(1 == 0, "PRACH PDU Beamforming not supported yet");
}
// Pack RX Beamforming PDU
if (!(push16(prach_pdu->beamforming.num_prgs, ppWritePackedMsg, end)
&& push16(prach_pdu->beamforming.prg_size, ppWritePackedMsg, end)
@@ -4772,15 +4768,6 @@ static uint8_t unpack_ul_tti_request_prach_pdu(void *tlv, uint8_t **ppReadPacked
&& pull8(ppReadPackedMsg, &prach_pdu->beamforming.dig_bf_interface, end))) {
return 0;
}
if (prach_pdu->beamforming.num_prgs > 0) {
prach_pdu->beamforming.prgs_list = calloc(prach_pdu->beamforming.num_prgs, sizeof(*prach_pdu->beamforming.prgs_list));
if (prach_pdu->beamforming.dig_bf_interface > 0) {
for(int prg_idx = 0; prg_idx < prach_pdu->beamforming.num_prgs;prg_idx++){
prach_pdu->beamforming.prgs_list[prg_idx].dig_bf_interface_list =
calloc(prach_pdu->beamforming.dig_bf_interface, sizeof(*prach_pdu->beamforming.prgs_list[0].dig_bf_interface_list));
}
}
}
for (int prg = 0; prg < prach_pdu->beamforming.num_prgs; prg++) {
for (int digBFInterface = 0; digBFInterface < prach_pdu->beamforming.dig_bf_interface; digBFInterface++) {
if (!pull16(ppReadPackedMsg, &prach_pdu->beamforming.prgs_list[prg].dig_bf_interface_list[digBFInterface].beam_idx, end)) {
openair1/PHY/INIT/nr_init.c
+42 -27
View File
@@ -41,7 +41,6 @@
#include "SCHED_NR/fapi_nr_l1.h"
#include "PHY/NR_REFSIG/ul_ref_seq_nr.h"
int l1_north_init_gNB() {
if (RC.nb_nr_L1_inst > 0 && RC.gNB != NULL) {
@@ -104,7 +103,7 @@ void reset_active_stats(PHY_VARS_gNB *gNB, int frame)
// A global var to reduce the changes size
ldpc_interface_t ldpc_interface = {0}, ldpc_interface_offload = {0};
int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
void phy_init_nr_gNB(PHY_VARS_gNB *gNB)
{
// shortcuts
NR_DL_FRAME_PARMS *const fp = &gNB->frame_parms;
@@ -112,16 +111,24 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
NR_gNB_COMMON *const common_vars = &gNB->common_vars;
NR_gNB_PRACH *const prach_vars = &gNB->prach_vars;
int i;
int Ptx=cfg->carrier_config.num_tx_ant.value;
int Prx=cfg->carrier_config.num_rx_ant.value;
common_vars->analog_bf = cfg->analog_beamforming_ve.analog_bf_vendor_ext.value;
LOG_I(PHY, "L1 configured with%s analog beamforming\n", common_vars->analog_bf ? "" : "out");
if (common_vars->analog_bf) {
common_vars->num_beams_period = cfg->analog_beamforming_ve.num_beams_period_vendor_ext.value;
LOG_I(PHY, "Max number of concurrent beams: %d\n", common_vars->num_beams_period);
} else
common_vars->num_beams_period = 1;
int Ptx = cfg->carrier_config.num_tx_ant.value;
int Prx = cfg->carrier_config.num_rx_ant.value;
int max_ul_mimo_layers = 4;
AssertFatal(Ptx>0 && Ptx<9,"Ptx %d is not supported\n",Ptx);
AssertFatal(Prx>0 && Prx<9,"Prx %d is not supported\n",Prx);
LOG_I(PHY,"[gNB %d] %s() About to wait for gNB to be configured\n", gNB->Mod_id, __FUNCTION__);
AssertFatal(Ptx > 0 && Ptx < 9,"Ptx %d is not supported\n", Ptx);
AssertFatal(Prx > 0 && Prx < 9,"Prx %d is not supported\n", Prx);
LOG_I(PHY, "[gNB %d]About to wait for gNB to be configured\n", gNB->Mod_id);
while(gNB->configured == 0) usleep(10000);
while(gNB->configured == 0)
usleep(10000);
load_dftslib();
@@ -168,19 +175,23 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
}
}
common_vars->txdataF = (c16_t **)malloc16(Ptx*sizeof(c16_t*));
common_vars->rxdataF = (c16_t **)malloc16(Prx*sizeof(c16_t*));
/* Do NOT allocate per-antenna txdataF/rxdataF: the gNB gets a pointer to the
/* Do NOT allocate per-antenna rxdataF: the gNB gets a pointer to the
* RU to copy/recover freq-domain memory from there */
common_vars->beam_id = (uint8_t **)malloc16(Ptx*sizeof(uint8_t*));
common_vars->rxdataF = (c16_t ***)malloc16(common_vars->num_beams_period * sizeof(c16_t**));
for (int i = 0; i < common_vars->num_beams_period; i++)
common_vars->rxdataF[i] = (c16_t **)malloc16(Prx * sizeof(c16_t*));
for (i=0;i<Ptx;i++){
common_vars->txdataF[i] = (c16_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(c16_t)); // [hna] samples_per_frame without CP
LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
i,common_vars->txdataF[i],
fp->samples_per_frame_wCP*sizeof(c16_t));
common_vars->beam_id[i] = (uint8_t*)malloc16_clear(fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
memset(common_vars->beam_id[i],255,fp->symbols_per_slot*fp->slots_per_frame);
common_vars->num_beams = cfg->dbt_config.num_dig_beams;
if (common_vars->num_beams > 0) {
common_vars->beam_id = (int **)malloc16(common_vars->num_beams_period * sizeof(int*));
for (int i = 0; i < common_vars->num_beams_period; i++)
common_vars->beam_id[i] = (int*)malloc16_clear(fp->symbols_per_slot * fp->slots_per_frame * sizeof(int));
}
common_vars->txdataF = (c16_t ***)malloc16(common_vars->num_beams_period * sizeof(c16_t**));
for (int i = 0; i < common_vars->num_beams_period; i++) {
common_vars->txdataF[i] = (c16_t**)malloc16_clear(Ptx * sizeof(c16_t*));
for (int j = 0; j < Ptx; j++)
common_vars->txdataF[i][j] = (c16_t*)malloc16_clear(fp->samples_per_frame_wCP * sizeof(c16_t));
}
common_vars->debugBuff = (int32_t*)malloc16_clear(fp->samples_per_frame*sizeof(int32_t)*100);
common_vars->debugBuff_sample_offset = 0;
@@ -205,14 +216,14 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
pusch->ul_ch_estimates_time = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->rxdataF_comp = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->llr_layers = (int16_t **)malloc16(max_ul_mimo_layers * sizeof(int32_t *));
for (i = 0; i < n_buf; i++) {
for (int i = 0; i < n_buf; i++) {
pusch->ul_ch_estimates[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * fp->ofdm_symbol_size * fp->symbols_per_slot);
pusch->ul_ch_estimates_time[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * fp->ofdm_symbol_size);
pusch->ptrs_phase_per_slot[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * fp->symbols_per_slot); // symbols per slot
pusch->rxdataF_comp[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
}
for (i=0; i< max_ul_mimo_layers; i++) {
for (int i = 0; i < max_ul_mimo_layers; i++) {
pusch->llr_layers[i] = (int16_t *)malloc16_clear((8 * ((3 * 8 * 6144) + 12))
* sizeof(int16_t)); // [hna] 6144 is LTE and (8*((3*8*6144)+12)) is not clear
}
@@ -220,8 +231,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
* sizeof(int16_t)); // [hna] 6144 is LTE and (8*((3*8*6144)+12)) is not clear
pusch->ul_valid_re_per_slot = (int16_t *)malloc16_clear(sizeof(int16_t) * fp->symbols_per_slot);
} // ulsch_id
return (0);
}
void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
@@ -252,13 +261,19 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
reset_nr_transport(gNB);
NR_gNB_COMMON * common_vars = &gNB->common_vars;
for (int i = 0; i < Ptx; i++) {
free_and_zero(common_vars->txdataF[i]);
free_and_zero(common_vars->beam_id[i]);
for (int j = 0; j < common_vars->num_beams_period; j++) {
if (common_vars->beam_id)
free_and_zero(common_vars->beam_id[j]);
for (int i = 0; i < Ptx; i++) {
free_and_zero(common_vars->txdataF[j][i]);
}
free_and_zero(common_vars->txdataF[j]);
}
/* Do NOT free per-antenna txdataF/rxdataF: the gNB gets a pointer to the
* RU's txdataF/rxdataF, and the RU will free that */
for (int j = 0; j < common_vars->num_beams_period; j++)
free_and_zero(common_vars->rxdataF[j]);
free_and_zero(common_vars->txdataF);
free_and_zero(common_vars->rxdataF);
free_and_zero(common_vars->beam_id);
openair1/PHY/INIT/nr_init_ru.c
+44 -82
View File
@@ -29,31 +29,35 @@
void init_prach_ru_list(RU_t *ru);
int nr_phy_init_RU(RU_t *ru) {
int nr_phy_init_RU(RU_t *ru)
{
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
int i,j;
int p;
int re;
LOG_I(PHY,"Initializing RU signal buffers (if_south %s) nb_tx %d, nb_rx %d\n",ru_if_types[ru->if_south],ru->nb_tx, ru->nb_rx);
nfapi_nr_config_request_scf_t *cfg;
ru->nb_log_antennas=0;
for (int n=0;n<ru->num_gNB;n++) {
cfg = &ru->config;
if (cfg->carrier_config.num_tx_ant.value > ru->nb_log_antennas) ru->nb_log_antennas = cfg->carrier_config.num_tx_ant.value;
nfapi_nr_config_request_scf_t *cfg = &ru->config;
ru->nb_log_antennas = 0;
for (int n = 0; n < ru->num_gNB; n++) {
if (cfg->carrier_config.num_tx_ant.value > ru->nb_log_antennas)
ru->nb_log_antennas = cfg->carrier_config.num_tx_ant.value;
}
// copy configuration from gNB[0] in to RU, assume that all gNB instances sharing RU use the same configuration (at least the parts that are needed by the RU, numerology and PRACH)
// copy configuration from gNB[0] in to RU, assume that all gNB instances sharing RU use the same configuration
// (at least the parts that are needed by the RU, numerology and PRACH)
AssertFatal(ru->nb_log_antennas > 0 && ru->nb_log_antennas < 13, "ru->nb_log_antennas %d ! \n",ru->nb_log_antennas);
ru->common.beam_id = malloc16_clear(MAX_NUM_BEAM_PERIODS * sizeof(int*));
for(int i = 0; i < MAX_NUM_BEAM_PERIODS; i++)
ru->common.beam_id[i] = malloc16_clear(fp->symbols_per_slot * fp->slots_per_frame * sizeof(int));
if (ru->if_south <= REMOTE_IF5) { // this means REMOTE_IF5 or LOCAL_RF, so allocate memory for time-domain signals
// Time-domain signals
ru->common.txdata = (int32_t**)malloc16(ru->nb_tx*sizeof(int32_t*));
ru->common.rxdata = (int32_t**)malloc16(ru->nb_rx*sizeof(int32_t*) );
for (i=0; i<ru->nb_tx; i++) {
for (int i = 0; i < ru->nb_tx; i++) {
// Allocate 10 subframes of I/Q TX signal data (time) if not
ru->common.txdata[i] = (int32_t*)malloc16_clear((ru->sf_extension + fp->samples_per_frame)*sizeof(int32_t));
LOG_I(PHY,"[INIT] common.txdata[%d] = %p (%lu bytes,sf_extension %d)\n",i,ru->common.txdata[i],
@@ -63,7 +67,7 @@ int nr_phy_init_RU(RU_t *ru) {
LOG_I(PHY,"[INIT] common.txdata[%d] = %p \n",i,ru->common.txdata[i]);
}
for (i=0;i<ru->nb_rx;i++) {
for (int i = 0; i < ru->nb_rx; i++) {
ru->common.rxdata[i] = (int32_t*)malloc16_clear( fp->samples_per_frame*sizeof(int32_t) );
}
} // IF5 or local RF
@@ -76,7 +80,7 @@ int nr_phy_init_RU(RU_t *ru) {
if (ru->function != NGFI_RRU_IF5) { // we need to do RX/TX RU processing
LOG_I(PHY,"nb_tx %d\n",ru->nb_tx);
ru->common.rxdata_7_5kHz = (int32_t**)malloc16(ru->nb_rx*sizeof(int32_t*) );
for (i=0;i<ru->nb_rx;i++) {
for (int i = 0; i < ru->nb_rx; i++) {
ru->common.rxdata_7_5kHz[i] = (int32_t*)malloc16_clear( 2*fp->samples_per_subframe*2*sizeof(int32_t) );
LOG_I(PHY,"rxdata_7_5kHz[%d] %p for RU %d\n",i,ru->common.rxdata_7_5kHz[i],ru->idx);
}
@@ -84,31 +88,33 @@ int nr_phy_init_RU(RU_t *ru) {
// allocate precoding input buffers (TX)
ru->common.txdataF = (int32_t **)malloc16(ru->nb_tx*sizeof(int32_t*));
for(i=0; i< ru->nb_tx; ++i) ru->common.txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
// [hna] samples_per_frame without CP
for(int i = 0; i < ru->nb_tx; ++i)
ru->common.txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP * sizeof(int32_t));
// allocate IFFT input buffers (TX)
ru->common.txdataF_BF = (int32_t **)malloc16(ru->nb_tx*sizeof(int32_t*));
LOG_I(PHY,"[INIT] common.txdata_BF= %p (%lu bytes)\n",ru->common.txdataF_BF,
ru->nb_tx*sizeof(int32_t*));
for (i=0; i<ru->nb_tx; i++) {
LOG_I(PHY,"[INIT] common.txdata_BF= %p (%lu bytes)\n", ru->common.txdataF_BF, ru->nb_tx*sizeof(int32_t*));
for (int i = 0; i < ru->nb_tx; i++) {
ru->common.txdataF_BF[i] = (int32_t*)malloc16_clear(fp->samples_per_subframe_wCP*sizeof(int32_t) );
LOG_I(PHY,"txdataF_BF[%d] %p for RU %d\n",i,ru->common.txdataF_BF[i],ru->idx);
}
// allocate FFT output buffers (RX)
ru->common.rxdataF = (int32_t**)malloc16(ru->nb_rx*sizeof(int32_t*) );
for (i=0; i<ru->nb_rx; i++) {
for (int i = 0; i < ru->nb_rx; i++) {
// allocate 4 slots of I/Q signal data (frequency)
ru->common.rxdataF[i] = (int32_t*)malloc16_clear(sizeof(**ru->common.rxdataF)*(RU_RX_SLOT_DEPTH*fp->symbols_per_slot*fp->ofdm_symbol_size) );
int size = RU_RX_SLOT_DEPTH * fp->symbols_per_slot * fp->ofdm_symbol_size;
ru->common.rxdataF[i] = (int32_t*)malloc16_clear(sizeof(**ru->common.rxdataF) * size);
LOG_I(PHY,"rxdataF[%d] %p for RU %d\n",i,ru->common.rxdataF[i],ru->idx);
}
/* number of elements of an array X is computed as sizeof(X) / sizeof(X[0]) */
// AssertFatal(ru->nb_rx <= sizeof(ru->prach_rxsigF) / sizeof(ru->prach_rxsigF[0]),
// "nb_antennas_rx too large");
for (j=0;j<NUMBER_OF_NR_RU_PRACH_OCCASIONS_MAX;j++) {
for (int j = 0; j < NUMBER_OF_NR_RU_PRACH_OCCASIONS_MAX; j++) {
ru->prach_rxsigF[j] = (int16_t**)malloc(ru->nb_rx * sizeof(int16_t*));
for (i=0; i<ru->nb_rx; i++) {
for (int i = 0; i < ru->nb_rx; i++) {
// largest size for PRACH FFT is 4x98304 (16*24576)
ru->prach_rxsigF[j][i] = (int16_t*)malloc16_clear( 4*98304*2*sizeof(int16_t) );
LOG_D(PHY,"[INIT] prach_vars->rxsigF[%d] = %p\n",i,ru->prach_rxsigF[j][i]);
@@ -120,44 +126,8 @@ int nr_phy_init_RU(RU_t *ru) {
LOG_I(PHY,"[INIT] %s() ru->num_gNB:%d \n", __FUNCTION__, ru->num_gNB);
if (ru->do_precoding == 1) {
int beam_count = 0;
if (ru->nb_tx>1) { //Enable beamforming when nb_tx > 1
for (p=0;p<ru->nb_log_antennas;p++) {
//if ((fp->L_ssb >> (63-p)) & 0x01)//64 bit-map with the MSB @2⁶³ corresponds to SSB ssb_index 0
beam_count++;
}
AssertFatal(ru->nb_bfw==(beam_count*ru->nb_tx),"Number of beam weights from config file is %d while the expected number is %d",ru->nb_bfw,(beam_count*ru->nb_tx));
for (i=0; i<ru->num_gNB; i++) {
int l_ind = 0;
for (p=0;p<ru->nb_log_antennas;p++) {
//if ((fp->L_ssb >> (63-p)) & 0x01) {
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) {
ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
AssertFatal(ru->bw_list[i],"ru->bw_list[%d] is null\n",i);
for (re=0; re<fp->ofdm_symbol_size; re++)
ru->beam_weights[i][p][j][re] = ru->bw_list[i][l_ind];
//printf("Beam Weight %08x for beam %d and tx %d\n",ru->bw_list[i][l_ind],p,j);
l_ind++;
} // for j
//}
} // for p
} // for i
}
ru->common.beam_id = (uint8_t**)malloc16_clear(ru->nb_tx*sizeof(uint8_t*));
for(i=0; i< ru->nb_tx; ++i) {
ru->common.beam_id[i] = (uint8_t*)malloc16_clear(fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
memset(ru->common.beam_id[i],255,fp->symbols_per_slot*fp->slots_per_frame);
}
}
} // !=IF5
ru->common.sync_corr = (uint32_t*)malloc16_clear( LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(uint32_t)*fp->samples_per_subframe_wCP );
init_prach_ru_list(ru);
return(0);
@@ -165,56 +135,48 @@ int nr_phy_init_RU(RU_t *ru) {
void nr_phy_free_RU(RU_t *ru)
{
int i,j;
int p;
LOG_I(PHY, "Freeing RU signal buffers (if_south %s) nb_tx %d\n", ru_if_types[ru->if_south], ru->nb_tx);
if (ru->if_south <= REMOTE_IF5) { // this means REMOTE_IF5 or LOCAL_RF, so free memory for time-domain signals
// Hack: undo what is done at allocation
for (i = 0; i < ru->nb_tx; i++) {
for (int i = 0; i < ru->nb_tx; i++) {
int32_t *p = &ru->common.txdata[i][-ru->sf_extension];
free_and_zero(p);
}
free_and_zero(ru->common.txdata);
for (i = 0; i < ru->nb_rx; i++)
for (int i = 0; i < ru->nb_rx; i++)
free_and_zero(ru->common.rxdata[i]);
free_and_zero(ru->common.rxdata);
} // else: IF5 or local RF -> nothing to free()
if (ru->function != NGFI_RRU_IF5) { // we need to do RX/TX RU processing
for (i = 0; i < ru->nb_rx; i++) free_and_zero(ru->common.rxdata_7_5kHz[i]);
for (int i = 0; i < ru->nb_rx; i++)
free_and_zero(ru->common.rxdata_7_5kHz[i]);
free_and_zero(ru->common.rxdata_7_5kHz);
// free beamforming input buffers (TX)
for (i = 0; i < ru->nb_tx; i++) free_and_zero(ru->common.txdataF[i]);
for (int i = 0; i < ru->nb_tx; i++)
free_and_zero(ru->common.txdataF[i]);
free_and_zero(ru->common.txdataF);
// free IFFT input buffers (TX)
for (i = 0; i < ru->nb_tx; i++) free_and_zero(ru->common.txdataF_BF[i]);
for (int i = 0; i < ru->nb_tx; i++)
free_and_zero(ru->common.txdataF_BF[i]);
free_and_zero(ru->common.txdataF_BF);
// free FFT output buffers (RX)
for (i = 0; i < ru->nb_rx; i++) free_and_zero(ru->common.rxdataF[i]);
free_and_zero(ru->common.rxdataF);
for (int i = 0; i < ru->nb_rx; i++)
free_and_zero(ru->common.rxdataF[i]);
free_and_zero(ru->common.rxdataF);
for (j=0;j<NUMBER_OF_NR_RU_PRACH_OCCASIONS_MAX;j++) {
for (i = 0; i < ru->nb_rx; i++)
for (int j = 0; j < NUMBER_OF_NR_RU_PRACH_OCCASIONS_MAX; j++) {
for (int i = 0; i < ru->nb_rx; i++)
free_and_zero(ru->prach_rxsigF[j][i]);
free_and_zero(ru->prach_rxsigF[j]);
}
if (ru->do_precoding == 1) {
for (i = 0; i < ru->num_gNB; i++) {
for (p = 0; p < ru->nb_log_antennas; p++) {
for (j=0; j<ru->nb_tx; j++) free_and_zero(ru->beam_weights[i][p][j]);
free_and_zero(ru->beam_weights[i][p]);
}
}
for(i=0; i< ru->nb_tx; ++i)
free_and_zero(ru->common.beam_id[i]);
free_and_zero(ru->common.beam_id);
}
for(int i = 0; i < MAX_NUM_BEAM_PERIODS; ++i)
free_and_zero(ru->common.beam_id[i]);
free_and_zero(ru->common.beam_id);
}
free_and_zero(ru->common.sync_corr);
}
openair1/PHY/INIT/nr_phy_init.h
+1 -1
View File
@@ -38,7 +38,7 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB);
void init_nr_ue_transport(PHY_VARS_NR_UE *ue);
void init_N_TA_offset(PHY_VARS_NR_UE *ue);
void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms);
int phy_init_nr_gNB(PHY_VARS_gNB *gNB);
void phy_init_nr_gNB(PHY_VARS_gNB *gNB);
int init_codebook_gNB(PHY_VARS_gNB *gNB);
void nr_phy_config_request(NR_PHY_Config_t *gNB);
void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu,int Nid_cell,uint64_t position_in_burst);
openair1/PHY/MODULATION/beamforming.c
+16 -23
View File
@@ -137,32 +137,25 @@ int beam_precoding_one_eNB(int32_t **txdataF,
}
int nr_beam_precoding(c16_t **txdataF,
c16_t **txdataF_BF,
NR_DL_FRAME_PARMS *frame_parms,
int32_t ***beam_weights,
int slot,
int symbol,
int aa,
int nb_antenna_ports,
int offset)
void nr_beam_precoding(c16_t **txdataF,
c16_t **txdataF_BF,
NR_DL_FRAME_PARMS *frame_parms,
int32_t ***beam_weights,
int slot,
int symbol,
int aa,
int nb_antenna_ports,
int offset)
{
uint8_t p;
// clear txdata_BF[aa][re] for each call of ue_spec_beamforming
memset(&txdataF_BF[aa][symbol*frame_parms->ofdm_symbol_size], 0, sizeof(c16_t) *(frame_parms->ofdm_symbol_size));
for (p=0; p<nb_antenna_ports; p++) {
//if ((frame_parms->L_ssb >> (63-p)) & 0x01) {
multadd_cpx_vector((int16_t*)&txdataF[p][(symbol*frame_parms->ofdm_symbol_size)+offset],
(int16_t*)beam_weights[p][aa],
(int16_t*)&txdataF_BF[aa][symbol*frame_parms->ofdm_symbol_size],
0,
frame_parms->ofdm_symbol_size,
15);
//}
for (int p = 0; p < nb_antenna_ports; p++) {
multadd_cpx_vector((int16_t*)&txdataF[p][(symbol*frame_parms->ofdm_symbol_size)+offset],
(int16_t*)beam_weights[p][aa],
(int16_t*)&txdataF_BF[aa][symbol*frame_parms->ofdm_symbol_size],
0,
frame_parms->ofdm_symbol_size,
15);
}
return 0;
}
openair1/PHY/MODULATION/nr_modulation.h
+9 -10
View File
@@ -95,16 +95,15 @@ int nr_slot_fep_ul(NR_DL_FRAME_PARMS *frame_parms,
*/
void nr_dft(c16_t *z, c16_t *d, uint32_t Msc_PUSCH);
int nr_beam_precoding(c16_t **txdataF,
c16_t **txdataF_BF,
NR_DL_FRAME_PARMS *frame_parms,
int32_t ***beam_weights,
int slot,
int symbol,
int aa,
int nb_antenna_ports,
int offset
);
void nr_beam_precoding(c16_t **txdataF,
c16_t **txdataF_BF,
NR_DL_FRAME_PARMS *frame_parms,
int32_t ***beam_weights,
int slot,
int symbol,
int aa,
int nb_antenna_ports,
int offset);
void apply_nr_rotation_TX(const NR_DL_FRAME_PARMS *fp,
c16_t *txdataF,
openair1/PHY/NR_ESTIMATION/nr_measurements_gNB.c
+8 -8
View File
@@ -119,7 +119,7 @@ void gNB_I0_measurements(PHY_VARS_gNB *gNB, int slot, int first_symb, int num_sy
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
NR_gNB_COMMON *common_vars = &gNB->common_vars;
PHY_MEASUREMENTS_gNB *measurements = &gNB->measurements;
int rb, nb_symb[275]={0};
int nb_symb[275]={0};
allocCast2D(n0_subband_power,
unsigned int,
@@ -135,20 +135,20 @@ void gNB_I0_measurements(PHY_VARS_gNB *gNB, int slot, int first_symb, int num_sy
frame_parms->N_RB_UL,
false);
for (int s=first_symb;s<(first_symb+num_symb);s++) {
// TODO modify the measurements to take into account concurrent beams
for (int s = first_symb; s < first_symb + num_symb; s++) {
int offset0 = ((slot&3)*frame_parms->symbols_per_slot + s) * frame_parms->ofdm_symbol_size;
for (rb=0; rb<frame_parms->N_RB_UL; rb++) {
for (int rb = 0; rb < frame_parms->N_RB_UL; rb++) {
if ((rb_mask_ul[s][rb >> 5] & (1U << (rb & 31))) == 0 && // check that rb was not used in this subframe
!(I0_SKIP_DC && rb == frame_parms->N_RB_UL >> 1)) { // skip middle PRB because of artificial noise possibly created by FFT
int offset = offset0 + (frame_parms->first_carrier_offset + (rb*12))%frame_parms->ofdm_symbol_size;
nb_symb[rb]++;
for (int aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
c16_t *ul_ch = &common_vars->rxdataF[aarx][offset];
for (int aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
c16_t *ul_ch = &common_vars->rxdataF[0][aarx][offset];
int32_t signal_energy;
if (((frame_parms->N_RB_UL&1) == 1) &&
(rb==(frame_parms->N_RB_UL>>1))) {
if (((frame_parms->N_RB_UL & 1) == 1) && (rb == (frame_parms->N_RB_UL >> 1))) {
signal_energy = signal_energy_nodc(ul_ch, 6);
ul_ch = &common_vars->rxdataF[aarx][offset0];
ul_ch = &common_vars->rxdataF[0][aarx][offset0];
signal_energy += signal_energy_nodc(ul_ch, 6);
} else {
signal_energy = signal_energy_nodc(ul_ch, 12);
openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
+2 -1
View File
@@ -71,6 +71,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
unsigned short p,
unsigned char symbol,
int ul_id,
int beam_nb,
unsigned short bwp_start_subcarrier,
nfapi_nr_pusch_pdu_t *pusch_pdu,
int *max_ch,
@@ -153,7 +154,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
memset(delay, 0, sizeof(*delay));
for (int aarx=0; aarx<gNB->frame_parms.nb_antennas_rx; aarx++) {
c16_t *rxdataF = (c16_t *)&gNB->common_vars.rxdataF[aarx][symbol_offset + slot_offset];
c16_t *rxdataF = (c16_t *)&gNB->common_vars.rxdataF[beam_nb][aarx][symbol_offset + slot_offset];
c16_t *ul_ch = &ul_ch_estimates[nl * gNB->frame_parms.nb_antennas_rx + aarx][symbol_offset];
memset(ul_ch, 0, sizeof(*ul_ch) * symbolSize);
openair1/PHY/NR_ESTIMATION/nr_ul_estimation.h
+1
View File
@@ -47,6 +47,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
unsigned short p,
unsigned char symbol,
int ul_id,
int beam_nb,
unsigned short bwp_start_subcarrier,
nfapi_nr_pusch_pdu_t *pusch_pdu,
int *max_ch,
openair1/PHY/NR_TRANSPORT/nr_dci.c
+44 -38
View File
@@ -36,6 +36,7 @@
#include "nr_sch_dmrs.h"
#include "PHY/MODULATION/nr_modulation.h"
#include "common/utils/nr/nr_common.h"
#include "SCHED_NR/sched_nr.h"
//#define DEBUG_PDCCH_DMRS
//#define DEBUG_DCI
@@ -50,17 +51,12 @@ static void nr_pdcch_scrambling(uint32_t *in, uint32_t size, uint32_t Nid, uint3
out[i] = in[i] ^ seq[i];
}
void nr_generate_dci(PHY_VARS_gNB *gNB,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms,
int slot) {
uint16_t cset_start_sc;
uint8_t cset_start_symb, cset_nsymb;
int k,l,k_prime,dci_idx, dmrs_idx;
static void nr_generate_dci(PHY_VARS_gNB *gNB,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
int txdataF_offset,
NR_DL_FRAME_PARMS *frame_parms,
int slot)
{
// fill reg list per symbol
int reg_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL * NR_NB_REG_PER_CCE];
nr_fill_reg_list(reg_list, pdcch_pdu_rel15);
@@ -68,20 +64,29 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
int rb_offset;
int n_rb;
get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
cset_start_sc = frame_parms->first_carrier_offset + (pdcch_pdu_rel15->BWPStart + rb_offset) * NR_NB_SC_PER_RB;
uint16_t cset_start_sc = frame_parms->first_carrier_offset + (pdcch_pdu_rel15->BWPStart + rb_offset) * NR_NB_SC_PER_RB;
int idx1 = pdcch_pdu_rel15->StartSymbolIndex+pdcch_pdu_rel15->DurationSymbols;
int idx2 = (((n_rb + rb_offset + pdcch_pdu_rel15->BWPStart) * 6 + 15) >> 4) << 4;
int16_t mod_dmrs[idx1][idx2] __attribute__((aligned(16)));
int16_t mod_dmrs[pdcch_pdu_rel15->StartSymbolIndex+pdcch_pdu_rel15->DurationSymbols][(((n_rb+rb_offset+pdcch_pdu_rel15->BWPStart)*6+15)>>4)<<4] __attribute__((aligned(16))); // 3 for the max coreset duration
for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) {
for (int d = 0; d < pdcch_pdu_rel15->numDlDci; d++) {
/*The coreset is initialised
* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0
* or the rb_offset for other coresets
* in time: by its first slot and its first symbol*/
const nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[d];
cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
dci_idx = 0;
uint32_t cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
uint32_t cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
int dci_idx = 0;
// multi-beam number (for concurrent beams)
int beam_nb = beam_index_allocation(dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx,
&gNB->common_vars,
slot,
frame_parms->symbols_per_slot,
cset_start_symb,
pdcch_pdu_rel15->DurationSymbols);
LOG_D(NR_PHY_DCI, "pdcch: Coreset rb_offset %d, nb_rb %d BWP Start %d\n", rb_offset, n_rb, pdcch_pdu_rel15->BWPStart);
LOG_D(NR_PHY_DCI,
"pdcch: Coreset starting subcarrier %d on symbol %d (%d symbols)\n",
@@ -107,16 +112,18 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
/// DMRS QPSK modulation
for (int symb=cset_start_symb; symb<cset_start_symb + pdcch_pdu_rel15->DurationSymbols; symb++) {
for (int symb = cset_start_symb; symb < cset_start_symb + pdcch_pdu_rel15->DurationSymbols; symb++) {
const uint32_t *gold = nr_gold_pdcch(frame_parms->N_RB_DL, frame_parms->symbols_per_slot, dci_pdu->ScramblingId, slot, symb);
nr_modulation(gold, dmrs_length, DMRS_MOD_ORDER,
mod_dmrs[symb]); // Qm = 2 as DMRS is QPSK modulated
nr_modulation(gold, dmrs_length, DMRS_MOD_ORDER, mod_dmrs[symb]); // Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_PDCCH_DMRS
if(dci_pdu->RNTI!=0xFFFF) {
for (int i=0; i<dmrs_length>>1; i++)
printf("symb %d i %d %p gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
&gold_pdcch_dmrs[symb][i>>5],gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1]);
printf("symb %d i %d %p gold seq 0x%08x mod_dmrs %d %d\n",
symb,
i,
&gold_pdcch_dmrs[symb][i>>5],gold_pdcch_dmrs[symb][i>>5],
mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1]);
}
#endif
}
@@ -163,7 +170,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
#endif
/// Resource mapping
uint16_t amp = gNB->TX_AMP;
int32_t *txdataF = (int32_t *)&gNB->common_vars.txdataF[beam_nb][0][txdataF_offset];
if (cset_start_sc >= frame_parms->ofdm_symbol_size)
cset_start_sc -= frame_parms->ofdm_symbol_size;
@@ -172,20 +180,21 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
for(int symbol_idx = 0; symbol_idx < pdcch_pdu_rel15->DurationSymbols; symbol_idx++) {
// allocating rbs per symbol
for (int reg_count = 0; reg_count < num_regs; reg_count++) {
k = cset_start_sc + reg_list[d][reg_count] * NR_NB_SC_PER_RB;
int k = cset_start_sc + reg_list[d][reg_count] * NR_NB_SC_PER_RB;
LOG_D(NR_PHY_DCI, "REG %d k %d\n", reg_list[d][reg_count], k);
if (k >= frame_parms->ofdm_symbol_size)
k -= frame_parms->ofdm_symbol_size;
l = cset_start_symb + symbol_idx;
int l = cset_start_symb + symbol_idx;
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
int dmrs_idx;
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_idx = (reg_list[d][reg_count] + pdcch_pdu_rel15->BWPStart) * 3;
else
dmrs_idx = (reg_list[d][reg_count] + rb_offset) * 3;
k_prime = 0;
int k_prime = 0;
for (int m = 0; m < NR_NB_SC_PER_RB; m++) {
if (m == (k_prime << 2) + 1) { // DMRS if not already mapped
@@ -235,16 +244,13 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
} // for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++)
}
void nr_generate_dci_top(processingData_L1tx_t *msgTx,
int slot,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms) {
for (int i=0; i<msgTx->num_ul_pdcch; i++)
nr_generate_dci(msgTx->gNB,&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
for (int i=0; i<msgTx->num_dl_pdcch; i++)
nr_generate_dci(msgTx->gNB,&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
void nr_generate_dci_top(processingData_L1tx_t *msgTx, int slot, int txdataF_offset)
{
PHY_VARS_gNB *gNB = msgTx->gNB;
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
for (int i = 0; i < msgTx->num_ul_pdcch; i++)
nr_generate_dci(msgTx->gNB, &msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15, txdataF_offset, frame_parms, slot);
for (int i = 0; i < msgTx->num_dl_pdcch; i++)
nr_generate_dci(msgTx->gNB, &msgTx->pdcch_pdu[i].pdcch_pdu_rel15, txdataF_offset, frame_parms, slot);
}
openair1/PHY/NR_TRANSPORT/nr_dci.h
+1 -5
View File
@@ -26,11 +26,7 @@
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h"
void nr_generate_dci_top(processingData_L1tx_t *msgTx,
int slot,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS *frame_parms);
void nr_generate_dci_top(processingData_L1tx_t *msgTx, int slot, int txdataF_offset);
int16_t find_nr_pdcch(int frame,int slot, PHY_VARS_gNB *gNB,find_type_t type);
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
+13 -20
View File
@@ -39,6 +39,7 @@
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "common/utils/nr/nr_common.h"
#include "executables/softmodem-common.h"
#include "SCHED_NR/sched_nr.h"
//#define DEBUG_DLSCH
//#define DEBUG_DLSCH_MAPPING
@@ -468,7 +469,16 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot)
// The Precoding matrix:
// The Codebook Type I
start_meas(&gNB->dlsch_precoding_stats);
c16_t **txdataF = gNB->common_vars.txdataF;
nfapi_nr_tx_precoding_and_beamforming_t *pb = &rel15->precodingAndBeamforming;
// beam number in multi-beam scenario (concurrent beams)
int beam_nb = beam_index_allocation(pb->prgs_list[0].dig_bf_interface_list[0].beam_idx,
&gNB->common_vars,
slot,
frame_parms->symbols_per_slot,
rel15->StartSymbolIndex,
rel15->NrOfSymbols);
c16_t **txdataF = gNB->common_vars.txdataF[beam_nb];
for (int ant = 0; ant < frame_parms->nb_antennas_tx; ant++) {
for (int l_symbol = rel15->StartSymbolIndex; l_symbol < rel15->StartSymbolIndex + rel15->NrOfSymbols; l_symbol++) {
@@ -477,10 +487,8 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot)
int rb = 0;
while(rb < rel15->rbSize) {
//get pmi info
const int pmi = (rel15->precodingAndBeamforming.prg_size > 0) ?
(rel15->precodingAndBeamforming.prgs_list[(int)rb/rel15->precodingAndBeamforming.prg_size].pm_idx) : 0;
const int pmi2 = (rb < (rel15->rbSize - 1) && rel15->precodingAndBeamforming.prg_size > 0) ?
(rel15->precodingAndBeamforming.prgs_list[(int)(rb+1)/rel15->precodingAndBeamforming.prg_size].pm_idx) : -1;
const int pmi = (pb->prg_size > 0) ? (pb->prgs_list[(int)rb / pb->prg_size].pm_idx) : 0;
const int pmi2 = (rb < (rel15->rbSize - 1) && pb->prg_size > 0) ? (pb->prgs_list[(int)(rb+1)/pb->prg_size].pm_idx) : -1;
// If pmi of next RB and pmi of current RB are the same, we do 2 RB in a row
// if pmi differs, or current rb is the end (rel15->rbSize - 1), than we do 1 RB in a row
@@ -576,21 +584,6 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx, int frame, int slot)
stop_meas(&gNB->dlsch_precoding_stats);
// TODO: handle precoding
// this maps the layers onto antenna ports
// handle beamforming ID
// each antenna port is assigned a beam_index
// since PHY can only handle BF on slot basis we set the whole slot
// first check if this slot has not already been allocated to another beam
if (gNB->common_vars.beam_id[0][slot*frame_parms->symbols_per_slot]==255) {
for (int j=0;j<frame_parms->symbols_per_slot;j++)
gNB->common_vars.beam_id[0][slot*frame_parms->symbols_per_slot+j] = rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx;
}
else {
LOG_D(PHY,"beam index for PDSCH allocation already taken\n");
}
}// dlsch loop
}
openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
-20
View File
@@ -73,13 +73,6 @@ void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch, uint16_t N_RB, const NR_DL_FRAME_PARM
}
free(harq->c);
free(harq->pdu);
for (int layer = 0; layer < max_layers; layer++) {
for (int aa = 0; aa < 64; aa++)
free(dlsch->ue_spec_bf_weights[layer][aa]);
free(dlsch->ue_spec_bf_weights[layer]);
}
free(dlsch->ue_spec_bf_weights);
}
NR_gNB_DLSCH_t new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, uint16_t N_RB)
@@ -96,19 +89,6 @@ NR_gNB_DLSCH_t new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, uint16_t N_RB)
uint32_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
NR_gNB_DLSCH_t dlsch;
dlsch.ue_spec_bf_weights = (int32_t ***)malloc16(max_layers * sizeof(int32_t **));
for (int layer=0; layer<max_layers; layer++) {
dlsch.ue_spec_bf_weights[layer] = (int32_t **)malloc16(64 * sizeof(int32_t *));
for (int aa=0; aa<64; aa++) {
dlsch.ue_spec_bf_weights[layer][aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES * sizeof(int32_t));
for (int re=0; re<OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES; re++) {
dlsch.ue_spec_bf_weights[layer][aa][re] = 0x00007fff;
}
}
}
NR_DL_gNB_HARQ_t *harq = &dlsch.harq_process;
bzero(harq, sizeof(NR_DL_gNB_HARQ_t));
harq->b = malloc16(dlsch_bytes);
openair1/PHY/NR_TRANSPORT/nr_prach.c
+99 -81
View File
@@ -31,23 +31,26 @@
*/
#include "PHY/defs_gNB.h"
#include "SCHED_NR/sched_nr.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
#include "openair1/PHY/NR_TRANSPORT/nr_prach.h"
void init_prach_list(PHY_VARS_gNB *gNB)
{
AssertFatal(gNB!=NULL,"gNB is null\n");
for (int i=0; i<NUMBER_OF_NR_PRACH_MAX; i++){
AssertFatal(gNB != NULL, "gNB is null\n");
for (int i = 0; i < NUMBER_OF_NR_PRACH_MAX; i++){
gNB->prach_vars.list[i].frame = -1;
gNB->prach_vars.list[i].slot = -1;
gNB->prach_vars.list[i].slot = -1;
gNB->prach_vars.list[i].beam_nb = -1;
}
}
void free_nr_prach_entry(PHY_VARS_gNB *gNB, int prach_id)
{
gNB->prach_vars.list[prach_id].frame = -1;
gNB->prach_vars.list[prach_id].slot = -1;
gNB->prach_vars.list[prach_id].slot = -1;
gNB->prach_vars.list[prach_id].beam_nb = -1;
}
int16_t find_nr_prach(PHY_VARS_gNB *gNB,int frame, int slot, find_type_t type) {
@@ -70,47 +73,54 @@ int16_t find_nr_prach(PHY_VARS_gNB *gNB,int frame, int slot, find_type_t type) {
return -1;
}
void nr_fill_prach(PHY_VARS_gNB *gNB,
int SFN,
int Slot,
nfapi_nr_prach_pdu_t *prach_pdu)
void nr_fill_prach(PHY_VARS_gNB *gNB, int SFN, int Slot, nfapi_nr_prach_pdu_t *prach_pdu)
{
int prach_id = find_nr_prach(gNB,SFN,Slot,SEARCH_EXIST_OR_FREE);
int prach_id = find_nr_prach(gNB, SFN, Slot, SEARCH_EXIST_OR_FREE);
AssertFatal(((prach_id >= 0) && (prach_id < NUMBER_OF_NR_PRACH_MAX)), "illegal or no prach_id found!!! prach_id %d\n", prach_id);
gNB->prach_vars.list[prach_id].frame=SFN;
gNB->prach_vars.list[prach_id].slot=Slot;
LOG_D(NR_PHY,"Copying prach pdu %d bytes to index %d\n",(int)sizeof(*prach_pdu),prach_id);
memcpy((void*)&gNB->prach_vars.list[prach_id].pdu,(void*)prach_pdu,sizeof(*prach_pdu));
gNB_PRACH_list_t *prach = &gNB->prach_vars.list[prach_id];
prach->frame = SFN;
prach->slot = Slot;
prach->beam_nb = 0;
if (gNB->common_vars.beam_id) {
int fapi_beam_idx = prach_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx;
// TODO no idea how to compute final prach symbol here so for now we go til the end of the slot
int temp_nb_symbols = NR_NUMBER_OF_SYMBOLS_PER_SLOT - prach_pdu->prach_start_symbol;
prach->beam_nb = beam_index_allocation(fapi_beam_idx,
&gNB->common_vars,
Slot,
NR_NUMBER_OF_SYMBOLS_PER_SLOT,
prach_pdu->prach_start_symbol,
temp_nb_symbols);
}
LOG_D(NR_PHY,"Copying prach pdu %d bytes to index %d\n", (int)sizeof(*prach_pdu), prach_id);
memcpy(&prach->pdu, prach_pdu, sizeof(*prach_pdu));
}
void init_prach_ru_list(RU_t *ru) {
AssertFatal(ru!=NULL,"ruis null\n");
for (int i=0; i<NUMBER_OF_NR_RU_PRACH_MAX; i++) {
ru->prach_list[i].frame = -1;
ru->prach_list[i].slot = -1;
}
pthread_mutex_init(&ru->prach_list_mutex,NULL);
void init_prach_ru_list(RU_t *ru)
{
AssertFatal(ru != NULL, "ru is null\n");
for (int i = 0; i < NUMBER_OF_NR_RU_PRACH_MAX; i++) {
ru->prach_list[i].frame = -1;
ru->prach_list[i].slot = -1;
}
pthread_mutex_init(&ru->prach_list_mutex, NULL);
}
int16_t find_nr_prach_ru(RU_t *ru,int frame,int slot, find_type_t type) {
AssertFatal(ru!=NULL,"ru is null\n");
int16_t find_nr_prach_ru(RU_t *ru,int frame,int slot, find_type_t type)
{
AssertFatal(ru != NULL, "ru is null\n");
pthread_mutex_lock(&ru->prach_list_mutex);
for (uint16_t i=0; i<NUMBER_OF_NR_RU_PRACH_MAX; i++) {
LOG_D(PHY,"searching for PRACH in %d.%d : prach_index %d=> %d.%d\n", frame,slot,i,
for (int i = 0; i < NUMBER_OF_NR_RU_PRACH_MAX; i++) {
LOG_D(PHY,"searching for PRACH in %d.%d : prach_index %d=> %d.%d\n",
frame,
slot,
i,
ru->prach_list[i].frame,ru->prach_list[i].slot);
if((type == SEARCH_EXIST_OR_FREE) &&
(ru->prach_list[i].frame == -1) &&
(ru->prach_list[i].slot == -1)) {
pthread_mutex_unlock(&ru->prach_list_mutex);
return i;
if((type == SEARCH_EXIST_OR_FREE) && (ru->prach_list[i].frame == -1) && (ru->prach_list[i].slot == -1)) {
pthread_mutex_unlock(&ru->prach_list_mutex);
return i;
}
else if ((type == SEARCH_EXIST) &&
(ru->prach_list[i].frame == frame) &&
(ru->prach_list[i].slot == slot)) {
else if ((type == SEARCH_EXIST) && (ru->prach_list[i].frame == frame) && (ru->prach_list[i].slot == slot)) {
pthread_mutex_unlock(&ru->prach_list_mutex);
return i;
}
@@ -119,55 +129,42 @@ int16_t find_nr_prach_ru(RU_t *ru,int frame,int slot, find_type_t type) {
return -1;
}
void nr_fill_prach_ru(RU_t *ru,
int SFN,
int Slot,
nfapi_nr_prach_pdu_t *prach_pdu) {
int prach_id = find_nr_prach_ru(ru,SFN,Slot,SEARCH_EXIST_OR_FREE);
AssertFatal( ((prach_id>=0) && (prach_id<NUMBER_OF_NR_PRACH_MAX)) || (prach_id < 0) ,
"illegal or no prach_id found!!! prach_id %d\n",prach_id);
void nr_fill_prach_ru(RU_t *ru, int SFN, int Slot, nfapi_nr_prach_pdu_t *prach_pdu)
{
int prach_id = find_nr_prach_ru(ru, SFN, Slot, SEARCH_EXIST_OR_FREE);
AssertFatal(((prach_id >= 0) && (prach_id < NUMBER_OF_NR_PRACH_MAX)) || (prach_id < 0),
"illegal or no prach_id found!!! prach_id %d\n",
prach_id);
pthread_mutex_lock(&ru->prach_list_mutex);
ru->prach_list[prach_id].frame = SFN;
ru->prach_list[prach_id].slot = Slot;
ru->prach_list[prach_id].fmt = prach_pdu->prach_format;
ru->prach_list[prach_id].numRA = prach_pdu->num_ra;
ru->prach_list[prach_id].prachStartSymbol = prach_pdu->prach_start_symbol;
ru->prach_list[prach_id].num_prach_ocas = prach_pdu->num_prach_ocas;
pthread_mutex_unlock(&ru->prach_list_mutex);
ru->prach_list[prach_id].frame = SFN;
ru->prach_list[prach_id].slot = Slot;
ru->prach_list[prach_id].fmt = prach_pdu->prach_format;
ru->prach_list[prach_id].numRA = prach_pdu->num_ra;
ru->prach_list[prach_id].prachStartSymbol = prach_pdu->prach_start_symbol;
ru->prach_list[prach_id].num_prach_ocas = prach_pdu->num_prach_ocas;
pthread_mutex_unlock(&ru->prach_list_mutex);
}
void free_nr_ru_prach_entry(RU_t *ru,
int prach_id) {
void free_nr_ru_prach_entry(RU_t *ru, int prach_id)
{
pthread_mutex_lock(&ru->prach_list_mutex);
ru->prach_list[prach_id].frame = -1;
ru->prach_list[prach_id].slot = -1;
ru->prach_list[prach_id].slot = -1;
pthread_mutex_unlock(&ru->prach_list_mutex);
}
void rx_nr_prach_ru(RU_t *ru,
int prachFormat,
int numRA,
int prachStartSymbol,
int prachOccasion,
int frame,
int slot) {
AssertFatal(ru!=NULL,"ru is null\n");
int16_t **rxsigF=NULL;
NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms;
int slot2=slot;
void rx_nr_prach_ru(RU_t *ru, int prachFormat, int numRA, int prachStartSymbol, int prachOccasion, int frame, int slot)
{
AssertFatal(ru != NULL,"ru is null\n");
int16_t **rxsigF = NULL;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
int slot2 = slot;
int16_t *prach[ru->nb_rx];
int prach_sequence_length = ru->config.prach_config.prach_sequence_length.value;
int msg1_frequencystart = ru->config.prach_config.num_prach_fd_occasions_list[numRA].k1.value;
int msg1_frequencystart = ru->config.prach_config.num_prach_fd_occasions_list[numRA].k1.value;
int sample_offset_slot;
if (prachStartSymbol == 0) {
@@ -184,16 +181,24 @@ void rx_nr_prach_ru(RU_t *ru,
sample_offset_slot = (fp->ofdm_symbol_size + fp->nb_prefix_samples) * prachStartSymbol;
}
LOG_D(PHY,"frame %d, slot %d: doing rx_nr_prach_ru for format %d, numRA %d, prachStartSymbol %d, prachOccasion %d\n",frame,slot,prachFormat,numRA,prachStartSymbol,prachOccasion);
LOG_D(PHY,
"frame %d, slot %d: doing rx_nr_prach_ru for format %d, numRA %d, prachStartSymbol %d, prachOccasion %d\n",
frame,
slot,
prachFormat,
numRA,
prachStartSymbol,
prachOccasion);
rxsigF = ru->prach_rxsigF[prachOccasion];
rxsigF = ru->prach_rxsigF[prachOccasion];
AssertFatal(ru->if_south == LOCAL_RF || ru->if_south == REMOTE_IF5,
"we shouldn't call this if if_south != LOCAL_RF or REMOTE_IF5\n");
for (int aa=0; aa<ru->nb_rx; aa++){
if (prach_sequence_length == 0) slot2=(slot/fp->slots_per_subframe)*fp->slots_per_subframe;
prach[aa] = (int16_t*)&ru->common.rxdata[aa][fp->get_samples_slot_timestamp(slot2,fp,0)+sample_offset_slot-ru->N_TA_offset];
if (prach_sequence_length == 0)
slot2 = (slot / fp->slots_per_subframe) * fp->slots_per_subframe;
prach[aa] = (int16_t*)&ru->common.rxdata[aa][fp->get_samples_slot_timestamp(slot2, fp, 0) + sample_offset_slot - ru->N_TA_offset];
}
int reps;
@@ -202,8 +207,13 @@ void rx_nr_prach_ru(RU_t *ru,
int mu = fp->numerology_index;
if (prach_sequence_length == 0) {
LOG_D(PHY,"PRACH (ru %d) in %d.%d, format %d, msg1_frequencyStart %d\n",
ru->idx,frame,slot2,prachFormat,msg1_frequencystart);
LOG_D(PHY,
"PRACH (ru %d) in %d.%d, format %d, msg1_frequencyStart %d\n",
ru->idx,
frame,
slot2,
prachFormat,
msg1_frequencystart);
switch (prachFormat) {
case 0:
reps = 1;
@@ -235,8 +245,14 @@ void rx_nr_prach_ru(RU_t *ru,
}
}
else {
LOG_D(PHY,"PRACH (ru %d) in %d.%d, format %s, msg1_frequencyStart %d,startSymbol %d\n",
ru->idx,frame,slot,prachfmt[prachFormat],msg1_frequencystart,prachStartSymbol);
LOG_D(PHY,
"PRACH (ru %d) in %d.%d, format %s, msg1_frequencyStart %d,startSymbol %d\n",
ru->idx,
frame,
slot,
prachfmt[prachFormat],
msg1_frequencystart,
prachStartSymbol);
switch (prachFormat) {
case 4: //A1
reps = 2;
@@ -293,7 +309,9 @@ void rx_nr_prach_ru(RU_t *ru,
dftlen = 2048 >> mu;
}
//actually what we should be checking here is how often the current prach crosses a 0.5ms boundary. I am not quite sure for which paramter set this would be the case, so I will ignore it for now and just check if the prach starts on a 0.5ms boundary
//actually what we should be checking here is how often the current prach crosses a 0.5ms boundary.
//I am not quite sure for which paramter set this would be the case,
//so I will ignore it for now and just check if the prach starts on a 0.5ms boundary
if(fp->numerology_index == 0) {
if (prachStartSymbol == 0 || prachStartSymbol == 7)
Ncp += 16;
openair1/PHY/NR_TRANSPORT/nr_transport_proto.h
+5 -1
View File
@@ -127,7 +127,8 @@ int nr_rx_pusch_tp(PHY_VARS_gNB *gNB,
uint8_t ulsch_id,
uint32_t frame,
uint8_t slot,
unsigned char harq_pid);
unsigned char harq_pid,
int beam_nb);
/*!
\brief This function implements the idft transform precoding in PUSCH
@@ -297,6 +298,7 @@ void nr_fill_srs(PHY_VARS_gNB *gNB,
nfapi_nr_srs_pdu_t *srs_pdu);
int nr_get_srs_signal(PHY_VARS_gNB *gNB,
c16_t **rxdataF,
frame_t frame,
slot_t slot,
nfapi_nr_srs_pdu_t *srs_pdu,
@@ -326,12 +328,14 @@ void nr_decode_pucch1(c16_t **rxdataF,
uint8_t nr_bit);
void nr_decode_pucch2(PHY_VARS_gNB *gNB,
c16_t **rxdataF,
int frame,
int slot,
nfapi_nr_uci_pucch_pdu_format_2_3_4_t* uci_pdu,
nfapi_nr_pucch_pdu_t* pucch_pdu);
void nr_decode_pucch0(PHY_VARS_gNB *gNB,
c16_t **rxdataF,
int frame,
int slot,
nfapi_nr_uci_pucch_pdu_format_0_1_t* uci_pdu,
openair1/PHY/NR_TRANSPORT/nr_ulsch.c
+11
View File
@@ -33,6 +33,7 @@
#include <stdint.h>
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
#include "PHY/NR_TRANSPORT/nr_ulsch.h"
#include "SCHED_NR/sched_nr.h"
static NR_gNB_ULSCH_t *find_nr_ulsch(PHY_VARS_gNB *gNB, uint16_t rnti, int pid)
{
@@ -71,6 +72,16 @@ void nr_fill_ulsch(PHY_VARS_gNB *gNB, int frame, int slot, nfapi_nr_pusch_pdu_t
ulsch->harq_pid = harq_pid;
ulsch->handled = 0;
ulsch->active = true;
ulsch->beam_nb = 0;
if (gNB->common_vars.beam_id) {
int fapi_beam_idx = ulsch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx;
ulsch->beam_nb = beam_index_allocation(fapi_beam_idx,
&gNB->common_vars,
slot,
NR_NUMBER_OF_SYMBOLS_PER_SLOT,
ulsch_pdu->start_symbol_index,
ulsch_pdu->nr_of_symbols);
}
ulsch->frame = frame;
ulsch->slot = slot;
openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
+9 -5
View File
@@ -1394,6 +1394,7 @@ typedef struct puschSymbolProc_s {
int16_t **llr_layers;
int16_t *scramblingSequence;
uint32_t nvar;
int beam_nb;
} puschSymbolProc_t;
static void nr_pusch_symbol_processing(void *arg)
@@ -1416,7 +1417,7 @@ static void nr_pusch_symbol_processing(void *arg)
frame_parms,
pusch_vars,
rel15_ul,
gNB->common_vars.rxdataF,
gNB->common_vars.rxdataF[rdata->beam_nb],
(c16_t**)gNB->pusch_vars[ulsch_id].ul_ch_estimates,
rdata->llr_layers,
soffset,
@@ -1471,7 +1472,8 @@ int nr_rx_pusch_tp(PHY_VARS_gNB *gNB,
uint8_t ulsch_id,
uint32_t frame,
uint8_t slot,
unsigned char harq_pid)
unsigned char harq_pid,
int beam_nb)
{
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_pusch_pdu_t *rel15_ul = &gNB->ulsch[ulsch_id].harq_process->ulsch_pdu;
@@ -1503,6 +1505,7 @@ int nr_rx_pusch_tp(PHY_VARS_gNB *gNB,
get_dmrs_port(nl, rel15_ul->dmrs_ports),
symbol,
ulsch_id,
beam_nb,
bwp_start_subcarrier,
rel15_ul,
&max_ch,
@@ -1535,10 +1538,10 @@ int nr_rx_pusch_tp(PHY_VARS_gNB *gNB,
for (int s = rel15_ul->start_symbol_index; s < (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols); s++) {
int offset0 = ((slot & 3) * frame_parms->symbols_per_slot + s) * frame_parms->ofdm_symbol_size;
int offset = offset0 + (frame_parms->first_carrier_offset + start_sc) % frame_parms->ofdm_symbol_size;
c16_t *ul_ch = &gNB->common_vars.rxdataF[aarx][offset];
c16_t *ul_ch = &gNB->common_vars.rxdataF[beam_nb][aarx][offset];
if (end_sc < start_sc) {
int64_t symb_energy_aux = signal_energy_nodc(ul_ch, middle_sc - start_sc) * (middle_sc - start_sc);
ul_ch = &gNB->common_vars.rxdataF[aarx][offset0];
ul_ch = &gNB->common_vars.rxdataF[beam_nb][aarx][offset0];
symb_energy_aux += (signal_energy_nodc(ul_ch, end_sc + 1) * (end_sc + 1));
symb_energy += symb_energy_aux / (rel15_ul->rb_size * NR_NB_SC_PER_RB);
} else {
@@ -1644,7 +1647,7 @@ int nr_rx_pusch_tp(PHY_VARS_gNB *gNB,
c16_t temp_rxFext[frame_parms->nb_antennas_rx][buffer_length] __attribute__((aligned(32)));
for (int aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++)
for (int nl = 0; nl < rel15_ul->nrOfLayers; nl++)
nr_ulsch_extract_rbs(gNB->common_vars.rxdataF[aarx],
nr_ulsch_extract_rbs(gNB->common_vars.rxdataF[beam_nb][aarx],
(c16_t *)pusch_vars->ul_ch_estimates[nl * frame_parms->nb_antennas_rx + aarx],
temp_rxFext[aarx],
(c16_t*)&ul_ch_estimates_ext[nl * frame_parms->nb_antennas_rx + aarx][meas_symbol * nb_re_pusch],
@@ -1723,6 +1726,7 @@ int nr_rx_pusch_tp(PHY_VARS_gNB *gNB,
rdata->llr_layers = pusch_vars->llr_layers;
rdata->scramblingSequence = scramblingSequence;
rdata->nvar = nvar;
rdata->beam_nb = beam_nb;
if (rel15_ul->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) {
nr_pusch_symbol_processing(rdata);
openair1/PHY/NR_TRANSPORT/pucch_rx.c
+17 -7
View File
@@ -42,7 +42,7 @@
#include "PHY/defs_gNB.h"
#include "PHY/sse_intrin.h"
#include "PHY/NR_UE_TRANSPORT/pucch_nr.h"
#include <openair1/PHY/CODING/nrSmallBlock/nr_small_block_defs.h>
#include "PHY/CODING/nrSmallBlock/nr_small_block_defs.h"
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/NR_REFSIG/nr_refsig.h"
@@ -50,6 +50,7 @@
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "nfapi/oai_integration/vendor_ext.h"
#include "nfapi/oai_integration/vendor_ext.h"
#include "SCHED_NR/sched_nr.h"
#include "T.h"
@@ -62,15 +63,25 @@ void nr_fill_pucch(PHY_VARS_gNB *gNB,
{
if (NFAPI_MODE == NFAPI_MODE_PNF)
gNB->pucch[0].active = 0; // check if ture in monolithic mode
gNB->pucch[0].active = false; // check if true in monolithic mode
bool found = false;
for (int i = 0; i < gNB->max_nb_pucch; i++) {
NR_gNB_PUCCH_t *pucch = &gNB->pucch[i];
if (pucch->active == 0) {
if (pucch->active == false) {
pucch->frame = frame;
pucch->slot = slot;
pucch->active = 1;
pucch->active = true;
pucch->beam_nb = 0;
if (gNB->common_vars.beam_id) {
int fapi_beam_idx = pucch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx;
pucch->beam_nb = beam_index_allocation(fapi_beam_idx,
&gNB->common_vars,
slot,
NR_NUMBER_OF_SYMBOLS_PER_SLOT,
pucch_pdu->start_symbol_index,
pucch_pdu->nr_of_symbols);
}
memcpy((void *)&pucch->pucch_pdu, (void *)pucch_pdu, sizeof(nfapi_nr_pucch_pdu_t));
LOG_D(PHY,
"Programming PUCCH[%d] for %d.%d, format %d, nb_harq %d, nb_sr %d, nb_csi %d\n",
@@ -148,12 +159,12 @@ static const int16_t idft12_im[12][12] = {
};
//************************************************************************//
void nr_decode_pucch0(PHY_VARS_gNB *gNB,
c16_t **rxdataF,
int frame,
int slot,
nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu,
nfapi_nr_pucch_pdu_t *pucch_pdu)
{
c16_t **rxdataF = gNB->common_vars.rxdataF;
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
int soffset = (slot & 3) * frame_parms->symbols_per_slot * frame_parms->ofdm_symbol_size;
@@ -1012,13 +1023,12 @@ void init_pucch2_luts() {
void nr_decode_pucch2(PHY_VARS_gNB *gNB,
c16_t **rxdataF,
int frame,
int slot,
nfapi_nr_uci_pucch_pdu_format_2_3_4_t* uci_pdu,
nfapi_nr_pucch_pdu_t* pucch_pdu)
{
c16_t **rxdataF = gNB->common_vars.rxdataF;
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
//pucch_GroupHopping_t pucch_GroupHopping = pucch_pdu->group_hop_flag + (pucch_pdu->sequence_hop_flag<<1);
openair1/PHY/NR_TRANSPORT/srs_rx.c
+14 -4
View File
@@ -38,7 +38,7 @@
#include "PHY/CODING/nrSmallBlock/nr_small_block_defs.h"
#include "PHY/NR_UE_TRANSPORT/srs_modulation_nr.h"
#include "common/utils/LOG/log.h"
#include "SCHED_NR/sched_nr.h"
#include "nfapi/oai_integration/vendor_ext.h"
#include "T.h"
@@ -50,11 +50,21 @@ void nr_fill_srs(PHY_VARS_gNB *gNB, frame_t frame, slot_t slot, nfapi_nr_srs_pdu
bool found = false;
for (int i = 0; i < gNB->max_nb_srs; i++) {
NR_gNB_SRS_t *srs = &gNB->srs[i];
if (srs->active == 0) {
if (srs->active == false) {
found = true;
srs->frame = frame;
srs->slot = slot;
srs->active = 1;
srs->active = true;
srs->beam_nb = 0;
if (gNB->common_vars.beam_id) {
int fapi_beam_idx = srs_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx;
srs->beam_nb = beam_index_allocation(fapi_beam_idx,
&gNB->common_vars,
slot,
NR_NUMBER_OF_SYMBOLS_PER_SLOT,
srs_pdu->time_start_position,
1 << srs_pdu->num_symbols);
}
memcpy((void *)&srs->srs_pdu, (void *)srs_pdu, sizeof(nfapi_nr_srs_pdu_t));
break;
}
@@ -63,13 +73,13 @@ void nr_fill_srs(PHY_VARS_gNB *gNB, frame_t frame, slot_t slot, nfapi_nr_srs_pdu
}
int nr_get_srs_signal(PHY_VARS_gNB *gNB,
c16_t **rxdataF,
frame_t frame,
slot_t slot,
nfapi_nr_srs_pdu_t *srs_pdu,
nr_srs_info_t *nr_srs_info,
int32_t srs_received_signal[][gNB->frame_parms.ofdm_symbol_size * (1 << srs_pdu->num_symbols)])
{
c16_t **rxdataF = gNB->common_vars.rxdataF;
const NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
const uint16_t n_symbols = (slot % RU_RX_SLOT_DEPTH) * frame_parms->symbols_per_slot; // number of symbols until this slot
openair1/PHY/defs_RU.h
+2 -2
View File
@@ -130,9 +130,9 @@ typedef struct {
/// - third index: frequency [0..]
int32_t **tdd_calib_coeffs;
/// \brief Anaglogue beam ID for each OFDM symbol (used when beamforming not done in RU)
/// - first index: antenna port
/// - first index: concurrent beam
/// - second index: beam_id [0.. symbols_per_frame[
uint8_t **beam_id;
int **beam_id;
} RU_COMMON;
openair1/PHY/defs_gNB.h
+18 -9
View File
@@ -123,8 +123,6 @@ typedef struct {
typedef struct {
/// Pointers to variables related to DLSCH harq process
NR_DL_gNB_HARQ_t harq_process;
/// beamforming weights for UE-spec transmission (antenna ports 5 or 7..14), for each codeword, maximum 4 layers?
int32_t ***ue_spec_bf_weights;
/// Active flag for baseband transmitter processing
uint8_t active;
/// Number of soft channel bits
@@ -139,6 +137,8 @@ typedef struct {
typedef struct {
int frame;
int slot;
// identifier for concurrent beams
int beam_nb;
nfapi_nr_prach_pdu_t pdu;
} gNB_PRACH_list_t;
@@ -223,6 +223,8 @@ typedef struct {
typedef struct {
uint32_t frame;
uint32_t slot;
// identifier for concurrent beams
int beam_nb;
uint32_t unav_res;
/// Pointers to 16 HARQ processes for the ULSCH
NR_UL_gNB_HARQ_t *harq_process;
@@ -243,7 +245,9 @@ typedef struct {
} NR_gNB_ULSCH_t;
typedef struct {
uint8_t active;
bool active;
// identifier for concurrent beams
int beam_nb;
/// Frame where current PUCCH pdu was sent
uint32_t frame;
/// Slot where current PUCCH pdu was sent
@@ -253,7 +257,9 @@ typedef struct {
} NR_gNB_PUCCH_t;
typedef struct {
uint8_t active;
bool active;
// identifier for concurrent beams
int beam_nb;
/// Frame where current SRS pdu was received
uint32_t frame;
/// Slot where current SRS pdu was received
@@ -266,17 +272,20 @@ typedef struct {
/// \brief Pointers (dynamic) to the received data in the frequency domain.
/// - first index: rx antenna [0..nb_antennas_rx[
/// - second index: ? [0..2*ofdm_symbol_size*frame_parms->symbols_per_tti[
c16_t **rxdataF;
c16_t ***rxdataF;
/// \brief holds the transmit data in the frequency domain.
/// For IFFT_FPGA this points to the same memory as PHY_vars->rx_vars[a].RX_DMA_BUFFER. //?
/// - first index: eNB id [0..2] (hard coded)
/// - first index: beam (for concurrent beams)
/// - second index: tx antenna [0..14[ where 14 is the total supported antenna ports.
/// - third index: sample [0..samples_per_frame_woCP]
c16_t **txdataF;
c16_t ***txdataF;
/// \brief Anaglogue beam ID for each OFDM symbol (used when beamforming not done in RU)
/// - first index: antenna port
/// - first index: beam index (for concurrent beams)
/// - second index: beam_id [0.. symbols_per_frame[
uint8_t **beam_id;
int **beam_id;
int num_beams;
int num_beams_period;
bool analog_bf;
int32_t *debugBuff;
int32_t debugBuff_sample_offset;
} NR_gNB_COMMON;
openair1/SCHED_NR/fapi_nr_l1.c
+5 -3
View File
@@ -157,7 +157,9 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
uint8_t number_ul_tti_pdu = (UL_tti_req==NULL) ? 0 : UL_tti_req->n_pdus;
uint8_t number_tx_data_pdu = (TX_req == NULL) ? 0 : TX_req->Number_of_PDUs;
if (NFAPI_MODE == NFAPI_MONOLITHIC){
clear_slot_beamid(gNB, slot); // reset beam_id information for the slot to be processed
if (NFAPI_MODE == NFAPI_MONOLITHIC) {
if (slot_type == NR_DOWNLINK_SLOT || slot_type == NR_MIXED_SLOT) {
processingData_L1tx_t *msgTx = gNB->msgDataTx;
msgTx->num_pdsch_slot = 0;
@@ -227,8 +229,8 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PRACH_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
nfapi_nr_prach_pdu_t *prach_pdu = &UL_tti_req->pdus_list[i].prach_pdu;
nr_fill_prach(gNB, UL_tti_req->SFN, UL_tti_req->Slot, prach_pdu);
if (gNB->RU_list[0]->if_south == LOCAL_RF ||
gNB->RU_list[0]->if_south == REMOTE_IF5) nr_fill_prach_ru(gNB->RU_list[0], UL_tti_req->SFN, UL_tti_req->Slot, prach_pdu);
if (gNB->RU_list[0]->if_south == LOCAL_RF || gNB->RU_list[0]->if_south == REMOTE_IF5)
nr_fill_prach_ru(gNB->RU_list[0], UL_tti_req->SFN, UL_tti_req->Slot, prach_pdu);
break;
case NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE:
LOG_D(NR_PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
openair1/SCHED_NR/nr_ru_procedures.c
+119 -111
View File
@@ -52,28 +52,37 @@
extern int oai_exit;
// OFDM modulation core routine, generates a first_symbol to first_symbol+num_symbols on a particular slot and TX antenna port
void nr_feptx0(RU_t *ru,int tti_tx,int first_symbol, int num_symbols, int aa) {
void nr_feptx0(RU_t *ru,int tti_tx,int first_symbol, int num_symbols, int aa)
{
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
unsigned int slot_offset,slot_offsetF;
int slot = tti_tx;
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+(first_symbol!=0?1:0) , 1 );
if (aa==0 && first_symbol == 0) start_meas(&ru->ofdm_mod_stats);
slot_offset = fp->get_samples_slot_timestamp(slot,fp,0);
slot_offsetF = first_symbol*fp->ofdm_symbol_size;
if (aa == 0 && first_symbol == 0)
start_meas(&ru->ofdm_mod_stats);
slot_offset = fp->get_samples_slot_timestamp(slot, fp, 0);
slot_offsetF = first_symbol * fp->ofdm_symbol_size;
int abs_first_symbol = slot*fp->symbols_per_slot;
int abs_first_symbol = slot * fp->symbols_per_slot;
for (uint16_t idx_sym=abs_first_symbol; idx_sym<abs_first_symbol+first_symbol; idx_sym++)
slot_offset += (idx_sym%(0x7<<fp->numerology_index)) ? fp->nb_prefix_samples : fp->nb_prefix_samples0;
for (int idx_sym = abs_first_symbol; idx_sym < abs_first_symbol + first_symbol; idx_sym++)
slot_offset += (idx_sym % (0x7 << fp->numerology_index)) ? fp->nb_prefix_samples : fp->nb_prefix_samples0;
slot_offset += fp->ofdm_symbol_size*first_symbol;
slot_offset += fp->ofdm_symbol_size * first_symbol;
LOG_D(PHY,"SFN/SF:RU:TX:%d/%d aa %d Generating slot %d (first_symbol %d num_symbols %d) slot_offset %d, slot_offsetF %d\n",ru->proc.frame_tx, ru->proc.tti_tx,aa,slot,first_symbol,num_symbols,slot_offset,slot_offsetF);
LOG_D(PHY,
"SFN/SF:RU:TX:%d/%d aa %d Generating slot %d (first_symbol %d num_symbols %d) slot_offset %d, slot_offsetF %d\n",
ru->proc.frame_tx,
ru->proc.tti_tx,
aa,
slot,
first_symbol,
num_symbols,
slot_offset,
slot_offsetF);
if (fp->Ncp == 1) {
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
@@ -110,8 +119,8 @@ void nr_feptx0(RU_t *ru,int tti_tx,int first_symbol, int num_symbols, int aa) {
}
} // numerology_index!=0
else { //numerology_index == 0
for (uint16_t idx_sym=abs_first_symbol; idx_sym<abs_first_symbol+num_symbols; idx_sym++) {
if (idx_sym%0x7) {
for (int idx_sym = abs_first_symbol; idx_sym < abs_first_symbol+num_symbols; idx_sym++) {
if (idx_sym % 0x7) {
PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
(int*)&ru->common.txdata[aa][slot_offset],
fp->ofdm_symbol_size,
@@ -135,7 +144,8 @@ void nr_feptx0(RU_t *ru,int tti_tx,int first_symbol, int num_symbols, int aa) {
} // numerology 0
}
if (aa==0 && first_symbol==0) stop_meas(&ru->ofdm_mod_stats);
if (aa == 0 && first_symbol == 0)
stop_meas(&ru->ofdm_mod_stats);
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+(first_symbol!=0?1:0), 0);
}
@@ -170,167 +180,165 @@ void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx) {
}
void nr_feptx_prec(RU_t *ru,int frame_tx,int tti_tx) {
int l,aa;
void nr_feptx_prec(RU_t *ru, int frame_tx, int tti_tx)
{
PHY_VARS_gNB **gNB_list = ru->gNB_list,*gNB;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
nfapi_nr_config_request_scf_t *cfg = &ru->gNB_list[0]->gNB_config;
int32_t ***bw;
int i=0;
int slot_tx = tti_tx;
int txdataF_offset = (tti_tx*fp->samples_per_slot_wCP);
start_meas(&ru->precoding_stats);
AssertFatal(ru->nb_log_antennas > 0,"ru->nb_log_antennas is 0!\n");
if (ru->num_gNB == 1){
AssertFatal(ru->nb_log_antennas > 0, "ru->nb_log_antennas is 0!\n");
if (nr_slot_select(cfg,frame_tx,slot_tx) == NR_UPLINK_SLOT)
return;
if (ru->num_gNB == 1) {
gNB = gNB_list[0];
if (nr_slot_select(cfg,frame_tx,slot_tx) == NR_UPLINK_SLOT) return;
if (ru->config.dbt_config.num_dig_beams != 0) {
for(int i = 0; i < gNB->common_vars.num_beams_period; ++i) {
memcpy((void*) &ru->common.beam_id[i][slot_tx * fp->symbols_per_slot],
(void*) &gNB->common_vars.beam_id[i][slot_tx * fp->symbols_per_slot],
(fp->symbols_per_slot) * sizeof(int));
}
}
if (!ru->do_precoding || (ru->nb_tx == 1 && ru->nb_log_antennas == 1)) {
for (i = 0; i < ru->nb_log_antennas; ++i) {
//ru->common.txdataF_BF[i] = (int32_t *)&gNB->common_vars.txdataF[i][txdataF_offset];
memcpy(ru->common.txdataF_BF[i],
&gNB->common_vars.txdataF[i][txdataF_offset],
fp->samples_per_slot_wCP*sizeof(int32_t));
if (ru->config.dbt_config.num_dig_beams == 0 || gNB->common_vars.analog_bf) {
for (int i = 0; i < ru->nb_log_antennas; ++i) {
// TODO hardcoded beam to 0, still need to understand how to handle this properly
memcpy(ru->common.txdataF_BF[i], &gNB->common_vars.txdataF[0][i][txdataF_offset], fp->samples_per_slot_wCP * sizeof(int32_t));
}
}
else {
for(i=0; i<ru->nb_log_antennas; ++i) {
memcpy((void*)ru->common.txdataF[i],
(void*)&gNB->common_vars.txdataF[i][txdataF_offset],
fp->samples_per_slot_wCP*sizeof(int32_t));
memcpy((void*)&ru->common.beam_id[i][slot_tx*fp->symbols_per_slot],
(void*)&gNB->common_vars.beam_id[i][slot_tx*fp->symbols_per_slot],
fp->symbols_per_slot*sizeof(uint8_t));
for(int i = 0; i < ru->nb_log_antennas; ++i) {
// TODO hardcoded beam to 0, still need to understand how to handle this properly
memcpy(ru->common.txdataF[i], &gNB->common_vars.txdataF[0][i][txdataF_offset], fp->samples_per_slot_wCP * sizeof(int32_t));
}
bw = ru->beam_weights[0];
for (l=0;l<fp->symbols_per_slot;l++) {
for (aa=0;aa<ru->nb_tx;aa++) {
for (int l = 0; l < fp->symbols_per_slot; l++) {
for (int aa = 0; aa < ru->nb_tx; aa++) {
AssertFatal(false, "This needs to be fixed by using appropriate beams from config\n");
nr_beam_precoding((c16_t **)ru->common.txdataF,
(c16_t **)ru->common.txdataF_BF,
fp,
bw,
ru->beam_weights[0],
tti_tx,
l,
aa,
ru->nb_log_antennas,
0);
}// for (aa=0;aa<ru->nb_tx;aa++)
}// for (l=0;l<fp->symbols_per_slot;l++)
}// ru->do_precoding
}// if (ru->num_gNB == 1)
}
}
}
}
stop_meas(&ru->precoding_stats);
}
// core routine for FEP TX, called from threads in RU TX thread-pool
void nr_feptx(void *arg) {
void nr_feptx(void *arg)
{
feptx_cmd_t *feptx = (feptx_cmd_t *)arg;
RU_t *ru = feptx->ru;
int slot = feptx->slot;
int aa = feptx->aid;
int startSymbol = feptx->startSymbol;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
int numSymbols = feptx->numSymbols;
int numSamples = feptx->numSymbols*fp->ofdm_symbol_size;
int txdataF_offset = (slot*fp->samples_per_slot_wCP) + startSymbol*fp->ofdm_symbol_size;
int txdataF_BF_offset = startSymbol*fp->ofdm_symbol_size;
RU_t *ru = feptx->ru;
int slot = feptx->slot;
int aa = feptx->aid;
int startSymbol = feptx->startSymbol;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
int numSymbols = feptx->numSymbols;
int numSamples = feptx->numSymbols * fp->ofdm_symbol_size;
int txdataF_offset = (slot * fp->samples_per_slot_wCP) + startSymbol * fp->ofdm_symbol_size;
int txdataF_BF_offset = startSymbol * fp->ofdm_symbol_size;
////////////precoding////////////
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+feptx->aid , 1);
if (aa==0) start_meas(&ru->precoding_stats);
if (ru->do_precoding == 1) {
for(int i=0; i<ru->nb_log_antennas; ++i) {
memcpy((void*) &ru->common.beam_id[i][slot*fp->symbols_per_slot],
(void*) &ru->gNB_list[0]->common_vars.beam_id[i][slot*fp->symbols_per_slot],
(fp->symbols_per_slot)*sizeof(uint8_t));
if (aa == 0)
start_meas(&ru->precoding_stats);
if (ru->config.dbt_config.num_dig_beams != 0) {
for(int i = 0; i < ru->gNB_list[0]->common_vars.num_beams_period; i++) {
memcpy(&ru->common.beam_id[i][slot * fp->symbols_per_slot],
&ru->gNB_list[0]->common_vars.beam_id[i][slot * fp->symbols_per_slot],
(fp->symbols_per_slot) * sizeof(int));
}
}
if (ru->nb_tx == 1 && ru->nb_log_antennas == 1) {
memcpy((void*)&ru->common.txdataF_BF[0][txdataF_BF_offset],
(void*)&ru->gNB_list[0]->common_vars.txdataF[0][txdataF_offset],
numSamples*sizeof(int32_t));
}
else if (ru->do_precoding == 0) {
int gNB_tx = ru->gNB_list[0]->frame_parms.nb_antennas_tx;
// If there is no digital beamforming we just need to copy the data to RU
if (ru->config.dbt_config.num_dig_beams == 0 || ru->gNB_list[0]->common_vars.analog_bf)
memcpy((void*)&ru->common.txdataF_BF[aa][txdataF_BF_offset],
(void*)&ru->gNB_list[0]->common_vars.txdataF[aa%gNB_tx][txdataF_offset],
numSamples*sizeof(int32_t));
}
(void*)&ru->gNB_list[0]->common_vars.txdataF[0][aa][txdataF_offset], // TODO hardcoded beam to 0, still need to understand how to handle this properly
numSamples * sizeof(int32_t));
else {
AssertFatal(1==0,"This needs to be fixed, do not use beamforming.\n");
int32_t ***bw = ru->beam_weights[0];
for(int i=0; i<fp->symbols_per_slot; ++i){
AssertFatal(false, "This needs to be fixed by using appropriate beams from config\n");
for(int i = 0; i < fp->symbols_per_slot; ++i) {
nr_beam_precoding((c16_t **)ru->gNB_list[0]->common_vars.txdataF,
(c16_t **)ru->common.txdataF_BF,
fp,
bw,
ru->beam_weights[0],
slot,
i,
aa,
ru->nb_log_antennas,
txdataF_offset);//here
txdataF_offset);
}
}
if (aa==0) stop_meas(&ru->precoding_stats);
if (aa==0)
stop_meas(&ru->precoding_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+feptx->aid , 0);
////////////FEPTX////////////
nr_feptx0(ru,slot,startSymbol,numSymbols,aa);
nr_feptx0(ru, slot, startSymbol, numSymbols, aa);
}
// RU FEP TX using thread-pool
void nr_feptx_tp(RU_t *ru, int frame_tx, int slot) {
void nr_feptx_tp(RU_t *ru, int frame_tx, int slot)
{
nfapi_nr_config_request_scf_t *cfg = &ru->gNB_list[0]->gNB_config;
int nbfeptx=0;
if (nr_slot_select(cfg,frame_tx,slot) == NR_UPLINK_SLOT) return;
// for (int aa=0; aa<ru->nb_tx; aa++) memset(ru->common.txdataF[aa],0,ru->nr_frame_parms->samples_per_slot_wCP*sizeof(int32_t));
if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM, 1 );
int nbfeptx = 0;
if (nr_slot_select(cfg, frame_tx, slot) == NR_UPLINK_SLOT)
return;
if (ru->idx == 0)
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM, 1);
start_meas(&ru->ofdm_total_stats);
for (int aid=0;aid<ru->nb_tx;aid++) {
notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(feptx_cmd_t), 2000 + aid,ru->respfeptx,nr_feptx);
feptx_cmd_t *feptx_cmd=(feptx_cmd_t*)NotifiedFifoData(req);
feptx_cmd->aid = aid;
feptx_cmd->ru = ru;
feptx_cmd->slot = slot;
feptx_cmd->startSymbol = 0;
feptx_cmd->numSymbols = (ru->half_slot_parallelization>0)?ru->nr_frame_parms->symbols_per_slot>>1:ru->nr_frame_parms->symbols_per_slot;
pushTpool(ru->threadPool,req);
nbfeptx++;
if (ru->half_slot_parallelization>0) {
notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(feptx_cmd_t), 2000 + aid + ru->nb_tx,ru->respfeptx,nr_feptx);
feptx_cmd_t *feptx_cmd=(feptx_cmd_t*)NotifiedFifoData(req);
feptx_cmd->aid = aid;
feptx_cmd->ru = ru;
feptx_cmd->slot = slot;
feptx_cmd->startSymbol = ru->nr_frame_parms->symbols_per_slot>>1;
feptx_cmd->numSymbols = ru->nr_frame_parms->symbols_per_slot>>1;
pushTpool(ru->threadPool,req);
nbfeptx++;
}
for (int aid = 0; aid < ru->nb_tx; aid++) {
notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(feptx_cmd_t), 2000 + aid, ru->respfeptx, nr_feptx);
feptx_cmd_t *feptx_cmd = (feptx_cmd_t*)NotifiedFifoData(req);
feptx_cmd->aid = aid;
feptx_cmd->ru = ru;
feptx_cmd->slot = slot;
feptx_cmd->startSymbol = 0;
feptx_cmd->numSymbols = (ru->half_slot_parallelization > 0) ?
ru->nr_frame_parms->symbols_per_slot >> 1 :
ru->nr_frame_parms->symbols_per_slot;
pushTpool(ru->threadPool, req);
nbfeptx++;
if (ru->half_slot_parallelization > 0) {
notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(feptx_cmd_t), 2000 + aid + ru->nb_tx, ru->respfeptx, nr_feptx);
feptx_cmd_t *feptx_cmd = (feptx_cmd_t*)NotifiedFifoData(req);
feptx_cmd->aid = aid;
feptx_cmd->ru = ru;
feptx_cmd->slot = slot;
feptx_cmd->startSymbol = ru->nr_frame_parms->symbols_per_slot >> 1;
feptx_cmd->numSymbols = ru->nr_frame_parms->symbols_per_slot >> 1;
pushTpool(ru->threadPool, req);
nbfeptx++;
}
}
while (nbfeptx>0) {
while (nbfeptx > 0) {
notifiedFIFO_elt_t *req=pullTpool(ru->respfeptx, ru->threadPool);
delNotifiedFIFO_elt(req);
nbfeptx--;
}
stop_meas(&ru->ofdm_total_stats);
if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM, 0 );
if (ru->idx == 0)
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM, 0);
}
// core RX FEP routine, called by threads in RU thread-pool
void nr_fep(void* arg)
{
feprx_cmd_t *feprx_cmd = (feprx_cmd_t *)arg;
RU_t *ru = feprx_cmd->ru;
int aid = feprx_cmd->aid;
int tti_rx = feprx_cmd->slot;
@@ -338,7 +346,7 @@ void nr_fep(void* arg)
int endSymbol = feprx_cmd->endSymbol;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
LOG_D(PHY,"In nr_fep for aid %d, slot = %d, startSymbol %d, endSymbol %d\n", aid, tti_rx,startSymbol,endSymbol);
LOG_D(PHY,"aid %d, frame %d slot %d, startSymbol %d, endSymbol %d\n", aid, ru->proc.frame_rx, tti_rx, startSymbol, endSymbol);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX+aid, 1);
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+116 -99
View File
@@ -43,23 +43,42 @@
//#define DEBUG_RXDATA
//#define SRS_IND_DEBUG
extern uint8_t nfapi_mode;
int beam_index_allocation(int fapi_beam_index,
NR_gNB_COMMON *common_vars,
int slot,
int symbols_per_slot,
int start_symbol,
int nb_symbols)
{
if (!common_vars->beam_id)
return 0;
void nr_common_signal_procedures(PHY_VARS_gNB *gNB, int frame,int slot, nfapi_nr_dl_tti_ssb_pdu ssb_pdu)
int idx = -1;
for (int j = 0; j < common_vars->num_beams_period; j++) {
for (int i = start_symbol; i < start_symbol + nb_symbols; i++) {
int current_beam = common_vars->beam_id[j][slot * symbols_per_slot + i];
if (current_beam == -1 || current_beam == fapi_beam_index)
idx = j;
else {
idx = -1;
break;
}
}
if (idx != -1)
break;
}
AssertFatal(idx >= 0, "Couldn't allocate beam ID %d\n", fapi_beam_index);
for (int j = start_symbol; j < start_symbol + nb_symbols; j++)
common_vars->beam_id[idx][slot * symbols_per_slot + j] = fapi_beam_index;
LOG_D(PHY, "Allocating beam %d in slot %d\n", idx, slot);
return idx;
}
void nr_common_signal_procedures(PHY_VARS_gNB *gNB, int frame, int slot, nfapi_nr_dl_tti_ssb_pdu ssb_pdu)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
c16_t **txdataF = gNB->common_vars.txdataF;
uint8_t n_hf;
int txdataF_offset = slot*fp->samples_per_slot_wCP;
uint16_t slots_per_hf = (fp->slots_per_frame) >> 1;
if (slot<slots_per_hf)
n_hf=0;
else
n_hf=1;
uint8_t ssb_index = ssb_pdu.ssb_pdu_rel15.SsbBlockIndex;
nfapi_nr_dl_tti_ssb_pdu_rel15_t *pdu = &ssb_pdu.ssb_pdu_rel15;
uint8_t ssb_index = pdu->SsbBlockIndex;
LOG_D(PHY,"common_signal_procedures: frame %d, slot %d ssb index %d\n", frame, slot, ssb_index);
int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp, ssb_index); // computing the starting symbol for current ssb
@@ -70,11 +89,10 @@ void nr_common_signal_procedures(PHY_VARS_gNB *gNB, int frame,int slot, nfapi_nr
// for FR1 offsetToPointA and k_SSB are expressed in terms of 15 kHz SCS
// for FR2 offsetToPointA is expressed in terms of 60 kHz SCS and k_SSB expressed in terms of the subcarrier spacing provided
// by the higher-layer parameter subCarrierSpacingCommon
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
const int scs = cfg->ssb_config.scs_common.value;
const int prb_offset = (fp->freq_range == FR1) ? ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA >> scs
: ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA >> (scs - 2);
const int sc_offset =
(fp->freq_range == FR1) ? ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset >> scs : ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset;
const int prb_offset = (fp->freq_range == FR1) ? pdu->ssbOffsetPointA >> scs : pdu->ssbOffsetPointA >> (scs - 2);
const int sc_offset = (fp->freq_range == FR1) ? pdu->SsbSubcarrierOffset >> scs : pdu->SsbSubcarrierOffset;
fp->ssb_start_subcarrier = (12 * prb_offset + sc_offset);
if (fp->print_ue_help_cmdline_log && get_softmodem_params()->sa) {
@@ -99,20 +117,34 @@ void nr_common_signal_procedures(PHY_VARS_gNB *gNB, int frame,int slot, nfapi_nr
}
LOG_D(PHY,
"ssbOffsetPointA %d SSB SsbSubcarrierOffset %d prb_offset %d sc_offset %d scs %d ssb_start_subcarrier %d\n",
ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA,
ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset,
pdu->ssbOffsetPointA,
pdu->SsbSubcarrierOffset,
prb_offset,
sc_offset,
scs,
fp->ssb_start_subcarrier);
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(&txdataF[0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(&txdataF[0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, cfg, fp);
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n", frame, slot, ssb_start_symbol);
nfapi_nr_tx_precoding_and_beamforming_t *pb = &pdu->precoding_and_beamforming;
c16_t ***txdataF = gNB->common_vars.txdataF;
int txdataF_offset = slot * fp->samples_per_slot_wCP;
// beam number in a scenario with multiple concurrent beams
int beam_nb = beam_index_allocation(pb->prgs_list[0].dig_bf_interface_list[0].beam_idx,
&gNB->common_vars,
slot,
fp->symbols_per_slot,
ssb_start_symbol,
4); // 4 ssb symbols
nr_generate_pss(&txdataF[beam_nb][0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(&txdataF[beam_nb][0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, cfg, fp);
uint16_t slots_per_hf = (fp->slots_per_frame) >> 1;
int n_hf = slot < slots_per_hf ? 0 : 1;
int hf = fp->Lmax == 4 ? n_hf : 0;
nr_generate_pbch_dmrs(nr_gold_pbch(fp->Lmax, gNB->gNB_config.cell_config.phy_cell_id.value, hf, ssb_index & 7),
&txdataF[0][txdataF_offset],
&txdataF[beam_nb][0][txdataF_offset],
gNB->TX_AMP,
ssb_start_symbol,
cfg,
@@ -121,23 +153,16 @@ void nr_common_signal_procedures(PHY_VARS_gNB *gNB, int frame,int slot, nfapi_nr
#if T_TRACER
if (T_ACTIVE(T_GNB_PHY_MIB)) {
unsigned char bch[3];
bch[0] = ssb_pdu.ssb_pdu_rel15.bchPayload & 0xff;
bch[1] = (ssb_pdu.ssb_pdu_rel15.bchPayload >> 8) & 0xff;
bch[2] = (ssb_pdu.ssb_pdu_rel15.bchPayload >> 16) & 0xff;
bch[0] = pdu->bchPayload & 0xff;
bch[1] = (pdu->bchPayload >> 8) & 0xff;
bch[2] = (pdu->bchPayload >> 16) & 0xff;
T(T_GNB_PHY_MIB, T_INT(0) /* module ID */, T_INT(frame), T_INT(slot), T_BUFFER(bch, 3));
}
#endif
// Beam_id is currently used only for FR2
if (fp->freq_range == FR2){
LOG_D(PHY,"slot %d, ssb_index %d, beam %d\n",slot,ssb_index,cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value);
for (int j=0;j<fp->symbols_per_slot;j++)
gNB->common_vars.beam_id[0][slot*fp->symbols_per_slot+j] = cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value;
}
nr_generate_pbch(gNB,
&ssb_pdu,
&txdataF[0][txdataF_offset],
&txdataF[beam_nb][0][txdataF_offset],
ssb_start_symbol,
n_hf,
frame,
@@ -145,29 +170,39 @@ void nr_common_signal_procedures(PHY_VARS_gNB *gNB, int frame,int slot, nfapi_nr
fp);
}
// clearing beam information to be provided to RU for all slots (DL and UL)
void clear_slot_beamid(PHY_VARS_gNB *gNB, int slot)
{
LOG_D(PHY, "Clearing beam_id structure for slot %d\n", slot);
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
for (int i = 0; i < gNB->common_vars.num_beams_period; i++) {
if (gNB->common_vars.beam_id)
memset(&gNB->common_vars.beam_id[i][slot * fp->symbols_per_slot], -1, fp->symbols_per_slot * sizeof(int));
}
}
void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
int frame,
int slot,
int do_meas) {
int aa;
int do_meas)
{
PHY_VARS_gNB *gNB = msgTx->gNB;
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int slot_prs = 0;
int txdataF_offset = slot*fp->samples_per_slot_wCP;
int txdataF_offset = slot * fp->samples_per_slot_wCP;
prs_config_t *prs_config = NULL;
if ((cfg->cell_config.frame_duplex_type.value == TDD) &&
(nr_slot_select(cfg,frame,slot) == NR_UPLINK_SLOT)) return;
if ((cfg->cell_config.frame_duplex_type.value == TDD) && (nr_slot_select(cfg,frame,slot) == NR_UPLINK_SLOT))
return;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_TX + gNB->CC_id, 1);
// clear the transmit data array and beam index for the current slot
for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) {
memset(&gNB->common_vars.txdataF[aa][txdataF_offset],0,fp->samples_per_slot_wCP*sizeof(int32_t));
memset(&gNB->common_vars.beam_id[aa][slot*fp->symbols_per_slot],255,fp->symbols_per_slot*sizeof(uint8_t));
for (int i = 0; i < gNB->common_vars.num_beams_period; i++) {
for (int aa = 0; aa < cfg->carrier_config.num_tx_ant.value; aa++) {
memset(&gNB->common_vars.txdataF[i][aa][txdataF_offset], 0, fp->samples_per_slot_wCP * sizeof(int32_t));
}
}
// Check for PRS slot - section 7.4.1.7.4 in 3GPP rel16 38.211
@@ -180,19 +215,19 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
{
slot_prs = (slot - i*prs_config->PRSResourceTimeGap + fp->slots_per_frame)%fp->slots_per_frame;
LOG_D(PHY,"gNB_TX: frame %d, slot %d, slot_prs %d, PRS Resource ID %d\n",frame, slot, slot_prs, rsc_id);
nr_generate_prs(slot_prs, &gNB->common_vars.txdataF[0][txdataF_offset], AMP, prs_config, cfg, fp);
nr_generate_prs(slot_prs, &gNB->common_vars.txdataF[0][0][txdataF_offset], AMP, prs_config, cfg, fp);
}
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_COMMON_TX,1);
for (int i=0; i<fp->Lmax; i++) {
for (int i = 0; i < fp->Lmax; i++) {
if (msgTx->ssb[i].active) {
nr_common_signal_procedures(gNB,frame,slot,msgTx->ssb[i].ssb_pdu);
nr_common_signal_procedures(gNB, frame, slot, msgTx->ssb[i].ssb_pdu);
msgTx->ssb[i].active = false;
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_COMMON_TX,0);
int num_pdcch_pdus = msgTx->num_ul_pdcch + msgTx->num_dl_pdcch;
@@ -203,7 +238,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,1);
nr_generate_dci_top(msgTx, slot, (int32_t *)&gNB->common_vars.txdataF[0][txdataF_offset], gNB->TX_AMP, fp);
nr_generate_dci_top(msgTx, slot, txdataF_offset);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,0);
}
@@ -218,6 +253,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
for (int i = 0; i < NR_SYMBOLS_PER_SLOT; i++){
NR_gNB_CSIRS_t *csirs = &msgTx->csirs_pdu[i];
if (csirs->active == 1) {
AssertFatal(gNB->common_vars.beam_id == NULL, "Cannot handle CSI in the framework of beamforming yet\n");
LOG_D(PHY, "CSI-RS generation started in frame %d.%d\n",frame,slot);
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t *csi_params = &csirs->csirs_pdu.csi_rs_pdu_rel15;
if (csi_params->csi_type == 2) { // ZP-CSI
@@ -229,7 +265,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
csi_params->symb_l0,
csi_params->symb_l1);
nr_generate_csi_rs(&gNB->frame_parms,
(int32_t **)gNB->common_vars.txdataF,
(int32_t **)gNB->common_vars.txdataF[0],
gNB->TX_AMP,
csi_params,
slot,
@@ -238,22 +274,21 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
}
}
// if ((frame&127) == 0) dump_pdsch_stats(gNB);
//apply the OFDM symbol rotation here
if (gNB->phase_comp) {
for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) {
apply_nr_rotation_TX(fp,
&gNB->common_vars.txdataF[aa][txdataF_offset],
fp->symbol_rotation[0],
slot,
fp->N_RB_DL,
0,
fp->Ncp == EXTENDED ? 12 : 14);
T(T_GNB_PHY_DL_OUTPUT_SIGNAL, T_INT(0),
T_INT(frame), T_INT(slot),
T_INT(aa), T_BUFFER(&gNB->common_vars.txdataF[aa][txdataF_offset], fp->samples_per_slot_wCP*sizeof(int32_t)));
for(int i = 0; i < gNB->common_vars.num_beams_period; ++i) {
for (int aa = 0; aa < cfg->carrier_config.num_tx_ant.value; aa++) {
apply_nr_rotation_TX(fp,
&gNB->common_vars.txdataF[i][aa][txdataF_offset],
fp->symbol_rotation[0],
slot,
fp->N_RB_DL,
0,
fp->Ncp == EXTENDED ? 12 : 14);
T(T_GNB_PHY_DL_OUTPUT_SIGNAL, T_INT(0),
T_INT(frame), T_INT(slot),
T_INT(aa), T_BUFFER(&gNB->common_vars.txdataF[aa][txdataF_offset], fp->samples_per_slot_wCP*sizeof(int32_t)));
}
}
}
@@ -339,7 +374,7 @@ static void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req)
if (ulsch_harq->ulsch_pdu.mcs_index == 0 && dumpsig==1) {
int off = ((ulsch_harq->ulsch_pdu.rb_size&1) == 1)? 4:0;
LOG_M("rxsigF0.m","rxsF0",&gNB->common_vars.rxdataF[0][(ulsch_harq->slot%RU_RX_SLOT_DEPTH)*gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot],gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot,1,1);
LOG_M("rxsigF0.m","rxsF0",&gNB->common_vars.rxdataF[0][0][(ulsch_harq->slot%RU_RX_SLOT_DEPTH)*gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot],gNB->frame_parms.ofdm_symbol_size*gNB->frame_parms.symbols_per_slot,1,1);
LOG_M("rxsigF0_ext.m","rxsF0_ext",
&gNB->pusch_vars[0].rxdataF_ext[0][ulsch_harq->ulsch_pdu.start_symbol_index*NR_NB_SC_PER_RB *
ulsch_harq->ulsch_pdu.rb_size],ulsch_harq->ulsch_pdu.nr_of_symbols*(off+(NR_NB_SC_PER_RB *
@@ -728,13 +763,6 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
gNB_I0_measurements(gNB, slot_rx, first_symb, num_symb, rb_mask_ul);
const int soffset = (slot_rx & 3) * gNB->frame_parms.symbols_per_slot * gNB->frame_parms.ofdm_symbol_size;
int offset = 10 * gNB->frame_parms.ofdm_symbol_size + gNB->frame_parms.first_carrier_offset;
LOG_D(PHY,
"frame %d, slot %d: UL signal energy %d\n",
frame_rx,
slot_rx,
signal_energy_nodc(&gNB->common_vars.rxdataF[0][soffset + offset + (47 * 12)], 12 * 18));
start_meas(&gNB->phy_proc_rx);
for (int i = 0; i < gNB->max_nb_pucch; i++) {
@@ -742,13 +770,10 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
if (pucch) {
if (NFAPI_MODE == NFAPI_MODE_PNF)
pucch->frame = frame_rx;
if ((pucch->active == 1) &&
(pucch->frame == frame_rx) &&
(pucch->slot == slot_rx) ) {
if (pucch->active && (pucch->frame == frame_rx) && (pucch->slot == slot_rx)) {
c16_t **rxdataF = gNB->common_vars.rxdataF[pucch->beam_nb];
pucch_decode_done = 1;
nfapi_nr_pucch_pdu_t *pucch_pdu = &pucch->pucch_pdu;
nfapi_nr_pucch_pdu_t *pucch_pdu = &pucch->pucch_pdu;
uint16_t num_ucis;
switch (pucch_pdu->format_type) {
case 0:
@@ -760,21 +785,17 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
gNB->uci_pdu_list[num_ucis].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_0_1_t);
nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu_format0 = &gNB->uci_pdu_list[num_ucis].pucch_pdu_format_0_1;
offset = pucch_pdu->start_symbol_index*gNB->frame_parms.ofdm_symbol_size + (gNB->frame_parms.first_carrier_offset+pucch_pdu->prb_start*12);
int offset = pucch_pdu->start_symbol_index*gNB->frame_parms.ofdm_symbol_size + (gNB->frame_parms.first_carrier_offset+pucch_pdu->prb_start*12);
LOG_D(PHY,
"frame %d, slot %d: PUCCH signal energy %d\n",
frame_rx,
slot_rx,
signal_energy_nodc(&gNB->common_vars.rxdataF[0][soffset + offset], 12));
signal_energy_nodc(&rxdataF[0][soffset + offset], 12));
nr_decode_pucch0(gNB,
frame_rx,
slot_rx,
uci_pdu_format0,
pucch_pdu);
nr_decode_pucch0(gNB, rxdataF, frame_rx, slot_rx, uci_pdu_format0, pucch_pdu);
gNB->UL_INFO.uci_ind.num_ucis += 1;
pucch->active = 0;
pucch->active = false;
break;
case 2:
num_ucis = gNB->UL_INFO.uci_ind.num_ucis;
@@ -786,14 +807,10 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu_format2 = &gNB->uci_pdu_list[num_ucis].pucch_pdu_format_2_3_4;
LOG_D(PHY, "%d.%d Calling nr_decode_pucch2\n", frame_rx, slot_rx);
nr_decode_pucch2(gNB,
frame_rx,
slot_rx,
uci_pdu_format2,
pucch_pdu);
nr_decode_pucch2(gNB, rxdataF, frame_rx, slot_rx, uci_pdu_format2, pucch_pdu);
gNB->UL_INFO.uci_ind.num_ucis += 1;
pucch->active = 0;
pucch->active = false;
break;
default:
AssertFatal(1 == 0, "Only PUCCH formats 0 and 2 are currently supported\n");
@@ -852,7 +869,7 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_RX_PUSCH, 1);
start_meas(&gNB->rx_pusch_stats);
nr_rx_pusch_tp(gNB, ULSCH_id, frame_rx, slot_rx, ulsch->harq_pid);
nr_rx_pusch_tp(gNB, ULSCH_id, frame_rx, slot_rx, ulsch->harq_pid, ulsch->beam_nb);
NR_gNB_PUSCH *pusch_vars = &gNB->pusch_vars[ULSCH_id];
pusch_vars->ulsch_power_tot = 0;
pusch_vars->ulsch_noise_power_tot = 0;
@@ -923,7 +940,7 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
for (int i = 0; i < gNB->max_nb_srs; i++) {
NR_gNB_SRS_t *srs = &gNB->srs[i];
if (srs) {
if ((srs->active == 1) && (srs->frame == frame_rx) && (srs->slot == slot_rx)) {
if ((srs->active == true) && (srs->frame == frame_rx) && (srs->slot == slot_rx)) {
LOG_D(NR_PHY, "(%d.%d) gNB is waiting for SRS, id = %i\n", frame_rx, slot_rx, i);
start_meas(&gNB->rx_srs_stats);
@@ -943,9 +960,9 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
generate_srs_nr(srs_pdu, frame_parms, gNB->nr_srs_info[i]->srs_generated_signal, 0, gNB->nr_srs_info[i], AMP, frame_rx, slot_rx);
}
stop_meas(&gNB->generate_srs_stats);
c16_t **rxdataF = gNB->common_vars.rxdataF[srs->beam_nb];
start_meas(&gNB->get_srs_signal_stats);
int srs_est = nr_get_srs_signal(gNB, frame_rx, slot_rx, srs_pdu, gNB->nr_srs_info[i], srs_received_signal);
int srs_est = nr_get_srs_signal(gNB, rxdataF, frame_rx, slot_rx, srs_pdu, gNB->nr_srs_info[i], srs_received_signal);
stop_meas(&gNB->get_srs_signal_stats);
if (srs_est >= 0) {
@@ -1131,7 +1148,7 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
#endif
gNB->UL_INFO.srs_ind.number_of_pdus += 1;
srs->active = 0;
srs->active = false;
stop_meas(&gNB->rx_srs_stats);
}
@@ -1141,7 +1158,7 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
stop_meas(&gNB->phy_proc_rx);
if (pucch_decode_done || pusch_decode_done) {
T(T_GNB_PHY_PUCCH_PUSCH_IQ, T_INT(frame_rx), T_INT(slot_rx), T_BUFFER(&gNB->common_vars.rxdataF[0][0], gNB->frame_parms.symbols_per_slot * gNB->frame_parms.ofdm_symbol_size * 4));
T(T_GNB_PHY_PUCCH_PUSCH_IQ, T_INT(frame_rx), T_INT(slot_rx), T_BUFFER(&gNB->common_vars.rxdataF[0][0][0], gNB->frame_parms.symbols_per_slot * gNB->frame_parms.ofdm_symbol_size * 4));
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_UESPEC_RX,0);
openair1/SCHED_NR/sched_nr.h
+7 -2
View File
@@ -39,7 +39,6 @@ void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot);
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_dl_tti_ssb_pdu ssb_pdu);
void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx);
void nr_feptx0(RU_t *ru,int tti_tx,int first_symbol, int num_symbols, int aa);
void nr_feptx_prec(RU_t *ru,int frame_tx,int tti_tx);
void nr_feptx_prec_control(RU_t *ru,int frame,int tti_tx);
void nr_fep_tp(RU_t *ru, int slot);
@@ -47,5 +46,11 @@ void nr_feptx_tp(RU_t *ru, int frame_tx, int slot);
void feptx_prec(RU_t *ru,int frame_tx,int tti_tx);
int nr_phy_init_RU(RU_t *ru);
void nr_phy_free_RU(RU_t *ru);
void clear_slot_beamid(PHY_VARS_gNB *gNB, int slot);
int beam_index_allocation(int fapi_beam_index,
NR_gNB_COMMON *common_vars,
int slot,
int symbols_per_slot,
int start_symbol,
int nb_symbols);
#endif
openair1/SIMULATION/NR_PHY/dlsim.c
+15 -5
View File
@@ -663,6 +663,7 @@ int main(int argc, char **argv)
RC.nb_nr_mac_CC[i] = 1;
mac_top_init_gNB(ngran_gNB, scc, NULL, &conf);
gNB_mac = RC.nrmac[0];
nr_mac_config_scc(RC.nrmac[0], scc, &conf);
gNB_mac->dl_bler.harq_round_max = num_rounds;
@@ -1042,24 +1043,33 @@ int main(int argc, char **argv)
int txdataF_offset = slot * frame_parms->samples_per_slot_wCP;
if (n_trials==1) {
LOG_M("txsigF0.m","txsF0=", &gNB->common_vars.txdataF[0][txdataF_offset+2*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
LOG_M("txsigF0.m","txsF0=",
&gNB->common_vars.txdataF[0][0][txdataF_offset +2 * frame_parms->ofdm_symbol_size],
frame_parms->ofdm_symbol_size,
1,
1);
if (gNB->frame_parms.nb_antennas_tx>1)
LOG_M("txsigF1.m","txsF1=", &gNB->common_vars.txdataF[1][txdataF_offset+2*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
LOG_M("txsigF1.m","txsF1=",
&gNB->common_vars.txdataF[0][1][txdataF_offset + 2 * frame_parms->ofdm_symbol_size],
frame_parms->ofdm_symbol_size,
1,
1);
}
if (n_trials == 1) printf("slot_offset %d, txdataF_offset %d \n", slot_offset, txdataF_offset);
if (n_trials == 1)
printf("slot_offset %d, txdataF_offset %d \n", slot_offset, txdataF_offset);
//TODO: loop over slots
for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++) {
if (cyclic_prefix_type == 1) {
PHY_ofdm_mod((int *)&gNB->common_vars.txdataF[aa][txdataF_offset],
PHY_ofdm_mod((int *)&gNB->common_vars.txdataF[0][aa][txdataF_offset],
(int *)&txdata[aa][slot_offset],
frame_parms->ofdm_symbol_size,
12,
frame_parms->nb_prefix_samples,
CYCLIC_PREFIX);
} else {
nr_normal_prefix_mod(&gNB->common_vars.txdataF[aa][txdataF_offset],
nr_normal_prefix_mod(&gNB->common_vars.txdataF[0][aa][txdataF_offset],
&txdata[aa][slot_offset],
14,
frame_parms,
openair1/SIMULATION/NR_PHY/pbchsim.c
+16 -20
View File
@@ -640,49 +640,45 @@ int main(int argc, char **argv)
int slot = start_symbol/14;
for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++)
memset(gNB->common_vars.txdataF[aa],0,frame_parms->samples_per_slot_wCP*sizeof(int32_t));
memset(gNB->common_vars.txdataF[0][aa], 0, frame_parms->samples_per_slot_wCP * sizeof(int32_t));
nr_common_signal_procedures (gNB,frame,slot,msgDataTx.ssb[i].ssb_pdu);
int samp = frame_parms->get_samples_slot_timestamp(slot, frame_parms, 0);
for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++) {
if (cyclic_prefix_type == 1) {
apply_nr_rotation_TX(frame_parms,
gNB->common_vars.txdataF[aa],
gNB->common_vars.txdataF[0][aa],
frame_parms->symbol_rotation[0],
slot,
frame_parms->N_RB_DL,
0,
12);
PHY_ofdm_mod((int *)gNB->common_vars.txdataF[aa],
(int *)&txdata[aa][frame_parms->get_samples_slot_timestamp(slot,frame_parms,0)],
frame_parms->ofdm_symbol_size,
12,
frame_parms->nb_prefix_samples,
CYCLIC_PREFIX);
PHY_ofdm_mod((int *)gNB->common_vars.txdataF[0][aa],
(int *)&txdata[aa][samp],
frame_parms->ofdm_symbol_size,
12,
frame_parms->nb_prefix_samples,
CYCLIC_PREFIX);
} else {
apply_nr_rotation_TX(frame_parms,
gNB->common_vars.txdataF[aa],
gNB->common_vars.txdataF[0][aa],
frame_parms->symbol_rotation[0],
slot,
frame_parms->N_RB_DL,
0,
14);
/*nr_normal_prefix_mod(gNB->common_vars.txdataF[aa],
&txdata[aa][frame_parms->get_samples_slot_timestamp(slot,frame_parms,0)],
14,
frame_parms);*/
PHY_ofdm_mod((int *)gNB->common_vars.txdataF[aa],
(int*)&txdata[aa][frame_parms->get_samples_slot_timestamp(slot,frame_parms,0)],
PHY_ofdm_mod((int *)gNB->common_vars.txdataF[0][aa],
(int*)&txdata[aa][samp],
frame_parms->ofdm_symbol_size,
1,
frame_parms->nb_prefix_samples0,
CYCLIC_PREFIX);
PHY_ofdm_mod((int *)&gNB->common_vars.txdataF[aa][frame_parms->ofdm_symbol_size],
(int*)&txdata[aa][frame_parms->get_samples_slot_timestamp(slot,frame_parms,0)+frame_parms->nb_prefix_samples0+frame_parms->ofdm_symbol_size],
PHY_ofdm_mod((int *)&gNB->common_vars.txdataF[0][aa][frame_parms->ofdm_symbol_size],
(int*)&txdata[aa][samp + frame_parms->nb_prefix_samples0 + frame_parms->ofdm_symbol_size],
frame_parms->ofdm_symbol_size,
13,
frame_parms->nb_prefix_samples,
@@ -691,9 +687,9 @@ int main(int argc, char **argv)
}
}
}
LOG_M("txsigF0.m","txsF0", gNB->common_vars.txdataF[0],frame_length_complex_samples_no_prefix,1,1);
LOG_M("txsigF0.m","txsF0", gNB->common_vars.txdataF[0][0],frame_length_complex_samples_no_prefix, 1, 1);
if (gNB->frame_parms.nb_antennas_tx>1)
LOG_M("txsigF1.m","txsF1", gNB->common_vars.txdataF[1],frame_length_complex_samples_no_prefix,1,1);
LOG_M("txsigF1.m","txsF1", gNB->common_vars.txdataF[0][1],frame_length_complex_samples_no_prefix, 1, 1);
} else {
printf("Reading %d samples from file to antenna buffer %d\n",frame_length_complex_samples,0);
openair1/SIMULATION/NR_PHY/pucchsim.c
+11 -9
View File
@@ -436,7 +436,7 @@ int main(int argc, char **argv)
/* RU handles rxdataF, and gNB just has a pointer. Here, we don't have an RU,
* so we need to allocate that memory as well. */
for (i = 0; i < n_rx; i++)
gNB->common_vars.rxdataF[i] = malloc16_clear(gNB->frame_parms.samples_per_frame_wCP*sizeof(c16_t));
gNB->common_vars.rxdataF[0][i] = malloc16_clear(gNB->frame_parms.samples_per_frame_wCP * sizeof(c16_t));
double fs,txbw,rxbw;
uint32_t samples;
@@ -540,11 +540,12 @@ int main(int argc, char **argv)
pucch_GroupHopping_t PUCCH_GroupHopping = pucch_tx_pdu.group_hop_flag + (pucch_tx_pdu.sequence_hop_flag<<1);
double tx_level_fp = 100.0;
for(SNR=snr0;SNR<=snr1;SNR+=1){
c16_t **rxdataF = gNB->common_vars.rxdataF[0];
for(SNR = snr0; SNR <= snr1; SNR += 1) {
ack_nack_errors=0;
sr_errors=0;
sr_errors = 0;
n_errors = 0;
c16_t **txdataF = gNB->common_vars.txdataF;
c16_t **txdataF = gNB->common_vars.txdataF[0];
for (trial=0; trial<n_trials; trial++) {
for (int aatx=0;aatx<1;aatx++)
bzero(txdataF[aatx],frame_parms->ofdm_symbol_size*sizeof(int));
@@ -569,7 +570,6 @@ int main(int argc, char **argv)
if (n_trials==1) printf("txlev %d (%f dB), offset %d, sigma2 %f ( %f dB)\n",txlev,10*log10(txlev),startingSymbolIndex*frame_parms->ofdm_symbol_size,sigma2,sigma2_dB);
c16_t **rxdataF = gNB->common_vars.rxdataF;
for (int symb=0; symb<gNB->frame_parms.symbols_per_slot;symb++) {
if (symb<startingSymbolIndex || symb >= startingSymbolIndex+nrofSymbols) {
int i0 = symb*gNB->frame_parms.ofdm_symbol_size;
@@ -668,7 +668,7 @@ int main(int argc, char **argv)
}
else pucch_pdu.freq_hop_flag = 0;
nr_decode_pucch0(gNB, nr_frame_tx, nr_slot_tx,&uci_pdu,&pucch_pdu);
nr_decode_pucch0(gNB, rxdataF, nr_frame_tx, nr_slot_tx,&uci_pdu,&pucch_pdu);
if(sr_flag==1){
if (uci_pdu.sr.sr_indication == 0 || uci_pdu.sr.sr_confidence_level == 1)
sr_errors+=1;
@@ -721,7 +721,7 @@ int main(int argc, char **argv)
pucch_pdu.second_hop_prb = N_RB_DL-1;
}
else pucch_pdu.freq_hop_flag = 0;
nr_decode_pucch2(gNB,nr_frame_tx,nr_slot_tx,&uci_pdu,&pucch_pdu);
nr_decode_pucch2(gNB, rxdataF, nr_frame_tx, nr_slot_tx, &uci_pdu, &pucch_pdu);
int csi_part1_bytes=pucch_pdu.bit_len_csi_part1>>3;
if ((pucch_pdu.bit_len_csi_part1&7) > 0) csi_part1_bytes++;
for (int i=0;i<csi_part1_bytes;i++) {
@@ -752,8 +752,10 @@ int main(int argc, char **argv)
free(gNB->gNB_config.tdd_table.max_tdd_periodicity_list[i].max_num_of_symbol_per_slot_list);
free(gNB->gNB_config.tdd_table.max_tdd_periodicity_list);
for (i = 0; i < n_rx; i++)
free(gNB->common_vars.rxdataF[i]);
for (int j = 0; j < gNB->common_vars.num_beams_period; j++) {
for (i = 0; i < n_rx; i++)
free(gNB->common_vars.rxdataF[j][i]);
}
phy_free_nr_gNB(gNB);
free(RC.gNB[0]);
free(RC.gNB);
openair1/SIMULATION/NR_PHY/ulsim.c
+8 -7
View File
@@ -625,6 +625,7 @@ int main(int argc, char *argv[])
for (i = 0; i < RC.nb_nr_macrlc_inst; i++)
RC.nb_nr_mac_CC[i] = 1;
mac_top_init_gNB(ngran_gNB, scc, NULL /* scd will be updated further below */, &conf);
nr_mac_config_scc(RC.nrmac[0], scc, &conf);
NR_ServingCellConfig_t *scd = calloc(1,sizeof(NR_ServingCellConfig_t));
prepare_scd(scd);
@@ -656,7 +657,7 @@ int main(int argc, char *argv[])
/* RU handles rxdataF, and gNB just has a pointer. Here, we don't have an RU,
* so we need to allocate that memory as well. */
for (i = 0; i < n_rx; i++)
gNB->common_vars.rxdataF[i] = malloc16_clear(gNB->frame_parms.samples_per_frame_wCP*sizeof(int32_t));
gNB->common_vars.rxdataF[0][i] = malloc16_clear(gNB->frame_parms.samples_per_frame_wCP*sizeof(int32_t));
N_RB_DL = gNB->frame_parms.N_RB_DL;
/* no RU: need to have rxdata */
@@ -1228,7 +1229,7 @@ int main(int argc, char *argv[])
for (int aa = 0; aa < gNB->frame_parms.nb_antennas_rx; aa++)
nr_slot_fep_ul(&gNB->frame_parms,
(int32_t *)rxdata[aa],
(int32_t *)gNB->common_vars.rxdataF[aa],
(int32_t *)gNB->common_vars.rxdataF[0][aa],
symbol,
slot,
0);
@@ -1236,7 +1237,7 @@ int main(int argc, char *argv[])
int offset = (slot & 3) * gNB->frame_parms.symbols_per_slot * gNB->frame_parms.ofdm_symbol_size;
for (int aa = 0; aa < gNB->frame_parms.nb_antennas_rx; aa++) {
apply_nr_rotation_RX(&gNB->frame_parms,
gNB->common_vars.rxdataF[aa],
gNB->common_vars.rxdataF[0][aa],
gNB->frame_parms.symbol_rotation[1],
slot,
gNB->frame_parms.N_RB_UL,
@@ -1249,15 +1250,15 @@ int main(int argc, char *argv[])
if (n_trials == 1 && round == 0) {
LOG_M("rxsig0.m", "rx0", &rxdata[0][slot_offset], slot_length, 1, 1);
LOG_M("rxsigF0.m", "rxsF0", gNB->common_vars.rxdataF[0], 14 * frame_parms->ofdm_symbol_size, 1, 1);
LOG_M("rxsigF0.m", "rxsF0", gNB->common_vars.rxdataF[0][0], 14 * frame_parms->ofdm_symbol_size, 1, 1);
if (precod_nbr_layers > 1) {
LOG_M("rxsig1.m", "rx1", &rxdata[1][slot_offset], slot_length, 1, 1);
LOG_M("rxsigF1.m", "rxsF1", gNB->common_vars.rxdataF[1], 14 * frame_parms->ofdm_symbol_size, 1, 1);
LOG_M("rxsigF1.m", "rxsF1", gNB->common_vars.rxdataF[0][1], 14 * frame_parms->ofdm_symbol_size, 1, 1);
if (precod_nbr_layers == 4) {
LOG_M("rxsig2.m", "rx2", &rxdata[2][slot_offset], slot_length, 1, 1);
LOG_M("rxsig3.m", "rx3", &rxdata[3][slot_offset], slot_length, 1, 1);
LOG_M("rxsigF2.m", "rxsF2", gNB->common_vars.rxdataF[2], 14 * frame_parms->ofdm_symbol_size, 1, 1);
LOG_M("rxsigF3.m", "rxsF3", gNB->common_vars.rxdataF[3], 14 * frame_parms->ofdm_symbol_size, 1, 1);
LOG_M("rxsigF2.m", "rxsF2", gNB->common_vars.rxdataF[0][2], 14 * frame_parms->ofdm_symbol_size, 1, 1);
LOG_M("rxsigF3.m", "rxsF3", gNB->common_vars.rxdataF[0][3], 14 * frame_parms->ofdm_symbol_size, 1, 1);
}
}
}
openair2/ENB_APP/enb_paramdef.h
+1 -1
View File
@@ -169,7 +169,7 @@ typedef enum {
#define RU_NUM_INTERFACES 39
#define RU_HALF_SLOT_PARALLELIZATION 40
#define RU_RU_THREAD_CORE 41
#define RU_GPIO_CONTROL 42
#define RU_GPIO_CONTROL 42
/*-----------------------------------------------------------------------------------------------------------------------------------------*/
/* RU configuration parameters */
/* optname helpstr paramflags XXXptr defXXXval type numelt */
openair2/GNB_APP/RRC_nr_paramsvalues.h
-1
View File
@@ -34,7 +34,6 @@
#define __NR_RRC_PARAMSVALUES__H__
#include "common/config/config_paramdesc.h"
#include "NR_ServingCellConfigCommon.h"
/* cell configuration section name */
#define GNB_CONFIG_STRING_GNB_LIST "gNBs"
openair2/GNB_APP/gnb_config.c
+36 -1
View File
@@ -49,6 +49,11 @@
#endif
#include "lib/f1ap_interface_management.h"
static int DEFBANDS[] = {7};
static int DEFENBS[] = {0};
static int DEFBFW[] = {0x00007fff};
static int DEFRUTPCORES[] = {-1,-1,-1,-1};
/**
* @brief Helper define to allocate and initialize SetupRelease structures
*/
@@ -1267,6 +1272,21 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg)
config.pdsch_AntennaPorts.XP,
config.pusch_AntennaPorts);
paramdef_t RUParams[] = RUPARAMS_DESC;
paramlist_def_t RUParamList = {CONFIG_STRING_RU_LIST, NULL, 0};
config_getlist(config_get_if(), &RUParamList, RUParams, sizeofArray(RUParams), NULL);
int num_tx = 0;
if (RUParamList.numelt > 0) {
for (int i = 0; i < RUParamList.numelt; i++)
num_tx += *(RUParamList.paramarray[i][RU_NB_TX_IDX].uptr);
AssertFatal(num_tx >= config.pdsch_AntennaPorts.XP * config.pdsch_AntennaPorts.N1 * config.pdsch_AntennaPorts.N2,
"Number of logical antenna ports (set in config file with pdsch_AntennaPorts) cannot be larger than physical antennas (nb_tx)\n");
}
else {
// TODO temporary solution for 3rd party RU or nFAPI, in which case we don't have RU section present in the config file
num_tx = config.pdsch_AntennaPorts.XP * config.pdsch_AntennaPorts.N1 * config.pdsch_AntennaPorts.N2;
LOG_E(GNB_APP, "RU information not present in config file. Assuming physical antenna ports equal to logical antenna ports %d\n", num_tx);
}
config.minRXTXTIME = *GNBParamList.paramarray[0][GNB_MINRXTXTIME_IDX].iptr;
LOG_I(GNB_APP, "minTXRXTIME %d\n", config.minRXTXTIME);
config.sib1_tda = *GNBParamList.paramarray[0][GNB_SIB1_TDA_IDX].iptr;
@@ -1324,6 +1344,19 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg)
config.timer_config.n311,
config.timer_config.t319);
if (config_isparamset(GNBParamList.paramarray[0], GNB_BEAMWEIGHTS_IDX)) {
int n = GNBParamList.paramarray[0][GNB_BEAMWEIGHTS_IDX].numelt;
AssertFatal(n % num_tx == 0, "Error! Number of beam input needs to be multiple of TX antennas\n");
// each beam is described by a set of weights (one for each antenna)
// on the other hand in case of analog beamforming an index to the RU beam identifier is provided
config.nb_bfw[0] = num_tx; // number of tx antennas
config.nb_bfw[1] = n / num_tx; // number of beams
config.bw_list = malloc16_clear(n * sizeof(*config.bw_list));
for (int b = 0; b < n; b++) {
config.bw_list[b] = GNBParamList.paramarray[0][GNB_BEAMWEIGHTS_IDX].iptr[b];
}
}
NR_ServingCellConfigCommon_t *scc = get_scc_config(cfg, config.minRXTXTIME);
//xer_fprint(stdout, &asn_DEF_NR_ServingCellConfigCommon, scc);
NR_ServingCellConfig_t *scd = get_scd_config(cfg);
@@ -1424,6 +1457,8 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg)
beam_info->beams_per_period = beams_per_period;
beam_info->beam_allocation_size = -1; // to be initialized once we have information on frame configuration
}
// triggers also PHY initialization in case we have L1 via FAPI
nr_mac_config_scc(RC.nrmac[j], scc, &config);
} // for (j=0;j<RC.nb_nr_macrlc_inst;j++)
uint64_t gnb_du_id = 0;
@@ -2408,7 +2443,7 @@ ngran_node_t get_node_type(void)
char aprefix[MAX_OPTNAME_SIZE*2 + 8];
sprintf(aprefix, "%s.[%i]", GNB_CONFIG_STRING_GNB_LIST, 0);
config_getlist(config_get_if(), &GNBE1ParamList, GNBE1Params, sizeofArray(GNBE1Params), aprefix);
if ( MacRLC_ParamList.numelt > 0) {
if (MacRLC_ParamList.numelt > 0) {
RC.nb_nr_macrlc_inst = MacRLC_ParamList.numelt;
for (int j = 0; j < RC.nb_nr_macrlc_inst; j++) {
if (strcmp(*(MacRLC_ParamList.paramarray[j][MACRLC_TRANSPORT_N_PREFERENCE_IDX].strptr), "f1") == 0) {
openair2/GNB_APP/gnb_paramdef.h
+18 -13
View File
@@ -131,22 +131,23 @@ typedef enum {
#define GNB_CONFIG_STRING_DRBS "drbs"
#define GNB_CONFIG_STRING_USE_DELTA_MCS "use_deltaMCS"
#define GNB_CONFIG_HLP_USE_DELTA_MCS "Use deltaMCS-based power headroom reporting in PUSCH-Config"
#define GNB_CONFIG_HLP_FORCEUL256QAMOFF "suppress activation of UL 256 QAM despite UE support"
#define GNB_CONFIG_HLP_FORCEUL256QAMOFF "suppress activation of UL 256 QAM despite UE support"
#define GNB_CONFIG_STRING_FORCEUL256QAMOFF "force_UL256qam_off"
#define GNB_CONFIG_STRING_GNB_DU_ID "gNB_DU_ID"
#define GNB_CONFIG_STRING_GNB_CU_UP_ID "gNB_CU_UP_ID"
#define GNB_CONFIG_STRING_NUM_DL_HARQPROCESSES "num_dlharq"
#define GNB_CONFIG_STRING_NUM_UL_HARQPROCESSES "num_ulharq"
#define GNB_CONFIG_STRING_GNB_DU_ID "gNB_DU_ID"
#define GNB_CONFIG_STRING_GNB_CU_UP_ID "gNB_CU_UP_ID"
#define GNB_CONFIG_STRING_NUM_DL_HARQPROCESSES "num_dlharq"
#define GNB_CONFIG_STRING_NUM_UL_HARQPROCESSES "num_ulharq"
#define GNB_CONFIG_STRING_BEAM_WEIGHTS_LIST "beam_weights"
#define GNB_CONFIG_HLP_STRING_ENABLE_SDAP "enable the SDAP layer\n"
#define GNB_CONFIG_HLP_FORCE256QAMOFF "suppress activation of 256 QAM despite UE support"
#define GNB_CONFIG_HLP_MAXMIMOLAYERS "limit on maxMIMO-layers for DL"
#define GNB_CONFIG_HLP_DISABLE_HARQ "disable feedback for all HARQ processes (REL17 feature)"
#define GNB_CONFIG_HLP_STRING_DRBS "Number of total DRBs to establish, including the mandatory for PDU SEssion (default=1)\n"
#define GNB_CONFIG_HLP_GNB_DU_ID "defines the gNB-DU ID (only applicable for DU)"
#define GNB_CONFIG_HLP_GNB_CU_UP_ID "defines the gNB-CU-UP ID (only applicable for CU-UP)"
#define GNB_CONFIG_HLP_NUM_DL_HARQ "Set Num DL harq processes. Valid values 2,4,6,8,10,12,16,32. Default 16"
#define GNB_CONFIG_HLP_NUM_UL_HARQ "Set Num UL harq processes. Valid values 16,32. Default 16"
#define GNB_CONFIG_HLP_GNB_DU_ID "defines the gNB-DU ID (only applicable for DU)"
#define GNB_CONFIG_HLP_GNB_CU_UP_ID "defines the gNB-CU-UP ID (only applicable for CU-UP)"
#define GNB_CONFIG_HLP_NUM_DL_HARQ "Set Num DL harq processes. Valid values 2,4,6,8,10,12,16,32. Default 16"
#define GNB_CONFIG_HLP_NUM_UL_HARQ "Set Num UL harq processes. Valid values 16,32. Default 16"
/*-----------------------------------------------------------------------------------------------------------------------------------------*/
/* cell configuration parameters */
@@ -187,8 +188,9 @@ typedef enum {
{GNB_CONFIG_STRING_FORCEUL256QAMOFF, GNB_CONFIG_HLP_FORCEUL256QAMOFF, 0,.iptr=NULL, .defintval=0, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_MAXMIMOLAYERS, GNB_CONFIG_HLP_MAXMIMOLAYERS, 0, .iptr=NULL, .defintval=-1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_DISABLE_HARQ, GNB_CONFIG_HLP_DISABLE_HARQ, PARAMFLAG_BOOL, .iptr=NULL, .defintval=0, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_NUM_DL_HARQPROCESSES, GNB_CONFIG_HLP_NUM_DL_HARQ, 0, .iptr=NULL, .defintval=16, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_NUM_UL_HARQPROCESSES, GNB_CONFIG_HLP_NUM_UL_HARQ, 0, .iptr=NULL, .defintval=16, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_NUM_DL_HARQPROCESSES, GNB_CONFIG_HLP_NUM_DL_HARQ, 0, .iptr=NULL, .defintval=16, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_NUM_UL_HARQPROCESSES, GNB_CONFIG_HLP_NUM_UL_HARQ, 0, .iptr=NULL, .defintval=16, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_BEAM_WEIGHTS_LIST, NULL, 0, .iptr=NULL, .defintarrayval=0, TYPE_INTARRAY, 0}, \
}
// clang-format on
@@ -228,6 +230,7 @@ typedef enum {
#define GNB_DISABLE_HARQ_IDX 32
#define GNB_NUM_DL_HARQ_IDX 33
#define GNB_NUM_UL_HARQ_IDX 34
#define GNB_BEAMWEIGHTS_IDX 35
#define TRACKING_AREA_CODE_OKRANGE {0x0001,0xFFFD}
#define NUM_DL_HARQ_OKVALUES {2,4,6,8,10,12,16,32}
@@ -267,8 +270,9 @@ typedef enum {
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s1 = { config_check_intval, NUM_DL_HARQ_OKVALUES,8 } }, \
{ .s1 = { config_check_intval, NUM_UL_HARQ_OKVALUES,2 } }, \
{ .s1 = { config_check_intval, NUM_DL_HARQ_OKVALUES,8 } }, \
{ .s1 = { config_check_intval, NUM_UL_HARQ_OKVALUES,2 } }, \
{ .s5 = { NULL } }, \
}
/*-------------------------------------------------------------------------------------------------------------------------------------------------*/
@@ -633,3 +637,4 @@ typedef enum {
/*----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
#endif
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
-1
View File
@@ -474,7 +474,6 @@ typedef struct Type0_PDCCH_CSS_config_s {
uint32_t first_symbol_index;
uint32_t search_space_duration;
uint32_t search_space_frame_period; // in slots
uint32_t ssb_length;
uint32_t ssb_index;
int32_t cset_start_rb;
NR_SubcarrierSpacing_t scs_pdcch;
openair2/LAYER2/NR_MAC_gNB/config.c
+39 -5
View File
@@ -272,7 +272,9 @@ nfapi_nr_pm_list_t init_DL_MIMO_codebook(gNB_MAC_INST *gNB, nr_pdsch_AntennaPort
return mat;
}
static void config_common(gNB_MAC_INST *nrmac, nr_pdsch_AntennaPorts_t pdsch_AntennaPorts, int pusch_AntennaPorts, NR_ServingCellConfigCommon_t *scc)
static void config_common(gNB_MAC_INST *nrmac,
const nr_mac_config_t *config,
NR_ServingCellConfigCommon_t *scc)
{
nfapi_nr_config_request_scf_t *cfg = &nrmac->config[0];
nrmac->common_channels[0].ServingCellConfigCommon = scc;
@@ -527,6 +529,7 @@ static void config_common(gNB_MAC_INST *nrmac, nr_pdsch_AntennaPorts_t pdsch_Ant
cfg->num_tlv += 2;
// logical antenna ports
nr_pdsch_AntennaPorts_t pdsch_AntennaPorts = config->pdsch_AntennaPorts;
int num_pdsch_antenna_ports = pdsch_AntennaPorts.N1 * pdsch_AntennaPorts.N2 * pdsch_AntennaPorts.XP;
cfg->carrier_config.num_tx_ant.value = num_pdsch_antenna_ports;
AssertFatal(num_pdsch_antenna_ports > 0 && num_pdsch_antenna_ports < 33, "pdsch_AntennaPorts in 1...32\n");
@@ -550,18 +553,19 @@ static void config_common(gNB_MAC_INST *nrmac, nr_pdsch_AntennaPorts_t pdsch_Ant
cfg->num_tlv++;
}
int pusch_AntennaPorts = config->pusch_AntennaPorts;
cfg->carrier_config.num_rx_ant.value = pusch_AntennaPorts;
AssertFatal(pusch_AntennaPorts > 0 && pusch_AntennaPorts < 13, "pusch_AntennaPorts in 1...12\n");
cfg->carrier_config.num_rx_ant.tl.tag = NFAPI_NR_CONFIG_NUM_RX_ANT_TAG;
LOG_I(NR_MAC,
"Set RX antenna number to %d, Set TX antenna number to %d (num ssb %d: %x,%x)\n",
"Set TX antenna number to %d, Set RX antenna number to %d (num ssb %d: %x,%x)\n",
cfg->carrier_config.num_tx_ant.value,
cfg->carrier_config.num_rx_ant.value,
num_ssb,
cfg->ssb_table.ssb_mask_list[0].ssb_mask.value,
cfg->ssb_table.ssb_mask_list[1].ssb_mask.value);
AssertFatal(cfg->carrier_config.num_tx_ant.value > 0,
"carrier_config.num_tx_ant.value %d !\n",
"carrier_config.num_tx_ant.value %d!\n",
cfg->carrier_config.num_tx_ant.value);
cfg->num_tlv++;
cfg->num_tlv++;
@@ -589,13 +593,42 @@ static void config_common(gNB_MAC_INST *nrmac, nr_pdsch_AntennaPorts_t pdsch_Ant
AssertFatal(periods_per_frame > 0, "TDD configuration cannot be configured\n");
}
int nb_tx = config->nb_bfw[0]; // number of tx antennas
int nb_beams = config->nb_bfw[1]; // number of beams
// precoding matrix configuration (to be improved)
cfg->pmi_list = init_DL_MIMO_codebook(nrmac, pdsch_AntennaPorts);
// beamforming matrix configuration
cfg->dbt_config.num_dig_beams = nb_beams;
if (nb_beams > 0) {
cfg->dbt_config.num_txrus = nb_tx;
cfg->dbt_config.dig_beam_list = malloc16(nb_beams * sizeof(*cfg->dbt_config.dig_beam_list));
AssertFatal(cfg->dbt_config.dig_beam_list, "out of memory\n");
for (int i = 0; i < nb_beams; i++) {
nfapi_nr_dig_beam_t *beam = &cfg->dbt_config.dig_beam_list[i];
beam->beam_idx = i;
beam->txru_list = malloc16(nb_tx * sizeof(*beam->txru_list));
for (int j = 0; j < nb_tx; j++) {
nfapi_nr_txru_t *txru = &beam->txru_list[j];
txru->dig_beam_weight_Re = config->bw_list[j + i * nb_tx] & 0xffff;
txru->dig_beam_weight_Im = (config->bw_list[j + i * nb_tx] >> 16) & 0xffff;
LOG_D(NR_MAC, "Beam %d Tx %d Weight (%d, %d)\n", i, j, txru->dig_beam_weight_Re, txru->dig_beam_weight_Im);
}
}
}
if (nrmac->beam_info.beam_allocation) {
cfg->analog_beamforming_ve.num_beams_period_vendor_ext.tl.tag = NFAPI_NR_FAPI_NUM_BEAMS_PERIOD_VENDOR_EXTENSION_TAG;
cfg->analog_beamforming_ve.num_beams_period_vendor_ext.value = nrmac->beam_info.beams_per_period;
cfg->num_tlv++;
cfg->analog_beamforming_ve.analog_bf_vendor_ext.tl.tag = NFAPI_NR_FAPI_ANALOG_BF_VENDOR_EXTENSION_TAG;
cfg->analog_beamforming_ve.analog_bf_vendor_ext.value = 1; // analog BF enabled
cfg->num_tlv++;
}
}
static void initialize_beam_information(NR_beam_info_t *beam_info, int mu, int slots_per_frame)
{
if(!beam_info->beam_allocation)
if (!beam_info->beam_allocation)
return;
int size = mu == 0 ? slots_per_frame << 1 : slots_per_frame;
@@ -644,7 +677,8 @@ void nr_mac_config_scc(gNB_MAC_INST *nrmac, NR_ServingCellConfigCommon_t *scc, c
LOG_I(NR_MAC, "Configuring common parameters from NR ServingCellConfig\n");
config_common(nrmac, config->pdsch_AntennaPorts, config->pusch_AntennaPorts, scc);
config_common(nrmac, config, scc);
fapi_beam_index_allocation(scc, nrmac);
if (NFAPI_MODE == NFAPI_MONOLITHIC) {
// nothing to be sent in the other cases
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
-44
View File
@@ -92,50 +92,6 @@ void clear_nr_nfapi_information(gNB_MAC_INST *gNB,
LOG_D(NR_MAC, "%d.%d UL_tti_req_ahead SFN.slot = %d.%d for index %d \n", frameP, slotP, future_ul_tti_req->SFN, future_ul_tti_req->Slot, prev_slot % size);
/* future_ul_tti_req->Slot is fixed! */
for (int i = 0; i < future_ul_tti_req->n_pdus; i++) {
switch(future_ul_tti_req->pdus_list[i].pdu_type){
case NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE:
if(future_ul_tti_req->pdus_list[i].prach_pdu.beamforming.prgs_list){
for (int j = 0; j < future_ul_tti_req->pdus_list[i].prach_pdu.beamforming.num_prgs; ++j) {
if(future_ul_tti_req->pdus_list[i].prach_pdu.beamforming.prgs_list[j].dig_bf_interface_list){
free(future_ul_tti_req->pdus_list[i].prach_pdu.beamforming.prgs_list[j].dig_bf_interface_list);
}
}
free(future_ul_tti_req->pdus_list[i].prach_pdu.beamforming.prgs_list);
}
break;
case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
if(future_ul_tti_req->pdus_list[i].pusch_pdu.beamforming.prgs_list){
for (int j = 0; j < future_ul_tti_req->pdus_list[i].pusch_pdu.beamforming.num_prgs; ++j) {
if(future_ul_tti_req->pdus_list[i].pusch_pdu.beamforming.prgs_list[j].dig_bf_interface_list){
free(future_ul_tti_req->pdus_list[i].pusch_pdu.beamforming.prgs_list[j].dig_bf_interface_list);
}
}
free(future_ul_tti_req->pdus_list[i].pusch_pdu.beamforming.prgs_list);
}
break;
case NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE:
if(future_ul_tti_req->pdus_list[i].pucch_pdu.beamforming.prgs_list){
for (int j = 0; j < future_ul_tti_req->pdus_list[i].pucch_pdu.beamforming.num_prgs; ++j) {
if(future_ul_tti_req->pdus_list[i].pucch_pdu.beamforming.prgs_list[j].dig_bf_interface_list){
free(future_ul_tti_req->pdus_list[i].pucch_pdu.beamforming.prgs_list[j].dig_bf_interface_list);
}
}
free(future_ul_tti_req->pdus_list[i].pucch_pdu.beamforming.prgs_list);
}
break;
case NFAPI_NR_UL_CONFIG_SRS_PDU_TYPE:
if(future_ul_tti_req->pdus_list[i].srs_pdu.beamforming.prgs_list){
for (int j = 0; j < future_ul_tti_req->pdus_list[i].srs_pdu.beamforming.num_prgs; ++j) {
if(future_ul_tti_req->pdus_list[i].srs_pdu.beamforming.prgs_list[j].dig_bf_interface_list){
free(future_ul_tti_req->pdus_list[i].srs_pdu.beamforming.prgs_list[j].dig_bf_interface_list);
}
}
free(future_ul_tti_req->pdus_list[i].srs_pdu.beamforming.prgs_list);
}
break;
default:
break;
}
future_ul_tti_req->pdus_list[i].pdu_type = 0;
future_ul_tti_req->pdus_list[i].pdu_size = 0;
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+59 -55
View File
@@ -54,16 +54,13 @@ extern uint16_t sl_ahead;
// forward declaration of functions used in this file
static void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
NR_ServingCellConfigCommon_t *scc,
int round,
const NR_RA_t *ra,
int startSymbolAndLength,
rnti_t rnti,
int scs,
int bwp_size,
int bwp_start,
int mappingtype,
int fh,
int msg3_first_rb,
int msg3_nb_rb);
int fh);
static void nr_fill_rar(uint8_t Mod_idP, NR_RA_t *ra, uint8_t *dlsch_buffer, nfapi_nr_pusch_pdu_t *pusch_pdu);
static const uint8_t DELTA[4] = {2, 3, 4, 6};
@@ -224,7 +221,7 @@ void find_SSB_and_RO_available(gNB_MAC_INST *nrmac)
float num_ssb_per_RO = ssb_per_rach_occasion[cfg->prach_config.ssb_per_rach.value];
uint8_t fdm = cfg->prach_config.num_prach_fd_occasions.value;
uint64_t L_ssb = (((uint64_t) cfg->ssb_table.ssb_mask_list[0].ssb_mask.value)<<32) | cfg->ssb_table.ssb_mask_list[1].ssb_mask.value ;
uint64_t L_ssb = (((uint64_t) cfg->ssb_table.ssb_mask_list[0].ssb_mask.value) << 32) | cfg->ssb_table.ssb_mask_list[1].ssb_mask.value;
uint32_t total_RA_occasions = N_RA_sfn * N_t_slot * N_RA_slot * fdm;
for(int i = 0; i < 64; i++) {
@@ -330,15 +327,23 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
continue;
float num_ssb_per_RO = ssb_per_rach_occasion[cfg->prach_config.ssb_per_rach.value];
int beam_index = 0;
if(num_ssb_per_RO <= 1) {
int ssb_index = (int) (prach_occasion_id / (int)(1 / num_ssb_per_RO)) % cc->num_active_ssb;
beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, ssb_index, nr_slots_per_frame[mu]);
AssertFatal(beam.idx >= 0, "Cannot allocate PRACH corresponding to SSB %d in any available beam\n", ssb_index);
// ordered ssb number
int n_ssb = (int) (prach_occasion_id / (int)(1 / num_ssb_per_RO)) % cc->num_active_ssb;
// fapi beam index
beam_index = get_fapi_beamforming_index(gNB, cc->ssb_index[n_ssb]);
// multi-beam allocation structure
beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, beam_index, nr_slots_per_frame[mu]);
AssertFatal(beam.idx >= 0, "Cannot allocate PRACH corresponding to %d SSB transmitted in any available beam\n", n_ssb + 1);
}
else {
int first_ssb_index = (prach_occasion_id * (int)num_ssb_per_RO) % cc->num_active_ssb;
for(int j = first_ssb_index; j < first_ssb_index + num_ssb_per_RO; j++) {
beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, j, nr_slots_per_frame[mu]);
// fapi beam index
beam_index = get_fapi_beamforming_index(gNB, cc->ssb_index[j]);
// multi-beam allocation structure
beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, beam_index, nr_slots_per_frame[mu]);
AssertFatal(beam.idx >= 0, "Cannot allocate PRACH corresponding to SSB %d in any available beam\n", j);
}
}
@@ -361,6 +366,11 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
format0,
rach_ConfigCommon->restrictedSetConfig);
prach_pdu->beamforming.num_prgs = 0;
prach_pdu->beamforming.prg_size = 0;
prach_pdu->beamforming.dig_bf_interface = 1;
prach_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = beam_index;
LOG_D(NR_MAC,
"Frame %d, Slot %d: Prach Occasion id = %u fdm index = %u start symbol = %u slot index = %u subframe index = %u \n",
frameP,
@@ -548,8 +558,9 @@ void nr_initiate_ra_proc(module_id_t module_idP,
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
configure_UE_BWP(nr_mac, scc, NULL, ra, NULL, -1, -1);
uint8_t beam_index = ssb_index_from_prach(module_idP, frameP, slotP, preamble_index, freq_index, symbol);
ra->beam_id = cc->ssb_index[beam_index];
// return current SSB order in the list of tranmitted SSBs
int n_ssb = ssb_index_from_prach(module_idP, frameP, slotP, preamble_index, freq_index, symbol);
ra->beam_id = get_fapi_beamforming_index(nr_mac, cc->ssb_index[n_ssb]);
NR_SCHED_UNLOCK(&nr_mac->sched_lock);
@@ -654,13 +665,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
nfapi_nr_pusch_pdu_t *pusch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pusch_pdu;
memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t));
fill_msg3_pusch_pdu(pusch_pdu, scc,
ra->msg3_round,
startSymbolAndLength,
ra->rnti, mu,
BWPSize, BWPStart,
mappingtype, fh,
rbStart, ra->msg3_nb_rb);
fill_msg3_pusch_pdu(pusch_pdu, scc, ra, startSymbolAndLength, mu, BWPSize, BWPStart, mappingtype, fh);
future_ul_tti_req->n_pdus += 1;
// generation of DCI 0_0 to schedule msg3 retransmission
@@ -706,6 +711,12 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
dci_pdu->beta_PDCCH_1_0 = 0;
dci_pdu->powerControlOffsetSS = 1;
dci_pdu->precodingAndBeamforming.num_prgs = 0;
dci_pdu->precodingAndBeamforming.prg_size = 0;
dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 1;
dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = ra->beam_id;
dci_pdu_rel15_t uldci_payload={0};
config_uldci(sc_info,
@@ -883,16 +894,13 @@ static void nr_get_Msg3alloc(module_id_t module_id,
static void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
NR_ServingCellConfigCommon_t *scc,
int round,
const NR_RA_t *ra,
int startSymbolAndLength,
rnti_t rnti,
int scs,
int bwp_size,
int bwp_start,
int mappingtype,
int fh,
int msg3_first_rb,
int msg3_nb_rb)
int fh)
{
int start_symbol_index,nr_of_symbols;
@@ -900,7 +908,7 @@ static void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
int mcsindex = -1; // init value
pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
pusch_pdu->rnti = rnti;
pusch_pdu->rnti = ra->rnti;
pusch_pdu->handle = 0;
pusch_pdu->bwp_start = bwp_start;
pusch_pdu->bwp_size = bwp_size;
@@ -928,11 +936,11 @@ static void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
pusch_pdu->num_dmrs_cdm_grps_no_data = 2; // no data in dmrs symbols as in 6.2.2 in 38.214
pusch_pdu->resource_alloc = 1; //type 1
memset(pusch_pdu->rb_bitmap, 0, sizeof(pusch_pdu->rb_bitmap));
pusch_pdu->rb_start = msg3_first_rb;
if (msg3_nb_rb > pusch_pdu->bwp_size)
AssertFatal(1==0,"MSG3 allocated number of RBs exceed the BWP size\n");
pusch_pdu->rb_start = ra->msg3_first_rb;
if (ra->msg3_nb_rb > pusch_pdu->bwp_size)
AssertFatal(false, "MSG3 allocated number of RBs exceed the BWP size\n");
else
pusch_pdu->rb_size = msg3_nb_rb;
pusch_pdu->rb_size = ra->msg3_nb_rb;
pusch_pdu->vrb_to_prb_mapping = 0;
pusch_pdu->frequency_hopping = fh;
@@ -945,27 +953,17 @@ static void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
pusch_pdu->start_symbol_index = start_symbol_index;
pusch_pdu->nr_of_symbols = nr_of_symbols;
//Optional Data only included if indicated in pduBitmap
pusch_pdu->pusch_data.rv_index = nr_rv_round_map[round%4];
pusch_pdu->pusch_data.rv_index = nr_rv_round_map[ra->msg3_round % 4];
pusch_pdu->pusch_data.harq_process_id = 0;
pusch_pdu->pusch_data.new_data_indicator = (round == 0) ? 1 : 0;;
pusch_pdu->pusch_data.new_data_indicator = (ra->msg3_round == 0) ? 1 : 0;;
pusch_pdu->pusch_data.num_cb = 0;
// Beamforming
pusch_pdu->beamforming.num_prgs = 0;
pusch_pdu->beamforming.prg_size = 0; // bwp_size;
pusch_pdu->beamforming.dig_bf_interface = 0;
if (pusch_pdu->beamforming.num_prgs > 0) {
if (pusch_pdu->beamforming.prgs_list == NULL) {
pusch_pdu->beamforming.prgs_list = calloc(pusch_pdu->beamforming.num_prgs, sizeof(*pusch_pdu->beamforming.prgs_list));
}
if (pusch_pdu->beamforming.dig_bf_interface > 0) {
if (pusch_pdu->beamforming.prgs_list[0].dig_bf_interface_list == NULL) {
pusch_pdu->beamforming.prgs_list[0].dig_bf_interface_list =
calloc(pusch_pdu->beamforming.dig_bf_interface, sizeof(*pusch_pdu->beamforming.prgs_list[0].dig_bf_interface_list));
}
}
pusch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = 0;
}
pusch_pdu->beamforming.dig_bf_interface = 1;
pusch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = ra->beam_id;
int num_dmrs_symb = 0;
for(int i = start_symbol_index; i < start_symbol_index+nr_of_symbols; i++)
num_dmrs_symb += (pusch_pdu->ul_dmrs_symb_pos >> i) & 1;
@@ -1048,13 +1046,7 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_f
ra->msg3_first_rb,
ra->msg3_round);
fill_msg3_pusch_pdu(pusch_pdu,scc,
ra->msg3_round,
startSymbolAndLength,
ra->rnti, scs,
ibwp_size, ra->msg3_bwp_start,
mappingtype, fh,
ra->msg3_first_rb, ra->msg3_nb_rb);
fill_msg3_pusch_pdu(pusch_pdu, scc, ra, startSymbolAndLength, scs, ibwp_size, ra->msg3_bwp_start, mappingtype, fh);
future_ul_tti_req->n_pdus += 1;
// calling function to fill rar message
@@ -1271,7 +1263,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
BWPStart = dl_bwp->BWPStart;
BWPSize = sc_info->initial_dl_BWPSize;
} else {
type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[ra->beam_id];
type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[cc->ssb_index[ra->beam_id]];
BWPStart = type0_PDCCH_CSS_config->cset_start_rb;
BWPSize = type0_PDCCH_CSS_config->num_rbs;
}
@@ -1354,7 +1346,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
pdsch_pdu_rel15->precodingAndBeamforming.prg_size = 0;
pdsch_pdu_rel15->precodingAndBeamforming.dig_bf_interfaces = 0;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = 0;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = ra->beam_id;
LOG_A(NR_MAC,
"UE %04x: %d.%d Generating RA-Msg2 DCI, RA RNTI 0x%x, state %d, CoreSetType %d, RAPID %d\n",
@@ -1438,6 +1430,12 @@ static void nr_generate_Msg2(module_id_t module_idP,
dci_pdu->beta_PDCCH_1_0 = 0;
dci_pdu->powerControlOffsetSS = 1;
dci_pdu->precodingAndBeamforming.num_prgs = 0;
dci_pdu->precodingAndBeamforming.prg_size = 0;
dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 1;
dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = ra->beam_id;
dci_pdu_rel15_t dci_payload;
dci_payload.frequency_domain_assignment.val =
PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize, pdsch_pdu_rel15->rbStart, BWPSize);
@@ -1603,7 +1601,7 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
BWPStart = dl_bwp->BWPStart;
BWPSize = dl_bwp->BWPSize;
} else {
type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[ra->beam_id];
type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[cc->ssb_index[ra->beam_id]];
BWPStart = type0_PDCCH_CSS_config->cset_start_rb;
BWPSize = type0_PDCCH_CSS_config->num_rbs;
}
@@ -1665,6 +1663,12 @@ static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
dci_pdu->beta_PDCCH_1_0 = 0;
dci_pdu->powerControlOffsetSS = 1;
dci_pdu->precodingAndBeamforming.num_prgs = 0;
dci_pdu->precodingAndBeamforming.prg_size = 0;
dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 1;
dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = ra->beam_id;
dci_pdu_rel15_t dci_payload;
dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize,
pdsch_pdu_rel15->rbStart,
@@ -1799,7 +1803,7 @@ static void nr_generate_Msg4(module_id_t module_idP,
BWPStart = dl_bwp->BWPStart;
BWPSize = dl_bwp->BWPSize;
} else {
type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[ra->beam_id];
type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[cc->ssb_index[ra->beam_id]];
BWPStart = type0_PDCCH_CSS_config->cset_start_rb;
BWPSize = type0_PDCCH_CSS_config->num_rbs;
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+64 -51
View File
@@ -52,41 +52,43 @@ static void schedule_ssb(frame_t frame,
NR_ServingCellConfigCommon_t *scc,
nfapi_nr_dl_tti_request_body_t *dl_req,
int i_ssb,
int beam_index,
uint8_t scoffset,
uint16_t offset_pointa,
uint32_t payload)
{
uint8_t beam_index = 0;
nfapi_nr_dl_tti_request_pdu_t *dl_config_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset((void *) dl_config_pdu, 0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
dl_config_pdu->PDUType = NFAPI_NR_DL_TTI_SSB_PDU_TYPE;
dl_config_pdu->PDUSize =2 + sizeof(nfapi_nr_dl_tti_ssb_pdu_rel15_t);
nfapi_nr_dl_tti_request_pdu_t *dl_config_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset((void *) dl_config_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t));
dl_config_pdu->PDUType = NFAPI_NR_DL_TTI_SSB_PDU_TYPE;
dl_config_pdu->PDUSize = 2 + sizeof(nfapi_nr_dl_tti_ssb_pdu_rel15_t);
AssertFatal(scc->physCellId!=NULL,"ServingCellConfigCommon->physCellId is null\n");
AssertFatal(*scc->physCellId < 1008 && *scc->physCellId >=0, "5G physicall cell id out of range: %ld\n", *scc->physCellId);
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.PhysCellId = *scc->physCellId;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.BetaPss = 0;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.SsbBlockIndex = i_ssb;
AssertFatal(scc->downlinkConfigCommon!=NULL,"scc->downlinkConfigCommonL is null\n");
AssertFatal(scc->downlinkConfigCommon->frequencyInfoDL!=NULL,"scc->downlinkConfigCommon->frequencyInfoDL is null\n");
AssertFatal(scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB!=NULL,"scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB is null\n");
AssertFatal(scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.count==1,"Frequency Band list does not have 1 element (%d)\n",
AssertFatal(scc->physCellId != NULL,"ServingCellConfigCommon->physCellId is null\n");
AssertFatal(*scc->physCellId < 1008 && *scc->physCellId >=0, "5G physicall cell id out of range: %ld\n", *scc->physCellId);
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.PhysCellId = *scc->physCellId;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.BetaPss = 0;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.SsbBlockIndex = i_ssb;
AssertFatal(scc->downlinkConfigCommon,"scc->downlinkConfigCommonL is null\n");
AssertFatal(scc->downlinkConfigCommon->frequencyInfoDL,"scc->downlinkConfigCommon->frequencyInfoDL is null\n");
AssertFatal(scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB,
"scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB is null\n");
AssertFatal(scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.count == 1,
"Frequency Band list does not have 1 element (%d)\n",
scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.count);
AssertFatal(scc->ssbSubcarrierSpacing,"ssbSubcarrierSpacing is null\n");
AssertFatal(scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0],"band is null\n");
AssertFatal(scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], "band is null\n");
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset = scoffset; //kSSB
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA = offset_pointa;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayloadFlag = 1;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayload = payload;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.precoding_and_beamforming.num_prgs=1;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.precoding_and_beamforming.prg_size=275; //1 PRG of max size for analogue beamforming
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.precoding_and_beamforming.dig_bf_interfaces=1;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA = offset_pointa;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayloadFlag = 1;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.bchPayload = payload;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.precoding_and_beamforming.num_prgs = 1;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.precoding_and_beamforming.prg_size = 275; //1 PRG of max size for analogue beamforming
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.precoding_and_beamforming.dig_bf_interfaces = 1;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.precoding_and_beamforming.prgs_list[0].pm_idx = 0;
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.precoding_and_beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = beam_index;
dl_req->nPDUs++;
LOG_D(MAC,"Scheduling ssb %d at frame %d and slot %d\n",i_ssb,frame,slot);
LOG_D(MAC,"Scheduling ssb %d at frame %d and slot %d\n", i_ssb, frame, slot);
}
static void fill_ssb_vrb_map(NR_COMMON_channels_t *cc,
@@ -152,13 +154,12 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
if (ssb_period > 1) // 0 is every half frame
ssb_frame_periodicity = 1 << (ssb_period -1);
if (!(frameP%ssb_frame_periodicity) &&
((slotP<(slots_per_frame>>1)) || (ssb_period == 0))) {
if (!(frameP % ssb_frame_periodicity) && ((slotP < (slots_per_frame >> 1)) || (ssb_period == 0))) {
// schedule SSB only for given frames according to SSB periodicity
// and in first half frame unless periodicity of 5ms
int rel_slot;
if (ssb_period == 0) // scheduling every half frame
rel_slot = slotP%(slots_per_frame>>1);
rel_slot = slotP % (slots_per_frame >> 1);
else
rel_slot = slotP;
@@ -171,21 +172,20 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
const BIT_STRING_t *mediumBitmap = &scc->ssb_PositionsInBurst->choice.mediumBitmap;
const BIT_STRING_t *longBitmap = &scc->ssb_PositionsInBurst->choice.longBitmap;
uint16_t ssb_start_symbol;
const int n_slots_frame = nr_slots_per_frame[scs];
switch (scc->ssb_PositionsInBurst->present) {
case 1:
// short bitmap (<3GHz) max 4 SSBs
for (int i_ssb = 0; i_ssb < 4; i_ssb++) {
if ((shortBitmap->buf[0] >> (7 - i_ssb)) & 0x01) {
ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
uint16_t ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
// if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters
if ((ssb_start_symbol / 14) == rel_slot){
NR_beam_alloc_t beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, i_ssb, n_slots_frame);
if ((ssb_start_symbol / 14) == rel_slot) {
int beam_index = get_fapi_beamforming_index(gNB, i_ssb);
NR_beam_alloc_t beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, beam_index, n_slots_frame);
AssertFatal(beam.idx >= 0, "Cannot allocate SSB %d in any available beam\n", i_ssb);
const int prb_offset = offset_pointa >> scs;
schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, mib_pdu);
schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, beam_index, ssbSubcarrierOffset, offset_pointa, mib_pdu);
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset, ssb_start_symbol, CC_id, beam.idx);
if (get_softmodem_params()->sa == 1) {
get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[i_ssb],
@@ -210,13 +210,14 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
// medium bitmap (<6GHz) max 8 SSBs
for (int i_ssb = 0; i_ssb < 8; i_ssb++) {
if ((mediumBitmap->buf[0] >> (7 - i_ssb)) & 0x01) {
ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
uint16_t ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
// if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters
if ((ssb_start_symbol / 14) == rel_slot){
NR_beam_alloc_t beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, i_ssb, n_slots_frame);
if ((ssb_start_symbol / 14) == rel_slot) {
int beam_index = get_fapi_beamforming_index(gNB, i_ssb);
NR_beam_alloc_t beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, beam_index, n_slots_frame);
AssertFatal(beam.idx >= 0, "Cannot allocate SSB %d in any available beam\n", i_ssb);
const int prb_offset = offset_pointa >> scs;
schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, mib_pdu);
schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, beam_index, ssbSubcarrierOffset, offset_pointa, mib_pdu);
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset, ssb_start_symbol, CC_id, beam.idx);
if (get_softmodem_params()->sa == 1) {
get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[i_ssb],
@@ -241,13 +242,14 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
// long bitmap FR2 max 64 SSBs
for (int i_ssb = 0; i_ssb < 64; i_ssb++) {
if ((longBitmap->buf[i_ssb / 8] >> (7 - (i_ssb % 8))) & 0x01) {
ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
uint16_t ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
// if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters
if ((ssb_start_symbol / 14) == rel_slot){
NR_beam_alloc_t beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, i_ssb, n_slots_frame);
if ((ssb_start_symbol / 14) == rel_slot) {
int beam_index = get_fapi_beamforming_index(gNB, i_ssb);
NR_beam_alloc_t beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, beam_index, n_slots_frame);
AssertFatal(beam.idx >= 0, "Cannot allocate SSB %d in any available beam\n", i_ssb);
const int prb_offset = offset_pointa >> (scs-2); // reference 60kHz
schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, mib_pdu);
schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, beam_index, ssbSubcarrierOffset, offset_pointa, mib_pdu);
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset >> (scs - 2), ssb_start_symbol, CC_id, beam.idx);
if (get_softmodem_params()->sa == 1) {
get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[i_ssb],
@@ -493,7 +495,8 @@ static void nr_fill_nfapi_dl_SIB_pdu(int Mod_idP,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
uint32_t TBS,
int StartSymbolIndex,
int NrOfSymbols)
int NrOfSymbols,
int beam_index)
{
// will set data according to SIB type (SIB1/OtherSI)
NR_sched_pdsch_t *pdsch = (sched_ctrlCommon ? &sched_ctrlCommon->sched_pdsch : &sched_osi->sched_pdsch);
@@ -526,11 +529,11 @@ static void nr_fill_nfapi_dl_SIB_pdu(int Mod_idP,
dl_req->nPDUs += 1;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
pdsch_pdu_rel15->precodingAndBeamforming.num_prgs=0;
pdsch_pdu_rel15->precodingAndBeamforming.prg_size=0;
pdsch_pdu_rel15->precodingAndBeamforming.dig_bf_interfaces=0;
pdsch_pdu_rel15->precodingAndBeamforming.num_prgs = 0;
pdsch_pdu_rel15->precodingAndBeamforming.prg_size = 0;
pdsch_pdu_rel15->precodingAndBeamforming.dig_bf_interfaces = 1;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = 0;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = beam_index;
pdcch_pdu_rel15->CoreSetType = NFAPI_NR_CSET_CONFIG_MIB_SIB1;
@@ -538,7 +541,7 @@ static void nr_fill_nfapi_dl_SIB_pdu(int Mod_idP,
pdsch_pdu_rel15->rnti = SI_RNTI;
pdsch_pdu_rel15->pduIndex = pdu_index;
pdsch_pdu_rel15->BWPSize = type0_PDCCH_CSS_config->num_rbs;
pdsch_pdu_rel15->BWPSize = type0_PDCCH_CSS_config->num_rbs;
pdsch_pdu_rel15->BWPStart = type0_PDCCH_CSS_config->cset_start_rb;
pdsch_pdu_rel15->SubcarrierSpacing = type0_PDCCH_CSS_config->scs_pdcch;
@@ -592,6 +595,12 @@ static void nr_fill_nfapi_dl_SIB_pdu(int Mod_idP,
dci_pdu->beta_PDCCH_1_0 = 0;
dci_pdu->powerControlOffsetSS = 1;
dci_pdu->precodingAndBeamforming.num_prgs = 0;
dci_pdu->precodingAndBeamforming.prg_size = 0;
dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 1;
dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = beam_index;
/* DCI payload */
dci_pdu_rel15_t dci_payload;
memset(&dci_payload, 0, sizeof(dci_pdu_rel15_t));
@@ -692,7 +701,8 @@ void schedule_nr_sib1(module_id_t module_idP,
(type0_PDCCH_CSS_config->active == true)) {
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
NR_beam_alloc_t beam = beam_allocation_procedure(&gNB_mac->beam_info, frameP, slotP, i, n_slots_frame);
int beam_index = get_fapi_beamforming_index(gNB_mac, i);
NR_beam_alloc_t beam = beam_allocation_procedure(&gNB_mac->beam_info, frameP, slotP, beam_index, n_slots_frame);
AssertFatal(beam.idx >= 0, "Cannot allocate SIB1 corresponding to SSB %d in any available beam\n", i);
LOG_D(NR_MAC,"(%d.%d) SIB1 transmission: ssb_index %d\n", frameP, slotP, type0_PDCCH_CSS_config->ssb_index);
@@ -729,7 +739,8 @@ void schedule_nr_sib1(module_id_t module_idP,
type0_PDCCH_CSS_config,
TBS,
tda_info.startSymbolIndex,
tda_info.nrOfSymbols);
tda_info.nrOfSymbols,
beam_index);
const int ntx_req = TX_req->Number_of_PDUs;
nfapi_nr_pdu_t *tx_req = &TX_req->pdu_list[ntx_req];
@@ -829,7 +840,7 @@ void schedule_nr_sib19(module_id_t module_idP,
}
const int window_length = 10;
for (int i=0; i<L_max; i++) {
for (int i = 0; i < L_max; i++) {
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = &gNB_mac->type0_PDCCH_CSS_config[i];
if(((frameP - 1) % frame == 0) &&
@@ -837,7 +848,8 @@ void schedule_nr_sib19(module_id_t module_idP,
(type0_PDCCH_CSS_config->num_rbs > 0)) {
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
NR_beam_alloc_t beam = beam_allocation_procedure(&gNB_mac->beam_info, frameP, slotP, i, n_slots_frame);
int beam_index = get_fapi_beamforming_index(gNB_mac, i);
NR_beam_alloc_t beam = beam_allocation_procedure(&gNB_mac->beam_info, frameP, slotP, beam_index, n_slots_frame);
AssertFatal(beam.idx >= 0, "Cannot allocate SIB19 corresponding to SSB %d in any available beam\n", i);
LOG_D(NR_MAC,"(%d.%d) SIB19 transmission: ssb_index %d\n", frameP, slotP, type0_PDCCH_CSS_config->ssb_index);
@@ -873,7 +885,8 @@ void schedule_nr_sib19(module_id_t module_idP,
type0_PDCCH_CSS_config,
TBS,
tda_info.startSymbolIndex,
tda_info.nrOfSymbols);
tda_info.nrOfSymbols,
beam_index);
const int ntx_req = TX_req->Number_of_PDUs;
nfapi_nr_pdu_t *tx_req = &TX_req->pdu_list[ntx_req];
@@ -901,4 +914,4 @@ void schedule_nr_sib19(module_id_t module_idP,
T_BUFFER(sib19_bcch_pdu, sib19_bcch_length));
}
}
}
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+2 -2
View File
@@ -1136,7 +1136,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
pdsch_pdu->precodingAndBeamforming.prg_size = pdsch_pdu->rbSize;
pdsch_pdu->precodingAndBeamforming.dig_bf_interfaces = 0;
pdsch_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = sched_pdsch->pm_index;
pdsch_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = 0;
pdsch_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
// TBS_LBRM according to section 5.4.2.1 of 38.212
// TODO: verify the case where maxMIMO_Layers is NULL, in which case
// in principle maxMIMO_layers should be given by the maximum number of layers
@@ -1196,7 +1196,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_pdu->precodingAndBeamforming.prg_size = 0;
dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 0;
dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = 0;
dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
/* DCI payload */
dci_pdu_rel15_t dci_payload;
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+47 -16
View File
@@ -797,10 +797,12 @@ void config_uldci(const NR_UE_ServingCell_Info_t *sc_info,
dci_pdu_rel15->rv = pusch_pdu->pusch_data.rv_index;
dci_pdu_rel15->harq_pid.val = pusch_pdu->pusch_data.harq_process_id;
dci_pdu_rel15->tpc = tpc;
NR_PUSCH_Config_t *pusch_Config = ul_bwp->pusch_Config;
if (pusch_Config) AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1,
"Only frequency resource allocation type 1 is currently supported\n");
NR_PUSCH_Config_t *pusch_Config = ul_bwp->pusch_Config;
if (pusch_Config)
AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1,
"Only frequency resource allocation type 1 is currently supported\n");
switch (dci_format) {
case NR_UL_DCI_FORMAT_0_0:
dci_pdu_rel15->format_indicator = 0;
@@ -1126,18 +1128,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t *pucch_pdu,
pucch_pdu->beamforming.num_prgs = 0;
pucch_pdu->beamforming.prg_size = 0; // pucch_pdu->prb_size;
pucch_pdu->beamforming.dig_bf_interface = 0;
if (pucch_pdu->beamforming.num_prgs > 0) {
if (pucch_pdu->beamforming.prgs_list == NULL) {
pucch_pdu->beamforming.prgs_list = calloc(pucch_pdu->beamforming.num_prgs, sizeof(*pucch_pdu->beamforming.prgs_list));
}
if (pucch_pdu->beamforming.dig_bf_interface > 0) {
if (pucch_pdu->beamforming.prgs_list[0].dig_bf_interface_list == NULL) {
pucch_pdu->beamforming.prgs_list[0].dig_bf_interface_list =
calloc(pucch_pdu->beamforming.dig_bf_interface, sizeof(*pucch_pdu->beamforming.prgs_list[0].dig_bf_interface_list));
}
}
pucch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = 0;
}
pucch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
}
void set_r_pucch_parms(int rsetindex,
@@ -2423,12 +2414,14 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
AssertFatal(ra->ra_ss!=NULL,"SearchSpace cannot be null for RA\n");
ra->coreset = get_coreset(nr_mac, scc, dl_bwp, ra->ra_ss, NR_SearchSpace__searchSpaceType_PR_common);
NR_COMMON_channels_t *cc = &nr_mac->common_channels[0];
int ssb_index = cc->ssb_index[ra->beam_id];
ra->sched_pdcch = set_pdcch_structure(nr_mac,
ra->ra_ss,
ra->coreset,
scc,
&dl_genericParameters,
&nr_mac->type0_PDCCH_CSS_config[ra->beam_id]);
&nr_mac->type0_PDCCH_CSS_config[ssb_index]);
UL_BWP->dci_format = NR_UL_DCI_FORMAT_0_0;
DL_BWP->dci_format = NR_DL_DCI_FORMAT_1_0;
@@ -3114,6 +3107,44 @@ void UL_tti_req_ahead_initialization(gNB_MAC_INST *gNB, int n, int CCid, frame_t
}
}
int get_fapi_beamforming_index(gNB_MAC_INST *mac, int ssb_idx)
{
int beam_idx = mac->fapi_beam_index[ssb_idx];
AssertFatal(beam_idx >= 0, "Invalid beamforming index %d\n", beam_idx);
return beam_idx;
}
// TODO this is a placeholder for a possibly more complex function
// for now the fapi beam index is the number of SSBs transmitted before ssb_index i
void fapi_beam_index_allocation(NR_ServingCellConfigCommon_t *scc, gNB_MAC_INST *mac)
{
int len = 0;
uint8_t* buf = NULL;
switch (scc->ssb_PositionsInBurst->present) {
case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_shortBitmap:
len = 4;
buf = scc->ssb_PositionsInBurst->choice.shortBitmap.buf;
break;
case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap:
len = 8;
buf = scc->ssb_PositionsInBurst->choice.mediumBitmap.buf;
break;
case NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap:
len = 64;
buf = scc->ssb_PositionsInBurst->choice.longBitmap.buf;
break;
default :
AssertFatal(false, "Invalid configuration\n");
}
int fapi_index = 0;
for (int i = 0; i < len; ++i) {
if ((buf[i / 8] >> (7 - i % 8)) & 0x1)
mac->fapi_beam_index[i] = fapi_index++;
else
mac->fapi_beam_index[i] = -1;
}
}
static inline int get_beam_index(const NR_beam_info_t *beam_info, int frame, int slot, int beam_index, int slots_per_frame)
{
return ((frame * slots_per_frame + slot) / beam_info->beam_duration) % beam_info->beam_allocation_size;
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+11
View File
@@ -2483,6 +2483,12 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
pusch_pdu->pusch_data.tb_size = sched_pusch->tb_size;
pusch_pdu->pusch_data.num_cb = 0; //CBG not supported
// Beamforming
pusch_pdu->beamforming.num_prgs = 0;
pusch_pdu->beamforming.prg_size = 0; // bwp_size;
pusch_pdu->beamforming.dig_bf_interface = 1;
pusch_pdu->beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
pusch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(sched_pusch->tb_size<<3,sched_pusch->R);
// Calacualte the normalized tx_power for PHR
@@ -2584,6 +2590,11 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
dci_pdu->CceIndex = sched_ctrl->cce_index;
dci_pdu->beta_PDCCH_1_0 = 0;
dci_pdu->powerControlOffsetSS = 1;
dci_pdu->precodingAndBeamforming.num_prgs = 0;
dci_pdu->precodingAndBeamforming.prg_size = 0;
dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 1;
dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = UE->UE_beam_index;
dci_pdu_rel15_t uldci_payload;
memset(&uldci_payload, 0, sizeof(uldci_payload));
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+2
View File
@@ -439,6 +439,8 @@ int get_mcs_from_bler(const NR_bler_options_t *bler_options,
int ul_buffer_index(int frame, int slot, int scs, int size);
void UL_tti_req_ahead_initialization(gNB_MAC_INST *gNB, int n, int CCid, frame_t frameP, int slotP);
void fapi_beam_index_allocation(NR_ServingCellConfigCommon_t *scc, gNB_MAC_INST *mac);
int get_fapi_beamforming_index(gNB_MAC_INST *mac, int ssb_idx);
NR_beam_alloc_t beam_allocation_procedure(NR_beam_info_t *beam_info, int frame, int slot, int beam_index, int slots_per_frame);
void reset_beam_status(NR_beam_info_t *beam_info, int frame, int slot, int beam_index, int slots_per_frame, bool new_beam);
openair2/LAYER2/NR_MAC_gNB/main.c
-3
View File
@@ -315,9 +315,6 @@ void mac_top_init_gNB(ngran_node_t node_type,
du_init_f1_ue_data();
srand48(0);
// triggers also PYH initialization in case we have L1 via FAPI
nr_mac_config_scc(RC.nrmac[0], scc, config);
}
void nr_mac_send_f1_setup_req(void)
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+4 -2
View File
@@ -100,7 +100,6 @@
#define MAX_NUM_OF_SSB 64
#define MAX_NUM_NR_PRACH_PREAMBLES 64
#define MIN_NUM_PRBS_TO_SCHEDULE 5
#define MAX_NUM_BEAM_PERIODS 4
extern const uint8_t nr_rv_round_map[4];
@@ -166,6 +165,9 @@ typedef struct nr_mac_config_t {
nr_mac_timers_t timer_config;
int num_dlharq;
int num_ulharq;
/// beamforming weight matrix size
int nb_bfw[2];
int32_t *bw_list;
} nr_mac_config_t;
typedef struct NR_preamble_ue {
@@ -913,7 +915,7 @@ typedef struct gNB_MAC_INST_s {
uint8_t min_grant_mcs;
bool identity_pm;
int precoding_matrix_size[NR_MAX_NB_LAYERS];
int fapi_beam_index[MAX_NUM_OF_SSB];
nr_mac_rrc_ul_if_t mac_rrc;
f1_config_t f1_config;
int16_t frame;
radio/COMMON/common_lib.h
+1
View File
@@ -174,6 +174,7 @@ typedef struct {
} udp_ctx_t;
typedef enum {
RU_GPIO_CONTROL_NONE,
RU_GPIO_CONTROL_GENERIC,
RU_GPIO_CONTROL_INTERDIGITAL,
} gpio_control_t;
radio/USRP/README.md
-2
View File
@@ -84,8 +84,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
sdr_addrs = "addr0=192.168.10.2,addr1=192.168.20.2,clock_source=external,time_source=external"
tx_subdev ="A:0 B:0"
rx_subdev ="A:1 B:1"
radio/USRP/usrp_lib.cpp
+2
View File
@@ -313,6 +313,8 @@ static int trx_usrp_start(openair0_device *device) {
#endif
switch (device->openair0_cfg->gpio_controller) {
case RU_GPIO_CONTROL_NONE:
break;
case RU_GPIO_CONTROL_GENERIC:
trx_usrp_start_generic_gpio(device, s);
break;
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpn300.conf
-8
View File
@@ -200,14 +200,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
## beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
## beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
#bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2,second_addr=192.168.20.2";
clock_src = "external";
# if_freq = 3700000000L;
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.106PRB.usrpx300.conf
-8
View File
@@ -187,14 +187,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
## beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
## beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
#bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "type=x300";
clock_src = "internal";
# if_freq = 3700000000L;
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.24PRB.usrpx300.conf
-8
View File
@@ -187,14 +187,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
## beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
## beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
#bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "type=x300";
clock_src = "internal";
# if_freq = 3700000000L;
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.25PRB.usrpn300.conf
-8
View File
@@ -185,14 +185,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 50;
eNB_instances = [0];
## beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
## beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
#bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2,second_addr=192.168.20.2";
clock_src = "external";
# if_freq = 3700000000L;
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band66.tm1.25PRB.usrpx300.conf
-8
View File
@@ -185,14 +185,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
## beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
## beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
#bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "type=x300";
clock_src = "internal";
# if_freq = 3700000000L;
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.PTRS.usrpx300.conf
-8
View File
@@ -247,14 +247,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
## beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
## beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
#bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "type=x300";
clock_src = "external";
}
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpb210.conf
-8
View File
@@ -198,14 +198,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
## beamforming 1x2 matrix: 1 layer x 2 antennas
#bf_weights = [0x00007fff, 0x00007fff];
## beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
#bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "type=b200";
#clock_src = "external";
}
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
-10
View File
@@ -197,16 +197,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 50;
eNB_instances = [0];
## beamforming 1x2 matrix: 1 layer x 2 antennas
#bf_weights = [0x00007fff, 0x00007fff];
## beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
#bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 2x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000];
#beamforming 4x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2,second_addr=192.168.20.2";
clock_src = "external";
}
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf
-8
View File
@@ -197,14 +197,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "type=x300";
clock_src = "external";
}
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpb210.conf
-8
View File
@@ -198,14 +198,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
## beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
## beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
#bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "type=b200";
#"addr=192.168.18.207";
#"addr=192.168.10.2,mgmt_addr=192.168.10.2,second_addr=192.168.20.2";
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.24PRB.usrpn300.conf
-8
View File
@@ -198,14 +198,6 @@ RUs = (
max_pdschReferenceSignalPower = -27;
max_rxgain = 75;
eNB_instances = [0];
## beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000];
## beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
#bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2,second_addr=192.168.20.2";
clock_src = "external";
}

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