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NR UE cleanup: remove current_thread_id array, nr_tti_rx, nr_tti_tx, subframe_rx and subframe_tx

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This commit is contained in:
Thomas Schlichter
2020-11-13 17:29:02 +01:00
parent b452218383
commit 47ce347d7e
49 changed files with 873 additions and 893 deletions
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executables/nr-ue.c
+20 -20
View File
@@ -355,7 +355,7 @@ static void UE_synch(void *arg) {
void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
fapi_nr_config_request_t *cfg = &UE->nrUE_config;
int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_tti_tx);
int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_slot_tx);
uint8_t gNB_id = 0;
if (tx_slot_type == NR_UPLINK_SLOT || tx_slot_type == NR_MIXED_SLOT){
@@ -370,16 +370,16 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
ul_indication.gNB_index = gNB_id;
ul_indication.cc_id = UE->CC_id;
ul_indication.frame_rx = proc->frame_rx;
ul_indication.slot_rx = proc->nr_tti_rx;
ul_indication.slot_rx = proc->nr_slot_rx;
ul_indication.frame_tx = proc->frame_tx;
ul_indication.slot_tx = proc->nr_tti_tx;
ul_indication.slot_tx = proc->nr_slot_tx;
ul_indication.thread_id = proc->thread_id;
UE->if_inst->ul_indication(&ul_indication);
}
if (UE->mode != loop_through_memory) {
uint8_t thread_id = PHY_vars_UE_g[UE->Mod_id][0]->current_thread_id[proc->nr_tti_rx];
phy_procedures_nrUE_TX(UE,proc,0,thread_id);
phy_procedures_nrUE_TX(UE,proc,0);
}
}
}
@@ -387,7 +387,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
fapi_nr_config_request_t *cfg = &UE->nrUE_config;
int rx_slot_type = nr_ue_slot_select(cfg, proc->frame_rx, proc->nr_tti_rx);
int rx_slot_type = nr_ue_slot_select(cfg, proc->frame_rx, proc->nr_slot_rx);
uint8_t gNB_id = 0;
if (rx_slot_type == NR_DOWNLINK_SLOT || rx_slot_type == NR_MIXED_SLOT){
@@ -400,7 +400,8 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
dl_indication.gNB_index = gNB_id;
dl_indication.cc_id = UE->CC_id;
dl_indication.frame = proc->frame_rx;
dl_indication.slot = proc->nr_tti_rx;
dl_indication.slot = proc->nr_slot_rx;
dl_indication.thread_id = proc->thread_id;
UE->if_inst->dl_indication(&dl_indication, NULL);
}
@@ -411,16 +412,16 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
#else
uint64_t a=rdtsc();
phy_procedures_nrUE_RX( UE, proc, 0, UE->mode);
LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_tti_rx, (rdtsc()-a)/3500);
LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_slot_rx, (rdtsc()-a)/3500);
//printf(">>> nr_ue_pdcch_procedures ended\n");
#endif
if(IS_SOFTMODEM_NOS1){ //&& proc->nr_tti_rx==1
if(IS_SOFTMODEM_NOS1){ //&& proc->nr_slot_rx==1
//Hardcoded rnti value
protocol_ctxt_t ctxt;
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, UE->Mod_id, ENB_FLAG_NO,
0x1234, proc->frame_rx,
proc->nr_tti_rx, 0);
proc->nr_slot_rx, 0);
pdcp_run(&ctxt);
}
}
@@ -435,7 +436,8 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx;
UE->ul_indication.slot = proc->nr_slot_rx;
UE->ul_indication.thread_id = proc->thread_id;
UE->if_inst->ul_indication(&UE->ul_indication);
}
}
@@ -470,7 +472,7 @@ void UE_processing(void *arg) {
if (UE->mac_enabled == 1) {
uint8_t gNB_id = 0;
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &UE->ul_time_alignment[gNB_id];
int slot_tx = proc->nr_tti_tx;
int slot_tx = proc->nr_slot_tx;
int frame_tx = proc->frame_tx;
if (frame_tx == ul_time_alignment->ta_frame && slot_tx == ul_time_alignment->ta_slot) {
@@ -688,14 +690,12 @@ void *UE_thread(void *arg) {
processingData_t *curMsg=(processingData_t *)NotifiedFifoData(msgToPush);
curMsg->UE=UE;
// update thread index for received subframe
curMsg->UE->current_thread_id[slot_nr] = thread_idx;
curMsg->proc.CC_id = UE->CC_id;
curMsg->proc.nr_tti_rx= slot_nr;
curMsg->proc.subframe_rx=slot_nr/(nb_slot_frame/10);
curMsg->proc.nr_tti_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.subframe_tx=curMsg->proc.nr_tti_rx;
curMsg->proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = ((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.thread_id = thread_idx;
curMsg->proc.CC_id = UE->CC_id;
curMsg->proc.nr_slot_rx = slot_nr;
curMsg->proc.nr_slot_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = ((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.decoded_frame_rx=-1;
//LOG_I(PHY,"Process slot %d thread Idx %d total gain %d\n", slot_nr, thread_idx, UE->rx_total_gain_dB);
openair1/PHY/MODULATION/modulation_UE.h
+6 -4
View File
@@ -49,12 +49,14 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue,
int reset_freq_est);
int nr_slot_fep(PHY_VARS_NR_UE *phy_vars_ue,
unsigned char l,
unsigned char Ns,
int sample_offset,
int no_prefix);
UE_nr_rxtx_proc_t *proc,
unsigned char l,
unsigned char Ns,
int sample_offset,
int no_prefix);
int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
unsigned char Ns,
int sample_offset,
openair1/PHY/MODULATION/slot_fep_nr.c
+16 -14
View File
@@ -37,6 +37,7 @@
#endif*/
int nr_slot_fep(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
unsigned char Ns,
int sample_offset,
@@ -125,7 +126,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
}
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
memset(&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
rx_offset = sample_offset + slot_offset - SOFFSET;
// Align with 256 bit
@@ -157,14 +158,14 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][rx_offset % frame_length_samples],
frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
#if UE_TIMING_TRACE
start_meas(&ue->rx_dft_stats);
#endif
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
#endif
@@ -185,11 +186,11 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
}
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
@@ -206,9 +207,9 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
int symb_offset = (Ns%frame_parms->slots_per_subframe)*frame_parms->symbols_per_slot;
int32_t rot2 = ((uint32_t*)frame_parms->symbol_rotation)[symbol+symb_offset];
((int16_t*)&rot2)[1]=-((int16_t*)&rot2)[1];
rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
(int16_t*)&rot2,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
frame_parms->ofdm_symbol_size,
15);
@@ -222,6 +223,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
}
int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol,
unsigned char Ns,
int sample_offset,
@@ -310,7 +312,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
}
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
memset(&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
rx_offset = sample_offset + slot_offset - SOFFSET;
// Align with 256 bit
@@ -342,7 +344,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][rx_offset],
frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
#if UE_TIMING_TRACE
start_meas(&ue->rx_dft_stats);
@@ -350,7 +352,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][rx_offset],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
#endif
@@ -371,10 +373,10 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][rx_offset],
frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][rx_offset],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
}
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
@@ -393,9 +395,9 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
symbol+symb_offset,((int16_t*)&rot2)[0],((int16_t*)&rot2)[1]);
#endif
rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
(int16_t*)&rot2,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
frame_parms->ofdm_symbol_size,
15);
openair1/PHY/NR_REFSIG/sss_nr.h
+1 -7
View File
@@ -92,13 +92,7 @@ int pss_ch_est_nr(PHY_VARS_NR_UE *ue,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR]);
int _do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR],
uint8_t doPss, uint8_t doSss,
uint8_t subframe);
int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric, uint8_t *phase_max);
int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, uint8_t *phase_max);
#undef INIT_VARIABLES_SSS_NR_H
#undef EXTERN
openair1/PHY/NR_TRANSPORT/nr_transport_common_proto.h
+2 -2
View File
@@ -44,7 +44,7 @@
void nr_group_sequence_hopping(pucch_GroupHopping_t PUCCH_GroupHopping,
uint32_t n_id,
uint8_t n_hop,
int nr_tti_tx,
int nr_slot_tx,
uint8_t *u,
uint8_t *v);
@@ -53,7 +53,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
uint8_t mcs,
uint8_t lnormal,
uint8_t lprime,
int nr_tti_tx);
int nr_slot_tx);
/** \brief Computes available bits G. */
uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch, uint8_t nb_re_dmrs, uint16_t length_dmrs, uint8_t Qm, uint8_t Nl);
openair1/PHY/NR_TRANSPORT/nr_uci_tools_common.c
+13 -13
View File
@@ -33,11 +33,11 @@
#include "nr_dci.h"
void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
uint32_t n_id,
uint8_t n_hop,
int nr_tti_tx,
uint8_t *u,
uint8_t *v) {
uint32_t n_id,
uint8_t n_hop,
int nr_slot_tx,
uint8_t *u,
uint8_t *v) {
/*
* Implements TS 38.211 subclause 6.3.2.2.1 Group and sequence hopping
* The following variables are set by higher layers:
@@ -65,7 +65,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
*v=0;
uint32_t c_init = 0;
uint32_t x1,s; // TS 38.211 Subclause 5.2.1
int l = 32, minShift = ((2*nr_tti_tx+n_hop)<<3);
int l = 32, minShift = ((2*nr_slot_tx+n_hop)<<3);
int tmpShift =0;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_group_sequence_hopping] calculating u,v -> ");
@@ -92,7 +92,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
f_gh = f_gh%30;
f_ss = n_id%30;
/* for (int m=0; m<8; m++){
f_gh = f_gh + ((1<<m)*((uint8_t)((s>>(8*(2*nr_tti_tx+n_hop)+m))&1))); // Not sure we have to use nr_tti_tx FIXME!!!
f_gh = f_gh + ((1<<m)*((uint8_t)((s>>(8*(2*nr_slot_tx+n_hop)+m))&1))); // Not sure we have to use nr_slot_tx FIXME!!!
}
f_gh = f_gh%30;
f_ss = n_id%30;*/
@@ -102,7 +102,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
c_init = (1<<5)*floor(n_id/30)+(n_id%30); // we initialize c_init to calculate u,v
s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1
f_ss = n_id%30;
l = 32, minShift = (2*nr_tti_tx+n_hop);
l = 32, minShift = (2*nr_slot_tx+n_hop);
while(minShift >= l) {
s = lte_gold_generic(&x1, &c_init, 0);
@@ -111,7 +111,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
tmpShift = (minShift&((1<<5)-1)); //minShift%32;
*v = (uint8_t)((s>>tmpShift)&1);
// *v = (uint8_t)((s>>(2*nr_tti_tx+n_hop))&1); // Not sure we have to use nr_tti_tx FIXME!!!
// *v = (uint8_t)((s>>(2*nr_slot_tx+n_hop))&1); // Not sure we have to use nr_slot_tx FIXME!!!
}
*u = (f_gh+f_ss)%30;
@@ -125,7 +125,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
uint8_t mcs,
uint8_t lnormal,
uint8_t lprime,
int nr_tti_tx) {
int nr_slot_tx) {
/*
* Implements TS 38.211 subclause 6.3.2.2.2 Cyclic shift hopping
* - n_id: higher-layer parameter hoppingId
@@ -140,7 +140,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
uint32_t x1,s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1
uint8_t n_cs=0;
int l = 32, minShift = (14*8*nr_tti_tx )+ 8*(lnormal+lprime);
int l = 32, minShift = (14*8*nr_slot_tx )+ 8*(lnormal+lprime);
int tmpShift =0;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_cyclic_shift_hopping] calculating alpha (cyclic shift) using c_init=%u -> \n",c_init);
@@ -155,8 +155,8 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
tmpShift = (minShift&((1<<5)-1)); //minShift%32;
minShift ++;
n_cs = n_cs+((1<<m)*((uint8_t)((s>>tmpShift)&1)));
// calculating n_cs (Not sure we have to use nr_tti_tx FIXME!!!)
// n_cs = n_cs+((1<<m)*((uint8_t)((s>>((14*8*nr_tti_tx) + 8*(lnormal+lprime) + m))&1)));
// calculating n_cs (Not sure we have to use nr_slot_tx FIXME!!!)
// n_cs = n_cs+((1<<m)*((uint8_t)((s>>((14*8*nr_slot_tx) + 8*(lnormal+lprime) + m))&1)));
}
alpha = (alpha * (double)((m0+mcs+n_cs)%12));
openair1/PHY/NR_UE_ESTIMATION/nr_adjust_synch_ue.c
+2 -3
View File
@@ -103,7 +103,7 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
if (ue->mac_enabled==1) {
LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",ue->Mod_id);
//mac_resynch();
//dl_phy_sync_success(ue->Mod_id,ue->proc.proc_rxtx[0].frame_rx,0,1);//ue->common_vars.eNb_id);
//dl_phy_sync_success(ue->Mod_id,frame,0,1);//ue->common_vars.eNb_id);
ue->UE_mode[0] = PRACH;
ue->prach_resources[gNB_id]->sync_frame = frame;
ue->prach_resources[gNB_id]->init_msg1 = 0;
@@ -122,9 +122,8 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
#ifdef DEBUG_PHY
LOG_D(PHY,"AbsSubframe %d: ThreadId %d diff =%i rx_offset (final) = %i : clear %d,max_pos = %d,max_pos_fil = %d (peak %d) max_val %d target_pos %d \n",
LOG_D(PHY,"AbsSubframe %d: diff =%i rx_offset (final) = %i : clear %d,max_pos = %d,max_pos_fil = %d (peak %d) max_val %d target_pos %d \n",
subframe,
ue->current_thread_id[subframe],
diff,
ue->rx_offset,
clear,
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
+25 -21
View File
@@ -31,6 +31,7 @@
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
@@ -48,7 +49,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
uint8_t nushift;
uint8_t ssb_index=current_ssb->i_ssb;
uint8_t n_hf=current_ssb->n_hf;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
nushift = ue->frame_parms.Nid_cell%4;
ue->frame_parms.nushift = nushift;
@@ -65,7 +66,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
k = nushift;
#ifdef DEBUG_CH
printf("PBCH DMRS Correlation : ThreadId %d, eNB_offset %d , OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ue->frame_parms.ofdm_symbol_size,
printf("PBCH DMRS Correlation : ThreadId %d, eNB_offset %d , OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol);
#endif
@@ -192,6 +193,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
@@ -211,7 +213,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t nushift;
int **dl_ch_estimates =ue->pbch_vars[eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
nushift = ue->frame_parms.Nid_cell%4;
ue->frame_parms.nushift = nushift;
@@ -233,7 +235,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
k = nushift;
#ifdef DEBUG_CH
printf("PBCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
printf("PBCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol);
#endif
@@ -447,17 +449,17 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
if( dmrss == 2) // update time statistics for last PBCH symbol
{
// do ifft of channel estimate
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++)
for (p=0; p<ue->frame_parms.nb_antenna_ports_gNB; p++) {
if (ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p<<1)+aarx])
{
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d ch_offset %d\n", Ns, ue->current_thread_id[Ns], symbol, ch_offset);
idft(idftsizeidx,
(int16_t*) &ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p<<1)+aarx][ch_offset],
(int16_t*) ue->pbch_vars[eNB_offset]->dl_ch_estimates_time[(p<<1)+aarx],1);
}
}
// do ifft of channel estimate
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++)
for (p=0; p<ue->frame_parms.nb_antenna_ports_gNB; p++) {
if (ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p<<1)+aarx])
{
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d ch_offset %d\n", Ns, proc->thread_id, symbol, ch_offset);
idft(idftsizeidx,
(int16_t*) &ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p<<1)+aarx][ch_offset],
(int16_t*) ue->pbch_vars[eNB_offset]->dl_ch_estimates_time[(p<<1)+aarx],1);
}
}
}
//}
@@ -467,6 +469,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
}
int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
@@ -482,8 +485,8 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
int **dl_ch_estimates =ue->pdcch_vars[ue->current_thread_id[Ns]][eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
int **dl_ch_estimates =ue->pdcch_vars[proc->thread_id][eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
if (ue->high_speed_flag == 0) // use second channel estimate position for temporary storage
@@ -496,7 +499,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
k = coreset_start_subcarrier;
#ifdef DEBUG_PDCCH
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol);
#endif
@@ -641,6 +644,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
}
int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned short p,
@@ -659,8 +663,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **dl_ch_estimates =ue->pdsch_vars[ue->current_thread_id[Ns]][eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
int **dl_ch_estimates =ue->pdsch_vars[proc->thread_id][eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
nushift = (p>>1)&1;
ue->frame_parms.nushift = nushift;
@@ -676,7 +680,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
int re_offset = k;
#ifdef DEBUG_CH
printf("PDSCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ch_offset,symbol_offset,ue->frame_parms.ofdm_symbol_size,
printf("PDSCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ch_offset,symbol_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol);
#endif
openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h
+8 -2
View File
@@ -43,6 +43,7 @@
\param symbol symbol within frame
*/
int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
@@ -50,6 +51,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned short nb_rb_coreset);
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
@@ -57,6 +59,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
NR_UE_SSB *current_ssb);
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char symbol,
@@ -65,6 +68,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t n_hf);
int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
unsigned char Ns,
unsigned short p,
@@ -81,6 +85,7 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
short coef);
void nr_ue_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned int subframe_offset,
unsigned char N0_symbol,
unsigned char abstraction_flag,
@@ -88,8 +93,9 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
uint8_t subframe);
void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
uint8_t slot,
uint8_t abstraction_flag);
UE_nr_rxtx_proc_t *proc,
uint8_t slot,
uint8_t abstraction_flag);
void phy_adjust_gain_nr(PHY_VARS_NR_UE *ue,
uint32_t rx_power_fil_dB,
openair1/PHY/NR_UE_ESTIMATION/nr_ue_measurements.c
+10 -8
View File
@@ -107,11 +107,12 @@ float_t get_nr_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t gNB_index)
void nr_ue_measurements(PHY_VARS_NR_UE *ue,
unsigned int subframe_offset,
unsigned char N0_symbol,
unsigned char abstraction_flag,
unsigned char rank_adaptation,
uint8_t subframe)
UE_nr_rxtx_proc_t *proc,
unsigned int subframe_offset,
unsigned char N0_symbol,
unsigned char abstraction_flag,
unsigned char rank_adaptation,
uint8_t subframe)
{
int aarx,aatx,eNB_id=0; //,gain_offset=0;
//int rx_power[NUMBER_OF_CONNECTED_eNB_MAX];
@@ -131,7 +132,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
ue->measurements.nb_antennas_rx = frame_parms->nb_antennas_rx;
/*int16_t *dl_ch;
dl_ch = (int16_t *)&ue->pdsch_vars[ue->current_thread_id[subframe]][0]->dl_ch_estimates[eNB_id][ch_offset];*/
dl_ch = (int16_t *)&ue->pdsch_vars[proc->thread_id][0]->dl_ch_estimates[eNB_id][ch_offset];*/
ch_offset = ue->frame_parms.ofdm_symbol_size*2;
@@ -142,7 +143,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++) {
ue->measurements.rx_spatial_power[eNB_id][aatx][aarx] =
(signal_energy_nodc(&ue->pdsch_vars[ue->current_thread_id[subframe]][0]->dl_ch_estimates[eNB_id][ch_offset],
(signal_energy_nodc(&ue->pdsch_vars[proc->thread_id][0]->dl_ch_estimates[eNB_id][ch_offset],
(50*12)));
//- ue->measurements.n0_power[aarx];
@@ -224,6 +225,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
}
void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t slot,
uint8_t abstraction_flag)
{
@@ -234,7 +236,7 @@ void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset=0,l,nushift;
uint16_t off,nb_rb;
// NR_UE_MAC_INST_t *mac = get_mac_inst(0);
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[slot]].rxdataF;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
nushift = ue->frame_parms.Nid_cell%4;
ue->frame_parms.nushift = nushift;
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
+45 -45
View File
@@ -665,12 +665,13 @@ void pdcch_siso(NR_DL_FRAME_PARMS *frame_parms,
#ifdef NR_PDCCH_DCI_RUN
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
uint32_t frame,
uint32_t slot) {
UE_nr_rxtx_proc_t *proc) {
uint32_t frame = proc->frame_rx;
uint32_t slot = proc->nr_slot_rx;
NR_UE_COMMON *common_vars = &ue->common_vars;
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[slot]][0];
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][0];
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15;
uint8_t log2_maxh, aarx;
@@ -684,7 +685,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
for (int s=rel15->coreset.StartSymbolIndex; s<(rel15->coreset.StartSymbolIndex+rel15->coreset.duration); s++) {
LOG_D(PHY,"in nr_pdcch_extract_rbs_single(rxdataF -> rxdataF_ext || dl_ch_estimates -> dl_ch_estimates_ext)\n");
nr_pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[slot]].rxdataF,
nr_pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF,
pdcch_vars->dl_ch_estimates,
pdcch_vars->rxdataF_ext,
pdcch_vars->dl_ch_estimates_ext,
@@ -777,7 +778,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
#endif
void pdcch_scrambling(NR_DL_FRAME_PARMS *frame_parms,
uint8_t nr_tti_rx,
uint8_t nr_slot_rx,
uint8_t *e,
uint32_t length) {
int i;
@@ -785,7 +786,7 @@ void pdcch_scrambling(NR_DL_FRAME_PARMS *frame_parms,
uint32_t x1, x2, s=0;
reset = 1;
// x1 is set in lte_gold_generic
x2 = (nr_tti_rx<<9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.8.2
x2 = (nr_slot_rx<<9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.8.2
for (i=0; i<length; i++) {
if ((i&0x1f)==0) {
@@ -836,11 +837,10 @@ void nr_pdcch_unscrambling(int16_t *z,
#ifdef NR_PDCCH_DCI_RUN
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
int frame,
int slot,
fapi_nr_dci_indication_t *dci_ind) {
UE_nr_rxtx_proc_t *proc,
fapi_nr_dci_indication_t *dci_ind) {
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[slot]][0];
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[proc->thread_id][0];
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15;
for (int i=0;i<pdcch_vars->nb_search_space;i++) {
@@ -881,8 +881,8 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
if (crc == n_rnti) {
LOG_D(PHY,"Decoded crc %x matches rnti %x for DCI format %d\n", crc, n_rnti, rel15->dci_format_options[k]);
dci_ind->SFN = frame;
dci_ind->slot = slot;
dci_ind->SFN = proc->frame_rx;
dci_ind->slot = proc->nr_slot_rx;
dci_ind->dci_list[dci_ind->number_of_dcis].rnti = n_rnti;
dci_ind->dci_list[dci_ind->number_of_dcis].n_CCE = CCEind;
dci_ind->dci_list[dci_ind->number_of_dcis].dci_format = rel15->dci_format_options[k];
@@ -906,7 +906,7 @@ void nr_dci_decoding_procedure0(int s,
uint16_t coreset_nbr_rb,
NR_UE_PDCCH **pdcch_vars,
int do_common,
uint8_t nr_tti_rx,
uint8_t nr_slot_rx,
NR_DCI_ALLOC_t *dci_alloc,
int16_t eNB_id,
uint8_t current_thread_id,
@@ -941,7 +941,7 @@ void nr_dci_decoding_procedure0(int s,
LOG_DDD("format_found is %d \n", *format_found);
//if (mode == NO_DCI) {
// #ifdef NR_PDCCH_DCI_DEBUG
// LOG_DDD("skip DCI decoding: expect no DCIs at nr_tti_rx %d in current searchSpace\n", nr_tti_rx);
// LOG_DDD("skip DCI decoding: expect no DCIs at nr_slot_rx %d in current searchSpace\n", nr_slot_rx);
// #endif
// return;
//}
@@ -975,8 +975,8 @@ void nr_dci_decoding_procedure0(int s,
// }
// if (mode == NO_DCI) {
// LOG_D(PHY, "skip DCI decoding: expect no DCIs at nr_tti_rx %d\n",
// nr_tti_rx);
// LOG_D(PHY, "skip DCI decoding: expect no DCIs at nr_slot_rx %d\n",
// nr_slot_rx);
// return;
// }
@@ -1047,7 +1047,7 @@ void nr_dci_decoding_procedure0(int s,
// compute Yk
Yk = (unsigned int) pdcch_vars[eNB_id]->crnti;
for (i = 0; i <= nr_tti_rx; i++)
for (i = 0; i <= nr_slot_rx; i++)
Yk = (Yk * A[p%3]) % 65537;
}
@@ -1316,7 +1316,7 @@ void nr_dci_decoding_procedure0(int s,
}
// store first nCCE of group for PUCCH transmission of ACK/NAK
pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
pdcch_vars[eNB_id]->nCCE[nr_slot_rx] = CCEind;
// if (crc == si_rnti) {
// dci_alloc[*dci_cnt].format = format_si;
@@ -1327,7 +1327,7 @@ void nr_dci_decoding_procedure0(int s,
// } else if (crc == ra_rnti) {
// dci_alloc[*dci_cnt].format = format_ra;
// // store first nCCE of group for PUCCH transmission of ACK/NAK
// pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
// pdcch_vars[eNB_id]->nCCE[nr_slot_rx] = CCEind;
// *dci_cnt = *dci_cnt + 1;
// } else if (crc == pdcch_vars[eNB_id]->crnti) {
@@ -1338,23 +1338,23 @@ void nr_dci_decoding_procedure0(int s,
// dci_alloc[*dci_cnt].format = format0;
// *format0_found = 1;
// *dci_cnt = *dci_cnt + 1;
// pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
// pdcch_vars[eNB_id]->nCCE[nr_slot_rx] = CCEind;
// }
// } else if (format_c == format0) { // this is a format 1A DCI
// dci_alloc[*dci_cnt].format = format1A;
// *dci_cnt = *dci_cnt + 1;
// pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
// pdcch_vars[eNB_id]->nCCE[nr_slot_rx] = CCEind;
// } else {
// // store first nCCE of group for PUCCH transmission of ACK/NAK
// if (*format_c_found == 0) {
// dci_alloc[*dci_cnt].format = format_c;
// *dci_cnt = *dci_cnt + 1;
// *format_c_found = 1;
// pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
// pdcch_vars[eNB_id]->nCCE[nr_slot_rx] = CCEind;
// }
// }
// }
//LOG_I(PHY,"DCI decoding CRNTI [format: %d, nCCE[nr_tti_rx: %d]: %d ], AggregationLevel %d \n",format_c, nr_tti_rx, pdcch_vars[eNB_id]->nCCE[nr_tti_rx],L2);
//LOG_I(PHY,"DCI decoding CRNTI [format: %d, nCCE[nr_slot_rx: %d]: %d ], AggregationLevel %d \n",format_c, nr_slot_rx, pdcch_vars[eNB_id]->nCCE[nr_slot_rx],L2);
// memcpy(&dci_alloc[*dci_cnt].dci_pdu[0],dci_decoded_output,sizeof_bytes);
switch (1 << L) {
case 1:
@@ -1421,7 +1421,7 @@ uint8_t nr_dci_decoding_procedure(int s,
NR_DCI_ALLOC_t *dci_alloc,
NR_SEARCHSPACE_TYPE_t searchSpacetype,
int16_t eNB_id,
uint8_t nr_tti_rx,
uint8_t nr_slot_rx,
uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
@@ -1429,16 +1429,16 @@ uint8_t nr_dci_decoding_procedure(int s,
format_found_t *format_found,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]) {
// uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
LOG_DD("(nr_dci_decoding_procedure) nr_tti_rx=%d n_RB_ULBWP=%d n_RB_DLBWP=%d format_found=%d\n",
nr_tti_rx,n_RB_ULBWP,n_RB_DLBWP,*format_found);
LOG_DD("(nr_dci_decoding_procedure) nr_slot_rx=%d n_RB_ULBWP=%d n_RB_DLBWP=%d format_found=%d\n",
nr_slot_rx,n_RB_ULBWP,n_RB_DLBWP,*format_found);
int do_common = (int)searchSpacetype;
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS];
crc_scrambled_t crc_scrambled_ = *crc_scrambled;
format_found_t format_found_ = *format_found;
uint8_t dci_cnt = 0, old_dci_cnt = 0;
uint32_t CCEmap0 = 0, CCEmap1 = 0, CCEmap2 = 0;
NR_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]];
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id];
NR_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_slot_rx]];
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id];
uint16_t pdcch_DMRS_scrambling_id = pdcch_vars2->coreset[p].pdcchDMRSScramblingID;
uint64_t coreset_freq_dom = pdcch_vars2->coreset[p].frequencyDomainResources;
int coreset_time_dur = pdcch_vars2->coreset[p].duration;
@@ -1452,7 +1452,7 @@ uint8_t nr_dci_decoding_procedure(int s,
coreset_nbr_rb = 6 * coreset_nbr_rb;
// coreset_time_dur,coreset_nbr_rb,
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
//uint8_t mi;// = get_mi(&ue->frame_parms, nr_tti_rx);
//uint8_t mi;// = get_mi(&ue->frame_parms, nr_slot_rx);
//uint8_t tmode = ue->transmission_mode[eNB_id];
//uint8_t frame_type = frame_parms->frame_type;
uint8_t format_0_0_1_0_size_bits = 0, format_0_0_1_0_size_bytes = 0; //FIXME
@@ -1487,7 +1487,7 @@ uint8_t nr_dci_decoding_procedure(int s,
* Possible overlap between RE for SS/PBCH blocks (described in section 10, 38.213) has not been implemented yet
* This can be implemented by setting variable 'mode = NO_DCI' when overlap occurs
*/
//dci_detect_mode_t mode = 3; //dci_detect_mode_select(&ue->frame_parms, nr_tti_rx);
//dci_detect_mode_t mode = 3; //dci_detect_mode_select(&ue->frame_parms, nr_slot_rx);
LOG_DD("searSpaceType=%d\n",do_common);
LOG_DD("%s_dci_format=%d\n",do_common?"uss":"css",css_dci_format);
@@ -1517,7 +1517,7 @@ uint8_t nr_dci_decoding_procedure(int s,
// blind decoding (Type0-PDCCH,Type0A-PDCCH,Type1-PDCCH,Type2-PDCCH)
// for format0_0 => we are NOT implementing format0_0 for common search spaces. FIXME!
// for format0_0 and format1_0, first we calculate dci pdu size
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0);
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0);
format_0_0_1_0_size_bytes = (format_0_0_1_0_size_bits%8 == 0) ? (uint8_t)floor(format_0_0_1_0_size_bits/8) : (uint8_t)(floor(format_0_0_1_0_size_bits/8) + 1);
LOG_DD("calculating dci format size for common searchSpaces with format css_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
@@ -1528,7 +1528,7 @@ uint8_t nr_dci_decoding_procedure(int s,
LOG_DD("common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<aggregationLevel));
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_slot_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_slot_rx], frame_parms,
crc_scrambled_values, aggregationLevel,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
@@ -1537,7 +1537,7 @@ uint8_t nr_dci_decoding_procedure(int s,
if (dci_cnt != old_dci_cnt) {
// we will exit the loop as we have found the DCI
aggregationLevel = 5;
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,crc_scrambled_,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,crc_scrambled_,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,
0); // after decoding dci successfully we recalculate dci pdu size with correct crc scrambled to get the right field sizes
old_dci_cnt = dci_cnt;
@@ -1552,7 +1552,7 @@ uint8_t nr_dci_decoding_procedure(int s,
// or TPC-PUSCH-RNTI, or TPC-PUCCH-RNTI, or TPC-SRS-RNTI, or C-RNTI, or CS-RNTI(s), or SP-CSI-RNTI
if (css_dci_format == cformat2_0) {
// for format2_0, first we calculate dci pdu size
format_2_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_sfi_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,4);
format_2_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,_sfi_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,4);
format_2_0_size_bytes = (format_2_0_size_bits%8 == 0) ? (uint8_t)floor(format_2_0_size_bits/8) : (uint8_t)(floor(format_2_0_size_bits/8) + 1);
LOG_DD("calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_0_size_bits=%d, format2_0_size_bytes=%d\n",
css_dci_format,format_2_0_size_bits,format_2_0_size_bytes);
@@ -1562,7 +1562,7 @@ uint8_t nr_dci_decoding_procedure(int s,
css_dci_format,(1<<aggregationLevelSFI));
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_slot_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_slot_rx], frame_parms,
crc_scrambled_values, aggregationLevelSFI,
cformat2_0, uformat0_0_and_1_0,
format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
@@ -1582,7 +1582,7 @@ uint8_t nr_dci_decoding_procedure(int s,
if (css_dci_format == cformat2_1) {
// for format2_1, first we calculate dci pdu size
format_2_1_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_int_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,5);
format_2_1_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,_int_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,5);
format_2_1_size_bytes = (format_2_1_size_bits%8 == 0) ? (uint8_t)floor(format_2_1_size_bits/8) : (uint8_t)(floor(format_2_1_size_bits/8) + 1);
LOG_DD("calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_1_size_bits=%d, format2_1_size_bytes=%d\n",
css_dci_format,format_2_1_size_bits,format_2_1_size_bytes);
@@ -1592,7 +1592,7 @@ uint8_t nr_dci_decoding_procedure(int s,
css_dci_format,(1<<aggregationLevel));
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_slot_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_slot_rx], frame_parms,
crc_scrambled_values, aggregationLevel,
cformat2_1, uformat0_0_and_1_0,
format_2_1_size_bits, format_2_1_size_bytes, &dci_cnt,
@@ -1612,7 +1612,7 @@ uint8_t nr_dci_decoding_procedure(int s,
if (css_dci_format == cformat2_2) {
// for format2_2, first we calculate dci pdu size
format_2_2_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_tpc_pucch_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,6);
format_2_2_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,_tpc_pucch_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,6);
format_2_2_size_bytes = (format_2_2_size_bits%8 == 0) ? (uint8_t)floor(format_2_2_size_bits/8) : (uint8_t)(floor(format_2_2_size_bits/8) + 1);
LOG_DD("calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_2_size_bits=%d, format2_2_size_bytes=%d\n",
css_dci_format,format_2_2_size_bits,format_2_2_size_bytes);
@@ -1622,7 +1622,7 @@ uint8_t nr_dci_decoding_procedure(int s,
css_dci_format,(1<<aggregationLevel));
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_slot_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_slot_rx], frame_parms,
crc_scrambled_values, aggregationLevel,
cformat2_2, uformat0_0_and_1_0,
format_2_2_size_bits, format_2_2_size_bytes, &dci_cnt,
@@ -1642,7 +1642,7 @@ uint8_t nr_dci_decoding_procedure(int s,
if (css_dci_format == cformat2_3) {
// for format2_1, first we calculate dci pdu size
format_2_3_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_tpc_srs_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,7);
format_2_3_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,_tpc_srs_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,7);
format_2_3_size_bytes = (format_2_3_size_bits%8 == 0) ? (uint8_t)floor(format_2_3_size_bits/8) : (uint8_t)(floor(format_2_3_size_bits/8) + 1);
LOG_DD("calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_3_size_bits=%d, format2_3_size_bytes=%d\n",
css_dci_format,format_2_3_size_bits,format_2_3_size_bytes);
@@ -1652,7 +1652,7 @@ uint8_t nr_dci_decoding_procedure(int s,
css_dci_format,(1<<aggregationLevel));
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_slot_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_slot_rx], frame_parms,
crc_scrambled_values, aggregationLevel,
cformat2_3, uformat0_0_and_1_0,
format_2_3_size_bits, format_2_3_size_bytes, &dci_cnt,
@@ -1673,7 +1673,7 @@ uint8_t nr_dci_decoding_procedure(int s,
// UE-specific search space for a DCI format with CRC scrambled by C-RNTI, or CS-RNTI(s), or SP-CSI-RNTI
if (uss_dci_format == uformat0_0_and_1_0) {
// for format0_0 and format1_0, first we calculate dci pdu size
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0);
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0);
format_0_0_1_0_size_bytes = (format_0_0_1_0_size_bits%8 == 0) ? (uint8_t)floor(format_0_0_1_0_size_bits/8) : (uint8_t)(floor(format_0_0_1_0_size_bits/8) + 1);
LOG_DD("calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
@@ -1684,7 +1684,7 @@ uint8_t nr_dci_decoding_procedure(int s,
LOG_DD("common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<aggregationLevel));
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_slot_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_slot_rx], frame_parms,
crc_scrambled_values, aggregationLevel,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
@@ -1704,7 +1704,7 @@ uint8_t nr_dci_decoding_procedure(int s,
if (uss_dci_format == uformat0_1_and_1_1) {
// for format0_0 and format1_0, first we calculate dci pdu size
format_0_1_1_1_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,1);
format_0_1_1_1_size_bits = nr_dci_format_size(ue,eNB_id,nr_slot_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,1);
format_0_1_1_1_size_bytes = (format_0_1_1_1_size_bits%8 == 0) ? (uint8_t)floor(format_0_1_1_1_size_bits/8) : (uint8_t)(floor(format_0_1_1_1_size_bits/8) + 1);
LOG_DD("calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format_0_1_1_1_size_bits=%d, format_0_1_1_1_size_bytes=%d\n",
css_dci_format,format_0_1_1_1_size_bits,format_0_1_1_1_size_bytes);
@@ -1715,7 +1715,7 @@ uint8_t nr_dci_decoding_procedure(int s,
LOG_DD("common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
css_dci_format,(1<<aggregationLevel));
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_slot_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_slot_rx], frame_parms,
crc_scrambled_values, aggregationLevel,
cformat0_0_and_1_0, uformat0_1_and_1_1,
format_0_1_1_1_size_bits, format_0_1_1_1_size_bytes, &dci_cnt,
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
+50 -47
View File
@@ -218,16 +218,18 @@ void nr_dlsch_unscrambling(int16_t* llr,
}
uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag)
UE_nr_rxtx_proc_t *proc,
int eNB_id,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_slot_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag)
{
#if UE_TIMING_TRACE
@@ -296,14 +298,14 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
return(dlsch->max_ldpc_iterations + 1);
}
/*if (nr_tti_rx> (frame_parms->slots_per_subframe-1)) {
printf("dlsch_decoding.c: Illegal subframe index %d\n",nr_tti_rx);
/*if (nr_slot_rx> (frame_parms->slots_per_frame-1)) {
printf("dlsch_decoding.c: Illegal slot index %d\n",nr_slot_rx);
return(dlsch->max_ldpc_iterations + 1);
}*/
/*if (harq_process->harq_ack.ack != 2) {
LOG_D(PHY, "[UE %d] DLSCH @ SF%d : ACK bit is %d instead of DTX even before PDSCH is decoded!\n",
phy_vars_ue->Mod_id, nr_tti_rx, harq_process->harq_ack.ack);
phy_vars_ue->Mod_id, nr_slot_rx, harq_process->harq_ack.ack);
}*/
// nb_rb = dlsch->nb_rb;
@@ -314,7 +316,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
return(max_ldpc_iterations + 1);
}*/
/*harq_pid = dlsch->current_harq_pid[phy_vars_ue->current_thread_id[subframe]];
/*harq_pid = dlsch->current_harq_pid[proc->thread_id];
if (harq_pid >= 8) {
printf("dlsch_decoding.c: Illegal harq_pid %d\n",harq_pid);
return(max_ldpc_iterations + 1);
@@ -551,7 +553,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
start_meas(dlsch_turbo_decoding_stats);
#endif
//LOG_E(PHY,"AbsSubframe %d.%d Start LDPC segment %d/%d A %d ",frame%1024,nr_tti_rx,r,harq_process->C-1, A);
//LOG_E(PHY,"AbsSubframe %d.%d Start LDPC segment %d/%d A %d ",frame%1024,nr_slot_rx,r,harq_process->C-1, A);
//printf("harq process dr iteration %d\n", p_decParams->numMaxIter);
@@ -644,7 +646,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if ((err_flag == 0) && (ret>=(1+dlsch->max_ldpc_iterations))) {// a Code segment is in error so break;
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_tti_rx,r,harq_process->C-1);
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
err_flag = 1;
}
}
@@ -652,14 +654,14 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if (err_flag == 1) {
//#if UE_DEBUG_TRACE
LOG_D(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_tti_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
phy_vars_ue->Mod_id, frame, nr_slot_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
//#endif
harq_process->harq_ack.ack = 0;
harq_process->harq_ack.harq_id = harq_pid;
harq_process->harq_ack.send_harq_status = 1;
harq_process->errors[harq_process->round]++;
// printf("Rate: [UE %d] DLSCH: Setting NACK for slot %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->round);
// printf("Rate: [UE %d] DLSCH: Setting NACK for slot %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->round);
if (harq_process->round >= dlsch->Mlimit) {
harq_process->status = SCH_IDLE;
harq_process->round = 0;
@@ -667,15 +669,15 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if(is_crnti)
{
LOG_D(PHY,"[UE %d] DLSCH: Setting NACK for nr_tti_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mdlharq,harq_process->TBS);
LOG_D(PHY,"[UE %d] DLSCH: Setting NACK for nr_slot_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mdlharq,harq_process->TBS);
}
return((1 + dlsch->max_ldpc_iterations));
} else {
//#if UE_DEBUG_TRACE
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb, harq_process->round);
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_slot_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb, harq_process->round);
//#endif
harq_process->status = SCH_IDLE;
@@ -689,7 +691,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if(is_crnti)
{
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->round,harq_process->TBS);
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_slot_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->round,harq_process->TBS);
}
//LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
@@ -758,7 +760,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint8_t nr_slot_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag)
@@ -835,14 +837,14 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
return(dlsch->max_ldpc_iterations);
}
/* if (nr_tti_rx> (frame_parms->slots_per_subframe-1)) {
printf("dlsch_decoding.c: Illegal subframe index %d\n",nr_tti_rx);
/* if (nr_slot_rx> (frame_parms->slots_per_frame-1)) {
printf("dlsch_decoding.c: Illegal slot index %d\n",nr_slot_rx);
return(dlsch->max_ldpc_iterations);
}
if (dlsch->harq_ack[nr_tti_rx].ack != 2) {
if (dlsch->harq_ack[nr_slot_rx].ack != 2) {
LOG_D(PHY, "[UE %d] DLSCH @ SF%d : ACK bit is %d instead of DTX even before PDSCH is decoded!\n",
phy_vars_ue->Mod_id, nr_tti_rx, dlsch->harq_ack[nr_tti_rx].ack);
phy_vars_ue->Mod_id, nr_slot_rx, dlsch->harq_ack[nr_slot_rx].ack);
}*/
/*
@@ -851,7 +853,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
return(max_ldpc_iterations);
}*/
/*harq_pid = dlsch->current_harq_pid[phy_vars_ue->current_thread_id[subframe]];
/*harq_pid = dlsch->current_harq_pid[proc->thread_id];
if (harq_pid >= 8) {
printf("dlsch_decoding.c: Illegal harq_pid %d\n",harq_pid);
return(max_ldpc_iterations);
@@ -979,15 +981,16 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
memset(&curMsg->proc, 0, sizeof(curMsg->proc));
curMsg->proc.frame_rx = proc->frame_rx;
curMsg->proc.nr_tti_rx = proc->nr_tti_rx;
curMsg->proc.num_seg = nb_seg;
curMsg->proc.frame_rx = proc->frame_rx;
curMsg->proc.nr_slot_rx = proc->nr_slot_rx;
curMsg->proc.thread_id = proc->thread_id;
curMsg->proc.num_seg = nb_seg;
curMsg->proc.eNB_id= eNB_id;
curMsg->proc.harq_pid=harq_pid;
curMsg->proc.llr8_flag = llr8_flag;
msgToPush_dl->key= (nr_tti_rx%2) ? (nb_seg+30): nb_seg;
msgToPush_dl->key= (nr_slot_rx%2) ? (nb_seg+30): nb_seg;
pushTpool(Tpool_dl, msgToPush_dl);
/*Qm= harq_process->Qm;
@@ -1141,7 +1144,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
#if UE_TIMING_TRACE
start_meas(dlsch_turbo_decoding_stats);
#endif
LOG_D(PHY,"mthread AbsSubframe %d.%d Start LDPC segment %d/%d \n",frame%1024,nr_tti_rx,r,harq_process->C-1);
LOG_D(PHY,"mthread AbsSubframe %d.%d Start LDPC segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
/*for (int cnt =0; cnt < (kc-2)*p_decParams->Z; cnt++){
inv_d[cnt] = (1)*harq_process->d[r][cnt];
@@ -1233,7 +1236,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
if ((err_flag == 0) && (ret>=(1+dlsch->max_ldpc_iterations))) {// a Code segment is in error so break;
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_tti_rx,r,harq_process->C-1);
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
err_flag = 1;
}
//} //loop r
@@ -1241,7 +1244,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
if (err_flag == 1) {
#if UE_DEBUG_TRACE
LOG_D(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_tti_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
phy_vars_ue->Mod_id, frame, nr_slot_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
#endif
harq_process->harq_ack.ack = 0;
harq_process->harq_ack.harq_id = harq_pid;
@@ -1257,15 +1260,15 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
}
if(is_crnti)
{
LOG_D(PHY,"[UE %d] DLSCH: Setting NACK for nr_tti_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mlimit,harq_process->TBS);
LOG_D(PHY,"[UE %d] DLSCH: Setting NACK for nr_slot_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mlimit,harq_process->TBS);
}
return((1+dlsch->max_ldpc_iterations));
} else {
#if UE_DEBUG_TRACE
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb);
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_slot_rx %d TBS %d mcs %d nb_rb %d\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb);
#endif
harq_process->status = SCH_IDLE;
@@ -1278,7 +1281,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
if(is_crnti)
{
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->round,harq_process->TBS);
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_slot_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->round,harq_process->TBS);
}
//LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
@@ -1377,7 +1380,7 @@ void nr_dlsch_decoding_process(void *arg)
__m128i *pl = (__m128i*)&l;
proc->instance_cnt_dlsch_td=-1;
//proc->nr_tti_rx=proc->sub_frame_start;
//proc->nr_slot_rx = proc->sub_frame_start * frame_parms->slots_per_subframe;
proc->decoder_thread_available = 1;
@@ -1401,16 +1404,16 @@ void nr_dlsch_decoding_process(void *arg)
int harq_pid = proc->harq_pid;
llr8_flag1 = proc->llr8_flag;
int frame = proc->frame_rx;
int slot = proc->nr_tti_rx;
int slot = proc->nr_slot_rx;
r = proc->num_seg;
NR_UE_DLSCH_t *dlsch = phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[slot]][eNB_id][0];
NR_UE_DLSCH_t *dlsch = phy_vars_ue->dlsch[proc->thread_id][eNB_id][0];
NR_DL_UE_HARQ_t *harq_process = dlsch->harq_processes[harq_pid];
short *dlsch_llr = phy_vars_ue->pdsch_vars[phy_vars_ue->current_thread_id[slot]][eNB_id]->llr[0];
short *dlsch_llr = phy_vars_ue->pdsch_vars[proc->thread_id][eNB_id]->llr[0];
//printf("2thread0 llr flag %d tdp flag %d\n",llr8_flag1, tdp->llr8_flag);
p_nrLDPC_procBuf = harq_process->p_nrLDPC_procBuf[r];
nb_symb_sch = harq_process->nb_symbols;
printf("dlsch decoding process frame %d slot %d segment %d r %u nb symb %d \n", frame, proc->nr_tti_rx, proc->num_seg, r, harq_process->nb_symbols);
printf("dlsch decoding process frame %d slot %d segment %d r %u nb symb %d \n", frame, proc->nr_slot_rx, proc->num_seg, r, harq_process->nb_symbols);
/*
@@ -1419,7 +1422,7 @@ void nr_dlsch_decoding_process(void *arg)
return(max_ldpc_iterations);
}*/
/*harq_pid = dlsch->current_harq_pid[phy_vars_ue->current_thread_id[subframe]];
/*harq_pid = dlsch->current_harq_pid[proc->thread_id];
if (harq_pid >= 8) {
printf("dlsch_decoding.c: Illegal harq_pid %d\n",harq_pid);
return(max_ldpc_iterations);
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
+99 -98
View File
@@ -100,16 +100,17 @@ static void nr_dlsch_layer_demapping(int16_t **llr_cw,
int16_t **llr_layers);
int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
PDSCH_t type,
unsigned char eNB_id,
unsigned char eNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference
uint32_t frame,
uint8_t nr_tti_rx,
unsigned char symbol,
unsigned char first_symbol_flag,
RX_type_t rx_type,
unsigned char i_mod,
unsigned char harq_pid)
UE_nr_rxtx_proc_t *proc,
PDSCH_t type,
unsigned char eNB_id,
unsigned char eNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference
uint32_t frame,
uint8_t nr_slot_rx,
unsigned char symbol,
unsigned char first_symbol_flag,
RX_type_t rx_type,
unsigned char i_mod,
unsigned char harq_pid)
{
NR_UE_COMMON *common_vars = &ue->common_vars;
@@ -157,36 +158,36 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
switch (type) {
case SI_PDSCH:
pdsch_vars = ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]];
pdsch_vars = ue->pdsch_vars[proc->thread_id];
dlsch = &ue->dlsch_SI[eNB_id];
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
break;
case RA_PDSCH:
pdsch_vars = ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]];
pdsch_vars = ue->pdsch_vars[proc->thread_id];
dlsch = &ue->dlsch_ra[eNB_id];
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
break;
case PDSCH:
pdsch_vars = ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]];
dlsch = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id];
pdsch_vars = ue->pdsch_vars[proc->thread_id];
dlsch = ue->dlsch[proc->thread_id][eNB_id];
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
dlsch1_harq = dlsch[1]->harq_processes[harq_pid];
beamforming_mode = ue->transmission_mode[eNB_id] < 7 ? 0 :ue->transmission_mode[eNB_id];
break;
default:
LOG_E(PHY, "[UE][FATAL] nr_tti_rx %d: Unknown PDSCH format %d\n", nr_tti_rx, type);
LOG_E(PHY, "[UE][FATAL] nr_slot_rx %d: Unknown PDSCH format %d\n", nr_slot_rx, type);
return -1;
break;
}
if (dlsch0_harq && dlsch1_harq){
LOG_D(PHY,"AbsSubframe %d.%d / Sym %d harq_pid %d, harq status %d.%d \n", frame, nr_tti_rx, symbol, harq_pid, dlsch0_harq->status, dlsch1_harq->status);
LOG_D(PHY,"AbsSubframe %d.%d / Sym %d harq_pid %d, harq status %d.%d \n", frame, nr_slot_rx, symbol, harq_pid, dlsch0_harq->status, dlsch1_harq->status);
if ((dlsch0_harq->status == ACTIVE) && (dlsch1_harq->status == ACTIVE)){
codeword_TB0 = dlsch0_harq->codeword;
@@ -220,7 +221,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
return -1;
} else {
LOG_E(PHY,"[UE][FATAL] nr_tti_rx %d: no active DLSCH\n", nr_tti_rx);
LOG_E(PHY,"[UE][FATAL] nr_slot_rx %d: no active DLSCH\n", nr_slot_rx);
return(-1);
}
} else if (dlsch0_harq) {
@@ -232,7 +233,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
printf("[DEMOD] I am assuming only TB0 is active\n");
#endif
} else {
LOG_E(PHY,"[UE][FATAL] nr_tti_rx %d: no active DLSCH\n", nr_tti_rx);
LOG_E(PHY,"[UE][FATAL] nr_slot_rx %d: no active DLSCH\n", nr_slot_rx);
return (-1);
}
} else {
@@ -312,9 +313,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#endif
nb_rb = nr_dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
nb_rb = nr_dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF,
pdsch_vars[eNB_id]->dl_ch_estimates,
pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
@@ -324,7 +325,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pilots,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
nr_slot_rx,
ue->high_speed_flag,
frame_parms,
dlsch0_harq->mimo_mode);
@@ -337,7 +338,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
if (rx_type >= rx_IC_single_stream) {
if (eNB_id_i<ue->n_connected_eNB) // we are in TM5
nb_rb = nr_dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
nb_rb = nr_dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF,
pdsch_vars[eNB_id]->dl_ch_estimates,
pdsch_vars[eNB_id_i]->rxdataF_ext,
pdsch_vars[eNB_id_i]->dl_ch_estimates_ext,
@@ -347,12 +348,12 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pilots,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
nr_slot_rx,
ue->high_speed_flag,
frame_parms,
dlsch0_harq->mimo_mode);
else
nb_rb = nr_dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
nb_rb = nr_dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF,
pdsch_vars[eNB_id]->dl_ch_estimates,
pdsch_vars[eNB_id_i]->rxdataF_ext,
pdsch_vars[eNB_id_i]->dl_ch_estimates_ext,
@@ -362,14 +363,14 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pilots,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
nr_slot_rx,
ue->high_speed_flag,
frame_parms,
dlsch0_harq->mimo_mode);
}
} else if (beamforming_mode==0) { //else if nb_antennas_ports_gNB==1 && beamforming_mode == 0
//printf("start nr dlsch extract nr_tti_rx %d thread id %d \n", nr_tti_rx, ue->current_thread_id[nr_tti_rx]);
nb_rb = nr_dlsch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
//printf("start nr dlsch extract nr_slot_rx %d thread id %d \n", nr_slot_rx, proc->thread_id);
nb_rb = nr_dlsch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF,
pdsch_vars[eNB_id]->dl_ch_estimates,
pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
@@ -379,7 +380,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pilots,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
nr_slot_rx,
ue->high_speed_flag,
frame_parms);
@@ -396,18 +397,18 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
len = (pilots==1)? (nb_rb*6):(nb_rb*12);
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_tti_rx,slot,symbol,ue->high_speed_flag,type,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
frame,nr_slot_rx,slot,symbol,ue->high_speed_flag,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",
frame,nr_tti_rx,slot,symbol,ue->high_speed_flag,type,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
frame,nr_slot_rx,slot,symbol,ue->high_speed_flag,type,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#endif
n_tx = frame_parms->nb_antenna_ports_gNB;
n_rx = frame_parms->nb_antennas_rx;
@@ -420,16 +421,16 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
nb_rb);
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_tti_rx,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_tti_rx,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#endif
if (first_symbol_flag==1) {
if (beamforming_mode==0){
@@ -470,7 +471,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
//#ifdef UE_DEBUG_TRACE
LOG_D(PHY,"[DLSCH] AbsSubframe %d.%d log2_maxh = %d [log2_maxh0 %d log2_maxh1 %d] (%d,%d)\n",
frame%1024,nr_tti_rx, pdsch_vars[eNB_id]->log2_maxh,
frame%1024,nr_slot_rx, pdsch_vars[eNB_id]->log2_maxh,
pdsch_vars[eNB_id]->log2_maxh0,
pdsch_vars[eNB_id]->log2_maxh1,
avg[0],avgs);
@@ -493,23 +494,23 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#if T_TRACER
if (type == PDSCH)
{
T(T_UE_PHY_PDSCH_ENERGY, T_INT(eNB_id), T_INT(0), T_INT(frame%1024), T_INT(nr_tti_rx),
T(T_UE_PHY_PDSCH_ENERGY, T_INT(eNB_id), T_INT(0), T_INT(frame%1024), T_INT(nr_slot_rx),
T_INT(avg[0]), T_INT(avg[1]), T_INT(avg[2]), T_INT(avg[3]));
}
#endif
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_tti_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
printf("[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_tti_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#endif
// Now channel compensation
if (dlsch0_harq->mimo_mode<NR_DUALSTREAM) {
@@ -612,16 +613,16 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n",frame,nr_tti_rx,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,proc->channel_level,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
printf("[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n",frame,nr_slot_rx,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,proc->channel_level,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n",frame,nr_tti_rx,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,proc->channel_level,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n",frame,nr_slot_rx,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,proc->channel_level,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
#endif
// MRC
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#endif
if (frame_parms->nb_antennas_rx > 1) {
@@ -657,17 +658,17 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_tti_rx,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
printf("[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_tti_rx,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
start_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#endif
//printf("LLR dlsch0_harq->Qm %d rx_type %d cw0 %d cw1 %d symbol %d \n",dlsch0_harq->Qm,rx_type,codeword_TB0,codeword_TB1,symbol);
// compute LLRs
@@ -735,7 +736,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->layer_llr[0],
symbol,len,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_qpsk_qpsk_llr(frame_parms,
@@ -744,7 +745,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->layer_llr[1],
symbol,len,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
@@ -756,7 +757,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->layer_llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_16qam_qpsk_llr(frame_parms,
@@ -766,7 +767,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->layer_llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
@@ -778,7 +779,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->layer_llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_64qam_qpsk_llr(frame_parms,
@@ -788,7 +789,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->layer_llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
@@ -821,7 +822,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->layer_llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_qpsk_16qam_llr(frame_parms,
@@ -831,7 +832,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->layer_llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
@@ -844,7 +845,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->layer_llr[0],
symbol,len,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_16qam_16qam_llr(frame_parms,
@@ -855,7 +856,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->layer_llr[1],
symbol,len,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
@@ -868,7 +869,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->layer_llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_64qam_16qam_llr(frame_parms,
@@ -879,7 +880,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->layer_llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
@@ -914,7 +915,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->layer_llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_qpsk_64qam_llr(frame_parms,
@@ -924,7 +925,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->layer_llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
@@ -937,7 +938,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->layer_llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_16qam_64qam_llr(frame_parms,
@@ -948,7 +949,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->layer_llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
@@ -961,7 +962,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
(int16_t*)pllr_symbol_layer0,
symbol,len,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr_offset[symbol]);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_64qam_64qam_llr(frame_parms,
@@ -972,7 +973,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pllr_symbol_layer1,
symbol,len,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr_offset[symbol]);
}
}
@@ -1041,11 +1042,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
printf("[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_tti_rx,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
printf("[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_tti_rx,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
LOG_I(PHY, "[AbsSFN %u.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,slot,symbol,ue->generic_stat_bis[proc->thread_id][slot].p_time/(cpuf*1000.0));
#endif
#endif
@@ -1054,30 +1055,30 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
char filename[40];
uint8_t aa = 0;
snprintf(filename, 40, "rxdataF0_symb_%d_nr_tti_rx_%d.m", symbol, nr_tti_rx);
write_output(filename, "rxdataF0", &common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF[0][0], NR_SYMBOLS_PER_SLOT*frame_parms->ofdm_symbol_size, 1, 1);
snprintf(filename, 40, "rxdataF0_symb_%d_nr_slot_rx_%d.m", symbol, nr_slot_rx);
write_output(filename, "rxdataF0", &common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[0][0], NR_SYMBOLS_PER_SLOT*frame_parms->ofdm_symbol_size, 1, 1);
snprintf(filename, 40, "dl_ch_estimates0%d_symb_%d_nr_tti_rx_%d.m", aa, symbol, nr_tti_rx);
snprintf(filename, 40, "dl_ch_estimates0%d_symb_%d_nr_slot_rx_%d.m", aa, symbol, nr_slot_rx);
write_output(filename, "dl_ch_estimates", &pdsch_vars[eNB_id]->dl_ch_estimates[aa][0], NR_SYMBOLS_PER_SLOT*frame_parms->ofdm_symbol_size, 1, 1);
snprintf(filename, 40, "rxdataF_ext0%d_symb_%d_nr_tti_rx_%d.m", aa, symbol, nr_tti_rx);
snprintf(filename, 40, "rxdataF_ext0%d_symb_%d_nr_slot_rx_%d.m", aa, symbol, nr_slot_rx);
write_output(filename, "rxdataF_ext", &pdsch_vars[eNB_id]->rxdataF_ext[aa][0], NR_SYMBOLS_PER_SLOT*frame_parms->N_RB_DL*NR_NB_SC_PER_RB, 1, 1);
snprintf(filename, 40, "dl_ch_estimates_ext0%d_symb_%d_nr_tti_rx_%d.m", aa, symbol, nr_tti_rx);
snprintf(filename, 40, "dl_ch_estimates_ext0%d_symb_%d_nr_slot_rx_%d.m", aa, symbol, nr_slot_rx);
write_output(filename, "dl_ch_estimates_ext00", &pdsch_vars[eNB_id]->dl_ch_estimates_ext[aa][0], NR_SYMBOLS_PER_SLOT*frame_parms->N_RB_DL*NR_NB_SC_PER_RB, 1, 1);
snprintf(filename, 40, "rxdataF_comp0%d_symb_%d_nr_tti_rx_%d.m", aa, symbol, nr_tti_rx);
snprintf(filename, 40, "rxdataF_comp0%d_symb_%d_nr_slot_rx_%d.m", aa, symbol, nr_slot_rx);
write_output(filename, "rxdataF_comp00", &pdsch_vars[eNB_id]->rxdataF_comp0[aa][0], NR_SYMBOLS_PER_SLOT*frame_parms->N_RB_DL*NR_NB_SC_PER_RB, 1, 1);
for (int i=0; i < 2; i++){
snprintf(filename, 40, "llr%d_symb_%d_nr_tti_rx_%d.m", i, symbol, nr_tti_rx);
snprintf(filename, 40, "llr%d_symb_%d_nr_slot_rx_%d.m", i, symbol, nr_slot_rx);
write_output(filename,"llr", &pdsch_vars[eNB_id]->llr[i][0], (NR_SYMBOLS_PER_SLOT*nb_rb*NR_NB_SC_PER_RB*dlsch1_harq->Qm) - 4*(nb_rb*4*dlsch1_harq->Qm), 1, 0);
}
#endif
#if T_TRACER
T(T_UE_PHY_PDSCH_IQ, T_INT(eNB_id), T_INT(ue->Mod_id), T_INT(frame%1024),
T_INT(nr_tti_rx), T_INT(nb_rb),
T_INT(nr_slot_rx), T_INT(nb_rb),
T_INT(frame_parms->N_RB_UL), T_INT(frame_parms->symbols_per_slot),
T_BUFFER(&pdsch_vars[eNB_id]->rxdataF_comp0[eNB_id][0],
2 * /* ulsch[UE_id]->harq_processes[harq_pid]->nb_rb */ frame_parms->N_RB_UL *12*frame_parms->symbols_per_slot*2));
@@ -2362,7 +2363,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
uint8_t pilots,
unsigned short start_rb,
unsigned short nb_rb_pdsch,
unsigned char nr_tti_rx,
unsigned char nr_slot_rx,
uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms) {
@@ -2443,7 +2444,7 @@ unsigned short nr_dlsch_extract_rbs_dual(int **rxdataF,
uint8_t pilots,
unsigned short start_rb,
unsigned short nb_rb_pdsch,
unsigned char nr_tti_rx,
unsigned char nr_slot_rx,
uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms,
MIMO_mode_t mimo_mode) {
@@ -2560,7 +2561,7 @@ static void nr_dlsch_layer_demapping(int16_t **llr_cw,
#ifdef USER_MODE
void dump_dlsch2(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t nr_tti_rx,unsigned int *coded_bits_per_codeword,int round, unsigned char harq_pid)
void dump_dlsch2(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t nr_slot_rx,unsigned int *coded_bits_per_codeword,int round, unsigned char harq_pid)
{
unsigned int nsymb = (ue->frame_parms.Ncp == 0) ? 14 : 12;
char fname[32],vname[32];
@@ -2568,50 +2569,50 @@ void dump_dlsch2(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t nr_tti_rx,unsigned int *
snprintf(fname, 32, "dlsch%d_rxF_r%d_ext0.m",eNB_id,round);
snprintf(vname, 32, "dl%d_rxF_r%d_ext0",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->rxdataF_ext[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->rxdataF_ext[0],12*N_RB_DL*nsymb,1,1);
if (ue->frame_parms.nb_antennas_rx >1) {
snprintf(fname, 32, "dlsch%d_rxF_r%d_ext1.m",eNB_id,round);
snprintf(vname, 32, "dl%d_rxF_r%d_ext1",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->rxdataF_ext[1],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->rxdataF_ext[1],12*N_RB_DL*nsymb,1,1);
}
snprintf(fname, 32, "dlsch%d_ch_r%d_ext00.m",eNB_id,round);
snprintf(vname, 32, "dl%d_ch_r%d_ext00",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_estimates_ext[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->dl_ch_estimates_ext[0],12*N_RB_DL*nsymb,1,1);
if (ue->transmission_mode[eNB_id]==7){
snprintf(fname, 32, "dlsch%d_bf_ch_r%d.m",eNB_id,round);
snprintf(vname, 32, "dl%d_bf_ch_r%d",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_bf_ch_estimates[0],512*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->dl_bf_ch_estimates[0],512*nsymb,1,1);
//write_output(fname,vname,phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_bf_ch_estimates[0],512,1,1);
snprintf(fname, 32, "dlsch%d_bf_ch_r%d_ext00.m",eNB_id,round);
snprintf(vname, 32, "dl%d_bf_ch_r%d_ext00",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_bf_ch_estimates_ext[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->dl_bf_ch_estimates_ext[0],12*N_RB_DL*nsymb,1,1);
}
if (ue->frame_parms.nb_antennas_rx == 2) {
snprintf(fname, 32, "dlsch%d_ch_r%d_ext01.m",eNB_id,round);
snprintf(vname, 32, "dl%d_ch_r%d_ext01",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_estimates_ext[1],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->dl_ch_estimates_ext[1],12*N_RB_DL*nsymb,1,1);
}
if (ue->frame_parms.nb_antenna_ports_gNB == 2) {
snprintf(fname, 32, "dlsch%d_ch_r%d_ext10.m",eNB_id,round);
snprintf(vname, 32, "dl%d_ch_r%d_ext10",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_estimates_ext[2],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->dl_ch_estimates_ext[2],12*N_RB_DL*nsymb,1,1);
if (ue->frame_parms.nb_antennas_rx == 2) {
snprintf(fname, 32, "dlsch%d_ch_r%d_ext11.m",eNB_id,round);
snprintf(vname, 32, "dl%d_ch_r%d_ext11",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_estimates_ext[3],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->dl_ch_estimates_ext[3],12*N_RB_DL*nsymb,1,1);
}
}
snprintf(fname, 32, "dlsch%d_rxF_r%d_uespec0.m",eNB_id,round);
snprintf(vname, 32, "dl%d_rxF_r%d_uespec0",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->rxdataF_uespec_pilots[0],12*N_RB_DL,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->rxdataF_uespec_pilots[0],12*N_RB_DL,1,1);
/*
write_output("dlsch%d_ch_ext01.m","dl01_ch0_ext",pdsch_vars[eNB_id]->dl_ch_estimates_ext[1],12*N_RB_DL*nsymb,1,1);
@@ -2621,31 +2622,31 @@ void dump_dlsch2(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t nr_tti_rx,unsigned int *
snprintf(fname, 32, "dlsch%d_r%d_rho.m",eNB_id,round);
snprintf(vname, 32, "dl_rho_r%d_%d",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_rho_ext[harq_pid][round][0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->dl_ch_rho_ext[harq_pid][round][0],12*N_RB_DL*nsymb,1,1);
snprintf(fname, 32, "dlsch%d_r%d_rho2.m",eNB_id,round);
snprintf(vname, 32, "dl_rho2_r%d_%d",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_rho2_ext[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->dl_ch_rho2_ext[0],12*N_RB_DL*nsymb,1,1);
snprintf(fname, 32, "dlsch%d_rxF_r%d_comp0.m",eNB_id,round);
snprintf(vname, 32, "dl%d_rxF_r%d_comp0",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->rxdataF_comp0[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->rxdataF_comp0[0],12*N_RB_DL*nsymb,1,1);
if (ue->frame_parms.nb_antenna_ports_gNB == 2) {
snprintf(fname, 32, "dlsch%d_rxF_r%d_comp1.m",eNB_id,round);
snprintf(vname, 32, "dl%d_rxF_r%d_comp1",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->rxdataF_comp1[harq_pid][round][0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->rxdataF_comp1[harq_pid][round][0],12*N_RB_DL*nsymb,1,1);
}
snprintf(fname, 32, "dlsch%d_rxF_r%d_llr.m",eNB_id,round);
snprintf(vname, 32, "dl%d_r%d_llr",eNB_id,round);
write_output(fname,vname, ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->llr[0],coded_bits_per_codeword[0],1,0);
write_output(fname,vname, ue->pdsch_vars[proc->thread_id][eNB_id]->llr[0],coded_bits_per_codeword[0],1,0);
snprintf(fname, 32, "dlsch%d_r%d_mag1.m",eNB_id,round);
snprintf(vname, 32, "dl%d_r%d_mag1",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_mag0[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->dl_ch_mag0[0],12*N_RB_DL*nsymb,1,1);
snprintf(fname, 32, "dlsch%d_r%d_mag2.m",eNB_id,round);
snprintf(vname, 32, "dl%d_r%d_mag2",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_magb0[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[proc->thread_id][eNB_id]->dl_ch_magb0[0],12*N_RB_DL*nsymb,1,1);
// printf("log2_maxh = %d\n",ue->pdsch_vars[eNB_id]->log2_maxh);
}
openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
+10 -9
View File
@@ -131,7 +131,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini
#endif
// computing correlation between received DMRS symbols and transmitted sequence for current i_ssb and n_hf
for(int i=pbch_initial_symbol; i<pbch_initial_symbol+3;i++)
nr_pbch_dmrs_correlation(ue,0,0,i,i-pbch_initial_symbol,current_ssb);
nr_pbch_dmrs_correlation(ue,proc,0,0,i,i-pbch_initial_symbol,current_ssb);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats);
#endif
@@ -155,7 +155,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini
#endif
// computing channel estimation for selected best ssb
for(int i=pbch_initial_symbol; i<pbch_initial_symbol+3;i++)
nr_pbch_channel_estimation(ue,0,0,i,i-pbch_initial_symbol,temp_ptr->i_ssb,temp_ptr->n_hf);
nr_pbch_channel_estimation(ue,proc,0,0,i,i-pbch_initial_symbol,temp_ptr->i_ssb,temp_ptr->n_hf);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats);
#endif
@@ -286,16 +286,17 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
for(int i=0; i<4;i++)
nr_slot_fep_init_sync(ue,
i,
0,
is*fp->samples_per_frame+ue->ssb_offset,
0);
proc,
i,
0,
is*fp->samples_per_frame+ue->ssb_offset,
0);
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"Calling sss detection (normal CP)\n");
#endif
rx_sss_nr(ue,&metric_tdd_ncp,&phase_tdd_ncp);
rx_sss_nr(ue, proc, &metric_tdd_ncp, &phase_tdd_ncp);
nr_gold_pbch(ue);
ret = nr_pbch_detection(proc, ue,1,mode); // start pbch detection at first symbol after pss
@@ -318,8 +319,8 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
int nb_prefix_samples0 = fp->nb_prefix_samples0;
fp->nb_prefix_samples0 = fp->nb_prefix_samples;
nr_slot_fep(ue,0, 0, ue->ssb_offset, 0, NR_PDCCH_EST);
nr_slot_fep(ue,1, 0, ue->ssb_offset, 0, NR_PDCCH_EST);
nr_slot_fep(ue, proc, 0, 0, ue->ssb_offset, 0, NR_PDCCH_EST);
nr_slot_fep(ue, proc, 1, 0, ue->ssb_offset, 0, NR_PDCCH_EST);
fp->nb_prefix_samples0 = nb_prefix_samples0;
LOG_I(PHY,"[UE %d] AUTOTEST Cell Sync : frame = %d, rx_offset %d, freq_offset %d \n",
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
+12 -10
View File
@@ -418,12 +418,11 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_PBCH *nr_ue_pbch_vars,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t eNB_id,
uint8_t gNB_id,
uint8_t i_ssb,
MIMO_mode_t mimo_mode,
uint32_t high_speed_flag) {
int Ns = proc->nr_tti_rx;
NR_UE_COMMON *nr_ue_common_vars = &ue->common_vars;
int max_h=0;
int symbol;
@@ -457,15 +456,15 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
#ifdef DEBUG_PBCH
//printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF);
//printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF);
write_output("rxdataF0_pbch.m","rxF0pbch",
&nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[0][(symbol_offset+1)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size*3,1,1);
&nr_ue_common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[0][(symbol_offset+1)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size*3,1,1);
#endif
// symbol refers to symbol within SSB. symbol_offset is the offset of the SSB wrt start of slot
for (symbol=1; symbol<4; symbol++) {
nr_pbch_extract(nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF,
nr_pbch_extract(nr_ue_common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF,
nr_ue_pbch_vars->dl_ch_estimates,
nr_ue_pbch_vars->rxdataF_ext,
nr_ue_pbch_vars->dl_ch_estimates_ext,
@@ -609,11 +608,14 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t rx_ind;
dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
dl_indication.dci_ind = NULL;
dl_indication.proc=proc;
dl_indication.module_id=0;
dl_indication.cc_id=proc->CC_id;
dl_indication.module_id = ue->Mod_id;
dl_indication.gNB_index = gNB_id;
dl_indication.cc_id = proc->CC_id;
dl_indication.frame = proc->frame_rx;
dl_indication.slot = proc->nr_slot_rx;
dl_indication.thread_id = proc->thread_id;
dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
dl_indication.dci_ind = NULL;
rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0]; //not good as it is pointing to a memory that can change
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+16 -47
View File
@@ -690,8 +690,7 @@ void dlsch_detection_mrc_TM34(NR_DL_FRAME_PARMS *frame_parms,
@param pmi_ext Extracted PMI for chosen RBs
@param rb_alloc RB allocation vector
@param symbol Symbol to extract
@param subframe Subframe number
@param vrb_type Flag to indicate distributed VRB type
@param nr_slot_rx Slot number
@param high_speed_flag
@param frame_parms Pointer to frame descriptor
*/
@@ -717,7 +716,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
uint8_t pilots,
unsigned short start_rb,
unsigned short nb_pdsch_rb,
unsigned char nr_tti_rx,
unsigned char nr_slot_rx,
uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms);
@@ -740,7 +739,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
@param pmi_ext Extracted PMI for chosen RBs
@param rb_alloc RB allocation vector
@param symbol Symbol to extract
@param subframe Subframe index
@param nr_slot_rx Slot index
@param high_speed_flag
@param frame_parms Pointer to frame descriptor
*/
@@ -754,7 +753,7 @@ unsigned short nr_dlsch_extract_rbs_dual(int **rxdataF,
uint8_t pilots,
unsigned short start_rb,
unsigned short nb_rb_pdsch,
unsigned char nr_tti_rx,
unsigned char nr_slot_rx,
uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms,
MIMO_mode_t mimo_mode);
@@ -1017,7 +1016,7 @@ void nr_dlsch_scale_channel(int32_t **dl_ch_estimates_ext,
@param lte_frame_parms Pointer to frame descriptor
@param dlsch Pointer to DLSCH descriptor
@param frame Frame number
@param subframe Subframe number
@param nr_slot_rx Slot number
@param num_pdcch_symbols Number of PDCCH symbols
@param is_crnti indicates if PDSCH belongs to a CRNTI (necessary for parallelizing decoding threads)
@param llr8_flag If 1, indicate that the 8-bit turbo decoder should be used
@@ -1025,13 +1024,15 @@ void nr_dlsch_scale_channel(int32_t **dl_ch_estimates_ext,
*/
uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
int eNB_id,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint16_t nb_symb_sch,
uint8_t nr_slot_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag);
@@ -1081,7 +1082,7 @@ uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
UE_nr_rxtx_proc_t *proc,
int eNB_id,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
@@ -1089,7 +1090,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint8_t nr_slot_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag);
@@ -1111,8 +1112,7 @@ uint32_t dlsch_decoding_emul(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t eNB_id);
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
uint32_t frame,
uint32_t slot);
UE_nr_rxtx_proc_t *proc);
/*! \brief Extract PSS and SSS resource elements
@@ -1478,25 +1478,6 @@ void nr_rf_card_config(openair0_config_t *openair0_cfg,
int freq_offset);
/*!
\brief Encoding of PUSCH/ACK/RI/ACK from 36-212.
@param a Pointer to ulsch SDU
@param frame_parms Pointer to Frame parameters
@param ulsch Pointer to ulsch descriptor
@param harq_pid HARQ process ID
@param tmode Transmission mode (1-7)
@param control_only_flag Generate PUSCH with control information only
@param Nbundled Parameter for ACK/NAK bundling (36.213 Section 7.3)
*/
uint32_t ulsch_encoding(uint8_t *a,
PHY_VARS_NR_UE *phy_vars_ue,
uint8_t harq_pid,
uint8_t eNB_id,
uint8_t subframe_rx,
uint8_t tmode,
uint8_t control_only_flag,
uint8_t Nbundled);
void print_CQI(void *o,UCI_format_t uci_format,uint8_t eNB_id,int N_RB_DL);
void fill_CQI(NR_UE_ULSCH_t *ulsch,PHY_NR_MEASUREMENTS *meas,uint8_t eNB_id, uint8_t harq_pid,int N_RB_DL, rnti_t rnti, uint8_t trans_mode,double sinr_eff);
@@ -1720,8 +1701,7 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms,
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
int frame,
int slot,
UE_nr_rxtx_proc_t *proc,
fapi_nr_dci_indication_t *dci_ind);
@@ -1737,36 +1717,25 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
@param eNB_id eNb index (Nid1) 0,1,2
@param eNB_id_i Interfering eNB index (Nid1) 0,1,2, or 3 in case of MU-MIMO IC receiver
@param frame Frame number
@param nr_tti_rx Subframe number
@param nr_slot_rx Slot number
@param symbol Symbol on which to act (within sub-frame)
@param first_symbol_flag set to 1 on first DLSCH symbol
@param rx_type. rx_type=RX_IC_single_stream will enable interference cancellation of a second stream when decoding the first stream. In case of TM1, 2, 5, and this can cancel interference from a neighbouring cell given by eNB_id_i. In case of TM5, eNB_id_i should be set to n_connected_eNB to perform multi-user interference cancellation. In case of TM3, eNB_id_i should be set to eNB_id to perform co-channel interference cancellation; this option should be used together with an interference cancellation step [...]. In case of TM3, if rx_type=RX_IC_dual_stream, both streams will be decoded by applying the IC single stream receiver twice.
@param i_mod Modulation order of the interfering stream
*/
int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
PDSCH_t type,
unsigned char eNB_id,
unsigned char eNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference
uint32_t frame,
uint8_t nr_tti_rx,
uint8_t nr_slot_rx,
unsigned char symbol,
unsigned char first_symbol_flag,
RX_type_t rx_type,
unsigned char i_mod,
unsigned char harq_pid);
uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag);
int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t subframe);
void *dlsch_thread(void *arg);
openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c
+26 -26
View File
@@ -57,14 +57,14 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
long pucch_GroupHopping,
long hoppingId,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t m0,
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch0] start function at slot(nr_tti_tx)=%d\n",nr_tti_tx);
printf("\t [nr_generate_pucch0] start function at slot(nr_slot_tx)=%d\n",nr_slot_tx);
#endif
/*
* Implement TS 38.211 Subclause 6.3.2.3.1 Sequence generation
@@ -112,8 +112,8 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
for (int l=0; l<nrofSymbols; l++) {
// if frequency hopping is enabled n_hop = 1 for second hop. Not sure frequency hopping concerns format 0. FIXME!!!
// if ((PUCCH_Frequency_Hopping == 1)&&(l == (nrofSymbols-1))) n_hop = 1;
nr_group_sequence_hopping(pucch_GroupHopping,hoppingId,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(hoppingId,m0,mcs,l,startingSymbolIndex,nr_tti_tx);
nr_group_sequence_hopping(pucch_GroupHopping,hoppingId,n_hop,nr_slot_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(hoppingId,m0,mcs,l,startingSymbolIndex,nr_slot_tx);
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch0] sequence generation \tu=%d \tv=%d \talpha=%lf \t(for symbol l=%d)\n",u,v,alpha,l);
#endif
@@ -170,7 +170,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t m0,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
@@ -179,8 +179,8 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
uint8_t timeDomainOCC,
uint8_t nr_bit) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch1] start function at slot(nr_tti_tx)=%d payload=%lu m0=%d nrofSymbols=%d startingSymbolIndex=%d startingPRB=%d startingPRB_intraSlotHopping=%d timeDomainOCC=%d nr_bit=%d\n",
nr_tti_tx,payload,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,timeDomainOCC,nr_bit);
printf("\t [nr_generate_pucch1] start function at slot(nr_slot_tx)=%d payload=%lu m0=%d nrofSymbols=%d startingSymbolIndex=%d startingPRB=%d startingPRB_intraSlotHopping=%d timeDomainOCC=%d nr_bit=%d\n",
nr_slot_tx,payload,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,timeDomainOCC,nr_bit);
#endif
/*
* Implement TS 38.211 Subclause 6.3.2.4.1 Sequence modulation
@@ -283,11 +283,11 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
if ((intraSlotFrequencyHopping == 1) && (l >= (int)floor(nrofSymbols/2))) n_hop = 1; // n_hop = 1 for second hop
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch1] entering function nr_group_sequence_hopping with n_hop=%d, nr_tti_tx=%d\n",
n_hop,nr_tti_tx);
printf("\t [nr_generate_pucch1] entering function nr_group_sequence_hopping with n_hop=%d, nr_slot_tx=%d\n",
n_hop,nr_slot_tx);
#endif
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,l,lprime,nr_tti_tx);
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_slot_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,l,lprime,nr_slot_tx);
for (int n=0; n<12; n++) {
r_u_v_alpha_delta_re[n] = (int16_t)(((((int32_t)(round(32767*cos(alpha*n))) * table_5_2_2_2_2_Re[u][n])>>15)
@@ -505,7 +505,7 @@ void nr_generate_pucch1_old(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t m0,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
@@ -514,8 +514,8 @@ void nr_generate_pucch1_old(PHY_VARS_NR_UE *ue,
uint8_t timeDomainOCC,
uint8_t nr_bit) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch1] start function at slot(nr_tti_tx)=%d payload=%d m0=%d nrofSymbols=%d startingSymbolIndex=%d startingPRB=%d startingPRB_intraSlotHopping=%d timeDomainOCC=%d nr_bit=%d\n",
nr_tti_tx,payload,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,timeDomainOCC,nr_bit);
printf("\t [nr_generate_pucch1] start function at slot(nr_slot_tx)=%d payload=%d m0=%d nrofSymbols=%d startingSymbolIndex=%d startingPRB=%d startingPRB_intraSlotHopping=%d timeDomainOCC=%d nr_bit=%d\n",
nr_slot_tx,payload,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,timeDomainOCC,nr_bit);
#endif
/*
* Implement TS 38.211 Subclause 6.3.2.4.1 Sequence modulation
@@ -603,11 +603,11 @@ void nr_generate_pucch1_old(PHY_VARS_NR_UE *ue,
// y_n contains the complex value d multiplied by the sequence r_u_v
int16_t y_n_re[12],y_n_im[12];
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch1] entering function nr_group_sequence_hopping with n_hop=%d, nr_tti_tx=%d\n",
n_hop,nr_tti_tx);
printf("\t [nr_generate_pucch1] entering function nr_group_sequence_hopping with n_hop=%d, nr_slot_tx=%d\n",
n_hop,nr_slot_tx);
#endif
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,lnormal,lprime,nr_tti_tx);
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_slot_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,lnormal,lprime,nr_slot_tx);
for (int n=0; n<12; n++) {
r_u_v_alpha_delta_re[n] = (int16_t)(((((int32_t)(round(32767*cos(alpha*n))) * table_5_2_2_2_2_Re[u][n])>>15)
@@ -806,7 +806,7 @@ inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,
int i;
uint8_t c;
// c_init=nRNTI*2^15+n_id according to TS 38.211 Subclause 6.3.2.6.1
//x2 = (rnti) + ((uint32_t)(1+nr_tti_tx)<<16)*(1+(fp->Nid_cell<<1));
//x2 = (rnti) + ((uint32_t)(1+nr_slot_tx)<<16)*(1+(fp->Nid_cell<<1));
x2 = ((rnti)<<15)+n_id;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_pucch2_3_4_scrambling] gold sequence s=%x, M_bit %d\n",s,M_bit);
@@ -960,14 +960,14 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint8_t nr_bit) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch2] start function at slot(nr_tti_tx)=%d with payload=%lu and nr_bit=%d\n",nr_tti_tx, payload, nr_bit);
printf("\t [nr_generate_pucch2] start function at slot(nr_slot_tx)=%d with payload=%lu and nr_bit=%d\n",nr_slot_tx, payload, nr_bit);
#endif
// b is the block of bits transmitted on the physical channel after payload coding
uint64_t b[16]; // limit to 1024-bit encoded length
@@ -1043,7 +1043,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
int m=0;
for (int l=0; l<nrofSymbols; l++) {
x2 = (((1<<17)*((14*nr_tti_tx) + (l+startingSymbolIndex) + 1)*((2*dmrs_scrambling_id) + 1)) + (2*dmrs_scrambling_id))%(1U<<31); // c_init calculation according to TS38.211 subclause
x2 = (((1<<17)*((14*nr_slot_tx) + (l+startingSymbolIndex) + 1)*((2*dmrs_scrambling_id) + 1)) + (2*dmrs_scrambling_id))%(1U<<31); // c_init calculation according to TS38.211 subclause
int reset = 1;
for (int ii=0; ii<=(startingPRB>>2); ii++) {
@@ -1130,7 +1130,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
@@ -1140,7 +1140,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
uint8_t occ_length_format4,
uint8_t occ_index_format4) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch3_4] start function at slot(nr_tti_tx)=%d with payload=%lu and nr_bit=%d\n", nr_tti_tx, payload, nr_bit);
printf("\t [nr_generate_pucch3_4] start function at slot(nr_slot_tx)=%d with payload=%lu and nr_bit=%d\n", nr_slot_tx, payload, nr_bit);
#endif
// b is the block of bits transmitted on the physical channel after payload coding
uint64_t b[16];
@@ -1455,7 +1455,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
for (int l=0; l<nrofSymbols; l++) {
if ((intraSlotFrequencyHopping == 1) && (l >= (int)floor(nrofSymbols/2))) n_hop = 1; // n_hop = 1 for second hop
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_slot_tx,&u,&v); // calculating u and v value
// Next we proceed to calculate base sequence for DM-RS signal, according to TS 38.211 subclause 6.4.1.33
if (nrofPRB >= 3) { // TS 38.211 subclause 5.2.2.1 (Base sequences of length 36 or larger) applies
@@ -1501,7 +1501,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
}
uint16_t j=0;
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,l,startingSymbolIndex,nr_tti_tx);
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,l,startingSymbolIndex,nr_slot_tx);
for (int rb=0; rb<nrofPRB; rb++) {
if ((intraSlotFrequencyHopping == 1) && (l<floor(nrofSymbols/2))) { // intra-slot hopping enabled, we need to calculate new offset PRB
openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h
+4 -4
View File
@@ -52,7 +52,7 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
long pucch_GroupHopping,
long hoppingId,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t m0,
uint8_t mcs,
uint8_t nrofSymbols,
@@ -64,7 +64,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t m0,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
@@ -81,7 +81,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
@@ -95,7 +95,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
openair1/PHY/NR_UE_TRANSPORT/srs_modulation_nr.c
+3 -3
View File
@@ -84,7 +84,7 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
uint32_t f_gh = 0;
SRS_Resource_t *p_SRS_Resource;
int frame_number = proc->frame_tx;
int slot_number = proc->nr_tti_tx;
int slot_number = proc->nr_slot_tx;
uint16_t n_SRS, n_SRS_cs_i;
double alpha_i;
uint8_t K_TC_p;
@@ -445,7 +445,7 @@ int ue_srs_procedure_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB
/* SRS resource configurated ? */
if (p_srs_resource != NULL) {
if (p_srs_resource_set->resourceType == periodic) {
if (is_srs_period_nr(p_srs_resource, frame_parms, proc->frame_tx, proc->nr_tti_tx) == 0) {
if (is_srs_period_nr(p_srs_resource, frame_parms, proc->frame_tx, proc->nr_slot_tx) == 0) {
generate_srs = 1;
}
}
@@ -459,7 +459,7 @@ int ue_srs_procedure_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB
if (generate_srs == 1) {
int16_t txptr = AMP;
uint16_t nsymb = (ue->frame_parms.Ncp==0) ? 14:12;
uint16_t symbol_offset = (int)ue->frame_parms.ofdm_symbol_size*((proc->nr_tti_tx*nsymb)+(nsymb-1));
uint16_t symbol_offset = (int)ue->frame_parms.ofdm_symbol_size*((proc->nr_slot_tx*nsymb)+(nsymb-1));
if (generate_srs_nr(p_srs_resource_set, frame_parms, &ue->common_vars.txdataF[eNB_id][symbol_offset], txptr, proc) == 0) {
return 0;
}
openair1/PHY/NR_UE_TRANSPORT/sss_nr.c
+9 -6
View File
@@ -314,6 +314,7 @@ int pss_ch_est_nr(PHY_VARS_NR_UE *ue,
*********************************************************************/
int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR],
uint8_t doPss, uint8_t doSss,
@@ -331,7 +332,7 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
pss_symbol = 0;
sss_symbol = SSS_SYMBOL_NB-PSS_SYMBOL_NB;
rxdataF = ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF;
rxdataF = ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
unsigned int ofdm_symbol_size = frame_parms->ofdm_symbol_size;
@@ -386,7 +387,7 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
/*******************************************************************
*
* NAME : rx_sss_nr
* NAME : pss_sss_extract_nr
*
* PARAMETERS : none
*
@@ -397,11 +398,12 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
*********************************************************************/
int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR],
uint8_t subframe)
{
return do_pss_sss_extract_nr(phy_vars_ue, pss_ext, sss_ext, 1 /* doPss */, 1 /* doSss */, subframe);
return do_pss_sss_extract_nr(phy_vars_ue, proc, pss_ext, sss_ext, 1 /* doPss */, 1 /* doSss */, subframe);
}
/*******************************************************************
@@ -417,7 +419,7 @@ int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue,
*
*********************************************************************/
int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max)
int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, uint8_t *phase_max)
{
uint8_t i;
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR];
@@ -433,6 +435,7 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max)
// pss sss extraction
pss_sss_extract_nr(ue,
proc,
pss_ext,
sss_ext,
0); /* subframe */
@@ -440,8 +443,8 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max)
#ifdef DEBUG_PLOT_SSS
write_output("rxsig0.m","rxs0",&ue->common_vars.rxdata[0][0],ue->frame_parms.samples_per_subframe,1,1);
write_output("rxdataF0_pss.m","rxF0_pss",&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[0]].rxdataF[0][0],frame_parms->ofdm_symbol_size,1,1);
write_output("rxdataF0_sss.m","rxF0_sss",&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[0]].rxdataF[0][(SSS_SYMBOL_NB-PSS_SYMBOL_NB)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
write_output("rxdataF0_pss.m","rxF0_pss",&ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF[0][0],frame_parms->ofdm_symbol_size,1,1);
write_output("rxdataF0_sss.m","rxF0_sss",&ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF[0][(SSS_SYMBOL_NB-PSS_SYMBOL_NB)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
write_output("pss_ext.m","pss_ext",pss_ext,LENGTH_PSS_NR,1,1);
#endif
openair1/PHY/defs_nr_UE.h
-3
View File
@@ -848,9 +848,6 @@ typedef struct {
/// UE FAPI indication for DCI reception
//fapi_nr_dci_indication_t dci_ind;
// point to the current rxTx thread index
uint8_t current_thread_id[NR_MAX_SLOTS_PER_FRAME];
t_nrPolar_params *polarList;
NR_UE_PDSCH *pdsch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_eNB_MAX+1]; // two RxTx Threads
NR_UE_PBCH *pbch_vars[NUMBER_OF_CONNECTED_eNB_MAX];
openair1/PHY/thread_NR_UE.h
+2 -10
View File
@@ -4,26 +4,18 @@
#include <targets/ARCH/COMMON/common_lib.h>
/// Context data structure for RX/TX portion of subframe processing
typedef struct {
/// index of the current UE RX/TX proc
int proc_id;
/// index of the current UE RX/TX thread
int thread_id;
/// Component Carrier index
uint8_t CC_id;
/// timestamp transmitted to HW
openair0_timestamp timestamp_tx;
//#ifdef UE_NR_PHY_DEMO
/// NR TTI index within subframe_tx [0 .. slots_per_subframe - 1] to act upon for transmission
int nr_tti_tx;
/// NR TTI index within subframe_rx [0 .. slots_per_subframe - 1] to act upon for reception
int nr_tti_rx;
/// NR slot index within frame_tx [0 .. slots_per_frame - 1] to act upon for transmission
int nr_slot_tx;
/// NR slot index within frame_rx [0 .. slots_per_frame - 1] to act upon for transmission
int nr_slot_rx;
//#endif
/// subframe to act upon for transmission
int subframe_tx;
/// subframe to act upon for reception
int subframe_rx;
/// frame to act upon for transmission
int frame_tx;
/// frame to act upon for reception
openair1/SCHED_NR/phy_frame_config_nr.c
+5 -5
View File
@@ -308,7 +308,7 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms) {
*
*********************************************************************/
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti) {
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_slot) {
/* for FFD all slot can be considered as an uplink */
int mu = cfg->ssb_config.scs_common.value,check_slot=0;
@@ -318,7 +318,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
if (nr_frame%2 == 0) {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
check_slot++;
}
}
@@ -330,7 +330,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
check_slot++;
}
}
@@ -342,7 +342,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
}
} else {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
check_slot++;
}
}
@@ -354,7 +354,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
check_slot++;
}
}
openair1/SCHED_NR/phy_frame_config_nr.h
+2 -2
View File
@@ -75,10 +75,10 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
/** \brief This function checks nr slot direction : downlink or uplink
* @param frame_parms NR DL Frame parameters
* @param nr_frame : frame number
* @param nr_tti : slot number
* @param nr_slot : slot number
@returns int : downlink, uplink or mixed slot type*/
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti);
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_slot);
/** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+1 -1
View File
@@ -253,7 +253,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
// if all segments are done
if (rdata->nbSegments == ulsch_harq->processedSegments) {
if (decodeSuccess) {
LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for nr_tti_rx %d TBS %d\n",
LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for slot %d TBS %d\n",
gNB->Mod_id,ulsch_harq->slot,ulsch_harq->TBS);
ulsch_harq->status = SCH_IDLE;
ulsch_harq->round = 0;
openair1/SCHED_NR_UE/defs.h
+3 -6
View File
@@ -103,14 +103,11 @@ void phy_procedures_UE_lte(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
int phy_procedures_RN_UE_RX(unsigned char last_slot, unsigned char next_slot, relaying_type_t r_type);
/*! \brief Scheduling for UE TX procedures in normal subframes.
@param phy_vars_ue Pointer to UE variables on which to act
@param ue Pointer to UE variables on which to act
@param proc Pointer to RXn-TXnp4 proc information
@param eNB_id Local id of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param mode calib/normal mode
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
*/
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id, uint8_t thread_id);
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB_id);
/*! \brief Scheduling for UE RX procedures in normal subframes.
@param ue Pointer to UE variables on which to act
@@ -306,7 +303,7 @@ int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
@param mu numerology index (0,1,2..)
*/
void nr_process_timing_advance(module_id_t Mod_id,uint8_t CC_id,uint8_t ta_command, uint8_t mu, uint16_t bwp_ul_NB_RB);
void nr_process_timing_advance_rar(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint16_t timing_advance);
void nr_process_timing_advance_rar(PHY_VARS_NR_UE *ue, int frame_rx, int nr_slot_rx, uint16_t ta_command);
unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb);
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+1 -1
View File
@@ -52,7 +52,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
int slot = scheduled_response->slot;
// Note: we have to handle the thread IDs for this. To be revisited completely.
thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot];
thread_id = scheduled_response->thread_id;
NR_UE_DLSCH_t *dlsch0 = NULL;
NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
openair1/SCHED_NR_UE/harq_nr.h
+2 -2
View File
@@ -73,12 +73,12 @@
@param nr_dci_info_extracted extracted information from dci
@param dlsch downlink context
@param ulsch uplink context
@param nr_tti_rx rx slot
@param nr_slot_rx rx slot
@param tx_offset slot offset for tx
@returns none */
void get_dci_info_for_harq(PHY_VARS_NR_UE *ue, NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted,
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t nr_tti_rx, uint8_t tx_offset);
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t nr_slot_rx, uint8_t tx_offset);
/** \brief This function configures uplink HARQ context
@param PHY_VARS_NR_UE ue context
openair1/SCHED_NR_UE/phy_frame_config_nr.h
+4 -4
View File
@@ -61,18 +61,18 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
/** \brief This function checks nr slot direction : downlink or uplink
* @param frame_parms NR DL Frame parameters
* @param nr_frame : frame number
* @param nr_tti : slot number
* @param nr_slot : slot number
@returns int : downlink or uplink */
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti);
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_slot);
/** \brief This function checks nr UE slot direction : downlink or uplink
* @param cfg : FAPI Config Request
* @param nr_frame : frame number
* @param nr_tti : slot number
* @param nr_slot : slot number
@returns int : downlink, uplink or mixed slot type */
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti);
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_slot);
/** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters
openair1/SCHED_NR_UE/phy_frame_config_nr_ue.c
+5 -5
View File
@@ -39,7 +39,7 @@
*
*********************************************************************/
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_slot) {
/* for FFD all slot can be considered as an uplink */
int mu = cfg->ssb_config.scs_common, check_slot = 0;
@@ -49,7 +49,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
if (nr_frame%2 == 0) {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
check_slot++;
}
}
@@ -61,7 +61,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
check_slot++;
}
}
@@ -73,7 +73,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
}
} else {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
check_slot++;
}
}
@@ -85,7 +85,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
check_slot++;
}
}
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+274 -279
View File
File diff suppressed because it is too large Load Diff
openair1/SCHED_NR_UE/pucch_power_control_ue_nr.c
+2 -2
View File
@@ -97,7 +97,7 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue,
G_b_f_c = 0;
}
else {
G_b_f_c = ue->dlsch[ue->current_thread_id[proc->subframe_rx]][gNB_id][0]->g_pucch;
G_b_f_c = ue->dlsch[proc->thread_id][gNB_id][0]->g_pucch;
LOG_W(PHY,"PUCCH Transmit power control command not yet implemented for NR : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (PUCCH_POWER_DEFAULT);
}
@@ -169,7 +169,7 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue,
//int K_PUCCH = 0;
if (O_ACK != 0) {
/* it assumes that PDCCH is in the first symbol of receive slot FFS TDDO NR */
//int slots_gap = (proc->nr_tti_tx > proc->nr_tti_rx ? (proc->nr_tti_tx - proc->nr_tti_rx - 1) : ((proc->nr_tti_tx + ue->frame_parms.slots_per_subframe) - proc->nr_tti_rx - 1));
//int slots_gap = (proc->nr_slot_tx > proc->nr_slot_rx ? (proc->nr_slot_tx - proc->nr_slot_rx - 1) : ((proc->nr_slot_tx + ue->frame_parms.slots_per_subframe) - proc->nr_slot_rx - 1));
//K_PUCCH = (slots_gap * (ue->frame_parms.symbols_per_tti)) - 1;
}
else {
openair1/SCHED_NR_UE/pucch_uci_ue_nr.c
+32 -32
View File
@@ -99,7 +99,7 @@ void nr_generate_pucch0(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
@@ -110,7 +110,7 @@ void nr_generate_pucch1(int32_t **txdataF,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
@@ -123,7 +123,7 @@ void nr_generate_pucch2(int32_t **txdataF,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
@@ -136,7 +136,7 @@ void nr_generate_pucch3_4(int32_t **txdataF,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
@@ -210,7 +210,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
uint64_t pucch_payload = 0;
uint32_t csi_payload = 0;
int frame_tx = proc->frame_tx;
int nr_tti_tx = proc->nr_tti_tx;
int nr_slot_tx = proc->nr_slot_tx;
int Mod_id = ue->Mod_id;
int CC_id = ue->CC_id;
@@ -241,15 +241,15 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
int subframe_number = proc->nr_slot_rx / ue->frame_parms.slots_per_subframe;
nb_pucch_format_4_in_subframes[subframe_number] = 0; /* reset pucch format 4 counter at current rx position */
int dl_harq_pid = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid;
int dl_harq_pid = ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid;
if (dl_harq_pid < ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->number_harq_processes_for_pdsch) {
if (dl_harq_pid < ue->dlsch[proc->thread_id][gNB_id][0]->number_harq_processes_for_pdsch) {
/* pucch indicator can be reseted in function get_downlink_ack so it should be get now */
pucch_resource_indicator = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid]->harq_ack.pucch_resource_indicator;
pucch_resource_indicator = ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid]->harq_ack.pucch_resource_indicator;
}
/* Part - I
* Collect feedback that should be transmitted at this nr_tti_tx :
* Collect feedback that should be transmitted at this nr_slot_tx :
* - ACK/NACK, SR, CSI (CQI, RI, ...)
*/
@@ -261,11 +261,11 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
/* sr_payload = 1 means that this is a positive SR, sr_payload = 0 means that it is a negative SR */
sr_payload = nr_ue_get_SR(Mod_id,
CC_id,
frame_tx,
gNB_id,
0,//ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
nr_tti_tx); // nr_tti_rx used for meas gap
CC_id,
frame_tx,
gNB_id,
0,//ue->pdcch_vars[proc->thread_id][gNB_id]->crnti,
nr_slot_tx); // nr_slot_rx used for meas gap
}
else {
sr_payload = 1;
@@ -287,7 +287,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
uint16_t report_slot_csi =csi_MeasConfig->csi_ReportConfigToAddModList->list.array[0]->reportConfigType.choice.periodic->reportSlotConfig.choice.slots320;
//if (mac->csirc->reportQuantity.choice.ssb_Index_RSRP){
if (report_slot_csi == proc->nr_tti_tx)
if (report_slot_csi == proc->nr_slot_tx)
csi_status = get_csi_nr(mac, ue, gNB_id, &csi_payload);
else
csi_status = 0;
@@ -301,8 +301,8 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
if(O_ACK == 0) {
N_UCI = O_SR + O_CSI;
if ((N_UCI == 0) || ((O_CSI == 0) && (sr_payload == 0))) { /* TS 38.213 9.2.4 UE procedure for reporting SR */
NR_TST_PHY_PRINTF("PUCCH No feedback AbsSubframe %d.%d \n", frame_tx%1024, nr_tti_tx);
LOG_D(PHY,"PUCCH No feedback AbsSubframe %d.%d \n", frame_tx%1024, nr_tti_tx);
NR_TST_PHY_PRINTF("PUCCH No feedback AbsSubframe %d.%d \n", frame_tx%1024, nr_slot_tx);
LOG_D(PHY,"PUCCH No feedback AbsSubframe %d.%d \n", frame_tx%1024, nr_slot_tx);
return (FALSE);
}
else {
@@ -354,7 +354,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
int occ_length = 0;
int occ_Index = 0;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid]->harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid]->harq_ack;
if (select_pucch_resource(ue, mac, gNB_id, N_UCI, pucch_resource_indicator, &initial_pucch_id, &pucch_resource_set,
&pucch_resource_id, harq_status) == TRUE) {
@@ -389,7 +389,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
if ((ue->UE_mode[gNB_id] != PUSCH) && (O_ACK > 1)) {
O_ACK = 1;
pucch_ack_payload &= 0x1; /* take only first ack */
LOG_W(PHY,"PUCCH ue is not expected to generate more than one HARQ-ACK at AbsSubframe %d.%d \n", frame_tx%1024, nr_tti_tx);
LOG_W(PHY,"PUCCH ue is not expected to generate more than one HARQ-ACK at AbsSubframe %d.%d \n", frame_tx%1024, nr_slot_tx);
}
NR_TST_PHY_PRINTF("PUCCH common configuration with index %d \n", initial_pucch_id);
}
@@ -442,7 +442,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
}
}
else {
LOG_W(PHY,"PUCCH No PUCCH resource found at AbsSubframe %d.%d \n", frame_tx%1024, nr_tti_tx);
LOG_W(PHY,"PUCCH No PUCCH resource found at AbsSubframe %d.%d \n", frame_tx%1024, nr_slot_tx);
return (FALSE);
}
@@ -490,7 +490,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
//}
nb_symbols = nb_symbols_excluding_dmrs[nb_symbols_total-4][index_additional_dmrs][index_hopping];
nb_of_prbs = 1;
subframe_number = nr_tti_tx / ue->frame_parms.slots_per_subframe;
subframe_number = nr_slot_tx / ue->frame_parms.slots_per_subframe;
nb_pucch_format_4_in_subframes[subframe_number]++; /* increment number of transmit pucch 4 in current subframe */
NR_TST_PHY_PRINTF("PUCCH Number of pucch format 4 in subframe %d is %d \n", subframe_number, nb_pucch_format_4_in_subframes[subframe_number]);
N_sc_ctrl_RB = N_SC_RB/(nb_pucch_format_4_in_subframes[subframe_number]);
@@ -595,7 +595,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
pucch_payload = pucch_payload | (csi_payload << (O_ACK + O_SR)) | (sr_payload << O_ACK) | pucch_ack_payload;
NR_TST_PHY_PRINTF("PUCCH ( AbsSubframe : %d.%d ) ( total payload size %d data 0x%02x ) ( ack length %d data 0x%02x ) ( sr length %d value %d ) ( csi length %d data : 0x%02x ) \n",
frame_tx%1024, nr_tti_tx, N_UCI, pucch_payload, O_ACK, pucch_ack_payload, O_SR, sr_payload, csi_status, csi_payload);
frame_tx%1024, nr_slot_tx, N_UCI, pucch_payload, O_ACK, pucch_ack_payload, O_SR, sr_payload, csi_status, csi_payload);
NR_TST_PHY_PRINTF("PUCCH ( format : %d ) ( modulation : %s ) ( nb prb : %d ) ( nb symbols total: %d ) ( nb symbols : %d ) ( max code rate*100 : %d ) ( starting_symbol_index : %d ) \n",
format, (Q_m == BITS_PER_SYMBOL_QPSK ? " QPSK " : " BPSK "), nb_of_prbs, nb_symbols_total, nb_symbols, max_code_rate, starting_symbol_index);
@@ -612,8 +612,8 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
O_CRC, n_HARQ_ACK);
/* set tx power */
ue->tx_power_dBm[nr_tti_tx] = pucch_tx_power;
ue->tx_total_RE[nr_tti_tx] = nb_of_prbs*N_SC_RB;
ue->tx_power_dBm[nr_slot_tx] = pucch_tx_power;
ue->tx_total_RE[nr_slot_tx] = nb_of_prbs*N_SC_RB;
int tx_amp;
@@ -635,7 +635,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
mac->ULbwp[bwp_id-1]->bwp_Common->pucch_ConfigCommon->choice.setup->pucch_GroupHopping,
mac->ULbwp[bwp_id-1]->bwp_Common->pucch_ConfigCommon->choice.setup->hoppingId[0],
tx_amp,
nr_tti_tx,
nr_slot_tx,
(uint8_t)m_0,
(uint8_t)m_CS,
nb_symbols_total,
@@ -650,7 +650,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
&ue->pucch_config_dedicated[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
(uint8_t)m_0,
nb_symbols_total,
starting_symbol_index,
@@ -671,7 +671,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
&ue->pucch_config_dedicated[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
@@ -683,14 +683,14 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
case pucch_format4_nr:
{
nr_generate_pucch3_4(ue,
0,//ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
0,//ue->pdcch_vars[proc->thread_id][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
format,
&ue->pucch_config_dedicated[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
@@ -743,7 +743,7 @@ uint8_t get_downlink_ack(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t
int number_harq_feedback = 0;
uint32_t dai_current = 0;
uint32_t dai_max = 0;
int number_pid_dl = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->number_harq_processes_for_pdsch;
int number_pid_dl = ue->dlsch[proc->thread_id][gNB_id][0]->number_harq_processes_for_pdsch;
bool two_transport_blocks = FALSE;
int number_of_code_word = 1;
int U_DAI_c = 0;
@@ -776,7 +776,7 @@ uint8_t get_downlink_ack(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t
harq_status = &ue->dlsch[thread_idx][gNB_id][code_word]->harq_processes[dl_harq_pid]->harq_ack;
/* check if current tx slot should transmit downlink acknowlegment */
if (harq_status->slot_for_feedback_ack == proc->nr_tti_tx) {
if (harq_status->slot_for_feedback_ack == proc->nr_slot_tx) {
if (harq_status->ack == DL_ACKNACK_NO_SET) {
LOG_E(PHY,"PUCCH Downlink acknowledgment has not been set : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME);
@@ -1278,7 +1278,7 @@ int trigger_periodic_scheduling_request(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_n
}
int16_t N_slot_frame = ue->frame_parms.slots_per_frame;
if (((proc->frame_tx * N_slot_frame) + proc->nr_tti_tx - SR_offset)%SR_periodicity == 0) {
if (((proc->frame_tx * N_slot_frame) + proc->nr_slot_tx - SR_offset)%SR_periodicity == 0) {
return (1);
}
else {
openair1/SIMULATION/NR_PHY/dlschsim.c
+2 -1
View File
@@ -52,6 +52,7 @@
PHY_VARS_gNB *gNB;
PHY_VARS_NR_UE *UE;
RAN_CONTEXT_t RC;
UE_nr_rxtx_proc_t proc;
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
double cpuf;
@@ -559,7 +560,7 @@ int main(int argc, char **argv)
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_DECODING0, VCD_FUNCTION_IN);
ret = nr_dlsch_decoding(UE, channel_output_fixed, &UE->frame_parms,
ret = nr_dlsch_decoding(UE, &proc, 0, channel_output_fixed, &UE->frame_parms,
dlsch0_ue, dlsch0_ue->harq_processes[0], frame, nb_symb_sch,
slot,harq_pid, is_crnti, llr8_flag);
openair1/SIMULATION/NR_PHY/dlsim.c
+16 -17
View File
@@ -686,7 +686,6 @@ int main(int argc, char **argv)
else {UE->is_synchronized = 1; UE->UE_mode[0]=PUSCH;}
UE->perfect_ce = 0;
for (i=0;i<10;i++) UE->current_thread_id[i] = 0;
if (init_nr_ue_signal(UE, 1, 0) != 0)
{
@@ -748,7 +747,7 @@ int main(int argc, char **argv)
scheduled_response.CC_id = 0;
scheduled_response.frame = frame;
scheduled_response.slot = slot;
scheduled_response.thread_id = UE_proc.thread_id;
nr_ue_phy_config_request(&UE_mac->phy_config);
NR_UE_info_t *UE_info = &RC.nrmac[0]->UE_info;
@@ -787,14 +786,14 @@ int main(int argc, char **argv)
//multipath_channel(gNB2UE,s_re,s_im,r_re,r_im,frame_length_complex_samples,0);
UE->rx_offset=0;
UE_proc.frame_rx = frame;
UE_proc.nr_tti_rx= slot;
UE_proc.subframe_rx = slot;
UE_proc.thread_id = 0;
UE_proc.frame_rx = frame;
UE_proc.nr_slot_rx = slot;
dcireq.frame = frame;
dcireq.slot = slot;
NR_UE_DLSCH_t *dlsch0 = UE->dlsch[UE->current_thread_id[UE_proc.nr_tti_rx]][0][0];
NR_UE_DLSCH_t *dlsch0 = UE->dlsch[UE_proc.thread_id][0][0];
int harq_pid = slot;
NR_DL_UE_HARQ_t *UE_harq_process = dlsch0->harq_processes[harq_pid];
@@ -953,21 +952,21 @@ int main(int argc, char **argv)
//----------------------------------------------------------
//---------------------- count errors ----------------------
//----------------------------------------------------------
if (UE->dlsch[UE->current_thread_id[slot]][0][0]->last_iteration_cnt >=
UE->dlsch[UE->current_thread_id[slot]][0][0]->max_ldpc_iterations+1)
if (UE->dlsch[UE_proc.thread_id][0][0]->last_iteration_cnt >=
UE->dlsch[UE_proc.thread_id][0][0]->max_ldpc_iterations+1)
n_errors++;
NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE->current_thread_id[UE_proc.nr_tti_rx]];
NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE_proc.thread_id];
int16_t *UE_llr = pdsch_vars[0]->llr[0];
TBS = UE_harq_process->TBS;//rel15->TBSize[0];
uint16_t length_dmrs = 1;
uint16_t nb_rb = rel15->rbSize;
uint8_t nb_re_dmrs = rel15->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4;
uint8_t mod_order = rel15->qamModOrder[0];
uint8_t nb_symb_sch = rel15->NrOfSymbols;
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, rel15->nrOfLayers);
for (i = 0; i < available_bits; i++) {
@@ -1057,9 +1056,9 @@ int main(int argc, char **argv)
printStatIndent(&UE->dlsch_unscrambling_stats,"DLSCH unscrambling time");
printStatIndent(&UE->dlsch_rate_unmatching_stats,"DLSCH Rate Unmatching");
printf("|__ DLSCH Turbo Decoding(%d bits), avg iterations: %.1f %.2f us (%d cycles, %d trials)\n",
UE->dlsch[UE->current_thread_id[subframe]][0][0]->harq_processes[0]->Cminus ?
UE->dlsch[UE->current_thread_id[subframe]][0][0]->harq_processes[0]->Kminus :
UE->dlsch[UE->current_thread_id[subframe]][0][0]->harq_processes[0]->Kplus,
UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Cminus ?
UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Kminus :
UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Kplus,
UE->dlsch_tc_intl1_stats.trials/(double)UE->dlsch_tc_init_stats.trials,
(double)UE->dlsch_turbo_decoding_stats.diff/UE->dlsch_turbo_decoding_stats.trials*timeBase,
(int)((double)UE->dlsch_turbo_decoding_stats.diff/UE->dlsch_turbo_decoding_stats.trials),
@@ -1081,7 +1080,7 @@ int main(int argc, char **argv)
LOG_M("rxsig1.m","rxs1", UE->common_vars.rxdata[1], frame_length_complex_samples, 1, 1);
LOG_M("chestF0.m","chF0",UE->pdsch_vars[0][0]->dl_ch_estimates_ext,N_RB_DL*12*14,1,1);
write_output("rxF_comp.m","rxFc",&UE->pdsch_vars[0][0]->rxdataF_comp0[0][0],N_RB_DL*12*14,1,1);
LOG_M("rxF_llr.m","rxFllr",UE->pdsch_vars[UE->current_thread_id[UE_proc.nr_tti_rx]][0]->llr[0],available_bits,1,0);
LOG_M("rxF_llr.m","rxFllr",UE->pdsch_vars[UE_proc.thread_id][0]->llr[0],available_bits,1,0);
break;
}
openair1/SIMULATION/NR_PHY/pbchsim.c
+8 -7
View File
@@ -680,6 +680,7 @@ int main(int argc, char **argv)
if (ret<0) n_errors++;
}
else {
UE_nr_rxtx_proc_t proc={0};
UE->rx_offset=0;
uint8_t ssb_index = 0;
while (!((SSB_positions >> ssb_index) & 0x01)) ssb_index++; // to select the first transmitted ssb
@@ -688,16 +689,16 @@ int main(int argc, char **argv)
int ssb_slot = (ssb_index>>1)+(n_hf*frame_parms->slots_per_frame);
for (int i=UE->symbol_offset+1; i<UE->symbol_offset+4; i++) {
nr_slot_fep(UE,
i%frame_parms->symbols_per_slot,
ssb_slot,
0,
0);
nr_slot_fep(UE,
&proc,
i%frame_parms->symbols_per_slot,
ssb_slot,
0,
0);
nr_pbch_channel_estimation(UE,0,ssb_slot,i%frame_parms->symbols_per_slot,i-(UE->symbol_offset+1),ssb_index%8,n_hf);
nr_pbch_channel_estimation(UE,&proc,0,ssb_slot,i%frame_parms->symbols_per_slot,i-(UE->symbol_offset+1),ssb_index%8,n_hf);
}
UE_nr_rxtx_proc_t proc={0};
ret = nr_rx_pbch(UE,
&proc,
openair1/SIMULATION/NR_PHY/prachsim.c
+2 -2
View File
@@ -627,8 +627,8 @@ int main(int argc, char **argv){
subframe); */ //commented for testing purpose
UE_nr_rxtx_proc_t proc={0};
proc.frame_tx = frame;
proc.nr_tti_tx = slot;
proc.frame_tx = frame;
proc.nr_slot_tx = slot;
nr_ue_prach_procedures(UE,&proc,0,0);
/* tx_lev_dB not used later, no need to set */
openair1/SIMULATION/NR_PHY/pucchsim.c
+48 -48
View File
@@ -90,7 +90,7 @@ int main(int argc, char **argv)
FILE *input_fd=NULL;
//uint8_t nacktoack_flag=0;
int16_t amp=0x7FFF;
int nr_tti_tx=0;
int nr_slot_tx=0;
uint64_t actual_payload=0,payload_received;
int nr_bit=1; // maximum value possible is 2
uint8_t m0=0;// higher layer paramater initial cyclic shift
@@ -501,13 +501,13 @@ int main(int argc, char **argv)
for (trial=0; trial<n_trials; trial++) {
bzero(txdataF[aa],frame_parms->ofdm_symbol_size*sizeof(int));
if(format==0){
nr_generate_pucch0(UE,txdataF,frame_parms,PUCCH_GroupHopping,hopping_id,amp,nr_tti_tx,m0,mcs,nrofSymbols,startingSymbolIndex,startingPRB);
nr_generate_pucch0(UE,txdataF,frame_parms,PUCCH_GroupHopping,hopping_id,amp,nr_slot_tx,m0,mcs,nrofSymbols,startingSymbolIndex,startingPRB);
}
else if (format == 1){
nr_generate_pucch1(UE,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_tti_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,0,nr_bit);
nr_generate_pucch1(UE,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_slot_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,0,nr_bit);
}
else {
nr_generate_pucch2(UE,0x1234,dmrs_scrambling_id,data_scrambling_id,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_tti_tx,nrofSymbols,startingSymbolIndex,nrofPRB,startingPRB,nr_bit);
nr_generate_pucch2(UE,0x1234,dmrs_scrambling_id,data_scrambling_id,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_slot_tx,nrofSymbols,startingSymbolIndex,nrofPRB,startingPRB,nr_bit);
}
int txlev = signal_energy(&txdataF[aa][startingSymbolIndex*frame_parms->ofdm_symbol_size],
@@ -536,21 +536,21 @@ int main(int argc, char **argv)
if (n_trials==1) printf("rxlev %d (%d dB), sigma2 %f dB, SNR %f, TX %f\n",rxlev,dB_fixed(rxlev),sigma2_dB,SNR,10*log10((double)txlev*UE->frame_parms.ofdm_symbol_size/12));
if(format==0){
nfapi_nr_uci_pucch_pdu_format_0_1_t uci_pdu;
nfapi_nr_pucch_pdu_t pucch_pdu;
pucch_pdu.subcarrier_spacing = 1;
pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1;
pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1;
pucch_pdu.bit_len_harq = nr_bit;
pucch_pdu.bit_len_csi_part1 = 0;
pucch_pdu.bit_len_csi_part2 = 0;
pucch_pdu.sr_flag = sr_flag;
pucch_pdu.nr_of_symbols = nrofSymbols;
pucch_pdu.hopping_id = hopping_id;
pucch_pdu.initial_cyclic_shift = 0;
pucch_pdu.start_symbol_index = startingSymbolIndex;
pucch_pdu.prb_start = startingPRB;
nr_decode_pucch0(gNB,nr_tti_tx,&uci_pdu,&pucch_pdu);
nfapi_nr_uci_pucch_pdu_format_0_1_t uci_pdu;
nfapi_nr_pucch_pdu_t pucch_pdu;
pucch_pdu.subcarrier_spacing = 1;
pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1;
pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1;
pucch_pdu.bit_len_harq = nr_bit;
pucch_pdu.bit_len_csi_part1 = 0;
pucch_pdu.bit_len_csi_part2 = 0;
pucch_pdu.sr_flag = sr_flag;
pucch_pdu.nr_of_symbols = nrofSymbols;
pucch_pdu.hopping_id = hopping_id;
pucch_pdu.initial_cyclic_shift = 0;
pucch_pdu.start_symbol_index = startingSymbolIndex;
pucch_pdu.prb_start = startingPRB;
nr_decode_pucch0(gNB,nr_slot_tx,&uci_pdu,&pucch_pdu);
if(sr_flag==1){
if (uci_pdu.sr->sr_indication == 0 || uci_pdu.sr->sr_confidence_level == 1)
sr_errors+=1;
@@ -565,7 +565,7 @@ int main(int argc, char **argv)
}
else if (format==1) {
nr_decode_pucch1(rxdataF,PUCCH_GroupHopping,hopping_id,
&(payload_received),frame_parms,amp,nr_tti_tx,
&(payload_received),frame_parms,amp,nr_slot_tx,
m0,nrofSymbols,startingSymbolIndex,startingPRB,
startingPRB_intraSlotHopping,timeDomainOCC,nr_bit);
if(nr_bit==1)
@@ -574,34 +574,34 @@ int main(int argc, char **argv)
ack_nack_errors+=((actual_payload^payload_received)&1) + (((actual_payload^payload_received)&2)>>1);
}
else if (format==2) {
nfapi_nr_uci_pucch_pdu_format_2_3_4_t uci_pdu;
nfapi_nr_pucch_pdu_t pucch_pdu;
pucch_pdu.rnti = 0x1234;
pucch_pdu.subcarrier_spacing = 1;
pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1;
pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1;
pucch_pdu.bit_len_csi_part1 = nr_bit;
pucch_pdu.bit_len_harq = 0;
pucch_pdu.bit_len_csi_part2 = 0;
pucch_pdu.sr_flag = 0;
pucch_pdu.nr_of_symbols = nrofSymbols;
pucch_pdu.hopping_id = hopping_id;
pucch_pdu.initial_cyclic_shift = 0;
pucch_pdu.start_symbol_index = startingSymbolIndex;
pucch_pdu.prb_size = nrofPRB;
pucch_pdu.prb_start = startingPRB;
pucch_pdu.dmrs_scrambling_id = dmrs_scrambling_id;
pucch_pdu.data_scrambling_id = data_scrambling_id;
nr_decode_pucch2(gNB,nr_tti_tx,&uci_pdu,&pucch_pdu);
int csi_part1_bytes=pucch_pdu.bit_len_csi_part1>>3;
if ((pucch_pdu.bit_len_csi_part1&7) > 0) csi_part1_bytes++;
for (int i=0;i<csi_part1_bytes;i++) {
if (uci_pdu.csi_part1.csi_part1_payload[i] != ((uint8_t*)&actual_payload)[i]) {
ack_nack_errors++;
break;
}
}
free(uci_pdu.csi_part1.csi_part1_payload);
nfapi_nr_uci_pucch_pdu_format_2_3_4_t uci_pdu;
nfapi_nr_pucch_pdu_t pucch_pdu;
pucch_pdu.rnti = 0x1234;
pucch_pdu.subcarrier_spacing = 1;
pucch_pdu.group_hop_flag = PUCCH_GroupHopping&1;
pucch_pdu.sequence_hop_flag = (PUCCH_GroupHopping>>1)&1;
pucch_pdu.bit_len_csi_part1 = nr_bit;
pucch_pdu.bit_len_harq = 0;
pucch_pdu.bit_len_csi_part2 = 0;
pucch_pdu.sr_flag = 0;
pucch_pdu.nr_of_symbols = nrofSymbols;
pucch_pdu.hopping_id = hopping_id;
pucch_pdu.initial_cyclic_shift = 0;
pucch_pdu.start_symbol_index = startingSymbolIndex;
pucch_pdu.prb_size = nrofPRB;
pucch_pdu.prb_start = startingPRB;
pucch_pdu.dmrs_scrambling_id = dmrs_scrambling_id;
pucch_pdu.data_scrambling_id = data_scrambling_id;
nr_decode_pucch2(gNB,nr_slot_tx,&uci_pdu,&pucch_pdu);
int csi_part1_bytes=pucch_pdu.bit_len_csi_part1>>3;
if ((pucch_pdu.bit_len_csi_part1&7) > 0) csi_part1_bytes++;
for (int i=0;i<csi_part1_bytes;i++) {
if (uci_pdu.csi_part1.csi_part1_payload[i] != ((uint8_t*)&actual_payload)[i]) {
ack_nack_errors++;
break;
}
}
free(uci_pdu.csi_part1.csi_part1_payload);
}
n_errors=((actual_payload^payload_received)&1)+(((actual_payload^payload_received)&2)>>1)+(((actual_payload^payload_received)&4)>>2)+n_errors;
openair1/SIMULATION/NR_PHY/ulsim.c
+4 -2
View File
@@ -833,7 +833,8 @@ int main(int argc, char **argv)
gNB->ulsch[0][0]->harq_processes[harq_pid]->round = round;
rv_index = nr_rv_round_map[round];
UE_proc.nr_tti_tx = slot;
UE_proc.thread_id = 0;
UE_proc.nr_slot_tx = slot;
UE_proc.frame_tx = frame;
UL_tti_req->SFN = frame;
@@ -904,6 +905,7 @@ int main(int argc, char **argv)
scheduled_response.CC_id = 0;
scheduled_response.frame = frame;
scheduled_response.slot = slot;
scheduled_response.thread_id = UE_proc.thread_id;
scheduled_response.dl_config = NULL;
scheduled_response.ul_config = &ul_config;
scheduled_response.tx_request = &tx_req;
@@ -959,7 +961,7 @@ int main(int argc, char **argv)
/////////////////////////phy_procedures_nr_ue_TX///////////////////////
///////////
phy_procedures_nrUE_TX(UE, &UE_proc, gNB_id, 0);
phy_procedures_nrUE_TX(UE, &UE_proc, gNB_id);
if (n_trials==1) {
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/pbch_test.c
+2 -1
View File
@@ -94,6 +94,7 @@ extern int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode);
int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int pss_sequence_number)
{
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
UE_nr_rxtx_proc_t proc = {0};
int synchro_position;
int offset;
int16_t *tmp;
@@ -130,7 +131,7 @@ int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, in
#endif
rx_sss_nr(PHY_vars_UE, &metric_fdd_ncp, &phase_fdd_ncp);
rx_sss_nr(PHY_vars_UE, &proc, &metric_fdd_ncp, &phase_fdd_ncp);
#if TEST_SYNCHRO_TIMING_PSS
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/pucch_uci_generator_test.c
+7 -7
View File
@@ -58,7 +58,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
int occ_Index = 0;
uint64_t pucch_payload = 0;
int tx_amp = 512;
int nr_tti_tx = 0;
int nr_slot_tx = 0;
int N_UCI = 0; /* size in bits for Uplink Control Information */
switch(format) {
@@ -67,7 +67,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
tx_amp,
nr_tti_tx,
nr_slot_tx,
(uint8_t)m_0,
(uint8_t)m_CS,
nb_symbols_total,
@@ -82,7 +82,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
(uint8_t)m_0,
nb_symbols_total,
starting_symbol_index,
@@ -95,13 +95,13 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
case pucch_format2_nr: {
nr_generate_pucch2(ue,
ue->pdcch_vars[ue->current_thread_id[nr_tti_tx]][gNB_id]->crnti,
ue->pdcch_vars[thread_number][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
@@ -113,14 +113,14 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
case pucch_format3_nr:
case pucch_format4_nr: {
nr_generate_pucch3_4(ue,
ue->pdcch_vars[ue->current_thread_id[nr_tti_tx]][gNB_id]->crnti,
ue->pdcch_vars[thread_number][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
format,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/pucch_uci_test.c
+32 -34
View File
@@ -169,7 +169,7 @@ int test_pucch_basic_error(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pr
printf("%s", tst_separator);
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
printf("\n => Test : No harq feedback on going\n");
@@ -180,7 +180,7 @@ int test_pucch_basic_error(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pr
}
/* set a tx slot with no ack */
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
@@ -267,7 +267,7 @@ int test_pucch_common_config_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_
common_pucch_configuration(ue, gNB_id, TST_PUCCH_COMMON_CONFIG_INDEX_OK);
/* set a tx slot with no ack */
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->ack = DL_ACK;
@@ -290,9 +290,9 @@ int test_pucch_common_config_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_
/* set a second ack on a different downlink harq process */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_SECOND;
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_SECOND;
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_SECOND].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_SECOND].harq_ack;
harq_status->n_CCE = 2;
harq_status->N_CCE = 4;
@@ -316,7 +316,7 @@ int test_pucch_common_config_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_
v_return = -1;
}
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack.ack = DL_NACK;
ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack.ack = DL_NACK;
printf("\n => Test : PUCCH format from common config in dedicated mode: two negative downlink ACKnowledgments \n");
@@ -563,9 +563,9 @@ int test_pucch_dedicated_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_id,
printf("%s", tst_separator);
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -582,9 +582,9 @@ int test_pucch_dedicated_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_id,
for (int i = 0; i < TST_NB_STEP_SINGLE_TRANSPORT_BLOCK; i++) {
/* set a tx slot with no ack */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = dl_harq_pid[i];
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = dl_harq_pid[i];
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -616,9 +616,9 @@ int test_pucch_dedicated_single_transport_block(PHY_VARS_NR_UE *ue, int gNB_id,
for (i = 1; i < TST_NB_STEP_SINGLE_TRANSPORT_BLOCK; i = i+2) {
/* set a tx slot with no ack */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = dl_harq_pid[i];
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = dl_harq_pid[i];
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -677,12 +677,12 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
for (int code_word = 0; code_word < 2; code_word++) {
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->Number_MCS_HARQ_DL_DCI = 2;
ue->dlsch[proc->thread_id][gNB_id][code_word]->Number_MCS_HARQ_DL_DCI = 2;
/* set a tx slot with no ack */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->current_harq_pid = dl_harq_pid[i];
ue->dlsch[proc->thread_id][gNB_id][code_word]->current_harq_pid = dl_harq_pid[i];
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -697,7 +697,7 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
reset_harq = TRUE;
}
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->pucch_resource_indicator = pucch_resource_indicator[i][j];
@@ -720,12 +720,12 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
for (int code_word = 0; code_word < 2; code_word++) {
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->Number_MCS_HARQ_DL_DCI = 2;
ue->dlsch[proc->thread_id][gNB_id][code_word]->Number_MCS_HARQ_DL_DCI = 2;
/* set a tx slot with no ack */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->current_harq_pid = dl_harq_pid[i];
ue->dlsch[proc->thread_id][gNB_id][code_word]->current_harq_pid = dl_harq_pid[i];
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -734,7 +734,7 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
for (int j = 0 ; j < 2; j++) {
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->pucch_resource_indicator = pucch_resource_indicator[i][j];
}
@@ -754,12 +754,12 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
for (int code_word = 0; code_word < 2; code_word++) {
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->Number_MCS_HARQ_DL_DCI = 2;
ue->dlsch[proc->thread_id][gNB_id][code_word]->Number_MCS_HARQ_DL_DCI = 2;
/* set a tx slot with no ack */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->current_harq_pid = dl_harq_pid[i];
ue->dlsch[proc->thread_id][gNB_id][code_word]->current_harq_pid = dl_harq_pid[i];
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][code_word]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -768,7 +768,7 @@ int test_pucch_dedicated_two_transport_blocks(PHY_VARS_NR_UE *ue, int gNB_id, UE
for (int j = 0 ; j < 2; j++) {
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid[i]].harq_ack;
harq_status->pucch_resource_indicator = pucch_resource_indicator[i][j];
}
@@ -935,7 +935,7 @@ int test_sr_alone_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *p
}
/* restore single transport block */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->Number_MCS_HARQ_DL_DCI = 1;
ue->dlsch[proc->thread_id][gNB_id][0]->Number_MCS_HARQ_DL_DCI = 1;
return (v_return);
}
@@ -976,9 +976,9 @@ int test_sr_ack_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pro
NR_UE_HARQ_STATUS_t *harq_status;
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -1015,9 +1015,9 @@ int test_sr_ack_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *pro
/* set a second harq ack context */
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_SECOND;
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_SECOND;
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_SECOND].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_SECOND].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -1073,7 +1073,7 @@ int test_csi_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *proc)
printf("%s", tst_separator);
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = NR_MAX_DLSCH_HARQ_PROCESSES;
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = NR_MAX_DLSCH_HARQ_PROCESSES;
set_csi_nr( 4, 0x0E );
@@ -1090,9 +1090,9 @@ int test_csi_dedicated(PHY_VARS_NR_UE *ue, int gNB_id, UE_nr_rxtx_proc_t *proc)
NR_UE_HARQ_STATUS_t *harq_status;
ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
ue->dlsch[proc->thread_id][gNB_id][0]->current_harq_pid = TST_DL_HARQ_PID_FIRST;
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[TST_DL_HARQ_PID_FIRST].harq_ack;
harq_status->slot_for_feedback_ack = proc->nr_slot_tx;
harq_status->send_harq_status = 1;
@@ -1170,11 +1170,9 @@ int test_pucch(PHY_VARS_NR_UE *ue)
proc->frame_rx = 0;
proc->nr_slot_rx = 0;
proc->nr_tti_rx = 0;
proc->frame_tx = proc->frame_rx + (proc->nr_slot_rx + NR_UE_CAPABILITY_SLOT_RX_TO_TX) / ue->frame_parms.slots_per_frame;
proc->nr_slot_tx = (proc->nr_slot_rx + NR_UE_CAPABILITY_SLOT_RX_TO_TX) % ue->frame_parms.slots_per_frame;
proc->nr_tti_tx = proc->nr_slot_tx % ue->frame_parms.slots_per_subframe;
init_pucch_power_configuration( ue, gNB_id);
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/srs_test.c
-1
View File
@@ -229,7 +229,6 @@ int test_srs_periodicity(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc)
for (int slot_tx = 0; slot_tx < frame_parms->slots_per_frame; slot_tx++) {
proc->frame_tx = frame_tx;
proc->nr_slot_tx = slot_tx;
proc->nr_tti_tx = slot_tx % frame_parms->slots_per_subframe;
if (ue_srs_procedure_nr( ue, proc, 0) == 0) {
printf("test_srs_periodicity srs at frame %d slot %d \n", frame_tx, slot_tx);
}
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/sss_test.c
+2 -1
View File
@@ -84,6 +84,7 @@
int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, NR_DL_FRAME_PARMS *frame_parms_gNB, test_t *test)
{
UE_nr_rxtx_proc_t proc = {0};
VOID_PARAMETER test;
int synchro_position;
int offset;
@@ -133,7 +134,7 @@ int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, NR
#endif
rx_sss_nr(PHY_vars_UE, &metric_fdd_ncp, &phase_fdd_ncp);
rx_sss_nr(PHY_vars_UE, &proc, &metric_fdd_ncp, &phase_fdd_ncp);
#if TEST_SYNCHRO_TIMING_PSS
openair2/LAYER2/NR_MAC_UE/mac_proto.h
+8 -5
View File
@@ -96,7 +96,8 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
@param module_id_t mod_id module ID
@param int cc_id CC ID
@param frame_t frame frame number
@param int slot reference number */
@param int slot reference number
@param UE_nr_rxtx_proc_t *proc pointer to process context */
void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
fapi_nr_dl_config_request_t *dl_config,
fapi_nr_ul_config_request_t *ul_config,
@@ -104,7 +105,8 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
module_id_t mod_id,
int cc_id,
frame_t frame,
int slot);
int slot,
int thread_id);
/* \brief Get SR payload (0,1) from UE MAC
@param Mod_id Instance id of UE in machine
@@ -211,9 +213,10 @@ and fills the PRACH PDU per each FD occasion.
@param module_idP Index of UE instance
@param frameP Frame index
@param slotP Slot index
@param thread_id RX/TX Thread ID
@returns void
*/
void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP);
void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, int thread_id);
/* \brief This function schedules the Msg3 transmission
@param
@@ -264,7 +267,7 @@ andom-access to transmit a BSR along with the C-RNTI control element (see 5.1.4
@param CC_id Component Carrier Index
@param frame
@param gNB_id gNB index
@param nr_tti_tx slot for PRACH transmission
@param nr_slot_tx slot for PRACH transmission
@returns indication to generate PRACH to phy */
uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
fapi_nr_ul_config_prach_pdu *prach_pdu,
@@ -273,7 +276,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
UE_MODE_t UE_mode,
frame_t frame,
uint8_t gNB_id,
int nr_tti_tx);
int nr_slot_tx);
/* \brief Function implementing the routine for the selection of Random Access resources (5.1.2 TS 38.321).
@param module_idP Index of UE instance
openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c
+13 -13
View File
@@ -401,7 +401,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
UE_MODE_t UE_mode,
frame_t frame,
uint8_t gNB_id,
int nr_tti_tx){
int nr_slot_tx){
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
uint8_t mac_sdus[MAX_NR_ULSCH_PAYLOAD_BYTES];
@@ -489,9 +489,9 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
}
//mac->RA_tx_frame = frame;
//mac->RA_tx_subframe = nr_tti_tx;
//mac->RA_tx_slot = nr_slot_tx;
//mac->RA_backoff_frame = frame;
//mac->RA_backoff_subframe = nr_tti_tx;
//mac->RA_backoff_slot = nr_slot_tx;
if (size_sdu > 0) {
@@ -510,7 +510,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
// Fill in preamble and PRACH resources
if (mac->generate_nr_prach == 1)
nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_tti_tx, prach_resources, prach_pdu, rach_ConfigDedicated);
nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_slot_tx, prach_resources, prach_pdu, rach_ConfigDedicated);
offset = nr_generate_ulsch_pdu((uint8_t *) mac_sdus, // sdus buffer
(uint8_t *) payload, // UL MAC pdu pointer
@@ -544,7 +544,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
// - handle backoff and raResponseWindow params
// LOG_D(MAC, "[MAC][UE %d][RAPROC] frame %d, subframe %d: RA Active, window cnt %d (RA_tx_frame %d, RA_tx_subframe %d)\n",
// mod_id, frame, nr_tti_tx, mac->RA_window_cnt, mac->RA_tx_frame, mac->RA_tx_subframe);
// mod_id, frame, nr_slot_tx, mac->RA_window_cnt, mac->RA_tx_frame, mac->RA_tx_subframe);
if (mac->RA_BI_found){
prach_resources->RA_PREAMBLE_BACKOFF = prach_resources->RA_SCALING_FACTOR_BI * mac->RA_backoff_indicator;
@@ -564,7 +564,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
} else if (mac->RA_window_cnt == 0 && !mac->RA_RAPID_found) {
LOG_I(MAC, "[MAC][UE %d][RAPROC] Frame %d: nr_tti_tx %d: RAR reception failed \n", mod_id, frame, nr_tti_tx);
LOG_I(MAC, "[MAC][UE %d][RAPROC] Frame %d: nr_slot_tx %d: RAR reception failed \n", mod_id, frame, nr_slot_tx);
mac->ra_state = RA_UE_IDLE;
mac->RA_PREAMBLE_TRANSMISSION_COUNTER++;
@@ -622,22 +622,22 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
// frame_diff = (sframe_t) frame - mac->RA_backoff_frame;
// if (frame_diff < 0) frame_diff = -frame_diff;
// mac->RA_backoff_frame = frame;
// mac->RA_backoff_subframe = nr_tti_tx;
// mac->RA_backoff_slot = nr_slot_tx;
// }
// compute RA window parameters
// if (mac->RA_window_cnt > 0){
// frame_diff = (frame_t) frame - mac->RA_tx_frame;
// if (frame_diff < 0) frame_diff = -frame_diff;
// mac->RA_window_cnt -= ((10 * frame_diff) + (nr_tti_tx - mac->RA_tx_subframe));
// LOG_D(MAC, "[MAC][UE %d][RAPROC] Frame %d, subframe %d: RA Active, adjusted window cnt %d\n", mod_id, frame, nr_tti_tx, mac->RA_window_cnt);
// mac->RA_window_cnt -= ((10 * frame_diff) + (nr_slot_tx - mac->RA_tx_subframe));
// LOG_D(MAC, "[MAC][UE %d][RAPROC] Frame %d, subframe %d: RA Active, adjusted window cnt %d\n", mod_id, frame, nr_slot_tx, mac->RA_window_cnt);
// }
// mac->RA_tx_frame = frame;
// mac->RA_tx_subframe = nr_tti_tx;
// mac->RA_tx_slot = nr_slot_tx;
// Fill in preamble and PRACH resources
if (mac->generate_nr_prach == 1)
nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_tti_tx, prach_resources, prach_pdu, rach_ConfigDedicated);
nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_slot_tx, prach_resources, prach_pdu, rach_ConfigDedicated);
} else {
@@ -646,12 +646,12 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
LOG_D(MAC, "[MAC][UE %d][RAPROC][%d.%d]: RAR not received yet (RA window count %d) \n",
mod_id,
frame,
nr_tti_tx,
nr_slot_tx,
mac->RA_window_cnt);
// Fill in preamble and PRACH resources
if (mac->generate_nr_prach == 1)
nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_tti_tx, prach_resources, prach_pdu, rach_ConfigDedicated);
nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_slot_tx, prach_resources, prach_pdu, rach_ConfigDedicated);
}
}
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+10 -9
View File
@@ -775,7 +775,8 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
module_id_t mod_id,
int cc_id,
frame_t frame,
int slot){
int slot,
int thread_id){
scheduled_response->dl_config = dl_config;
scheduled_response->ul_config = ul_config;
@@ -784,7 +785,7 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
scheduled_response->CC_id = cc_id;
scheduled_response->frame = frame;
scheduled_response->slot = slot;
scheduled_response->thread_id = thread_id;
}
uint32_t get_ssb_slot(uint32_t ssb_index){
@@ -1471,7 +1472,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
*/
dl_config->number_pdus = dl_config->number_pdus + 1;
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response);
}
@@ -1485,7 +1486,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
dcireq.dl_config_req.number_pdus = 0;
nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
fill_scheduled_response(&scheduled_response, &dcireq.dl_config_req, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot);
fill_scheduled_response(&scheduled_response, &dcireq.dl_config_req, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
mac->if_module->scheduled_response(&scheduled_response);
}
@@ -1649,7 +1650,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
}
}
fill_scheduled_response(&scheduled_response, NULL, ul_config_req, &tx_req, mod_id, cc_id, rx_frame, rx_slot);
fill_scheduled_response(&scheduled_response, NULL, ul_config_req, &tx_req, mod_id, cc_id, rx_frame, rx_slot, ul_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
mac->if_module->scheduled_response(&scheduled_response);
}
@@ -1718,7 +1719,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
ul_config_list->pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
ul_config->number_pdus++;
// scheduled_response
fill_scheduled_response(&scheduled_response, NULL, ul_config, &tx_req, ul_info->module_id, ul_info->cc_id, ul_info->frame_rx, ul_info->slot_rx);
fill_scheduled_response(&scheduled_response, NULL, ul_config, &tx_req, ul_info->module_id, ul_info->cc_id, ul_info->frame_rx, ul_info->slot_rx, ul_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
mac->if_module->scheduled_response(&scheduled_response);
}
@@ -1773,7 +1774,7 @@ void nr_ue_msg3_scheduler(NR_UE_MAC_INST_t *mac,
// PRACH formats 9, 10, 11 are corresponding to dual PRACH format configurations A1/B1, A2/B2, A3/B3.
// - todo:
// - Partial configuration is actually already stored in (fapi_nr_prach_config_t) &mac->phy_config.config_req->prach_config
void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) {
void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, int thread_id) {
uint16_t format, format0, format1, ncs;
int is_nr_prach_slot;
@@ -1901,7 +1902,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
} // if format1
} // is_nr_prach_slot
fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP);
fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP, thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response);
} // if is_nr_UL_slot
@@ -1967,7 +1968,7 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
csi_MeasConfig_t csi_MeasConfig = ue->csi_MeasConfig;
PUSCH_ServingCellConfig_t PUSCH_ServingCellConfig= ue->PUSCH_ServingCellConfig;
PDSCH_ServingCellConfig_t PDSCH_ServingCellConfig= ue->PDSCH_ServingCellConfig;
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id];
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[proc->thread_id][eNB_id];
// 1 CARRIER_IN
// crossCarrierSchedulingConfig from higher layers, variable crossCarrierSchedulingConfig indicates if 'cross carrier scheduling' is enabled or not:
// if No cross carrier scheduling: number of bits for CARRIER_IND is 0
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
+2 -2
View File
@@ -110,7 +110,7 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
ret = nr_ue_scheduler(NULL, ul_info);
if (is_nr_UL_slot(mac->scc, ul_info->slot_tx) && get_softmodem_params()->do_ra)
nr_ue_prach_scheduler(module_id, ul_info->frame_tx, ul_info->slot_tx);
nr_ue_prach_scheduler(module_id, ul_info->frame_tx, ul_info->slot_tx, ul_info->thread_id);
switch(ret){
case UE_CONNECTION_OK:
@@ -157,7 +157,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
if (ret >= 0) {
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is NULL!\n" );
AssertFatal( nr_ue_if_module_inst[module_id]->scheduled_response != NULL, "scheduled_response is NULL!\n" );
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, dl_info->module_id, dl_info->cc_id, dl_info->frame, dl_info->slot);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, dl_info->module_id, dl_info->cc_id, dl_info->frame, dl_info->slot, dl_info->thread_id);
nr_ue_if_module_inst[module_id]->scheduled_response(&scheduled_response);
}
}
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h
+7 -2
View File
@@ -66,8 +66,8 @@ typedef struct {
frame_t frame;
/// slot
int slot;
/// proc is needed to signal back decoded frame number to PHY. However, this is not really FAPI procedure and should be done differently
UE_nr_rxtx_proc_t * proc;
/// index of the current UE RX/TX thread
int thread_id;
/// NR UE FAPI-like P7 message, direction: L1 to L2
/// data reception indication structure
@@ -95,6 +95,9 @@ typedef struct {
frame_t frame_tx;
/// slot tx
uint32_t slot_tx;
/// index of the current UE RX/TX thread
int thread_id;
/// dci reception indication structure
fapi_nr_dci_indication_t *dci_ind;
} nr_uplink_indication_t;
@@ -111,6 +114,8 @@ typedef struct {
frame_t frame;
/// slot
int slot;
/// index of the current UE RX/TX thread
int thread_id;
/// NR UE FAPI-like P7 message, direction: L2 to L1
/// downlink transmission configuration request structure